You are on page 1of 61

A B C D E

1 1

Compal Confidential 2

C5PM2 MB Schematic Document


LA-E361P
3 3

Rev:1.0
2016.10.27

4 4

Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
Cover Sheet
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2_LA-E361P
Date: Friday, October 28, 2016 Sheet 1 of 61
A B C D E
A B C D E

HDMI Conn.
Fan Control*2
page 42

eDP Interleaved Memory

Memory BUS 260 pin DDR4-SO-DIMM X1


BANK 0, 1, 2, 3 page 14
1
Dual Channel 1

HDMI Kabylake H PROCESSOR


PS8407A 1.2V DDR4 1333/1600 260pin DDR4-SO-DIMM X1
page 31
page 30 BGA1440 BANK 4, 5, 6, 7 page 15
eDP
(42X28) (SKL-H_4+2)
HDMI x 4 lanes
PEG x16
DDI
Processor 8GT/s
page 06~13
Nvidia N17P-GX
with gDDR5 x4 Card Reader
page 23~29

X4 DMI USB 3.0 USB 3.0 CMOS


page 37 page 34
NGFF conn x2 Type-C x1 Camera Card Reader
WLAN PCIE 2.0 PCIE 3.0 x4 USB (port 1,2) USB/B (port 3) USB (port 9) RTS5170
USB port 7 5GT/s 8GT/s on SUB/B
2 2
Port 9-12
port 3 Flexible IO
page 32 page 38 Skylake PCH - H USBx8
POA USB2.0
PCIE 2.0 SATA3.0 FCBGA(23X23) USB (port 11)
USB (port 10)
5GT/s 6.0 Gb/s
port 4 port 3 page 31 page 33

48MHz page 36 page 35 page 30


LAN(GbE) SATA Re-Driver
Realtek 8111H PARADE PS8527 837pin FCBGA HD Audio 3.3V 24MHz

page 16~22

RJ45 conn. SATA HDD Conn. HDA Codec


LPC/eSPI BUS ALC255
3 page 40 3

CLK=24MHz

page 32. ENE


page 38 KB9022/9032 TPM
page 39 page 41
SPI Int. Speaker Int. DMIC UAJ
RTC CKT. Sub Board on Sub/B on Sub/B
page 40 page 33 page 33
page 21
LS-E361P Touch Pad Int.KBD
PS2 / I2C
FUN/B page 33 SPI ROM x1
Power On/Off CKT.
page 17
page 41
LS-E362P
page 41 page 41
LED/B page 33

4 DC/DC Interface CKT. 4

page 43

Security Classification Compal Secret Data Compal Electronics, Inc.


2016/01/29 2017/01/10 Title
Power Circuit DC/DC Issued Date Deciphered Date Block Diagrams
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
page 44~61 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

Laptopblue.vn
Laptopblue.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 2 of 61

A B C D E
A B C D E

Board ID Table for AD channel Power State BOARD ID Table


Vcc 3.3V +/- 5% SIGNAL
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock Board ID PCB Revision
Ra 100K +/- 5%
0 0.1
Board ID Rb V BID min V BID typ V BID max EC AD S0 (Full ON) HIGH HIGH HIGH ON ON ON ON
1 0.2
0 0 0.000 V 0.300 V 0x00 - 0x13 S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF 2 0.3
1 12K +/- 1% 0.347 V 0.345 V 0.360 V 0x14 - 0x1E
3 1.0
2 15K +/- 1% 0.423 V 0.430 V 0.438 V 0x1F - 0x25 S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
1
4 1
3 20K +/- 1% 0.541 V 0.550 V 0.559 V 0x26 - 0x30 S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF 5
4 27K +/- 1% 0.691 V 0.702 V 0.713 V 0x31 - 0x3A
6
5 33K +/- 1% 0.807 V 0.819 V 0.831 V 0x3B - 0x45
7
6 43K +/- 1% 0.978 V 0.992 V 1.006 V 0x46 - 0x54 BOM Structure Table
7 56K +/- 1% 1.169 V 1.185 V 1.200 V 0x55 - 0x64 Voltage Rails
8 75K +/- 1% 1.398 V 1.414 V 1.430 V 0x65 - 0x76 BOM Option Table Power Plane Description S0 S3 S4 S5
9 100K +/- 1% 1.634 V 1.650 V 1.667 V 0x77 - 0x87
Item BOM Structure +RTCVCC RTC Battery Power ON ON ON ON
10 130K +/- 1% 1.849 V 1.865 V 1.881 V 0x88 - 0x96 +19V_VIN Adapter power supply N/A N/A N/A
Unpop @ N/A
11 160K +/- 1% 2.015 V 2.031 V 2.046 V 0x97 - 0xA4 +12.6V_BATT Battery power supply N/A N/A N/A
Connector CONN@ N/A
12 200K +/- 1% 2.185 V 2.200 V 2.215 V 0xA5 - 0xAF +19VB AC or battery power rail for power circuit. N/A N/A N/A
EMC requirement EMC@ N/A
13 240K +/- 1% 2.316 V 2.329 V 2.343 V 0xB0 - 0xB7 +3VLP +19VB to +3VLP power rail for suspend power
EMC requirement depop XEMC@ ON ON ON ON
14 270K +/- 1% 2.395 V 2.408 V 2.421 V 0xB8 - 0xBF +5VALW +5V Always power rail
UMA only UMA@ ON ON ON ON
15 330K +/- 1% 2.521 V 2.533 V 2.544 V 0xC0 - 0xC9 +3VALW System +3VALW always on power rail ON*
TPM TPM@ ON ON ON
16 430K +/- 1% 2.667 V 2.677 V 2.687 V 0xCA - 0xD4 +3VALW_DSW +3VALW power for PCH DSW rails
CMC CMC@ ON ON ON ON
17 560K +/- 1% 2.791 V 2.800 V 2.808 V 0xD5 - 0xDD +3VALW_PCH_PRIM +3VALW power for PCH power rails
LPC MODE for EC LPC@ ON ON ON ON*
18 750K +/- 1% 2.905 V 2.912 V 2.919 V 0xDE - 0xF0 +3VALW_SPI +3VALW_PRIM supply for the SPI IO
BA Serial BA@ ON ON ON ON
19 NC 3.000 V 3.000 V 0xF1 - 0xFF +1.0VALW +1.0V Always power rail
dGPU VGA@ ON ON ON ON
2 2
N17P-G0 G0@ +1.2V_VDDQ DDR4 +1.2V power rail ON ON OFF OFF
N17P-G1 G1@ +1.0V_VCCST Sustain voltage for processor in Standby modes ON ON OFF OFF

VRAM BOM Select X76@ +5VS System +5V power rail ON


I2C Address Table DMIC*1 DMIC@ +3VS System +3V power rail ON
OFF
OFF
OFF

OFF
OFF
OFF
Address(8bit) For Acer IOAC IOAC@ +1.0VS_VCCSTG +1.0VALW_PRIM Gated version of VCCST ON OFF OFF OFF
BUS Device Address(7 bit)
Write Read No Acer IOAC NIOAC@ +0.6VS_VTT DDR +0.6VS power rail for DDR terminator . ON OFF OFF OFF
I2C_0 (+3VS) Touch Panel reserved POA FP@ +VCC_CORE Core voltage for CPU ON OFF OFF OFF

I2C_1 (+3VS) TM-P2969-001 (Touch Pad) +VCC_GT Sliced graphics power rail ON OFF OFF OFF

SB8787-1200 (Touch Pad) +VCCIO CPU IO power rail ON OFF OFF OFF

DIMM1 +VCC_SA System Agent power rail ON OFF OFF OFF


PCH_SMBCLK +1.8VSDGPU_AON +1.8VS power rail for GPU(AON rails)
(+3VS) DIMM2 ON OFF OFF OFF
LIS3DHTR(G-sensor) 0x30 +1.8VSDGPU_MAIN +1.8VS power rail for GPU GC6 ON OFF OFF OFF
N17P-GX (VGA) 0x9E +VGA_CORE Core voltage for VGA ON OFF OFF OFF
PCH_SML1CLK +1.35VSDGPU +1.35VS power rail for GPU
(+3VS) EC ON OFF OFF OFF
+1.0VSDGPU +1.0VS power rail for GPU ON OFF OFF OFF
EC_SMB_CK1 BQ24780 (Charger IC) 0x12 +VGA_CORE_S Core voltage for VGA
(+3VLP) BATTERY PACK 0x16
3 3

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

43 level BOM table


43 Level Description BOM Structure
431A5HBOL14 SMT MB AE361 C5PM2 I57300 G0 2G HDMI I573@/NIOAC@/VGA@/G0@/2G@
431A5HBOL15 SMT MB AE361 C5PM2 I57300 G0 4G HDMI I573@/NIOAC@/VGA@/G0@/4G@
431A5HBOL16 SMT MB AE361 C5PM2 I77700 G0 2G HDMI I777@/NIOAC@/VGA@/G0@/2G@
431A5HBOL17 SMT MB AE361 C5PM2 I77700 G0 4G HDMI I777@/NIOAC@/VGA@/G0@/4G@
431A5HBOL18 SMT MB AE361 C5PM2 I57300 G1 2G HDMI I573@/NIOAC@/VGA@/G1@/2G@
431A5HBOL19 SMT MB AE361 C5PM2 I57300 G1 4G HDMI I573@/NIOAC@/VGA@/G1@/4G@
431A5HBOL20 SMT MB AE361 C5PM2 I77700 G1 2G HDMI I777@/NIOAC@/VGA@/G1@/2G@
431A5HBOL21 SMT MB AE361 C5PM2 I77700 G1 4G HDMI I777@/NIOAC@/VGA@/G1@/4G@

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

Notes List
Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 3 of 61
A B C D E
5 4 3 2 1

DC_IN
PL101
PJP101
AC CONN.
D D
+19V_VIN +1.8VSDGPU_AON +1.8VSDGPU_MAIN
UG12 UG12
GPU

UA1
CODEC
+12.6V_BATT
+12.6V_BATT+
BATTERY PU702 PJ7107 +1.8VS
PL201,PL202 DIMM1
PJP201
PU7102 PJ7103 +2.5V DIMM2
DDR4
PU301 +1.5VS
PU7103 PJ7104 UY2
HDMI REDRIVER UA1 CODEC
IMVP8
+VCCCORE CPU +3VS
PL803,PL804,PL805 UQ1 J11 JHDD1 HDD
+19VB PU801 R4
+3VALW_TPM U2 UO1 SATA Re-driver
CHARGER +VCCGT
TPM
EN:VR_ON
PL806,PL807 CPU
UM1
+3VS_WLAN JNGFF1 WLAN CARD (IOAC) LGAU3 G-SENSOR

RL1
+3V_LAN UL2 LAN RM8
+3VS_WLAN JNGFF1
WLAN
PU808 +VCCSA
+19VB
PL809 CPU RH97
+3VALW_DSW PCH RM1
+3VS_SSD_NGFF JSSD1
EN:DRON
SSD
RH99
+3VALW_PCH_PRIM RH102
+3VALW_SPI UH3 R5
+3VS_TPM U2 TPM
SPI
+3VALW RH100
+3VALW_HDA RX8
+TP_PWR JEDP1
PU401 PJ401 PCH TP
+19VB UK1
+3V_PTP JTP1 JUSB1 MIC1
EN:3V_EN +3VLP EC,LID TP DMIC SUB
C
FP UK3
+3V_FP FP C

RS10
+3VALW_CC US1 JLED1 J1 +3VS_CARD UY2 Card Reader SUB
USB_CC
+1.2V_VDDQ RC41
+VCCSFR_OC_1 CPU +3VALW +3VS_ALS
PJ501 UK4 US1
POA RY1 UY2
HDMI REDRIVER
+19VB PU501 RC42
+VCCSFR_OC_2 CPU +LCDVDD
UX1 JEDP1
PANEL
EN:SYSON PJ502 +0.6VS_VTT +1.0VALW_PRIM
RH96 PCH RH105
+3VS_VCCATS PCH
RH98
+1.0VALW_PCH PCH JFAN1 FAN1
PU601 RH101
+1.0VALW_DCPDSW
PJ601 +1.0VALW +1.0VALW_VCCCLK
+19VB RH103 JFAN2
FAN2
EN:+3VALW LH1
+1.0VALW_VCCCLK5
RH104
+1.0VALW_MPHY PCH
LH2
+1.0VALW_AMPHYPLL
LH3
+1.0VALW_AUSB_AZPLL
+1.0VS_VCCIO RH106
+1.0VALW_PRIMAL22
+19VB
PU7201 PJ7201 CPU +1.0VALW_PRIMAD15
RH107
EN:SUSP

UC3 JC1
+1.0V_VCCST CPU

UC4 RC45
+1.0VS_VCCSTG CPU

B
PU402 PJ402 +5VALW RS9
+5VALW_CC US1 +USB3_VCCC JUSB3
B

+19VB USB_CC
US2
+USB3_VCCA JUSB1
USB3.0
US3
+USB3_VCCB JUSB2
+VGA_CORE
USB3.0
PU1501 PL1501,PL1502 GPU
+19VB JSUB1 US1 +USB_VCCA
SUB/B USB
EN:VGA_CORE_EN

UQ1 J12 +5VS


+VGA_CORE_S UF1 FAN1
PU1601 PL1601 GPU
+19VB

EN:VGA_CORE_S_EN
UF2 FAN2

J18
+VDDA UA1 CODEC
+1.35VSDGPU +5VS_BL
+19VB
PU1301 PJ1301 GPU U1 JBL1 KB BackLight

EN:1.35VSDGPU_PWR_EN RO3
+5VS_HDD JHDD1
HDD
UY1
+HDMI_5V_OUT JHDMI1
HDMI
+1.0VSDGPU
+19VB
PU1401 PJ1401 GPU
EN:VGA_CORE_S_EN

A A

LX1 +INVPWR_B+
+19VB
PANEL

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

Laptopblue.vn
Power Map

Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Si ze Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
E 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Dat
Date:
e: Friday, October 28, 2016 Sheet 4 of 61
5 4 3 2 1
A B C D E

C5PM2_DIS_EVT Power Sequence AC mode


BIOS ver: V0.01
EC: ver: V0.01

Plug in Power On S3 S3 Resume Power Off


+3VLP
1 1
+3VLP

EC_ON
222.8us
EC_ON

+5VALW
3.031ms
+5VALW
ON/OFFBTN#
ON/OFFBTN#

159ms
+3VALW +3VALW

158.7ms 3.920ms
+1.0VALW +1.0VALW

26.24ms 8.952S
EC_RSMRST# EC_RSMRST#

20.3ms
5.64ms ← → 8.952S
PBTN_OUT# PBTN_OUT#

174.6ms 3.07ms
PM_SLP_S4# PM_SLP_S4#

3.03ms 100.5us
PM_SLP_S3# PM_SLP_S3#

69.64us 99.75us
SYSON SYSON
→ 691.5us 109.5us
+1.0V_VCCST +1.0V_VCCST

669us 579.5us
2 +1.2V_VDDQ +1.2V_VDDQ 2


1.26ms 1.84ms
+2.5VS +2.5VS
→ 13.12ms → 175.9us → 26.09ms 171.8us
SUSP# SUSP#
→ 13.76ms → 485.8us → 28.27ms 293.7us
+1.0VS_VCCSTG +1.0VS_VCCSTG
→ 14.13ms → 307.8us → 27.11ms 481.7us
+5VS +5VS
→ 734.9us → 5.105ms → 759.9us → 4.92ms
+3VS +3VS
→ 2.185ms → 99.51us → 2.205ms → 42.26us
+1.8VS +1.8VS
→ 20.18ms → 21.26us → 20.19ms 22.24us
EC_VCCST_PG EC_VCCST_PG
→ 19.87ms 20.12us ← 20.27ms
→ 20.52us
SM_PG_CTRL SM_PG_CTRL
→ 19.88ms → 1.452ms → 20.27ms → 384.9us
+0.6VS_VTT +0.6VS_VTT
→ 19.88ms → 360.2ns → 20.27ms 8.193us
VR_ON VR_ON
→ 2.213ms → 350us → 2.204ms → 153.8us
+VCC_SA +VCC_SA
→ 133.7ms → 350us → 126ms → 153.8us
+VCC_CORE +VCC_CORE
3 3
→ 1.268S → 948ms → 726.4ms → 7.982s
+VCC_GT +VCC_GT
→ 9.806ms → 20.01us → → 20.01us
PCH_PWROK 9.901ms PCH_PWROK
→ 121ms → 6.806us → 121.4ms → 7.205us
SYS_PWROK SYS_PWROK
→ 131ms → 524.8us → 123.6ms 524.8us
PLT_RST# PLT_RST#

4 4

Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
Power Sequence
Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 5 of 61
A B C D E
A B C D E

UC1D SKYLAKE_HALO
UC1 UC1 UH1 BGA1440
K36 D29
DDI1_TXP[0] EDP_TXP[0] EDP_TXP0 <30>
K37 E29
DDI1_TXN[0] EDP_TXN[0] EDP_TXN0 <30>
J35 F28
DDI1_TXP[1] EDP_TXP[1] EDP_TXP1 <30>
J34 E28
DDI1_TXN[1] EDP_TXN[1] EDP_TXN1 <30>
H37 B29 <eDP>
DDI1_TXP[2] EDP_TXN[2] EDP_TXN2 <30>
SR32S 2.5G SR32Q 2.8G HM175 SR30W-PCH H36 A29
DDI1_TXN[2] EDP_TXP[2] EDP_TXP2 <30>
I573@ I777@ J37 B28
DDI1_TXP[3] EDP_TXN[3] EDP_TXN3 <30>
SA0000AD850 SA0000AD750 SA0000ADB30 J38 C28
DDI1_TXN[3] EDP_TXP[3] EDP_TXP3 <30>
ZZZ UV1 UV1 D27 C26 EDP_AUXP <30>
1 E27 DDI1_AUXP EDP_AUXP B26 1
DDI1_AUXN EDP_AUXN EDP_AUXN <30>
H34
<31> CPU_DP2_P0 DDI2_TXP[0]
H33
<31> CPU_DP2_N0 DDI2_TXN[0] +1.0VS_VCCIO
F37 A33
<31> CPU_DP2_P1 DDI2_TXP[1] EDP_DISP_UTIL
LA-E361P N17P-G0-A1 N17P-G1-A1 G38
<31> CPU_DP2_N1 DDI2_TXN[1]
G0@ G1@ <HDMI> F34
<31> CPU_DP2_P2 DDI2_TXP[2]
DAZ1TY00100 SA0000A0510 SA0000A0610 F35 D37 EDP_COMP 2 1
<31> CPU_DP2_N2 DDI2_TXN[2] EDP_RCOMP
E37 24.9_0402_1% RC1
<31> CPU_DP2_P3 DDI2_TXP[3]
E36 CAD note:
<31> CPU_DP2_N3 DDI2_TXN[3] Trace width=20 mils,Spacing=25mil,Max length=100mils
F26
E26 DDI2_AUXP
DDI2_AUXN
C34
D34 DDI3_TXP[0]
B36 DDI3_TXN[0]
B34 DDI3_TXP[1]
F33 DDI3_TXN[1]
E33 DDI3_TXP[2]
C33 DDI3_TXN[2]
B33 DDI3_TXP[3]
DDI3_TXN[3] G27
PROC_AUDIO_CLK CPU_DISPA_BCLK <18>
A27 G25 CPU_DISPA_SDO <18>
B27 DDI3_AUXP PROC_AUDIO_SDI G29 CPU_DISPA_SDI 2 1
DDI3_AUXN PROC_AUDIO_SDO CPU_DISPA_SDI_R <18>
RC2
4 OF 14 20_0402_1%
SKL-H_BGA1440 Close to CPU
@ REV = 1 ?

2 2

CPU_XDP_TMS
<9,18> CPU_XDP_TMS CPU_XDP_TDI
<9,18> CPU_XDP_TDI
CPU_XDP_TDO
<9,18> CPU_XDP_TDO CPU_XDP_TCK0
<9,18> CPU_XDP_TCK0 PCH_JTAG_TCK1
<18> PCH_JTAG_TCK1

3 3

+1.0VS_VCCSTG

TMS/TDI pin CPU on-die termination


RC5 2 CMC@ 1 51_0402_5% CPU_XDP_TMS

RC6 2 CMC@ 1 51_0402_5% CPU_XDP_TDI


Place to PCH side CPU_XDP_TDO
RC7 1 CMC@ 2 100_0402_1%

RC14 2 @ 1 51_0402_5% PCH_JTAG_TCK1

If need debug from usb port. this cmc@ need pop


+1.0VS_VCCSTG

RC8 1 CMC@ 2 100_0402_1% CPU_XDP_TDO


Place to CPU side
RC13 2 CMC@ 1 51_0402_1% CPU_XDP_TCK0

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

SKL-H(1/9)DDI,EDP
Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 6 of 61
A B C D E
A B C D E

Interleaved Memory

UC1A SKYLAKE_HALO
UC1B SKYLAKE_HALO
BGA1440
<14> DDR_A_D[0..15] DDR_A_D0 DDR_A_CLK0
1 BR6 AG1 DDR_A_CLK0 <14> BGA1440 1
DDR_A_D1 DDR0_DQ[0] DDR0_CKP[0] DDR_A_CLK#0 <15> DDR_B_D[0..15] DDR_B_D0 DDR_B_CLK0
BT6 AG2 DDR_A_CLK#0 <14> BT11 AM9 DDR_B_CLK0 <15>
DDR_A_D2 BP3 DDR0_DQ[1] DDR0_CKN[0] AK1 DDR_A_CLK#1 DDR_B_D1 BR11 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKP[0] AN9 DDR_B_CLK#0
DDR_A_D3 DDR0_DQ[2] DDR0_CKN[1] DDR_A_CLK1 DDR_A_CLK#1 <14> DDR_B_D2 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[0] DDR_B_CLK#1 DDR_B_CLK#0 <15>
BR3 AK2 DDR_A_CLK1 <14> BT8 AM8 DDR_B_CLK#1 <15>
DDR_A_D4 BN5 DDR0_DQ[3] DDR0_CKP[1] AL3 DDR_B_D3 BR8 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKN[1] AM7 DDR_B_CLK1
DDR_A_D5 DDR0_DQ[4] DDR0_CLKP[2] DDR_B_D4 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] DDR_B_CLK1 <15>
BP6 AK3 BP11 AM11
DDR_A_D6 BP2 DDR0_DQ[5] DDR0_CLKN[2] AL2 DDR_B_D5 BN11 DDR1_DQ[4]/DDR0_DQ[20] DDR1_CLKP[2] AM10
DDR_A_D7 BN3 DDR0_DQ[6] DDR0_CLKP[3] AL1 DDR_B_D6 BP8 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CLKN[2] AJ10
DDR_A_D8 BL4 DDR0_DQ[7] DDR0_CLKN[3] DDR_B_D7 BN8 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CLKP[3] AJ11
DDR_A_D9 BL5 DDR0_DQ[8] AT1 DDR_A_CKE0 DDR_B_D8 BL12 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CLKN[3]
DDR_A_D10 DDR0_DQ[9] DDR0_CKE[0] DDR_A_CKE1 DDR_A_CKE0 <14> DDR_B_D9 DDR1_DQ[8]/DDR0_DQ[24] DDR_B_CKE0
BL2 AT2 DDR_A_CKE1 <14> BL11 AT8 DDR_B_CKE0 <15>
DDR_A_D11 BM1 DDR0_DQ[10] DDR0_CKE[1] AT3 DDR_B_D10 BL8 DDR1_DQ[9]/DDR0_DQ[25] DDR1_CKE[0] AT10 DDR_B_CKE1
DDR_A_D12 DDR0_DQ[11] DDR0_CKE[2] DDR_B_D11 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CKE[1] DDR_B_CKE1 <15>
BK4 AT5 BJ8 AT7
DDR_A_D13 BK5 DDR0_DQ[12] DDR0_CKE[3] DDR_B_D12 BJ11 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CKE[2] AT11
DDR_A_D14 BK1 DDR0_DQ[13] AD5 DDR_A_CS#0 DDR_B_D13 BJ10 DDR1_DQ[12]/DDR0_DQ[28] DDR1_CKE[3]
DDR_A_D15 DDR0_DQ[14] DDR0_CS#[0] DDR_A_CS#1 DDR_A_CS#0 <14> DDR_B_D14 DDR1_DQ[13]/DDR0_DQ[29] DDR_B_CS#0
BK2 AE2 DDR_A_CS#1 <14> BL7 AF11 DDR_B_CS#0 <15>
<14> DDR_A_D[16..31] DDR_A_D16 DDR0_DQ[15] DDR0_CS#[1] DDR_B_D15 DDR1_DQ[14]/DDR0_DQ[30] DDR1_CS#[0] DDR_B_CS#1
BG4 AD2 BJ7 AE7 DDR_B_CS#1 <15>
DDR_A_D17 DDR0_DQ[16]/DDR0_DQ[32] DDR0_CS#[2] <15> DDR_B_D[16..31] DDR_B_D16 DDR1_DQ[15]/DDR0_DQ[31] DDR1_CS#[1]
BG5 AE5 BG11 AF10
DDR_A_D18 BF4 DDR0_DQ[17]/DDR0_DQ[33] DDR0_CS#[3] DDR_B_D17 BG10 DDR1_DQ[16]/DDR0_DQ[48] DDR1_CS#[2] AE10
DDR_A_D19 BF5 DDR0_DQ[18]/DDR0_DQ[34] AD3 DDR_A_ODT0 DDR_B_D18 BG8 DDR1_DQ[17]/DDR0_DQ[49] DDR1_CS#[3]
DDR_A_D20 DDR0_DQ[19]/DDR0_DQ[35] DDR0_ODT[0] DDR_A_ODT1 DDR_A_ODT0 <14> DDR_B_D19 DDR1_DQ[18]/DDR0_DQ[50] DDR_B_ODT0
BG2 AE4 DDR_A_ODT1 <14> BF8 AF7 DDR_B_ODT0 <15>
DDR_A_D21 BG1 DDR0_DQ[20]/DDR0_DQ[36] DDR0_ODT[1] AE1 DDR_B_D20 BF11 DDR1_DQ[19]/DDR0_DQ[51] DDR1_ODT[0] AE8 DDR_B_ODT1
DDR_A_D22 DDR0_DQ[21]/DDR0_DQ[37] DDR0_ODT[2] DDR_B_D21 DDR1_DQ[20]/DDR0_DQ[52] DDR1_ODT[1] DDR_B_ODT1 <15>
BF1 AD4 BF10 AE9
DDR_A_D23 BF2 DDR0_DQ[22]/DDR0_DQ[38] DDR0_ODT[3] DDR_B_D22 BG7 DDR1_DQ[21]/DDR0_DQ[53] DDR1_ODT[2] AE11
DDR_A_D24 BD2 DDR0_DQ[23]/DDR0_DQ[39] AH5 DDR_A_BA0 DDR_B_D23 BF7 DDR1_DQ[22]/DDR0_DQ[54] DDR1_ODT[3]
DDR_A_D25 DDR0_DQ[24]/DDR0_DQ[40] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR_A_BA1 DDR_A_BA0 <14> DDR_B_D24 DDR1_DQ[23]/DDR0_DQ[55] DDR_B_MA16
BD1 AH1 DDR_A_BA1 <14> BB11 AH10 DDR_B_MA16 <15>
DDR_A_D26 BC4 DDR0_DQ[25]/DDR0_DQ[41] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] AU1 DDR_A_BG0 DDR_B_D25 BC11 DDR1_DQ[24]/DDR0_DQ[56] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] AH11 DDR_B_MA14
DDR_A_D27 DDR0_DQ[26]/DDR0_DQ[42] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR_A_BG0 <14> DDR_B_D26 DDR1_DQ[25]/DDR0_DQ[57] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR_B_MA15 DDR_B_MA14 <15>
BC5 BB8 AF8 DDR_B_MA15 <15>
DDR_A_D28 BD5 DDR0_DQ[27]/DDR0_DQ[43] AH4 DDR_A_MA16 DDR_B_D27 BC8 DDR1_DQ[26]/DDR0_DQ[58] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR_A_D29 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR_A_MA14 DDR_A_MA16 <14> DDR_B_D28 DDR1_DQ[27]/DDR0_DQ[59] DDR_B_BA0
BD4 AG4 DDR_A_MA14 <14> BC10 AH8 DDR_B_BA0 <15>
DDR_A_D30 BC1 DDR0_DQ[29]/DDR0_DQ[45] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] AD1 DDR_A_MA15 DDR_B_D29 BB10 DDR1_DQ[28]/DDR0_DQ[60] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] AH9 DDR_B_BA1
DDR_A_D31 DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR_A_MA15 <14> DDR_B_D30 DDR1_DQ[29]/DDR0_DQ[61] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR_B_BG0 DDR_B_BA1 <15>
BC2 BC7 AR9 DDR_B_BG0 <15>
<14> DDR_A_D[32..47] DDR_A_D32 DDR0_DQ[31]/DDR0_DQ[47] DDR_A_MA0 DDR_B_D31 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
AB1 AH3 DDR_A_MA0 <14> BB7
DDR_A_D33 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR_A_MA1 <15> DDR_B_D[32..47] DDR_B_D32 DDR1_DQ[31]/DDR0_DQ[63] DDR_B_MA0
AB2 AP4 DDR_A_MA1 <14> AA11 AJ9 DDR_B_MA0 <15>
DDR_A_D34 AA4 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] AN4 DDR_A_MA2 DDR_B_D33 AA10 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] AK6 DDR_B_MA1
2 DDR_A_D35 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR_A_MA3 DDR_A_MA2 <14> DDR_B_D34 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR_B_MA2 DDR_B_MA1 <15> 2
AA5 AP5 DDR_A_MA3 <14> AC11 AK5 DDR_B_MA2 <15>
DDR_A_D36 AB5 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] AP2 DDR_A_MA4 DDR_B_D35 AC10 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] AL5 DDR_B_MA3
DDR_A_D37 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] DDR_A_MA5 DDR_A_MA4 <14> DDR_B_D36 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[3] DDR_B_MA4 DDR_B_MA3 <15>
AB4 AP1 DDR_A_MA5 <14> AA7 AL6 DDR_B_MA4 <15>
DDR_A_D38 AA2 DDR0_DQ[37]/DDR1_DQ[5] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] AP3 DDR_A_MA6 DDR_B_D37 AA8 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[4] AM6 DDR_B_MA5
DDR_A_D39 DDR0_DQ[38]/DDR1_DQ[6] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR_A_MA7 DDR_A_MA6 <14> DDR_B_D38 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR_B_MA6 DDR_B_MA5 <15>
AA1 AN1 DDR_A_MA7 <14> AC8 AN7 DDR_B_MA6 <15>
DDR_A_D40 V5 DDR0_DQ[39]/DDR1_DQ[7] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AN3 DDR_A_MA8 DDR_B_D39 AC7 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] AN10 DDR_B_MA7
DDR_A_D41 DDR0_DQ[40]/DDR1_DQ[8] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR_A_MA9 DDR_A_MA8 <14> DDR_B_D40 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR_B_MA8 DDR_B_MA7 <15>
V2 AT4 DDR_A_MA9 <14> W8 AN8 DDR_B_MA8 <15>
DDR_A_D42 U1 DDR0_DQ[41]/DDR1_DQ[9] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] AH2 DDR_A_MA10 DDR_B_D41 W7 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] AR11 DDR_B_MA9
DDR_A_D43 DDR0_DQ[42]/DDR1_DQ[10] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR_A_MA11 DDR_A_MA10 <14> DDR_B_D42 DDR1_DQ[41]/DDR1_DQ[25] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR_B_MA10 DDR_B_MA9 <15>
U2 AN2 DDR_A_MA11 <14> V10 AH7 DDR_B_MA10 <15>
DDR_A_D44 V1 DDR0_DQ[43]/DDR1_DQ[11] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] AU4 DDR_A_MA12 DDR_B_D43 V11 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AN11 DDR_B_MA11
DDR_A_D45 DDR0_DQ[44]/DDR1_DQ[12] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR_A_MA13 DDR_A_MA12 <14> DDR_B_D44 DDR1_DQ[43]/DDR1_DQ[27] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR_B_MA12 DDR_B_MA11 <15>
V4 AE3 DDR_A_MA13 <14> W11 AR10 DDR_B_MA12 <15>
DDR_A_D46 U5 DDR0_DQ[45]/DDR1_DQ[13] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] AU2 DDR_A_BG1 DDR_B_D45 W10 DDR1_DQ[44]/DDR1_DQ[28] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] AF9 DDR_B_MA13
DDR_A_D47 DDR0_DQ[46]/DDR1_DQ[14] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR_A_ACT# DDR_A_BG1 <14> DDR_B_D46 DDR1_DQ[45]/DDR1_DQ[29] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] DDR_B_BG1 DDR_B_MA13 <15>
U4 AU3 DDR_A_ACT# <14> V7 AR7 DDR_B_BG1 <15>
<14> DDR_A_D[48..63] DDR_A_D48 DDR0_DQ[47]/DDR1_DQ[15] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR_B_D47 DDR1_DQ[46]/DDR1_DQ[30] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR_B_ACT#
R2 V8 AT9 DDR_B_ACT# <15>
DDR_A_D49 DDR0_DQ[48]/DDR1_DQ[32] DDR_A_PARITY <15> DDR_B_D[48..63] DDR_B_D48 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
P5 AG3 DDR_A_PARITY <14> R11
DDR_A_D50 R4 DDR0_DQ[49]/DDR1_DQ[33] DDR0_PAR AU5 DDR_A_ALERT# DDR_B_D49 P11 DDR1_DQ[48] AJ7 DDR_B_PARITY
DDR_A_D51 DDR0_DQ[50]/DDR1_DQ[34] DDR0_ALERT# DDR_A_ALERT# <14> DDR_B_D50 DDR1_DQ[49] DDR1_PAR DDR_B_ALERT# DDR_B_PARITY <15>
P4 P7 AR8 DDR_B_ALERT# <15>
DDR_A_D52 R5 DDR0_DQ[51]/DDR1_DQ[35] DDR_B_D51 R8 DDR1_DQ[50] DDR1_ALERT#
DDR_A_D53 P2 DDR0_DQ[52]/DDR1_DQ[36] BR5 DDR_A_DQS#0 DDR_B_D52 R10 DDR1_DQ[51]
DDR_A_D54 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSN[0] DDR_A_DQS#1 DDR_A_DQS#0 <14> DDR_B_D53 DDR1_DQ[52] DDR_B_DQS#0
R1 BL3 DDR_A_DQS#1 <14> P10 BP9 DDR_B_DQS#0 <15>
DDR_A_D55 P1 DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQSN[1] BG3 DDR_A_DQS#2 DDR_B_D54 R7 DDR1_DQ[53] DDR1_DQSN[0]/DDR0_DQSN[2] BL9 DDR_B_DQS#1
DDR_A_D56 DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[2]/DDR0_DQSN[4] DDR_A_DQS#3 DDR_A_DQS#2 <14> DDR_B_D55 DDR1_DQ[54] DDR1_DQSN[1]/DDR0_DQSN[3] DDR_B_DQS#2 DDR_B_DQS#1 <15>
M4 BD3 DDR_A_DQS#3 <14> P8 BG9 DDR_B_DQS#2 <15>
DDR_A_D57 M1 DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSN[3]/DDR0_DQSN[5] AB3 DDR_A_DQS4 DDR_B_D56 L11 DDR1_DQ[55] DDR1_DQSN[2]/DDR0_DQSN[6] BC9 DDR_B_DQS#3
DDR_A_D58 DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSP[4]/DDR1_DQSP[0] DDR_A_DQS5 DDR_A_DQS4 <14> DDR_B_D57 DDR1_DQ[56] DDR1_DQSN[3]/DDR0_DQSN[7] DDR_B_DQS#4 DDR_B_DQS#3 <15>
L4 V3 DDR_A_DQS5 <14> M11 AC9 DDR_B_DQS#4 <15>
DDR_A_D59 L2 DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[5]/DDR1_DQSP[1] R3 DDR_A_DQS6 DDR_B_D58 L7 DDR1_DQ[57] DDR1_DQSN[4]/DDR1_DQSN[2] W9 DDR_B_DQS#5
DDR_A_D60 DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSP[6]/DDR1_DQSP[4] DDR_A_DQS7 DDR_A_DQS6 <14> DDR_B_D59 DDR1_DQ[58] DDR1_DQSN[5]/DDR1_DQSN[3] DDR_B_DQS#6 DDR_B_DQS#5 <15>
M5 M3 DDR_A_DQS7 <14> M8 R9 DDR_B_DQS#6 <15>
DDR_A_D61 M2 DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSP[7]/DDR1_DQSP[5] DDR_B_D60 L10 DDR1_DQ[59] DDR1_DQSN[6] M9 DDR_B_DQS#7
DDR_A_D62 DDR0_DQ[61]/DDR1_DQ[45] DDR_A_DQS0 DDR_B_D61 DDR1_DQ[60] DDR1_DQSN[7] DDR_B_DQS#7 <15>
L5 BP5 DDR_A_DQS0 <14> M10
DDR_A_D63 L1 DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQSP[0] BK3 DDR_A_DQS1 DDR_B_D62 M7 DDR1_DQ[61] BR9 DDR_B_DQS0
DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSP[1] DDR_A_DQS2 DDR_A_DQS1 <14> DDR_B_D63 DDR1_DQ[62] DDR1_DQSP[0]/DDR0_DQSP[2] DDR_B_DQS1 DDR_B_DQS0 <15>
BF3 DDR_A_DQS2 <14> L8 BJ9 DDR_B_DQS1 <15>
BA2 DDR0_DQSP[2]/DDR0_DQSP[4] BC3 DDR_A_DQS3 DDR1_DQ[63] DDR1_DQSP[1]/DDR0_DQSP[3] BF9 DDR_B_DQS2
DDR0_ECC[0] DDR0_DQSP[3]/DDR0_DQSP[5] DDR_A_DQS#4 DDR_A_DQS3 <14> DDR1_DQSP[2]/DDR0_DQSP[6] DDR_B_DQS3 DDR_B_DQS2 <15>
BA1 AA3 DDR_A_DQS#4 <14> AW11 BB9 DDR_B_DQS3 <15>
AY4 DDR0_ECC[1] DDR0_DQSN[4]/DDR1_DQSN[0] U3 DDR_A_DQS#5 AY11 DDR1_ECC[0] DDR1_DQSP[3]/DDR0_DQSP[7] AA9 DDR_B_DQS4
DDR0_ECC[2] DDR0_DQSN[5]/DDR1_DQSN[1] DDR_A_DQS#6 DDR_A_DQS#5 <14> DDR1_ECC[1] DDR1_DQSP[4]/DDR1_DQSP[2] DDR_B_DQS5 DDR_B_DQS4 <15>
AY5 P3 DDR_A_DQS#6 <14> AY8 V9 DDR_B_DQS5 <15>
BA5 DDR0_ECC[3] DDR0_DQSN[6]/DDR1_DQSN[4] L3 DDR_A_DQS#7 AW8 DDR1_ECC[2] DDR1_DQSP[5]/DDR1_DQSP[3] P9 DDR_B_DQS6
3 DDR_A_DQS#7 <14> DDR_B_DQS6 <15> 3
BA4 DDR0_ECC[4] DDR0_DQSN[7]/DDR1_DQSN[5] AY10 DDR1_ECC[3] DDR1_DQSP[6] L9 DDR_B_DQS7
DDR0_ECC[5] DDR1_ECC[4] DDR1_DQSP[7] DDR_B_DQS7 <15>
AY1 AY3 AW10
AY2 DDR0_ECC[6] DDR0_DQSP[8] BA3 AY7 DDR1_ECC[5] AW9
DDR0_ECC[7] DDR0_DQSN[8] AW7 DDR1_ECC[6] DDR1_DQSP[8] AY9
DDR1_ECC[7] DDR1_DQSN[8]

DDR CHANNEL B

DDR CHANNEL A
121_0402_1% 2 1 RC17 SM_RCOMP0 G1 BN13 +0.6V_VREFCA
SM_RCOMP1 H1 DDR_RCOMP[0] DDR_VREF_CA +0.6V_VREFCA
75_0402_1% 2 1 RC18 BP13
1 OF 14 100_0402_1% 2 1 RC19 SM_RCOMP2 J2 DDR_RCOMP[1] DDR0_VREF_DQ BR13 +0.6V_B_VREFDQ
DDR_RCOMP[2] 2 OF 14 DDR1_VREF_DQ +0.6V_B_VREFDQ
SKL-H_BGA1440
@ REV = 1 ? close to CPU SKL-H_BGA1440
@ REV = 1 ?

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

SKL-H(2/9)DDRIII
Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 7 of 61
A B C D E
A B C D E

1 1

UC1C SKYLAKE_HALO

BGA1440

CC6 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P15 E25 B25 PEG_HTX_GRX_P15 0.22U_0201_6.3V6K 2 1VGA@ CC7
<23> PEG_GTX_HRX_P15 PEG_GTX_C_HRX_N15 PEG_RXP[0] PEG_TXP[0] PEG_HTX_GRX_N15 0.22U_0201_6.3V6K PEG_HTX_C_GRX_P15 <23>
<23> PEG_GTX_HRX_N15 CC8 VGA@ 1 2 0.22U_0201_6.3V6K D25 A25 2 1VGA@ CC9
PEG_RXN[0] PEG_TXN[0] PEG_HTX_C_GRX_N15 <23>
CC10 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P14 E24 B24 PEG_HTX_GRX_P14 0.22U_0201_6.3V6K 2 1VGA@ CC11
<23> PEG_GTX_HRX_P14 PEG_GTX_C_HRX_N14 PEG_RXP[1] PEG_TXP[1] PEG_HTX_GRX_N14 0.22U_0201_6.3V6K PEG_HTX_C_GRX_P14 <23>
<23> PEG_GTX_HRX_N14 CC12 VGA@ 1 2 0.22U_0201_6.3V6K F24 C24 2 1VGA@ CC13
PEG_RXN[1] PEG_TXN[1] PEG_HTX_C_GRX_N14 <23>
CC14 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P13 E23 B23 PEG_HTX_GRX_P13 0.22U_0201_6.3V6K 2 1VGA@ CC1
<23> PEG_GTX_HRX_P13 PEG_GTX_C_HRX_N13 PEG_RXP[2] PEG_TXP[2] PEG_HTX_GRX_N13 0.22U_0201_6.3V6K PEG_HTX_C_GRX_P13 <23>
<23> PEG_GTX_HRX_N13 CC15 VGA@ 1 2 0.22U_0201_6.3V6K D23 A23 2 1VGA@ CC2
PEG_RXN[2] PEG_TXN[2] PEG_HTX_C_GRX_N13 <23>
CC3 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P12 E22 B22 PEG_HTX_GRX_P12 0.22U_0201_6.3V6K 2 1VGA@ CC16
<23> PEG_GTX_HRX_P12 PEG_GTX_C_HRX_N12 PEG_RXP[3] PEG_TXP[3] PEG_HTX_GRX_N12 0.22U_0201_6.3V6K PEG_HTX_C_GRX_P12 <23>
<23> PEG_GTX_HRX_N12 CC17 VGA@ 1 2 0.22U_0201_6.3V6K F22 C22 2 1VGA@ CC18
PEG_RXN[3] PEG_TXN[3] PEG_HTX_C_GRX_N12 <23>
CC19 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P11 E21 B21 PEG_HTX_GRX_P11 0.22U_0201_6.3V6K 2 1VGA@ CC20
<23> PEG_GTX_HRX_P11 PEG_GTX_C_HRX_N11 PEG_RXP[4] PEG_TXP[4] PEG_HTX_GRX_N11 0.22U_0201_6.3V6K PEG_HTX_C_GRX_P11 <23>
<23> PEG_GTX_HRX_N11 CC21 VGA@ 1 2 0.22U_0201_6.3V6K D21 A21 2 1VGA@ CC4
PEG_RXN[4] PEG_TXN[4] PEG_HTX_C_GRX_N11 <23>
CC5 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P10 E20 B20 PEG_HTX_GRX_P10 0.22U_0201_6.3V6K 2 1VGA@ CC22
<23> PEG_GTX_HRX_P10 PEG_GTX_C_HRX_N10 PEG_RXP[5] PEG_TXP[5] PEG_HTX_GRX_N10 0.22U_0201_6.3V6K PEG_HTX_C_GRX_P10 <23>
<23> PEG_GTX_HRX_N10 CC23 VGA@ 1 2 0.22U_0201_6.3V6K F20 C20 2 1VGA@ CC24
PEG_RXN[5] PEG_TXN[5] PEG_HTX_C_GRX_N10 <23>
CC25 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P9 E19 B19 PEG_HTX_GRX_P9 0.22U_0201_6.3V6K 2 1VGA@ CC26
<23> PEG_GTX_HRX_P9 PEG_GTX_C_HRX_N9 PEG_RXP[6] PEG_TXP[6] PEG_HTX_GRX_N9 PEG_HTX_C_GRX_P9 <23>
<23> PEG_GTX_HRX_N9 CC27 VGA@ 1 2 0.22U_0201_6.3V6K D19 A19 0.22U_0201_6.3V6K 2 1VGA@ CC28
PEG_RXN[6] PEG_TXN[6] PEG_HTX_C_GRX_N9 <23>
CC29 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P8 E18 B18 PEG_HTX_GRX_P8 0.22U_0201_6.3V6K 2 1VGA@ CC30
<23> PEG_GTX_HRX_P8 PEG_GTX_C_HRX_N8 PEG_RXP[7] PEG_TXP[7] PEG_HTX_GRX_N8 PEG_HTX_C_GRX_P8 <23>
<23> PEG_GTX_HRX_N8 CC31 VGA@ 1 2 0.22U_0201_6.3V6K F18 C18 0.22U_0201_6.3V6K 2 1VGA@ CC32
PEG_RXN[7] PEG_TXN[7] PEG_HTX_C_GRX_N8 <23>
2 2
CC33 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P7 D17 A17 PEG_HTX_GRX_P7 0.22U_0201_6.3V6K 2 1VGA@ CC34
<23> PEG_GTX_HRX_P7 PEG_GTX_C_HRX_N7 PEG_RXP[8] PEG_TXP[8] PEG_HTX_GRX_N7 PEG_HTX_C_GRX_P7 <23>
<23> PEG_GTX_HRX_N7 CC35 VGA@ 1 2 0.22U_0201_6.3V6K E17 B17 0.22U_0201_6.3V6K 2 1VGA@ CC36
PEG_RXN[8] PEG_TXN[8] PEG_HTX_C_GRX_N7 <23>
CC37 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P6 F16 C16 PEG_HTX_GRX_P6 0.22U_0201_6.3V6K 2 1VGA@ CC38
<23> PEG_GTX_HRX_P6 PEG_GTX_C_HRX_N6 PEG_RXP[9] PEG_TXP[9] PEG_HTX_GRX_N6 PEG_HTX_C_GRX_P6 <23>
<23> PEG_GTX_HRX_N6 CC39 VGA@ 1 2 0.22U_0201_6.3V6K E16 B16 0.22U_0201_6.3V6K 2 1VGA@ CC40
PEG_RXN[9] PEG_TXN[9] PEG_HTX_C_GRX_N6 <23>
CC41 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P5 D15 A15 PEG_HTX_GRX_P5 0.22U_0201_6.3V6K 2 1VGA@ CC42
<23> PEG_GTX_HRX_P5 PEG_GTX_C_HRX_N5 PEG_RXP[10] PEG_TXP[10] PEG_HTX_GRX_N5 PEG_HTX_C_GRX_P5 <23>
<23> PEG_GTX_HRX_N5 CC43 VGA@ 1 2 0.22U_0201_6.3V6K E15 B15 0.22U_0201_6.3V6K 2 1VGA@ CC44
PEG_RXN[10] PEG_TXN[10] PEG_HTX_C_GRX_N5 <23>
CC45 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P4 F14 C14 PEG_HTX_GRX_P4 0.22U_0201_6.3V6K 2 1VGA@ CC46
<23> PEG_GTX_HRX_P4 PEG_GTX_C_HRX_N4 PEG_RXP[11] PEG_TXP[11] PEG_HTX_GRX_N4 PEG_HTX_C_GRX_P4 <23>
<23> PEG_GTX_HRX_N4 CC47 VGA@ 1 2 0.22U_0201_6.3V6K E14 B14 0.22U_0201_6.3V6K 2 1VGA@ CC48
PEG_RXN[11] PEG_TXN[11] PEG_HTX_C_GRX_N4 <23>
CC49 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P3 D13 A13 PEG_HTX_GRX_P3 0.22U_0201_6.3V6K 2 1VGA@ CC50
<23> PEG_GTX_HRX_P3 PEG_GTX_C_HRX_N3 PEG_RXP[12] PEG_TXP[12] PEG_HTX_GRX_N3 PEG_HTX_C_GRX_P3 <23>
<23> PEG_GTX_HRX_N3 CC51 VGA@ 1 2 0.22U_0201_6.3V6K E13 B13 0.22U_0201_6.3V6K 2 1VGA@ CC52
PEG_RXN[12] PEG_TXN[12] PEG_HTX_C_GRX_N3 <23>
CC53 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P2 F12 C12 PEG_HTX_GRX_P2 0.22U_0201_6.3V6K 2 1VGA@ CC54
<23> PEG_GTX_HRX_P2 PEG_GTX_C_HRX_N2 PEG_RXP[13] PEG_TXP[13] PEG_HTX_GRX_N2 PEG_HTX_C_GRX_P2 <23>
<23> PEG_GTX_HRX_N2 CC55 VGA@ 1 2 0.22U_0201_6.3V6K E12 B12 0.22U_0201_6.3V6K 2 1VGA@ CC56
PEG_RXN[13] PEG_TXN[13] PEG_HTX_C_GRX_N2 <23>
CC57 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P1 D11 A11 PEG_HTX_GRX_P1 0.22U_0201_6.3V6K 2 1VGA@ CC58
<23> PEG_GTX_HRX_P1 PEG_GTX_C_HRX_N1 PEG_RXP[14] PEG_TXP[14] PEG_HTX_GRX_N1 PEG_HTX_C_GRX_P1 <23>
<23> PEG_GTX_HRX_N1 CC59 VGA@ 1 2 0.22U_0201_6.3V6K E11 B11 0.22U_0201_6.3V6K 2 1VGA@ CC60
PEG_RXN[14] PEG_TXN[14] PEG_HTX_C_GRX_N1 <23>
CC61 VGA@ 1 2 0.22U_0201_6.3V6K PEG_GTX_C_HRX_P0 F10 C10 PEG_HTX_GRX_P0 0.22U_0201_6.3V6K 2 1VGA@ CC62
<23> PEG_GTX_HRX_P0 PEG_GTX_C_HRX_N0 PEG_RXP[15] PEG_TXP[15] PEG_HTX_GRX_N0 PEG_HTX_C_GRX_P0 <23>
<23> PEG_GTX_HRX_N0 CC63 VGA@ 1 2 0.22U_0201_6.3V6K E10 B10 0.22U_0201_6.3V6K 2 1VGA@ CC64
PEG_RXN[15] PEG_TXN[15] PEG_HTX_C_GRX_N0 <23>

1 2 PEG_RCOMP G2
+1.0VS_VCCIO PEG_RCOMP
CAD note: RC20 24.9_0402_1%
Trace width=12 mils,Spacing=15mil,Max length=400mils
3 3
DMI_CRX_PTX_P0 D8 B8 DMI_CTX_PRX_P0
<16> DMI_CRX_PTX_P0 DMI_CRX_PTX_N0 DMI_RXP[0] DMI_TXP[0] DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 <16>
<16> DMI_CRX_PTX_N0 E8 A8 DMI_CTX_PRX_N0 <16>
DMI_RXN[0] DMI_TXN[0]
DMI_CRX_PTX_P1 E6 C6 DMI_CTX_PRX_P1
<16> DMI_CRX_PTX_P1 DMI_CRX_PTX_N1 DMI_RXP[1] DMI_TXP[1] DMI_CTX_PRX_N1 DMI_CTX_PRX_P1 <16>
<16> DMI_CRX_PTX_N1 F6 B6 DMI_CTX_PRX_N1 <16>
DMI_RXN[1] DMI_TXN[1]
DMI_CRX_PTX_P2 D5 B5 DMI_CTX_PRX_P2
<16> DMI_CRX_PTX_P2 DMI_CRX_PTX_N2 DMI_RXP[2] DMI_TXP[2] DMI_CTX_PRX_N2 DMI_CTX_PRX_P2 <16>
<16> DMI_CRX_PTX_N2 E5 A5 DMI_CTX_PRX_N2 <16>
DMI_RXN[2] DMI_TXN[2]
DMI_CRX_PTX_P3 J8 D4 DMI_CTX_PRX_P3
<16> DMI_CRX_PTX_P3 DMI_CRX_PTX_N3 DMI_RXP[3] DMI_TXP[3] DMI_CTX_PRX_N3 DMI_CTX_PRX_P3 <16>
<16> DMI_CRX_PTX_N3 J9 B4 DMI_CTX_PRX_N3 <16>
DMI_RXN[3] DMI_TXN[3]

3 OF 14
SKL-H_BGA1440
@ REV = 1
?

4 4

Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
SKL-H(3/9) PEG,DMI
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 8 of 61
A B C D E
A B C D E

UC1E SKYLAKE_HALO Reference SKL EDS 0.85 Table 6-8


CPU_BCLK B31
BGA1440
BN25 CFG0 @
CFG signals internal PH default value = 1
<19> CPU_BCLK CPU_BCLK# BCLKP CFG[0]
<19> CPU_BCLK# A32 BN27
BCLKN CFG[1] BN26 CFG2 PAD T36
CPU_PCIBCLK D35 CFG[2] BN28
Description
<19> CPU_PCIBCLK CPU_PCIBCLK# C36 PCI_BCLKP CFG[3]
<19> CPU_PCIBCLK# BR20 CFG4
PCI_BCLKN CFG[4] BM20 CFG5
CPU_24M CFG[5] Stall reset sequence after PCU PLL
E31 BT20
<19> CPU_24M CPU_24M# D31 CLK24P CFG[6] BP20 CFG7 @
lock until de-asserted
<19> CPU_24M# CLK24N CFG[7] CFG[0] — 1 = (Default) Normal Operation;
BR23
1 CFG[8] BR22 PAD T37
* No stall.
1
CFG[9] BT23
CFG[10] BT22
— 0 = Stall.
CFG[11] BM19
CFG[12] BR19
CFG[13] BP19
Enable eDP
CPU_SVID_ALERT# CFG[14] CFG[4] — 1 = Disabled.
BH31 BT19
CPU_SVID_CLK BH32 VIDALERT# CFG[15]
<52> CPU_SVID_CLK CPU_SVID_DAT BH29 VIDSCK
VIDSOUT CFG[17]
BN23 * — 0 = Enabled.
H_PROCHOT#_R BR30 BP23
PROCHOT# CFG[16] BP22
DDR_PG_CTRL CFG[19] PEG Training:
BT13 BN22
DDR_VTT_CNTL CFG[18] * — 1 = (default) PEG Train immediately
H_PECI
CFG[7] following RESET# de assertion.
BR27
BPM#[0]
BPM#[1]
BT27 — 0 = PEG Wait for BIOS for training
2 BM31
EC_VCCST_PG H13 BPM#[2] BT30
VCCST_PWRGD BPM#[3] CFG[1]
CH65
H_CPUPW RGD BT31
1
.1U_0402_16V7K <18> H_CPUPW RGD PLTRST_CPU# PROCPWRGD CPU_XDP_TDO
CFG[3] Reserved configuration lane.
<17> PLTRST_CPU# BP35 BT28
H_PM_SYNC RESET# PROC_TDO CPU_XDP_TDI CPU_XDP_TDO <6,18>
XEMC@ BM34 BL32 CFG[8:19]
<17> H_PM_SYNC PM_DOW N PM_SYNC PROC_TDI CPU_XDP_TMS CPU_XDP_TDI <6,18>
BP31 BP28
H_PECI PM_DOWN PROC_TMS CPU_XDP_TCK0 CPU_XDP_TMS <6,18>
<17,39> H_PECI BT34 BR28
PECI PROC_TCK CPU_XDP_TCK0 <6,18>
THERMTRIP# J31
<17> THERMTRIP# THERMTRIP# BP30
H_SKTOCC# RC21 1 @ 2 0_0402_5% H_SKTOCC#_R BR33 PROC_TRST# BL30
<18> H_SKTOCC#
1 2 SKL_CNL_N BN1 SKTOCC# PROC_PREQ# BP27 CFG4 1 2
PCIE Config. Signals
RC22 @ 0_0402_5% PROC_SELECT# PROC_PRDY# RC23 1K_0402_1% pore
FLOAT FOR SKL @ H_CATERR# BM30
2
GND FOR CNL CATERR# BT25 CFG_RCOMP 1 2 CFG5 1 2
assign CFG[6] CFG[5] CFG[2] 2

T3 PAD CFG_RCOMP RC24 49.9_0402_1% RC25 @ 1K_0402_1%

5 OF 14 CFG2 1 2
1 x 16 1 1 1
RC26 1K_0402_1% 1 x 16 *
SKL-H_BGA1440 1 1 0
@ REV = 1 ? reverse
2 x 8 1 0 1
+1.0V_VCCST 2 x 8
+1.0V_VCCST reverse 1 0 0
ESD Reserve ,pleace close to cpu
1 x 8
+ 2 x 4 0 0 1
1

RC27 1 2 THERMTRIP# 1x8+2x4


1K_0402_5% RC28 1K_0402_5% 0 0 0
H_CPUPW RGD 1 2 XEMC@ reverse
From EC OD output CH1 .1U_0402_16V7K
2

1 2 EC_VCCST_PG
<39,43> EC_VCCST_PG_R H_PROCHOT#_R 1
RC29 60.4_0402_1% 2 XEMC@
CH2 .1U_0402_16V7K
+1.0VS_VCCSTG
THERMTRIP# 1 2 XEMC@
CH3 .1U_0402_16V7K

1
2 1 PM_DOW N RC31
<17> PM_DOW N_R
3 RC30 20_0402_1% From EC(open-drain) 1K_0402_5% 3

1 @ 2
2

RC32 1K_0402_5% RC33 1 2 499_0402_1% H_PROCHOT#_R


<39,46> H_PROCHOT#

DDR_VTT_CNTL to DDR +1.2V_VDDQ


VTT supplied ramped
<35uS +3VS
SVID ALERT (tCPU18)
Place the PU
1 2 Follow PDG1.0 .1U_0402_16V7K 2 1 CC65
+1.0V_VCCST resistors close to CPU

1
RC34 56_0402_5% Table 12-16 CRB 330K
UC2
1 5 RC35
NC VCC 220K_0402_5%
DDR_PG_CTRL 2

2
CPU_SVID_ALERT# 1 2 A 4
CPU_SVID_ALERT#_R <52> (To VR) Y SM_PG_CTRL <48>
RC36 220_0402_5% 3
GND

2
74AUP1G07GW _TSSOP5
RC37
@ 2M_0402_5%
4
SVID DATA 4

1
Place the PU
1 2
+1.0V_VCCST
RC38 100_0402_1%
resistors close to CPU
Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
CPU_SVID_DAT Issued Date Deciphered Date
CPU_SVID_DAT <52> (To VR) SKL-H(4/9)CLK,GPIO
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 9 of 61
A B C D E
A B C D E

1 1
EDS:Rail is unconnected for Processors without GT3/4.
+VCC_GT
SKYLAKE_HALO
UC1N
BGA1440
AJ29
+VCC_CORE +VCC_CORE AJ30 VCCGT
AJ31 VCCGT AF29
UC1G SKYLAKE_HALO AJ32 VCCGT VCCGTX AF30
AJ33 VCCGT VCCGTX AF31
BGA1440 +VCC_GT +VCC_GT AJ34 VCCGT VCCGTX AF32
H-4+2/68A VCCGT VCCGTX
AA13 V32 AJ35 AF33
AA31 VCC VCC V33 Rev_0.53 AJ36 VCCGT VCCGTX AF34
AA32 VCC VCC V34 UC1H SKYLAKE_HALO AK31 VCCGT VCCGTX AG13
VCC VCC
H-4+2/55A VCCGT VCCGTX
AA33 V35 AK32 AG14
AA34 VCC VCC V36 BG34 BGA1440 AV29 AK33 VCCGT VCCGTX AG31
AA35 VCC VCC V37 BG35 VCCGT VCCGT AV30 AK34 VCCGT VCCGTX AG32
AA36 VCC VCC V38 BG36 VCCGT VCCGT AV31 AK35 VCCGT VCCGTX AG33
AA37 VCC VCC W13 BH33 VCCGT VCCGT AV32 AK36 VCCGT VCCGTX AG34
AA38 VCC VCC W14 BH34 VCCGT VCCGT AV33 AK37 VCCGT VCCGTX AG35
AB29 VCC VCC W29 BH35 VCCGT VCCGT AV34 AK38 VCCGT VCCGTX AG36
AB30 VCC VCC W30 BH36 VCCGT VCCGT AV35 AL13 VCCGT VCCGTX AH13
AB31 VCC VCC W31 BH37 VCCGT VCCGT AV36 AL29 VCCGT VCCGTX AH14
AB32 VCC VCC W32 BH38 VCCGT VCCGT AW14 AL30 VCCGT VCCGTX AH29
AB35 VCC VCC W35 BJ37 VCCGT VCCGT AW31 AL31 VCCGT VCCGTX AH30
AB36 VCC VCC W36 BJ38 VCCGT VCCGT AW32 AL32 VCCGT VCCGTX AH31
AB37 VCC VCC W37 BL36 VCCGT VCCGT AW33 AL35 VCCGT VCCGTX AH32
AB38 VCC VCC W38 BL37 VCCGT VCCGT AW34 AL36 VCCGT VCCGTX AJ13
AC13 VCC VCC Y29 BM36 VCCGT VCCGT AW35 AL37 VCCGT VCCGTX AJ14
2 VCC VCC VCCGT VCCGT VCCGT VCCGTX 2
AC14 Y30 BM37 AW36 AL38
AC29 VCC VCC Y31 BN36 VCCGT VCCGT AW37 AM13 VCCGT
AC30 VCC VCC Y32 BN37 VCCGT VCCGT AW38 AM14 VCCGT
AC31 VCC VCC Y33 BN38 VCCGT VCCGT AY29 AM29 VCCGT
AC32 VCC VCC Y34 BP37 VCCGT VCCGT AY30 AM30 VCCGT
AC33 VCC VCC Y35 BP38 VCCGT VCCGT AY31 AM31 VCCGT
AC34 VCC VCC Y36 BR37 VCCGT VCCGT AY32 AM32 VCCGT
AC35 VCC VCC L14 BT37 VCCGT VCCGT AY35 AM33 VCCGT
AC36 VCC VCC P29 BE38 VCCGT VCCGT AY36 AM34 VCCGT
AD13 VCC VCC P30 BF13 VCCGT VCCGT AY37 AM35 VCCGT
AD14 VCC VCC P31 BF14 VCCGT VCCGT AY38 AM36 VCCGT
AD31 VCC VCC P32 BF29 VCCGT VCCGT BA13 AN13 VCCGT
AD32 VCC VCC P33 BF30 VCCGT VCCGT BA14 AN14 VCCGT
AD33 VCC VCC P34 BF31 VCCGT VCCGT BA29 AN31 VCCGT
AD34 VCC VCC P35 BF32 VCCGT VCCGT BA30 AN32 VCCGT
AD35 VCC VCC P36 BF35 VCCGT VCCGT BA31 AN33 VCCGT
AD36 VCC VCC R13 BF36 VCCGT VCCGT BA32 AN34 VCCGT
AD37 VCC VCC R31 BF37 VCCGT VCCGT BA33 AN35 VCCGT
AD38 VCC VCC R32 BF38 VCCGT VCCGT BA34 AN36 VCCGT
AE13 VCC VCC R33 BG29 VCCGT VCCGT BA35 AN37 VCCGT
AE14 VCC VCC R34 BG30 VCCGT VCCGT BA36 AN38 VCCGT
AE30 VCC VCC R35 BG31 VCCGT VCCGT BB13 AP13 VCCGT
AE31 VCC VCC R36 BG32 VCCGT VCCGT BB14 AP14 VCCGT
AE32 VCC VCC R37 BG33 VCCGT VCCGT BB31 AP29 VCCGT
AE35 VCC VCC R38 BC36 VCCGT VCCGT BB32 AP30 VCCGT
AE36 VCC VCC T29 BC37 VCCGT VCCGT BB33 AP31 VCCGT
AE37 VCC VCC T30 BC38 VCCGT VCCGT BB34 AP32 VCCGT
AE38 VCC VCC T31 BD13 VCCGT VCCGT BB35 AP35 VCCGT
AF35 VCC VCC T32 BD14 VCCGT VCCGT BB36 AP36 VCCGT
3 VCC VCC VCCGT VCCGT VCCGT 3
AF36 T35 BD29 BB37 AP37
AF37 VCC VCC T36 BD30 VCCGT VCCGT BB38 AP38 VCCGT
AF38 VCC VCC T37 BD31 VCCGT VCCGT BC29 AR29 VCCGT
K13 VCC VCC T38 BD32 VCCGT VCCGT BC30 AR30 VCCGT
K14 VCC VCC U29 BD33 VCCGT VCCGT BC31 AR31 VCCGT
L13 VCC VCC U30 BD34 VCCGT VCCGT BC32 AR32 VCCGT
N13 VCC VCC U31 BD35 VCCGT VCCGT BC35 AR33 VCCGT AH38 VCCGT_SENSE
VCC VCC VCCGT VCCGT VCCGT VCCGT_SENSE VCCGT_SENSE <52>
N14 U32 BD36 BE33 AR34 AH35
N30 VCC VCC U33 BE31 VCCGT VCCGT BE34 AR35 VCCGT VSSGTX_SENSE AH37 VSSGT_SENSE
VCC VCC VCCGT VCCGT VCCGT VSSGT_SENSE VSSGT_SENSE <52>
N31 U34 BE32 BE35 AR36 AH36
N32 VCC VCC U35 BE37 VCCGT VCCGT BE36 AT14 VCCGT VCCGTX_SENSE
N35 VCC VCC U36 VCCGT VCCGT AT31 VCCGT
N36 VCC VCC V13 AT32 VCCGT
VCC VCC VCCGT
Trace Length < 25 mils
N37 V14 8 OF 14
AT33
N38 VCC VCC V31 AT34 VCCGT
VCC VCC SKL-H_BGA1440 VCCGT
P13 P14 ?
AT35
VCC VCC @ REV = 1 AT36 VCCGT
AT37 VCCGT
Trace Length < 25 mils VCCGT
AT38
AG37 AU14 VCCGT
VCC_SENSE VCCSENSE <52> VCCGT
AG38 AU29
VSS_SENSE VSSSENSE <52> VCCGT
AU30
AU31 VCCGT
PH/PL on pwr side VCCGT
7 OF 14 AU32
10/07 Dan VCCGT
AU35
SKL-H_BGA1440 AU36 VCCGT
@ REV = 1 ? AU37 VCCGT
Change to 14/14 AU38 VCCGT 14 OF 14
Loss 13 of 14 VCCGT
4 4

SKL-H_BGA1440 @
?
REV = 1

Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
SKL-H(5/9)Power,SVID
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 10 of 61
A B C D E
A B C D E

+1.2V_VDDQ_CPU
+1.0V_VCCST +1.0V_VCCSFR

For Power consumption+1.2V_VDDQ


RC39 1 @ 2 0_0402_5% CC66 1 2 1U_0402_6.3V6K DDR4/2.8A Measurement
UC1I SKYLAKE_HALO
RVP11 47u*1,10u*7,1u*3 JPC1
1 CAP place on PWR side. BGA1440 1
+VCC_SA J30 AA6 2 1
K29 VCCSA VDDQ AE12
K30 VCCSA VDDQ AF5 @
K31 VCCSA VDDQ AF6 JUMP_43X118
H-4+2/11.1A VCCSA VDDQ
+1.0VS_VCCSTG +1.0V_VCCST K32 AG5
VCCSA VDDQ JPC2
(1.0VS) K33 AG9
K34 VCCSA VDDQ AJ12 2 1
K35 VCCSA VDDQ AL11
L31 VCCSA VDDQ AP6 @
L32 VCCSA VDDQ AP7 JUMP_43X118
VCCSA VDDQ
1U_0402_6.3V6K

1U_0402_6.3V6K
1 1 L35 AR12
L36 VCCSA VDDQ AR6
1 VCCSA VDDQ
CC68

CC69
L37 AT12
CC67 L38 VCCSA VDDQ AW6
2 2 M29 VCCSA VDDQ AY6
1U_0402_6.3V6K VCCSA VDDQ
2 M30 J5
M31 VCCSA VDDQ J6
M32 VCCSA VDDQ K12
Place at Back Side VCCSA VDDQ
M33 K6
M34 VCCSA VDDQ L12
M35 VCCSA VDDQ L6
M36 VCCSA VDDQ R6
VCCSA VDDQ T6
VDDQ W6
AG12 VDDQ
RVP11 +1.0VS_VCCIO VCCIO
PWR NEED PROVIDE G15 Y12 +VDDQ_CLK
G17 VCCIO VDDQC
+VDDQ_CLK
0.95V FOR VCCIO VCCIO
+1.2V_VDDQ_CPU PVT modify G19 BH13 +VCCSFR_OC_1
G21 VCCIO VCCPLL_OC G11
2 H /5.5A VCCIO VCCPLL_OC +VCCSFR_OC_2 130mA 2
RC40 BSC Side H15
1 @ 2 H16 VCCIO
VCCIO
10U_0603_6.3V6M

1 H17 H30 +1.0V_VCCST


0_0603_5% H19 VCCIO VCCST
VCCIO
CC70

H20 H29 20mA +1.0VS_VCCSTG


H21 VCCIO VCCSTG
2 H26 VCCIO G30
H27 VCCIO VCCSTG
Place at Back Side VCCIO
J15 H28 150mA +1.0V_VCCSFR
J16 VCCIO VCCPLL J28
J17 VCCIO VCCPLL
J19 VCCIO
J20 VCCIO M38 VCCSA_SENSE
(1.35V) VCCIO VCCSA_SENSE VSSSA_SENSE VCCSA_SENSE <52>
J21 M37
+1.2V_VDDQ +VCCSFR_OC_1 +VCCSFR_OC_2 VCCIO VSSSA_SENSE VSSSA_SENSE <52>
J26
J27 VCCIO H14 VCCIO_SENSE
VCCIO VCCIO_SENSE VSSIO_SENSE VCCIO_SENSE <51>
J14
VSSIO_SENSE VSSIO_SENSE <51>
1 @ 2
RC41 0_0402_5%
1 @ 2
RC42 0_0402_5%
1U_0402_6.3V6K

1U_0402_6.3V6K

1 1
CC71

CC72

9 OF 14
NOTE:
2 2 SKL-H_BGA1440
VCCPLL_OC is allowed to be turned off
during S3 & DS3 if it is not powered @ REV = 1 ?
directly from VDDQ
3 3

Place at Back Side

+1.2V_VDDQ_CPU +1.0VS_VCCIO
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CC83

CC84

CC85

CC86

CC90

CC87

CC88

CC93
CC73

CC74

CC75

CC76

CC77

CC78

CC79

CC80

CC81

CC82

CC91

CC92

CC89
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

Place at Back Side Place at Back Side Follow ORB 3/20


+1.2V_VDDQ_CPU : 10UF/6.3V/0603 *10
22UF/6.3V/0603 * 4
4
update CRB cap QTY 4

CPU_CORE/VCCGT/VCCSA decoupling capacitor place to PWR side


Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
SKL-H(6/9)POWER
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 11 of 61
A B C D E
A B C D E

SKYLAKE_HALO
UC1F SKYLAKE_HALO UC1M SKYLAKE_HALO UC1L UC1J SKYLAKE_HALO

BGA1440 BGA1440 BGA1440 BGA1440


Y38 K1 BB4 AK30 C17 C25
Y37 VSS VSS J36 BB3 VSS VSS AK29 C13 VSS VSS C23 BJ17
Y14 VSS VSS J33 BB2 VSS VSS AK4 C9 VSS VSS C21 BJ19 VCCOPC
Y13 VSS VSS J32 BB1 VSS VSS AJ38 BT32 VSS VSS C19 BJ20 VCCOPC
1 VSS VSS VSS VSS VSS VSS VCCOPC 1
Y11 J25 BA38 AJ37 BT26 C15 BK17
Y10 VSS VSS J22 BA37 VSS VSS AJ6 BT24 VSS VSS C11 BK19 VCCOPC
Y9 VSS VSS J18 BA12 VSS VSS AJ5 BT21 VSS VSS C8 BK20 VCCOPC
Y8 VSS VSS J10 BA11 VSS VSS AJ4 BT18 VSS VSS C5 BL16 VCCOPC
Y7 VSS VSS J7 BA10 VSS VSS AJ3 BT14 VSS VSS BM29 BL17 VCCOPC
W34 VSS
VSS
VSS
VSS
J4 BA9 VSS
VSS
VSS
VSS
AJ2 BT12 VSS
VSS
VSS
VSS
BM25 EDRAM BL18 VCCOPC
VCCOPC
W33 H35 BA8 AJ1 BT9 BM18 BL19
W12 VSS VSS H32 BA7 VSS VSS AH34 BT5 VSS VSS BM11 BL20 VCCOPC
W5 VSS VSS H25 BA6 VSS VSS AH33 BR36 VSS VSS BM8 BL21 VCCOPC
W4 VSS VSS H22 B9 VSS VSS AH12 BR34 VSS VSS BM7 BM17 VCCOPC
W3 VSS VSS H18 AY34 VSS VSS AH6 BR29 VSS VSS BM5 BN17 VCCOPC
W2 VSS VSS H12 AY33 VSS VSS AG30 BR26 VSS VSS BM3 VCCOPC
W1 VSS VSS H11 AY14 VSS VSS AG29 BR24 VSS VSS BL38 BJ23
V30 VSS VSS G28 AY12 VSS VSS AG11 BR21 VSS VSS BL35 BJ26 RSVD
V29 VSS VSS G26 AW30 VSS VSS AG10 BR18 VSS VSS BL13 BJ27 RSVD
V12 VSS VSS G24 AW29 VSS VSS AG8 BR14 VSS VSS BL6 BK23 RSVD
V6 VSS VSS G23 AW12 VSS VSS AG7 BR12 VSS VSS BK25 BK26 RSVD
U38 VSS VSS G22 AW5 VSS VSS AG6 BR7 VSS VSS BK22 BK27 RSVD
U37 VSS
VSS
VSS
VSS
G20 AW4 VSS
VSS
VSS
VSS
AF14 BP34 VSS
VSS
VSS
VSS
BK13 CRB EDRAM BL23 RSVD
RSVD
U6 G18 AW3 AF13 BP33 BK6 BL24
T34 VSS VSS G16 AW2 VSS VSS AF12 BP29 VSS VSS BJ30 BL25 RSVD
T33 VSS VSS G14 AW1 VSS VSS AF4 BP26 VSS VSS BJ29 BL26 RSVD
T14 VSS VSS G12 AV38 VSS VSS AF3 BP24 VSS VSS BJ15 BL27 RSVD
T13 VSS VSS G10 AV37 VSS VSS AF2 BP21 VSS VSS BJ12 BL28 RSVD
T12 VSS VSS G9 AU34 VSS VSS AF1 BP18 VSS VSS BH11 BM24 RSVD
T11 VSS VSS G8 AU33 VSS VSS AE34 BP14 VSS VSS BH10 RSVD
T10 VSS VSS G6 AU12 VSS VSS AE33 BP12 VSS VSS BH7
T9 VSS VSS G5 AU11 VSS VSS AE6 BP7 VSS VSS BH6 BL15
T8 VSS VSS G4 AU10 VSS VSS AD30 BN34 VSS VSS BH3 BM16 VCCOPC_SENSE
2 VSS VSS VSS VSS VSS VSS VSSOPC_SENSE 2
T7 F36 AU9 AD29 BN31 BH2
T5 VSS VSS F31 AU8 VSS VSS AD12 BN30 VSS VSS BG37 BL22
T4 VSS VSS F29 AU7 VSS VSS AD11 BN29 VSS VSS BG14 BM22 RSVD
T3 VSS VSS F27 AU6 VSS VSS AD10 BN24 VSS VSS BG6 RSVD
T2 VSS VSS F25 AT30 VSS VSS AD9 BN21 VSS VSS BF34
T1 VSS VSS F23 AT29 VSS VSS AD8 BN20 VSS VSS BF6 BP15
R30 VSS VSS F21 AT6 VSS VSS AD7 BN19 VSS VSS BE30 BR15 VCCEOPIO
R29 VSS VSS F19 AR38 VSS VSS AD6 BN18 VSS VSS BE5 BT15 VCCEOPIO
R12 VSS VSS F17 AR37 VSS VSS AC38 BN14 VSS VSS BE4 VCCEOPIO
P38 VSS VSS F15 AR14 VSS VSS AC37 BN12 VSS VSS BE3 BP16
P37 VSS VSS F13 AR13 VSS VSS AC12 BN9 VSS VSS BE2 BR16 RSVD
P12 VSS VSS F11 AR5 VSS VSS AC6 BN7 VSS VSS BE1 BT16 RSVD
P6 VSS VSS F9 AR4 VSS VSS AC5 BN4 VSS VSS BD38 RSVD
N34 VSS VSS F8 AR3 VSS VSS AC4 BN2 VSS VSS BD37
N33 VSS VSS F5 AR2 VSS VSS AC3 BM38 VSS VSS BD12 BN15
N12 VSS VSS F4 AR1 VSS VSS AC2 BM35 VSS VSS BD11 BM15 VCCEOPIO_SENSE
N11 VSS VSS F3 AP34 VSS VSS AC1 BM28 VSS VSS BD10 VSSEOPIO_SENSE
N10 VSS VSS F2 AP33 VSS VSS AB34 BM27 VSS VSS BD8 BP17
N9 VSS VSS E38 AP12 VSS VSS AB33 BM26 VSS VSS BD7 BN16 RSVD
N8 VSS VSS E35 AP11 VSS VSS AB6 BM23 VSS VSS BD6 RSVD
N7 VSS VSS E34 AP10 VSS VSS AA30 BM21 VSS VSS BC33
N6 VSS VSS E9 AP9 VSS VSS AA29 BM13 VSS VSS BC14 BM14
N5 VSS VSS E4 AP8 VSS VSS AA12 BM12 VSS VSS BC13 BL14 VCC_OPC_1P8
N4 VSS VSS D33 AN30 VSS VSS A30 BM9 VSS VSS BC6 VCC_OPC_1P8
N3 VSS VSS D30 AN29 VSS VSS A28 BM6 VSS VSS BB30 BJ35
N2 VSS VSS D28 AN12 VSS VSS A26 BM2 VSS VSS BB29 BJ36 RSVD
N1 VSS VSS D26 AN6 VSS VSS A24 BL29 VSS VSS BB6 RSVD
M14 VSS VSS D24 AN5 VSS VSS A22 BK29 VSS VSS BB5
M13 VSS VSS D22 AM38 VSS VSS A20 BK15 VSS VSS AT13
3 VSS VSS VSS VSS VSS ZVM# 3
M12 D20 AM37 A18 BK14 AW13
M6 VSS VSS D18 AM12 VSS VSS A16 BJ32 VSS MSM#
L34 VSS VSS D16 AM5 VSS VSS A14 BJ31 VSS AU13
L33 VSS VSS D14 AM4 VSS VSS A12 BJ25 VSS AY13 ZVM2#
L30 VSS VSS D12 AM3 VSS VSS A10 BJ22 VSS MSM2#
L29 VSS VSS D10 AM2 VSS VSS A9 BH14 VSS OPC_RCOMP BT29
VSS VSS VSS VSS VSS T4 @ OPCE_RCOMP OPC_RCOMP
K38 D9 AM1 A6 BH12 C2 T5 @ BR25
K11 VSS VSS D6 AL34 VSS VSS BH9 VSS NCTFVSS BT36 OPCE_RCOMP2 BP25 OPCE_RCOMP
VSS VSS VSS VSS NCTFVSS T6 @ OPCE_RCOMP2
K10 D3 AL33 BH8 BT35
K9 VSS VSS C37 AL14 VSS B37 BH5 VSS NCTFVSS BT4 10 OF 14
K8 VSS VSS C31 AL12 VSS NCTFVSS B3 BH4 VSS NCTFVSS BT3
K7 VSS VSS C29 AL10 VSS NCTFVSS A34 BH1 VSS NCTFVSS BR38 SKL-H_BGA1440
K5 VSS VSS C27 AL9 VSS NCTFVSS A4 BG38 VSS NCTFVSS @ REV = 1
VSS VSS VSS NCTFVSS VSS ?
K4 AL8 A3 BG13
K3 VSS D38 AL7 VSS NCTFVSS BG12 VSS
K2 VSS NCTFVSS AL4 VSS BF33 VSS
VSS 6 OF 14 VSS BF12 VSS
13 OF 14 BE29 VSS
SKL-H_BGA1440 BE6 VSS
@ REV = 1 ? SKL-H_BGA1440 BD9 VSS
@ REV = 1 ? BC34 VSS
BC12 VSS
BB12 VSS
VSS 12 OF 14

SKL-H_BGA1440
@ REV = 1 ?

4 4

Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
SKL-H(8/9)GND
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 12 of 61
A B C D E
A B C D E

1 1

Rev_0.53
UC1K SKYLAKE_HALO

BGA1440

D1 BM33 +1.0VALW
E1 RSVD_TP RSVD_TP BL33
E3 RSVD_TP RSVD_TP
RSVD_TP +5VALW
+1.0VALW TO +1.0V_VCCST

1U_0402_6.3V6K

1U_0402_6.3V6K
E2 BJ14 1 1
RSVD_TP RSVD_TP

CC98

CC94
BJ13
BR1 RSVD_TP
BT2 RSVD_TP BK28
RSVD_TP RSVD BJ28 2 2
BN35 RSVD +1.0V_VCCST
RSVD BJ18
VSS UC3 JC1
J24
H24 RSVD BJ16 CC95 2 1 1U_0402_6.3V6K 1 6 +1.0V_VCCST_L 1 2
BN33 RSVD RSVD_TP BK16 @ 2 IN OUT 1 2
BL34 RSVD RSVD_TP 3 IN 7 +1.0VALW
RSVD VBIAS VCC_PAD JUMP_43X79 1
RC43 1 @ 2 0_0402_5% EN_1.0V_VCCSTU 4 5
<39,43,48,50> SYSON ON GND @
N29 BK24 CC96
R14 RSVD RSVD_TP BJ24 PVT modify
RSVD RSVD_TP AOZ1334DI-01_DFN8-7_3X3 .1U_0402_16V7K
AE29 2
AA14 RSVD BK21
2 RSVD RSVD 2
BJ21
A36 RSVD
A37 RSVD BT17 +1.0V_VCCST: 60mA
RSVD RSVD
PROC_TRIGIN_R H23 RSVD
BR17 R ON = 4.5mΩ
<22>
<22>
PROC_TRIGIN_R
PROC_TRIGOUT_R
1 2 PROC_TRIGOUT J23 PROC_TRIGIN BK18 VDROP= 1.32mV
PROC_TRIGOUT VSS
RC44 30_0402_1%
F30 BJ34
Delay time: 270us
E30 RSVD RSVD_TP BJ33
RSVD RSVD_TP
B30
C30 RSVD
RSVD G13
G3 RSVD AJ8
J3 RSVD RSVD BL31 +5VALW +1.0VALW
RSVD RSVD
B2 NCTF_0
+1.0VALW TO +1.0VS_VCCSTG
NCTF NCTF_1 @ T7 PAD
B38 @ T8 PAD
NCTF NCTF_2

1U_0402_6.3V6K
BP1 @ T9 PAD 1 1
NCTF NCTF_3

CC100
BR35 BR2 @ T10 PAD
BR31 RSVD NCTF C1 NCTF_4 CC99
RSVD NCTF NCTF_5 @ T11 PAD VCCSTG and VCCIO SLEW RATE <=65us
BH30 C38 @ T12 PAD .1U_0402_16V7K
RSVD 11 OF 14 NCTF 2 2 +1.0VS_VCCSTG
UC4
1 6 +1.0VS_VCCSTG_IO 1 @ 2 1 2
SKL-H_BGA1440 IN OUT
REV = 1 ?
2 RC45 0_0402_5% CC101 .1U_0402_16V7K
@ 3 IN 7 +1.0VALW
SUSP# RC46 1 @ 2 0_0402_5% 4 VBIAS VCC_PAD 5
<39,43,48,50,51> SUSP# ON GND +1.0VS_VCCIO
3 3
PVT modify JC2
AOZ1334DI-01_DFN8-7_3X3

1U_0402_6.3V6K
1 1 2

CC102
JUMP_43X118
+1.0VS_VCCSTG: 60mA @ @
R ON = 4.4mΩ 2
UNPOP
VDROP= 11mV Default use POWER side
Delay time: 9.3us

4 4

Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
SKL-H(9/9)RSVD
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 13 of 61
A B C D E
A B C D E

<7> DDR_A_DQS#[0..7] Layout Note:


Place near JDIMM1.164
Reverse Type-4H
+1.2V_VDDQ JDIMM1A
<7> DDR_A_D[0..63] DDR_A_CLK0 137 REVERSE 8 DDR_A_D0
DDR_A_CLK#0 139 CK0(T) DQ0 7 DDR_A_D1 2-3A to 1 DIMMs/channel
<7> DDR_A_DQS[0..7] CPU Side DDR_A_CLK1 138 CK0#(C) DQ1 20 DDR_A_D2
+0.6V_VREFCA DDR_A_CLK#1 140 CK1(T) DQ2 21 DDR_A_D3

.1U_0402_16V7K
CK1#(C) DQ3

2
DDR_A_D4

1K_0402_1%
4
<7> DDR_A_MA[0..16] 1 Dimm1 Side DDR_A_CKE0 DQ4 DDR_A_D5

CD1
109 3
DDR_A_BA0 RD1 DDR_A_CKE1 110 CKE0 DQ5 16 DDR_A_D6
<7> DDR_A_BA0 DDR_A_BA1 +0.6V_DDRA_VREFCA CKE1 DQ6 DDR_A_D7
17
<7> DDR_A_BA1 DDR_A_BG0 2 DDR_A_CS#0 149 DQ7 13 DDR_A_DQS0
RD2
<7> DDR_A_BG0

1
DDR_A_BG1 2_0402_1% DDR_A_CS#1 157 S0# DQS0(T) 11 DDR_A_DQS#0
1 <7> DDR_A_BG1 +0.6V_DDRA_VREFCA
#543016 PDG 1.0164 S1# DQS0#(C) 1
2 1 20mils wide & spacing 162
165 S2#/C0 28 DDR_A_D8
1 S3#/C1 DQ8 DDR_A_D9
29 JDIMM1B
DDR_A_CLK0 DDR_A_ODT0 155 DQ9 41 DDR_A_D10 +1.2V_VDDQ REVERSE +1.2V_VDDQ

.1U_0402_16V7K
CD2
<7> DDR_A_CLK0 ODT0 DQ10

2
DDR_A_CLK#0 DDR_A_ODT1 DDR_A_D11

1K_0402_1%
0.022U_0402_16V7K 1 161 42 111 141
<7> DDR_A_CLK#0 DDR_A_CLK1 2 ODT1 DQ11 DDR_A_D12 VDD1 VDD11

RD3

CD3
24 112 142
<7> DDR_A_CLK1 DDR_A_CLK#1 DDR_A_BG0 115 DQ12 25 DDR_A_D13 117 VDD2 VDD12 147
<7> DDR_A_CLK#1 BG0 DQ13 VDD3 VDD13

1
DDR_A_BG1 113 38 DDR_A_D14 118 148
RD4 2 DDR_A_BA0 150 BG1 DQ14 37 DDR_A_D15 123 VDD4 VDD14 153

1
DDR_A_CKE0 DDR_A_BA1 145 BA0 DQ15 34 DDR_A_DQS1 124 VDD5 VDD15 154
<7> DDR_A_CKE0 24.9_0402_1% BA1 DQS1(T) VDD6 VDD16
DDR_A_CKE1 32 DDR_A_DQS#1 129 159
<7> DDR_A_CKE1 DDR_A_CS#0 DDR_A_MA0 144 DQS1#(C) 130 VDD7 VDD17 160
<7> DDR_A_CS#0

2
DDR_A_CS#1 DDR_A_MA1 133 A0 50 DDR_A_D16 135 VDD8 VDD18 163
<7> DDR_A_CS#1 DDR_A_MA2 A1 DQ16 DDR_A_D17 VDD9 VDD19 +0.6VS_VTT
132 49 136
DDR_A_MA3 131 A2 DQ17 62 DDR_A_D18 +0.6V_DDRA_VREFCA VDD10
D_CK_SDATA Place near to SO-DIMM connector. DDR_A_MA4 128 A3 DQ18 63 DDR_A_D19 +3VS_DIMMA 255 258
<15,18,38> D_CK_SDATA D_CK_SCLK DDR_A_MA5 126 A4 DQ19 46 DDR_A_D20 VDDSPD VTT +2.5V
<15,18,38> D_CK_SCLK DDR_A_MA6 127 A5 DQ20 45 DDR_A_D21 164 257
DDR_A_MA7 122 A6 DQ21 58 DDR_A_D22 VREFCA VPP1 259
DDR_A_ODT0 DDR_A_MA8 125 A7 DQ22 59 DDR_A_D23 VPP2
<7> DDR_A_ODT0 DDR_A_ODT1 DDR_A_MA9 121 A8 DQ23 55 DDR_A_DQS2 1 99
<7> DDR_A_ODT1 DDR_A_MA10 146 A9 DQS2(T) 53 DDR_A_DQS#2 2 VSS VSS 102
DDR_A_MA11 120 A10_AP DQS2#(C) 5 VSS VSS 103
DDR_A_MA12 119 A11 70 DDR_A_D24 6 VSS VSS 106
DDR_A_MA13 158 A12 DQ24 71 DDR_A_D25 9 VSS VSS 107
DDR_A_MA14 151 A13 DQ25 83 DDR_A_D26 10 VSS VSS 167
DDR_A_MA15 156 A14_W E# DQ26 84 DDR_A_D27 14 VSS VSS 168
Layout Note: Note: DDR_A_MA16 A15_CAS# DQ27 DDR_A_D28 VSS VSS
152 66 15 171
Place near JDIMM1 place caps close to DIMM A16_RAS# DQ28 67 DDR_A_D29 18 VSS VSS 172
4 on each side of DIMM DDR_A_ACT# 114 DQ29 79 DDR_A_D30 19 VSS VSS 175
Layout Note: <7> DDR_A_ACT# ACT# DQ30 DDR_A_D31 VSS VSS
80 22 176
2
Place near JDIMM1.257/259 DDR_A_PARITY 143 DQ31 76 DDR_A_DQS3 23 VSS VSS 180 2
+1.2V_VDDQ <7> DDR_A_PARITY DDR_A_ALERT# PARITY DQS3(T) DDR_A_DQS#3 VSS VSS
116 74 26 181
<7> DDR_A_ALERT# DDR_A_EVENT# ALERT# DQS3#(C) VSS VSS
1 2 134 27 184
+1.2V_VDDQ +1.2V_VDDQ RD5 240_0402_1% DDR_DRAMRST#_R 108 EVENT# 174 DDR_A_D32 30 VSS VSS 185
RESET# DQ32 173 DDR_A_D33 31 VSS VSS 188
DQ33 187 DDR_A_D34 35 VSS VSS 189
+2.5V D_CK_SDATA 254 DQ34 186 DDR_A_D35 36 VSS VSS 192
D_CK_SCLK SDA DQ35 DDR_A_D36 VSS VSS
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

253 170 39 193


.1U_0402_16V7K

.1U_0402_16V7K

SCL DQ36 169 DDR_A_D37 40 VSS VSS 196


1 1 1 1 1 1 1 1 1 1 DDR_A_SA2 DQ37 DDR_A_D38 VSS VSS
166 183 43 197
CD12

CD13

10U_0603_6.3V6M

10U_0603_6.3V6M
1U_0402_6.3V6K

1U_0402_6.3V6K
DDR_A_SA1 SA2 DQ38 DDR_A_D39 VSS VSS
CD4

CD5

CD6

CD7

CD8

CD9

CD10

CD11

1 1 1 1 260 182 44 201


CD14 DDR_A_SA0 SA1 DQ39 DDR_A_DQS4 VSS VSS

CD15

CD16

CD17
256 179 47 202
2 2 2 2 2 2 2 2 2 2 SA0 DQS4(T) 177 DDR_A_DQS#4 48 VSS VSS 205
DQS4#(C) 51 VSS VSS 206
2 2 2 2 92 195 DDR_A_D40 52 VSS VSS 209
SPD Address for CHANNEL0 CB0_NC DQ40 DDR_A_D41 VSS VSS
91 194 56 210
Write Adress 0xA0 101 CB1_NC DQ41 207 DDR_A_D42 57 VSS VSS 213
Read Address 0xA1 105 CB2_NC DQ42 208 DDR_A_D43 60 VSS VSS 214
SA0=0;SA1=0;SA2=0 88 CB3_NC DQ43 191 DDR_A_D44 61 VSS VSS 217
87 CB4_NC DQ44 190 DDR_A_D45 64 VSS VSS 218
+1.2V_VDDQ 100 CB5_NC DQ45 203 DDR_A_D46 65 VSS VSS 222
104 CB6_NC DQ46 204 DDR_A_D47 68 VSS VSS 223
Follow MA51 97 CB7_NC DQ47 200 DDR_A_DQS5 69 VSS VSS 226
DQS8(T) DQS5(T) DDR_A_DQS#5 VSS VSS
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

95 198 72 227
DQS8#(C) DQS5#(C) 73 VSS VSS 230
1 DDR_A_D48 VSS VSS
216 77 231
+ CD26 12 DQ48 215 DDR_A_D49 78 VSS VSS 234
1 1 1 1 1 1 1 1 DM0#/DBI0# DQ49 DDR_A_D50 VSS VSS
+1.2V_VDDQ
CD18

CD19

CD20

CD21

CD22

CD23

CD24

CD25

330U_D2_2V_Y 33 228 81 235


54 DM1#/DBI1# DQ50 229 DDR_A_D51 82 VSS VSS 238
2 75 DM2#/DBI2# DQ51 211 DDR_A_D52 85 VSS VSS 239
2 2 2 2 2 2 2 2 SGA00009S00 178 DM3#/DBI3# DQ52 212 DDR_A_D53 86 VSS VSS 243
330U 2V H1.9 199 DM4#/DBI4# DQ53 224 DDR_A_D54 89 VSS VSS 244
3
9mohm POLY 220 DM5#/DBI5# DQ54 225 DDR_A_D55 90 VSS VSS 247 3
241 DM6#/DBI6# DQ55 221 DDR_A_DQS6 93 VSS VSS 248
96 DM7#/DBI7# DQS6(T) 219 DDR_A_DQS#6 94 VSS VSS 251
DM8#/DBI8# DQS6#(C) 98 VSS VSS 252
VSS VSS
262 261
237 DDR_A_D56 GND GND
+1.2V_VDDQ DQ56 236 DDR_A_D57
Layout Note: DQ57 DDR_A_D58
249 LOTES_ADDR0206-P001A
Place near JDIMM1.258 DQ58 250 DDR_A_D59
DQ59 232 DDR_A_D60
DQ60
2

233 DDR_A_D61
RD6 DQ61 245 DDR_A_D62
DQ62 246 DDR_A_D63
470_0402_5% DQ63 242 DDR_A_DQS7
+0.6VS_VTT RD7 DQS7(T) 240 DDR_A_DQS#7
1

2 1 DQS7#(C)
<18> DDR_DRAMRST# DDR_DRAMRST#_R <15>
1
1 0_0402_5% CD27
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

XEMC@ @ LOTES_ADDR0206-P001A
100P_0402_50V8J
CD34

1 1 1 1 1 1 .1U_0402_16V7K
2@
CD32

CD33

2
CD28

CD29

CD30

CD31

2 2 2 2 2 2

Layout NOTE
PLACE THE CAP within 200mil from Pin108
Place Holder
@ *2015MOW02, Can't install Cap on DRAMRST
4 +0.6V_DDRA_VREFCA 4
@

+3VS
2
RD8
1 +3VS_DIMMA
Interleaved Memory
2.2U_0402_6.3V6M
.1U_0402_16V7K

.1U_0402_16V7K

0_0402_5%
2.2U_0402_6.3V6M

1 1 1
CD36

CD37

CD38

1
CD35

2 2 2
Security Classification
2016/01/29
Compal Secret Data
2017/01/10
Compal Electronics, Inc.
Layout Note: 2 Issued Date Deciphered Date Title
Layout Note:
Place near JDIMM1.255
Place near JDIMM1.164 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4_DIMMA

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

Laptopblue.vn
within 200mils DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 14 of 61
A B C D E
A B C D E

<7> DDR_B_DQS#[0..7]
Reverse Type-8H
+1.2V_VDDQ
<7> DDR_B_D[0..63] 2-3A to 1 DIMMs/channel

.1U_0402_16V7K
<7> DDR_B_DQS[0..7]
JDIMM2A
CPU Side 1 Dimm2 Side

2
DDR_B_CLK0 DDR_B_D0

1K_0402_1%
137 8

CD39
RESERVE
+0.6V_B_VREFDQ +0.6V_DDRB_VREFCA DDR_B_CLK#0 139 CK0(T) DQ0 7 DDR_B_D1

RD9
<7> DDR_B_MA[0..16] DDR_B_CLK1 138 CK0#(C) DQ1 20 DDR_B_D2
2 DDR_B_CLK#1 140 CK1(T) DQ2 21 DDR_B_D3
DDR_B_BA0
Layout Note: CK1#(C) DQ3 DDR_B_D4
RD11 4
<7> DDR_B_BA0 Place near JDIMM2.164

1
DDR_B_BA1 2_0402_1% DDR_B_CKE0 109 DQ4 3 DDR_B_D5
<7> DDR_B_BA1 DDR_B_BG0 2 1 DDR_B_CKE1 110 CKE0 DQ5 16 DDR_B_D6
1 <7> DDR_B_BG0 DDR_B_BG1 CKE1 DQ6 DDR_B_D7 1
1 17
<7> DDR_B_BG1 DDR_B_CS#0 149 DQ7 13 DDR_B_DQS0
20mils wide & spacing DDR_B_CS#1 S0# DQS0(T) DDR_B_DQS#0
CD40 157 11 JDIMM2B
S1# DQS0#(C)

2
+1.2V_VDDQ +1.2V_VDDQ

1K_0402_1%
0.022U_0402_16V7K 1 162 RESERVE
DDR_B_CLK0 2 165 S2#/C0 28 DDR_B_D8 111 141

RD10
<7> DDR_B_CLK0 S3#/C1 DQ8 VDD1 VDD11

1
DDR_B_CLK#0 CD41 29 DDR_B_D9 112 142
<7> DDR_B_CLK#0 DDR_B_CLK1 DDR_B_ODT0 155 DQ9 41 DDR_B_D11 117 VDD2 VDD12 147
RD12 .1U_0402_16V7K
<7> DDR_B_CLK1 DDR_B_CLK#1 2 DDR_B_ODT1 161 ODT0 DQ10 42 DDR_B_D15 118 VDD3 VDD13 148
24.9_0402_1%

1
<7> DDR_B_CLK#1 ODT1 DQ11 24 DDR_B_D14 123 VDD4 VDD14 153
DDR_B_BG0 115 DQ12 25 DDR_B_D10 124 VDD5 VDD15 154

2
DDR_B_CKE0 DDR_B_BG1 113 BG0 DQ13 38 DDR_B_D12 129 VDD6 VDD16 159
<7> DDR_B_CKE0 DDR_B_CKE1 DDR_B_BA0 150 BG1 DQ14 37 DDR_B_D13 130 VDD7 VDD17 160
<7> DDR_B_CKE1 DDR_B_CS#0 DDR_B_BA1 145 BA0 DQ15 34 DDR_B_DQS1 135 VDD8 VDD18 163
<7> DDR_B_CS#0 DDR_B_CS#1 BA1 DQS1(T) DDR_B_DQS#1 VDD9 VDD19 +0.6VS_VTT
32 136
<7> DDR_B_CS#1 DDR_B_MA0 144 DQS1#(C) +0.6V_DDRB_VREFCA VDD10
Place near to SO-DIMM connector. DDR_B_MA1 133 A0 50 DDR_B_D16 +3VS_DIMMB 255 258
D_CK_SDATA DDR_B_MA2 132 A1 DQ16 49 DDR_B_D17 VDDSPD VTT +2.5V
<14,18,38> D_CK_SDATA D_CK_SCLK DDR_B_MA3 131 A2 DQ17 62 DDR_B_D19 164 257
<14,18,38> D_CK_SCLK DDR_B_MA4 128 A3 DQ18 63 DDR_B_D20 VREFCA VPP1 259
DDR_B_MA5 126 A4 DQ19 46 DDR_B_D22 VPP2
DDR_B_ODT0 DDR_B_MA6 127 A5 DQ20 45 DDR_B_D18 1 99
<7> DDR_B_ODT0 DDR_B_ODT1 DDR_B_MA7 122 A6 DQ21 58 DDR_B_D23 2 VSS VSS 102
<7> DDR_B_ODT1 DDR_B_MA8 125 A7 DQ22 59 DDR_B_D21 5 VSS VSS 103
DDR_B_MA9 121 A8 DQ23 55 DDR_B_DQS2 6 VSS VSS 106
DDR_B_MA10 146 A9 DQS2(T) 53 DDR_B_DQS#2 9 VSS VSS 107
DDR_B_MA11 120 A10_AP DQS2#(C) 10 VSS VSS 167
DDR_B_MA12 119 A11 70 DDR_B_D30 14 VSS VSS 168
DDR_B_MA13 158 A12 DQ24 71 DDR_B_D25 15 VSS VSS 171
Layout Note: Note: DDR_B_MA14 A13 DQ25 DDR_B_D26 VSS VSS
151 83 18 172
Place near JDIMM2 place caps close to DIMM DDR_B_MA15 156 A14_W E# DQ26 84 DDR_B_D24 19 VSS VSS 175
4 on each side of DIMM DDR_B_MA16 152 A15_CAS# DQ27 66 DDR_B_D28 22 VSS VSS 176
Layout Note: A16_RAS# DQ28 DDR_B_D27 VSS VSS
2 67 23 180 2
Place near JDIMM2.257/259 DDR_B_ACT# 114 DQ29 79 DDR_B_D29 26 VSS VSS 181
<7> DDR_B_ACT# ACT# DQ30 DDR_B_D31 VSS VSS
80 27 184
DDR_B_PARITY 143 DQ31 76 DDR_B_DQS3 30 VSS VSS 185
+1.2V_VDDQ <7>
+1.2V_VDDQ DDR_B_PARITY DDR_B_ALERT# 116 PARITY DQS3(T) 74 DDR_B_DQS#3 31 VSS VSS 188
<7> DDR_B_ALERT#
1 2 DDR_B_EVENT# 134 ALERT# DQS3#(C) 35 VSS VSS 189
+1.2V_VDDQ RD13 240_0402_1% DDR_DRAMRST#_R 108 EVENT# 174 DDR_B_D34 36 VSS VSS 192
+2.5V RESET# DQ32 173 DDR_B_D35 39 VSS VSS 193
DQ33 DDR_B_D36 VSS VSS
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

187 40 196
.1U_0402_16V7K

.1U_0402_16V7K

D_CK_SDATA 254 DQ34 186 DDR_B_D32 43 VSS VSS 197


1 1 1 1 1 1 1 1 1 1 D_CK_SCLK SDA DQ35 DDR_B_D39 VSS VSS
253 170 44 201
CD50

CD51

10U_0603_6.3V6M

10U_0603_6.3V6M
1U_0402_6.3V6K

1U_0402_6.3V6K
SCL DQ36 DDR_B_D38 VSS VSS
CD42

CD43

CD44

CD45

CD46

CD47

CD48

CD49

+3VS 169 47 202


1 1 1 1 DDR_B_SA2 DQ37 DDR_B_D37 VSS VSS
166 183 48 205
CD52

CD53

CD54

CD55
RD14
2 2 2 2 2 2 2 2 2 2 1 @ 2 DDR_B_SA1 260 SA2 DQ38 182 DDR_B_D33 51 VSS VSS 206
DDR_B_SA0 256 SA1 DQ39 179 DDR_B_DQS4 52 VSS VSS 209
2 2 2 2 PVT modify 0_0402_5% SA0 DQS4(T) 177 DDR_B_DQS#4 56 VSS VSS 210
DQS4#(C) 57 VSS VSS 213
92 195 DDR_B_D40 60 VSS VSS 214
91 CB0_NC DQ40 194 DDR_B_D41 61 VSS VSS 217
SPD Address for CHANNELB CB1_NC DQ41 DDR_B_D42 VSS VSS
101 207 64 218
Write Adress 0xA4 105 CB2_NC DQ42 208 DDR_B_D43 65 VSS VSS 222
+1.2V_VDDQ Read Address 0xA3 88 CB3_NC DQ43 191 DDR_B_D44 68 VSS VSS 223
SA0=0;SA1=1;SA2=0 87 CB4_NC DQ44 190 DDR_B_D45 69 VSS VSS 226
Follow MA51 100 CB5_NC DQ45 203 DDR_B_D46 72 VSS VSS 227
CB6_NC DQ46 DDR_B_D47 VSS VSS
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

104 204 73 230


97 CB7_NC DQ47 200 DDR_B_DQS5 77 VSS VSS 231
1 DQS8(T) DQS5(T) DDR_B_DQS#5 VSS VSS
95 198 78 234
+ CD64 DQS8#(C) DQS5#(C) 81 VSS VSS 235
1 1 1 1 1 1 1 1 DDR_B_D48 VSS VSS
+1.2V_VDDQ
CD56

CD57

CD58

CD59

CD60

CD61

CD62

CD63

330U_D2_2V_Y 216 82 238


@ 12 DQ48 215 DDR_B_D52 85 VSS VSS 239
2 33 DM0#/DBI0# DQ49 228 DDR_B_D50 86 VSS VSS 243
2 2 2 2 2 2 2 2 SGA00009S00 54 DM1#/DBI1# DQ50 229 DDR_B_D55 89 VSS VSS 244
3 330U 2V H1.9 75 DM2#/DBI2# DQ51 211 DDR_B_D51 90 VSS VSS 247 3

9mohm POLY 178 DM3#/DBI3# DQ52 212 DDR_B_D54 93 VSS VSS 248
199 DM4#/DBI4# DQ53 224 DDR_B_D49 94 VSS VSS 251
220 DM5#/DBI5# DQ54 225 DDR_B_D53 98 VSS VSS 252
241 DM6#/DBI6# DQ55 221 DDR_B_DQS6 VSS VSS
96 DM7#/DBI7# DQS6(T) 219 DDR_B_DQS#6 262 261
DM8#/DBI8# DQS6#(C) GND GND

Layout Note: LOTES_ADDR0070-P009A


237 DDR_B_D61
Place near JDIMM2.258 DQ56 236 DDR_B_D57
DQ57 249 DDR_B_D60
DQ58 250 DDR_B_D56
From CPU to CHB DQ59 232 DDR_B_D62
DQ60 233 DDR_B_D59
DQ61 245 DDR_B_D63
DDR_DRAMRST#_R <14> DQ62 246 DDR_B_D58
+0.6VS_VTT
DQ63 242 DDR_B_DQS7
1 DQS7(T) DDR_B_DQS#7
240
CD65 DQS7#(C)
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

.1U_0402_16V7K
2
1 1 1 1 1 1 @
CD70

CD71

LOTES_ADDR0070-P009A
CD66

CD67

CD68

CD69

2 2 2 2 2 2

Layout NOTE
Place Holder PLACE THE CAP within 200mil from Pin108
4 @ *2015MOW02, Can't install Cap on DRAMRST 4
+0.6V_DDRB_VREFCA
@

+3VS
2
RD15
1 +3VS_DIMMB
Interleaved Memory
2.2U_0402_6.3V6M
.1U_0402_16V7K

.1U_0402_16V7K

0_0402_5%
2.2U_0402_6.3V6M

1 1 1
CD73

CD74

CD75

1 Security Classification Compal Secret Data Compal Electronics, Inc.


CD72

2 2 2 Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title


Layout Note:
Place near JDIMM1.255
2
Layout Note: THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4_DIMMB

Laptopblue.vn
Size Document Number Rev
Place near JDIMM1.164 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Laptopblue.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
within 200mils MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 15 of 61
A B C D E
A B C D E

UH1F SPT-H_PCH

C11 AT22 LPC_AD0

LPC/eSPI
<36> USB3_PTX_DRX_N1 USB3_1_TXN GPP_A1/LAD0/ESPI_IO0 LPC_AD1 LPC_AD0 <39,41>
1 B11 AV22 LPC Bus 1
<36> USB3_PTX_DRX_P1 USB3_1_TXP GPP_A2/LAD1/ESPI_IO1 LPC_AD2 LPC_AD1 <39,41>
USB3 MB <36> USB3_PRX_DTX_N1 B7 AT19
USB3_1_RXN GPP_A3/LAD2/ESPI_IO2 LPC_AD3 LPC_AD2 <39,41>
<36> USB3_PRX_DTX_P1 A7 BD16 LPC : +3.3V +3VS
USB3_1_RXP GPP_A4/LAD3/ESPI_IO3 LPC_AD3 <39,41>
B12
<36> USB3_PTX_DRX_N2 USB3_2_TXN/SSIC_1_TXN LPC_FRAME#
A12 BE16
<36> USB3_PTX_DRX_P2 USB3_2_TXP/SSIC_1_TXP GPP_A5/LFRAME#/ESPI_CS0# TPM_SERIRQ LPC_FRAME# <39,41> TPM_SERIRQ
USB3 MB <36> USB3_PRX_DTX_N2 C8 BA17 TPM_SERIRQ <39,41> 1 2
B8 USB3_2_RXN/SSIC_1_RXN GPP_A6/SERIRQ/ESPI_CS1# AW17 LPC_PIRQA# To TPM RH1 10K_0402_5%
<36> USB3_PRX_DTX_P2 USB3_2_RXP/SSIC_1_RXP GPP_A7/PIRQA#/ESPI_ALERT0# EC_KBRST#_R
AT17 EC_KBRST#_R <20,39> DG requierment 8.2k PH +3VS
B15 GPP_A0/RCIN#/ESPI_ALERT1# BC18 ESPI_RST#
USB3_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET# @ T203PAD CRB 10K PH +3vs
C15
K15 USB3_6_TXP EC_KBRST#_R 1 @ 2
USB3_6_RXN CLK_LPC

USB
K13 BC17 RH3 2 1 22_0402_5% RH2 10K_0402_5%
USB3_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK CLK_LPC_TPM CLK_LPC_R <39>
B14 AV19 RH4 2 TPM@ 1 22_0402_5% To EC check EC design needed
USB3_5_TXN GPP_A10/CLKOUT_LPC1 CLK_LPC_TPM_R <41>
C14 pop RH2 or not
G13 USB3_5_TXP M45
H13 USB3_5_RXN GPP_G19/SMI# N43
USB3_5_RXP GPP_G18/NMI#
D13
<35> USB3_PTX_DRX_N3 USB3_3_TXP/SSIC_2_TXP
C13 AE45
<35> USB3_PTX_DRX_P3 USB3_3_TXN/SSIC_2_TXN GPP_E6/DEVSLP2 +3VALW_PCH_PRIM
<35> USB3_PRX_DTX_N3 A9 AG43
B10 USB3_3_RXP/SSIC_2_RXP GPP_E5/DEVSLP1 AG42 SSD_DEVSLP0
<35> USB3_PRX_DTX_P3 USB3_3_RXN/SSIC_2_RXN GPP_E4/DEVSLP0 SSD_DEVSLP0 <34>
USB3 Type C AB39
B13 GPP_F9/DEVSLP7 AB36 LPC_PIRQA# 2 1

SATA
<35> USB3_PTX_DRX_N4 USB3_4_TXP GPP_F8/DEVSLP6
A14 AB43 RH5 10K_0402_5%
<35> USB3_PTX_DRX_P4 USB3_4_TXN GPP_F7/DEVSLP5
<35> USB3_PRX_DTX_N4 G11 AB42
E11 USB3_4_RXP 6 OF 12 GPP_F6/DEVSLP4 AB41
<35> USB3_PRX_DTX_P4 USB3_4_RXN GPP_F5/DEVSLP3

SKL-H-PCH_BGA837
?
@ REV = 1.3

2 2

SPT-H_PCH
UH1B
DMI_CTX_PRX_N0 L27 AF5 USB20_N1
<8> DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 DMI_RXN0 USB2N_1 USB20_P1 USB20_N1 <36>
N27 AG7
<8> DMI_CTX_PRX_P0 DMI_CRX_PTX_N0 C27 DMI_RXP0 USB2P_1 AD5 USB20_N2 USB20_P1 <36> USB3 MB
<8> DMI_CRX_PTX_N0 DMI_CRX_PTX_P0 DMI_TXN0 USB2N_2 USB20_P2 USB20_N2 <36>
<8> DMI_CRX_PTX_P0 B27 AD7 USB3 MB
DMI_CTX_PRX_N1 DMI_TXP0 USB2P_2 USB20_N3 USB20_P2 <36>
<8> DMI_CTX_PRX_N1 E24 AG8
DMI_CTX_PRX_P1 DMI_RXN1 USB2N_3 USB20_P3 USB20_N3 <35>
<8> DMI_CTX_PRX_P1 G24 AG10
DMI_CRX_PTX_N1 DMI_RXP1 USB2P_3 USB20_N4 USB20_P3 <35>
<8> DMI_CRX_PTX_N1 B28 AE1 TYPE C
DMI_CRX_PTX_P1 DMI_TXN1 USB2N_4 USB20_P4 USB20_N4 <35>
<8> DMI_CRX_PTX_P1 A28 DMI AE2
DMI_CTX_PRX_N2 DMI_TXP1 USB2P_4 USB20_N5 USB20_P4 <35>
<8> DMI_CTX_PRX_N2 G27 AC2
DMI_CTX_PRX_P2 DMI_RXN2 USB2N_5 USB20_P5 USB20_N5 <33>
<8> DMI_CTX_PRX_P2 E26 AC3 USB2 (SUB/B)
DMI_CRX_PTX_N2 DMI_RXP2 USB2P_5 USB20_P5 <33>
<8> DMI_CRX_PTX_N2 B29 AF2
DMI_CRX_PTX_P2 C29 DMI_TXN2 USB2N_6 AF3
<8> DMI_CRX_PTX_P2 DMI_CTX_PRX_N3 DMI_TXP2 USB2P_6 USB20_N7
<8> DMI_CTX_PRX_N3 L29 AB3
DMI_CTX_PRX_P3 DMI_RXN3 USB2N_7 USB20_P7 USB20_N7 <37>
<8> DMI_CTX_PRX_P3 K29 USB 2.0 AB2 BT
DMI_CRX_PTX_N3 DMI_RXP3 USB2P_7 USB20_N8 USB20_P7 <37>
<8> DMI_CRX_PTX_N3 B30 AL8
DMI_CRX_PTX_P3 DMI_TXN3 USB2N_8 USB20_P8 USB20_N8 <30>
<8> DMI_CRX_PTX_P3 A30 AL7 TS
DMI_TXP3 USB2P_8 USB20_N9 USB20_P8 <30>
AA1
PCIE_RCOMPN USB2N_9 USB20_P9 USB20_N9 <30>
RH6 1 2 100_0402_1% B18 AA2 Camera
PCIE_RCOMPP PCIE_RCOMPN USB2P_9 USB20_N10 USB20_P9 <30>
#546884 P.231 PCIE_RCOMPN/PCIE_RCOMPP C17 AJ8
PCIE_RCOMPP USB2N_10 USB20_P10 USB20_N10 <33>
AJ7
BO=4 W=12~15 S=12 R=100ohm USB2P_10 W2 USB20_N11 USB20_P10 <33> Card Reader (SUB/B)
USB2N_11 USB20_P11 USB20_N11 <42>
H15 W3 FingerPrint
PCIE1_RXN/USB3_7_RXN USB2P_11 USB20_P11 <42>
G15 AD3
A16 PCIE1_RXP/USB3_7_RXP USB2N_12 AD2

PCIe/USB 3
B16 PCIE1_TXN/USB3_7_TXN USB2P_12 V2
B19 PCIE1_TXP/USB3_7_TXP USB2N_13 V1
C19 PCIE2_TXN/USB3_8_TXN USB2P_13 AJ11
PCIE2_TXP/USB3_8_TXP USB2N_14 CHECK ACER DVR for port use reference PDG1.0 50-30 +3VALW_PCH_PRIM
E17 AJ13
G17 PCIE2_RXN/USB3_8_RXN USB2P_14 12/08 Change Port, follow DVR1044_R1.03
PCIE_PRX_DTX_N3 PCIE2_RXP/USB3_8_RXP RPH1
L17
<37> PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 K17 PCIE3_RXN/USB3_9_RXN USB_OC0# 8 1
3 3
<37> PCIE_PRX_DTX_P3 CH4 2 1 .1U_0402_16V7K PCIE_PTX_DRX_N3 B20 PCIE3_RXP/USB3_9_RXP AD43 USB_OC0# USB_OC1# 7 2
NGFF WL+BT(KEY E) <37> PCIE_PTX_C_DRX_N3 PCIE_PTX_DRX_P3 PCIE3_TXN/USB3_9_TXN GPP_E9/USB2_OC0# USB_OC1# USB_OC0# <36> USB_OC3#
CH5 2 1 .1U_0402_16V7K C20 AD42 USB_OC1# <36> 6 3
<37> PCIE_PTX_C_DRX_P3 PCIE_PRX_DTX_N4 E20 PCIE3_TXP/USB3_9_TXP GPP_E10/USB2_OC1# AD39 USB_OC2# USB_OC2# 5 4
<32> PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4 PCIE4_RXN/USB3_10_RXN GPP_E11/USB2_OC2# USB_OC3#
G19 AC44
<32> PCIE_PRX_DTX_P4 PCIE_PTX_DRX_N4 PCIE4_RXP/USB3_10_RXP GPP_E12/USB2_OC3# USB_OC4
GLAN CH6 2 1 .1U_0402_16V7K B21 Y43 10K_0804_8P4R_5%
<32> PCIE_PTX_C_DRX_N4 PCIE_PTX_DRX_P4 PCIE4_TXN/USB3_10_TXN GPP_F15/USB2_OCB_4 USB_OC5
CH7 2 1 .1U_0402_16V7K A21 Y41
<32> PCIE_PTX_C_DRX_P4 K19 PCIE4_TXP/USB3_10_TXP GPP_F16/USB2_OCB_5 W44 USB_OC6
PCIE5_RXN GPP_F17/USB2_OCB_6 USB_OC7 RPH2
CHECK ACER DVR for port use L19 W43
D22 PCIE5_RXP GPP_F18/USB2_OCB_7 USB_OC5 8 1
12/08 Change Port, follow DVR1044_R1.03 C22 PCIE5_TXN USB_OC4 7 2
G22 PCIE5_TXP AG3 USB2_COMP RH7 1 2 113_0402_1% USB_OC6 6 3
E22 PCIE6_RXN USB2_COMP AD10 USB2_VBUSSENSE RH8 1 @ 2 0_0402_5% USB_OC7 5 4
B22 PCIE6_RXP USB2_VBUSSENSE AB13 PVT modify
A23 PCIE6_TXN RSVD_AB13 AG2 USB2_ID RH9 1 @ 2 0_0402_5% 10K_0804_8P4R_5%
L22 PCIE6_TXP USB2_ID @
K22 PCIE7_RXN
C23 PCIE7_RXP
B23 PCIE7_TXN BD14
K24 PCIE7_TXP GPD7/RSVD
L24 PCIE8_RXN
PCIE8_RXP 546765_2015WW10_Skylake_MOW_Rev_1_0
C24
B24 PCIE8_TXN 2 OF 12 05/19 RH150
PCIE8_TXP
SKL-H-PCH_BGA837
?
@ REV = 1.3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

PCH(1/7)DMI,PCIE,USB
Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 16 of 61
A B C D E
A B C D E

UH1A SPT-H_PCH

1 @ 2 EC_PME#_R BD17 BB27 PLT_RST#


<32,39> EC_PME# GPP_A11/PME# GPP_B13/PLTRST# PLT_RST# <23,39,41>
RH10 0_0402_5%
AG15 P43
AG14 RSVD GPP_G16/GSXCLK R39
AF17 RSVD GPP_G12/GSXDOUT R36
AE17 RSVD GPP_G13/GSXSLOAD R42
RSVD GPP_G14/GSXDIN R41 SPT-H_PCH
AR19 GPP_G15/GSXSRESET# UH1C
TP2 M.2 SSD PCIE L0
1 AN17 1
TP1 AF41 I2C_TS_INT# G31 PCIE_PRX_DTX_N9
PCH_SPI_SI GPP_E3/CPU_GP0 I2C_TS_INT# <30> PCIE9_RXN/SATA0A_RXN PCIE_PRX_DTX_P9 PCIE_PRX_DTX_N9 <34>
BB29 AE44 AV2 H31
PCH_SPI_SO BE30 SPI0_MOSI GPP_E7/CPU_GP1 BC23 TP_INT# 2 1 AV3 CL_CLK CLINK PCIE9_RXP/SATA0A_RXP C31 PCIE_PTX_DRX_N9 PCIE_PRX_DTX_P9 <34>
PCH_SPI_CS#0 SPI0_MISO GPP_B3/CPU_GP2 EC_TP_INT# <39,41> CL_DATA PCIE9_TXN/SATA0A_TXN PCIE_PTX_DRX_P9 PCIE_PTX_DRX_N9 <34>
BD31 BD24 DH1 AW2 B31
PCH_SPI_CLK BC31 SPI0_CS0# GPP_B4/CPU_GP3 RB751V-40_SOD323-2 CL_RST# PCIE9_TXP/SATA0A_TXP PCIE_PTX_DRX_P9 <34>
AW31 SPI0_CLK BC36 R44
SPI ROM PCH_SPI_IO2 SPI0_CS1# GPP_H18/SML4ALERT# GPP_G8/FAN_PWM_0 PCIE_PRX_DTX_N10
M.2 SSD PCIE L1
BC29 BE34 R43 G29
PCH_SPI_IO3 BD30 SPI0_IO2 GPP_H17/SML4DATA BD39 U39 GPP_G9/FAN_PWM_1 PCIE10_RXN/SATA1A_RXN E29 PCIE_PRX_DTX_P10 PCIE_PRX_DTX_N10 <34>
AT31 SPI0_IO3 GPP_H16/SML4CLK BB36 N42 GPP_G10/FAN_PWM_2 PCIE10_RXP/SATA1A_RXP C32 PCIE_PTX_DRX_N10 PCIE_PRX_DTX_P10 <34>
SPI0_CS2# GPP_H15/SML3ALERT# BA35 GPP_G11/FAN_PWM_3 FAN PCIE10_TXN/SATA1A_TXN B32 PCIE_PTX_DRX_P10 PCIE_PTX_DRX_N10 <34>
AN36 GPP_H14/SML3DATA BC35 for server and WS use U43 PCIE10_TXP/SATA1A_TXP PCIE_PTX_DRX_P10 <34>
AL39 GPP_D1/SPI1_CLK GPP_H13/SML3CLK BD35 U42 GPP_G0/FAN_TACH_0 F41 SATA_PRX_DTX_N2
GPP_D0/SPI1_CS# GPP_H12/SML2ALERT# PAD @ T13 GPP_G1/FAN_TACH_1 PCIE15_RXN/SATA2_RXN SATA_PRX_DTX_P2 SATA_PRX_DTX_N2 <38>
AN41 AW35 U41 E41
AN38 GPP_D3/SPI1_MOSI GPP_H11/SML2DATA BD34 M44 GPP_G2/FAN_TACH_2 PCIE15_RXP/SATA2_RXP B39 SATA_PTX_DRX_N2 SATA_PRX_DTX_P2 <38>
GPP_D2/SPI1_MISO GPP_H10/SML2CLK GPP_G3/FAN_TACH_3 PCIE15_TXN/SATA2_TXN SATA_PTX_DRX_P2 SATA_PTX_DRX_N2 <38> HDD
AH43 DVT modify U36 A39
AG44 GPP_D22/SPI1_IO3 BE11 SM_INTRUDER# RH12 1 2 1M_0402_5% P44 GPP_G4/FAN_TACH_4 PCIE15_TXP/SATA2_TXP SATA_PTX_DRX_P2 <38>
GPP_D21/SPI1_IO2 INTRUDER# +RTCVCC GPP_G5/FAN_TACH_5
T45 D43

PCIe/SATA
T44 GPP_G6/FAN_TACH_6 PCIE16_RXN/SATA3_RXN E42
1 OF 12
SKL-H-PCH_BGA837 GPP_G7/FAN_TACH_7 PCIE16_RXP/SATA3_RXP A41
REV = 1.3 ? PCIE_PTX_DRX_P11 PCIE16_TXN/SATA3_TXN
B33 A40
<34> PCIE_PTX_DRX_P11 PCIE_PTX_DRX_N11 C33 PCIE11_TXP PCIE16_TXP/SATA3_TXP
+3VS @ <34> PCIE_PTX_DRX_N11 PCIE_PRX_DTX_P11 K31 PCIE11_TXN H42
M.2 SSD PCIE L2 <34> PCIE_PRX_DTX_P11 PCIE_PRX_DTX_N11 PCIE11_RXP PCIE17_RXN/SATA4_RXN
L31 H40
<34> PCIE_PRX_DTX_N11 PCIE11_RXN PCIE17_RXP/SATA4_RXP E45
1 2 TP_INT# AB33 PCIE17_TXN/SATA4_TXN F45 +3VS
RH13 100K_0402_5% AB35 GPP_F10/SCLOCK PCIE17_TXP/SATA4_TXP SATA_LED#
DGPU_PRSNT# GPP_F11/SLOAD SATA_LED# <33>
AA44 K37
GPP_F13/SDATAOUT0 PCIE18_RXN/SATA5_RXN

2
1 2 I2C_TS_INT# AA45 G37
RH15 100K_0402_5% GPP_F12/SDATAOUT1 PCIE18_RXP/SATA5_RXP G45 RH109 RH16
B38 PCIE18_TXN/SATA5_TXN G44 10K_0402_5%
PCIE14_TXN/SATA1B_TXN PCIE18_TXP/SATA5_TXP 10K_0402_5%
C38
D39 PCIE14_TXP/SATA1B_TXP AD44 SATA_LED# M.2 SSD PCIE/SATA select pin

1
E37 PCIE14_RXN/SATA1B_RXN GPP_E8/SATALED# AG36 SATA_GP0
PCIE14_RXP/SATA1B_RXP GPP_E0/SATAXPCIE0/SATAGP0 AG35 1 @ 2 SATA_GP0 <34>
2
C36 GPP_E1/SATAXPCIE1/SATAGP1 AG39 RH19 1 @ 2 10K_0402_5% 2
B36 PCIE13_TXN/SATA0B_TXN GPP_E2/SATAXPCIE2/SATAGP2 AD35 RH20 1 @ 2 10K_0402_5%
G35 PCIE13_TXP/SATA0B_TXP GPP_F0/SATAXPCIE3/SATAGP3 AD31 RH21 1 @ 2 10K_0402_5%
PCH PLTRST Buf f er E35 PCIE13_RXN/SATA0B_RXN GPP_F1/SATAXPCIE4/SATAGP4 AD38 RH22 1 @ 2 10K_0402_5%
PCIE13_RXP/SATA0B_RXP GPP_F2/SATAXPCIE5/SATAGP5 AC43 RH24 10K_0402_5%
PCIE_PTX_DRX_P12 A35 GPP_F3/SATAXPCIE6/SATAGP6 AB44 FOR SERVER & WS ONLY
+3VS CH16 <34> PCIE_PTX_DRX_P12 PCIE_PTX_DRX_N12 B35 PCIE12_TXP GPP_F4/SATAXPCIE7/SATAGP7
.1U_0402_16V7K <34> PCIE_PTX_DRX_N12 PCIE_PRX_DTX_P12 H33 PCIE12_TXN W36 PCH_BKL_PWM
M.2 SSD PCIE L3 <34> PCIE_PRX_DTX_P12 PCIE_PRX_DTX_N12 PCIE12_RXP GPP_F21/EDP_BKLTCTL PCH_BKL_PWM <30>
1 2 G33 W35 ENBKL
<34> PCIE_PRX_DTX_N12 PCIE12_RXN GPP_F20/EDP_BKLTEN PCH_ENVDD ENBKL <39>
J45 W42
PCIE20_TXP/SATA7_TXP GPP_F19/EDP_VDDEN PCH_ENVDD <30>
5

UH2 K44
PLT_RST# 1 N38 PCIE20_TXN/SATA7_TXN AJ3 PCH_THERMTRIP# RH25 1 2 620_0402_5%
P

HOST THERMTRIP# <9>


IN1 4 PLT_RST_BUF# N39 PCIE20_RXP/SATA7_RXP THERMTRIP# AL3 PCH_PECI RH26 1 @ 2 12.1_0402_1%
O PLT_RST_BUF# <32,34,37> PCIE20_RXN/SATA7_RXN PECI H_PM_SYNC_R H_PECI <9,39>
2 H44 AJ4 RH27 2 1 30_0402_1%
IN2 PCIE19_TXP/SATA6_TXP PM_SYNC H_PM_SYNC <9>
G

H43 AK2 PLTRST_CPU#


MC74VHC1G08DFT2G_SC70-5 RH28 L39 PCIE19_TXN/SATA6_TXN PLTRST_PROC# AH2 PLTRST_CPU# <9>
PM_DOWN_R <9>
3

L37 PCIE19_RXP/SATA6_RXP 3 OF 12 PM_DOWN


100K_0402_5%
PCIE19_RXN/SATA6_RXN
?
SKL-H-PCH_BGA837
2

@ REV = 1.3
PCH_BKL_PWM RH31 1 2 100K_0402_5%
ENBKL RH32 1 2 100K_0402_5%
PCH_PECI RH33 1 @ 2 10K_0402_5%
+3VALW_SPI
1 @ 2 +1.0VALW_PRIM
PCH_SPI_CS#0 1 @ 2 RH34 10K_0402_5%
RH35 4.7K_0402_5%

DVT modify Functional Strap Definitions


Single SPI ROM_CS0# RPH3 and close UH6
RPH3 SPI0_MOSI
PCH_SPI_SI_0_R 1 8 PCH_SPI_SI
PCH_SPI_SO_0_R 2 7 PCH_SPI_SO Follow MOW 2015WW09 +3VALW_SPI int. PH
3 PCH_SPI_IO3_0_R 3 6 PCH_SPI_IO3 This strap should sample HIGH. There should NOT be any 3
To SPI ROM PCH_SPI_CLK_0_R 4 5 PCH_SPI_CLK
PCH_SPI_IO2 RH36 1 @ 2 1K_0402_1%
on-board device driving it to opposite direction during
15_0804_8P4R_5% strap sampling.

PCH_SPI_IO2_0_R 1 2 PCH_SPI_IO2
SPI0_MISO
RH38 15_0402_5% PCH_SPI_IO3 RH40 1 @ 2 1K_0402_1% +3VALW_PCH_PRIM int. PH
This strap should sample HIGH. There should NOT be any
+3VALW_SPI
on-board device driving it to opposite direction during

1
SPI ROM ( 8MByte ) RH42 strap sampling.
CH17 .1U_0402_16V7K Follow MOW WW36 UMA@ 10K_0402_5%
UH3 1 2
PCH_SPI_CS#0 1 8 pull down with pre-ES1/ES1 samples SPI0_IO2

2
PCH_SPI_SO_0_R 2 /CS VCC 7 PCH_SPI_IO3_0_R
PCH_SPI_IO2_0_R 3 DO(IO1) /HOLD(IO3) 6 PCH_SPI_CLK_0_R DGPU_PRSNT# int. PH
/WP(IO2) CLK PCH_SPI_SI_0_R
4
GND DI(IO0)
5 This strap should sample HIGH. There should NOT be any
W25Q64FVSSIQ_SO8
on-board device driving it to opposite direction during
strap sampling.

1
RH43
@ @ VGA@ 10K_0402_5%
PCH_SPI_CLK_0_R 1 2 1 2 SPI0_IO3
int. PH

2
RH44 CH19
0_0402_5% 68P_0402_50V8J This strap should sample HIGH. There should NOT be any
on-board device driving it to opposite direction during
+3VALW_SPI GPP_F13 strap sampling.
ROM Socket DGPU_PRSNT#
JH1
PCH_SPI_CS#0 1 8
PCH_SPI_IO2_0_R 3 CS# VCC 6 PCH_SPI_CLK_0_R DIS,Optimus 0 GPP_H12
PCH_SPI_IO3_0_R 7 WP# SCLK 5 PCH_SPI_SI_0_R int. PD
4
4 HOLD# SI/SIO0 2 PCH_SPI_SO_0_R UMA 1 This strap should sample LOW. 4
GND SO/SIO1
ACES_91960-0084N_MX25L3206EM2I
CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

PCH(2/7)SPI,SATA,XDP
Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 17 of 61
A B C D E
A B C D E

HDA for AUDIO


<39> ME_EN 1 @ 2
RH47 0_0402_5%

RPH6
1 8 HDA_SDOUT
<40> HDA_SDOUT_R HDA_RST#
<40> HDA_RST_AUDIO# 2 7
3 6 HDA_SYNC UH1E
<40> HDA_SYNC_R HDA_BIT_CLK
<40> HDA_BIT_CLK_R 4 5
SPT-H_PCH
33_0804_8P4R_5% BB3 PCH_DP2_CTRL_CLK
HDA_SDIN0 GPP_I7/DDPC_CTRLCLK PCH_DP2_CTRL_DATA PCH_DP2_CTRL_CLK <31>
AW4 BD6 +3VS
<40> HDA_SDIN0 PCH_DP2_HPD GPP_I0/DDPB_HPD0 GPP_I8/DDPC_CTRLDATA PCH_DP2_CTRL_DATA <31>HDMI
1 HDMI <31> PCH_DP2_HPD AY2 BA5 1
AV4 GPP_I1/DDPC_HPD1 GPP_I5/DDPB_CTRLCLK BC4
EC_SCI#_I3 BA4 GPP_I2/DDPD_HPD2 GPP_I6/DDPB_CTRLDATA BE5
T14 GPP_I3/DDPE_HPD3 GPP_I9/DDPD_CTRLCLK
@ PAD BE6
GPP_I10/DDPD_CTRLDATA CRB 8.2K
Y44 PM_CLKRUN# 1 2
+3VALW_PCH_PRIM GPP_F14 H_SKTOCC# <9>
V44 RH48 10K_0402_5%
RPH7 PCH_EDP_HPD GPP_F23
<30> PCH_EDP_HPD BD7 W39
8 1 SYS_RESET# GPP_I4/EDP_HPD GPP_F22 L43
7 2 PCH_PWROK GPP_G23 L44
6 3 EC_RSMRST# GPP_G22 U35
LAN_WAKE# GPP_G21

0.047U_0402_16V7K
+3VALW_DSW 5 4 2 1 R35
GPP_G20

.1U_0402_16V7K
CH64 CH62 BD36
10K_0804_8P4R_5% GPP_H23

1 2 XEMC@
Follow 543016_SKL_U_Y_PDG_0_9 XEMC@ 5 OF 12
SKL-H-PCH_BGA837
@ REV = 1.3 ?
+3VALW_DSW
CRB 8.2K
1 2 PM_BATLOW# UH1D SPT-H_PCH
WAKE# (DSX wake event)
RH49 10K_0402_5% +3VALW_PCH_PRIM
AC_PRESENT_R 10 KΩ pull- up t o Vcc DS W3_3
1 @ 2 The pull-up is required even if PCIe* interface
RH50 10K_0402_5% HDA_BIT_CLK BA9 BB17
1 2
is not used on the plat f or m
. HDA_RST# BD8 HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF# AW22 PM_CLKRUN#
WAKE#
HDA_SDIN0 HDA_RST# GPP_A8/CLKRUN# PM_CLKRUN# <41> PCH_VRALERT#
RH51 1K_0402_5% BE7 2 @ 1
BC8 HDA_SDI0 AR15 RH52 10K_0402_5% +3VALW_DSW
HDA_SDI1 GPD11/LANPHYPC
HDA_SDOUT BB7 AV13 SLP_WLAN#
HDA_SYNC HDA_SDO GPD9/SLP_WLAN# PAD @ T15 PBTN_OUT#_R
BD9 2 1
HDA_SYNC BC14 DDR_DRAMRST# RH53 100K_0402_5%
DRAM_RESET# PCH_VRALERT# DDR_DRAMRST# <14>
BD1 BD23
EC_RSMRST# 2 @ 1 PCH_DPWROK BE2 RSVD_BD1 GPP_B2/VRALERT# AL27 CC_CHG_HI#
2
close to PCH RSVD_BE2 GPP_B1 LAN_GPO CC_CHG_HI# <35> PBTN_OUT#_R 2
RH54 0_0402_5% AR27 LAN_GPO <32> 1 @ 2 PBTN_OUT# <39>
RH56 1 2CPU_DISPA_SDO_R AM1 AUDIO GPP_B0 N44 RH55 0_0402_5%
SYS_PWROK 2 PCH_PWROK <6> CPU_DISPA_SDO DISPA_SDO GPP_G17/ADR_COMPLETE
@ 1 <6> CPU_DISPA_SDI_R 30_0402_1% CPU_DISPA_SDI_R AN2 AN24
RH57 0_0402_5% RH58 1 2CPU_DISPA_BCLK_R AM2 DISPA_SDI GPP_B11 AY1 SYS_PWROK
<6> CPU_DISPA_BCLK DISPA_BCLK SYS_PWROK SYS_PWROK <39,43> AC_PRESENT_R
30_0402_1% 1 @ 2 AC_PRESENT <39>
AL42 BC13 WAKE# RH59 0_0402_5%
AN42 GPP_D8/I2S0_SCLK WAKE# BC15 PM_SLP_A#
GPP_D7/I2S0_RXD GPD6/SLP_A# SLP_LAN# PAD @ T16
AM43 AV15
GPP_D6/I2S0_TXD SLP_LAN# PAD @ T17 PM_SLP_S3#
AJ33 BC26
PCH_DMIC_DATA0 GPP_D5/I2S0_SFRM GPP_B12/SLP_S0# PM_SLP_S3# PAD @ T18
<40> PCH_DMIC_DATA0 AH44 AW15
+RTCVCC PCH_DMIC_CLK0 GPP_D20/DMIC_DATA0 GPD4/SLP_S3# PM_SLP_S4# PM_SLP_S3# <39,43>
AJ35 BD15
<40> PCH_DMIC_CLK0 GPP_D19/DMIC_CLK0 GPD5/SLP_S4# PM_SLP_S5# PM_SLP_S4# <39,43> PM_SLP_S4#
AJ38 BA13
GPP_D18/DMIC_DATA1 GPD10/SLP_S5# PAD @ T19 PAD @ T20
AJ42
RH60 1 2 20K_0402_5% PCH_SRTCRST# GPP_D17/DMIC_CLK1 AN15 SUSCLK
GPD8/SUSCLK PM_BATLOW# SUSCLK <34,37>
BD13
CH21 1 2 1U_0402_6.3V6K GPD0/BATLOW# BB19 SYS_PWROK 1 2
PCH_RTCRST# GPP_A15/SUSACK# PAD @ T21
BC10 BD19 1 @ 2 RH61 10K_0402_5%
PCH_SRTCRST# RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK SUSPWRDNACK <39>
Remove CLR ME BB10 RH62 0_0402_5%
SRTCRST# 1 2
PCH_PWROK AW11 BD11 LAN_WAKE# CH61 .1U_0402_16V7K
PCH_RTCRST# <39,43> PCH_PWROK EC_RSMRST# PCH_PWROK GPD2/LAN_WAKE# AC_PRESENT_R
RH63 1 2 20K_0402_5% <39> EC_RSMRST# BA11 BB15 XEMC@
RSMRST# GPD1/ACPRESENT BB13 PM_SLP_SUS# SYS_RESET# 1 2
PCH_DPWROK SLP_SUS# PBTN_OUT#_R PAD @ T22
CH23 1 2 1U_0402_6.3V6K AV11 AT13 CH22
PCH_SMBALERT# BB41 DSW_PWROK GPD3/PWRBTN# AW1 SYS_RESET# .1U_0402_16V7K
T23 @ PAD PCH_SMBCLK GPP_C2/SMBALERT# SYS_RESET# PCH_SPKR
JCMOS1 1 @ 2 0_0603_5% AW44 BD26 XEMC@

SMBUS
PCH_SMBDATA GPP_C0/SMBCLK GPP_B14/SPKR H_CPUPWRGD PCH_SPKR <40>
(SO-DIMM,G-sensor) BB43 AM3 H_CPUPWRGD <9>
JCMOS2 1 @ 2 0_0603_5% PCH_SML0ALERT#BA40 GPP_C1/SMBDATA PROCPWRGD
CLR CMOS T24 @ PAD PCH_SML0CLK AY44 GPP_C5/SML0ALERT# AT2 XDP_ITP_PMODE
PCH_SML0DATA BB39 GPP_C3/SML0CLK ITP_PMODE CPU_XDP_TCK0 PAD @ T204
Place at RAM DOOR AR3
PCH_SML1ALERT# AT27 GPP_C4/SML0DATA JTAGX CPU_XDP_TMS CPU_XDP_TCK0 <6,9>
T25 @ PAD JTAG AR2
PCH_SML1CLK AW42 GPP_B23/SML1ALERT#/PCHHOT# JTAG_TMS CPU_XDP_TDO CPU_XDP_TMS <6,9>
AP1
PCH_SML1DATA AW45 GPP_C6/SML1CLK JTAG_TDO CPU_XDP_TDI CPU_XDP_TDO <6,9>
AP2
GPP_C7/SML1DATA JTAG_TDI PCH_JTAG_TCK1 CPU_XDP_TDI <6,9>
AN3
JTAG_TCK PCH_JTAG_TCK1 <6>
(VGA, EC, RTD2168) 4 OF 12
3 3
SKL-H-PCH_BGA837
@ REV = 1.3 ?
Functional Strap Definitions +3VALW_PCH_PRIM

1 2 PCH_SMBALERT# +3VS
RH64 4.7K_0402_5%
SMBALERT# / GPP_C2 +3VALW_PCH_PRIM
int. PD QH1A

2
0 = Disable Intel ME (TLS) (Default) 1 2 PCH_SML0CLK DMN66D0LDW-7_SOT363-6
1 = Enable Intel ME (TLS) RH65 499_0402_1%
PCH_SML0DATA PCH_SMBCLK D_CK_SCLK
1 2 6 1
D_CK_SCLK <14,15,38>
RH66 499_0402_1%
RPH8

5
8 1 EC_SMB_DA2 QH1B
SML0ALERT# / GPP_C5 +3VS EC_SMB_CK2
(DDR,G-Sensor)
7 2 DMN66D0LDW-7_SOT363-6
int. PD 6 3 PCH_SML1CLK PCH_SMBDATA 3 4 D_CK_SDATA
+3VALW_PCH_PRIM D_CK_SDATA <14,15,38>
0 = LPC Is selected for EC. (Default) 5 4 PCH_SML1DATA
1 = eSPI Is selected for EC.
2.2K_0804_8P4R_5%

+3VS
SML1ALERT# / PCHHOT# / GPP_B23 +3VALW_PCH_PRIM
int. PD RPH9
8 1 PCH_SMBDATA
7 2 PCH_SMBCLK QH2A

2
6 3 D_CK_SCLK DMN66D0LDW-7_SOT363-6
SPKR / GPP_B14 +3VS
5 4 D_CK_SDATA
int. PD PCH_SML1CLK 6 1 EC_SMB_CK2
EC_SMB_CK2 <23,39>
0 = Disable “ Top S wap” mode. ( Def ault ) 2.2K_0804_8P4R_5%
1 = Enable “ Top S wap” mode. (EC, VGA)

5
QH2B
PDG_0_71 requirement PH to +3V_PCH DMN66D0LDW-7_SOT363-6
PCH_SML1DATA 3 4 EC_SMB_DA2
4 HDA_SDO DDPC_CTRLDATA / GPP_I8 10/14 Dan EC_SMB_DA2 <23,39> 4
int. PD int. PD
0 = Enable security measures defined in the Flash 0 = Port C is not detected.
Descriptor. (Default) 1 = Port C is detected. (Default)
1 = Disable Flash Descriptor Security (override).

DDPB_CTRLDATA / GPP_I6 DDPD_CTRLDATA / GPP_I10 Compal Secret Data


int. PD int. PD
Security Classification
2016/01/29 2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
0 = Port B is not detected. 0 = Port D is not detected. (Default)
PCH(3/7)GPIO,SMBUS
Laptopblue.vn
Laptopblue.vn
1 = Port B is detected. (Default) 1 = Port D is detected. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 18 of 61
A B C D E
A B C D E

1 1

+3VS
RPH10
8 1 LAN_CLKREQ# UH1G SPT-H_PCH
7 2 CLKREQ_PCIE#3 AR17
6 3 CLKREQ_PCIE#5 GPP_A16/CLKOUT_48
5 4 NGFF_CLKREQ# G1 L1 CLK_CPU_ITP#
<9> CPU_24M CLKOUT_CPUNSSC_P CLKOUT_ITPXDP_N CLK_CPU_ITP @ T26 PAD
F1 L2 @ T27 PAD
<9> CPU_24M# CLKOUT_CPUNSSC_N CLKOUT_ITPXDP_P CPU_PCIBCLK#
10K_0804_8P4R_5% J1
CLKOUT_CPUPCIBCLK_N CPU_PCIBCLK CPU_PCIBCLK# <9>
G2 J2
RPH11 <9> CPU_BCLK CLKOUT_CPUBCLK_P CLKOUT_CPUPCIBCLK_P CPU_PCIBCLK <9>
H2
CLKREQ_PCIE#12 <9> CPU_BCLK# CLKOUT_CPUBCLK_N
8 1
7 2 CLKREQ_PCIE#7 XTAL24_OUT A5 N7 CLK_PEG_VGA#
CLKREQ_PCIE#10 XTAL24_IN XTAL24_OUT CLKOUT_PCIE_N0 CLK_PEG_VGA CLK_PEG_VGA# <23>
6 3 A6 N8 DGPU
WLAN_CLKREQ# XTAL24_IN CLKOUT_PCIE_P0 CLK_PEG_VGA <23>
5 4
2 1 XCLK_BIASREF E1 L7 CLK_PCIE_LAN#
+1.0VALW_VCCCLK5 XCLK_BIASREF CLKOUT_PCIE_N1 CLK_PCIE_LAN CLK_PCIE_LAN# <32>
10K_0804_8P4R_5% RH67 L5 GLAN
CLKOUT_PCIE_P1 CLK_PCIE_LAN <32>
FOLLOW RVP11 2.7K_0402_1% RTCX1 BC9
RPH12 RTCX1 CLK_PCIE_WLAN#
RTCX2 BD10 D3
CLKREQ_PCIE#9 RTCX2 CLKOUT_PCIE_N2 CLK_PCIE_WLAN CLK_PCIE_WLAN# <37>
8 1 F2 NGFF WL+BT(KEY E)
CLKREQ_PCIE#8 VGA_CLKREQ# CLKOUT_PCIE_P2 CLK_PCIE_WLAN <37>
7 2 PH at DGPU side BC24
6 3 CLKREQ_PCIE#6 LAN_CLKREQ# AW24 GPP_B5/SRCCLKREQ0# E5
CLKREQ_PCIE#13 <32> LAN_CLKREQ# WLAN_CLKREQ# GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_N3
5 4 <37> WLAN_CLKREQ# AT24 G4
CLKREQ_PCIE#3 BD25 GPP_B7/SRCCLKREQ2# CLKOUT_PCIE_P3
10K_0804_8P4R_5% NGFF_CLKREQ# BB24 GPP_B8/SRCCLKREQ3# D5 CLK_PCIE_NGFF#
<34> NGFF_CLKREQ# CLKREQ_PCIE#5 GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_N4 CLK_PCIE_NGFF CLK_PCIE_NGFF# <34>
BE25 E6 M2 SSD
RPH13 CLKREQ_PCIE#6 GPP_B10/SRCCLKREQ5# CLKOUT_PCIE_P4 CLK_PCIE_NGFF <34>
AT33
8 1 CLKREQ_PCIE#14 CLKREQ_PCIE#7 AR31 GPP_H0/SRCCLKREQ6# D8
7 2 CLKREQ_PCIE#11 CLKREQ_PCIE#8 BD32 GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_N5 D7
6 3 CLKREQ_PCIE#15 CLKREQ_PCIE#9 BC32 GPP_H2/SRCCLKREQ8# CLKOUT_PCIE_P5
5 4 CLKREQ_PCIE#10 BB31 GPP_H3/SRCCLKREQ9# R8
CLKREQ_PCIE#11 BC33 GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_N6 R7
10K_0804_8P4R_5% CLKREQ_PCIE#12 BA33 GPP_H5/SRCCLKREQ11# CLKOUT_PCIE_P6
CLKREQ_PCIE#13 AW33 GPP_H6/SRCCLKREQ12# U5
2 CLKREQ_PCIE#14 BB33 GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_N7 U7 2
CLKREQ_PCIE#15 BD33 GPP_H8/SRCCLKREQ14# CLKOUT_PCIE_P7
Follow PDG 0.71Table 52-17
GPP_H9/SRCCLKREQ15# W10
10/13 Dan CLKOUT_PCIE_N8
CHECK NEEDED IF UNUSE? R13 W11
R11 CLKOUT_PCIE_N15 CLKOUT_PCIE_P8
+3VS CLKOUT_PCIE_P15 N3
P1 CLKOUT_PCIE_N9 N2
R2 CLKOUT_PCIE_N14 CLKOUT_PCIE_P9
CLKOUT_PCIE_P14
1

P3
RH68 W7 CLKOUT_PCIE_N10 P2
10K_0402_5% Y5 CLKOUT_PCIE_N13 CLKOUT_PCIE_P10
CLKOUT_PCIE_P13 R3
U2 CLKOUT_PCIE_N11 R4
2

VGA_CLKREQ# U3 CLKOUT_PCIE_N12 CLKOUT_PCIE_P11


<23> VGA_CLKREQ# CLKOUT_PCIE_P12 7 OF 12

SKL-H-PCH_BGA837 ?
@ REV = 1.3

3 3

RTCX1 XTAL24_OUT

RTCX2 XTAL24_IN

1 2 1 2
RH71 10M_0402_5% RH72 1M_0402_5%

YH2
YH1 24MHZ_12PF_7V24000020
1 2
3 1
3 1
15P_0402_50V8J

15P_0402_50V8J

32.768KHZ_9PF_CM7V-T1A9.0PF20PPM
GND GND
8.2P_0402_50V8D

8.2P_0402_50V8D

CH24

CH25

1 1 4 2
CH26

CH27

2 2

DVT modify

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

PCH(4/7)CLK
Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 19 of 61
A B C D E
A B C D E

Functional Strap Definitions


GSPI1_MOSI / GPP_B22
int. PD
Boot BIOS Destination
0 = SPI (Default)
1 = LPC

GSPI0_MOSI / GPP_B18
1 int. PD 1
0 = Disable “ No Reboot ” mode. ( Def ault)
1 = Enable “ No Reboot ” mode ( PCH w ill di sable t he T CO
Timer system reboot feature).

+3VS
3/17 PCH internal PU
need confirm with BIOS

2 1 EC_SCI#
EC_SCI# <39>
RH14 10K_0402_5%
EC_SCI#_B20 RH17 1 @ 2 0_0402_5%
PVT modify

EC_KBRST#_R 1 @ 2
<16,39> EC_KBRST#_R
RH110 0_0402_5%

DVT modify

+3VS

2 1 UART_2_CRXD_DTXD UH1K SPT-H_PCH


RH73 49.9K_0402_1% AT29
2 1 UART_2_CTXD_DRXD AR29 GPP_B22/GSPI1_MOSI AL44 VGA_ID
RH74 49.9K_0402_1% EC_SCI#_B20 AV29 GPP_B21/GSPI1_MISO GPP_D9 AL36 RANK_ID
2 @ 1 UART_2_CCTS_DRTS DVT modify BC27 GPP_B20/GSPI1_CLK GPP_D10 AL35 PROJECT_ID0
RH76 49.9K_0402_1% GPP_B19/GSPI1_CS# GPP_D11 AJ39 PROJECT_ID1
2 @ 1 UART_2_CRTS_DCTS BD28 GPP_D12
RH75 49.9K_0402_1% GC6_FB_EN BD27 GPP_B18/GSPI0_MOSI AJ43
AW27 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS# AL43
2 TS_EN AR24 GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS# AK44 2
+3VS <30> TS_EN GPP_B15/GSPI0_CS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL AK45
AV44 GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA
1 @ 2 PCH_AC_DET BA41 GPP_C9/UART0_TXD
I2C_0_SCL <23,39> DGPU_AC_DETECT GPP_C8/UART0_RXD
1 2 RH77 AU44
RH78 1K_0402_5% 0_0402_5% GPU_EVENT_R# AV43 GPP_C11/UART0_CTS#
+3VALW_PCH_PRIM 1 2 I2C_0_SDA GPP_C10/UART0_RTS#
RH79 1K_0402_5% AU41 BC38
I2C_1_SCL GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL PAD @ T28
1 2 AT44 BB38
DGPU_HOLD_RST# GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA PAD @ T29
RH80 2.2K_0402_5% AT43
I2C_1_SDA <23> DGPU_HOLD_RST# DGPU_PWR_EN GPP_C13/UART1_TXD/ISH_UART1_TXD
1 2 AU43 BD38
<23,43> DGPU_PWR_EN GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL PAD @ T30
RH81 2.2K_0402_5% BE39
UART_2_CCTS_DRTS GPP_H21/ISH_I2C1_SDA PAD @ T31 +3VS
AN43
UART_2_CRTS_DCTS AN44 GPP_C23/UART2_CTS#
<Touch PAD/PNL> UART_2_CTXD_DRXD AR39 GPP_C22/UART2_RTS#
<37> UART_2_CTXD_DRXD UART_2_CRXD_DTXD GPP_C21/UART2_TXD
+3VS AR45 BC22 1 @ 2
<37> UART_2_CRXD_DTXD GPP_C20/UART2_RXD GPP_A23/ISH_GP5 BD18 RH82 10K_0402_5%
I2C_1_SCL GPP_A22/ISH_GP4 PAD @ T32
AR41 BE21
<41> I2C_1_SCL I2C_1_SDA GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 PAD @ T33 G_INT#
AR44 BD22
2 VGA@ 1 DGPU_PWR_EN <Touch PAD> <41> I2C_1_SDA I2C_0_SCL AR38 GPP_C18/I2C1_SDA GPP_A20/ISH_GP2 BD21
G_INT# <38>
<30> I2C_0_SCL I2C_0_SDA GPP_C17/I2C0_SCL GPP_A19/ISH_GP1 PAD @ T34
RH83 10K_0402_5% AT42 BB22
<Touch PNL> <30> I2C_0_SDA PCH_GPP_D4 AM44 GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 BC19 2 @ 1
DGPU_HOLD_RST# @ PAD GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA GPP_A17/ISH_GP7
2 VGA@ 1 AJ44 RH84
RH85 10K_0402_5% T35 GPP_D23/ISH_I2C2_SCL/ISH_I2C3_SCL 100K_0402_5%
11 OF 12

SKL-H-PCH_BGA837
REV = 1.3 ?
@

GPU_EVENT# 1 @ 2 GPU_EVENT_R#
<23> GPU_EVENT#
RH86 0_0402_5%
GC6_FB_EN3V3 1 @ 2 GC6_FB_EN
3 TO DGPU <23> GC6_FB_EN3V3
RH87 0_0402_5%
3

PVT modify

+3VALW_PCH_PRIM +3VALW_PCH_PRIM
@
VGA_ID 1 G1@ 2 PROJECT_ID0 1 2
RH88 10K_0402_5% RH89 10K_0402_5%
1 G0@ 2 1 2
RH90 10K_0402_5% RH91 10K_0402_5%
RANK_ID 1 VGA@ 2 PROJECT_ID1 1 @ 2
RH92 10K_0402_5% RH93 10K_0402_5%
1 2 1 2
RH94 @ 10K_0402_5% RH95 10K_0402_5%

VGA_ID GPP_D9
G0 0 Project_ID1 Project_ID0
Project ID
G1 1 GPP_D12 GPP_D11
* C5PM2 0 0
RANK_ID GPP_D10 Reserved 0 1
4 4
DR 0 Reserved 1 0
SR 1 Reserved 1 1

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

PCH(5/7)UART,I2C,GPIO
Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 20 of 61
A B C D E
A B C D E

PVT modify
+3VALW +3VALW_DSW +3VALW_PCH_PRIM
+1.0VALW +1.0VALW_PRIM
RH97 1 @ 2 0_0603_5%
CH29 1 2 1U_0402_6.3V6K
RH96 1 @ 2 0_0805_5% @ Near PIN BD3,BE3,BE4
+3VALW_PCH_PRIM

RH99 1 @ 2 0_0805_5%
CH33 1 2 1U_0402_6.3V6K
+1.0VALW_PCH @ Near PIN BA20
+3VALW_HDA

RH98 1 @ 2 0_0805_5% 1 @ 2
RH100 0_0402_5% CH35 1 2 .1U_0402_16V7K
PVT modify Near PIN AN5
1 1

RH137 for Deep SX. +3VALW_PCH_PRIM +3VALW_SPI CH36 1 2 1U_0402_6.3V6K


No requirment
+1.0VALW_PCH +1.0VALW_DCPDSW Near PIN BC44
1 @ 2 1
1 @ 2 RH102 0_0402_5%
RH101 0_0402_5% Near PIN CH66 CH37 1 2 .1U_0402_16V7K
1 BA29 .1U_0402_16V7K Near PIN BC42,BD40
2
CH28 PCH_EDS Table10-4 DVT modify
1U_0402_6.3V6K 12/30 J
2 CH38 1 2 .1U_0402_16V7K
+1.0VALW_PRIM Near PIN AJ41 , AL41
UH1H SPT-H_PCH

2.899A AA23
+1.0VALW_VCCCLK AA26 VCCPRIM_1P0 CH43 1 2 .1U_0402_16V7K
AA28 VCCPRIM_1P0 AL22 0.0908A Near PIN AD41
VCCPRIM_1P0 VCCPRIM_1P0 +1.0VALW_PRIMAL22

CORE
RH103 AC23
1 @ 2 AC26 VCCPRIM_1P0 BA24 0.195A
VCCPRIM_1P0 VCCDSW_3P3 +3VALW_DSW
AC28 BA31 0.082A +3VALW_PCH_PRIM
VCCPRIM_1P0 VCCPGPPA

VCCGPIO
0_0603_5% PVT modify AE23 CH45 1 2 .1U_0402_16V7K
AE26 VCCPRIM_1P0 BC42 0.2726A
Y23 VCCPRIM_1P0 VCCPGPPBCH BD40 CH46 1 2 1U_0402_6.3V6K
LH1 +1.0VALW_VCCCLK5 Y25 VCCPRIM_1P0 VCCPGPPBCH AJ41 0.1410A Near PIN BA20
FBMA-L11-160808-800LMT_0603 0.0454A BA29 VCCPRIM_1P0 VCCPGPPEF AL41
+1.0VALW_DCPDSW DCPDSW_1P0 VCCPGPPEF
1 2 AD41 0.1318A
Near PIN 0.021A N17 VCCPGPPG AN5 0.2875A
+1.0VALW_VCCCLK VCCCLK1 VCCPRIM_3P3
22U_0603_6.3V6M

1 1 1 K2,K3 0.050A R19


VCCCLK3
CH31

0.024A U20
CH30 CH32 0.137A V17 VCCCLK4 AD15 0.0061A +3VS +3VS_VCCATS
VCCCLK2 VCCPRIM_1P0 +1.0VALW_PRIMAD15
22U_0603_6.3V6M 1U_0402_6.3V6K R17 AD13 0.007A +3VS_VCCATS
2 2 2 0.006A K2 VCCCLK2 VCCATS BA20 0.0002A 1 @ 2 CH50 1 2 1U_0402_6.3V6K
2 @ VCCCLK5 VCCRTCPRIM_3P3 +3VALW_PCH_PRIM 2
+1.0VALW_VCCCLK5 K3 BA22 +RTCVCC Near PIN BA26 RH105 0_0402_5% @ Near PIN
VCCCLK5 VCCRTC BA26 1 2 AD13
DCPRTC CH34 .1U_0402_16V7K
+1.0VALW_MPHY 1.307A U21 AJ20 +1.0VALW_PRIM
VCCMPHY_1P0 VCCPRIM_1P0

MPHY
U23 AJ21
U25 VCCMPHY_1P0 VCCPRIM_1P0 AJ23
U26 VCCMPHY_1P0 VCCPRIM_1P0 AJ25
V26 VCCMPHY_1P0 VCCPRIM_1P0
0.110A A43 VCCMPHY_1P0
+1.0VALW_AMPHYPLL VCCMPHYPLL_1P0
B43 BE41 0.029A +3VALW_SPI
C44 VCCMPHYPLL_1P0 VCCSPI BE43
modify follow PDG 05/18 C45 VCCPCIE3PLL_1P0 VCCSPI BE42
0.030A V28 VCCPCIE3PLL_1P0 VCCSPI BC44 0.078A
+1.0VALW_MPHY VCCAPLLEBB_1P0 VCCPGPPD +3VALW_PCH_PRIM
0.533A AC17 BA45
VCCPRIM_1P0 VCCPGPPD

USB
+1.0VALW_AUSB_AZPLL 0.012A AJ5 BC45
PVT modify AL5 VCCUSB2PLL_1P0 VCCPGPPD BB45
+1.0VALW_MPHY 0.033A AN19 VCCUSB2PLL_1P0 VCCPGPPD
RH104 modify follow PDG 05/18 VCCHDAPLL_1P0 BD3 0.117A
VCCPRIM_3P3 +3VALW_PCH_PRIM
1 @ 2 +3VALW_HDA 0.075A BA15 BE3
W15 VCCHDA VCCPRIM_3P3 BE4
+3VALW_DSW VCCDSW_3P3 VCCPRIM_3P3
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

0_0603_5% 1 1 1 1 8 OF 12
CH40

CH41

CH42

CH39
SKL-H-PCH_BGA837
22U_0603_6.3V6M 1 ?
2 2 2 2 @ REV = 1.3
NO USE MPHYGT ON H CH44
CHANGE TO +1.0VALW_MPHY
1U_0402_6.3V6K
2 +3VALW_PCH_PRIM +1.0VALW_PRIM
Near PIN Near PIN V28

1U_0402_6.3V6K

1U_0402_6.3V6K
U21,U23,U25,U26,V26 Near PIN AC17 1 1

CH51

CH52
Near PIN W15 @ @
+1.0VALW_AMPHYPLL Add 05/18
2 2
3 LH2 1 2 3
Near PIN
22U_0603_6.3V6M

FBMA-L11-160808-800LMT_0603 1 1 1 A42,A43,B43
CH48

CH47 CH49 +3VALW_PCH_PRIM +1.0VALW_PRIM


22U_0603_6.3V6M 1U_0402_6.3V6K
2 2 2
@

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
1 1 1 1

CH55

CH57

CH56

CH58
@
2
@
2
@
2
@
2
RTC Battery PreMP modify

+RTCVCC CHN202UPT_SC70-3
+1.0VALW_AUSB_AZPLL VCCMPHY power defined by HSIO lane qty.
2 +CHGRTC
LH3 1 2
Near PIN 1
FBMA-L11-160808-800LMT_0603 1 1 AJ5,AL5 1 1
3 1 2 +RTCBATT
CH53 CH54 CH60 CH59 RH163 10K_0402_5%
22U_0603_6.3V6M 22U_0603_6.3V6M .1U_0402_16V7K 1U_0402_6.3V6K DH3 W=20mils
2 2 2 2
Power Rail Voltage
PN : SC600000B00
+CHGRTC 3.383V(MAX) Near PIN BA22
09/26 dan
+1.0VALW_PRIMAL22 +RTCBATT
BAT54C(VF) 240 mV JRTC1
1 @ 2 1 3
RH106 0_0402_5% 2 1 NC1 4
2 NC2
+3VL_RTC 3.143V
ACES_50271-0020N-001
4 4
+1.0VALW_PRIMAD15 Result : Pass SP02000SJ00
CONN@
1 @ 2 parallel
RH107 0_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

PCH(6/7)POWER
Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 21 of 61
A B C D E
A B C D E

1 1

UH1I
UH1LSPT-H_PCH
SPT-H_PCH
AC18 AR5
AN4 VSS VSS AR7 C42 AB11
AN10 VSS VSS U15 D10 VSS VSS AB7
BE14 VSS VSS AL4 D12 VSS VSS AB14
BE18 VSS VSS AE29 D15 VSS VSS AB31
BE23 VSS VSS AE4 D16 VSS VSS AB32
BE28 VSS VSS AE42 D17 VSS VSS AB38
BE32 VSS VSS AF18 D19 VSS VSS AB4
BE37 VSS VSS AF20 D21 VSS VSS AB5
BE40 VSS VSS AF21 D24 VSS VSS AC1
BE9 VSS VSS AF23 D25 VSS VSS AC20
C10 VSS VSS AF25 D27 VSS VSS AC21
C2 VSS VSS AF26 D29 VSS VSS AC25
C28 VSS VSS AF28 D30 VSS VSS AC29
C37 VSS VSS AF29 D31 VSS VSS AC45
J7 VSS VSS AG11 D33 VSS VSS AB8
K10 VSS VSS AG13 D35 VSS VSS AD11
K27 VSS VSS AG31 D36 VSS VSS AD14
UH1J SPT-H_PCH K33 VSS VSS AG32 E13 VSS VSS AB15
K36 VSS VSS AG33 E15 VSS VSS AD32
K4 VSS VSS AG38 E31 VSS VSS AD33
K42 VSS VSS AG4 E33 VSS VSS AD36
BD2 AR22 K43 VSS VSS AH1 F44 VSS VSS AD4
BD45 VSS RSVD W13 L12 VSS VSS AH17 F8 VSS VSS AD8
BD44 VSS RSVD U13 L13 VSS VSS AH18 G42 VSS VSS AE18
BE44 VSS RSVD P31 L15 VSS VSS AH20 G9 VSS VSS AE20
D45 VSS RSVD N31 L4 VSS VSS AH21 H17 VSS VSS AE21
2
A42 VSS RSVD L41 VSS VSS AH23 H19 VSS VSS AE25 2
B45 VSS P27 L8 VSS VSS AH25 H22 VSS VSS AE28
B44 VSS RSVD R27 M35 VSS VSS AH26 H24 VSS VSS AL10
A4 VSS RSVD N29 M42 VSS VSS AH28 H27 VSS VSS AL11
A3 VSS RSVD P29 N10 VSS VSS AH29 H29 VSS VSS AL13
B2 VSS RSVD AN29 N15 VSS VSS AH45 H3 VSS VSS AL17
A2 VSS RSVD R24 N19 VSS VSS AJ10 H35 VSS VSS AL19
B1 VSS RSVD P24 N22 VSS VSS AJ14 J10 VSS VSS AL24
BB1 VSS RSVD AT3 N24 VSS VSS AJ15 J11 VSS VSS AL29
BC1 VSS PREQ# AT4 N35 VSS VSS AJ17 J3 VSS VSS AL32
A44 VSS PRDY# AY5 N36 VSS VSS AJ18 J39 VSS VSS AL33
VSS CPU_TRST# AL2 PROC_TRIGIN N4 VSS VSS AJ26 J5 VSS VSS AL38
C1 PCH_TRIGOUT AK1 PROC_TRIGOUT_R N41 VSS VSS AJ28 T42 VSS VSS AM15
D1 RSVD PCH_TRIGIN N5 VSS VSS AJ29 U10 VSS VSS AM17
RSVD 2 1 P17 VSS VSS AJ31 U11 VSS VSS AM19
PROC_TRIGIN_R <13> VSS VSS VSS VSS
10 OF 12 RH108 30_0402_1% P19 AJ32 U14 AM22
P22 VSS VSS AJ36 U17 VSS VSS AM24
PROC_TRIGOUT_R <13> VSS VSS VSS VSS
P45 AK4 U18 AM27
SKL-H-PCH_BGA837 ? VSS VSS VSS VSS
R10 AK42 U28 AM29
@ REV = 1.3 R14 VSS VSS AU7 U29 VSS VSS AM45
R22 VSS VSS AV17 U31 VSS VSS AN11
R29 VSS VSS AV24 U32 VSS VSS AN22
R33 VSS VSS AV27 U33 VSS VSS AN27
R38 VSS VSS AV31 U38 VSS VSS AN31
R5 VSS VSS AV33 U4 VSS VSS AN39
T1 VSS VSS AV6 U8 VSS VSS AN7
T2 VSS VSS AW13 V18 VSS VSS AN8
T4 VSS VSS AW19 V20 VSS VSS AP11
Y18 VSS VSS AW29 V21 VSS VSS AP4
Y20 VSS VSS AW37 V23 VSS VSS AR33
Y21 VSS VSS AW9 V25 VSS VSS AR34
Y26 VSS VSS AY38 V29 VSS VSS AR42
Y28 VSS VSS AY45 V3 VSS VSS AR9
Y29 VSS VSS B25 V45 VSS VSS AT10
A18 VSS VSS B3 W14 VSS VSS AT15
3 3
A25 VSS VSS B37 W31 VSS VSS AT36
A32 VSS VSS B40 W32 VSS VSS AT9
A37 VSS VSS B6 W33 VSS VSS AU1
AA17 VSS VSS BA1 W38 VSS VSS AU35
AA18 VSS VSS BB11 W4 VSS VSS AU36
AA20 VSS VSS BB16 W8 VSS VSS AU39
AA21 VSS VSS BB21 Y17 VSS VSS AU45
AA25 VSS VSS BB25 VSS VSS C4
AA29 VSS VSS BB30 VSS
AA4 VSS VSS BB34
AA42 VSS VSS BC2
AB10 VSS VSS BD43 12 OF 12
VSS 9 OF 12 VSS

SKL-H-PCH_BGA837
SKL-H-PCH_BGA837? ?
@ REV = 1.3
@ REV = 1.3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

PCH(7/7)GND
Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 22 of 61
A B C D E
A B C D E

+1.8VSDGPU_AON
RVP1
UV1A DVT modify +1.8VSDGPU_AON 10K_0804_8P4R_5%
VGA_OVERT# 8 1
AN12 Part 1 of 7 VGA_ALERT 7 2
<8> PEG_HTX_C_GRX_P0

5
AM12 PEX_RX0 P6 DGPU_VID VGA@ FRM_LCK# 6 3
<8> PEG_HTX_C_GRX_N0 PEX_RX0_N GPIO0 GC6_FB_EN1V8 DGPU_VID <58> ACIN_BUF
AN14 M3 VGA@ 5 4

VCC
<8> PEG_HTX_C_GRX_P1 PEX_RX1 GPIO1 GPU_EVENT#_1 PLTRST_VGA#_1V8 1
AM14 L6 DV1 2 1
<8> PEG_HTX_C_GRX_N1 PEX_RX1_N GPIO2 DGPU_S_VID GPU_EVENT# <20> IN B VGA_GATE
AP14 P5 4 VGA@
<8> PEG_HTX_C_GRX_P2 PEX_RX2 GPIO3 1.8VSDGPU_MAIN_EN DGPU_S_VID <59> OUT Y
AP15 P7 RB751S40T1G_SOD523-2 2 1

GND
<8> PEG_HTX_C_GRX_N2 PEX_RX2_N GPIO4 FRM_LCK# 1.8VSDGPU_MAIN_EN <43> +1.8VSDGPU_MAIN IN A
AN15 L7 RVP2
<8> PEG_HTX_C_GRX_P3 PEX_RX3 GPIO5 DGPU_PSI
AM15 M7 CV201 10K_0804_8P4R_5%
<8> PEG_HTX_C_GRX_N3 PEX_RX3_N GPIO6 DGPU_PSI <58,59> GPU_EVENT#_1
AN17 N8 UV12 0.01U_0402_16V7K 8 1
<8> PEG_HTX_C_GRX_P4

3
AM17 PEX_RX4 GPIO7 L3 VRAM_VDD_CTL NL17SZ08DFT2G_SC70-5 2 VGA@ VRAM_VREF_CTL 7 2
<8> PEG_HTX_C_GRX_N4 PEX_RX4_N GPIO8 VGA_ALERT VRAM_VDD_CTL <56> GC6_FB_EN1V8
AP17 M2 6 3
<8> PEG_HTX_C_GRX_P5 PEX_RX5 GPIO9 VRAM_VREF_CTL 1.8VSDGPU_MAIN_EN
AP18 L1 5 4
1 <8> PEG_HTX_C_GRX_N5 PEX_RX5_N GPIO10 VRAM_VREF_CTL <28,29> 1
AN18 M5
<8> PEG_HTX_C_GRX_P6 PEX_RX6 GPIO11 ACIN_BUF
AM18 N3 DV2 2 1 VGA@

GPIO
<8> PEG_HTX_C_GRX_N6 PEX_RX6_N GPIO12 DGPU_AC_DETECT <20,39>
AN20 M4
<8> PEG_HTX_C_GRX_P7 PEX_RX7 GPIO13 SYS_PEX_RST_MON#
AM20 N4 RB751S40T1G_SOD523-2 RV1 2 VGA@ 1 10K_0402_5%
<8> PEG_HTX_C_GRX_N7 PEX_RX7_N GPIO14 VGA_I2CS_SDA
AP20 P2 VGA@ RV2 1 VGA@ 2 1.8K_0402_1%
<8> PEG_HTX_C_GRX_P8 PEX_RX8 GPIO15 SYS_PEX_RST_MON# VGA_I2CS_SCL
AP21 R8 RV3 1 VGA@ 2 1.8K_0402_1%
<8> PEG_HTX_C_GRX_N8 PEX_RX8_N GPIO16 DGPU_PSI
AN21 M6 RV4 2 VGA@ 1 10K_0402_5%
<8> PEG_HTX_C_GRX_P9 PEX_RX9 GPIO17 GPU_PEX_RST_HOLD#
AM21 R1 RV82 2 VGA@ 1 10K_0402_5%
<8> PEG_HTX_C_GRX_N9 PEX_RX9_N GPIO18 NVVDDS_PSI
AN23 P3 RV84 2 @ 1 10K_0402_5%
<8> PEG_HTX_C_GRX_P10 PEX_RX10 GPIO19 NVVDDS_PSI
AM23 P4
<8> PEG_HTX_C_GRX_N10 PEX_RX10_N GPIO20 VGA_GATE
AP23 P1
<8> PEG_HTX_C_GRX_P11 PEX_RX11 GPIO21 VGA_GATE
AP24 P8
<8> PEG_HTX_C_GRX_N11 PEX_RX11_N GPIO22 GPU_PEX_RST_HOLD#
AN24 T8
<8> PEG_HTX_C_GRX_P12 PEX_RX12 GPIO23
AM24 L2
<8> PEG_HTX_C_GRX_N12

5
AN26 PEX_RX12_N GPIO24 R4 QV1A QV2A
<8> PEG_HTX_C_GRX_P13 PEX_RX13 GPIO25
AM26 R5 PJT138KA 2N SOT363-6 PJT138KA 2N SOT363-6

G
<8> PEG_HTX_C_GRX_N13 PEX_RX13_N GPIO26 VGA_OVERT# VGA_I2CS_SCL
AP26 U3 <25> VGA_OVERT# 4 3 GPU_OVERT# <39> 4 3
<8> PEG_HTX_C_GRX_P14 PEX_RX14 GPIO27 EC_SMB_CK2 <18,39>

D
AP27
<8> PEG_HTX_C_GRX_N14 PEX_RX14_N VGA_GATE VGA_GATE
AN27
<8> PEG_HTX_C_GRX_P15 PEX_RX15
AM27 AK9
<8> PEG_HTX_C_GRX_N15

2
PEX_RX15_N NC AL10 QV1B

2
NC AL9 PJT138KA 2N SOT363-6 QV2B

G
AK14 NC AM9 VGA_ALERT 1 6 PJT138KA 2N SOT363-6

G
<8> PEG_GTX_HRX_P0 PEX_TX0 NC GPU_ALERT <39> VGA_I2CS_SDA

D
<8> PEG_GTX_HRX_N0 AJ14 AN9 1 6 EC_SMB_DA2 <18,39>
PEX_TX0_N NC

D
<8> PEG_GTX_HRX_P1 AH14 AG10
AG14 PEX_TX1 NC AP8
<8> PEG_GTX_HRX_N1 PEX_TX1_N NC
<8> PEG_GTX_HRX_P2 AK15 AK26
AJ15 PEX_TX2 NC AJ26 ALL_GPWRGD
<8> PEG_GTX_HRX_N2 PEX_TX2_N NC
AL16
PCI EXPRESS
<8> PEG_GTX_HRX_P3 PEX_TX3
<8> PEG_GTX_HRX_N3 AK16

5
AK17 PEX_TX3_N 27MHZ_10PF_7V27000023
<8> PEG_GTX_HRX_P4 PEX_TX4
AJ17 PCH side

G
<8> PEG_GTX_HRX_N4 PEX_TX4_N DGPU_CLKREQ# 4
<8> PEG_GTX_HRX_P5 AH17 AP9 3 XTALOUT 2 RV80 1 XTALOUT_R 3 1 XTALIN
2 PEX_TX5 TS_VREF VGA_CLKREQ# <19> 3 1 2

D
<8> PEG_GTX_HRX_N5 AG17 0_0402_5%
AK18 PEX_TX5_N QV5A VGA@ VGA@ GND GND

12P_0402_50V8J

12P_0402_50V8J
<8> PEG_GTX_HRX_P6 PEX_TX6 1 1
<8> PEG_GTX_HRX_N6 AJ18 PJT138KA 2N SOT363-6 VGA@ VGA@ XV1 VGA@
AL19 PEX_TX6_N 4 2
<8> PEG_GTX_HRX_P7 PEX_TX7 +1.8VSDGPU_AON
<8> PEG_GTX_HRX_N7 AK19 CV1 CV2
AK20 PEX_TX7_N unused pin PH 2K to 1V8AON 2 2
<8> PEG_GTX_HRX_P8 PEX_TX8
<8> PEG_GTX_HRX_N8 AJ20
AH20 PEX_TX8_N R7 RV86 1 VGA@ 2 2K_0402_5%
<8> PEG_GTX_HRX_P9 PEX_TX9 I2CB_SCL
<8> PEG_GTX_HRX_N9 AG20 R6 RV85 1 VGA@ 2 2K_0402_5% DVT modify Crystals must have a max ESR of 80 ohm
AK21 PEX_TX9_N I2CB_SDA
<8> PEG_GTX_HRX_P10 PEX_TX10
I2C

AJ21 R2 RV5 1 VGA@ 2 2K_0402_5% +1.8VSDGPU_MAIN


<8> PEG_GTX_HRX_N10 PEX_TX10_N I2CC_SCL
<8> PEG_GTX_HRX_P11 AL22 R3 RV6 1 VGA@ 2 2K_0402_5%
AK22 PEX_TX11 I2CC_SDA
<8> PEG_GTX_HRX_N11 PEX_TX11_N VGA_I2CS_SCL
SM010019400
AK23 T4 +GPU_PLLVDD
<8> PEG_GTX_HRX_P12 PEX_TX12 I2CS_SCL VGA_I2CS_SDA 3000ma 33ohm@100mhz DCR 0.05
<8> PEG_GTX_HRX_N12 AJ23 T3
AH23 PEX_TX12_N I2CS_SDA VGA@ +3VS +1.8VSDGPU_AON
<8> PEG_GTX_HRX_P13 PEX_TX13 +GPU_PLLVDD
<8> PEG_GTX_HRX_N13 AG23 LV1 1 2
AK24 PEX_TX13_N CHILISIN PBY160808T-330Y-N
<8> PEG_GTX_HRX_P14

2
PEX_TX14

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

4.7U_0603_6.3V6K

22U_0603_6.3V6M
<8> PEG_GTX_HRX_N14 AJ24 1 1 1 1 1
AL25 PEX_TX14_N CV5 CV6 CV3 CV42 CV4 UV11 RV83
<8> PEG_GTX_HRX_P15 PEX_TX15
<8> PEG_GTX_HRX_N15 AK25 VGA@ 10K_0402_5%

5
PEX_TX15_N VGA@ VGA@ VGA@ VGA@ VGA@ MC74VHC1G09DFT2G_SC70-5 VGA@
AD8 2 2 2 2 2 1VS_DGPU_PG 1

G VCC

1
AJ11 XS_PLLVDD B 4 ALL_GPWRGD
NC Near GPU Y
AE8 <56> 1.35VS_DGPU_PG 2
AL13 SP_PLLVDD +3VS A
<19> CLK_PEG_VGA PEX_REFCLK Near AD7 Near AD8 Near AE8
AK13 AD7
<19> CLK_PEG_VGA#

3
DGPU_CLKREQ# AK12 PEX_REFCLK_N VID_PLLVDD
PEX_CLKREQ_N +3VS
CLK

+1.8VSDGPU_AON RV7 1 VGA@ 2 10K_0402_5% H3 XTALIN

1
XTAL_IN H2 XTALOUT RV9
XTAL_OUT 10K_0402_5% RV106 RV108 Enable: Vh:2.1V Vl:1V
PLTRST_VGA#_1V8 AJ12 J4 XTAL_OUTBUFF1 2 VGA@ 10K_0402_5% 10K_0402_5%

5
3 1 2 PEX_TREMP AP29 PEX_RST_N XTAL_OUTBUFF H1 XTAL_SSIN 1 2 VGA@ VGA@ VGA@ VGA@ 3
RV10 PEX_TERMP XTAL_SSIN RV11

VCC
2

2
10K_0402_5% 1.8VSDGPU_MAIN 1
2.49K_0402_1% IN B 4GPUCORE_EN GPUCORE_EN <43>

3
VGA@ PreMP modify 2 OUT Y

PJT138KA 2N SOT363-6

GND
5 G
D IN A

6
GP107-ES-A1_BGA908 S
1.8VSDGPU_MAIN_EN 2
D
QV7A UV10
@
G

3
QV7B S VGA@ NL17SZ08DFT2G_SC70-5
PJT138KA 2N SOT363-6 DV4 2 1
GC6 2.0 function DGPU_PWR_EN <20,43> VGA_CORE_EN <58>

1
VGA@
RB751S40T1G_SOD523-2 Enable: Vh:1.5V Vl:0.7V
+3VS DV3 +1.8VSDGPU_AON VGA@
GC6_FB_EN3V3 2 +1.8VSDGPU_AON 1 2
1 1.35VSDGPU_PWR_EN <56> RV105 2
1

3 VGA@ 2 1.5K_0402_5%
<57> 1VS_DGPU_PG
RV113 VGA@ CV197
1

10K_0402_5% BAV70W_SOT323-3 CV199 0.1U_0402_16V7K


RV111 VGA@ RV12 RV102 0.1U_0402_16V7K GPU_OVERT# DV7 1 2 1 VGA@
10K_0402_5% 200K_0402_1% 10K_0402_5% 1 VGA@
3 2

VGA@ GC6_FB_EN3V3 VGA@ VGA@ RB751S40T1G_SOD523-2


GC6_FB_EN3V3 <20>

5
VGA@ VGA@ DV5 1 2
VGA_CORE_S_EN <57,59>
6 2

5
D

VCC
G

3
S PJT138KA 2N SOT363-6 PLTRST_VGA#_1V8 1 PVT modify RB751S40T1G_SOD523-2
GC6_FB_EN1V8 2 D
QV8A IN B 4 5
D
QV6A
G G
VGA@ VDDS delay 1.33ms
4

QV8B VGA@ +3VS GC6_FB_EN1V8# 2 OUT Y 1 2


PJT138KA 2N SOT363-6
S
GND S

PJT138KA 2N SOT363-6 IN A RV103 15K_0402_5%


1

4
VGA@ UV2 VGA@ RV104 VGA@ 2
VGA@ UV9 1 2 +3VS
3
5

MC74VHC1G09DFT2G_SC70-5 NL17SZ08DFT2G_SC70-5 10K_0402_5% CV196


PLT_RST# 1 GC6_FB_EN1V8 2
D
QV6B VGA@ 0.22U_0402_16V7K
G VCC

G
<17,39,41> PLT_RST# B SYS_PEX_RST_MON# 1
4 2 RV99 @ 1 S PJT138KA 2N SOT363-6 VGA@ VGA@
DGPU_HOLD_RST# 2 Y 0_0402_5% DV6 2 1
<20> DGPU_HOLD_RST# VGA_CORE_PG <58>
1
1

A VGA@
4 4
+1.8VSDGPU_AON RV15 RB751S40T1G_SOD523-2
3

10K_0402_5%
+1.8VSDGPU_AON VGA_CORE_S_PG <59>
RV14 @ RV109
1

0_0402_5% 1 2 +3VS
2

UV3 RV100 Thermal shutdown protection 10K_0402_5%


5

@ NL17SZ08DFT2G_SC70-5 10K_0402_5% VGA@


1

VGA@
VCC

SYS_PEX_RST_MON# 1
Security Classification Compal Secret Data Compal Electronics, Inc.
2

IN B 4 PLTRST_VGA#_1V8
GPU_PEX_RST_HOLD# 2 OUT Y
2016/01/29 2017/01/10 Title
GND

IN A Issued Date Deciphered Date


1 2 @ N17P PEG 1/7
Laptopblue.vn
RV16 100K_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
3

CV200 1 2 @ 0.1U_0402_16V7K DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
DVT modify MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 23 of 61
A B C D E
A B C D E

GDDR5 Mode H Mapping


UV1B UV1C
<28> FBA_D[63..0] FBA_CMD[31..0] <28> <29> FBB_D[63..0] FBB_CMD[31..0] <29> DATA Bus
Part 2 of 7 Part 3 of 7
FBA_D0 L28 U30 FBA_CMD0 FBB_D0 G9 D13 FBB_CMD0 Address
FBA_D1 FBA_D0 FBA_CMD0 FBA_CMD1 FBB_D1 FBB_D0 FBB_CMD0 FBB_CMD1
0..31 32..63
M29 T31 E9 E14
FBA_D2 L29 FBA_D1 FBA_CMD1 U29 FBA_CMD2 FBB_D2 G8 FBB_D1 FBB_CMD1 F14 FBB_CMD2
FBA_D3 FBA_D2 FBA_CMD2 FBA_CMD3 FBB_D3 FBB_D2 FBB_CMD2 FBB_CMD3
CMD0 CS#
M28 R34 F9 A12
FBA_D4 N31 FBA_D3 FBA_CMD3 R33 FBA_CMD4 FBB_D4 F11 FBB_D3 FBB_CMD3 B12 FBB_CMD4
FBA_D5 FBA_D4 FBA_CMD4 FBA_CMD5 FBB_D5 FBB_D4 FBB_CMD4 FBB_CMD5
CMD1 A3_BA3
P29 U32 G11 C14
FBA_D6 R29 FBA_D5 FBA_CMD5 U33 FBA_CMD6 FBB_D6 F12 FBB_D5 FBB_CMD5 B14 FBB_CMD6
FBA_D7 FBA_D6 FBA_CMD6 FBA_CMD7 FBB_D7 FBB_D6 FBB_CMD6 FBB_CMD7
CMD2 A2_BA0
P28 U28 G12 G15
FBA_D8 J28 FBA_D7 FBA_CMD7 V28 FBA_CMD8 FBB_D8 G6 FBB_D7 FBB_CMD7 F15 FBB_CMD8
FBA_D9 FBA_D8 FBA_CMD8 FBA_CMD9 FBB_D9 FBB_D8 FBB_CMD8 FBB_CMD9
CMD3 A4_BA2
H29 V29 F5 E15
1 FBA_D10 FBA_D9 FBA_CMD9 FBA_CMD10 FBB_D10 FBB_D9 FBB_CMD9 FBB_CMD10 1
J29 V30 E6 D15 CMD4 A5_BA1
FBA_D11 H28 FBA_D10 FBA_CMD10 U34 FBA_CMD11 FBB_D11 F6 FBB_D10 FBB_CMD10 A14 FBB_CMD11
FBA_D12 G29 FBA_D11 FBA_CMD11 U31 FBA_CMD12 FBB_D12 F4 FBB_D11 FBB_CMD11 D14 FBB_CMD12
FBA_D13 FBA_D12 FBA_CMD12 FBA_CMD13 FBB_D13 FBB_D12 FBB_CMD12 FBB_CMD13
CMD5 WE#
E31 V34 G4 A15
FBA_D14 E32 FBA_D13 FBA_CMD13 V33 FBA_CMD14 FBB_D14 E2 FBB_D13 FBB_CMD13 B15 FBB_CMD14
FBA_D15 FBA_D14 FBA_CMD14 FBA_CMD15 FBB_D15 FBB_D14 FBB_CMD14 FBB_CMD15
CMD6 A7_A8
F30 Y32 F3 C17
FBA_D16 C34 FBA_D15 FBA_CMD15 AA31 FBA_CMD16 FBB_D16 C2 FBB_D15 FBB_CMD15 D18 FBB_CMD16
FBA_D17 FBA_D16 FBA_CMD16 FBA_CMD17 FBB_D17 FBB_D16 FBB_CMD16 FBB_CMD17
CMD7 A6_A11
D32 AA29 D4 E18
FBA_D18 B33 FBA_D17 FBA_CMD17 AA28 FBA_CMD18 FBB_D18 D3 FBB_D17 FBB_CMD17 F18 FBB_CMD18
FBA_D19 FBA_D18 FBA_CMD18 FBA_CMD19 FBB_D19 FBB_D18 FBB_CMD18 FBB_CMD19
CMD8 ABI#
C33 AC34 C1 A20
FBA_D20 F33 FBA_D19 FBA_CMD19 AC33 FBA_CMD20 FBB_D20 B3 FBB_D19 FBB_CMD19 B20 FBB_CMD20
FBA_D21 FBA_D20 FBA_CMD20 FBA_CMD21 FBB_D21 FBB_D20 FBB_CMD20 FBB_CMD21
CMD9 A12_RFU
F32 AA32 C4 C18
FBA_D22 H33 FBA_D21 FBA_CMD21 AA33 FBA_CMD22 FBB_D22 B5 FBB_D21 FBB_CMD21 B18 FBB_CMD22
FBA_D23 FBA_D22 FBA_CMD22 FBA_CMD23 FBB_D23 FBB_D22 FBB_CMD22 FBB_CMD23
CMD10 A0_A10
H32 Y28 C5 G18
FBA_D24 P34 FBA_D23 FBA_CMD23 Y29 FBA_CMD24 FBB_D24 A11 FBB_D23 FBB_CMD23 G17 FBB_CMD24
FBA_D25 FBA_D24 FBA_CMD24 FBA_CMD25 FBB_D25 FBB_D24 FBB_CMD24 FBB_CMD25
CMD11 A1_A9
P32 W31 C11 F17
FBA_D26 P31 FBA_D25 FBA_CMD25 Y30 FBA_CMD26 FBB_D26 D11 FBB_D25 FBB_CMD25 D16 FBB_CMD26
FBA_D27 FBA_D26 FBA_CMD26 FBA_CMD27 FBB_D27 FBB_D26 FBB_CMD26 FBB_CMD27
CMD12 RAS#
P33 AA34 B11 A18

MEMORY INTERFACE B
FBA_D28 L31 FBA_D27 FBA_CMD27 Y31 FBA_CMD28 FBB_D28 D8 FBB_D27 FBB_CMD27 D17 FBB_CMD28
FBA_D29 FBA_D28 FBA_CMD28 FBA_CMD29 FBB_D29 FBB_D28 FBB_CMD28 FBB_CMD29
CMD13 RST#
L34 Y34 A8 A17
FBA_D30 L32 FBA_D29 FBA_CMD29 Y33 FBA_CMD30 FBB_D30 C8 FBB_D29 FBB_CMD29 B17 FBB_CMD30
FBA_D31 FBA_D30 FBA_CMD30 FBA_CMD31 FBB_D31 FBB_D30 FBB_CMD30 FBB_CMD31
CMD14 CKE#
L33 V31 B8 E17
FBA_D32 AG28 FBA_D31 FBA_CMD31 R28 FBB_D32 F24 FBB_D31 FBB_CMD31 G14
FBA_D33 FBA_D32 FBA_CMD32 FBB_D33 FBB_D32 FBB_CMD32 CMD15 CAS#
AF29 AC28 G23 G20
FBA_D34 FBA_D33 FBA_CMD33 FBA_DEBUG0 FBB_D34 FBB_D33 FBB_CMD33 FBB_DEBUG0
MEMORY INTERFACE

AG29 R32 @TV1 E24 C12 @TV2 CMD16 CS#


FBA_D35 AF28 FBA_D34 FBA_CMD34 AC32 FBA_DEBUG1 @TV3 FBB_D35 G24 FBB_D34 FBB_CMD34 C20 FBB_DEBUG1 @TV4
FBA_D36 AD30 FBA_D35 FBA_CMD35 FBB_D36 D21 FBB_D35 FBB_CMD35
FBA_D37 FBA_D36 FBB_D37 FBB_D36 CMD17 A3_BA3
AD29 E21
FBA_D38 AC29 FBA_D37 FBB_D38 G21 FBB_D37
FBA_D39 FBA_D38 FBB_D39 FBB_D38 CMD18 A2_BA0
AD28 F21
FBA_D40 AJ29 FBA_D39 FBB_D40 G27 FBB_D39
FBA_D41 FBA_D40 FBB_D41 FBB_D40 CMD19 A4_BA2
AK29 D27
FBA_D42 AJ30 FBA_D41 FBB_D42 G26 FBB_D41
2 FBA_D43 FBA_D42 FBB_D43 FBB_D42 CMD20 A5_BA1 2
AK28 E27
FBA_D44 AM29 FBA_D43 FBB_D44 E29 FBB_D43
FBA_D45 FBA_D44 FBB_D45 FBB_D44 CMD21 WE#
AM31 R30 F29 D12
FBA_D46 FBA_D45 FBA_CLK0 FBA_CLKA0 <28> FBB_D46 FBB_D45 FBB_CLK0 FBB_CLKA0 <29>
AN29 R31 E30 E12 CMD22 A7_A8
FBA_D47 FBA_D46 FBA_CLK0_N FBA_CLKA0# <28> FBB_D47 FBB_D46 FBB_CLK0_N FBB_CLKA0# <29>
AM30 AB31 D30 E20
FBA_D48 FBA_D47 FBA_CLK1 FBA_CLKA1 <28> FBB_D48 FBB_D47 FBB_CLK1 FBB_CLKA1 <29>
AN31 AC31 A32 F20 CMD23 A6_A11
FBA_D49 FBA_D48 FBA_CLK1_N FBA_CLKA1# <28> FBB_D49 FBB_D48 FBB_CLK1_N FBB_CLKA1# <29>
AN32 C31
A

FBA_D50 AP30 FBA_D49 FBB_D50 C32 FBB_D49


FBA_D51 FBA_D50 FBB_D51 FBB_D50 CMD24 ABI#
AP32 B32
FBA_D52 AM33 FBA_D51 K31 FBB_D52 D29 FBB_D51 F8
FBA_D53 FBA_D52 FBA_WCK01 FBA_WCK01 <28> FBB_D53 FBB_D52 FBB_WCK01 FBB_WCK01 <29> CMD25 A12_RFU
AL31 L30 A29 E8
FBA_D54 FBA_D53 FBA_WCK01_N FBA_WCK01# <28> FBB_D54 FBB_D53 FBB_WCK01_N FBB_WCK01# <29>
AK33 H34 C29 A5 CMD26 A0_A10
FBA_D55 FBA_D54 FBA_WCK23 FBA_WCK23 <28> FBB_D55 FBB_D54 FBB_WCK23 FBB_WCK23 <29>
AK32 J34 B29 A6
FBA_D56 FBA_D55 FBA_WCK23_N FBA_WCK23# <28> FBB_D56 FBB_D55 FBB_WCK23_N FBB_WCK23# <29>
AD34 AG30 B21 D24 CMD27 A1_A9
FBA_D57 FBA_D56 FBA_WCK45 FBA_WCK45 <28> FBB_D57 FBB_D56 FBB_WCK45 FBB_WCK45 <29>
AD32 AG31 C23 D25
FBA_D58 FBA_D57 FBA_WCK45_N FBA_WCK45# <28> FBB_D58 FBB_D57 FBB_WCK45_N FBB_WCK45# <29>
AC30 AJ34 A21 B27 CMD28 RAS#
FBA_D59 FBA_D58 FBA_WCK67 FBA_WCK67 <28> FBB_D59 FBB_D58 FBB_WCK67 FBB_WCK67 <29>
AD33 AK34 C21 C27
FBA_D60 FBA_D59 FBA_WCK67_N FBA_WCK67# <28> FBB_D60 FBB_D59 FBB_WCK67_N FBB_WCK67# <29>
AF31 B24 CMD29 RST#
FBA_D61 AG34 FBA_D60 FBB_D61 C24 FBB_D60
FBA_D62 AG32 FBA_D61 FBB_D62 B26 FBB_D61
FBA_D63 FBA_D62 FBB_D63 FBB_D62 CMD30 CKE#
AG33 J30 C26 D6
FBA_D63 FBA_WCKB01 J31 FBB_D63 FBB_WCKB01 D7
8> FBA_DBI[7..0] FBA_DBI0 FBA_WCKB01_N <29> FBB_DBI[7..0] FBB_DBI0 FBB_WCKB01_N CMD31 CAS#
P30 J32 E11 C6
FBA_DBI1 F31 FBA_DQM0 FBA_WCKB23 J33 FBB_DBI1 E3 FBB_DQM0 FBB_WCKB23 B6
FBA_DBI2 F34 FBA_DQM1 FBA_WCKB23_N AH31 FBB_DBI2 A3 FBB_DQM1 FBB_WCKB23_N F26
FBA_DBI3 M32 FBA_DQM2 FBA_WCKB45 AJ31 FBB_DBI3 C9 FBB_DQM2 FBB_WCKB45 E26
FBA_DBI4 AD31 FBA_DQM3 FBA_WCKB45_N AJ32 FBB_DBI4 F23 FBB_DQM3 FBB_WCKB45_N A26
FBA_DBI5 AL29 FBA_DQM4 FBA_WCKB67 AJ33 FBB_DBI5 F27 FBB_DQM4 FBB_WCKB67 A27
FBA_DBI6 AM32 FBA_DQM5 FBA_WCKB67_N FBB_DBI6 C30 FBB_DQM5 FBB_WCKB67_N
FBA_DBI7 AF34 FBA_DQM6 FBB_DBI7 A24 FBB_DQM6
FBA_DQM7 +1.8VSDGPU_MAIN FBB_DQM7
8> FBA_EDC[7..0] FBA_EDC0 GPU_BUFRST# <29> FBB_EDC[7..0] FBB_EDC0
M31 E1 @TV9 D10
FBA_EDC1 G31 FBA_DQS_WP0 BUFRST_N FBB_EDC1 D5 FBB_DQS_WP0
3 FBA_EDC2 E33 FBA_DQS_WP1 FBB_EDC2 C3 FBB_DQS_WP1 3
FBA_EDC3 M33 FBA_DQS_WP2 VGA@ FBB_EDC3 B9 FBB_DQS_WP2
FBA_EDC4 AE31 FBA_DQS_WP3 K27 +FB_PLLAVDD 2 1 LV3 FBB_EDC4 E23 FBB_DQS_WP3 H17 +FB_PLLAVDD
FBA_EDC5 AK30 FBA_DQS_WP4 FB_REFPLL_AVDD CHILISIN PBY160808T-330Y-N FBB_EDC5 E28 FBB_DQS_WP4 FBB_PLL_AVDD
FBA_EDC6 AN33 FBA_DQS_WP5 1 1 1 FBB_EDC6 FBB_DQS_WP5 1 1
0.1U_0402_16V7K

0.1U_0402_16V7K

22U_0603_6.3V6M

0.1U_0402_16V7K

0.1U_0402_16V7K
B30
FBA_EDC7 AF33 FBA_DQS_WP6 CV9 CV10 CV11 FBB_EDC7 A23 FBB_DQS_WP6 CV12 CV7
FBA_DQS_WP7 U27 VGA@ VGA@ VGA@ FBB_DQS_WP7 VGA@ VGA@
M30 FBA_PLL_AVDD 2 2 2 D9 2 2
H30 FBA_DQS_RN0 +GPU_PLLVDD E4 FBB_DQS_RN0
E34 FBA_DQS_RN1 B2 FBB_DQS_RN1
M34 FBA_DQS_RN2 H26 A9 FBB_DQS_RN2
AF30 FBA_DQS_RN3 GPCPLL_AVDD D22 FBB_DQS_RN3
AK31 FBA_DQS_RN4 D28 FBB_DQS_RN4
FBA_DQS_RN5 Near U27 Near K27 FBB_DQS_RN5
AM34 A30 Near H17
AF32 FBA_DQS_RN6 B23 FBB_DQS_RN6
FBA_DQS_RN7 FBB_DQS_RN7

GP107-ES-A1_BGA908 GP107-ES-A1_BGA908
@ @
+GPU_PLLVDD +1.35VSDGPU
+1.35VSDGPU

FBA_CMD14 2 VGA@ 1
FBB_CMD14
CV195

0.1U_0402_16V7K

CV194

0.1U_0402_16V7K

CV124

0.1U_0402_16V7K

RV87 10K_0402_5% 2 VGA@ 1


FBA_CMD30 2 VGA@ 1 RV91 10K_0402_5%
1 1 1 CKE signal FBB_CMD30
RV88 10K_0402_5% 2 VGA@ 1
RV92 10K_0402_5%
VGA@

VGA@

VGA@

2 2 2 FBA_CMD13 2 VGA@ 1
RV89 10K_0402_5% FBB_CMD13 2 VGA@ 1
FBA_CMD29 2 VGA@ 1 RV93 10K_0402_5%
4 RST signal 4
RV90 10K_0402_5% FBB_CMD29 2 VGA@ 1
Near H26 RV94 10K_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

N17P VRAM 2/7


Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 24 of 61
A B C D E
A B C D E

UV1D

Part 4 of 7

+1.8VSDGPU_AON
MULTI LEVELFor
STRAPS
AL6 N17x
AK6 IFPA_L0 AC6
AN5 IFPA_L0_N NC AJ28
AM5 IFPA_L1 NC AJ4
AP3 IFPA_L1_N NC AJ5 strap0 strap1 strap2 strap3 strap4 strap5
AN3 IFPA_L2 NC AL11

2
AM6 IFPA_L2_N NC C15 RV26 RV27 RV28 RV29 RV30 RV78 RV31 RV32 RV33
AN6 IFPA_L3 NC D19 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5%
1 IFPA_L3_N NC 1
D20 @ @ @ @ @ @ @ @ @

NC
NC D23
AN8 NC D26

1
AM8 IFPB_L0 NC V32
AM7 IFPB_L0_N NC
AL7 IFPB_L1 STRAP0
AP6 IFPB_L1_N STRAP1 ROM_SI
AP5 IFPB_L2 STRAP2 ROM_SO
AJ9 IFPB_L2_N STRAP3 ROM_SCLK
AH9 IFPB_L3 STRAP4
IFPB_L3_N STRAP5
H31

2
AK1 FB_VREF RV79

2
AJ1 IFPC_L0 RV34 RV35 RV36 RV37 RV38 100K_0402_5% RV39 RV40 RV41
AJ3 IFPC_L0_N L4 VCCSENSE_VGA 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% @ 100K_0402_5% 100K_0402_5% 100K_0402_5%
AJ2 IFPC_L1 VDD_SENSE VCCSENSE_VGA <58> @ @ @ @ @ @ @ @
AH3 IFPC_L1_N

1
AH4 IFPC_L2 L5 VSSSENSE_VGA
VSSSENSE_VGA <58>

1
AG5 IFPC_L2_N GND_SENSE
AG4 IFPC_L3
IFPC_L3_N

AM1
AM2 IFPD_L0
AM3 IFPD_L0_N TEST
AM4 IFPD_L1 AK11 TESTMODE RV42 1 VGA@ 2 10K_0402_5%
AL3 IFPD_L1_N NVJTAG_SEL
AL4 IFPD_L2 AM10 JTAG_TCK_VGA @TV5
AK4 IFPD_L2_N JTAG_TCK AM11 JTAG_TDI @TV6
AK5 IFPD_L3 JTAG_TDI AP12 JTAG_TDO @TV7
IFPD_L3_N JTAG_TDO AP11 JTAG_TMS @TV8
JTAG_TMS AN11 JTAG_RST RV43 1 VGA@ 210K_0402_5%
AD2 JTAG_TRST_N
2 IFPE_L0 2
LVDS/TMDS

AD3
AD1 IFPE_L0_N
AC1 IFPE_L1
AC2 IFPE_L1_N
AC3 IFPE_L2
AC4 IFPE_L2_N SERIAL
AC5 IFPE_L3 H6
IFPE_L3_N ROM_CS_N H4 ROM_SCLK
ROM_SCLK H5 ROM_SI
AE3 ROM_SI H7 ROM_SO
AE4 IFPF_L0 ROM_SO
AF4 IFPF_L0_N
AF5 IFPF_L1
AD4 IFPF_L1_N
AD5 IFPF_L2
AG1 IFPF_L2_N
AF1 IFPF_L3 GENERAL
IFPF_L3_N

AJ6 M1 VGA_OVERT#
IFPA_AUX_SCL OVERT VGA_OVERT# <23>
AH6
IFPA_AUX_SDA_N
AK8
AL8 IFPB_AUX_SCL
IFPB_AUX_SCL_N
AG3 J2 STRAP0
AG2 IFPC_AUX_SCL STRAP0 J7 STRAP1
IFPC_AUX_SDA_N STRAP1 J6 STRAP2
AK3 STRAP2 J5 STRAP3
AK2 IFPD_AUX_SCL STRAP3 J3 STRAP4
IFPD_AUX_SDA_N STRAP4 J1 STRAP5
AB3 STRAP5
AB4 IFPE_AUX_SCL
3 IFPE_AUX_SDA_N K3 3
AF3 THERMDP K4
AF2 IFPF_AUX_SCL THERMDN
IFPF_AUX_SDA_N

GP107-ES-A1_BGA908
@

SMB_ATL_ADDR
LOW Single GPU
High Dual GPU

DEVID_SEL
LOW Orig. Device ID
High Support G-Sync GPUID
VGA_DEVICE
LOW 3D Device
High VGA Device
4 PCIE_CFG 4

LOW Normal signal swing


High Reduce the signal amplitude

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

N17P STRAP 3/7


Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 25 of 61
A B C D E
A B C D E

1*22uF+1*10uF+2*4.7uF+4*1uF
Under GPU Near GPU
+1.0VSDGPU

1 1 1 1 1 1 1
1

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

10U_0603_6.3V6M
CV134 CV13 CV14 CV33 CV29 CV16 CV28

22U_0603_6.3V6M
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ CV34
2 2 2 2 2 2 2 VGA@
1 2 1

+1.35VSDGPU UV1E

Under GPU Part 5 of 7


CHA /6*1uF+2*10uF
AA27 AG19
AA30 FBVDDQ_0 PEX_DVDD AG21
AB27 FBVDDQ_1 PEX_DVDD AG22
1 1 1 1 1 1 1 1 FBVDDQ_2 PEX_DVDD
AB33 AG24
FBVDDQ_3 PEX_DVDD
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M
CV18 CV19 CV20 CV21 CV22 CV23 CV24 CV26 AC27 AH21 1*22uF+1*10uF+2*4.7uF+4*1uF
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ AD27 FBVDDQ_4 PEX_DVDD AH25
2 2 2 2 2 2 2 2 AE27 FBVDDQ_5 PEX_DVDD
AF27 FBVDDQ_6
FBVDDQ_7 Under GPU Near GPU
AG27 AG13 +1.8VSDGPU_MAIN
B13 FBVDDQ_8 PEX_HVDD AG15
B19 FBVDDQ_9 PEX_HVDD AG16
FBVDDQ_11 PEX_HVDD 1 1 1 1 1 1 1 1 1

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

22U_0603_6.3V6M
E13 AG18 CV137 CV136 CV25 CV15 CV17 CV32 CV30 CV27 CV31
E19 FBVDDQ_12 PEX_HVDD AG25
H10 FBVDDQ_14 PEX_HVDD AH15 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
CHB /6*1uF+2*10uF FBVDDQ_15 PEX_HVDD 2 2 2 2 2 2 2 2 2
H11 AH18
H12 FBVDDQ_16 PEX_HVDD AH26
H13 FBVDDQ_17 PEX_HVDD AH27
H14 FBVDDQ_18 PEX_HVDD AJ27
1 1 1 1 1 1 1 1 FBVDDQ_19 PEX_HVDD
H18 AK27
FBVDDQ_22 PEX_HVDD
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M
CV126 CV127 CV128 CV129 CV130 CV131 CV132 CV133 H19 AL27
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ H20 FBVDDQ_23 PEX_HVDD AM28

POWER
2 2 2 2 2 2 2 2 H21 FBVDDQ_24 PEX_HVDD AN28
H22 FBVDDQ_25 PEX_HVDD
H23 FBVDDQ_26
H24 FBVDDQ_27
H8 FBVDDQ_28 AH12
FBVDDQ_29 PEX_PLL_HVDD +1.8VSDGPU_MAIN
H9 1
2 FBVDDQ_30 2

0.1U_0402_16V7K
L27 CV43
M27 FBVDDQ_31
N27 FBVDDQ_32 AG12 VGA@
FBVDDQ_33 NC 2
Near GPU
P27 AG26
R27 FBVDDQ_34 NC AG7
GPU /5*22uF+2*10uF FBVDDQ_35 NC
T27 AN2
T30 FBVDDQ_36 NC
T33 FBVDDQ_37
1 1 1 1 1 1 1 FBVDDQ_38
Y27
FBVDDQ_43
10U_0603_6.3V6M

10U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

CV37 CV38 CV35 CV36 CV39 CV40 CV41


VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ J8
2 2 2 2 2 2 2 1V8_AON K8
1V8_AON L8
B16 VDD18 M8
E16 FBVDDQ VDD18
H15 FBVDDQ
H16 FBVDDQ
V27 FBVDDQ AH8
Place close to GPU FBVDDQ IFPAB_PLLVDD
W27 AJ8
W30 FBVDDQ IFPAB_RSET
+1.35VSDGPU W33 FBVDDQ
FBVDDQ 2*4.7uF+1*1uF+2*0.1uF
AF7 +1.8VSDGPU_AON
2

IFPCD_PLLVDD AF8
RV45 IFPCD_RSET
1 1 1 1

0.1U_0402_16V7K

0.1U_0402_16V7K
@ 0_0402_5% CV49

1U_0402_6.3V6K

4.7U_0603_6.3V6K
AB8 CV135 CV51 CV50
IFPEF_PLLVDD AD6 VGA@ VGA@ VGA@ VGA@
1

FB_VDDQ_SENSE F1 IFPEF_RSET 2 2 2 2
<56> FB_VDDQ_SENSE FB_VDDQ_SENSE

TV10@ FB_GND_SENSE F2
PROBE_FB_GND
AG8 Under GPU Near GPU
3 RV47 1 VGA@ 2 40.2_0402_1% FB_CAL_PD_VDDQ J27 IFP_IOVDD AG9 3
+1.35VSDGPU FB_CAL_PD_VDDQ IFP_IOVDD AG6 2*4.7uF+1*1uF+2*0.1uF
IFP_IOVDD AF6
FB_CAL_PU_GND IFP_IOVDD +1.8VSDGPU_MAIN
RV48 1 VGA@ 2 40.2_0402_1% H27 AC7
FB_CAL_PU_GND IFP_IOVDD AC8
IFP_IOVDD 1 1 1 1

0.1U_0402_16V7K

0.1U_0402_16V7K
FB_CAL_TERM_GND H25

1U_0402_6.3V6K

4.7U_0603_6.3V6K
1 VGA@2 CV52 CV53 CV54 CV55
RV49 60.4_0402_1% FB_CAL_TERM_GND VGA@ VGA@ VGA@ VGA@
2 2 2 2

GP107-ES-A1_BGA908 Under GPU Near GPU


@

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

N17P POWER 4/7


Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 26 of 61
A B C D E
A B C D E

N17P VDDS
1uF*5/4.7uF*5 (under GPU)
330uF*1/22uF*3/10uF*2/4.7uF*2 UV1F

Part 6 of 7
A2 D2
AA17 GND_0 GND_100 D31
AA18 GND_1 GND_101 D33
AA20 GND_2 GND_102 E10
UV1G AA22 GND_3 GND_103 E22
AB12 GND_4 GND_104 E25
+VGA_CORE +VGA_CORE_S AB14 GND_5 GND_105 E5
AA14 Part 7 of 7 P23 AB16 GND_6 GND_106 E7
AA21 VDD_1 VDDS P19 AB19 GND_7 GND_107 F28
1 VDD_4 VDDS GND_8 GND_108 1
AB13 AA12 AB2 F7
AB15 VDD_6 VDDS AA16 AB21 GND_9 GND_109 G10
AB17 VDD_7 VDDS AA19 A33 GND_10 GND_110 G13
AB18 VDD_8 VDDS AA23 AB23 GND_11 GND_111 G16
AB20 VDD_9 VDDS AC14 AB28 GND_12 GND_112 G19
AB22 VDD_10 VDDS AC21 AB30 GND_13 GND_113 G2
AC12 VDD_11 VDDS M14 AB32 GND_14 GND_114 G22
AC16 VDD_12 VDDS M21 AB5 GND_15 GND_115 G25
AC19 VDD_14 VDDS P12 AB7 GND_16 GND_116 G28
AC23 VDD_15 VDDS P16 AC13 GND_17 GND_117 G3
M12 VDD_17 VDDS W21 AC15 GND_18 GND_118 G30
M16 VDD_18 VDDS W14 AC17 GND_19 GND_119 G32
M19 VDD_20 VDDS V18 AC18 GND_20 GND_120 G33
M23 VDD_21 VDDS U17 AA13 GND_21 GND_121 G5
N13 VDD_23 VDDS T21 AC20 GND_22 GND_122 G7
N15 VDD_24 VDDS T14 AC22 GND_23 GND_123 K2
N17 VDD_25 VDDS AE2 GND_24 GND_124 K28
N18 VDD_26 AE28 GND_25 GND_125 K30
N20 VDD_27 U1 VCCSENSE_VGA_S AE30 GND_26 GND_126 K32
N22 VDD_28 VDDS_SENSE U2 VSSSENSE_VGA_S VCCSENSE_VGA_S <59> AE32 GND_27 GND_127 K33

POWER
VDD_29 GNDS_SENSE VSSSENSE_VGA_S <59> GND_28 GND_128
P14 AE33 K5
P21 VDD_31 AE5 GND_29 GND_129 K7
R13 VDD_34 +VGA_CORE AE7 GND_30 GND_130 M13
R15 VDD_36 U4 AH10 GND_31 GND_131 M15
R17 VDD_37 XVDD U5 AA15 GND_32 GND_132 M17
R18 VDD_38 XVDD U6 AH13 GND_33 GND_133 M18
R20 VDD_39 XVDD U7 AH16 GND_34 GND_134 M20
R22 VDD_40 XVDD U8 AH19 GND_35 GND_135 M22
T12 VDD_41 XVDD V1 AH2 GND_36 GND_136 N12
T16 VDD_42 XVDD V2 AH22 GND_37 GND_137 N14
T19 VDD_44 XVDD V3 AH24 GND_38 GND_138 N16
T23 VDD_45 XVDD V4 AH28 GND_39 GND_139 N19
U13 VDD_47 XVDD V5 AH29 GND_40 GND_140 N2
2 U15 VDD_48 XVDD V6 AH30 GND_41 GND_141 N21 2
U18 VDD_49 XVDD V7 AH32 GND_42 GND_142 N23
U20 VDD_51 XVDD V8 AH33 GND_43 GND_143 N28

GND
U22 VDD_52 XVDD W2 AH5 GND_44 GND_144 N30
V13 VDD_53 XVDD W3 AH7 GND_45 GND_145 N32
V15 VDD_54 XVDD W4 AJ7 GND_46 GND_146 N33
V17 VDD_55 XVDD W5 AK10 GND_47 GND_147 N5
V20 VDD_56 XVDD W7 AK7 GND_48 GND_148 N7
V22 VDD_58 XVDD W8 AL12 GND_49 GND_149 P13
W12 VDD_59 XVDD AL14 GND_50 GND_150 P15
W16 VDD_60 AL15 GND_51 GND_151 P17
W19 VDD_62 Y1 AL17 GND_52 GND_152 P18
W23 VDD_63 XVDD Y2 AL18 GND_53 GND_153 P20
Y13 VDD_65 XVDD Y3 AL2 GND_54 GND_154 P22
Y15 VDD_66 XVDD Y4 AL20 GND_55 GND_155 R12
Y17 VDD_67 XVDD Y5 AL21 GND_56 GND_156 R14
Y18 VDD_68 XVDD Y6 AL23 GND_57 GND_157 R16
Y20 VDD_69 XVDD Y7 AL24 GND_58 GND_158 R19
Y22 VDD_70 XVDD Y8 AL26 GND_59 GND_159 R21
VDD_71 XVDD AL28 GND_60 GND_160 R23
AL30 GND_61 GND_161 T13
AA1 AL32 GND_62 GND_162 T15
XVDD AA2 AL33 GND_63 GND_163 T17
XVDD AA3 AL5 GND_64 GND_164 T18
XVDD AA4 AM13 GND_65 GND_165 T2
XVDD AA5 AM16 GND_66 GND_166 T20
XVDD AA6 AM19 GND_67 GND_167 T22
XVDD AA7 AM22 GND_68 GND_168 AG11
XVDD AA8 AM25 GND_69 GND_169 T28
XVDD AN1 GND_70 GND_170 T32
AN10 GND_71 GND_171 T5
AN13 GND_72 GND_172 T7
AN16 GND_73 GND_173 U12
3 GP107-ES-A1_BGA908 AN19 GND_74 GND_174 U14 3
AN22 GND_75 GND_175 U16
@ GND_76 GND_176
AN25 U19
AN30 GND_77 GND_177 U21
AN34 GND_78 GND_178 U23
AN4 GND_79 GND_179 V12
AN7 GND_80 GND_180 V14
AP2 GND_81 GND_181 V16
AP33 GND_82 GND_182 V19
B1 GND_83 GND_183 V21
B10 GND_84 GND_184 V23
B22 GND_85 GND_185 W13
B25 GND_86 GND_186 W15
B28 GND_87 GND_187 W17
B31 GND_88 GND_188 W18
B34 GND_89 GND_189 W20
B4 GND_90 GND_190 W22
B7 GND_91 GND_191 W28
C10 GND_92 GND_192 Y12
C13 GND_93 GND_193 Y14
C19 GND_94 GND_194 Y16
C22 GND_95 GND_195 Y19
C25 GND_96 GND_196 Y21
C28 GND_97 GND_197 Y23
C7 GND_98 GND_198 AH11
GND_99 GND_199 C16
GND_OPT W32
GND_OPT

GP107-ES-A1_BGA908
@
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

N17P POWER & GND 5/7


Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 27 of 61
A B C D E
A B C D E

MF=1
<24> FBA_D[63:0]
MF=0
UV4B 2 OF 2 DVT modify +1.35VSDGPU UV5B 2 OF 2 DVT modify

K4 A4 FBA_D0 K4 A4 FBA_D56
<24> FBA_CMD6 <24> FBA_CMD26

1
H5 A8/A7 DQ0 A2 FBA_D1 H5 A8/A7 DQ0 A2 FBA_D57
<24> FBA_CMD11 A9/A1 DQ1 FBA_D2 <24> FBA_CMD23 A9/A1 DQ1 FBA_D58
H4 B4 RV50 H4 B4
<24> FBA_CMD10 A10/A0 DQ2 FBA_D3 <24> FBA_CMD22 A10/A0 DQ2 FBA_D59
K5 B2 549_0402_1% K5 B2
<24> FBA_CMD7 A11/A6 DQ3 FBA_D4 <24> FBA_CMD27 A11/A6 DQ3 FBA_D60
J5 E4 VGA@ J5 E4
<24> FBA_CMD9 A12/RFU#J5/NC#J5 DQ4 FBA_D5 <24> FBA_CMD25 A12/RFU#J5/NC#J5 DQ4 FBA_D61
E2 RV51 E2

2
H11 DQ5 F4 FBA_D6 931_0402_1% H11 DQ5 F4 FBA_D62
1 <24> FBA_CMD2 BA0/A2 DQ6 FBA_D7 FBA0_VREFC <24> FBA_CMD19 BA0/A2 DQ6 FBA_D63 1
K10 F2 1 2 K10 F2
<24> FBA_CMD4 BA1/A5 DQ7 FBA_D8 <24> FBA_CMD17 BA1/A5 DQ7 FBA_D48
K11 A11 K11 A11
<24> FBA_CMD3 BA2/A4 DQ8 FBA_D9 <24> FBA_CMD18 BA2/A4 DQ8 FBA_D49
H10 A13 VGA@ H10 A13
<24> FBA_CMD1 <24> FBA_CMD20

1
BA3/A3 DQ9 B11 FBA_D10 BA3/A3 DQ9 B11 FBA_D50
J4 DQ10 B13 FBA_D11 RV52 J4 DQ10 B13 FBA_D51
<24> FBA_CMD8 ABI# DQ11 FBA_D12 <24> FBA_CMD24 ABI# DQ11 FBA_D52
G3 E11 1.33K_0402_1% G3 E11
<24> FBA_CMD12 RAS# DQ12 FBA_D13 <24> FBA_CMD31 RAS# DQ12 FBA_D53
G12 E13 G12 E13
<24> FBA_CMD0 CS# DQ13 FBA_D14 <24> FBA_CMD21 CS# DQ13 FBA_D54
L3 F11 VGA@ L3 F11
<24> FBA_CMD15 <24> FBA_CMD28

2
L12 CAS# DQ14 F13 FBA_D15 L12 CAS# DQ14 F13 FBA_D55
<24> FBA_CMD5 WE# DQ15 FBA_D16 <24> FBA_CMD16 WE# DQ15 FBA_D40
U11 U11
J12 DQ16 U13 FBA_D17 J12 DQ16 U13 FBA_D41
<24> FBA_CLKA0 CK DQ17 FBA_D18 FBA_VREFC_R <24> FBA_CLKA1 CK DQ17 FBA_D42
J11 T11 J11 T11
<24> FBA_CLKA0# CK# DQ18 FBA_D19 <24> FBA_CLKA1# CK# DQ18 FBA_D43
J3 T13 J3 T13
<24> FBA_CMD14 CKE# DQ19 FBA_D20 <24> FBA_CMD30 CKE# DQ19 FBA_D44
N11 +1.35VSDGPU N11
D2 DQ20 N13 FBA_D21 D2 DQ20 N13 FBA_D45
<24> FBA_DBI0 DBI0# DQ21 FBA_D22 <24> FBA_DBI7 DBI0# DQ21 FBA_D46
D13 M11 D13 M11
<24> FBA_DBI1 <24> FBA_DBI6

1
P13 DBI1# DQ22 M13 FBA_D23 P13 DBI1# DQ22 M13 FBA_D47
<24> FBA_DBI2 <24> FBA_DBI5

1
P2 DBI2# DQ23 U4 FBA_D24 D RV53 P2 DBI2# DQ23 U4 FBA_D32
<24> FBA_DBI3 DBI3# DQ24 FBA_D25 <24> FBA_DBI4 DBI3# DQ24 FBA_D33
U2 2 QV3 549_0402_1% U2
DQ25 FBA_D26 <23,29> VRAM_VREF_CTL DQ25 FBA_D34
J2 T4 G VGA@ J2 T4
<24> FBA_CMD13 RESET# DQ26 FBA_D27 <24> FBA_CMD29 RESET# DQ26 FBA_D35
T2 S RV54 T2

2
J10 DQ27 N4 FBA_D28 931_0402_1% RV55 VGA@ J10 DQ27 N4 FBA_D36
FBA0_ZQ1 J13 SEN DQ28 N2 FBA_D29 L2N7002WT1G_SC-70-3 1 2 FBA1_VREFC 1K_0402_5% FBA1_ZQ3 J13 SEN DQ28 N2 FBA_D37
J1 ZQ DQ29 M4 FBA_D30 1 2 J1 ZQ DQ29 M4 FBA_D38
MF DQ30 FBA_D31 VGA@ +1.35VSDGPU MF DQ30 FBA_D39
M2 VGA@ M2

1
D4 DQ31 D4 DQ31
<24> FBA_WCK01 WCK01 <24> FBA_WCK67 WCK01
D5 C2 RV56 D5 C2
<24> FBA_WCK01# WCK01# EDC0 FBA_EDC0 <24> <24> FBA_WCK67# WCK01# EDC0 FBA_EDC7 <24>
C13 1.33K_0402_1% C13
EDC1 FBA_EDC1 <24> EDC1 FBA_EDC6 <24>
P4 R13 P4 R13
<24> FBA_WCK23 WCK23 EDC2 FBA_EDC2 <24> <24> FBA_WCK45 WCK23 EDC2 FBA_EDC5 <24>
P5 R2 VGA@ P5 R2
<24> FBA_WCK23# FBA_EDC3 <24> <24> FBA_WCK45# FBA_EDC4 <24>

2
WCK23# EDC3 WCK23# EDC3
1

1
X76@ X76@
2 VGA@ VGA@ VGA@ VGA@ VGA@ 2
RV57 RV58 RV59 RV60 RV61
1K_0402_5% 121_0402_1% 1K_0402_5% 1K_0402_5% 121_0402_1%
2

2
+1.35VSDGPU
UV4A 1 OF 2 +1.35VSDGPU
UV5A 1 OF 2
C5 B5
C10 VDD VSS B10 C5 B5
D11 VDD VSS D10 C10 VDD VSS B10
G1 VDD VSS G5 D11 VDD VSS D10
VDD VSS FBA_CLKA0 FBA_CLKA0# +1.35VSDGPU VDD VSS
G4 G10 G1 G5
G11 VDD VSS H1 G4 VDD VSS G10

1
G14 VDD VSS H14 G11 VDD VSS H1
+1.35VSDGPU VDD VSS VDD VSS
L1 K1 RV63 RV95 G14 H14
L4 VDD VSS K14 40.2_0402_1% 40.2_0402_1% L1 VDD VSS K1
VDD VSS 1 1 1 1 1 1 1 VDD VSS
L11 L5 VGA@ VGA@ L4 K14
VDD VSS VDD VSS

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
L14 L10 CV61 CV62 CV63 CV64 CV65 CV66 CV69 L11 L5

2
P11 VDD VSS P10 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ L14 VDD VSS L10
1 1 1 1 1 1 1 VDD VSS VDD VSS
R5 T5 2 2 2 2 2 2 2 P11 P10
VDD VSS 1 VDD VSS
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

0.01U_0402_16V7K
CV58 CV59 CV67 CV56 CV57 CV60 CV68 R10 T10 VGA@ R5 T5
VDD VSS VDD VSS

CV190
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ R10 T10
2 2 2 2 2 2 2 B1 A1 VDD VSS
B3 VDDQ VSSQ A3 2 B1 A1
B12 VDDQ VSSQ A12 B3 VDDQ VSSQ A3
B14 VDDQ VSSQ A14 B12 VDDQ VSSQ A12
D1 VDDQ VSSQ C1 B14 VDDQ VSSQ A14
VDDQ VSSQ Close to VRAM VDDQ VSSQ
D3 C3 D1 C1
D12 VDDQ VSSQ C4 D3 VDDQ VSSQ C3
D14 VDDQ VSSQ C11 D12 VDDQ VSSQ C4
Close to VRAM VDDQ VSSQ 1 1 1 1 1 1 1 VDDQ VSSQ
E5 C12 D14 C11
VDDQ VSSQ VDDQ VSSQ

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M
3 E10 C14 CV77 CV78 CV79 CV80 CV81 CV82 CV83 E5 C12 3
F1 VDDQ VSSQ E1 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ E10 VDDQ VSSQ C14
1 1 1 1 1 1 1 VDDQ VSSQ 2 2 2 2 2 2 2 VDDQ VSSQ
F3 E3 F1 E1
VDDQ VSSQ VDDQ VSSQ
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

CV141 CV142 CV140 CV73 CV74 CV75 CV76 F12 E12 F3 E3


VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ F14 VDDQ VSSQ E14 FBA_CLKA1 FBA_CLKA1# F12 VDDQ VSSQ E12
2 2 2 2 2 2 2 G2 VDDQ VSSQ F5 1 F14 VDDQ VSSQ E14

1
G13 VDDQ VSSQ F10 G2 VDDQ VSSQ F5
H3 VDDQ VSSQ H2 RV96 RV62 G13 VDDQ VSSQ F10
H12 VDDQ VSSQ H13 40.2_0402_1% 40.2_0402_1% H3 VDDQ VSSQ H2
K3 VDDQ VSSQ K2 VGA@ VGA@ H12 VDDQ VSSQ H13
VDDQ VSSQ Close to VRAM VDDQ VSSQ
K12 K13 K3 K2
2

L2 VDDQ VSSQ M5 K12 VDDQ VSSQ K13


L13 VDDQ VSSQ M10 L2 VDDQ VSSQ M5
Close to VRAM VDDQ VSSQ 1 VDDQ VSSQ
0.01U_0402_16V7K

M1 N1 VGA@ 1 1 1 1 1 1 1 L13 M10


VDDQ VSSQ VDDQ VSSQ
CV191

M3 N3 M1 N1
VDDQ VSSQ VDDQ VSSQ

10U_0402_6.3V6M

10U_0402_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
M12 N12 CV86 CV87 CV143 CV144 CV145 CV147 CV146 M3 N3
M14 VDDQ VSSQ N14 2 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ M12 VDDQ VSSQ N12
1 1 1 1 1 1 1 VDDQ VSSQ 2 2 2 2 2 2 2 VDDQ VSSQ
N5 R1 M14 N14
VDDQ VSSQ VDDQ VSSQ
10U_0402_6.3V6M

10U_0402_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

CV84 CV85 CV70 CV71 CV72 CV138 CV139 N10 R3 N5 R1


VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ P1 VDDQ VSSQ R4 N10 VDDQ VSSQ R3
2 2 2 2 2 2 2 P3 VDDQ VSSQ R11 P1 VDDQ VSSQ R4
P12 VDDQ VSSQ R12 P3 VDDQ VSSQ R11
P14 VDDQ VSSQ R14 P12 VDDQ VSSQ R12
VDDQ VSSQ
(3GHz and up) VDDQ VSSQ
T1 U1 P14 R14
T3 VDDQ VSSQ U3 T1 VDDQ VSSQ U1
VDDQ VSSQ Around VRAM VDDQ VSSQ
T12 U12 T3 U3
T14 VDDQ VSSQ U14 T12 VDDQ VSSQ U12
VDDQ VSSQ T14 VDDQ VSSQ U14
Around VRAM FBA0_VREFC VDDQ VSSQ
J14 A5
VREFC VPP/NC#A5 FBA1_VREFC
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
U5 1 1 1 1 1 1 1 1 J14 A5
VPP/NC#U5 VREFC VPP/NC#A5
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1 1 1 1 1 1 1 1 A10 U5
U10 VREFD CV166 CV168 CV167 CV170 CV169 CV172 CV171 CV173 A10 VPP/NC#U5
1 VREFD 1 VREFD
CV161 CV160 CV158 CV162 CV163 CV164 CV159 CV165 CV89 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ U10
2 2 2 2 2 2 2 2 VREFD
820P_0402_50V7K

820P_0402_50V7K
4 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ CV88 4
2 2 2 2 2 2 2 2 X76@ VGA@
2 2 X76@

x32 only
x32 only

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

N17P GDDR5 CHA 6/7


Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 28 of 61
A B C D E
A B C D E

MF=1
<24> FBB_D[63:0] MF=0 +1.35VSDGPU UV7B 2 OF 2 DVT modify

UV6B 2 OF 2 DVT modify K4 A4 FBB_D56


<24> FBB_CMD26

1
H5 A8/A7 DQ0 A2 FBB_D57
FBB_D0 <24> FBB_CMD23 A9/A1 DQ1 FBB_D58
K4 A4 RV64 H4 B4
<24> FBB_CMD6 A8/A7 DQ0 FBB_D1 <24> FBB_CMD22 A10/A0 DQ2 FBB_D59
H5 A2 549_0402_1% K5 B2
<24> FBB_CMD11 A9/A1 DQ1 FBB_D2 <24> FBB_CMD27 A11/A6 DQ3 FBB_D60
H4 B4 VGA@ J5 E4
<24> FBB_CMD10 A10/A0 DQ2 FBB_D3 <24> FBB_CMD25 A12/RFU#J5/NC#J5 DQ4 FBB_D61
K5 B2 RV65 E2
<24> FBB_CMD7

2
J5 A11/A6 DQ3 E4 FBB_D4 931_0402_1% H11 DQ5 F4 FBB_D62
1 <24> FBB_CMD9 A12/RFU#J5/NC#J5 DQ4 FBB_D5 FBB0_VREFC <24> FBB_CMD19 BA0/A2 DQ6 FBB_D63 1
E2 1 2 K10 F2
DQ5 FBB_D6 <24> FBB_CMD17 BA1/A5 DQ7 FBB_D48
H11 F4 K11 A11
<24> FBB_CMD2 BA0/A2 DQ6 FBB_D7 <24> FBB_CMD18 BA2/A4 DQ8 FBB_D49
K10 F2 VGA@ H10 A13
<24> FBB_CMD4 <24> FBB_CMD20

1
K11 BA1/A5 DQ7 A11 FBB_D8 BA3/A3 DQ9 B11 FBB_D50
<24> FBB_CMD3 BA2/A4 DQ8 FBB_D9 DQ10 FBB_D51
H10 A13 RV66 J4 B13
<24> FBB_CMD1 BA3/A3 DQ9 FBB_D10 <24> FBB_CMD24 ABI# DQ11 FBB_D52
B11 1.33K_0402_1% G3 E11
DQ10 FBB_D11 <24> FBB_CMD31 RAS# DQ12 FBB_D53
J4 B13 G12 E13
<24> FBB_CMD8 ABI# DQ11 FBB_D12 <24> FBB_CMD21 CS# DQ13 FBB_D54
G3 E11 VGA@ L3 F11
<24> FBB_CMD12 <24> FBB_CMD28

2
G12 RAS# DQ12 E13 FBB_D13 L12 CAS# DQ14 F13 FBB_D55
<24> FBB_CMD0 CS# DQ13 FBB_D14 <24> FBB_CMD16 WE# DQ15 FBB_D40
L3 F11 U11
<24> FBB_CMD15 CAS# DQ14 FBB_D15 FBB_VREFC_R DQ16 FBB_D41
L12 F13 J12 U13
<24> FBB_CMD5 WE# DQ15 FBB_D16 <24> FBB_CLKA1 CK DQ17 FBB_D42
U11 J11 T11
DQ16 FBB_D17 <24> FBB_CLKA1# CK# DQ18 FBB_D43
J12 U13 J3 T13
<24> FBB_CLKA0 CK DQ17 FBB_D18 <24> FBB_CMD30 CKE# DQ19 FBB_D44
J11 T11 +1.35VSDGPU N11
<24> FBB_CLKA0# CK# DQ18 FBB_D19 DQ20 FBB_D45
J3 T13 D2 N13
<24> FBB_CMD14 CKE# DQ19 FBB_D20 <24> FBB_DBI7 DBI0# DQ21 FBB_D46
N11 D13 M11
<24> FBB_DBI6

1
D2 DQ20 N13 FBB_D21 D P13 DBI1# DQ22 M13 FBB_D47
<24> FBB_DBI0 DBI0# DQ21 FBB_D22 <24> FBB_DBI5 DBI2# DQ23 FBB_D32
D13 M11 2 QV4 RV67 P2 U4
<24> FBB_DBI1 DBI1# DQ22 FBB_D23 <23,28> VRAM_VREF_CTL <24> FBB_DBI4 DBI3# DQ24 FBB_D33
P13 M13 G 549_0402_1% U2
<24> FBB_DBI2 DBI2# DQ23 FBB_D24 DQ25 FBB_D34
P2 U4 S VGA@ J2 T4
<24> FBB_DBI3 <24> FBB_CMD29

3
DBI3# DQ24 U2 FBB_D25 VGA@ RV68 RESET# DQ26 T2 FBB_D35

2
J2 DQ25 T4 FBB_D26 L2N7002WT1G_SC-70-3 931_0402_1% RV69 J10 DQ27 N4 FBB_D36
<24> FBB_CMD13 RESET# DQ26 FBB_D27 FBB1_VREFC FBB1_ZQ3 J13 SEN DQ28 FBB_D37
T2 1 2 1K_0402_5% N2
J10 DQ27 N4 FBB_D28 1 2 J1 ZQ DQ29 M4 FBB_D38
FBB0_ZQ1 SEN DQ28 FBB_D29 +1.35VSDGPU MF DQ30 FBB_D39
J13 N2 VGA@ M2

1
J1 ZQ DQ29 M4 FBB_D30 D4 DQ31
<24> FBB_WCK67 VGA@
MF DQ30 M2 FBB_D31 RV70 D5 WCK01 C2
DQ31 <24> FBB_WCK67# WCK01# EDC0 FBB_EDC7 <24>
D4 1.33K_0402_1% C13
<24> FBB_WCK01 WCK01 EDC1 FBB_EDC6 <24>
D5 C2 P4 R13
<24> FBB_WCK01# WCK01# EDC0 FBB_EDC0 <24> <24> FBB_WCK45 WCK23 EDC2 FBB_EDC5 <24>
C13 VGA@ P5 R2
FBB_EDC1 <24> <24> FBB_WCK45# FBB_EDC4 <24>

2
P4 EDC1 R13 WCK23# EDC3
<24> FBB_WCK23 WCK23 EDC2 FBB_EDC2 <24>
P5 R2
<24> FBB_WCK23# FBB_EDC3 <24>

1
WCK23# EDC3 X76@
2 VGA@ VGA@ 2
1

X76@ RV71 RV72


VGA@ VGA@ VGA@ 1K_0402_5% 121_0402_1%
RV73 RV74 RV75

2
1K_0402_5% 121_0402_1% 1K_0402_5%
2

+1.35VSDGPU
UV7A 1 OF 2

+1.35VSDGPU C5 B5
+1.35VSDGPU VDD VSS
UV6A 1 OF 2 C10 B10
D11 VDD VSS D10
+1.35VSDGPU VDD VSS
C5 B5 G1 G5
C10 VDD VSS B10 G4 VDD VSS G10
D11 VDD VSS D10 G11 VDD VSS H1
VDD VSS 1 1 1 1 1 1 1 VDD VSS
G1 G5 G14 H14
VDD VSS VDD VSS

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1 1 1 1 1 1 1 G4 G10 CV90 CV94 CV96 CV97 CV91 CV95 CV98 L1 K1
G11 VDD VSS H1 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ L4 VDD VSS K14
VDD VSS FBB_CLKA0 FBB_CLKA0# 2 2 2 2 2 2 2 VDD VSS
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

CV99 CV100 CV101 CV92 CV93 CV102 CV103 G14 H14 L11 L5
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ L1 VDD VSS K1 L14 VDD VSS L10

1
2 2 2 2 2 2 2 L4 VDD VSS K14 P11 VDD VSS P10
L11 VDD VSS L5 RV76 RV77 R5 VDD VSS T5
L14 VDD VSS L10 40.2_0402_1% 40.2_0402_1% R10 VDD VSS T10
P11 VDD VSS P10 VGA@ VGA@ VDD VSS
R5 VDD VSS T5 B1 A1

2
R10 VDD VSS T10 B3 VDDQ VSSQ A3
VDD VSS Close to VRAM VDDQ VSSQ
1 B12 A12
VDDQ VSSQ

0.01U_0402_16V7K
Close to VRAM B1 A1 B14 A14
VDDQ VSSQ VDDQ VSSQ

CV193
B3 A3 1 1 1 1 1 1 1 D1 C1
B12 VDDQ VSSQ A12 D3 VDDQ VSSQ C3
VDDQ VSSQ 2 VDDQ VSSQ

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M
1 1 1 1 1 1 1 B14 A14 CV104 CV105 CV106 CV174 CV108 CV109 CV110 D12 C4
D1 VDDQ VSSQ C1 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ D14 VDDQ VSSQ C11
VDDQ VSSQ 2 2 2 2 2 2 2 VDDQ VSSQ
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

CV111 CV112 CV113 CV114 CV115 CV116 CV117 D3 C3 E5 C12


3 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ D12 VDDQ VSSQ C4 E10 VDDQ VSSQ C14 3
2 2 2 2 2 2 2 D14 VDDQ VSSQ C11 F1 VDDQ VSSQ E1
E5 VDDQ VSSQ C12 F3 VDDQ VSSQ E3
VDDQ VSSQ VGA@ VDDQ VSSQ
E10 C14 F12 E12
F1 VDDQ VSSQ E1 F14 VDDQ VSSQ E14
F3 VDDQ VSSQ E3 FBB_CLKA1 FBB_CLKA1# G2 VDDQ VSSQ F5
F12 VDDQ VSSQ E12 G13 VDDQ VSSQ F10
1 Close to VRAM
1
F14 VDDQ VSSQ E14 H3 VDDQ VSSQ H2
G2 VDDQ VSSQ F5 RV97 RV98 H12 VDDQ VSSQ H13
Close to VRAM VDDQ VSSQ VDDQ VSSQ
G13 F10 40.2_0402_1% 40.2_0402_1% K3 K2
H3 VDDQ VSSQ H2 VGA@ VGA@ K12 VDDQ VSSQ K13
VDDQ VSSQ 1 1 1 1 1 1 1 VDDQ VSSQ
H12 H13 L2 M5
2

VDDQ VSSQ VDDQ VSSQ

10U_0402_6.3V6M

10U_0402_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
1 1 1 1 1 1 1 K3 K2 CV118 CV119 CV153 CV155 CV154 CV156 CV157 L13 M10
K12 VDDQ VSSQ K13 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ M1 VDDQ VSSQ N1
VDDQ VSSQ 1 VDDQ VSSQ
2 2 2 2 2 2 2
10U_0402_6.3V6M

10U_0402_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

0.01U_0402_16V7K

CV120 CV121 CV148 CV149 CV150 CV152 CV151 L2 M5 M3 N3


VDDQ VSSQ VDDQ VSSQ
CV192

VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ L13 M10 M12 N12
2 2 2 2 2 2 2 M1 VDDQ VSSQ N1 M14 VDDQ VSSQ N14
M3 VDDQ VSSQ N3 2 N5 VDDQ VSSQ R1
M12 VDDQ VSSQ N12 N10 VDDQ VSSQ R3
M14 VDDQ VSSQ N14 P1 VDDQ VSSQ R4
N5 VDDQ VSSQ R1 P3 VDDQ VSSQ R11
N10 VDDQ VSSQ R3 P12 VDDQ VSSQ R12
VDDQ VSSQ Around VRAM VDDQ VSSQ
P1 R4 VGA@ P14 R14
P3 VDDQ VSSQ R11 T1 VDDQ VSSQ U1
Around VRAM VDDQ VSSQ (3GHz and up) VDDQ VSSQ
P12 R12 T3 U3
P14 VDDQ VSSQ R14 T12 VDDQ VSSQ U12
VDDQ VSSQ VDDQ VSSQ
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
T1 U1 1 1 1 1 1 1 1 1 T14 U14
T3 VDDQ VSSQ U3 VDDQ VSSQ
T12 VDDQ VSSQ U12 CV182 CV184 CV183 CV185 CV186 CV188 CV187 CV189 FBB1_VREFC J14 A5
VDDQ VSSQ VREFC VPP/NC#A5
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1 1 1 1 1 1 1 1 T14 U14 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ U5
VDDQ VSSQ 2 2 2 2 2 2 2 2 A10 VPP/NC#U5
CV107 CV176 CV175 CV177 CV178 CV180 CV179 CV181 FBB0_VREFC J14 A5 U10 VREFD
VREFC VPP/NC#A5 1 VREFD
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ U5
2 2 2 2 2 2 2 2 VPP/NC#U5

820P_0402_50V7K
4 A10 CV122 4
U10 VREFD VGA@ X76@
VREFD 2
1 x32 only
CV123
820P_0402_50V7K

VGA@ X76@
x32 only 2

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

N17P GDDR5 CHB 7/7


Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 29 of 61
A B C D E
A B C D E

+19VB_CPU +INVPW R_B+ Place closed to JEDP1


+3VS
LCD POWER CIRCUIT +LCDVDD +LCDVDD
LED PANEL Conn.
UX1
W=60mils LX1
W=60mils +3VS JEDP1
W=60mils W=60mils
1U_0402_6.3V6K
CX1
5 1 HCB2012KF-221T30_0805 +INVPW R_B+ 1
IN OUT 1 2 2 1

.1U_0402_16V7K

.1U_0402_16V7K

10U_0402_6.3V6M
1 2
2 1 1 EMC@ CX4 1 1 1 3
GND 3

1000P_0402_50V7K
CX6
SM01000EJ00 3000ma 1 1 W=60mils 4
4 3 CX2 CX3 CX5 CX7 CX23 5 4
2 EN OC 220ohm@100mhz PCH_BKL_PW M 5
.1U_0402_16V7K DCR 0.04 68P_0402_50V8J 6
SY6288C20AAC_SOT23-5 2 2 XEMC@ XEMC@ 2 @2 2 BKOFF# 7 6
@ 2 2 EDP_HPD 7
10U_0402_6.3V6M 8
<17> PCH_ENVDD 8
1 +LCDVDD 9 1
9
1
10
RX1 11 10
12 11
100K_0402_5% 12
EDP_AUXN_C 13
@ EDP_AUXP_C 13
14
2

15 14
EDP_TXP0_C 16 15
EDP_TXN0_C 17 16
18 17
EDP_TXP1_C 19 18
EDP_TXN1_C 20 19
21 20
EDP_TXP2_C 22 21
EDP_TXN2_C 23 22
EDP_TXP0 CX8 1 2 .1U_0402_16V7K EDP_TXP0_C 24 23
<6> EDP_TXP0 EDP_TXN0 EDP_TXN0_C EDP_TXP3_C 24
CX9 1 2 .1U_0402_16V7K 25
<6> EDP_TXN0 EDP_TXP1 EDP_TXP1_C EDP_TXN3_C 25
CX10 1 2 .1U_0402_16V7K 26
<6> EDP_TXP1 EDP_TXN1 EDP_TXN1_C PCH_BKL_PW M 26
CX11 1 2 .1U_0402_16V7K RX2 1 @ 2 100K_0402_5% 6/02 update add LCDVDD pin
+LCDVDD 27
<6> EDP_TXN1 EDP_TXP2 EDP_TXP2_C <17> PCH_BKL_PW M 27
CX12 1 2 .1U_0402_16V7K 28
<6> EDP_TXP2 EDP_TXN2 EDP_TXN2_C TS_EN 28
CX13 1 2 .1U_0402_16V7K XEMC@ 29
<6> EDP_TXN2 EDP_TXP3 EDP_TXP3_C <20> TS_EN USB20_P8 29
CX15 1 2 .1U_0402_16V7K CX14 1 2 220P_0402_50V7K 30
<6> EDP_TXP3 EDP_TXN3 EDP_TXN3_C <16> USB20_P8 USB20_N8 30
CX16 1 2 .1U_0402_16V7K XEMC@ 31
<6> EDP_TXN3 <16> USB20_N8 I2C_0_SCL 31
BKOFF# CX17 1 2 220P_0402_50V7K Touch Screen 32
EDP_AUXP EDP_AUXP_C <39> BKOFF# <20> I2C_0_SCL I2C_0_SDA 32
<6> EDP_AUXP CX21 1 2 .1U_0402_16V7K 33
EDP_AUXN EDP_AUXN_C <20> I2C_0_SDA I2C_TS_INT# 33
<6> EDP_AUXN CX22 1 2 .1U_0402_16V7K RX3 1 @ 2 10K_0402_5% 34
<17> I2C_TS_INT# 34
+TS_PW R 35
36 35 41
37 36 G1 42
+3VS USB20_P9_CAMERA 37 G2
2 38 43 2
USB20_N9_CAMERA 39 38 G3 44
For Camera 39 G4
RX4 40 45
0_0402_5% 40 G5
1 @ 2 EDP_HPD ACES_50398-04041-001
<18> PCH_EDP_HPD
CONN@
1

RX7
100K_0402_5%
2

I2C Touch Screen

+TS_PW R
3 3

+3VS RX8 1 @ 2 0_0603_5% PVT modify


+5VS RX9 1 @ 2 0_0603_5%

SPI touch RST follow CRB #544669 P.8

Camera
USB20_N9 RX10 1 @ 2 0_0402_5% USB20_N9_CAMERA
<16> USB20_N9

USB20_P9 RX11 1 @ 2 0_0402_5% USB20_P9_CAMERA


<16> USB20_P9

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

eDP CONN.
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 30 of 61
A B C D E
A B C D E

+3VS_ALS

+5VS W=40mils +HDMI_5V_OUT


+1.5VS W=40mils

0.01U_0402_16V7K

.1U_0402_16V7K
UY1
1 1

CY1

CY2
3
OUT

.1U_0402_16V7K

.1U_0402_16V7K

0.01U_0402_16V7K

0.01U_0402_16V7K
1 2 2
1 1 1 1 1
IN

CY4

CY5

CY6

CY7
CY3
2 .1U_0402_16V7K UY2
GND 2
2 2 2 2 19 11
1 AP2330W-7_SC59-3 20 VDD15_1 VDD33 +HDMI_5V_OUT 1
31 VDD15_2 30 ALS_TX2+
40 VDD15_3 OUT_D2+ 29 ALS_TX2- +3VS
VDD15_4 OUT_D2-
27 ALS_TX1+
CY8 2 1 .1U_0402_16V7K HDMI_C_TX2+ 1 OUT_D1+ 26 ALS_TX1-
<6> CPU_DP2_P0 IN_D2+ OUT_D1-
CY9 2 1 .1U_0402_16V7K HDMI_C_TX2- 2
<6> CPU_DP2_N0 IN_D2-

4
3
2
1
25 ALS_TX0+
CY10 2 1 .1U_0402_16V7K HDMI_C_TX1+ 4 OUT_D0+ 24 ALS_TX0- RPY1
<6> CPU_DP2_P1 IN_D1+ OUT_D0-
CY11 2 1 .1U_0402_16V7K HDMI_C_TX1- 5 2.2K_0804_8P4R_5%
<6> CPU_DP2_N1 IN_D1- ALS_CLK+
22
CY12 2 1 .1U_0402_16V7K HDMI_C_TX0+ 6 OUT_CLK+ 21 ALS_CLK-
<6> CPU_DP2_P2

5
6
7
8
+3VS +3VS_ALS CY13 2 1 .1U_0402_16V7K HDMI_C_TX0- 7 IN_D0+ OUT_CLK-
<6> CPU_DP2_N2 IN_D0- PCH_DP2_CTRL_DATA
39
1 2 0_0603_5% 1 .1U_0402_16V7K HDMI_C_CLK+ SDA_SRC PCH_DP2_CTRL_CLK PCH_DP2_CTRL_DATA <18>
RY1 @ <6> CPU_DP2_P3 CY14 2 9 38
1 .1U_0402_16V7K HDMI_C_CLK- IN_CLK+ SCL_SRC HDMI_SDATA PCH_DP2_CTRL_CLK <18>
<6> CPU_DP2_N3 CY15 2 10 33
PreMP modify IN_CLK- SDA_SNK 32 HDMI_SCLK
HDMI_BUF 14 SCL_SNK
HDMI_DCIN_EN 13 DDCBUF/SDA_CTL
+3VS_ALS HDMI_EQ 17 DCIN_EN/SCL_CTL 3 PCH_DP2_HPD
EQ/I2C_ADDR HPD_SRC PCH_DP2_HPD <18>
8
I2C_CTL_EN

1
ALS_CLK+ RY2 1 @ 2 0_0402_5% HDMI_R_CK+
HDMI_HPD 28 12 RY5 ALS_CLK- RY3 1 @ 2 0_0402_5% HDMI_R_CK-
HDMI_DCIN_EN HPD_SNK NC_1 +1.5VS ALS_TX0+ HDMI_R_D0+
RY4 1 @ 2 4.7K_0402_5% 15 RY6 1 @ 2 0_0402_5%
RY7 1 @ 2 4.7K_0402_5% HDMI_CFG 18 NC_2 34 HDMI_ISET 100K_0402_5% ALS_TX0- RY8 1 @ 2 0_0402_5% HDMI_R_D0-
@T45 36 REXT NC_3 37 ALS_TX1+ RY9 1 @ 2 0_0402_5% HDMI_R_D1+
+3VS_ALS

2
PD# NC_4

1
HDMI_CFG 23 ALS_TX1- RY10 1 @ 2 0_0402_5% HDMI_R_D1-
HDMI_PRE CFG ALS_TX2+ HDMI_R_D2+

0.01U_0402_16V7K

0.01U_0402_16V7K
RY11 16 RY12 1 @ 2 0_0402_5%
4.99K_0402_1% PRE ALS_TX2- RY13 1 @ 2 0_0402_5% HDMI_R_D2-
1 1

CY16

CY17
35 add 05/18
GND 41
2 2 2
EPAD
PS8201ATQFN40GTR2A0_TQFN40_5X5 2 2

PS8407A --- SA000077R30


close pin12,37

PS8407A internal pull down 150k

RY14 1 @ 2 20K_0402_5%
HDMI connector
Intel Sugesstion
HDMI_HPD 19
18 HP_DET
+HDMI_5V_OUT +5V
17
HDMI_SDATA 16 DDC/CEC_GND
HDMI_SCLK 15 SDA
14 SCL
13 Utility
CEC

2
+3VS_ALS +3VS_ALS +3VS_ALS +3VS_ALS HDMI_R_CK- 12
11 CK-
HDMI_R_CK+ 10 CK_shield
HDMI_R_D0- 9 CK+
D0-
1

1
8
HDMI_R_D0+ 7 D0_shield
3 HDMI_R_D1- D0+ 3
@ RY15 @ RY16 @ RY17 @ RY18 DY1 6
4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% XEMC@ 5 D1-
YSLC05CH_SOT23-3 HDMI_R_D1+ 4 D1_shield 23
2

1
HDMI_BUF HDMI_PRE HDMI_EQ HDMI_ISET HDMI_R_D2- 3 D1+ GND1 22
2 D2- GND2 21
D2_shield GND3
1

1
HDMI_R_D2+ 1 20
Reserved for ESD D2+ GND4
@ RY19 @ RY20 @ RY21 @ RY22 JHDMI1
4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% ACON_HMRBL-AK120D
DC232004700
2

2
CONN@

Enable act i ve DDC buf fer; Output pre-emphasis set t i ng; Receiver equalizat i on s e t t ing; ZZZ1
Internal pull down at ~150KΩ , 3. 3V I / O Internal pull down at ~150kΩ , 3. 3VI / O. Internal pull down at ~150kΩ , 3. 3VI / O.
L: default, passive DDC pass-through L: no pre-emphasis L: programmable EQ for channel loss up to 5.3dB
H: act i ve DDC buf fer wi th inter nal pul l up2. 36K resis to
r H: 1.6dB pre-emphasis H: programmable EQ for channel loss up to 10dB
M: act i ve DDC buf fer wi t hout inter nal pul l up resis to
r M: 3.0dB pre-emphasis M: programmable EQ for channel loss up to 14dB
HDMI_ROYALTY
ROYALTY HDMI W/LOGO+HDCP
RO0000003HM
45@

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title
HDMI PS8407 CONN.
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 31 of 61
A B C D E
A B C D E

LAN-RTL8111H
+3VALW +3V_LAN
PVT modify

RL1 1 @ 2 0_0805_5%
W=60mil W=60mil +LAN_VDD +3V_LAN
IDC=1200mA W=60mil
60mil UL1 60mil PVT modify
300mA 1.4A
5 1
1 IN OUT 1
+REGOUT RL10 1 @ 2 0_0603_5%
2
GND
4 3 1 1 1 1 1 1 1 1 1 1 1 1
EN OC

.1U_0402_16V7K
CL7

.1U_0402_16V7K
CL1

.1U_0402_16V7K
CL2

.1U_0402_16V7K
CL3

.1U_0402_16V7K
CL8

.1U_0402_16V7K
CL9

1U_0402_6.3V6K
CL4

4.7U_0603_6.3V6K
CL10

4.7U_0603_6.3V6K
CL11

.1U_0402_16V7K
CL12

.1U_0402_16V7K
CL13

.1U_0402_16V7K
CL14
2 SY6288C20AAC_SOT23-5
@ @ @
CL5 2 2 2 2 2 2 2 2 2 2 2 2
1U_0402_6.3V6K LAN_PWR_EN Using LDO mode
1 LAN_PWR_EN <39>
@

Place near Pin 3,8,22,30 Place near Pin 22 For surge improvement Place near Pin 11,32

From EC Place near Pin 11,32


High act i ve.
EN threshold voltage min:1.2V typ:1.6V max:2.0V
Current limit threshold 1.5~2.8A
+3V_LAN Rising t i me must >0. 5 ms and <100 ms
UL2

+3V_LAN
reserve EC_PME# pull high 100K to +3VALW_EC +3VS

1
LAN_MIDI0+ 1 17 PCIE_PRX_C_DTX_P4 .1U_0402_16V7K 2 1 CL16 RL4 RL8
LAN_MIDI0- MDIP0 HSOP PCIE_PRX_C_DTX_N4 PCIE_PRX_DTX_P4 <16>
2 18 .1U_0402_16V7K 2 1 CL15 10K_0402_5% 1K_0402_5%
+LAN_VDD MDIN0 HSON PLT_RST_BUF# PCIE_PRX_DTX_N4 <16>
3 19 @
LAN_MIDI1+ AVDD10 PERSTB PLT_RST_BUF# <17,34,37>
4 20 ISOLATEB

2
LAN_MIDI1- 5 MDIP1 ISOLATEB 21 LAN_PME# 0_0402_5% 2 @ 1 RL2 GPO ISOLATEB
2 LAN_MIDI2+ MDIN1 LANWAKEB +LAN_VDD EC_PME# <17,39> 2
6 22

2
LAN_MIDI2- 7 MDIP2 DVDD10 23 +3V_LAN 10K_0402_5% 2 1 RL3
+LAN_VDD MDIN2 VDDREG +3V_LAN
8 24 +REGOUT RL9
LAN_MIDI3+ 9 AVDD10 REGOUT 25 15K_0402_5%
LAN_MIDI3- 10 MDIP3 LED2 26 GPO 2 @ 1
+3V_LAN MDIN3 LED1/GPIO LAN_GPO <18>
11 27 0_0402_5% RL7

1
LAN_CLKREQ# 12 AVDD33 LED0 28 XTLO_R RL5 1 @ 2 XTLO YL1
PU at PCH side <19> LAN_CLKREQ#
13 CLKREQB CKXTAL1 29 XTLI 0_0402_5% 25MHZ_10PF_7V25000014
<16> PCIE_PTX_C_DRX_P4 HSIP CKXTAL2 +LAN_VDD
<16> PCIE_PTX_C_DRX_N4 14 30
CLK_PCIE_LAN 15 HSIN AVDD10 31 LAN_RST 1 2 XTLI 1 3 XTLO
<19> CLK_PCIE_LAN CLK_PCIE_LAN# REFCLK_P RSET +3V_LAN 1 3
<19> CLK_PCIE_LAN# 16 32 2.49K_0402_1% RL6
REFCLK_N AVDD33 33 GND GND
GND 1 1
10P_0402_50V8J
10P_0402_50V8J 2 4 CL21
CL20
2 2

RTL8111H-CG_QFN32_4X4
SA000080P00

LAN Connector
3 3

TR1
LAN_TERMAL 1 24
LAN_MIDI0+ 2 TCT1 MCT1 23 RJ45_MIDI0+
LAN_MIDI0- 3 TD1+ MX1+ 22 RJ45_MIDI0- RJ45_MIDI0+ 1
TD1- MX1- PR1+
4 21 RJ45_MIDI0- 2
LAN_MIDI1+ 5 TCT2 MCT2 20 RJ45_MIDI1+ PR1-
LAN_MIDI1- 6 TD2+ MX2+ 19 RJ45_MIDI1- RJ45_MIDI1+ 3
TD2- MX2- PR2+
7 18 RJ45_MIDI2+ 4
LAN_MIDI2+ 8 TCT3 MCT3 17 RJ45_MIDI2+ PR3+
LAN_MIDI2- 9 TD3+ MX3+ 16 RJ45_MIDI2- RJ45_MIDI2- 5
TD3- MX3- PR3-
10 15 RJ45_MIDI1- 6
LAN_MIDI3+ 11 TCT4 MCT4 14 RJ45_MIDI3+ PR2-
LAN_MIDI3- 12 TD4+ MX4+ 13 RJ45_MIDI3- RJ45_MIDI3+ 7 9
TD4- MX4- PR4+ GND 10
RJ45_MIDI3- 8 GND
PR4-
40mil
1
2
3
4

1 GST5009-E JRJ45
SP050006B10 75_0804_8P4R_1% SANTA_130452-S RJ45_GND 1 2 LANGND
C2 RP1 CONN@ C1
.1U_0402_16V7K 40mil 10P_0402_50V8J
2 DC234005N10
8
7
6
5

Place close to TCT pin LANGND

1
RJ45_GND @
J1 JP2
JUMP_43X118 XEMC@
B88069X9231T203_4P5X3P2-2
4 4

2
D1
EMC@
MESC5V02BD03_SOT23-3
1

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

LAN RTL8411H
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 32 of 61
A B C D E
A B C D E

To Fun/B (USB Port 5, + AUDIO)


JSUB1
HPOUT_L_1 1
<40> HPOUT_L_1 HPOUT_R_1 1
<40> HPOUT_R_1 2
SLEEVE 3 2
<40> SLEEVE 3
<40> RING2 RING2 4
HP_PLUG# 5 4
<40> HP_PLUG# 5
GNDA 6
7 6
1 7 1
8
USB20_P5 9 8
<16> USB20_P5 USB20_N5 9
10
<16> USB20_N5 USB_EN 10
<35,36,39> USB_EN 11
12 11
USB20_P10 13 12
<16> USB20_P10 USB20_N10 13
14
<16> USB20_N10 CR_LED# 14
15
16 15
+3VS 16
17
18 17
19 18
20 19
+5VALW 20
1
21
GND

22U_0603_6.3V6M
CS30 22
@ GND
2
ACES_51522-02001-P02
SP01001KD00
CONN@
DVT modify

2 2

To LED/B
+3VALW
JLED1
1
BATT_BLUE_LED# 2 1
<39> BATT_BLUE_LED# BATT_AMB_LED# 2
<39> BATT_AMB_LED# 3
PWR_LED# 4 3
<39> PWR_LED# PWR_SUSP_LED# 4
<39> PWR_SUSP_LED# 5
MEDIA_LED# 6 5
7 6
+3VS DMIC_CLK_R 7
<40> DMIC_CLK_R 8
DMIC_DATA_R 9 8
<40> DMIC_DATA_R 9
10
11 10
LID_SW # 12 11
<39> LID_SW# 12
+5VALW 13 15
PVT modify 14 13 GND 16
+3VLP 14 GND
ACES_51524-0140N-001
SP010021H00 CONN@

3 3

+3VS

PVT modify
1

RO25
10K_0402_5% +3VS
5
2

VCC

<34> SSD_LED# 1 2 1
RO23 0_0402_5% IN B 4MEDIA_LED#
1 @ 2 2 OUT Y
GND

RO26 0_0402_5% IN A

UG13
3

NL17SZ08DFT2G_SC70-5

+3VS
5

for SATA port


VCC

4 <17> SATA_LED# 1 4
IN B 4
CR_LED# 2 OUT Y
GND

IN A

UG1
3

NL17SZ08DFT2G_SC70-5
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

FUN/B & LED/B


Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 33 of 61
A B C D E
5 4 3 2 1

D D

JSSD1
1 2
GND 3.3VAUX +3VS_SSD_NGFF
3 4
PCIE_PRX_DTX_N12 5 GND 3.3VAUX 6 +3VS +3VS_SSD_NGFF
<17> PCIE_PRX_DTX_N12 PCIE_PRX_DTX_P12 7 PERn3 N/C 8
<17> PCIE_PRX_DTX_P12 9 PERp3 N/C 10
PCIE_PTX_C_DRX_N12 GND DAS/DSS# SSD_LED# <33>
CM21 2 0.22U_0402_16V7K 11 12 RM11 2
<17> PCIE_PTX_DRX_N12 CM31 2 0.22U_0402_16V7K PCIE_PTX_C_DRX_P12 13 PETp3 3.3VAUX 14
<17> PCIE_PTX_DRX_P12 PETn3 3.3VAUX

10U_0603_6.3V6M

.1U_0402_16V7K
15 16 0_0805_5% CM5 1 2 1
PCIE_PRX_DTX_N11 17 GND 3.3VAUX 18 CM6
<17> PCIE_PRX_DTX_N11 PCIE_PRX_DTX_P11 19 PERn2 3.3VAUX 20 + CS29
<17> PCIE_PRX_DTX_P11 21 PERp2 N/C 22 150U_B2_6.3VM_R35M
CM11 2 0.22U_0402_16V7K PCIE_PTX_C_DRX_N11 23 GND N/C 24 2 1 SGA00009M00
<17> PCIE_PTX_DRX_N11 CM41 2 0.22U_0402_16V7K PCIE_PTX_C_DRX_P11 25 PETp2 N/C 26 2
<17> PCIE_PTX_DRX_P11 27 PETn2 N/C 28
PCIE_PRX_DTX_N10 29 GND N/C 30
<17> PCIE_PRX_DTX_N10 PCIE_PRX_DTX_P10 31 PERn1 N/C 32
<17> PCIE_PRX_DTX_P10 33 PERp1 N/C 34
CM71 2 0.22U_0402_16V7K PCIE_PTX_C_DRX_N10 35 GND N/C 36
<17> PCIE_PTX_DRX_N10 CM81 2 0.22U_0402_16V7K PCIE_PTX_C_DRX_P10 37 PETn1 N/C 38 RM2 1 @ 2 0_0402_5%
<17> PCIE_PTX_DRX_P10 PETp1 DEVSLP SSD_DEVSLP0 <16>
DVT modify 39 40
RM16 1 @ 2 0_0402_5% PCIE_PRX_R_DTX_P9 41 GND N/C 42 RM3 1 2 0_0402_5%
<17> PCIE_PRX_DTX_P9 RM17 1 @ 2 0_0402_5% PCIE_PRX_R_DTX_N9 43 PERn0/SATA B+ N/C 44
<17> PCIE_PRX_DTX_N9 45 PERp0/SATA B- N/C 46
CM9 1 2 0.22U_0402_16V7K PCIE_PTX_C_DRX_N9 47 GND N/C 48
<17> PCIE_PTX_DRX_N9 CM10 1 2 0.22U_0402_16V7K PCIE_PTX_C_DRX_P9 49 PETn0/SATA A- N/C 50 NGFF_SSD_RST#_RRM4 1 @ 2 0_0402_5%
<17> PCIE_PTX_DRX_P9 PETp0/SATA A+ PERST# NGFF_CLKREQ#_R RM5 1 PLT_RST_BUF# <17,32,37>
51 52 @ 2 0_0402_5%
GND CLKREQ# NGFF_CLKREQ# <19>
PVT modify 53 54
C 55 REFCLKn PEWake# 56 C
57 REFCLKp N/C 58
GND N/C

RM6
59 60 SUSCLK_SSD 1 @ 2 0_0402_5%
N/C SUSCLK SUSCLK <18,37>
61 62
<19> CLK_PCIE_NGFF# PEDET 3.3VAUX
63 64
<19> CLK_PCIE_NGFF GND 3.3VAUX
65 66
GND 3.3VAUX +3VS_SSD_NGFF
67
GND
SSD_DET#
69 68
MTG77 MTG76
+3VS_SSD_NGFF
LTCX005V800 BELLW_80159-3221
BELLW_80159-3221_67P-T
CONN@
2

RM7
10K_0402_5% @
1

PVT modify
RM19
1 @ 2 SSD_DET#
<17> SATA_GP0
0_0402_5%
1

D
B QM1 2 B
BSS138W-7-F_SOT323-3 G
@ S
3

SSD_DET#
SATA Device 0
DVT modify PCIE Device 1

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
mSATA-SSD

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev

Laptopblue.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 34 of 61
5 4 3 2 1
5 4 3 2 1

USB3.0 (Port 3) PVT modify

USB20_P3 2
LS2 EMC@
1 USB20_P3_L
For ESD request
USB3_PTX_C_DRX_N3 USB3_PTX_L_DRX_N3 <16> USB20_P3
<16> USB3_PTX_DRX_N3 CS1 1 2 RS1 1 @ 2 0_0402_5%
.1U_0402_16V7K
USB20_N3 3 4 USB20_N3_L DS1 EMC@
1 2 USB3_PTX_C_DRX_P3 1 2 0_0402_5% USB3_PTX_L_DRX_P3 <16> USB20_N3 TBTA_SBU1 1 1 TBTA_SBU1
<16> USB3_PTX_DRX_P3 CS2 RS2 @ 10 9
.1U_0402_16V7K MCM1012B900F06BP_4P
SM070003Z00 CC1_VCONN 2 2 9 8
CC1_VCONN

USB3_PTX_L_DRX_N3 4 USB3_PTX_L_DRX_N3
D 4 7 7 D
USB3_PTX_L_DRX_P3 5 6 6 USB3_PTX_L_DRX_P3
5

3 3

8
USB3_PRX_DTX_N3 RS3 1 @ 2 0_0402_5% USB3_PRX_L_DTX_N3
<16> USB3_PRX_DTX_N3
L05ESDL5V0NA-4 SLP2510P8
USB3_PRX_DTX_P3 RS4 1 @ 2 0_0402_5% USB3_PRX_L_DTX_P3
<16> USB3_PRX_DTX_P3 DS2 EMC@
USB3_PTX_L_DRX_P4 1 USB3_PTX_L_DRX_P4
1 10 9
USB3_PTX_L_DRX_N4 2 9 8 USB3_PTX_L_DRX_N4
2
USB20_P4_L 4 4 7 7
USB20_P4_L

USB20_N4_L 5 5 6 6 USB20_N4_L

USB3.0 (Port 4) LS5 EMC@


3 3

8
CS3 1 2 USB3_PTX_C_DRX_N4 RS5 1 @ 2 0_0402_5% USB3_PTX_L_DRX_N4 USB20_P4 2 1 USB20_P4_L
<16> USB3_PTX_DRX_N4 <16> USB20_P4
.1U_0402_16V7K L05ESDL5V0NA-4 SLP2510P8

CS4 1 2 USB3_PTX_C_DRX_P4 RS6 1 @ 2 0_0402_5% USB3_PTX_L_DRX_P4 USB20_N4 3 4 USB20_N4_L


<16> USB3_PTX_DRX_P4 <16> USB20_N4
.1U_0402_16V7K
MCM1012B900F06BP_4P DS3 EMC@
USB3_PRX_L_DTX_N3 1 USB3_PRX_L_DTX_N3
SM070003Z00 1 10 9
USB3_PRX_L_DTX_P3 2 9 8 USB3_PRX_L_DTX_P3
2
CC2_VCONN 4 4 7 7 CC2_VCONN

TBTA_SBU2 5 5 TBTA_SBU2
6 6
C C
USB3_PRX_DTX_N4 RS7 1 @ 2 0_0402_5% USB3_PRX_L_DTX_N4 3 3
<16> USB3_PRX_DTX_N4
8
USB3_PRX_DTX_P4 RS8 1 @ 2 0_0402_5% USB3_PRX_L_DTX_P4
<16> USB3_PRX_DTX_P4
L05ESDL5V0NA-4 SLP2510P8

DS4 EMC@
USB20_P3_L 1 1 USB20_P3_L
10 9
USB20_N3_L 2 2 9 8
USB20_N3_L

USB3_PRX_L_DTX_N4 4 7 7 USB3_PRX_L_DTX_N4
4
USB3_PRX_L_DTX_P4 5 6 6
USB3_PRX_L_DTX_P4
5

3 3

L05ESDL5V0NA-4 SLP2510P8

+5VALW +5VALW_CC +3VALW +3VALW_CC +5VALW_CC_VOUT


120mils 3A
RS9 1 @ 2 0_0805_5% RS10 1 @ 2 0_0603_5% 1
10U_0402_6.3V6M

.1U_0402_16V7K

0.01U_0402_16V7K

1 CS8
PreMP modify
1 PreMP modify
1 2 1 10U_0402_6.3V6M
CS5 + CS6
2
CS7

CS9

CS10

10U_0402_6.3V6M 150U_B2_6.3VM_R35M
SGA00009M00
2 2 2 1 2

+USB3_VCCC +USB3_VCCC
B @ J13 B
1 2
1 2
JUMP_43X118
+USB3_VCCC JUSB3
+5VALW_CC +5VALW_CC_VOUT A1 B1
US1
30V 10mOhm
QS1 AON6405L 1P DFN GND GND
+3VALW_CC 120mils 3A 120mils 3A 1
120mils 3A USB3_PTX_L_DRX_P3 A2 B2 USB3_PTX_L_DRX_P4
+3VALW_CC 2 14 2 USB3_PTX_L_DRX_N3 A3 SSTXP1 SSTXP2 B3 USB3_PTX_L_DRX_N4
3 IN1 OUT 15 5 3 0.47U_0402_25V6K 2 1 CS11 SSTXN1 SSTXN2
4 IN1 OUT A4 B4 CS12 1 2 0.47U_0402_25V6K
IN2 VBUS VBUS

3
RS13 1 2 100K_0402_5% CC_FAULT# 5 RS15 RS12 CC1_VCONN A5 B5 CC2_VCONN
4

AUX CC1 CC2

1
RS14 1 2 100K_0402_5% CC_LD_DET# 1 2 1 CC_FAULT# +3VALW_CC 100K_0402_5% @ 1M_0402_5% CS13
CC_UFP# <39> TYPEC_EN FAULTb CC_LD_DET# USB20_P3_L USB20_P4_L
RS16 1 2 100K_0402_5% RS40 0_0402_5% 20 10U_0805_25V6K A6 B6
RS19 1 2 100K_0402_5% CC_POL# 1 @ 2 CC_EN 6 LD_DETb DS5 USB20_N3_L A7 DP1 DP2 B7 USB20_N4_L
CC_AUDIO# <33,36,39> USB_EN 2

2
EN DN1 DN2
1

RS17 1 2 100K_0402_5% RS37 0_0402_5% MESC5V02BD03_SOT23-3


3

RS18 1 2 100K_0402_5% CC_DEBUG# PreMP modify RS39 EMC@ TBTA_SBU1 A8 B8 TBTA_SBU2


CC_CHG 7 11 CC1_VCONN 10K_0402_5% 0.47U_0402_25V6K SBU1 SBU2
CC_CHG_HI 8 CHG CC1 13 CC2_VCONN QS2B 2 1 CS14 A9 B9 CS15 1 2 0.47U_0402_25V6K
PVT modify RS20 1 2 100K_0402_5% CC_CHG CHG_HI CC2 5 DMN65D8LDW-7_SOT363-6 VBUS VBUS
6 2

1
PreMP modify RS21 1 @ 2 100K_0402_5% CC_CHG_HI USB3_PRX_L_DTX_N4 A10 B10 USB3_PRX_L_DTX_N3
16 CC_DEBUG# USB3_PRX_L_DTX_P4 A11 SSRXN2 SSRXN1 B11 USB3_PRX_L_DTX_P3
4

RS22 1 @ 2 0_0402_5% CC_EN CC_REF 10 DEBUGb 17 CC_AUDIO# 3/8-for leakage current to connector SSRXP2 SSRXP1
REF AUDIOb 18 CC_POL# QS2A A12 B12
POLb 19 CC_UFP# 2 DMN65D8LDW-7_SOT363-6 GND GND
RS23 1 2 100K_0402_1% 9 UFPb 1 6
1 @ 2 CC_CHG_HI 12 GND1 21 2 GND GND 7
<18> CC_CHG_HI#
1

RS38 0_0402_5% GND2 powerpad 3 GND GND 8


PreMP modify 4 GND GND 9
5 GND GND 10
GND GND
TPS25810RVCR_QFN20_4X3 LOTES_AUSB0164-P008A
CONN@
US1 update -s footprint
DC23300LZ00
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CC+USB TYPE C
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 35 of 61
5 4 3 2 1

Laptopblue.vn
Laptopblue.vn
A B C D E

+5VALW

USB3.0 (Port 1) PVT modify

USB3_PTX_L_DRX_P1
For ESD request
DS6
1 1
EMC@
10 9 USB3_PTX_L_DRX_P1
CS17 EMC@
1 2 5
US2
1
+USB3_VCCA

IN OUT W=60mils
<16> USB3_PTX_DRX_P1 1 2 USB3_PTX_C_DRX_P1 RS24 1 @ 2 0_0402_5% USB3_PTX_L_DRX_P1
CS18 .1U_0402_16V7K USB3_PTX_L_DRX_N1 2 2 9 8 USB3_PTX_L_DRX_N1 .1U_0402_16V7K 2
GND

<16> USB3_PTX_DRX_N1 1 2 USB3_PTX_C_DRX_N1 RS25 1 @ 2 0_0402_5% USB3_PTX_L_DRX_N1 USB3_PRX_L_DTX_P1 4 4 7 7 USB3_PRX_L_DTX_P1


<33,35,39> USB_EN
USB_EN 4 3 1 @ 2
EN OC USB_OC0# <16>
CS16 .1U_0402_16V7K
USB3_PRX_L_DTX_N1 5 5 6 6 USB3_PRX_L_DTX_N1 SY6288C20AAC_SOT23-5 RS26 1
SA000079400 0_0402_5%
3 3 CS19
1 .1U_0402_16V7K 1
8 2
@
L05ESDL5V0NA-4 SLP2510P8

+USB3_VCCA
USB3_PRX_DTX_P1 RS27 1 @ 2 0_0402_5% USB3_PRX_L_DTX_P1
<16> USB3_PRX_DTX_P1 SM070003Z00
MCM1012B900F06BP_4P
W=100mils
USB3_PRX_DTX_N1 RS28 1 @ 2 0_0402_5% USB3_PRX_L_DTX_N1 USB20_P1 3 4 U2DP1_L
<16> USB3_PRX_DTX_N1 <16> USB20_P1 1 1
CS20 + CS21
USB20_N1 2 1 U2DN1_L
<16> USB20_N1 .1U_0402_16V7K
150U_6.3V_M_D2 2
LS9 EMC@ 2
USB3.0 Conn.
JUSB1
CONN@
DS7 EMC@ 1
6 3 U2DP1_L U2DN1_L 2 VBUS
I/O4 I/O2 U2DP1_L 3 D-
+USB3_VCCA 4 D+
USB3_PRX_L_DTX_N1 5 GND
5 2 USB3_PRX_L_DTX_P1 6 SSRX- 10
VDD GND 7 SSRX+ GND 11
USB3_PTX_L_DRX_N1 8 GND GND 12
USB3_PTX_L_DRX_P1 9 SSTX- GND 13
4 1 U2DN1_L SSTX+ GND
I/O3 I/O1 ACON_TARAH-9R1491
AZC099-04S.R7G_SOT23-6
2
DC23300H700 2

USB3.0 (Port 2) PVT modify For ESD request +5VALW


DS8 EMC@ +USB3_VCCB
<16> USB3_PTX_DRX_N2 1 2 USB3_PTX_C_DRX_N2 RS29 1 @ 2 0_0402_5% USB3_PTX_L_DRX_N2 USB3_PTX_L_DRX_P2 1 1 10 9 USB3_PTX_L_DRX_P2 CS23 EMC@
CS22 .1U_0402_16V7K .1U_0402_16V7K US3
USB3_PTX_L_DRX_N2 2 2 9 8 USB3_PTX_L_DRX_N2 1 2 5 1
IN OUT W=60mils
<16> USB3_PTX_DRX_P2 1 2 USB3_PTX_C_DRX_P2 RS30 1 @ 2 0_0402_5% USB3_PTX_L_DRX_P2
CS24 .1U_0402_16V7K USB3_PRX_L_DTX_P2 4 4 7 7 USB3_PRX_L_DTX_P2 2
GND
USB3_PRX_L_DTX_N2 5 5 6 6 USB3_PRX_L_DTX_N2 USB_CHARGE_2A 4 3 RS31 1 @ 2 0_0402_5%
<39> USB_CHARGE_2A EN OC USB_OC1# <16>
3 3 SY6288C20AAC_SOT23-5 1
SA000079400
8 CS25
.1U_0402_16V7K
L05ESDL5V0NA-4 SLP2510P8 2
@

USB3_PRX_DTX_N2 RS32 1 @ 2 0_0402_5% USB3_PRX_L_DTX_N2


<16> USB3_PRX_DTX_N2

USB3_PRX_DTX_P2 RS33 1 @ 2 0_0402_5% USB3_PRX_L_DTX_P2


<16> USB3_PRX_DTX_P2 +USB3_VCCB
3 3

W=100mils
SM070003Z00
1 1
MCM1012B900F06BP_4P
U2DP2 3 4 USB20_P2_L CS26 + CS27
.1U_0402_16V7K
150U_6.3V_M_D2 2
U2DN2 2 1 USB20_N2_L 2
USB3.0 Conn
USB Host Charger LS12 EMC@

1
JUSB2
CONN@
CB SELCDP VBUS
USB20_N2_L 2
USB20_P2_L 3 D-
0 X DCP(Dedicated Charging Port) D+
autodetect with mouse/keyboard wakeup 4
+3VLP DS9 EMC@ USB3_PRX_L_DTX_N2 5 GND
6 3 USB20_P2_L USB3_PRX_L_DTX_P2 6 SSRX- 10
1 0 S0 charging with SDP(Standard Downstream Port) only I/O4 I/O2 SSRX+ GND
7 11
GND GND
1

USB3_PTX_L_DRX_N2 8 12
1 1 S0 charging with CDP(Charging Downstream Port) or SSTX- GND
RS34 USB3_PTX_L_DRX_P2 9 13
SDP only SSTX+ GND
10K_0402_5% +USB3_VCCB 5 2
VDD GND ACON_TARAH-9R1491
US4
DC23300H700
2

RS35 1 @ 2 8 1 USB_CEN
<39> USB_CB CB CEN USB_CEN <39> USB20_N2_L
0_0402_5% 7 2 U2DN2 4 1
<16> USB20_N2 TDM DM I/O3 I/O1
6 3 U2DP2
<16> USB20_P2 TDP DP
5 4 1 @ 2 AZC099-04S.R7G_SOT23-6
+5VALW VDD SELCDP +5VALW
1 9 RS36 10K_0402_5%
Thermal Pad
4 CS28 SLG55594AVTR_TDFN8_2X2 4
USB_SELCDP <39>
.1U_0402_16V7K SA00006L600
2

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title
USB3.0 Conn/USB Charger
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 36 of 61
A B C D E
A B C D E

Wireless LAN
+3VS 60mil +3VS_W LAN

RM8 1 @ 2 0_0805_5%

1
PreMP modify
1
CM11
1
@
CM12
1
CM13
KEY E +3VS_W LAN
1

4.7U_0603_6.3V6K .1U_0402_16V7K JNGFF1


2 2 2 1 2
.1U_0402_16V7K USB20_P7 3 GND_1 3.3VAUX_2 4
<16> USB20_P7 USB20_N7 USB_D+ 3.3VAUX_4
USB2 Port.7 5 6 @ T47
<16> USB20_N7 USB_D- LED1#
7 8
(For BT) 9 GND_7 PCM_CLK 10
11 SDIO_CLK PCM_SYNC 12
13 SDIO_CMD PCM_OUT 14
+3VS_W LAN 15 SDIO_DAT0 PCM_IN 16
+3VALW SDIO_DAT1 LED2# @ T48
17 18
UM1 19 SDIO_DAT2 GND_18 20
W=60mils SDIO_DAT3 UART_WAKE UART_2_CRXD_DTXD
1U_0402_6.3V6K
CM14

5 1 21 22
IN OUT SDIO_WAKE UART_TX UART_2_CRXD_DTXD <20>
1 23
2 SDIO_RST
GND PH +3VS at SOC side, for win7 USB3 debug
UART_2_CTXD_DRXD
@ 24
UART_RX UART_2_CTXD_DRXD <20>
4 3 25 26
2 EN OC PCIE_PTX_C_DRX_P3 27 GND_33 UART_RTS 28
<16> PCIE_PTX_C_DRX_P3 PCIE_PTX_C_DRX_N3 PET_RX_P0 UART_CTS E51TXD_P80DATA_R
SY6288C20AAC_SOT23-5 29 30 RM9 2 @ 1 0_0402_5%
<16> PCIE_PTX_C_DRX_N3 PET_RX_N0 CLink_RST E51RXD_P80CLK_R E51TXD_P80DATA <39>
IOAC@ 31 32 RM13 2 @ 1 0_0402_5%
PCIE_PRX_DTX_P3 GND_39 CLink_DATA E51RXD_P80CLK <39>
(link to PICE Port 3) <16> PCIE_PRX_DTX_P3 33 34
PCIE_PRX_DTX_N3 35 PER_TX_P0 CLink_CLK 36
<39> W LAN_ON PCIE X1 <16> PCIE_PRX_DTX_N3 PER_TX_N0 COEX3 @ T50
37 38 @ T51
CLK_PCIE_W LAN 39 GND_45 COEX2 40
<19> CLK_PCIE_W LAN CLK_PCIE_W LAN# REFCLK_P0 COEX1 SUSCLK_R @ T52
41 42 RM11 1 @ 2 0_0402_5%
<19> CLK_PCIE_W LAN# REFCLK_N0 SUSCLK(32KHz) W L_RST#_R SUSCLK <18,34>
(From PCH CLKOUT2) 43 44 RM12 1 @ 2 0_0402_5%
W LAN_CLKREQ# GND_51 PERST0# BT_ON PLT_RST_BUF# <17,32,34>
PCIE CLK <19> W LAN_CLKREQ# 45 46
W LAN_PME# CLKREQ0# W_DISABLE2# W L_OFF# BT_ON <39>
47 48
<39> W LAN_PME# PEWAKE0# W_DISABLE1# W L_OFF# <39>
49 50
2
NGFF WL+BT (KEY E) 51
53
GND_57
RSVD/PCIE_RX_P1
I2C_DAT
I2C_CLK
52
54
2

2 1 55 RSVD/PCIE_RX_N1 I2C_IRQ 56
+3VS_W LAN GND_63 RSVD_64 BT_ON E51TXD_P80DATA_R
RM14 10K_0402_5% 57 58
2 @ 1 59 RSVD/PCIE_TX_P1 RSVD_66 60
RM15 10K_0402_5% 61 RSVD/PCIE_TX_N1 RSVD_68 62
GND_69 RSVD_70

1
63 64
65 RSVD_71 3.3VAUX_72 66 RM18 RM10
67 RSVD_73 3.3VAUX_74 @
GND_75 100K_0402_5% 100K_0402_5%
68
69 GND1

2
GND2
BELLW _80152-3221
CONN@
SP070013E00

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

M.2 Key E (WLAN)


Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 37 of 61
A B C D E
A B C D E

SATA Re-Driver and cable HDD Conn.

B_EQ1
A_EQ2
A_EQ1
close to CONN. JHDD1

DEW
1 1
1
+3VS RDSATA_PTX_DRX_P2 CO1 1 2 0.01U_0402_16V7K RDSATA_PTX_C_DRX_P2 2 1
CO14 RDSATA_PTX_DRX_N2 2
CO2 1 2 0.01U_0402_16V7K RDSATA_PTX_C_DRX_N2 3
2 1 4 3
RDSATA_PRX_DTX_N2 CO3 1 2 0.01U_0402_16V7K RDSATA_PRX_C_DTX_N2 5 4
0.01U_0402_16V7K UO1 RDSATA_PRX_DTX_P2 CO4 1 2 0.01U_0402_16V7K RDSATA_PRX_C_DTX_P2 6 5

20
19
18
17
16
PS8527CTQFN20GTR2A_TQFN20_4X4 7 6
DVT modify 8 7

VDD2
B_EQ1
A_EQ2
A_EQ1
DEW
+3VS 8
9
10 9
CO16 2 1 SATA_PTX_C_DRX_P2 0.01U_0402_16V7K 1 15 RDSATA_PTX_DRX_P2 11 10
<17> SATA_PTX_DRX_P2 SATA_PTX_C_DRX_N2 A_INP A_OUTP RDSATA_PTX_DRX_N2 11
<17> SATA_PTX_DRX_N2 CO17 2 1 0.01U_0402_16V7K 2 14 12
3 A_INN A_OUTN 13 B_EQ2 13 12
CO18 2 1 SATA_PRX_C_DTX_N2 0.01U_0402_16V7K 4 GND1 B_EQ2 12 RDSATA_PRX_DTX_N2 1 @ 2 +5VS_HDD 14 13
<17> SATA_PRX_DTX_N2 SATA_PRX_C_DTX_P2 B_OUTN B_INN RDSATA_PRX_DTX_P2 +5VS 14
CO19 2 1 0.01U_0402_16V7K 5 11 RO3 0_0805_5% 15
<17> SATA_PRX_DTX_P2 B_OUTP B_INP 15
21 PreMP modify 16
GND2 16

REXT

VDD1
B_DE
A_DE
17
G_INT2 1 @ 2 G_INT2_R 18 17

EN
RO4 0_0402_5% 19 18
20 19
Need check P11 Active

6
7
8
9
10
+3VS 21 20
High or Low G1
+3VS 22
A_DE G2

0.1U_0402_16V7K
RO10 1 @ 2 4.7K_0402_5% RO6 2 1 1 23
+3VS 4.99K_0402_1% 24 G3

B_DE
A_DE
RO11 1 @ 2 4.7K_0402_5% B_DE G4
+3VS +5VS_HDD

CO15
1 RO5 @ 2 ACES_50406-02071-001
RO12 1 @ 2 4.7K_0402_5% B_EQ1 4.7K_0402_5% 2 CONN@

RO13 1 @ 2 4.7K_0402_5% A_EQ1 100mils SP010016L00


2 2
A_EQ2

10U_0603_6.3V6M
CO12
RO14 1 @ 2 4.7K_0402_5% 1 1

1
B_EQ2
USE 8527 re-driver
RO20 1 @ 2 4.7K_0402_5% CO11 CO13
SA00007JU00 .1U_0402_16V7K .1U_0402_16V7K

2
RO22 1 @ 2 4.7K_0402_5% DEW 2 @ 2 @

RO15 1 @ 2 4.7K_0402_5% A_DE

RO16 1 @ 2 4.7K_0402_5% B_DE

RO17 1 2 4.7K_0402_5% B_EQ1

RO18 1 @ 2 4.7K_0402_5% A_EQ1


PVT modify
RO19 1 @ 2 4.7K_0402_5% A_EQ2

RO21 1 2 4.7K_0402_5% B_EQ2

G-Sensor reserved for BA serial


3 3

+3VS

1
R11 +3VS
10K_0402_5%
BA@ LGAU3 BA@
1 C11 1 2 10U_0603_6.3V6M

2
8 Vdd_IO
4 CS 14 1 2 BA@
<14,15,18> D_CK_SCLK SCLSPC Vdd
6 C12 .1U_0402_16V7K
<14,15,18> D_CK_SDATA SDA/SDI/SDO
7
R12 1 @ 2 10K_0402_5% SDO/SA0 11 G_INT#
+3VS INT1 G_INT2 G_INT# <20>
R13 1 BA@ 2 10K_0402_5% 16 9
15 ADC1 INT2
13 ADC2 10 INT1/2 all High Active
ADC3 RES
2
3 NC 5
NC GND 12
GND
LIS3DHTR_LGA16_3X3
BA@

LIS3DH
SA0 ->0, Address is 0011 000 (0x30h)
4 SA0 ->1, Address is 0011 001 (0x32h) 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

HDD/ Re-Driver/ G-sensor


Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 38 of 61
A B C D E
A B C D E

+3VLP_EC +3VLP_ECA Board ID


+3VLP LB1 +3VLP_EC
JP3 FBMA-L11-160808-800LMT_0603
1 2 1 2 +3VLP_ECA
1 2

2
JUMP_43X39 RB1

.1U_0402_16V7K

.1U_0402_16V7K
@ 1 1 1 Ra 100K_0402_1%

CB1

CB2
CB3

1
1
AD_BID
For Power consumption 2 2 2
.1U_0402_16V7K
RB2
Measurement

1
0_0402_5% 1
ECAGND RB7
@ ECAGND <45>
Rb 20K_0402_5% CB5

2
1 +3VLP_LPC 1
.1U_0402_16V7K
2
@

2
+3VLP_EC

111
125
22
33
96

67
9
UB1
1 @ 2 EC_PME#
Analog Board ID definition,

VCC0
VCC_LPC
VCC
VCC
VCC

VCC

AVCC
RB3 47K_0402_5%
Please see page 3.
ESPI Bus Pin : 1~5.7.8.10.12.14
LPC Bus Pin : 3~5.7.8.10.12.13 SUSPWRDNACK 1 21 EC_VCCST_PG_R
<18> SUSPWRDNACK EC_KBRST# GATEA20/GPIO00 EC_VCCST_PG/GPIO0F EC_VCCST_PG_R <9,43>
2 23 BEEP#
TPM_SERIRQ 3 KBRST#/GPIO01 BEEP#/GPIO10 26 USB_CB BEEP# <40>
<16,41> TPM_SERIRQ LPC_FRAME# 4 SERIRQ EC_FAN_PW M/GPIO12 27 POA_EN# USB_CB <36>
<16,41> LPC_FRAME# LPC_AD3 LPC_FRAME# PWM Output AC_OFF/GPIO13 POA_EN# <42>
5
<16,41> LPC_AD3 LPC_AD2 7 LPC_AD3 @
<16,41> LPC_AD2 LPC_AD1 8 LPC_AD2 63 BATT_TEMP USB_CB 2 1
<16,41> LPC_AD1 LPC_AD0 10 LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 64 POA_POWERREQ BATT_TEMP <45,46>
LPC & MISC RB4 4.7K_0402_5%
<16,41> LPC_AD0 LPC_AD0 VCIN1_BATT_DROP/AD1/GPIO39 65 ADP_I POA_POWERREQ <42>
CLK_LPC_R 12 ADP_I/AD2/GPIO3A 66 AD_BID ADP_I <45,46>
<16> CLK_LPC_R PLT_RST# CLK_PCI_EC AD Input AD_BID/AD3/GPIO3B WLAN_PME#
13 75
<17,23,41> PLT_RST# EC_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76 EC_PME# WLAN_PME# <37>
For turn off internal LPC module of KB9032
<42> EC_RST# EC_SCI# 20 EC_RST# AD5/GPIO43 EC_PME# <17,32>
<20> EC_SCI# WLAN_ON 38 EC_SCI#/GPIO0E
PLT_RST# <37> WLAN_ON CLKRUN#/GPIO1D
1 2
CB4 XEMC@ 100P_0402_50V8J 68 LAN_PWR_EN
<41> KSI[0..7] DA0/GPIO3C 70 EN_DFAN1 LAN_PWR_EN <32>
DA Output EN_DFAN1/DA1/GPIO3D EN_DFAN2 EN_DFAN1 <42>
KSI0 55 71
KSI0/GPIO30 DA2/GPIO3E GPU_OVERT# EN_DFAN2 <42>
KSI1 56 72
AC_IN KSI1/GPIO31 DA3/GPIO3F GPU_OVERT# <23>
1 2 KSI2 57
CB6 100P_0402_50V8J KSI3 58 KSI2/GPIO32 83 EC_MUTE#
KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A USB_EN EC_MUTE# <40>
KSI4 59 84
60 KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B 85 USB_CEN USB_EN <33,35,36>
2 XEMC@ XEMC@ KSI5 2
KSI5/GPIO35 PSCLK2/GPIO4C USB_CEN <36>
2 1 2 1 CLK_LPC_R KSI6 61 PS2 Interface 86 TYPEC_EN
KSI6/GPIO36 PSDAT2/GPIO4D TP_CLK TYPEC_EN <35>
CB7 RB9 KSI7 62 87
<41> KSO[0..17] 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA TP_CLK <41>
22P_0402_50V8J 33_0402_5% KSO0
40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <41>
KSO1
KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97 ENBKL
43 KSO3/GPIO23 ENKBL/GPXIOA00 98 TP_PWR_EN ENBKL <17> SYS_PWROK_R 1 2
KSO4 @ SYS_PWROK <18,43>
44 KSO4/GPIO24 W OL_EN/GPXIOA01 99 ME_EN TP_PWR_EN <41>
@ KSO5 RB11 0_0402_5%
1 2 EC_KBRST# KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH ME_EN <18>
<16,20> EC_KBRST#_R
RB12 KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 VCIN0_PH <45>
0_0402_5% KSO8 47 KSO7/GPIO27
KSO8/GPIO28 SPI Device Interface USB_SELCDP
DVT modify KSO9 48 119
49 KSO9/GPIO29 MISO/GPIO5B 120 BT_ON USB_SELCDP <36>
KSO10
+3VLP_EC 50 KSO10/GPIO2A MOSI/GPIO5C 126 USB_SW_EN# BT_ON <37>
KSO11 SPI Flash ROM SPICLK/GPIO58
51 KSO11/GPIO2B 128 FP_PWR_EN USB_SW_EN# <42>
KSO12
EC_SMB_CK1 KSO12/GPIO2C SPICS#/GPIO5A FP_PWR_EN <42>
RB13 1 2 2.2K_0402_5% KSO13 52
RB14 1 2 2.2K_0402_5% EC_SMB_DA1 KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73 GPU_ALERT +3VS
KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 SYS_PWROK_R GPU_ALERT <23>
KSO16 81 74
KSO17 82 KSO16/GPIO48 SYS_PW ROK/AD7/GPIO41 89 VR_PWRGD
KSO17/GPIO49 GPIO50 90 BATT_BLUE_LED# VR_PWRGD <52>
BATT_CHG_LED#/GPIO52 CAPS_LED# BATT_BLUE_LED# <33>
91
EC_SMB_CK1 CAPS_LED#/GPIO53 PWR_LED# CAPS_LED# <41> GPU_ALERT RB15 1 VGA@
77 GPIO 92 2 10K_0402_5%
<45,46> EC_SMB_CK1 EC_SMB_DA1 78 EC_SMB_CLK1/GPIO44 PW R_LED#/GPIO54 93 BATT_AMB_LED# PWR_LED# <33>
<45,46> EC_SMB_DA1 EC_SMB_CK2 79 EC_SMB_DAT1/GPIO45 BATT_LOW _LED#/GPIO55 95 BATT_AMB_LED# <33> GPU_OVERT#RB16 1 VGA@ 2 10K_0402_5%
SYSON
<18,23> EC_SMB_CK2 EC_SMB_DA2 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 EC_TP_INT# SYSON <13,43,48,50>
PU at CPU side 80 121
<18,23> EC_SMB_DA2 EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 127 USB_CHARGE_2A EC_TP_INT# <17,41>
DPW ROK_EC/GPIO59 USB_CHARGE_2A <36>
SM Bus
PM_SLP_S3# 6 100 EC_RSMRST# +3VLP_EC
<18,43> PM_SLP_S3# PWR_INT# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 AUTH_ERR EC_RSMRST# <18>
14 101 EC Internal PU
3 <42> PWR_INT# GPIO07 GPXIOA04 VCIN1_ADP_PROCHOT AUTH_ERR <42> 3
SPOK 15 102
<47> SPOK TP_EN 16 GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 103 VCOUT1_PROCHOT VCIN1_ADP_PROCHOT <45> LID_SW# RB17 1 2 100K_0402_1%
<41> TP_EN VR_ON GPIO0A VCOUT1_PROCHOT#/GPXIOA06
17 104 MAINPWON
<43,51,52> VR_ON WL_OFF# 18 GPIO0B VCOUT0_MAIN_PW R_ON/GPXIOA07 105 MAINPWON <42,45,47>
BKOFF#
<37> WL_OFF# AC_PRESENT GPIO0C BKOFF#/GPXIOA08 DGPU_AC_DETECT BKOFF# <30>
19 GPIO GPO 106
<18> AC_PRESENT KBL_EN AC_PRESENT/GPIO0D GPXIOA09 3V_EN_R DGPU_AC_DETECT <20,23>
25 107
<41> KBL_EN FAN_SPEED1 28 PW M2/GPIO11 PCH_PW R_EN/GPXIOA10 108 DCHG_I
<42> FAN_SPEED1 FAN_SPEED2 29 FAN_SPEED1/GPIO14 PW R_VCCST_PG/GPXIOA11 DCHG_I <46>
<42> FAN_SPEED2 E51TXD_P80DATA 30 FANFB1/GPIO15
<37> E51TXD_P80DATA E51RXD_P80CLK EC_TX/GPIO16 AC_IN
31 110
<37> E51RXD_P80CLK PCH_PWROK 32 EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 112 EC_ON AC_IN <46>
<18,43> PCH_PWROK PCH_PW ROK/GPIO18 EC_ON/GPXIOD02 EC_ON <47>
For Thermal Portect Shutdown
PWR_SUSP_LED# 34 114 ON/OFFBTN# DB1
<33> PWR_SUSP_LED# NUM_LED# SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 LID_SW# ON/OFFBTN# <41>
36 GPI 115 RB751V-40_SOD323-2
<41> NUM_LED# NUM_LED#/GPIO1A LID_SW #/GPXIOD04 116 LID_SW# <33> 1 2 3V_EN
SUSP# MAINPWON
SUSP#/GPXIOD05 117 SW_PROCHOT# SUSP# <13,43,48,50,51> 3V_EN <47,49>
GPXIOD06 EC_PECI
1
118 1 2 RB19
PBTN_OUT# PECI/GPXIOD07 H_PECI <9,17> 3V_EN_R
122 RB18 33_0402_1% CB8 1 2 RB20 1 2
<18> PBTN_OUT# PM_SLP_S4# 123 PBTN_OUT#/GPIO5D 124 .1U_0402_16V7K 1M_0402_5%
<18,43> PM_SLP_S4# PM_SLP_S4#/GPIO5E V18R/VCC_IO2 +3VLP_EC 2
XEMC@ 1K_0402_5%
AGND
GND
GND
GND
GND
GND

KB9022QD_LQFP128_14X14
11
24
35
94
113

ECAGND 69

CO-LAY with KB9032QA (SA000080J00) 20mil


CB9 1 2 BATT_TEMP
100P_0402_50V8J
1 2 VCOUT1_PROCHOT LB2 2 1
RB21 0_0402_5% FBMA-L11-160808-800LMT_0603
DGPU_AC_DETECT SW_PROCHOT#
RB22 1 @ 2 0_0402_5% VR_HOT#
4
For abnormal shutdown QB1A @ VR_HOT# <52>
4
6

DMN65D8LDW-7_SOT363-6
SPOK 1 2 EC_RSMRST# H_PROCHOT# RB23 1 @ 2 0_0402_5% SW_PROCHOT#
<9,46> H_PROCHOT#
DB2 RB751V-40_SOD323-2
VCOUT1_PROCHOT 2 5 VCOUT1_PROCHOT

1 2 PCH_PWROK DMN65D8LDW-7_SOT363-6
1

DB3 RB751V-40_SOD323-2
2015/1/9 acer require:
@ QB1B Security Classification Compal Secret Data Compal Electronics, Inc.
EC_VCCST_PG_R reserved protact circuit when Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title
1 2
DB4 RB751V-40_SOD323-2 adaptor 107% happen THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE-KB9012A4/KB9022

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

Laptopblue.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 39 of 61
A B C D E
A B C D E

HD Audio Codec
+5VS
40mil +VDDA
2000mA 600ohm@100MHz 40mil J18
+VDDA +5VS_PVDD 1 2
DCR 0.1 LA1
PBY201209T-601Y-N_2P
1 2 JUMP_43X39
@
+VDDA
1 1 1
+5VS_AVDD (output = 300 mA)

10U_0402_6.3V6M
CA5

.1U_0402_16V7K
CA6

.1U_0402_16V7K
CA8
1 20mil 1
2 2 2 RA2 1 @ 2

1 1 1 0_0603_5%

.1U_0402_16V7K
CA13

.1U_0402_16V7K
CA15

10U_0402_6.3V6M
CA11
near Pin41 near Pin46
2 2 2

GNDA

CA10 1 2 .1U_0402_16V7K
near Pin26
near Pin9 Int. Speaker Conn. 6
G2
CA9 1 2 10U_0402_6.3V6M 5 GND
SPKL+ EMC@1 LA3 2
40mil
PBY160808T-121Y-N_2P SPK_L+ 4 G1
1 @ 2 +3VS_DVDDIO SPKL- EMC@1 LA4 2 PBY160808T-121Y-N_2P SPK_L- 3 4
+3VS SPK_R+ 3
RA5 0_0402_5% SPKR+ EMC@1 LA5 2 PBY160808T-121Y-N_2P 2
SPKR- EMC@1 LA6 2 PBY160808T-121Y-N_2P SPK_R- 1 2
PVT modify +3VS_DVDD PVT modify 1
20mil

3
+1.8VS_VDDA 1 @ 2 JSPK1
+1.8VS
+3VS 1 @ 2 1 1 RA3 0_0402_5% ACES_50278-00401-001

.1U_0402_16V7K
CA17

10U_0402_6.3V6M
CA16
RA1 0_0402_5% 1 1
SP02000RR00
10U_0402_6.3V6M
CA1

.1U_0402_16V7K
CA2
DA1 DA2
MESC5V02BD03_SOT23-3 MESC5V02BD03_SOT23-3
2 @ 2 XEMC@ XEMC@
2 2
GNDA
near Pin1

41

46

26

40

1
1

9
10P_0402_50V8J 2 1 RA8 DMIC_CLK UA1 Place near Pin40

PVDD1

PVDD2

AVDD1

AVDD2
DVDD

DVDD-IO
XEMC@ GND GND
Reserved for RF
LINE1_L 22
2 LINE1_R LINE1-L(PORT-C-L) 2
21 43 SPKL-
LINE1-R(PORT-C-R) SPK-OUT-L- 42 SPKL+
24 SPK-OUT-L+
23 LINE2-L(PORT-E-L) 45 SPKR+
40mil
LINE2-R(PORT-E-R) SPK-OUT-R+
SPK-OUT-R-
44 SPKR- HDA_BIT_CLK_R Digital MIC
RING2 17
MIC2-L(PORT-F-L) /RING2 MIC BOM upload by Audio Team

2
SLEEVE 18
MIC2-R(PORT-F-R) /SLEEVE 32 HP_LEFT RA59
31 HPOUT-L(PORT-I-L) 33 HP_RIGHT
+MICBIAS LINE1-VREFO-L HPOUT-R(PORT-I-R) 0_0402_5%
30
LINE1-VREFO-R 10 HDA_SYNC_R

1
DMIC_DATA 2 SYNC 6 HDA_BIT_CLK_R HDA_SYNC_R <18> XEMC@
DMIC_CLK 3 GPIO0/DMIC-DATA BCLK HDA_BIT_CLK_R <18>
GPIO1/DMIC-CLK 2
CA37
47 5 HDA_SDOUT_R
22P_0402_50V8J
<18>
<39> EC_MUTE#
HDA_RST_AUDIO#
HDA_RST_AUDIO# 11 PDB
RESETB
ALC283-CG SDATA-OUT
SDATA-IN
8 HDA_SDIN0_AUDIO 1 2 HDA_SDOUT_R
HDA_SDIN0
<18>
<18>
1
RA17 33_0402_5% XEMC@
48
MONO_IN 12 SPDIF-OUT/GPIO2
PCBEEP 16
Close codec MONO-OUT +MIC2_VREFO
<33> HP_PLUG# RA6 2 1 200K_0402_1% SENSE_A 13
RA7 2 1 100K_0402_1% 14 SENSE A
+3VS SENSE B 29 CA24 1 210U_0402_6.3V6M DMIC_DATA 2 1
TO LED/B
1 MIC2-VREFO GND DMIC_DATA_R
37 0_0402_5% RA9
CA23 35 CBP 7 CA25 1 210U_0402_6.3V6M PCH_DMIC_DATA0 2 @ 1 DMIC_DATA_R <33>
CBN LDO3-CAP GNDA <18> PCH_DMIC_DATA0
2.2U_0402_6.3V6M 39 33_0402_5% RA10
2 LDO2-CAP 27 CA26 1 210U_0402_6.3V6M
LDO1-CAP GNDA PCH_DMIC_CLK0 DMIC_CLK_R
36 100K_0402_5% 1 2 RA18 2 @ 1
+3VS_DVDD CPVDD <18> PCH_DMIC_CLK0 DMIC_CLK_R <33>
10mil 33_0402_5% RA11
28 CODEC_VREF CA39 @1 2 10U_0402_6.3V6M DMIC_CLK 2 1
RA4 1 @ 2 0_0402_5% 20 VREF 0_0402_5% RA13
+3VALW CPVREF 15 RA60 2 @ 1 20K_0402_1% GNDA CA40 1 2 2.2U_0402_6.3V6M GNDA
DVT modify CA29 1 2 19 JDREF 34 CPVEE
GNDA MIC-CAP CPVEE Close codec
CA41 1 2 .1U_0402_16V7K
2.2U_0402_6.3V6M
CA28

Pin20 10U_0402_6.3V6M @
3
ALC283 : NC 1 3
RA61 2 @ 1 0_0402_5% 4
ALC255/256 : Power for combo jack depop DVSS
circuit at system shutdown mode 49 25
Thermal PAD AVSS1 38
AVSS2 2
Pin4 Pin15
ALC283 : DVSS ALC255-CG_MQFN48_6X6 ALC283 : Ref. Resistor for Jack Detect
ALC255/256 : DC DET (For Japen customer only) ALC255/256 : Jack Detect for SPDIF-OUT and SPK-OUT port
SA000082700
GND GNDA

RA26
22K_0402_5% CA30 TO FUN/B
BEEP#_R
1U_0402_6.3V6K
MONO_IN
Headphone Out
2 1 1 2
<39> BEEP#
+MIC2_VREFO RA25 1 2 SLEEVE SLEEVE <33>
2.2K_0402_5%
2

RA27 1 RA24 1 2 RING2 RING2 <33>


22K_0402_5% XEMC@ 2.2K_0402_5%
100P_0402_50V8J
CA31

4.7K_0402_5%
RA28

2 1
<18> PCH_SPKR PVT modify
2
1

HP_LEFT RA29 1 @ 2 0_0603_5% HPOUT_L_1


HPOUT_L_1 <33>
HP_RIGHT RA33 1 @ 2 0_0603_5% HPOUT_R_1
HPOUT_R_1 <33>

GND LINE1_L 1 2
CA36 4.7U_0603_6.3V6K
LINE1_R 1 2
CA34 4.7U_0603_6.3V6K

RA44 1 @ 2 0_0402_5% RA40 1 @ 2 0_0402_5%


+MICBIAS DA3
2 2 RA14 1
4.7K_0402_5%
4 1 4
RA45 1 @ 2 0_0402_5% RA41 1 @ 2 0_0402_5%
3 2 RA15 1
4.7K_0402_5%
BAT54A-7-F_SOT23-3

RA46 1 @ 2 0_0402_5% RA42 1 @ 2 0_0402_5%

RA47 1 @ 2 0_0402_5% RA43 1 @ 2 0_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

GND GNDA GND GNDA THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD Audio Codec ALC255
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

Laptopblue.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
C5PM2 M/B LA-E361P
Laptopblue.vn
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 28, 2016 Sheet 40 of 61
A B C D E
A B C D E

KB Conn. JKB1

<39> CAPS_LED# RK13


RK11
RK10
1
1
1
@
@
2
2
2
1K_0402_5%
0_0402_5%
0_0402_5%
1
2
3
1
2
TP/B Conn. +3V_PTP
+3V_PTP +3VALW
+5VS 3
RK12 1 2 1K_0402_5% 4
ON/OFF BTN <39> NUM_LED#
5 4 +3V_PTP

2
PVT modify ON/OFFBTN# 6 5 UK1
6

4.7U_0603_6.3V6K
KSO0 7 1 5
R2 KSO1 8 7 1 @ 2 RK2 OUT IN
8 +3VALW 1

CK1
100K_0402_5% KSO2 9 RK1 0_0402_5% 10K_0402_5% 2
2 1 KSO3 10 9 1 @ 2 GND
+3VLP +3VS

1
KSO4 11 10 ACES_51524-00801-001 RK3 0_0402_5% EC_TP_INT# 3 4
KSO5 12 11 CONN@ 2 OC EN
12 2
ON/OFFBTN# KSO6 13 CK2 @ SY6288C20AAC_SOT23-5
1 <39> ON/OFFBTN#
KSO7 14 13 SP01001A910 .1U_0402_16V7K CK3
1

KSO8 15 14 1 1 2 1U_0402_6.3V6K
KSO9 16 15 1 2 TP_CLK 1
16 2 TP_DATA <39> TP_PWR_EN
SW1 @ KSO10 17 3 EC PS2
EVQPLDA15_4P KSO11 18 17 3 4
Test Only 1 3 KSO12 19 18 4 5 I2C_1_SDA_R
19 5 I2C_1_SCL_R
TP_PWR_EN follow SYSON behavior
BOT KSO13 20 6
2 4 KSO14 21 20 6 7 EC_TP_INT# PCH I2C
21 7 TP_EN EC_TP_INT# <17,39>
KSO15 22 8 TP_EN <39>
KSO16 23 22 8 9
6
5

PreMP modify KSO17 24 23 GND 10


KSI0 25 24 GND
KSI1 26 25
KSI2 27 26 33 JTP1 +3V_PTP
KSI[0..7] KSI3 28 27 GND 34 DVT modify
KSI[0..7] <39> 28 GND
KSI4 29
KSO[0..17] KSI5 30 29 +3V_PTP
KSO[0..17] <39>

1
KSI6 31 30
KSI7 32 31 RK4 RK5
32 4.7K_0402_5% 4.7K_0402_5%

1
+3V_PTP
ACES_50698-03201-001

2
CONN@ RK6 RK7
2.2K_0402_5% 2.2K_0402_5%

2
KB BackLight QK1A TP_CLK
TP_CLK <39>

2
TP_DATA
I2C_1_SCL_R TP_DATA <39>
6 1

100P_0402_50V8J
<20> I2C_1_SCL

CK4

CK5
100P_0402_50V8J
1 1
+5VS JBL1 1 @ 2
U1 1 RK8 0_0402_5% XEMC@
5 1 +5VS_BL 2 1 DMN65D8LDW-7_SOT363-6 XEMC@
IN OUT 3 2 2 2
2 4 3 DMN65D8LDW-7_SOT363-6
2 GND 4 RK9 1 @ 2 0_0402_5% 2

<39> KBL_EN 1 @ 2 4 3 5
R3 0_0402_5% EN OC 6 GND 3 4 I2C_1_SDA_R
GND <20> I2C_1_SDA
SY6288C20AAC_SOT23-5
ACES_51524-0040N-001
CONN@ QK1B

5
1 SP010022M00
C3
.1U_0402_16V7K +3V_PTP
2
@

TPM
+3VALW R4 +3VALW_TPM +3VS R5 +3VS_TPM
0_0603_5% 0_0603_5%
1 TPM@ 2 1 TPM@ 2
10U_0603_6.3V6M

.1U_0402_16V7K

10U_0603_6.3V6M

.1U_0402_16V7K
C7

.1U_0402_16V7K
C8

.1U_0402_16V7K
C9

1 1 1 1 1 1
C4

C5

C6

2 TPM@ 2 TPM@
near pin1 2 TPM@ 2 2
TPM@ 2
TPM@ TPM@

3 3

near pin8,14,22

BADD SELECTION
* 1 AEh(write), AFh(read)

U2 TPM@
1 +3VALW_TPM
29 VSB
30 XOR_OUT/SDA/GPIO0 8
SCL/GPIO1 VDD1 +3VS_TPM
3 14
0_0402_5% 1 @ 2 R6 TPM_BADD 6 GPX/GPIO2 VDD2 22
GPIO3/BADD VDD3
LPC_AD0 24 2
<16,39> LPC_AD0 LPC_AD1 LAD0/MISO NC1
21 7
<16,39> LPC_AD1 LPC_AD2 LAD1/MOSI NC2
18 10
<16,39> LPC_AD2 LPC_AD3 LAD2/SPI_IRQ# NC3
15 11
<16,39> LPC_AD3 LAD3 NC4 25
CLK_LPC_TPM_R 19 NC5 26
<16> CLK_LPC_TPM_R LPC_FRAME# LCLK/SCLK NC6
20 31
<16,39> LPC_FRAME# PLT_RST# LFRAME#/SCS# NC7
17
<17,23,39> PLT_RST# TPM_SERIRQ LRESET#/SPI_RST#/SRESET#
27 9
<16,39> TPM_SERIRQ PM_CLKRUN# 13 SERIRQ GND1 16
<18> PM_CLKRUN# CLKRUN#/GPIO4/SINT# GND2
28 23
LPCPD# GND3 32
4 GND4 33
4 4
5 PP PGND 12
SERIRQ PH 10K to +3VS at PCH side TEST Reserved
NPCT650LA0YX_QFN32_5X5
CLKRUN# PH 10K to +3VS at PCH side
LPCPD# had internal PH

Security Classification Compal Secret Data Compal Electronics, Inc.


CLK_LPC_TPM_R R7 1 2 33_0402_5% C10 1 2 22P_0402_50V8J
Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

KB & TP & TPM Connector


Laptopblue.vn
XEMC@ XEMC@ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 41 of 61
A B C D E
Screw Hole
FAN Conn H1
H_3P0
H2
H_3P0
H3 H4 H5 H6 H7 H8 H9 H10 H11 H12 H13 H14
H_4P2 H_4P2 H_4P2 H_3P0 H_4P2 H_4P2 H_4P2 H_3P0 H_3P0N H_3P0 H_3P0 H_3P0 FD1 FD2

+5VS CF2
10U_0603_6.3V6M @ @ @
CF1

1
+5VS 10U_0603_6.3V6M 1 2
1 2 FIDUCIAL_C40M80 FIDUCIAL_C40M80
@ @ @ @ @ @ @ @ @ @ @ @ @
UF2 FD3 FD4
UF1 1 8 H15 H16 H17 H18 H19 H20
1 8 2 EN GND 7 H_3P2 H_3P2 H_3P0 H_3P0 H_3P2 H_3P5X3P0N
2 EN GND 7 +VCC_FAN2_OUT 3 VIN GND 6 @ @

1
+VCC_FAN1_OUT 3 VIN GND 6 1 @ 2 4 VOUT GND 5
1 2 4 VOUT GND 5 <39> EN_DFAN2 VSET GND
@ RF6 0_0402_5% FIDUCIAL_C40M80 FIDUCIAL_C40M80
<39> EN_DFAN1

1
RF1 0_0402_5% VSET GND NCT3942S SOP 8P
1
1 NCT3942S SOP 8P CF10
CF6 .1U_0402_16V7K @ @ @ @ @ @
.1U_0402_16V7K
2
2 @
@

CF3
4.7U_0603_10V6K
+3VS 1 2

@ CF4
1

1000P_0402_50V7K
RF2 1 2
10K_0402_5%
40mil
JFAN1
2

+VCC_FAN1_OUT 1 @ 2 +VCC_FAN1 1
RF3 0_0603_5% 2 1 4
<39> FAN_SPEED1 3 2 GND 5
PreMP modify 3 GND
1
CF5 Finger Print POA
1000P_0402_50V7K ACES_88231-03041
XEMC@ CONN@
2

+3VLP +3V_FP
CF7 +3VALW
4.7U_0603_10V6K UK3
+3VS 1 2 UK4 5 1
@2 1 8 7 IN OUT
VCC NC 1
@ CF9 1U_0402_6.3V6K CK9 2 2 FP@
GND
1

1000P_0402_50V7K 6 5 USB20_N11_R FP@ CK8


<16> USB20_N11 HSD- D-
RF5 1 2 CK7 4 3 4.7U_0603_6.3V6K
10K_0402_5% 2 3 USB20_P11_R 1U_0402_6.3V6K EN OC 2
<16> USB20_P11 HSD+ D+ 1
40mil SY6288C20AAC_SOT23-5
JFAN2 USB_SW_EN# 1 4 FP@
<39> USB_SW_EN#
2

+VCC_FAN2_OUT 1 @ 2 +VCC_FAN2 1 OE# GND


RF4 0_0603_5% 2 1 4 TS3USB31RSER_QFN8_1P5X1P5 FP_PWR_EN
<39> FAN_SPEED2 2 GND FP_PWR_EN <39>
3 5 FP@
PreMP modify 3 GND
1
CF8
1000P_0402_50V7K ACES_88231-03041
XEMC@ CONN@
2

LK1 FP@
USB20_N11_R 3 4 USB20_N11_L

USB20_P11_R 2 1 USB20_P11_L

MCM1012B900F06BP_4P
SM070003Z00 CONN@
SP01001AD00
+3VLP 1 @ 2 +3V_FP E-T_6712K-F08N-02L
MAINPWON <39,45,47>
R8 0_0402_5%
Reset Circuit USB20_P11_L
1
1
1 @ 2 2
EC_RST# <39> 2
2

R9 0_0402_5% USB20_N11_L 3
R10 4 3
DK1 FP@ POA_EN# 5 4
BI_GATE PH to +RTCVCC at PWR side 10K_0402_5% <39> POA_EN# 5
6

6 3 USB20_P11_L PWR_INT# 6 9
I/O4 I/O2 <39> PWR_INT# AUTH_ERR 7 6 G1 10
<39> AUTH_ERR
1

Q2A POA_POWERREQ 8 7 G2
BI_GATE# <39> POA_POWERREQ 8
2 DMN66D0LDW-7_SOT363-6
5 2 JFP1
+3V_FP VDD GND
3

1
DVT modify
BI_GATE 5 C13 4 1 USB20_N11_L
<45> BI_GATE .1U_0402_16V7K I/O3 I/O1
2 AZC099-04S.R7G_SOT23-6
4

Q2B
DMN66D0LDW-7_SOT363-6

Reset But t on BI SW
Reset But t on 3 SW2 1

SW4

1 2 BI_GATE BI_S <45>


4 2

SKPMAME010_2P ATE-2-V-TR_4P
Security Classification Compal Secret Data Compal Electronics, Inc.
H : 3.8mm Issued Date 2016/01/29 2017/01/10 Title
Deciphered Date
FAN & FP & Screw Hole
Release : Bat t er y Off THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

Laptopblue.vn
Custom 1.0
Push : Bat t er y ON DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
C5PM2 M/B LA-E361P
Laptopblue.vn
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, October 28, 2016 Sheet 42 of 61
A B C D E

DC & VGA Interface For Power Of f Sequence +3VALW


UQ1 @ J11
1 14 +3VS_OUT 1 2 Q3A
+3VALW +3VS

1
RQ1 2 VIN1 VOUT1 13 1 2 DMN65D8LDW-7_SOT363-6
0_0402_5% VIN1 VOUT1 JUMP_43X118 R14 1 6
3VS_ON EC_VCCST_PG_R <9,39>
SUSP# 1 @ 2 3 12 1 2 100K_0402_5%
ON1 CT1 CQ1 1000P_0402_50V7K For tCPU28 1us(max)
CQ2 1 2 +5VALW 4 11

2
@ .1U_0402_16V7K VBIAS GND
2 @ 1 5VS_ON 5 10 1 2
1 ON2 CT2 PM_SLP_S3 1
RQ2 CQ3 1000P_0402_50V7K
0_0402_5% +5VALW 6 9 @ J12

3
CQ4 1 2 7 VIN2 VOUT2 8 +5VS_OUT 1 2 Q3B
+5VS

2
@ .1U_0402_16V7K VIN2 VOUT2 1 2
15 JUMP_43X118 DMN65D8LDW-7_SOT363-6
GPAD 5 1 6
<18,39> PM_SLP_S3# VR_ON <39,51,52>
EM5209VF_DFN14_2X3
For tPLT17 1us(max)

4
Q4A
DMN65D8LDW-7_SOT363-6

5
+5VALW +0.6VS_VTT +1.2V_VDDQ +5VALW +1.5VS For tCPU18 1us(max)
4 3 SUSP#
2

2
Q4B

2
R15 R16 R17 R18 DMN65D8LDW-7_SOT363-6
100K_0402_5% @ 100K_0402_5% 100K_0402_5% 100K_0402_5% R19
@ @ @ 100K_0402_5% DMN65D8LDW-7_SOT363-6
@ 1 6
SYS_PWROK <18,39>
1

+0.6VS_VTT_R

1
Q5A @

1
SUSP +1.2V_VDDQ_R SYSON#

2
3

1
D
Q8
SUSP 2 L2N7002LT1G_SOT23-3

5
G @
5 2 SUSP SYSON# 5 2 SYSON S
<13,39,48,50,51> SUSP# SYSON <13,39,48,50>

3
Q6A Q7B Q7A 4 3
PCH_PWROK <18,39>
1

Q6B @ DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6


4

1
R20 @ DMN66D0LDW-7_SOT363-6 @ @ Q5B @
10K_0402_5% DMN65D8LDW-7_SOT363-6
2 @ 2
DMN66D0LDW-7_SOT363-6 +3VALW Reserved 05/18
2

1
DMN65D8LDW-7_SOT363-6
R21 1 6 SYSON
100K_0402_5% Q9A For tPLT15 1us(max)

2
PM_SLP_S4
Q9B

3
DMN65D8LDW-7_SOT363-6

5
<18,39> PM_SLP_S4#
For Power down sequence

4
DVT modify
DV8 +1.0VSDGPU
DGPU_PWR_EN 2 1 DGPU_PWR_EN_18ON +1.8VSDGPU_AON
<20,23> DGPU_PWR_EN
RB751S40T1G_SOD523-2

2
VGA@
+1.8V_AON/+1.8V_MAIN
1

1 2 R23
RV110 2 20_0402_1%
PVT modify 20K_0402_5% @ RG71
VGA@ CV198 10K_0402_5% +1.8VSDGPU_AON

6 1
3 0.1U_0402_16V7K UG12 3
2

1 VGA@ +1.8VS 1 14
2 VIN1 VOUT1 13
VIN1 VOUT1

10U_0603_6.3V6M
CG64 220P_0402_50V8J
DGPU_PWR_EN_18ON 3 12 1 2 2 DMN66D0LDW-7_SOT363-6
ON1 CT1 1
+5VS +5VS Q10A

CG289
4 11

1
VBIAS GND CG65 220P_0402_50V8J

2
5 10 1 2 2
+1.8VS ON2 CT2 +1.8VSDGPU_MAIN R22
1.8VSDGPU_MAIN_EN 6 9 100K_0402_5%
<23> 1.8VSDGPU_MAIN_EN VIN2 VOUT2
7 8
VIN2 VOUT2
10U_0603_6.3V6M

DVT modify

1
15 GPUCORE_EN#
GPAD 1
+3VS +VGA_CORE_S
CG290

1
CG864 EM5209VF_DFN14_2X3

3
.1U_0402_16V7K
2
22U_0603_6.3V6M

1
2
1

GPUCORE_EN
CG288

5 R24
<23> GPUCORE_EN
Q10B 1_0805_1%
DMN66D0LDW-7_SOT363-6 PVT modify
2

2
1
D Q11
2 L2N7002LT1G_SOT23-3
G
S

3
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

DC Interface
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 43 of 61
A B C D E
A B C D E

1 +19V_ADPIN HCB2012KF-121T50_0805
EMI@ PL101 +19V_VIN 1
change PL101
20160216 3PIN'+' 3PIN'-' 1 2 SM01000C000 to comm
EMI@ PL102
HCB2012KF-121T50_0805 part SM01000P200
@ ACES_50299-00601-001
1 2

1
1
1

1
2 EMI@ EMI@ EMI@ PC104
2 3 PC105 PC102 1000P_0603_50V7K

2
3 4 0.1U_0603_25V7K 100P_0603_50V8

2
7 4 5
8 G7 5 6
G8 6
PJP101

2 2

@ PR101
0_0402_5%
1 2
+3VLP +CHGRTC

3 3

4 4

Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DCIN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 44 of 61
A B C D E

Laptopblue.vn
Laptopblue.vn
A B C D E

+3VLP

1 1

1
PC205

1
PR207 100_0402_1% 0.1U_0603_25V7K
MB:Battery Con Put TOP Side

2
1 2 @
EC_SMB_DA1 <39,46>
PR205 100_0402_1% PR215 PR214

100K_0402_1%
1 2 26.7K_0402_1% 21.5K_0402_1%
EC_SMB_CK1 <39,46> <45,47>

PR213

2
1
Battery Bot Side PU201
PR202 1 8
@ 200K_0402_1% VCC TMSNS1
PIN1 GND PJP201 (Common Part)
1 2 2 7 2 1
SL200002H00

2
+3VLP GND RHYST1
PIN2 GND 1
1

1
2 MAINPWON 3 6 @ PR216
PIN3 GND 2 <39,42,47> MAINPWON OT1 TMSNS2

100K_0402_1%_NCP15WF104F03RC
3 1 2 10K_0402_1% @
3 4 EC_SMB_DA1-1 BATT_TEMP <39,46> 4 5 2 1
PIN4 SMD 4 5 EC_SMB_CK1-1 PR203 1K_0402_1% OT2 RHYST2
5

1
PIN5 SMC BATT_TS

PH202
6 G718TM1U_SOT23-8 PR218

2
6 7 BATT_B/I 14K_0402_1%
PIN6 TEMP 7

100K_0402_1%_NCP15WF104F03RC
8
8
PIN7 BI 9
9
+RTCVCC

PH203
10 (Common Part)
PIN8 Batt+

2
10 11
GND 12 SL200002H00
PIN9 Batt+ GND
PIN10 Batt+

1
PH3 Near VGA.
ACES_50458-01001-P01_10P-T PR212
SP021412220 100K_0402_5% PQ201 Change to SB00001GD00
ACES_50458-01001-P01_10P-T D SB501380010(BSS138LT1G Del)

1
2 2
2 PQ201
<42> BI_GATE G LBSS139LT1G_SOT23-3
S

3
+12.6V_BATT+ 2014/09/25 update
EMI@ PL201
HCB2012KF-121T50_0805 For KB9022
1 2
+12.6V_BATT BI_S <42> sense 20mΩ Active Recovery
EMI@ PL202

1
HCB2012KF-121T50_0805
1 2 PR217 @
change PL201, PL202 0_0402_5%
SM01000C000 to comm
part SM01000P200

2
PC201
135W PR206 175W,0.61V
1

EMI@ PC202 EMI@


135W,0.47V
1000P_0402_50V7K 0.01U_0402_25V7K
19.1K ohm PH1 under CPU botten side :
2

SD034191280 CPU thermal protection at 95 +-3 degree C


Recovery at 56 +-3 degree C
+3VLP_ECA

2013/07/23
change PC5 and PC6 function field from 37.1 to 39.7

1
3 3
PR204
PR206 15.4K_0402_1%
19.1K_0402_1%
1 2

2
ADP_I <39,46>
VCIN0_PH <39>

(Common Part)
SL200002H00
VCIN1_ADP_PROCHOT <39> PC203 must close to EC pin

2
PH201 @ PC203

1
PR208 100K_0402_1%_NCP15WF104F03RC 0.1U_0402_25V6

1
10K_0402_1%
T202 T201 must close to PH201

2
2 T202@

T201@
ECAGND <39>

4 4

Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BATTERY CONN/OTP

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev

Laptopblue.vn
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 45 of 61
A B C D E
A B C D E

PR302

1
D
1M_0402_1%
2 1 2
PQ301 +19VB PQ302
MDU1512RH_POW ERDFN56-8-5
G 2N7002KW _SOT323-3 2016/02/16 1 +12.6V_BATT_CHG
PR303 S PR304 20m ohm chang -->10m ohm 2

3
2 1 5 3
+19V_P1 +19V_P2 SD00000K820 1W
PQ303 3M_0402_5% PQ304
MDU1512RH_POW ERDFN56-8-5 MDU1512RH_POW ERDFN56-8-5 PR304 +19V_CHG

4
1 1 0.01_1206_1% EMI@ PL302
2 2 HCB2012KF-121T50_0805
5 3 3 5 1 4 1 2
+19V_VIN
2 3 EMI@ PL303 PC302
HCB2012KF-121T50_0805 1 2

0.047U_0603_25V7M
4

4
1 1
1 2

1000P_0603_50V7

2200P_0402_50V7K
0.022U_0603_25V7K

10U_0805_25V6K

10U_0805_25V6K
1

1
PC301

PC303
ACP ACN

4.7_0603_1%

68P_0402_50V8J

4.02K_0402_1%
1

10_0402_1%
PR301

@EMI@ PC306

EMI@ PC307

PC308

PC309

PR306

PR307
2

2
PC311
PC310

1
0.1U_0402_25V6 PC312

10U_0805_25V6K
1

10U_0805_25V6K
2 1 1 2 1 2

2
2

1
@ PC304

@PC305
0.01U_0402_25V7K~N
0.1U_0603_25V7K
2014/9/30

2
BATDRV_CHGR
PC301 change to SE025102K80 PR308
4.02K_0402_1%
1 2 ACDRV_CHGR

1
@ PR309 @ PR310 BATSRC_CHGR
0_0402_5% 0_0402_5%
2 1CMSRC_CHGR
PR305

2
4.02K_0402_1%

ACN_CHGR
ACP_CHGR
+19V_VIN
PD301 PR312 @ PC313
S SCH DIO BAS40CW SOT-323 10_1206_5% 1000P_0402_50V7K 2016/03/13 SE158225K80 X1
+19V_VIN
3 1 2 down size SE00000WP00 S
1

1 2 1
PR311 +19VB 2 ACDRV_CHGR CER CAP 2.2U 25V K X5R 0603
422K_0402_1% PC314 1U_0603_25V6K +6V_CHG_REGN
2 1 PC316 PQ305
2.2U_0603_25V7M AON7506_DFN33-8-5
2

5
2 ACDET PU301 2
1 2

ACDRV

ACP

ACN
28
VCC PR314
66.5K_0402_1%
1

CMSRC_CHGR 3 24 0_0603_5%
CMSRC REGN
1

2DH_CHGR_R 4
PR313

@ PR316 PC317 1
PC315 6 0_0603_5% 0.047U_0603_25V7M
2200P_0402_25V7K ACDET 25 BST_CHGR 1 2BST_CHGR_R 1 2
2

1
@ PR317 2
0_0402_5% EC_SMB_DA1_CHGR 11 BTST
<39,45> EC_SMB_DA1 (Common Part) +12.6V_BATT
2

SDA
Choke 4.7uH SH00000YC00

3
2
1
1 2 EC_SMB_CK1_CHGR 12 26 UG_CHGR PR318
<39,45> EC_SMB_CK1 SCL HIDRV
@ PR315 0_0402_5% PL301 0.01_1206_1%
ACPRN_CHGR 5 4.7UH_PCMB063T-4R7MS_8A_20%
<39,45> ADP_I PC318 ACOK 27 LX_CHGR 1 2 1 4
1 2 1 2 7 PHASE
IADP 2 3

1
100P_0603_50V8 @ PR333 0_0402_5% 8 23 LG_CHGR

4.7_1206_5%
AON7506_DFN33-8-5
IDCHG LODRV

5
<39> DCHG_I

EMI@ PR319
@ PC319
1 2 9

10U_0805_25V6K

10U_0805_25V6K
PMON
@

PR331
0_0402_5% 100P_0603_50V8 10 22 PR332 316K_0402_1% SRP SRN

1SNUB_CHGR 2
/PROCHOT GND

1
PC320

PC321
1 2 1 2
<52> PSYS_MON +3VLP 4
PR322 100K_0402_1%

2
13 21 ILIM_CHGR 1 2
1 2 CMPIN ILIM PR323

680P_0603_50V7K
<9,39> H_PROCHOT# 14 10_0402_1%

3
2
1
CMPOUT 20 SRP_CHGR

EMI@ PC323
@ PR321 0_0402_5% 1 2
SRP

PQ306
20160601 colay BQ24781 1 2 15 19 SRN_CHGR 1 2

2
/BATPRES SRN
3 @ PR334 0_0402_5% PR324 3
16 18 BATDRV_CHGR 10_0402_1% PC324
/TB_STAT BATDRV 0.1U_0402_25V6
29 17 BATSRC_CHGR 1 2
PWPD BATSRC
<39,45> BATT_TEMP
BQ24781RUYR_W QFN28_4X4

0.1U_0402_25V6

0.1U_0402_25V6
1

1
PC325

PC326
2

2
+6V_CHG_REGN
1

PR325
10K_0402_1%
PR326
10K_0402_1%
2

1 2 ACPRN_CHGR
<39> AC_IN
1

4 PR327 4

12K_0402_1%
2

Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
charger
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 46 of 61
A B C D E
A B C D E

PR402
499K_0402_1%
ENLDO_3V5V 1 2
+19VB

1
150K_0402_1%
PR404
EN1 and EN2 dont't floating

2
PU401
1 +19VB SY8286BRAC_QFN20_3X3 @ PR401 1
@ PJ403 0_0603_5% PC401
+19VB_3V BST_3V

2200P_0402_50V7K
1 2 1 2 1 2
1 2

10U_0805_25V6K
@EMI@ PC403

EMI@ PC404
0.1U_0402_25V6
0.1U_0603_25V7K
JUMP_43X79

1
5*5*3 Common part SH000016800

PC405

BS
IN

IN

IN

IN
PL402

2
LX_3V6 20 LX_3V 1 2
LX LX +3VALWP
7 19 1.5UH_PCMB053T-1R5MS_6A_20%
GND LX

@EMI@

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
PR405
1

1
680P_0603_50V7K 4.7_1206_5%
8 18
+3VALWP GND GND

PC407

PC408

PC409

PC410
9 17
+3VLP

2
PG LDO

1 3V_SN
10 16

2
NC NC

1
Check pull up resistor of SPOK at HW side PC411

OUT
EN2

EN1
21

NC
FF
4.7U_0603_6.3V6M

2
PR406 GND
100K_0402_5%

11

12

13

14

15

@EMI@

PC412
3.3V LDO 150mA~300mA

2
Vout is 3.234V~3.366V Ipeak=4.65A
<39> SPOK
ENLDO_3V5V
Imax=3.25A
PC402 PR403 TDC=6A
1000P_0402_25V8J1K_0402_5% Iocp=10A
3V_FB 1 2 1 2
<39,49> 3V_EN

2 2
+19VB +19VB_5V
@ PR408
PC418
@ PJ404 PU402 SY8288CRAC_QFN20_3X3 0_0603_5%
1 2 +19VB_5V BST_5V1 2 1 2
1 2

1
JUMP_43X79 0.1U_0603_25V7K 7*7*3 Common part SH000016700

BS
IN

IN

IN

IN
LX_5V 6
2200P_0402_50V7K
10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6

20
LX LX PL404
7 19 LX_5V 1 2
GND LX +5VALWP
1

1
PC414

PC415

EMI@ PC416

@EMI@ PC417

8 18 1.5UH_9A_20%_7X7X3_M @ @
GND GND

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
PC419 4.7U_0603_6.3V6M
2

1
9 17 1 2
PG VCC

1
PR409

PC420

PC421

PC422

PC423

PC424

PC425
4.7_1206_5%
1 SPOK_R

@EMI@
10 16

2
NC NC

OUT

LDO
EN2

EN1
21

FF
GND

2
PR413 @
11

12

13

14

15
0_0402_5%
VL

1 5V_SN
4.7U_0603_6.3V6M
5V LDO 150mA~300mA
2

680P_0603_50V7K
PC427
SPOK
ENLDO_3V5V

PC426
2

@EMI@

2
5V_EN

3 Vout is 4.998V~5.202V 3
PC413 PR407
1000P_0402_25V8J 1K_0402_5% Ipeak=9A
5V_FB 1 2 1 2
Imax=6.6A
PR410
2.2K_0402_5% Iocp=10A
1 2
<39> EC_ON @ PR411
0_0402_5% @ PJ401
1 2 +3VALWP 1 2 +3VALW
<39,42,45> MAINPWON 1 2
JUMP_43X118

5V_EN
1M_0402_1%

4.7U_0402_6.3V6M
1

@ PJ402
1
PR412

PC428

+5VALWP 1 2 +5VALW
1 2
JUMP_43X118
2
2

4 4

Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3.3VALWP/5VALWP

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev

Laptopblue.vn
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 47 of 61
A B C D E
A B C D E

Module model information


RT8207M_V1.mdd For Single layer
RT8207M_V2.mdd For Dual layer

1 1

Pin19 need pull separate from +1.35VP.


+19VB_1.2VP If you have +1.35V and +0.675V sequence question, 0.675Volt +/- 5%
EMI@ PL501 you can change from +1.35VP to +1.35VS. TDC 0.7A
HCB2012KF-121T50_0805
1 2 +19VB_1.2VP PR502 Peak Current 1A
+19VB 2.2_0603_5%
BST_1.2VP_R 1 2 BST_1.2VP

2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6
change PL501 1 +1.2VP

1
@EMI@ PC502

EMI@ PC503

PC504

PC505
SM01000C000 to comm
part SM01000P200
UG_1.2VP +0.6VSP
2

2
PQ503 LX_1.2VP

10U_0603_6.3V6M

10U_0603_6.3V6M
5

1
PC506

1
PC507

PC508
0.1U_0603_25V7K

16

17

18

19

20
2
PU501

2
2 2

VLDOIN
PHASE

UGATE

BOOT

VTT
4 21
PAD
7*7*3
LG_1.2VP 15 1
COMMON PART LGATE VTTGND

1
2
3
AON7408L 1N DFN 14 2
PL502 PR503 PGND VTTSNS
1UH_PCMC063T-1R0MN_11A_20% 17.4K_0402_1%
1 2 LX_1.2VP 1 2 CS_1.2VP 13 3
+1.2VP PC509 CS RT8207PGQW _W QFN20_3X3 GND
1

5 1U_0402_10V6K
PQ502 1 2 12 4 VTTREF_1.2VP
EMI@ PR504 PR505 VDDP VTTREF
4.7_1206_5% 5.1_0603_5%
1 2 VDD_1.2VP 11 5
PC523

PC522

PC521

PC524

PC525

PC520

1 2

+5VALW VDD VDDQ +1.2VP

1
PGOOD
4 PC516
1 1 1 1 1 1

TON
1

1
EMI@ PC518 PC517 0.033U_0402_16V7K

FB
S5

S3

2
680P_0402_50V7K
2

SI7716ADN-T1-GE3_POW ERPAK8-5 1U_0402_10V6K PR511


22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

1
2
3

10

6
2 2 2 2 2 2 2.2_0402_1%

FB_1.2VP
TON_1.2VP
change PQ502 form 7506

EN_1.2VP
PR506
to 7716, 20150108

EN_0.6VSP
6.19K_0402_1%
+5VALW PR507 1 2 +1.2VP
470K_0402_1%
470Kohm-->540KHz +19VB_1.2VP 1 2
3 3
Vout=0.75V* (1+Rup/Rdown)

1
=0.75*(1+(6.19/10))
@ PR501 PR508
Rds on 13.5 / 16.5mohm 0_0402_5% 10K_0402_1% =1.214V 1.2%
Rlimt=17.4K 1 2

2
<13,39,43,50> SYSON
Iocp=10.63~12.76A Vout=0.75V* (1+Rup/Rdown)

1
@ PC501
0.1U_0402_10V7K
=0.75*(1+(8.2/10))
=1.365V 1.1%

2
@ PR509
0_0402_5%
MOSFET: 3x3 DFN 1 2
<13,39,43,50,51> SUSP#
H/S Rds(on): 27mohm(Typ), 34mohm(Max) @ PJ501
Idsm: 7.5A@Ta=25C, 5.5A@Ta=70C @ PR510 JUMP_43X118
0_0402_5% +1.2VP 1 2 +1.2V_VDDQ
1 2 1 2
L/S Rds(on): 9.9mohm(Typ), 13mohm(Max) <9> SM_PG_CTRL
Idsm: 13.5A@Ta=25C, 11A@Ta=70C

1
@ PC519 @ PJ502
Choke: 7x7x3 JUMP_43X39
0.1U_0402_10V7K 1 2
Rdc=8.3mohm(Typ), 10mohm(Max) +0.6VSP +0.6VS_VTT

2
1 2
Mode Level +0.675VSP VTTREF_1.35V
S5 L off off Switching Frequency: 285kHz
4 4
S3 L off on Ipeak=10A
S0 H on on Iocp~13A
OVP: 110%~120%
Note: S3 - sleep ; S5 - power off VFB=0.75V, Vout=1.3545V
MOSFET footprint: SIS412DN Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

Laptopblue.vn
Laptopblue.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 48 of 61
A B C D E
A B C D E

Module model information


SYX196D_V3.mdd

+19VB_1VALW
1 1
EN pin don't floating @EMI@ PR605 @EMI@ PC602
4.7_1206_5% 680P_0603_50V7K @ PJ601
If have pull down resistor at HW side, pls delete PR702 1 2 SNUB_1VALW 1 2 JUMP_43X118
@ PJ602 PU601 (Common Part) 1 2
+19VB_1VALW +1.0VALWP 1 2 +1.0VALW
+19VB 1
1 2
2 2
IN PG
9 @ PR606
0_0603_5%
PC603 SH00000YE00

10U_0805_25V6K
0.1U_0402_25V6
3 1 BST_1VALW 1 2 BST_1VALW_R1 2 PL602

2200P_0402_50V7K
JUMP_43X79 IN BS

1
1UH_11A_20%_7X7X3_M

EMI@ PC604

@EMI@ PC605

PC606
LDO_3V LX_1VALW
4
IN LX
6
0.1U_0603_25V7K
1 2
+1.0VALWP

2
5 19

14K_0402_1%

330P_0402_50V7K

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

220U_B2_4VM_R35M
1

1
IN LX
1

1
PR607 @ 7 20

PR608

PC608

PC609

PC610

PC611

PC612
GND LX +

PC615
0_0402_5%
8 14 FB_1VALW Rup

2
GND FB
2

2
ILMT_1VALW 18 17 LDO_3V 2
change PL601 GND VCC @
1

1
SM01000C000 to comm EN_1VALW 11 10
@ PR609 EN NC PC613
part SM01000P200 FB = 0.6V

1
ILMT_1VALW 13 12 2.2U_0402_6.3V6M

2
ILMT NC PR610
0_0402_5%
15 16
+3VALW Rdown
2

BYP NC 20K_0402_1%
21

2
PAD
SY8288RAC_QFN20_3X3 Pin 7 BYP is for CS.

1
The current limit is set to 6A, 8A or 12A when this pin Common NB can delete +3VALW and PC15
PC614
is pull low, floating or pull high 1U_0402_6.3V6K

2
Vout=0.6V* (1+Rup/Rdown)
=0.6*(1+(14/20))
Vout=1.02V
2 2
@ PR611
10K_0402_1%
1 2
3V_EN <39,47>

PR603
10K_0402_1%
EN_1VALW 1 2
+3VALW
1

@ PC601
PR601
0.22U_0402_10V6K
2

1M_0402_1%
2

Function Field :
VCCEDPIO : IC-35.21 , others - 35.22
VCCEDRAM : IC-35.25 , others - 35.26

3 3

4 4

Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
1V
Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 49 of 61
A B C D E
A B C D E

PR7123
EN_1.8VS 1 2 SUSP#
1 1

0_0402_5%

1
Current limit = 4.7A(min) PR7124 @ PC7118 @
0.1U_0402_16V7K
0.4%

2
1M_0402_5%

2
PR7126
100K_0402_5%
2 1
+3VS PU7105
9
1 PGND 8
FB SGND (Common Part) SH00000YG00
+3VS VIN_1.8V 2 7 4*4*2
PG EN PL7103
3 6 LX_1.8V 1 2
@ PJ7108 IN LX 1UH_2.8A_30%_4X4X2_F +1.8VSP
1 2 4 5

20.5K_0402_1%

68P_0402_50V8J

22U_0603_6.3V6M

22U_0603_6.3V6M
1

1
1 2 PGND NC

4.7_0603_5%

1
@EMI@PR7125

PR7122

PC7123
JUMP_43X79

1
SY8003ADFC_DFN8_2X2

PC7119

PC7125
Rup

1
PC7127

2
2

2
22U_0603_6.3V6M

2
FB_1.8V

680P_0402_50V7K

1
1
FB=0.6V PR7121

@EMI@ PC7124
Note:Iload(max)=3A
10K_0402_1%
Rdown Function Field :

2
PWR.Plane.Regulator_1.8V - 35.15
Rest of support elements - 35.16
2 2

Note:
When design Vin=5V, please stuff snubber
to prevent Vin damage
+5VALW

+3VALW

1
PC7210
Current limit = 4.7A(min)
1U_0402_6.3V6K
0.4%

2
@ PJ7105
1 2
1 2

JUMP_43X79

1
PC7108

6
PU7102
5 VIN_2.5V 4.7U_0603_6.3V6K

VPP

2
7 VIN
POK 9
TPAD
PR7110 3
0K_0402_5% VO
<13,39,43,48> SYSON 1 2 EN_2.5V 8 4
VEN VO +2.5VP

GND
2

22U_0603_6.3V6M
0.1U_0402_16V7K

0.01U_0402_25V7K
1

1
ADJ

1
PR7113 G971ADJF11U_SO8 PR7115

PC7107

PC7109
1

PC7110
1M_0402_5% 21.5K_0402_1%
Rup

2
2

2
3 3
@
FB_2.5V

Vout=0.8V* (1+(12.7/10)) = 1.816V

1
+3VALW FB=0.6V PR7116
Note:Iload(max)=3A Rdown
10K_0402_1%
+3VALW
Function Field :

2
PWR.Plane.Regulator_2.5V - 35.13
1

@ PJ7102 Rest of support elements - 35.14


1

JUMP_43X79
1
2

PC7113
Vout=0.8V* (1+(21.5/10)) = 2.52V 0.8%
2

1U_0402_6.3V6K
2

VIN_1.5VS
VIN_1.5VS
1

PC7114

4.7U_0603_6.3V6K
2

PU7103 @ PJ7103
5 VIN_1.5VS Ultra Low Dropout 0.23V(typical) at 3A Output Current JUMP_43X79
VPP

7 VIN 1 2
POK 9
Current limit = 4.7A(min) +2.5VP 1 2 +2.5V
TPAD
3 0.4% @ PJ7107
VO JUMP_43X79
1 2 EN_1.5VS 8 4 1 2
<13,39,43,48,51> SUSP# VEN VO +1.5VSP +1.8VSP 1 2 +1.8VS
1K_0402_1%
GND

0.01U_0402_25V7K
1

@ PR7117 2
ADJ
1

0_0402_5% @ PJ7104
PR7119

PC7116

PR7118 @ PC7115 G971ADJF11U_SO8 JUMP_43X79


Rup
1

0.1U_0402_16V7K 1 2
+1.5VSP +1.5VS
2

1M_0402_5% 1 2
2

FB_1.5VS PC7117
2

4 4
22U_0603_6.3V6M
2
1

PR7120 +1.5VSP:
Imax=0.5A Ipeak=0.75A
1.13K_0402_1%
Rdown
2

Vout=0.8V* (1+Rup/Rdown)
Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
Vout=0.8V* (1+(1/1.13)) = 1.507V 1.5VS/2.5V
Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 50 of 61
A B C D E
5 4 3 2 1

D D

Note:Iload(max)=5.5A

IOCP=7A~8A(typ)

@ PJ7201
1 2
+1.0VS_VCCIOP 1 2 +1.0VS_VCCIO
JUMP_43X118

C C

EMI@ PR7203 EMI@ PC7203


4.7_1206_5% 680P_0603_50V7K
1 2SNB_+VCCIOP 1 2

Imax=3.85A, Ipeak=5.5A, Iocp:6.6A


@ PJ7202 PU7201 5*5*3 Common part SH00000Z300
1 2 +VCCIOP_B+ 2 9 PR7202 PC7202
+19VB 1 2 IN PG 0_0603_5% 0.1U_0603_25V7K
JUMP_43X79 3 1 +VCCIOP_BST 1 2+VCCIOP_BST_R 1 2 PL7201
0.1U_0402_25V6

10U_0805_25V6K
2200P_0402_50V7K
1

IN BS 0.68UH_7.9A_20%_5X5X3_M
PC7207

@EMI@ PC7217

PC7208

+VCCIOP_LX
4
IN LX
6 1 2
+1.0VS_VCCIOP
2

1
5 19

PC7219
330P_0402_50V7K

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
IN LX

1
1
7 20
EMI@

PC7204

PC7205

PC7206

PC7211

PC7212

PC7214
10_0402_1%
2
GND LX @

PR7212
8 14 +VCCIOP_FB

2
2
2
GND FB

PR7214

1K_0402_1%
18 17 +VCCIOP_LDO_3V @

2
GND VCC

1
+VCCIOP_EN 11 10 PC7218 @
EN NC add 4 to 9 0603 22UF
2.2U_0402_6.3V6M

1
+VCCIOP_ILMT 13 12 FB = 0.6V Rup +1.0VS_VCCIO Vout=0.6V* (1+Rup/Rdown)
ILMT NC 2 1 2
+3VALW 15
BYP NC
16 =0.6*(1+(12k/20.5k))
PR7218
OVP=0.95V*115%=1.0925V
1

B B
21 12K_0402_1%
1U_0402_6.3V6K

PAD
PC7209

Vout=0.951 V 2%

20.5K_0402_1%
1

2
SY8288RAC_QFN20_3X3

Rdown
2

PR7216

PR7215
Pin 7 BYP is for CS. 100_0402_1%
Common NB can delete +3VALW and PC15

1
@ PR7209 0_0402_5%
VCCIO_SENSE_R 1 2 VCCIO_SENSE
+VCCIOP_LDO_3V VCCIO_SENSE <11>
1

@ PR7207 1 2 VSSIO_SENSE
VSSIO_SENSE <11>
0_0402_5%
@ PR7213 VR_ON 1 2

1
0_0402_5% <39,43,52> VR_ON @ PR7210 0_0402_5%
PR7211
2

+VCCIOP_ILMT PR7208
1K_0402_5% 100_0402_1%
1

SUSP# 1 2 +VCCIOP_EN

2
@ <13,39,43,48,50> SUSP#
0.1U_0402_25V6

PR7217
1M_0402_5%
1

1
PC7201

check delay time with HW


PR7201

0_0402_5%
2

2
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title
C5PM2 M/B LA-E361P

Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1.0VS_VCCIO
Date: Friday, October 28, 2016 Sheet 51 of 61
5 4 3 2 1
5 4 3 2 1

CPU spec: (SKL-H42 45W)


VCC: 68A
VCCGT: 54 A
VCCSA: 11A
OCP Setting:
@ PR874 PC836 VCC: 75A
100_0402_1% 1000P_0402_50V7K
1 2 1 2
VCCGT: 61A
VCCSA: 16.5A
PR873
619_0402_1%
VSN_1PH
<11> VSSSA_SENSE 1 2 +1.0V_VCCST

2
PC837 Place close to
SA choke
1000P_0402_50V7K PR875

1
D 1.5K_0402_1% PH805 PR870 PR869 D
1 2 VSP_1PH
<11> VCCSA_SENSE 100K_0402_1%_NCP15WF104F03RC 14K_0402_1% 7.5K_0603_1%
1 2 1 2 1 2

0.1U_0402_25V6
SW_1PH <55>
@ PR876

100_0402_1%

100_0402_1%

45.3_0402_1%
1

1
100_0402_1% PC832

PC829
1 2 1 2 4700P_0402_25V7K

PR863

PR864

PR865
+VCC_SA 1 2
+3VS

2
PC838
1000P_0402_50V7K PC831

2
@
0.01U_0402_25V7K

1
1 2
81205_SCLK
PR800 PR862 1 2 49.9_0402_1%
CPU_SVID_CLK <9>

470P_0402_50V7K
<55> CSN_1PH

1
PR871 10K_0402_5% @ PR861 0_0402_5%
81205_ALERT

1
+VCC_CORE 12.4K_0402_1% PR868 1 2

PC830

2
1 2 CPU_SVID_ALERT#_R <9>
25.5K_0402_1%

2
81205_SDIO
@ PR802 PC833 PR860 1 2 10_0402_1%
CPU_SVID_DAT <9>

2
100_0402_1% 1000P_0402_50V7K
1 2 2 1
VR_PWRGD <39>
PR801
@
VSP_3PH_A PWM1_1PH/ICCMAX1 <55>
1 2 2 1 2 1
<10> VCCSENSE
PR867
PC801 PR872 PC834 37.4K_0402_1% +VCC_GT
0_0402_5%

2
1000P_0402_50V7K 1.5K_0402_1% 0.015U_0402_25V7K 1 2
@ PR857
PR803 1 2 2 1 100_0402_1%

1
PR804 VR_ON <39,43,51> 2 1
@ 1K_0402_1%
1 2 1 2 VSN_3PH_A
PC835 @ PR856
<10> VSSSENSE 0_0402_5%
@ PR805 15P_0402_50V8J 0_0402_5%

PWM1_1PH/ICCMAX1
100_0402_1% @ PR866 1 2
1 2 0_0402_5% 1 2
VCCGT_SENSE <10>
VSN_1PH

81205_ALERT

2
81205_SCLK

81205_SDIO
PC802 PC828 2200P_0402_50V7K

COMP_1PH

IMON_1PH
VSP_1PH

CSN_1PH
CSP_1PH
ILIM_1PH
2200P_0402_50V7K
PR853 @
PR854

1
1K_0402_1% 0_0402_5%
+1.0V_VCCST 1 2 1 2
VSSGT_SENSE <10>
H44e: @ PR855
PR806=22.6K H44e: PU801 1 2 100_0402_1%
NCP81205MNTXG_QFN52_6X6 2 1

53

52
51
50
49
48
47
46
45
44
43
42
41
40
H42: PR810=12.1K

2
PC805 PR807 PC804 PR806=22.6K H42: PC827
15P_0402_50V8J 49.9_0402_1% 470P_0402_50V8J PR810=13.7K PR859 @ 2200P_0402_50V7K

ALRT#
SDIO
VSP_1PH
VSN_1PH
COMP_1PH
ILIM_1PH
CSN_1PH
CSP_1PH
IMON_1PH

PWM_1PH/ICCMAX_1PH
EN
TAB

VR_RDY

SCLK
1 2 1 2 1 2 H42@ PR806
22.6K_0402_1% 1K_0402_1% PR852 PR851 PC825 PC824
PR809 PC806 PR808 1 2 PR858 23.2K_0402_1% 49.9_0402_1% 470P_0402_50V8J 15P_0402_50V8J

1
3.3K_0402_1% 2200P_0402_50V7K 1K_0402_1% 100_0402_1% 1 2 1 2 1 2 1 2
1 2 1 2 1 2 VSP_3PH_A 1 39 1 2
PC803 VR_HOT# <39>
VSN_3PH_A 2 VSP_3PH_A VRHOT# 38
470P_0402_50V8J PC826
C 1 2 3 VSN_3PH_A VSP_3PH_B 37 470P_0402_50V8J 1 2 1 2 1 2 C
DIFFOUT_3PH_A 4 IMON_3PH_A VSN_3PH_B 36 1 2
FB_3PH_A 5 DIFFOUT_3PH_A IMON_3PH_B 35 DIFFOUT_3PH_B
PR850 PR849 PC823
COMP_3PH_A 6 FB_3PH_A DIFFOUT_3PH_B 34 FB_3PH_B
1K_0402_1% 3.3K_0402_1% 2200P_0402_50V7K
ILIM_3PH_A COMP_3PH_A FB_3PH_B COMP_3PH_B
H42@ PR810 1 2 13.7K_0402_1% 7 33
CSCOMP_3PH_A 8 ILIM_3PH_A COMP_3PH_B 32 ILIM_3PH_B
PR848 1 2 16.2K_0402_1%
CSSUM_3PH_A 9 CSCOMP_3PH_A ILIM_3PH_B 31 CSCOMP_3PH_B
Place close
75K_0402_1%

PWM1_3PH_A/ICCMAX_3PH_A

PWM1_3PH_B/ICCMAX_3PH_B
CSSUM_3PH_A CSCOMP_3PH_B CSSUM_3PH_B
1

H44e: 10 30 to GT choke
CSP1_3PH_A CSREF_3PH_B

1
PH801 11 CSREF_3PH_A CSSUM_3PH_B 29
PR811

PR160,PR162,PR165=127K

75K_0402_1%
CSP2_3PH_A CSP1_3PH_A CSP1_3PH_B (phase 1)

PWM3_3PH_B/ROSC_3PH
PWM2_3PH_B/ROSC_1PH
12 CSREF_3PH_B 28 PH804

PR847
H42:
220P_0402_25V8K

820P_0402_50V7K

CSP3_3PH_A 13 CSP2_3PH_A CSP1_3PH_B 27 CSP2_3PH_B


PR160,PR162,PR165=113K 220K_0402_5%_ERTJ0EV224J 220K_0402_5%_ERTJ0EV224J H44e:

PWM3_3PH_A/VBOOT

1000P_0402_50V7K
1

2
CSP3_3PH_A CSP2_3PH_B

TTSENSE_1PH/PSYS
PWM2_3PH_A/ADDR
@ PC808

PC807

PC822
PR843,PR844,PR845=147K

220P_0402_25V8K
2

1
PC809

@ PC821
H42:

TTSENSE_3PH_A

TTSENSE_3PH_B

2
1
PR843,PR844,PR845=74.1K
165K_0402_1%

1
1

Place close .1U_0402_16V7K PC820

CSP3_3PH_B
2

1
H42@ PR813 1 2 113K_0402_1% .1U_0402_16V7K
PR812

to IA choke 2016/03/13 SL200000500->X1 ,Change to common part SL200002I00

165K_0402_1%
2
<53> SW1_3PH_A

PR846
(phase 1) VRMP
<53> SW2_3PH_A
H42@ PR814 1 2 113K_0402_1% connect +19VB_CPU

DRON
VRMP
78.7K_0402_1% 2 1 PR845

VCC
to 3A rail
2

SW1_3PH_B <53>
H42@ PR815 1 2 113K_0402_1%

2
<53> SW3_3PH_A
78.7K_0402_1% 2 1 PR844
SW2_3PH_B <53>

1
2016/03/13 SL200000500->X1 ,Change to common part SL200002I00

14
15
16
17
18
19
20
21
22
23
24
25
26
PR816 1 2 10_0402_1% PR825
<53> CSN1_3PH_A
PC813
PR817 1 2 10_0402_1% 1K_0402_1% 0.1U_0402_25V6
<53> CSN2_3PH_A TSENSE_3PH_A CSP3_3PH_B PSYS_MON <46>
PC814 1 2 10_0402_1% 2 1 PR842

2
CSREF_3PH_A CSN1_3PH_B <53>
PR818 1 2 10_0402_1% 0.01U_0402_50V7K PC816
<53> CSN3_3PH_A
1 2 0.1U_0402_25V6 PR833 10_0402_1% 2 1 PR841
TSENSE_3PH_B 1 2 CSN2_3PH_B <53>
20K_0402_1%
1 2 1 2
+5VALW
<53,55> DRON 1 2
PR819 PR826

1
1.65K_0402_1% 2.2_0402_1% PC815
SW1_3PH_A 1 2 CSP1_3PH_A
H42@ PR832
1U_0402_10V6K 42.2K_0402_1%

52.3K_0402_1%
2

1
PWM1_3PH_B/ICCMAX3B <53>
1

PC810

PR827

3.92K_0402_1%

24.9K_0402_1%

97.6K_0402_1%

97.6K_0402_1%
1

1
0.1U_0402_25V6 PR839
PWM2_3PH_B/DOSC1 <53>
2

CSREF_3PH_A
1.65K_0402_1%

PR828

PR829

PR830

PR831
<53> PWM1_3PH_A/ICCMAX3A

2
CSP1_3PH_B 1 2 SW1_3PH_B
PR820
1.65K_0402_1%
SW2_3PH_A 1 2 CSP2_3PH_A
<53> PWM2_3PH_A/ADDR

1
@ PR878 PC819
1

PC811 1.65K_0402_1%
Prevention current imbalance 0.1U_0402_25V6

2
0.1U_0402_25V6
<53> PWM3_3PH_A/VBOOT
2

2
CSREF_3PH_A CSREF_3PH_B
B PR821 B
1.65K_0402_1% PR838
SW3_3PH_A 1 2 CSP3_3PH_A
1.65K_0402_1%
CSP2_3PH_B 1 2 SW2_3PH_B
1

1
PC812

1
@ PR877 PC818
0.1U_0402_25V6 1.65K_0402_1%
2

0.1U_0402_25V6

2
CSREF_3PH_A
Prevention current imbalance

2
TSENSE_3PH_B CSREF_3PH_B
TSENSE_3PH_A

1
@
1

@ PR834
PR823 0_0402_5%
0_0402_5% +5VALW

2
Place close to Place close to
2

IA MOS GT MOS

1
1

1
H42@ PR836
PH802 PR824 PH803 PR835
1K_0402_1%
100K_0402_1%_NCP15WF104F03RC 61.9K_0402_1% 100K_0402_1%_NCP15WF104F03RC 61.9K_0402_1% PHASE DETECTION

2
2

2
CSP3_3PH_B

(Common Part)
SL200002H00

A A

Function Field :
Control PWM IC - 36.1
Drivers - 36.2
Rest of support elements - 36.3

Title
CPU_IC

Size Document Number Rev


D C5PM2 M/B LA-E361P 1.0

Date: Friday, October 28, 2016 Sheet 52 of 61


5 4 3 2 1

Laptopblue.vn
Laptopblue.vn
5 4 3 2 1

EMI@ PL808
HCB2012KF-121T50_0805
+19VB_CPU 1 2 PC856 +19VB_CPU
+19VB PC855 PC854 PC853

1
PC873

PC872

PC871

10U_0805_25VAK
PC844 PC843 PC842 PC841 EMI@ PL801

1
10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K
HCB2012KF-121T50_0805

1
10U_0805_25VAK

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

105
1 1 1 1 2

2
1 2 @ PR890

2
105
PR881 PR898 + + + 0_0603_5%

2
BOOT1_VCCGT

100U_25V_M

100U_25V_M

100U_25V_M
0_0603_5% 0_0603_5% 1 2
BOOT1_VCORE 1 2 1 2 DRVH1_VCCGT-1

2
2 2 2
PQ801 (Common Part) SF000007100 PC890 PR897 0_0603_5%

G1

D1

2
PC881 MDU5692SVRH_PDFN56-8-7 0.22U_0603_25V7K Choke 0.15uH SH00000X700 7*7*3
0.22U_0603_25V7K
100U 25V M 6.3X6 PU805 PQ807 footprint L_7X7X3_M

G1

D1
1
PU802 7 PL803 NCP81151MNTBG_DFN8_2X2 MDU5692SVRH_PDFN56-8-7 PL806
D2/S1

1
D NCP81151MNTBG_DFN8_2X2 0.15UH_MMD06CZER15MG_37A_20% 1 9 0.15UH_MMD06CZER15MG_37A_20% D
1 9 1 4 BST FLAG 7 VSW1_VCCGT 1 4
+VCC_CORE +VCC_GT

2
BST FLAG 2 8 DRVH1_VCCGT D2/S1

G2

S2

S2

S2
<52> PWM1_3PH_B/ICCMAX3B

2
2 8 DRVH1_VCORE 2 3 PWM DRVH 2 3
<52> PWM1_3PH_A/ICCMAX3A PWM DRVH VSW1_VCCGT
DRON 3 7

G2

S2

S2

S2
6

3
3 7 VSW1_VCORE EN SW
<52,55> DRON EN SW Choke 0.15uH SH00000X700 7*7*3
4 6
0.15uH (DCR 0.9 +-5%) +5VALW 0.15uH (DCR 0.9 +-5%)

3
VCC GND

1
4 6 EMI@ EMI@
+5VALW VCC GND PR882 5 DRVL1_VCCGT PR891
5 DRVL1_VCORE DRVL
DRVL 4.7_1206_5% 4.7_1206_5%

1
CSN1_3PH_A <52> PC889 CSN1_3PH_B <52>
1

PC880

2
2.2U_0402_6.3V6M

2
2.2U_0402_6.3V6M SNB1_VCORE SNB1_GT @
PR886
2

SW1_3PH_B_R

1
EMI@ SW1_3PH_A <52> EMI@ 1 2 SW1_3PH_B <52>
PC882 PC891
680P_0603_50V7K 680P_0603_50V7K near choke

2
0_0402_5%

PC848 PC846 PC845


+19VB_CPU PC860 PC859 PC858 PC857
+19VB_CPU
PC847

1
10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK
1

10U_0805_25V6K

105

105

105

105
2

2
105

105

105
PR884 PR893

2
0_0603_5% 0_0603_5%
BOOT2_VCORE 1 2 1 2DRVH2_VCORE-1 BOOT2_VCCGT 1 2
1 2 DRVH2_VCCGT-1
PR896 0_0603_5%

2
PC884 PC893 PR899 0_0603_5%
C C

2
0.22U_0603_25V7K PQ803 0.22U_0603_25V7K

G1

D1
PU803 MDU5692SVRH_PDFN56-8-7 PU806 PQ809

G1

D1
1

1
NCP81151MNTBG_DFN8_2X2 PL804 NCP81151MNTBG_DFN8_2X2 MDU5692SVRH_PDFN56-8-7 PL807
1 9 VSW2_VCORE 7 0.15UH_MMD06CZER15MG_37A_20% 1 9 0.15UH_MMD06CZER15MG_37A_20%
BST FLAG D2/S1 1 4 BST FLAG 7 1 4
+VCC_CORE +VCC_GT
2

2
2 8 DRVH2_VCORE 2 8 DRVH2_VCCGT D2/S1
<52> PWM2_3PH_A/ADDR PWM DRVH 2 3 <52> PWM2_3PH_B/DOSC1 PWM DRVH 2 3

G2

S2

S2

S2
DRON 3 7 DRON 3 7 VSW2_VCCGT

G2

S2

S2

S2
EN SW EN SW
Choke 0.15uH SH00000X700 7*7*3 Choke 0.15uH SH00000X700 7*7*3

3
4 6 4 6
+5VALW EMI@0.15uH (DCR 0.9 +-5%) +5VALW EMI@0.15uH (DCR 0.9 +-5%)

3
VCC GND VCC GND

1
5 DRVL2_VCORE 5 DRVL2_VCCGT
PR885 PR894
DRVL DRVL
4.7_1206_5% 4.7_1206_5%
1

1
PC883 CSN2_3PH_A <52> PC892 CSN2_3PH_B <52>

2
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M
2

2
SNB2_VCORE SNB2_GT
@
PR892
SW2_3PH_B_R

1
EMI@ SW2_3PH_A <52> EMI@ 1 2 SW2_3PH_B <52>
PC885 PC894
680P_0603_50V7K 680P_0603_50V7K near choke

2
0_0402_5%

PC849 PC850 +19VB_CPU


PC852 PC851

1
10U_0805_25VAK

10U_0805_25VAK
1

1
10U_0805_25V6K

10U_0805_25V6K

2
DRVH3_VCORE-1

105

105
PR887 1 2

2
0_0603_5%
B
BOOT3_VCORE 1 2 PR895 0_0603_5% B
1

PC887
0.22U_0603_25V7K PQ805
G1

D1

PU804 MDU5692SVRH_PDFN56-8-7
1

NCP81151MNTBG_DFN8_2X2 PL805
1 9 7 0.15UH_MMD06CZER15MG_37A_20%
BST FLAG D2/S1 1 4
+VCC_CORE
2

2 8 DRVH3_VCORE
<52> PWM3_3PH_A/VBOOT PWM DRVH 2 3
G2

S2

S2

S2

DRON 3 7 VSW3_VCORE
EN SW
Choke 0.15uH SH00000X700 7*7*3
6

4 6
+5VALW VCC GND 0.15uH (DCR 0.9 +-5%)
1

EMI@
5 DRVL3_VCORE
PR888
DRVL
4.7_1206_5%
1

PC886 CSN3_3PH_A <52>


2

2.2U_0402_6.3V6M
2

SNB3_VCORE
1

EMI@ SW3_3PH_A <52>


PC888
680P_0603_50V7K
2

A Function Field : A

Drivers - 36.2
Rest of support elements - 36.3
Acoustic Noise B+ Bulk CAP - 37.2

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title
C5PM2 M/B LA-E361P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Re v
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. VCC/VCCGT
Date: Friday, October 28, 2016 Sheet 53 of 61
5 4 3 2 1

Laptopblue.vn
Laptopblue.vn
A

+VCC_CORE

+VCC_CORE
2 1 2 1 2 1

PC1055 PC1044 PC1033


1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M

1
+
PC868
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 220U_D2_2V_Y

@
PC1086 PC1076 PC1066 PC1056 PC1045 PC1034 PC1021 PC1011 PC1001
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

1
+
PC869
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 220U_D2_2V_Y
5

5
PC1087 PC1077 PC1067 PC1057 PC1046 PC1035 PC1022 PC1012 PC1002
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

63 X 1uF_0201
20 X 22uF_0603_X5R
2
Total VCORE Output Capacitor:
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

@
PC1088 PC1078 PC1068 PC1058 PC1047 PC1036 PC1023 PC1013 PC1003
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

X 220uF
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

PC1089 PC1079 PC1069 PC1059 PC1048 PC1037 PC1024 PC1014 PC1004


1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

@
PC1090 PC1080 PC1070 PC1060 PC1049 PC1038 PC1025 PC1015 PC1005
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

@
PC1091 PC1081 PC1071 PC1061 PC1050 PC1039 PC1026 PC1016 PC1006
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

@
PC1092 PC1082 PC1072 PC1062 PC1051 PC1040 PC1027 PC1017 PC1007
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

@
PC1093 PC1083 PC1073 PC1063 PC1052 PC1041 PC1028 PC1018 PC1008
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

@
PC1094 PC1084 PC1074 PC1064 PC1053 PC1042 PC1029 PC1019 PC1009
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
4

4
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

@
@
PC1095 PC1085 PC1075 PC1065 PC1054 PC1043 PC1030 PC1020 PC1010
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

+VCC_GT
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
@
PC1173 PC1163 PC1153 PC1143 PC1133 PC1123 PC1111 PC1101
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
@

1
+

+VCC_GT
PC1174 PC1164 PC1154 PC1144 PC1134 PC1124 PC1112 PC1102 PC876
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 220U_D2_2V_Y

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

1
+
PC1183 PC1175 PC1165 PC1155 PC1145 PC1135 PC1125 PC1113 @ PC1103 @ PC877
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 560U_D2_2VM_R4.5M

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
@
PC1184 PC1176 PC1166 PC1156 PC1146 PC1136 PC1126 PC1114 PC1104
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

68 X 1uF_0201
18 X 22uF_0603_X5R
1 X 220uF
Total VCCGT Output Capacitor:
PC1185 PC1177 PC1167 PC1157 PC1147 PC1137 PC1127 PC1115 PC1105
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

SGA00009S00
Common part
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
@
PC1186 PC1178 PC1168 PC1158 PC1148 PC1138 PC1128 PC1116 PC1106
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
3

3
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
@ @
PC1187 PC1179 PC1169 PC1159 PC1149 PC1139 PC1129 PC1117 PC1107
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


Issued Date

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

PC1188 PC1180 PC1170 PC1160 PC1150 PC1140 PC1130 PC1118 PC1108


1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
@
PC1189 PC1181 PC1171 PC1161 PC1151 PC1141 PC1131 PC1119 PC1109
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1

PC1190 PC1182 PC1172 PC1162 PC1152 PC1142 PC1132 PC1120 PC1110


1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2016/01/29

+VCC_GT
Compal Secret Data

2 1 2 1
@
PC1649 PC1121
22U_0603_6.3V6M 22U_0603_6.3V6M
Deciphered Date

2 1 2 1
+VCC_SA

@
@ PC1650 PC1122
22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1
2

2
2 1 @
PC1651 PC1641
PC1203 22U_0603_6.3V6M 22U_0603_6.3V6M
1U_0201_6.3V6M
2 1 2 1
2 1 2 1 2 1
7 X 1uF_0201
10(+2) X 22uF_0603
Total VCCSA Output Capacitor:

@ PC1652 PC1642
PC1204 PC1197 PC1191 22U_0603_6.3V6M 22U_0603_6.3V6M
2017/01/10

1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


2 1 2 1
2 1 2 1 2 1
@ PC1653 PC1643
PC1205 PC1198 PC1192 22U_0603_6.3V6M 22U_0603_6.3V6M
1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2 1 2 1 2 1
@ PC1654 PC1644
PC1206 PC1199 PC1193 22U_0603_6.3V6M 22U_0603_6.3V6M
1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2 1 2 1 2 1
@ PC1655 PC1645
PC1207 PC1200 PC1194 22U_0603_6.3V6M 22U_0603_6.3V6M
Date:

Size Document Number

Title
Custom

1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


2 1 2 1
C5PM2 M/B LA-E361P

2 1 2 1 2 1 @
@ PC1656 PC1646
Friday, October 28, 2016

PC1208 @ PC1201 PC1195 22U_0603_6.3V6M 22U_0603_6.3V6M


CPU CAP

1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M


2 1
2 1 2 1 2 1 @
PC1647
Compal Electronics, Inc.

PC1209 @ PC1202 PC1196 22U_0603_6.3V6M


1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1

@ PC1648
22U_0603_6.3V6M
1

1
Sheet
54
of
61

R ev
1.0

ptopblue.vn
ptopblue.vn
5 4 3 2 1

+19VB_CPU
PC865

1
PC866

10U_0805_25VAK
PR901 PC899 10U_0805_25V6K

2
105
D 0_0603_5% 0.22U_0603_25V7K D

2
1 2 BST_R_+VCC_SA 1 2 HG_+VCC_SA

0.47UH
PU808
Rdc=4m~4.2mohm

4
NCP81253MNTBG_DFN8_2X2
5*5*3 SH000015M00->SH00001ED00 Common part

G1

D1

D1

D1
BST_+VCC_SA 1 8 PL809
BST DRVH 0.47UH_MMD05CZR47M_12A_20%
2 7 SW _+VCC_SA 9 10 SW _+VCC_SA 1 4
<52> PW M1_1PH/ICCMAX1 PWM SW D2/S1 D1 +VCC_SA
3 6 2 3
<52,53> DRON EN GND PQ811

G2

S2

S2

S2
4 5 AON7934_DFN3X3A8-10
+5VALW

PAD
VCC DRVL

1
@EMI@

5
PR900
4.7_1206_5%

9
1
PC898
CSN_1PH <52>

2
2.2U_0402_6.3V6M LG_+VCC_SA

2
SNB_SA

1
@EMI@
PC900 SW_1PH <52>
680P_0603_50V7K

2
C C

B B

Function Field :
A Drivers - 36.2 A
Rest of support elements - 36.3

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title
C5PM2 M/B LA-E361P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

Laptopblue.vn
Laptopblue.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. VCCSA
Date: Friday, October 28, 2016 Sheet 55 of 61
5 4 3 2 1
A B C D E

+19VB

PJ1301
+19VB_1.35VSDGPUP 2 1
2 1

10U_0805_25V6K

10U_0805_25V6K
2200P_0402_50V7K

0.1U_0402_25V6
JUMP_43X79

1
1 1

PC1310

@VGA_EMI@ PC1303

PC1304
@

VGA_EMI@ PC1302
5
<23> 1.35VS_DGPU_PG PQ1301

2
AON6428_POW ERDFN56-8-5

VGA@

VGA@
PR1312 4
1 2
+3VS 10K_0402_5%
@ PR1302 VGA@ PC1305
0_0603_5%

3
2
1
PU1301 0.1U_0603_25V7K
VGA@ PR1301 1 10 BST_1.35VSDGPUP 1 2 1 2 7*7*3
PR1303 VGA@ 59K_0402_1% PGOOD BOOT
40.2K_0402_1% 1 2ILMT_1.35VSDGPUP 2 9 HGATE_1.35VSDGPUP VGA@ PL1301
CS UGATE 0.82UH PCMC063T-R82MN 13A_20%
1.35VS_DGPU_EN LX_1.35VSDGPUP
<23> 1.35VSDGPU_PW R_EN
2 1 3
EN PHASE
8 1 2
+1.35VSDGPUP
4 7

VGA@ PC1306
0.1U_0402_16V7K
FB VCC
+5VALW
1

5
@VGA@

1
5 6 LGATE_1.35VSDGPUP

220U_D2 SX_2VY_R9M

220U_D2 SX_2VY_R9M
1M_0402_1% RF LGATE PR1305 1 1
2

PR1304 11

PC1301

PC1311
TP 4.7_1206_5%

1
+ +
@VGA_EMI@
2

RT8237EZQW (2)_W DFN10_3X3 4

2
1
PR1306 VGA@

SNB_1.35VSDGPUP

1
200K_0402_1% PC1307VGA@ PQ1303 2 2
1U_0603_6.3V6M

VGA@

VGA@
VGA@ PR1314

2
2 AON6794_POW ERDFN56-8-5 100_0402_1%
2

3
2
1

2
Rrf=470K ->290KHz

1
Rrf=200K ->340KHz PC1308
680P_0603_50V7K
Rrf=100K ->380KHz

2
@VGA_EMI@
1

VGA@ PR1307
1.35VS_DGPU_FB 2 1 1 2
PR1310 FB_VDDQ_SENSE <26>
90.9K_0402_1% 18.7K_0402_1% @VGA@ PR1313 0_0402_5%
1
2

VGA@
PR1308
VFB=0.704V
1

D
@ PR1309 PQ1302 20K_0402_1%
1 2 2
Vout=0.704V* (1+Rup/Rdown)
2

<23> VRAM_VDD_CTL G 2N7002KW _SOT323-3 VGA@


1

S
3

PR1311 0_0402_5%
@VGA@ PC1309

Vout=0.704V* (1+(18.7/20))=1.36 0.97%


0.1U_0402_16V7K
1

10K_0402_1%

Vout=0.704V* (1+(18.7/(20//93.1)))=1.5 0.03%


2

Vout=0.704V* (1+(18.7/(20//90.9)))=1.524 1.62% @ PJ1302


+1.35VSDGPUP 1 2 +1.35VSDGPU
Vout=0.704V* (1+(18.7/(20//88.7)))=1.548 3.23% 1 2
JUMP_43X118

3 Rds on 2.8 / 3.5mohm 3


Rlimt=59K @ PJ1303
1 2
Iocp=23.21~26.01A 1 2
JUMP_43X118

4 4

Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VRAM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

Laptopblue.vn
Laptopblue.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A3 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 56 of 61
A B C D E

1 1
Function Field :
PWR.Plane.Regulator_1.05VDGPU - 43.7
Rest of support elements - 43.8

@ PJ1402
JUMP_43X39
+19VB_1.05V
+19VB_CPU 1
1 2
2

0.1U_0402_25V6

10U_0805_25V6K

10U_0805_25V6K
2200P_0402_50V7K
1

1
@EMI@PC1402

EMI@PC1403

PC1404

PC1405
2

2
PC1406
High >1.45V PR1401 PR1402 0.22U_0603_10V7K @EMI@ PR1403 @EMI@ PC1407
0_0402_5% 0_0603_5% 4.7_1206_5% 680P_0402_50V7K @ PJ1401
2 2 1 EN_1.05V BST_1.05V 1 2 BST_1.05V_R 1 2 1 2 SNB_1.05V 1 2 JUMP_43X79 2
<23,59> VGA_CORE_S_EN 1 2
+1.0VSDGPUP 1 2 +1.0VSDGPU
1

1
1M_0402_1% (Common Part) 5*5*3 SH00000Z200
@ PC1401
PR1404 PU1401
0.1U_0402_25V6
2

7
RT6219AGQW_WDFN10_3X3
2

EN pin don't floating PL1402

VIN

BOOT
4 1UH_6.6A_20%_5X5X3_M
If have pull down resistor at HW side, pls delete PR4 EN

+5VALW 2
PR1405
1 1
SW3
10 LX_1.05V 1 2 +1.0VSDGPUP
5.1_0402_1% 2

1
PC1408 VBYP 9

22P_0402_50V8J
1
2.2U_0603_10V6K SW2

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
2

PR1406

PC1412

22U_0603_6.3V6M
1

1
8 13.7K_0402_1%

2
PR1407 1 SW1

PC1409

PC1411

PC1413

PC1414

PC1410
2
<23> 1VS_DGPU_PG 1 2 PGOOD
+3VS

2
10K_0402_5% 5 FB_1.05V
Confirm HW the pull high resistor. VCC_1.05V FB

PGND
6
VCC @ @ @
1

1
PR1408

11
PC1415 20K_0402_1%
2.2U_0603_10V6K VFB=0.6V
2

Vout=0.6V* (1+Rup/Rdown) cont i nuous 4A

2
=0.6V* (1+13.7/20)
Vout=1.011V current limit 5A(min)

Switching frequency is 500KHz.


3 3
PR7(Rup) + PR8(Rdown) < 8Kohm, if your project has
output voltage leakage concern when EN is low.

4 4

Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
1.05VSDGPU
Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 57 of 61
A B C D E
Module model information +19VB_GPU_NVVDD

NCP81278_NVVDD_V1A.mdd for IC portion. +19VB


PJ1501
NCP81278_NVVDD_V1B.mdd for SW portion. 2 1

100U_25V_NC_6.3X6
2 1
1

0.1U_0402_25V6

10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK
2200P_0402_50V7K
@EMI@ PC1502

EMI@ PC1503
1

1
+ JUMP_43X118

PC1504

PC1505

PC1506

PC1507

PC1508
@

105

105
2

2
2

105

105
+5VS @ @
(Common Part) SF000007100

4.7U_0603_6.3V
1
100U 25V M 6.3X6

PC1509
2
High: >1.5V
Low: <0.7V +VGA_CORE
NVVDD_LG1 NVVDD_LG2
EN can't float
@ PL1501
<23> VGA_CORE_EN PR1501 NVVDD_SW1 NVVDD_SW2 0.22UH_MMD-10DZ-R22MES1L__35A_20%
1 2 PC1510 NVVDD_SW1 1 4

1
PC1511 0.22U_0603_25V7K

1
0.22U_0603_25V7K 2 3
0_0402_5%
1

2
PC1501 NVVDD_HG1 NVVDD_HG1

2
0.1U_0402_16V7K +3VS
2

PU1501

20

19

18

17

16
1

2
NCP81278MNTXG_QFN20_3X3 PQ1501 PQ1502

AON6992_DFN5X6D-8-7

AON6992_DFN5X6D-8-7
2.2_0603_1% PR1503

PH1

LG1

LG2

PH2

G1

D1

G1

D1
PVCC

1
+1.8VS 2.2_0603_1%
PR1502 PR1504
NVVDD_BST1 1 15 NVVDD_BST2 7 7
100K_0402_5%

2
1

1
BST1 BST2 D2/S1 D2/S1 @EMI@
@ PR1505 NVVDD_HG1 2 14 NVVDD_HG2 PR1506

2
HG1 HG2

G2

G2
10K_0402_1% 2.2_1206_1%

S2

S2

S2

S2

S2

S2
@ NVVDD1_EN 3 13 VGA_CORE_PG <23>
PR1507 EN PGOOD
2

2
1 2 NVVDD_PSI_R 4 12 NVVDD_COMP 1 2
9> DGPU_PSI PSI COMP/OPT

2200P_0603_50V7K
1

82.5K_0402_1%
NVVDD_VID_R

PR1511
0_0402_5% 1 2 5 11 @ PR1508
<23> DGPU_VID VID FB

1
NVVDD_LG1 NVVDD_LG1

PC1512
@EMI@
@ PR1509 75K_0402_1%

VIDBUF

FBRTN
REFIN

VREF
10K_0402_1% @ PR1510

GND
Avoid high dV/dt 0_0402_5%

FS

2
10P_0402_25V8J

1
2

1 2
PC1513

21

9
NVVDD_FBRTN 10

2
PC1514

NVVDD_FS
100P_0402_50V8J

2
NVVDD_FB
NVVDD_VIDBUF +19VB_GPU_NVVDD

1
1

1
PR1513 PR1514
NVVDD_REFIN PR1512 10K_0402_5%
39.2K_0402_1% 49.9_0402_1%
R1 R4

1 2
1

Fs=400KHz
6.19K_0402_1%

2
PR1516

PR1517

R3
16.5K_0402_1%

0.1U_0402_25V6

2200P_0402_50V7K
1

NVVDD_VREF PC1515 @

@EMI@ PC1518

EMI@ PC1519

10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK

10U_0805_25VAK
4700P_0402_50V7K

1
47P_0402_50V8J
PC1516
4.32K_0402_1%

1
PC1517
PR1515

PC1520

PC1521

PC1522

PC1523
2

1 2

2
1

105

105

105

105
2

2
PC1524 1000P_0402_25V
0.01U_0402_16V
2

R5
1

+VGA_CORE
1

1
PR1518
309_0402_1% PR1519 PR1520
PR1521 100_0402_5% NVVDD_HG2 NVVDD_HG2
0_0402_5% 0_0402_5%
2

1 2
+VGA_CORE
@ @ PL1502
R2
2

2
PQ1503 PQ1504 0.22UH_MMD-10DZ-R22MES1L__35A_20%

AON6992_DFN5X6D-8-7

AON6992_DFN5X6D-8-7
1 2 VCCSENSE_VGA <25> 1 4

G1

D1

G1

D1
PR1522 20.5K_0402_1% Avoid high dV/dt 2 3
4700P_0402_50V7K

1
VSSSENSE_VGA <25> 7 7 @EMI@
C
1

D2/S1 D2/S1 PR1523


PC1525

PR1524 100_0402_5% 2.2_1206_1%


1 2

G2

G2
S2

S2

S2

S2

S2

S2
2

NVVDD_SW2 SH00000NM00 AP PCMB104T-R22MS0R825

2
SH00000QZ00 AP MMD-10DZ-R22MEX2L

2200P_0603_50V7K
1
PC1526
Place close to GPU
R1, R2, R3, R4, R5, C are

2
@EMI@
based on VGA type to set.
NVVDD_LG2
NVVDD_LG2

+NVVDD1
TDC 63A
Peak Current 90A
OCP >108A
Please base on GPU spec to calculate.

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VGA_CORE

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

Laptopblue.vn
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 58 of 61
1 2 3 4 5

Module model information


NCP81278_NVVDDS_V1A.mdd for IC portion.
NCP81278_NVVDDS_V1B.mdd for SW portion.

+19VB_GPU_NVVDDS +19VB
A A
+5VS

4.7U_0603_6.3V
PJ1601

1
2 1

PC1602
2 1

10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6

10U_0805_25V6K

10U_0805_25V6K
2200P_0402_50V7K
2

@EMI@ PC1603

EMI@ PC1604
1

1
JUMP_43X118

PC1616

PC1617

PC1605

PC1606
@

2
NVVDDS_LG1
@ @
NVVDDS_SW1
NVVDDS_HG1
High: >1.5V PC1607
EN can't float Low: <0.7V

1
0.22U_0603_25V7K
<23,57> VGA_CORE_S_EN PR1601
@

2
1 2 +3VS
PU1601

20

19

18

17

16
1

1
0_0402_5% @ PR1602 NCP81278MNTXG_QFN20_3X3 @
PC1601

PH1

LG1

LG2

PH2
PVCC

2
+1.8VS 2.2_0603_1% PQ1601 PQ1602
0.1U_0402_16V7K
2

AON6992_DFN5X6D-8-7

AON6992_DFN5X6D-8-7
PR1604

G1

D1

G1

D1
NVVDDS_BST1
1 15 100K_0402_5%

2
BST1 BST2
1

@ PR1603 NVVDDS_HG1 2 14 NVVDDS_SW1 7 7

2
HG1 HG2 D2/S1 D2/S1
10K_0402_1%
@ PR1605 NVVDD2_EN 3 13 VGA_CORE_S_PG <23> +VGA_CORE_S
0_0402_5% EN PGOOD

G2

G2
S2

S2

S2

S2

S2

S2
2

1 2 4 12 NVVDDS_COMP 1 2
<23,58> DGPU_PSI PR1607 PSI COMP/OPT
@ PR1606

3
1

82.5K_0402_1%
PR1609
1 2 5 11 @ 75K_0402_1%
<23> DGPU_S_VID VID FB
PR1608 PL1601

VIDBUF

FBRTN
REFIN

VREF
10K_0402_1% 0_0402_5% 0.22UH_MMD-10DZ-R22MES1L__35A_20%

GND
1 4

FS

1
Avoid high dV/dt
2

1 2

1
PC1608 @EMI@ 2 3
21

10
B 10P_0402_25V8J PR1610 B

2
PC1609 NVVDDS_LG1
2.2_1206_1%
100P_0402_50V8J

2
1NVVDDS_FS
10*10*4 SH00000QZ00

2200P_0603_50V7K
1 2
1
NVVDDS_VIDBUF

PC1610
PR1611
49.9_0402_1%

2
1

@EMI@
PR1613
NVVDDS_REFIN PR1612 10K_0402_5%

1 2
39.2K_0402_1%
PC1611
R1 R4
1

Fs=400KHz 47P_0402_50V8J
6.19K_0402_1%

2
PC1613
PR1614

PR1616

R3
16.5K_0402_1%

2
1

NVVDDS_VREF 1 2
4700P_0402_50V7K
PC1612
4.32K_0402_1%

1000P_0402_25V
PR1615
2

1
2

PC1614
2

1
0.01U_0402_16V @ @
PR1617 PR1618
R5
1

0_0402_5% 0_0402_5%
PR1619
2

309_0402_1%
PR1620 100_0402_5%
2

1 2 +VGA_CORE_S
R2
1 2 VCCSENSE_VGA_S <27>
4700P_0402_50V7K

PR1621 Avoid high dV/dt


20.5K_0402_1% VSSSENSE_VGA_S <27>
1
PC1615

PR1622 100_0402_5%
C 1 2
2

C C
+NVVDDS
TDC 30A
Place close to GPU Peak Current 42A
OCP > 50A
Please base on GPU spec to calculate.
R1, R2, R3, R4, R5, C are
based on VGA type to set.

D D

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2016/01/29 Deciphered Date 2017/01/10 Title

VGA_CORE_S
Laptopblue.vn
Laptopblue.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 59 of 61
1 2 3 4 5
D

1.0
Rev

C5PM2 M/B LA-E361P


61
X 3

of
Compal Electronics, Inc.
10uF_0603 X 2

60
4.7uF_0603 X5
22uF_0603_X5R

1uF_0402 X 5
+VGA_CORE_S

Sheet
VGA DECOUPLING
470uF X 2
1

1
Friday, October 28, 2016
Document Number
Under GPU

Under GPU

Date:
Title

Size
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

VGA@ @ VGA@ VGA@


PC1714 PC1768 PC1743 PC1756
2017/01/10

22U_0805_6.3V6M 22U_0805_6.3V6M 4.7U_0603_6.3V6K 1U_0402_6.3V6K MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2

2
1 2 1 2 1 2 1 2
VGA@ @ VGA@ VGA@
PC1713 PC1767 PC1742 PC1755
22U_0805_6.3V6M 22U_0805_6.3V6M 4.7U_0603_6.3V6K 1U_0402_6.3V6K
1 2 1 2 1 2 1 2
VGA@ @ VGA@ VGA@ 220U_D2 SX_2VY_R9M
PC1712 PC1766 PC1741 PC1754
VGA@ PC1778
22U_0805_6.3V6M 22U_0805_6.3V6M 4.7U_0603_6.3V6K 1U_0402_6.3V6K
+
1

1 2 1 2 1 2 1 2

Deciphered Date
VGA@ VGA@ VGA@ VGA@ 220U_D2 SX_2VY_R9M
PC1711 PC1726 PC1740 PC1753

Compal Secret Data


VGA@ PC1777
22U_0805_6.3V6M 10U_0603_6.3V6M 4.7U_0603_6.3V6K 1U_0402_6.3V6K
+
1

1 2 1 2 1 2 1 2
VGA@ VGA@ VGA@ VGA@ 220U_D2 SX_2VY_R9M
PC1710 PC1725 PC1739 PC1752
VGA@ PC1776
22U_0805_6.3V6M 10U_0603_6.3V6M 4.7U_0603_6.3V6K 1U_0402_6.3V6K
+
1

1 2 1 2 1 2 1 2
+VGA_CORE_S

2016/01/29
3

3
4.7uF_0603 X 22
22uF_0603 X 7

Security Classification
10uF_0603X 3
1uF_0402 X 9

Issued Date
+VGA_CORE
470uF X 2
330uFX2

Under GPU

Under GPU
Under GPU

Laptopblue.vn
Laptopblue.vn
VGA@ VGA@
PC1724 PC1738
4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
VGA@
1 2 1 2 PC1765
4

4
VGA@ VGA@ VGA@
PC1709 PC1723 PC1737 22U_0805_6.3V6M
1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
1 2
VGA@ VGA@
1 2 1 2 1 2 PC1751 PC1764
VGA@ VGA@ VGA@
PC1708 PC1722 PC1736 4.7U_0603_6.3V6K 22U_0805_6.3V6M
1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
1 2 1 2
VGA@ VGA@ 220U_D2 SX_2VY_R9M
1 2 1 2 1 2 PC1750 PC1763
VGA@ VGA@ VGA@ VGA@ PC1775
PC1707 PC1721 PC1735 4.7U_0603_6.3V6K 22U_0805_6.3V6M
1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K

+
1

2
1 2 1 2
@ VGA@ 220U_D2 SX_2VY_R9M
1 2 1 2 1 2 PC1749 PC1762
VGA@ VGA@ VGA@ @ PC1774
PC1706 PC1720 PC1734 22U_0805_6.3V6M 22U_0805_6.3V6M
1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K

+
1

2
1 2 1 2
@ VGA@ 220U_D2 SX_2VY_R9M
1 2 1 2 1 2 PC1748 PC1761
VGA@ VGA@ VGA@ VGA@ PC1773
PC1705 PC1719 PC1733 22U_0805_6.3V6M 22U_0805_6.3V6M
1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K

+
1

2
1 2 1 2
@ VGA@ 220U_D2 SX_2VY_R9M
1 2 1 2 1 2 PC1747 PC1760
VGA@ VGA@ VGA@ VGA@ PC1772
PC1704 PC1718 PC1732 22U_0805_6.3V6M 22U_0805_6.3V6M
1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K

+
1

2
1 2 1 2
VGA@ VGA@ 220U_D2 SX_2VY_R9M
1 2 1 2 1 2 PC1746 PC1759
VGA@ VGA@ VGA@ VGA@ PC1771
PC1703 PC1717 PC1731 10U_0603_6.3V6M 22U_0805_6.3V6M
1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K

+
1

2
1 2 1 2
VGA@ VGA@ VGA@ 220U_D2 SX_2VY_R9M
1 2 1 2 1 2 PC1745 PC1758
VGA@ VGA@ VGA@ PC1770
PC1702 PC1716 PC1730 10U_0603_6.3V6M 22U_0805_6.3V6M
1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K

+
1

2
1 2 1 2
VGA@ VGA@ 220U_D2 SX_2VY_R9M
1 2 1 2 1 2 PC1744 PC1757
5

5
VGA@ VGA@ VGA@ VGA@ PC1769
PC1701 PC1715 PC1729 10U_0603_6.3V6M 22U_0805_6.3V6M
1U_0402_6.3V6K 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K

+
1

2
1 2 1 2
1 2 1 2 1 2
+VGA_CORE

A
5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1


for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
change:
PC7108 SE00000M000 -> SE107475K80 S CER CAP 4.7U 6.3V K X5R 0603
PC7109 SE071680J80 -> SE075103K80 S CER CAP .01U 25V K X7R 0402
PC7202 SE00000G880 -> SE042104K80 S CER CAP .1U 25V K X7R 0603
PC7207 SE00000G880 -> SE074222K80 S CER CAP 2200P 50V K X7R 0402
D PC7208 SE00000X200 -> SE00000QK00 S CER CAP 10U 25V K X5R 0805 H1.25 D
PR7115 SD034324280 -> SD034215280 S RES 1/16W 32.4K +-1% 0402
PR7118 SD028470280 -> SD028100480 S RES 1/16W 47K +-5% 0402
PR7201 SD034100480 -> SD028100480 S RES 1/16W 1M +-5% 0402
PR7202 SD00000J180 -> SD013000080 S RES 1/10W 0 +-5% 0603
PR7208 SD028000080 -> SD028100180 S RES 1/16W 1K +-5% 0402
PU7102 SA00007QP00 -> SA00001HW80 S IC G971ADJF11U SO 8P
PU7201 SA000085O00 -> SA00008I400 S IC SY8288RAC QFN 20P PWM
Del:
PC7111 SE00000M000 S CER CAP 22U 6.3V M X5R 0603
PL7102 SH00000YG00 S COIL 1UH +-30% 2.8A 4X4X2 FERRITE
PR7109 SD028000080 S RES 1/16W 0 +-5% 0402
PR7112 SD028100380 S RES 1/16W 100K +-5% 0402
PR7204 SD028000080 S RES 1/16W 0 +-5% 0402
PR7205 SD034200280 S RES 1/16W 20K +-1% 0402
PR7206 SD034200280 S RES 1/16W 20K +-1% 0402
Add:
PC7201 SE00000G880 S CER CAP 0.1U 25V K X5R 0402
PC7203 SE025681K80 S CER CAP 680P 50V K X7R 0603
PC7210 SE000000K80 S CER CAP 1U 6.3V K X5R 0402
PC7211 SE00000M000 S CER CAP 22U 6.3V M X5R 0603
PC7212 SE00000M000 S CER CAP 22U 6.3V M X5R 0603
PC7218 SE000008880 S CER CAP 2.2U 6.3V M X5R 0402
PR7211 SD034100080 S RES 1/16W 100 +-1% 0402
PR7212 SD034100A80 S RES 1/16W 10 +-1% 0402
SPEC current down so change IC 0.1 P50 PR7215 SD034205280 S RES 1/16W 20.5K +-1% 0402
0727
PR7216 SD034100080 S RES 1/16W 100 +-1% 0402
PR7218 SD034120280 S RES 1/16W 12K +-1% 0402 EVT
01
change:
PL1501 SH00001EA00 -> SH00000QZ00 S COIL .22UH +-20% MMD-10DZ-R22MES1L 35A
PL1502 SH00001EA00 -> SH00000QZ00 S COIL .22UH +-20% MMD-10DZ-R22MES1L 35A
change common part. P47 P58 PL1601 SH00001EA00 -> SH00000QZ00 S COIL .22UH +-20% MMD-10DZ-R22MES1L 35A
PL404 SH000016800 -> SH000016700 S COIL 1.5UH +-20% 9A 7X7X3 MOLDING 0727 EVT
0.1
PR844 SD034750280-> SD034787280 S RES 1/16W 78.7K +-1% 0402
PR845 SD034750280-> SD034787280 S RES 1/16W 78.7K +-1% 0402
PR852 SD034226280-> SD034232280 S RES 1/16W 23.2K +-1% 0402
C PR867 SD034348280-> SD034374280 S RES 1/16W 37.4K +-1% 0402 C
PR868 SD000003580-> SD034255280 S RES 1/16W 25.5K +-1% 0402
PR871 SD034137280-> SD00000AJ80 S RES 1/16W 12.4K +-1% 0402
PR875 SD034100180-> SD034150180 S RES 1/16W 1.5K +-1% 0402
PC807 SE074102K80-> SE000003W00 S CER CAP 820P 50V K X7R 0402
PC809 SE074103K80-> SE074104K80 S CER CAP 0.1U 50V K X7R 0402
PC820 SE074103K80-> SE074104K80 S CER CAP 0.1U 50V K X7R 0402
PC868 SGA20331E10->SGA20221D40 S POLY C 330U 2V Y D2 LESR9M EEFSX H1.9
PC876 SGA20331E10->SGA20221D40 S POLY C 220U 2V Y D2 SX LESR9M H1.9
PL809 SH000015M00-> SH00001ED00 S COIL .47UH 20% MMD-05CZ-R47MEV1L 12.2A
PQ801 PQ803 PQ805 PQ807 PQ809
SB000017L00->SB000017400 S TR MDU5692SVRH 2N DUAL PDFN56-8
CPU Transient Test improve. 0.1 P52 P54 Del:
PC1013 PC1016 PC1020 PC1021 PC1025 PC1026 PC1027 PC1028 PC1029 PC1030 PC1103 PC1106 PC1107 PC1109 PC1111 PC1112 0727
PC1114 PC1117 PC1122 PC1646 PC1647 PC1649 PC1651 SE00000M000 S CER CAP 22U 6.3V M X5R 0603
Add:
PC869 SGA20221D40 S POLY C 220U 2V Y D2 SX LESR9M H1.9
EVT
change:
PC1301 SF000004J00 SGA20221D40 S POLY C 220U 2V Y D2 SX LESR9M H1.9
PR1306 SD034470380 SD034200380 S RES 1/16W 200K +-1% 0402
Del:
PC1410 SE00000M000 S CER CAP 22U 6.3V M X5R 0603
VRAM 1.05VSDGPU Transient Test improve. 0.1 P56 P57 PC1413 SE00000M000 S CER CAP 22U 6.3V M X5R 0603
PC1414 SE00000M000 S CER CAP 22U 6.3V M X5R 0603
Add: 0727 EVT
PC1311 SGA20221D40 S POLY C 220U 2V Y D2 SX LESR9M H1.9

Del:
PQ1601 SB000017L00 S TR AON6992 2N DFN5X6D
PR1603 SD034100280 S RES 1/16W 10K +-1% 0402
PR1606 SD034750280 S RES 1/16W 75K +-1% 0402
PC1508 SF000007100 S ELE CAP 100U 25V M 6.3X6
PC1616 SE00000QK00 S CER CAP 10U 25V K X5R 0805 H0.85
PC1617 SE00000QK00 S CER CAP 10U 25V K X5R 0805 H0.85

P59 P60 Add:


VGA Transient Test improve & SPEC CURRENT down. 0.1 PC1769 PC1771 PC1773 PC1775 PC1776 PC1778
SGA20221D40 S POLY C 220U 2V Y D2 SX LESR9M H1.9
PR1608 SD034100280 S RES 1/16W 10K +-1% 0402 0727
B
EVT B
Add:
PC323 PC518 PC882 PC885 PC888 PC891 PC894
SE025681K80 S CER CAP 680P 50V K X7R 0603
PL302 PL303 PL501 PL801 PL808
SM01000P200 S SUPPRE_ TAI-TECH HCB2012KF-121T50 0805
EMI request 0.1 PR319 PR504 PR7203 PR882 PR885 PR888 PR891 PR894
SD001470B80 S RES 1/4W 4.7 +-5% 1206

PU301_SA00008OM00_BQ24780S -> SA0000A6B00_BQ24781



CPU NVVDD NVVDDS input Cap 85度->105 PC809,PC820 SE074104K80_0.1uF_0402_50V -> SE076104K80_0.1uF_0402_16V
PC1505,PC1506,PC1507,PC1521,PC1522,PC1523,PC844,PC845,PC846,PC848,PC849,PC850,PC856,PC857,PC858,PC859,PC860,PC865
09/14
DVT
SE00000QK00_10uF_0805_25V X5R -> SE000010S00_10uF_0805_25V X6S

PU7102,PU7103__SA00001HW80_G971ADJF11U_SO8 -> SA000034S00_APL5930KAI-TRG

0.2
Del:
PR801,PR804,PR823,PR834,PR856,PR854,PR866,PR861,PR886,PR892,PR607,PR7209,

0ohm-->R-SHORT
PR7210,PR1309,PR1501,PR1507,PR1510,PR1520,PR1519,PR1601,PR1607,PR1617,PR1618
SD028000080_0_0402_5% to unpop
Add
PC105_SE042104K80_0.1U 25V K X7R 0603(EMI)

PC205 SE042104K80_0.1U_0603_25V7K
PH202 PH203__SL200002H00_100K_0402_1%_NCP15WF104F03RC
PR214 PR215__SD034215280_21.5K_0402_1%
PR216 PR218__SD034100280_10K_0402_1%
PR213 SD034100380_100K_0402_1%
PU201 SA00003K300_G718TM1U_SOT23-8

Add thermal PH2 PH3

EMI request

Dell:
PH202_100K_0402_NTC_SL200002H00 PR214_21.5K_0402_SD034215280 PR216_10K_0402_SD034100280
Remove thermal PH2 change:
PQ201_BSS138LT1G_SB00000QO00 --> LBSS139LT1G_SB00001GD00 09/23 DVT
Setting PH1 95度/P H3 度
85 0.2 PR204_18.7K_0402_SD034187280
PR218_10K_0402_SD034100280
-->15.4K_0402_SD034154280
-->14K_0402_SD034140280
A PR215_21.5K_0402_SD034215280 -->26.7K_SD034267280 A

Security Classification
2016/01/29
Compal Secret Data
2017/01/10 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR

Laptopblue.vn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev

Laptopblue.vn
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5PM2 M/B LA-E361P
Date: Friday, October 28, 2016 Sheet 61 of 61
5 4 3 2 1

You might also like