Compal Confidential MB Schematic Document for EH50F/EH70F/EH51F/EH5VF/EH53F/EH73F laptop models

A B C D E
1 1
Compal Confidential
2 2
MB Schematic Document
EH50F/EH70F/EH51F/EH5VF/EH53F/EH73F
3
LA-H431P 3
Rev:1.0
2018.01.22
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2019/12/28 Deciphered Date 2019/12/28 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom EH50F M/B LA-H431PR10 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: W ednesday, February 13, 2019 Sheet 1 of 100
A B C D E
A B C D E
RTC circuit Fan Control Thermal sensor

page 20 page 77 page 66
eDP
eDP Panel 4 lane
Conn. page 38
1 260pin DDR4-SO-DIMM 1
page 23
eDPx4 Memory BUS
Dual Channel
HDMI
CoffeeLake H PROCESSOR
1.2V DDR4 2400
HDMI 2.0 4 lane
PEG X16 (0~15) BGA1440
Conn. page 40
8GT/s
(42X28) (CFL-H_6+2) 260pin DDR4-SO-DIMM
<N18E-G1 page 24
witih GDDR6 *6> Processor
DP page 06~13
page 25~37
Display Port 4 lane
Conn. page 39 X4 DMI Offline USB Charger
VBIOS ROM USB3.0

1.8V 8Mbit
page 31 Conn.(M/B)
page 71
USB3.0
2 2
M.2 SSD M.2 SSD Silego USB charger USB3.0 USB Type-C
Conn. Conn. Cannonlake PCH - H SLGC55544 Conn.(M/B) Conn.(M/B)
page 68 page 68
page 71 page 72 page 43
FCBGA(23X23) USB3.0 USB3.0
PCIe x4 PCIe x4
USB Bus
SATA3.0 SATA3.0 Flexible I/O
PCIe x1 PCIe x1 SATAx1 6.0 Gb/s M.2
LAN(GbE) 837pin FCBGA

M.2 WLAN SATA HDD FHD CAM
Killer Ethernet Blue Tooth Touch Screen Finger Print
Dual Band Conn.
page 52 E2500page 51 page 67 page 38 page 52 page 38 page 66
802.11 ac/agn USB2.0 USB2.0 USB2.0 USB2.0
RJ45 HD Audio HDA Codec Speaker

Conn. 3.3V 24MHz ALC255 Conn.
page 51
page 56 page 56
3 3
Head Phone
page 14~21
Jack
Conn.
SPI
SPI ROM MIC Jack

16M ON USB2.0_Audio/B
page 16
Conn.
page 73
LED driver
TLC59116 SMBUS ENE
SUB/B KB9022
page 63 page 58
4 4
USB 2.0_Audio/B
page 73
Touch Pad Security Classification Compal Secret Data Compal Electronics, Inc.
Hall/B page 63 Issued Date 2019/12/28 Deciphered Date 2019/12/28 Title
Block Diagrams
page 66
I2C/PS2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. EH50F M/B LA-H431PR10
Date: Wednesday, February 13, 2019 Sheet 2 of 100
A B C D E
A B C D E
Board ID Table for AD channel Power State

Vcc 3.3V BOM Structure Table SIGNAL
Ra 100K +/- 1% STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Board ID Rb V BID min V BID typ V BID max EC AD BOM Option Table S0 (Full ON) HIGH HIGH HIGH ON ON ON ON
0 0 0.000 V 0.300 V 0x00 - 0x13
Item BOM Structure
1 12K +/- 1% 0.347 V 0.345 V 0.360 V 0x14 - 0x1E S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF
Unpop @
2 15K +/- 1% 0.423 V 0.430 V 0.438 V 0x1F - 0x25 S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
Connector CONN@
1 3 20K +/- 1% 0.541 V 0.550 V 0.559 V 0x26 - 0x30 1
4 27K +/- 1% 0.691 V 0.702 V 0.713 V 0x31 - 0x3A S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
i5 CPU I5@
5 33K +/- 1% 0.807 V 0.819 V 0.831 V 0x3B - 0x45
i7 CPU I7@
6 43K +/- 1% 0.978 V 0.992 V 1.006 V 0x46 - 0x54
PCH PCH@
7 56K +/- 1% 1.169 V 1.185 V 1.200 V 0x55 - 0x64
CMC CMC@ Voltage Rails
8 75K +/- 1% 1.398 V 1.414 V 1.430 V 0x65 - 0x76 Power Plane Description
dGPU circuit VGA@ S0 S3 S4 S5
9 100K +/- 1% 1.634 V 1.650 V 1.667 V 0x77 - 0x87 +RTCVCC RTC Battery Power ON ON ON
VGA GC6 3.0 NFGC6@ ON
10 130K +/- 1% 1.849 V 1.865 V 1.881 V 0x88 - 0x96 +19V_VIN Adapter power supply N/A N/A N/A
VGA GC63.0+FGPC6 FGC6@ N/A
11 160K +/- 1% 2.015 V 2.031 V 2.046 V 0x97 - 0xA4 +12.6V_BATT Battery power supply N/A N/A N/A
Intel CNVi CNVI@ N/A
12 200K +/- 1% 2.185 V 2.200 V 2.215 V 0xA5 - 0xAF +19VB AC or battery power rail for power circuit. N/A N/A N/A
USB charger CHG@ N/A
13 240K +/- 1% 2.316 V 2.329 V 2.343 V 0xB0 - 0xB7 +3VLP +19VB to +3VLP power rail for suspend power
EMI/ESD requirement EMC@ ON ON ON ON
14 270K +/- 1% 2.395 V 2.408 V 2.421 V 0xB8 - 0xBF +5VALW +5V Always power rail
EMI/ESD require reserve XEMC@ ON ON ON ON
15 330K +/- 1% 2.521 V 2.533 V 2.544 V 0xC0 - 0xC9 +3VALW System +3VALW always on power rail ON*
With TPM TPM@ ON ON ON
16 430K +/- 1% 2.667 V 2.677 V 2.687 V 0xCA - 0xD4 +3VALW_DSW +3VALW power for PCH DSW rails
Without TPM NTPM@ ON ON ON ON
17 560K +/- 1% 2.791 V 2.800 V 2.808 V 0xD5 - 0xDD +3VALW_PCH_PRIM +3VALW power for PCH power rails
OVRM with uPI uPI@ ON ON ON ON*
18 750K +/- 1% 2.905 V 2.912 V 2.919 V 0xDE - 0xF0 +3VALW_SPI +3VALW_PRIM supply for the SPI IO
NC OVRM with ON ON@ ON ON ON ON
19 3.000 V 3.000 V 0xF1 - 0xFF +1.05VALW +1.05V Always power rail
With SATA redriver SATARD@ ON ON ON ON
2 Without SATA redriver NORD@ +1.2V_VDDQ DDR4 +1.2V power rail ON ON OFF OFF 2
Thermal sensor TMS@ +1.05V_VCCST Sustain voltage for processor in Standby modes
I2C Address Table With FingerPrint FP@ +5VS System +5V power rail
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
Address(8bit) FingerPrint ESD FPESD@ +3VS System +3V power rail ON OFF OFF OFF
BUS Device Address(7 bit)
Write Read With G-SYNC panel GSYNC@ +1.05VS_VCCSTG +1.05VALW_PRIM Gated version of VCCST ON OFF OFF OFF
I2C_0 (+3VS) Without G-SYNC panel NGSYNC@ +0.6VS_VTT DDR +0.6VS power rail for DDR terminator . ON OFF OFF OFF
I2C_1 (+3VS) TM-P3393-003 (Touch Pad) RF requirement reserve @RF@ +VCC_CORE Core voltage for CPU ON OFF OFF OFF
SA577C-12A0 (Touch Pad) for SW debug board UART@ +VCC_GT Sliced graphics power rail ON OFF OFF OFF
DIMM1 UMA sku UMA@ +VCCIO CPU IO +0.95VS power rail ON OFF OFF OFF
PCH_SMBCLK +VCC_SA System Agent power rail
(+3VS) DIMM2 ON OFF OFF OFF
+1.8VSDGPU_AON +1.8VS power rail for GPU(AON rails) ON OFF OFF OFF
PCH_SML1CLK N18E-G0/G1 (VGA) 0x9E +1.8VSDGPU_MAIN +1.8VS power rail for GPU GC6 ON OFF OFF OFF
EC_SMB_CK2 Thermal Sensor (NCT7718W) 1001_100xb 1001_1001b 1001_1000b +VGA_CORE Core voltage for VGA (merge core & core_s) ON OFF OFF OFF
(+3VALW) PCH 0x90 +1.35VSDGPU +1.35VS power rail for GPU ON OFF OFF OFF
+1.0VSDGPU +1.0VS power rail for GPU ON OFF OFF OFF
HDMI cost 45@ +1.8VALW System +1.8VALW always on power rail ON ON ON ON*
EC_SMB_CK1 ISL88739 (Charger IC) 0x12 VRAM BOM X76@

(+3VLP) BATTERY PACK 0x16
3 3
LED driver 0xC0

EC_SMB_CK3 Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
(+3VALW)
BOARD ID Table
43 level BOM table Board ID PCB Revision Board ID PCB Revision

0 2050 Rev0.1 10
43 Level Description BOM Structure 1 2050 Rev0.2 11
431AH3BOL01 SMT MB AH431 EH50F N18EG1Q 6G QP89 HDMI CHG@/EMC@/CMC@/CNVI@/FGC6@/NGSYNC@/PCH@/NORD@/TMS@/TPM@/UPI@/VGA@/i5@/FP@/FPESD@ 2 2050 Rev0.3 12
3 2050 Rev1.0 13
4 2060 Rev0.1 14
5 2060 Rev0.2 15
6 2060 Rev0.3 16
7 2060 Rev1.0 17
8 18
4
9 19 4

Notes List
A B C D E
5 4 3 2 1
EN:DGPU_PWR_EN
+1.8VSDGPU_AON
DC_IN GPU
+1.8VSDGPU_MAIN
PL101 UG27
PJP101
+19V_VIN
AC CONN.
+12.6V_BATT
+12.6V_BATT+ +1.8VDDA
BATTERY UQ2 +1.8VS RA3 CODEC
PL201,PL202
PJP201
+1.8VALWP
D IMVP8 +1.8VALW
D
PU7105 PJ7107 RH100 +1.8VALW _PRIM PCH

PU1802 +VCC_CORE
+19VB PU8103 PL8101,PL8104,PL8105,PL8106 CPU +2.5VP DIMM1
PU301 PU7102 PJ7103 +2.5V
PU8104 DDR4
DIMM2
PU8105 +1.0VSDGPUP +1.0VSDGPU
EN:VR_ON PU1401 PJ1401
GPU
PU8106 PL8107 +VCC_GT CPU

CHARGER +19VB UQ1 JPQ1 +3VS
EN:DRON UO1 SATA Re-driver
R19 +3VALW_TPM U5
TPM RZ1 G-SENSOR
+3VS_WLAN
UM1 JNGFF1 WLAN CARD (IOAC)
RM1 +3VS_SSD_NGFF JSSD1
PU8301 +VCC_SA +3V_LAN SSD
+19VB
PL8301 CPU UL2 UL2 LAN
EN:DRON R20 +3VS_TPM U5 TPM
UK1 +3V_PTP JTP1
TP +LCDVDD
UX1 JEDP1
+3VALWP +3VALW_PCH_PRIM +3VALW_SPI
PANEL
RH97 RH98 UH2
EN:3V_EN PJ401 +3VALW SPI +3VS_DVDDIO
RA2 +3VS_DVDDIO CODEC
+19VB
PU401 RS1 +3.3V_CC
EC,LID +3VLP +3VS_DVDD
RA4
C
+3VALW_HDA
+3VS_DVDD CODEC C
RH101 PCH
+1.2V_VDDQ_CPU
+1.2VP
+1.2V_VDDQ
JPC1,C2 CPU +3VALW_DSW
EN:SYSON PJ501 +1.2V_VCCPLL_OC
RH99 PCH
RC24 CPU +FP_VCC
+19VB UK2 FP
PU501
EN:SM_PG_CTRL
+0.6VSP
PJ502 +0.6VS_VTT +1.05VALW_PRIM
RH92 PCH
+1.05VALWP +1.05VALW_PCH
RH94 PCH
PU601 +1.05VALW
+19VB
PJ601 RH102
EN:+3VALW RH103
PCH
RH105
RH93 +1.05VALW _VCCMPHY PCH

+0.95VS_VCCIOP
PU7201 PJ7201 +VCCIO +1.05V_VCCST

+19VB CPU UQ2
EN:SUSP# CPU
UC4 RQ61 +1.05VS_VCCSTG
B B
US2 +5V_CC
JIO3
USB2.0 Conn/ IOB.
US2
+5VALWP +USB3_VCCC
US11 JTYPEC1
PU402 PJ402 +5VALW Type C Conn.
+19VB
US1 +USB_VCCA USB3.0 Conn.
UQ1
JPQ2 +5VS +VCC_FAN1
RF4 FAN1
+19VB_NVVDD RF7 +VCC_FAN2 FAN2

+19VB GPU
PL1502 PU1501 PL1501 +VGA_CORE +VDDA
PL1503 PU1502 PL1502 JPA1 UA1 CODEC
U4 +5VS_BL JBL1 KB BackLight
RO4 +5VS_HDD JHDD1

EN:1.35VS_DGPU_PG
HDD
+19VB +1.35VSDGPUP GPU +HDMI_5V_OUT
+1.35VSDGPU UY2 JHDMI1
A
PL1301 PJ1302 HDMI A
PJ1303 +TS_PWR
RX7 JEDP1
TS
+19VB → +19V_CPU
LX1 +INVPWR_B+
PANEL
Security Classification
2019/12/28
Compal Secret Data
2019/12/28 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
Power Map
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
5 4 3 2 1
A B C D E
EH50F_EVT Power Sequence

BIOS : 0.02T3
AC mode
Power On S3 S3 Resume Power Off
Plug in
+3VLP
1 +3VLP 1
EC_ON
EC_ON →
330.8ms
+5VALW
+5VALW →
2.64ms
ON/OFFBTN#
ON/OFFBTN#
+3VALW →
92.2ms →
9.235s +3VALW
+1.8VALW →
105.1ms →
9.235s +1.8VALW
→
+1.05ALW 106.3ms →
9.235s +1.05ALW
EC_RSMRST# →
20ms →
8.782S EC_RSMRST#
PBTN_OUT# →
1.8ms →
8.782S PBTN_OUT#
→ ← →
129.6ms
←
21.1ms
→
18.96ms → 146us PM_SLP_S4#
PM_SLP_S4#
→
26us PM_SLP_S3#
PM_SLP_S3#
2 2
→ 1.494ms → 154us SYSON

SYSON
→
586.5us → 457us +1.05V_VCCST
+1.05V_VCCST
→
978.5us → 1.897ms +1.2V_VDDQ
+1.2V_VDDQ
→
2.058ms → 10.46ms +2.5V
+2.5V
→
11.84ms → 16.6us →
32.22ms → 17.6us SUSP
SUSP#
→ 11us → 203.5us → 9us → 223.6us +1.05VS_VCCSTG
+1.05VS_VCCSTG
→ 395us → 2.07ms → 475us → 2.268ms +VCCIO
+VCCIO
→ 2.299ms → 489us → 2.305ms → 235us +5VS
+5VS
→ 1.459ms → 889us → 1.495ms → 865us +3VS
+3VS
→ 749us → 5.589ms → 765us → 5.995ms +1.8VS
+1.8VS
→ 20.55ms ← -6.1us → 20.71ms ← -7us EC_VCCST_PG
EC_VCCST_PG
→ 9us ← -6.1us → 12.8us ← -7us SM_PG_CTRL
SM_PG_CTRL
3 3
→ 9us → 5.25ms → 6.8us → 1.73ms +0.6VS_VTT
+0.6VS_VTT
→ 21.99ms → 7.65us → 20.23ms → 8.65us VR_ON
VR_ON
→
2.146ms → 476.6us → 2.066ms → 458.6us +VCC_SA
+VCC_SA
→
9.75ms → 49.65us → 10.07ms → 52.65us PCH_PWROK
PCH_PWROK
→
140.7ms → 67.5us → 142.1ms → 63.5us SYS_PWROK
SYS_PWROK
→
1.1ms ← -283us → 55.9ms ← -281us PLT_RST#
PLT_RST#
→
145.1ms → 1.492ms → 202.3ms → 1.492ms +VCC_CORE
+VCC_CORE
→
708.8ms ← -547.3ms → 553.8ms ← -6.353s +VCC_GT
+VCC_GT
4 4

Power Sequence
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
A B C D E
A B C D E
1 1
CFL-H
UC1D
K36 D29 EDP_TXP0

DDI1_TXP_0 EDP_TXP_0 EDP_TXN0 EDP_TXP0 <38>
K37 E29
DDI1_TXN_0 EDP_TXN_0 EDP_TXP1 EDP_TXN0 <38>
2 J35 F28 2
J34 E28
DDI1_TXN_1 EDP_TXN_1 EDP_TXP2 EDP_TXN1 <38>
H37 A29
EDP_TXP2 <38>
H36 DDI1_TXP_2
DDI1_TXN_2
EDP_TXP_2
EDP_TXN_2
B29 EDP_TXN2
EDP_TXP3 EDP_TXN2 <38>
eDP
J37 C28
J38 B28
DDI1_TXN_3 EDP_TXN_3 EDP_TXN3 <38>
D27 C26 EDP_AUXP
DDI1_AUXP EDP_AUXP EDP_AUXN EDP_AUXP <38>
E27 B26 EDP_AUXN <38>
DDI1_AUXN EDP_AUXN
H34
H33 DDI2_TXP_0
F37 DDI2_TXN_0 A33 +VCCIO
G38 DDI2_TXP_1 EDP_DISP_UTIL
F34 DDI2_TXN_1
F35 DDI2_TXP_2 D37 DP_RCOMP RC1 1 2 24.9_0402_1%
E37 DDI2_TXN_2 DISP_RCOMP
E36 DDI2_TXP_3 Trace Width/Space: 15 mil/ 20 mil
DDI2_TXN_3 Max Trace Length: 600 mil
F26
DDI2_AUXP
Coffee Lake-H CPU SKU E26
DDI2_AUXN
C34
D34 DDI3_TXP_0
UC1 DDI3_TXN_0
UC1 B36
B34 DDI3_TXP_1
F33 DDI3_TXN_1
E33 DDI3_TXP_2
3 C33 DDI3_TXN_2 3
B33 DDI3_TXP_3
CFL-H_BGA1440 DDI3_TXN_3 G27 CPU_DISPA_BCLK_R
CFL-H_BGA1440 PROC_AUDIO_CLK CPU_DISPA_SDO_R CPU_DISPA_BCLK_R <18>
S IC CL8068403373522 SR3Z0 U0 2.3G ABO! A27 G25 CPU_DISPA_SDO_R <18>
S IC CL8068403359524 SR3YY U0 2.2G ABO! DDI3_AUXP PROC_AUDIO_SDI CPU_DISPA_SDI CPU_DISPA_SDI_R
SA0000BPJ40 B27 G29 RC2 2 1 20_0402_5%
SA0000BPZ40 DDI3_AUXN 4 ofPROC_AUDIO_SDO
13 CPU_DISPA_SDI_R <18>
i5@
i7@ follow CRB
CFL-H_BGA1440
RC2 close to CPU
Cannon Lake PCH SKU
UH1
CFL-H_BGA1440
S IC FH82HM370 SR40B B0 BGA 874P PCH-H ABO!
SA0000BVP10
PCH@
NV N18E-G1
4
UG9 4
VGA@
S IC N18E-G1-KD-A1 QS FCBGA 2228 GPU Compal Secret Data

SA0000CFC00
2019/12/28 2019/12/28 Title
CFL-H(1/8)DDI/eDP
A B C D E
A B C D E
CHANNEL-A
Interleaved Memory
UC1A
CFL-H
DDR CHANNEL A
1 <23> DDR_A_D[0..63] 1
DDR4(IL)/LP3-DDR4(NIL) LP3/DDR4
DDR_A_D0 BR6 AG1 DDR_A_CLK0
DDR_A_D1 DDR0_DQ_0/DDR0_DQ_0 DDR0_CKP_0/DDR0_CKP_0 DDR_A_CLK#0 DDR_A_CLK0 <23>
BT6 AG2 DDR_A_CLK#0 <23>
DDR_A_D2 BP3 DDR0_DQ_1/DDR0_DQ_1 DDR0_CKN_0/DDR0_CKN_0 AK2 DDR_A_CLK1
DDR_A_D3 DDR0_DQ_2/DDR0_DQ_2 DDR0_CKP_1/DDR0_CKP_1 DDR_A_CLK#1 DDR_A_CLK1 <23>
BR3 AK1 DDR_A_CLK#1 <23>
DDR_A_D4 BN5 DDR0_DQ_3/DDR0_DQ_3 DDR0_CKN_1/DDR0_CKN_1 AL3
DDR_A_D5 BP6 DDR0_DQ_4/DDR0_DQ_4 NC/DDR0_CKP_2 AK3
DDR_A_D6 BP2 DDR0_DQ_5/DDR0_DQ_5 NC/DDR0_CKN_2 AL2
DDR_A_D7 BN3 DDR0_DQ_6/DDR0_DQ_6 NC/DDR0_CKP_3 AL1
DDR_A_D8 BL4 DDR0_DQ_7/DDR0_DQ_7 NC/DDR0_CKN_3
DDR_A_D9 BL5 DDR0_DQ_8/DDR0_DQ_8 AT1 DDR_A_CKE0
DDR_A_D10 DDR0_DQ_9/DDR0_DQ_9 DDR0_CKE_0/DDR0_CKE_0 DDR_A_CKE1 DDR_A_CKE0 <23>
BL2 AT2 DDR_A_CKE1 <23>
DDR_A_D11 BM1 DDR0_DQ_10/DDR0_DQ_10 DDR0_CKE_1/DDR0_CKE_1 AT3
DDR_A_D12 BK4 DDR0_DQ_11/DDR0_DQ_11 DDR0_CKE_2/DDR0_CKE_2 AT5
DDR_A_D13 BK5 DDR0_DQ_12/DDR0_DQ_12 DDR0_CKE_3/DDR0_CKE_3
DDR_A_D14 BK1 DDR0_DQ_13/DDR0_DQ_13 AD5 DDR_A_CS#0
DDR_A_D15 DDR0_DQ_14/DDR0_DQ_14 DDR0_CS#_0/DDR0_CS#_0 DDR_A_CS#1 DDR_A_CS#0 <23>
BK2 AE2 DDR_A_CS#1 <23>
DDR_A_D16 BG4 DDR0_DQ_15/DDR0_DQ_15 DDR0_CS#_1/DDR0_CS#_1 AD2
DDR_A_D17 BG5 DDR0_DQ_16/DDR0_DQ_32 NC/DDR0_CS#_2 AE5
DDR_A_D18 BF4 DDR0_DQ_17/DDR0_DQ_33 NC/DDR0_CS#_3
DDR_A_D19 BF5 DDR0_DQ_18/DDR0_DQ_34 AD3 DDR_A_ODT0
DDR_A_D20 DDR0_DQ_19/DDR0_DQ_35 DDR0_ODT_0/DDR0_ODT_0 DDR_A_ODT1 DDR_A_ODT0 <23>
BG2 AE4 DDR_A_ODT1 <23>
DDR_A_D21 BG1 DDR0_DQ_20/DDR0_DQ_36 NC/DDR0_ODT_1 AE1
DDR_A_D22 BF1 DDR0_DQ_21/DDR0_DQ_37 NC/DDR0_ODT_2 AD4
DDR_A_D23 BF2 DDR0_DQ_22/DDR0_DQ_38 NC/DDR0_ODT_3
DDR_A_D24 BD2 DDR0_DQ_23/DDR0_DQ_39 AH5 DDR_A_BA0
DDR_A_D25 DDR0_DQ_24/DDR0_DQ_40 DDR0_CAB_4/DDR0_BA_0 DDR_A_BA1 DDR_A_BA0 <23>
BD1 AH1 DDR_A_BA1 <23>
DDR_A_D26 BC4 DDR0_DQ_25/DDR0_DQ_41 DDR0_CAB_6/DDR0_BA_1 AU1 DDR_A_BG0
DDR_A_D27 DDR0_DQ_26/DDR0_DQ_42 DDR0_CAA_5/DDR0_BG_0 DDR_A_BG0 <23>
2 BC5 2
DDR_A_D28 BD5 DDR0_DQ_27/DDR0_DQ_43 AH4 DDR_A_MA16_RAS#
DDR_A_D29 DDR0_DQ_28/DDR0_DQ_44 DDR0_CAB_3/DDR0_MA_16 DDR_A_MA14_W E# DDR_A_MA16_RAS# <23>
BD4 AG4 DDR_A_MA14_W E# <23>
DDR_A_D30 BC1 DDR0_DQ_29/DDR0_DQ_45 DDR0_CAB_2/DDR0_MA_14 AD1 DDR_A_MA15_CAS#
DDR_A_D31 DDR0_DQ_30/DDR0_DQ_46 DDR0_CAB_1/DDR0_MA_15 DDR_A_MA15_CAS# <23>
BC2
DDR_A_D32 AB1 DDR0_DQ_31/DDR0_DQ_47 AH3 DDR_A_MA0
DDR_A_D33 DDR0_DQ_32/DDR1_DQ_0 DDR0_CAB_9/DDR0_MA_0 DDR_A_MA1 DDR_A_MA0 <23>
AB2 AP4 DDR_A_MA1 <23>
DDR_A_D34 AA4 DDR0_DQ_33/DDR1_DQ_1 DDR0_CAB_8/DDR0_MA_1 AN4 DDR_A_MA2
AA5 AP5 DDR_A_MA3 <23>
DDR_A_D36 AB5 DDR0_DQ_35/DDR1_DQ_3 NC/DDR0_MA_3 AP2 DDR_A_MA4
DDR_A_D37 DDR0_DQ_36/DDR1_DQ_4 NC/DDR0_MA_4 DDR_A_MA5 DDR_A_MA4 <23>
AB4 AP1 DDR_A_MA5 <23>
DDR_A_D38 AA2 DDR0_DQ_37/DDR1_DQ_5 DDR0_CAA_0/DDR0_MA_5 AP3 DDR_A_MA6
DDR_A_D39 DDR0_DQ_38/DDR1_DQ_6 DDR0_CAA_2/DDR0_MA_6 DDR_A_MA7 DDR_A_MA6 <23>
AA1 AN1 DDR_A_MA7 <23>
DDR_A_D40 V5 DDR0_DQ_39/DDR1_DQ_7 DDR0_CAA_4/DDR0_MA_7 AN3 DDR_A_MA8
V2 AT4 DDR_A_MA9 <23>
DDR_A_D42 U1 DDR0_DQ_41/DDR1_DQ_9 DDR0_CAA_1/DDR0_MA_9 AH2 DDR_A_MA10
U2 AN2 DDR_A_MA11 <23>
DDR_A_D44 V1 DDR0_DQ_43/DDR1_DQ_11 DDR0_CAA_7/DDR0_MA_11 AU4 DDR_A_MA12
V4 AE3 DDR_A_MA13 <23>
DDR_A_D46 U5 DDR0_DQ_45/DDR1_DQ_13 DDR0_CAB_0/DDR0_MA_13 AU2 DDR_A_BG1
DDR_A_D47 DDR0_DQ_46/DDR1_DQ_14 DDR0_CAA_9/DDR0_BG_1 DDR_A_ACT# DDR_A_BG1 <23>
U4 AU3 DDR_A_ACT# <23>
DDR_A_D48 R2 DDR0_DQ_47/DDR1_DQ_15 DDR0_CAA_8/DDR0_ACT#
DDR_A_D49 P5 DDR0_DQ_48/DDR1_DQ_32 AG3 DDR_A_PAR
DDR_A_D50 DDR0_DQ_49/DDR1_DQ_33 NC/DDR0_PAR DDR_A_ALERT# DDR_A_PAR <23>
R4 AU5 DDR_A_ALERT# <23>
DDR_A_D51 P4 DDR0_DQ_50/DDR1_DQ_34 NC/DDR0_ALERT#
DDR_A_D52 R5 DDR0_DQ_51/DDR1_DQ_35 DDR4(IL)/LP3-DDR4(NIL)
DDR_A_D53 P2 DDR0_DQ_52/DDR1_DQ_36 BR5 DDR_A_DQS#0
DDR_A_D54 DDR0_DQ_53/DDR1_DQ_37DDR0_DQSN_0/DDR0_DQSN_0 DDR_A_DQS#1 DDR_A_DQS#0 <23>
R1 BL3 DDR_A_DQS#1 <23>
DDR_A_D55 P1 DDR0_DQ_54/DDR1_DQ_38DDR0_DQSN_1/DDR0_DQSN_1 BG3 DDR_A_DQS#2
3 DDR_A_D56 DDR0_DQ_55/DDR1_DQ_39DDR0_DQSN_2/DDR0_DQSN_4 DDR_A_DQS#3 DDR_A_DQS#2 <23> 3
M4 BD3 DDR_A_DQS#3 <23>
DDR_A_D57 M1 DDR0_DQ_56/DDR1_DQ_40DDR0_DQSN_3/DDR0_DQSN_5 AA3 DDR_A_DQS#4
L4 U3 DDR_A_DQS#5 <23>
DDR_A_D59 L2 DDR0_DQ_58/DDR1_DQ_42DDR0_DQSN_5/DDR1_DQSN_1 P3 DDR_A_DQS#6
M5 L3 DDR_A_DQS#7 <23>
DDR_A_D61 M2 DDR0_DQ_60/DDR1_DQ_44DDR0_DQSN_7/DDR1_DQSN_5
DDR_A_D62 L5 DDR0_DQ_61/DDR1_DQ_45 BP5 DDR_A_DQS0
DDR_A_D63 DDR0_DQ_62/DDR1_DQ_46DDR0_DQSP_0/DDR0_DQSP_0 DDR_A_DQS1 DDR_A_DQS0 <23>
L1 BK3 DDR_A_DQS1 <23>
DDR0_DQ_63/DDR1_DQ_47DDR0_DQSP_1/DDR0_DQSP_1 BF3 DDR_A_DQS2
DDR0_DQSP_2/DDR0_DQSP_4 DDR_A_DQS3 DDR_A_DQS2 <23>
LP3/DDR4 BC3 DDR_A_DQS3 <23>
BA2 DDR0_DQSP_3/DDR0_DQSP_5 AB3 DDR_A_DQS4
NC/DDR0_ECC_0 DDR0_DQSP_4/DDR1_DQSP_0 DDR_A_DQS5 DDR_A_DQS4 <23>
BA1 V3 DDR_A_DQS5 <23>
AY4 NC/DDR0_ECC_1 DDR0_DQSP_5/DDR1_DQSP_1 R3 DDR_A_DQS6
NC/DDR0_ECC_2 DDR0_DQSP_6/DDR1_DQSP_4 DDR_A_DQS7 DDR_A_DQS6 <23>
AY5 M3 DDR_A_DQS7 <23>
BA5 NC/DDR0_ECC_3 DDR0_DQSP_7/DDR1_DQSP_5
BA4 NC/DDR0_ECC_4 AY3
AY1 NC/DDR0_ECC_5 DDR0_DQSP_8/DDR0_DQSP_8 BA3 For ECC DIMM
AY2 NC/DDR0_ECC_6 DDR0_DQSN_8/DDR0_DQSN_8
1 OF 13
For ECC DIMM NC/DDR0_ECC_7
CFL-H_BGA1440
4 4

CFL-H(2/8)DIMMA
A B C D E
A B C D E
CHANNEL-B
Interleaved Memory
UC1B
CFL-H
<24> DDR_B_D[0..63] DDR CHANNEL B

1 1
DDR4(IL)/LP3-DDR4(NIL) LP3/DDR4
DDR_B_D0 BT11 AM9 DDR_B_CLK0
DDR_B_D1 DDR1_DQ_0/DDR0_DQ_16 DDR1_CKP_0/DDR1_CKP_0 DDR_B_CLK#0 DDR_B_CLK0 <24>
BR11 AN9 DDR_B_CLK#0 <24>
DDR_B_D2 BT9 DDR1_DQ_1/DDR0_DQ_17 DDR1_CKN_0/DDR1_CKN_0 AM7 DDR_B_CLK1
DDR_B_D3 DDR1_DQ_2/DDR0_DQ_18 DDR1_CKP_1/DDR1_CKP_1 DDR_B_CLK#1 DDR_B_CLK1 <24>
BR8 AM8 DDR_B_CLK#1 <24>
DDR_B_D4 BP11 DDR1_DQ_3/DDR0_DQ_19 DDR1_CKN_1/DDR1_CKN_1 AM11
DDR_B_D5 BN11 DDR1_DQ_4/DDR0_DQ_20 NC/DDR1_CKP_2 AM10
DDR_B_D6 BP8 DDR1_DQ_5/DDR0_DQ_21 NC/DDR1_CKN_2 AJ10
DDR_B_D7 BN8 DDR1_DQ_6/DDR0_DQ_22 NC/DDR1_CKP_3 AJ11
DDR_B_D8 BL12 DDR1_DQ_7/DDR0_DQ_23 NC/DDR1_CKN_3
DDR_B_D9 BL11 DDR1_DQ_8/DDR0_DQ_24 AT8 DDR_B_CKE0
DDR_B_D10 DDR1_DQ_9/DDR0_DQ_25 DDR1_CKE_0/DDR1_CKE_0 DDR_B_CKE1 DDR_B_CKE0 <24>
BL8 AT10 DDR_B_CKE1 <24>
DDR_B_D11 BJ8 DDR1_DQ_10/DDR0_DQ_26 DDR1_CKE_1/DDR1_CKE_1 AT7
DDR_B_D12 BJ11 DDR1_DQ_11/DDR0_DQ_27 DDR1_CKE_2/DDR1_CKE_2 AT11
DDR_B_D13 BJ10 DDR1_DQ_12/DDR0_DQ_28 DDR1_CKE_3/DDR1_CKE_3
DDR_B_D14 BL7 DDR1_DQ_13/DDR0_DQ_29 AF11 DDR_B_CS#0
DDR_B_D15 DDR1_DQ_14/DDR0_DQ_30 DDR1_CS#_0/DDR1_CS#_0 DDR_B_CS#1 DDR_B_CS#0 <24>
BJ7 AE7 DDR_B_CS#1 <24>
DDR_B_D16 BG11 DDR1_DQ_15/DDR0_DQ_31 DDR1_CS#_1/DDR1_CS#_1 AF10
DDR_B_D17 BG10 DDR1_DQ_16/DDR0_DQ_48 NC/DDR1_CS#_2 AE10
DDR_B_D18 BG8 DDR1_DQ_17/DDR0_DQ_49 NC/DDR1_CS#_3
DDR_B_D19 BF8 DDR1_DQ_18/DDR0_DQ_50 AF7 DDR_B_ODT0
DDR_B_D20 DDR1_DQ_19/DDR0_DQ_51 DDR1_ODT_0/DDR1_ODT_0 DDR_B_ODT1 DDR_B_ODT0 <24>
BF11 AE8 DDR_B_ODT1 <24>
DDR_B_D21 BF10 DDR1_DQ_20/DDR0_DQ_52 NC/DDR1_ODT_1 AE9
DDR_B_D22 BG7 DDR1_DQ_21/DDR0_DQ_53 NC/DDR1_ODT_2 AE11
DDR_B_D23 BF7 DDR1_DQ_22/DDR0_DQ_54 NC/DDR1_ODT_3
DDR_B_D24 BB11 DDR1_DQ_23/DDR0_DQ_55 AH10 DDR_B_MA16_RAS#
DDR_B_D25 DDR1_DQ_24/DDR0_DQ_56 DDR1_CAB_3/DDR1_MA_16 DDR_B_MA14_W E# DDR_B_MA16_RAS# <24>
BC11 AH11 DDR_B_MA14_W E# <24>
DDR_B_D26 BB8 DDR1_DQ_25/DDR0_DQ_57 DDR1_CAB_2/DDR1_MA_14 AF8 DDR_B_MA15_CAS#
DDR_B_D27 DDR1_DQ_26/DDR0_DQ_58 DDR1_CAB_1/DDR1_MA_15 DDR_B_MA15_CAS# <24>
2 BC8 2
DDR_B_D28 BC10 DDR1_DQ_27/DDR0_DQ_59 AH8 DDR_B_BA0
DDR_B_D29 DDR1_DQ_28/DDR0_DQ_60 DDR1_CAB_4/DDR1_BA_0 DDR_B_BA1 DDR_B_BA0 <24>
BB10 AH9 DDR_B_BA1 <24>
DDR_B_D30 BC7 DDR1_DQ_29/DDR0_DQ_61 DDR1_CAB_6/DDR1_BA_1 AR9 DDR_B_BG0
DDR_B_D31 DDR1_DQ_30/DDR0_DQ_62 DDR1_CAA_5/DDR1_BG_0 DDR_B_BG0 <24>
BB7
DDR_B_D32 AA11 DDR1_DQ_31/DDR0_DQ_63 AJ9 DDR_B_MA0
DDR_B_D33 DDR1_DQ_32/DDR1_DQ_16 DDR1_CAB_9/DDR1_MA_0 DDR_B_MA1 DDR_B_MA0 <24>
AA10 AK6 DDR_B_MA1 <24>
DDR_B_D34 AC11 DDR1_DQ_33/DDR1_DQ_17 DDR1_CAB_8/DDR1_MA_1 AK5 DDR_B_MA2
AC10 AL5 DDR_B_MA3 <24>
DDR_B_D36 AA7 DDR1_DQ_35/DDR1_DQ_19 NC/DDR1_MA_3 AL6 DDR_B_MA4
DDR_B_D37 DDR1_DQ_36/DDR1_DQ_20 NC/DDR1_MA_4 DDR_B_MA5 DDR_B_MA4 <24>
AA8 AM6 DDR_B_MA5 <24>
DDR_B_D38 AC8 DDR1_DQ_37/DDR1_DQ_21 DDR1_CAA_0/DDR1_MA_5 AN7 DDR_B_MA6
DDR_B_D39 DDR1_DQ_38/DDR1_DQ_22 DDR1_CAA_2/DDR1_MA_6 DDR_B_MA7 DDR_B_MA6 <24>
AC7 AN10 DDR_B_MA7 <24>
DDR1_DQ_39/DDR1_DQ_23 DDR1_CAA_4/DDR1_MA_7
DDR_B_D40 W8 DDR4(IL)/LP3-DDR4(NIL) AN8 DDR_B_MA8
W7 AR11 DDR_B_MA9 <24>
DDR_B_D42 V10 DDR1_DQ_41/DDR1_DQ_25 DDR1_CAA_1/DDR1_MA_9 AH7 DDR_B_MA10
V11 AN11 DDR_B_MA11 <24>
DDR_B_D44 W11 DDR1_DQ_43/DDR1_DQ_27 DDR1_CAA_7/DDR1_MA_11 AR10 DDR_B_MA12
W10 AF9 DDR_B_MA13 <24>
DDR_B_D46 V7 DDR1_DQ_45/DDR1_DQ_29 DDR1_CAB_0/DDR1_MA_13 AR7 DDR_B_BG1
DDR_B_D47 DDR1_DQ_46/DDR1_DQ_30 DDR1_CAA_9/DDR1_BG_1 DDR_B_ACT# DDR_B_BG1 <24>
V8 AT9 DDR_B_ACT# <24>
DDR_B_D48 R11 DDR1_DQ_47/DDR1_DQ_31 DDR1_CAA_8/DDR1_ACT#
DDR_B_D49 P11 DDR1_DQ_48/DDR1_DQ_48 AJ7 DDR_B_PAR
DDR_B_D50 DDR1_DQ_49/DDR1_DQ_49 NC/DDR1_PAR DDR_B_ALERT# DDR_B_PAR <24>
P7 AR8 DDR_B_ALERT# <24>
DDR_B_D51 R8 DDR1_DQ_50/DDR1_DQ_50 NC/DDR1_ALERT#
DDR_B_D52 R10 DDR1_DQ_51/DDR1_DQ_51 DDR4(IL)/LP3-DDR4(NIL)
DDR_B_D53 P10 DDR1_DQ_52/DDR1_DQ_52 BN9 DDR_B_DQS#0
DDR_B_D54 DDR1_DQ_53/DDR1_DQ_53DDR1_DQSN_0/DDR0_DQSN_2 DDR_B_DQS#1 DDR_B_DQS#0 <24>
R7 BL9 DDR_B_DQS#1 <24>
3 DDR_B_D55 P8 DDR1_DQ_54/DDR1_DQ_54DDR1_DQSN_1/DDR0_DQSN_3 BG9 DDR_B_DQS#2 3
L11 BC9 DDR_B_DQS#3 <24>
DDR_B_D57 M11 DDR1_DQ_56/DDR1_DQ_56DDR1_DQSN_3/DDR0_DQSN_7 AC9 DDR_B_DQS#4
L7 W9 DDR_B_DQS#5 <24>
DDR_B_D59 M8 DDR1_DQ_58/DDR1_DQ_58DDR1_DQSN_5/DDR1_DQSN_3 R9 DDR_B_DQS#6
L10 M9 DDR_B_DQS#7 <24>
DDR_B_D61 M10 DDR1_DQ_60/DDR1_DQ_60DDR1_DQSN_7/DDR1_DQSN_7
DDR_B_D62 M7 DDR1_DQ_61/DDR1_DQ_61 BP9 DDR_B_DQS0
DDR_B_D63 DDR1_DQ_62/DDR1_DQ_62DDR1_DQSP_0/DDR0_DQSP_2 DDR_B_DQS1 DDR_B_DQS0 <24>
L8 BJ9 DDR_B_DQS1 <24>
DDR1_DQ_63/DDR1_DQ_63DDR1_DQSP_1/DDR0_DQSP_3 BF9 DDR_B_DQS2
DDR1_DQSP_2/DDR0_DQSP_6 DDR_B_DQS3 DDR_B_DQS2 <24>
AW11 LP3/DDR4 BB9 DDR_B_DQS3 <24>
AY11 NC/DDR1_ECC_0 DDR1_DQSP_3/DDR0_DQSP_7 AA9 DDR_B_DQS4
NC/DDR1_ECC_1 DDR1_DQSP_4/DDR1_DQSP_2 DDR_B_DQS5 DDR_B_DQS4 <24>
AY8 V9 DDR_B_DQS5 <24>
AW8 NC/DDR1_ECC_2 DDR1_DQSP_5/DDR1_DQSP_3 P9 DDR_B_DQS6
NC/DDR1_ECC_3 DDR1_DQSP_6/DDR1_DQSP_6 DDR_B_DQS7 DDR_B_DQS6 <24>
AY10 L9 DDR_B_DQS7 <24>
AW10 NC/DDR1_ECC_4 DDR1_DQSP_7/DDR1_DQSP_7
AY7 NC/DDR1_ECC_5 AW9
AW7 NC/DDR1_ECC_6 DDR1_DQSP_8/DDR1_DQSP_8 AY9 For ECC DIMM
For ECC DIMM NC/DDR1_ECC_7 DDR1_DQSN_8/DDR1_DQSN_8
RC3 1 2 121_0402_1% SM_RCOMP0 G1 BN13 +0.6V_VREFCA

+0.6V_VREFCA
RC4 1 2 75_0402_1% SM_RCOMP1 H1 DDR_RCOMP_0 DDR_VREF_CA BP13
RC5 1 2 100_0402_1% SM_RCOMP2 J2 DDR_RCOMP_1 2 OF 13 DDR0_VREF_DQ BR13 +0.6V_B_VREFDQ
DDR_RCOMP_2 DDR1_VREF_DQ +0.6V_B_VREFDQ
Trace Width/Space: 15 mil/ 25 mil CFL-H_BGA1440
Max Trace Length: 500 mil
4 4

CFL-H(3/8)DIMMB
A B C D E
A B C D E
PEG&DMI
To DGPU
1 To DGPU PEG Lane Reversed
1
PEG Lane Reversed CFL-H

UC1C
CC1 VGA@ 1 2 0.22U_0201_6.3V6M PEG_CRX_GTX_P15 E25 B25 PEG_CTX_GRX_P15 0.22U_0201_6.3V6M 2 1VGA@ CC2
<25> PEG_CRX_C_GTX_P15 PEG_CRX_GTX_N15 PEG_RXP_0 PEG_TXP_0 PEG_CTX_GRX_N15 PEG_CTX_C_GRX_P15 <25>
<25> PEG_CRX_C_GTX_N15 CC3 VGA@ 1 2 0.22U_0201_6.3V6M D25 A25 0.22U_0201_6.3V6M 2 1VGA@ CC4
PEG_RXN_0 PEG_TXN_0 PEG_CTX_C_GRX_N15 <25>
<25> PEG_CRX_C_GTX_N14 CC6 VGA@ 1 2 0.22U_0201_6.3V6M F24 C24 0.22U_0201_6.3V6M 2 1VGA@ CC12
CC33 VGA@ 1 2 0.22U_0201_6.3V6M PEG_CRX_GTX_P7 D17 A17 PEG_CTX_GRX_P7 0.22U_0201_6.3V6M 2 1VGA@ CC34
2
<25> PEG_CRX_C_GTX_N7 CC35 VGA@ 1 2 0.22U_0201_6.3V6M E17 B17 0.22U_0201_6.3V6M 2 1VGA@ CC36 2
CC37 VGA@ 1 2 0.22U_0201_6.3V6M PEG_CRX_GTX_P6 F16 C16 PEG_CTX_GRX_P6 0.22U_0201_6.3V6M 2 1VGA@ CC38
<25> PEG_CRX_C_GTX_N6 CC39 VGA@ 1 2 0.22U_0201_6.3V6M E16 B16 0.22U_0201_6.3V6M 2 1VGA@ CC40
+VCCIO
RC6 1 2 24.9_0402_1% PEG_RCOMP G2
PEG_RCOMP
Trace Width/Space: 15 mil/ 15 mil
Max Trace Length: 600 mil
3 DMI_CRX_PTX_P0 D8 B8 DMI_CTX_PRX_P0 3
<14> DMI_CRX_PTX_P0 DMI_CRX_PTX_N0 DMI_RXP_0 DMI_TXP_0 DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 <14>
<14> DMI_CRX_PTX_N0 E8 A8 DMI_CTX_PRX_N0 <14>
DMI_RXN_0 DMI_TXN_0
DMI_CRX_PTX_P1 E6 C6 DMI_CTX_PRX_P1
<14> DMI_CRX_PTX_N1 F6 B6 DMI_CTX_PRX_N1 <14>
DMI_RXN_1 DMI_TXN_1
To PCH DMI_CRX_PTX_P2 D5 B5 DMI_CTX_PRX_P2 To PCH
<14> DMI_CRX_PTX_N2 E5 A5 DMI_CTX_PRX_N2 <14>
DMI_RXN_2 DMI_TXN_2
DMI_CRX_PTX_P3 J8 D4 DMI_CTX_PRX_P3
<14> DMI_CRX_PTX_P3 DMI_CRX_PTX_N3 DMI_RXP_3 3 OF 13 DMI_TXP_3 DMI_CTX_PRX_N3 DMI_CTX_PRX_P3 <14>
<14> DMI_CRX_PTX_N3 J9 B4 DMI_CTX_PRX_N3 <14>
DMI_RXN_3 DMI_TXN_3
CFL-H_BGA1440
4 4

CFL-H(4/8)PEG/DMI
A B C D E
A B C D E
CFL-H
UC1E
PCH_CPU_BCLK_P B31 BN25 CFG0 CFG0 RC7 1 @ 2 1K_0402_5%

<15> PCH_CPU_BCLK_P PCH_CPU_BCLK_N BCLKP CFG_0
<15> PCH_CPU_BCLK_N A32 BN27 CFG2 RC8 1 2 1K_0402_5%
BCLKN CFG_1 BN26 CFG2 CFG4 RC9 1 2 1K_0402_5%
PCH_CPU_PCIBCLK_P D35 CFG_2 BN28 CFG3 CFG5 RC10 1 @ 2 1K_0402_5%
<15> PCH_CPU_PCIBCLK_P PCI_BCLKP CFG_3 TC22 TP@
PCH_CPU_PCIBCLK_N C36 BR20 CFG4 CFG6 RC11 1 @ 2 1K_0402_5%
<15> PCH_CPU_PCIBCLK_N PCI_BCLKN CFG_4 BM20 CFG5 CFG7 RC12 1 @ 2 1K_0402_5%
PCH_CPU_24M_CLK_P E31 CFG_5 BT20 CFG6
<15> PCH_CPU_24M_CLK_P PCH_CPU_24M_CLK_N CLK24P CFG_6
571391_CFL_H_PDG_Rev0p5 <15> PCH_CPU_24M_CLK_N D31 BP20 CFG7
CLK24N CFG_7 BR23
1. The total Length of Data and Clock (from CPU to each VR) must be equal (± 0.1 inch).
2. Route the Alert signal between the Clock and the Data signals. CFG_8 BR22
1 1
3. Place those resistors close CPU side. CFG_9 BT23 The CFG signals have a default value of '1' if not terminated on the board.
CFG_10 BT22 CFG[0]: Stall reset sequence after PCU PLL lock until de-asserted
CFG_11 BM19 * 1 = (Default) Normal Operation;
CFG_12 BR19 0 = Stall.
Sensitive CFG_13 BP19 CFG[2]: PCI Express* Static x16 Lane Numbering Reversal.
CPU_SVID_ALERT# BH31 CFG_14 BT19 1 = Normal operation
CPU_SVID_CLK BH32 VIDALERT# CFG_15 * 0 = Lane numbers reversed.
<89> CPU_SVID_CLK CPU_SVID_DAT VIDSCK CFG[4]: eDP enable:
BH29 BN23
H_PROCHOT#_R BR30 VIDSOUT CFG_17 BP23 1 = Disabled.
PROCHOT# CFG_16 BP22 * 0 = Enabled.
DDR_PG_CTRL BT13 CFG_19 BN22 CFG[6:5]: PCI Express* Bifurcation:
DDR_VTT_CNTL CFG_18 00 = 1 x8, 2 x4 PCI Express*
01 = reserved
XDP_BPM#0 10 = 2 x8 PCI Express*
BR27 TC1 TP@ 11 = 1 x16 PCI Express*
BPM#_0 BT27 XDP_BPM#1 *
Sensitive BPM#_1 TC2 TP@
BM31 XDP_BPM#2 CFG[7]: PEG Training:
BPM#_2 TC3 TP@
EC_VCCST_PG H13 BT30 XDP_BPM#3 * 1 = (default) PEG Train immediately following RESET# de assertion.
VCCST_PWRGD BPM#_3 TC4 TP@ 0 = PEG Wait for BIOS for training.
H_CPUPW RGD BT31 *CFG Pin Use CMC debug on DDX03 R02 Schematic.
<18> H_CPUPW RGD H_PLTRST_CPU# PROCPWRGD CPU_XDP_TDO
<17> H_PLTRST_CPU# BP35 BT28
H_PM_SYNC_R BM34 RESET# PROC_TDO BL32 CPU_XDP_TDI CPU_XDP_TDO <18>
<17> H_PM_SYNC_R H_PM_DOW N PM_SYNC PROC_TDI CPU_XDP_TMS CPU_XDP_TDI <18>
BP31 BP28
H_PECI PM_DOWN PROC_TMS CPU_XDP_TCK0 CPU_XDP_TMS <18>
BT34 BR28
<17,58> H_PECI PECI PROC_TCK CPU_XDP_TCK0 <18>
RC17 1 @ 2 0_0402_5% H_THERMTRIP# J31 To be confirm
<17> PCH_THERMTRIP#_R THERMTRIP# CPU_XDP_TRST#
BP30
PROC_TRST# XDP_PREQ# CPU_XDP_TRST# <21>
TP@ TC5 SKTOCC# BR33 BL30 TC19 TP@
BN1 SKTOCC# PROC_PREQ# BP27 XDP_PRDY#
PROC_SELECT# PROC_SELECT# PROC_PRDY# TC20 TP@
2
should be unconnected on CFL processor CATERR# BM30 2
TP@ TC6
EDS1.2 8/21 CATERR# BT25 CFG_RCOMP 1 RC18 2 49.9_0402_1% XDP_PREQ#
CFG_RCOMP XDP_PRDY# XDP_PREQ# <21>
AT13
XEMC@ AW13 ZVM# XDP_PRDY# <21>
.1U_0402_16V7K 1 2 CC65 H_CPUPW RGD MSM# Trace Width/Space: 4 mil/ 12 mil
AU13 Max Trace Length: 600 mil
EMC@ AY13 RSVD1
1000P_0402_50V7K 1 2 CC66 H_PROCHOT#_R RSVD2
5 OF 13
XEMC@ +1.05VS_VCCSTG
.1U_0402_16V7K 1 2 CC67 H_THERMTRIP# CFL-H_BGA1440 Place to CPU side
EMC@ RC76 2 CMC@ 1 51_0402_5% CPU_XDP_TMS
1000P_0402_50V7K 1 2 CC68 EC_VCCST_PG
RC77 2 CMC@ 1 51_0402_5% CPU_XDP_TDI
RC78 2 CMC@ 1 51_0402_5% CPU_XDP_TDO

Near CPU side
follow 1050 Request +3VS Place to CPU side
+1.2V_VDDQ
8/21 RC79 2 CMC@ 1 51_0402_5% CPU_XDP_TCK0
1
+1.05V_VCCST
RH1 1 2 1K_0402_5% H_THERMTRIP# RC23 RC81 2 @ 1 51_0402_5% CPU_XDP_TRST#
UC3 CC69 330K_0402_5%
1 5 2 1
NC VCC RC80 2 @ 1 51_0402_5% PCH_JTAG_TCK1
PCH_JTAG_TCK1 <18>
2
DDR_PG_CTRL 2 0.1U_0201_10V6K
A 4 SM_PG_CTRL
Y SM_PG_CTRL <85>
3
3 +1.05VS_VCCSTG GND 3
PU 330K follow CRB
74AUP1G07GW _TSSOP5
8/21 Place to PCH side
1
RC21
1K_0402_5%
SVID
2
RC14 1 2 499_0402_1% H_PROCHOT#_R

<58,83> H_PROCHOT#
+1.05V_VCCST
+1.05V_VCCST
1
RC22
1K_0402_5%
RC19 RC20
56_0402_1% 100_0402_1%
2
RC15 1 2 60.4_0402_1% EC_VCCST_PG

<58,78> EC_VCCST_PG_R
RC16 1 2 20_0402_5% H_PM_DOW N RC13 1 2 220_0402_5% CPU_SVID_ALERT#

<17> H_PM_DOW N_R <89> CPU_SVID_ALERT#_R
4 4
1
CPU_SVID_DAT
<89> CPU_SVID_DAT
RH2
@ 13_0402_5%
2

CFL-H(5/8)CFG,SVID
A B C D E
A B C D E
GT
32000mA(Hexa Core GT2) +VCC_CORE +VCC_CORE +VCC_CORE CFL-H +VCC_CORE
+VCC_GT CFL-H +VCC_GT CFL-H UC1J
UC1K UC1I
AT14
VCCGT1 VCCGT80
BD35 AA13
VCC1 VCC64
AH13 128000mA(Hexa Core GT2) K14
VCC1 VCC64
W35
AT31 BD36 AA31 AH14 L13 W36
AT32 VCCGT2 VCCGT81 BE31 AA32 VCC2 VCC65 AH29 L14 VCC2 VCC65 W37
AT33 VCCGT3 VCCGT82 BE32 AA33 VCC3 VCC66 AH30 N13 VCC3 VCC66 W38
AT34 VCCGT4 VCCGT83 BE33 AA34 VCC4 VCC67 AH31 N14 VCC4 VCC67 Y29
AT35 VCCGT5 VCCGT84 BE34 AA35 VCC5 VCC68 AH32 N30 VCC5 VCC68 Y30
AT36 VCCGT6 VCCGT85 BE35 AA36 VCC6 VCC69 AJ14 N31 VCC6 VCC69 Y31
1 1
AU14 VCCGT9 VCCGT88 BE38 AB29 VCC9 VCC72 AJ31 N36 VCC9 VCC72 Y34
AU29 VCCGT10 VCCGT89 BF13 AB30 VCC10 VCC73 AJ32 N37 VCC10 VCC73 Y35
AU30 VCCGT11 VCCGT90 BF14 AB31 VCC11 VCC74 AJ33 N38 VCC11 VCC74 Y36
AU31 VCCGT12 VCCGT91 BF29 AB32 VCC12 VCC75 AJ34 P13 VCC12 VCC75
AU32 VCCGT13 VCCGT92 BF30 AB35 VCC13 VCC76 AJ35 P14 VCC13
AU35 VCCGT14 VCCGT93 BF31 AB36 VCC14 VCC77 AJ36 P29 VCC14
AU36 VCCGT15 VCCGT94 BF32 AB37 VCC15 VCC78 AK31 P30 VCC15
AU37 VCCGT16 VCCGT95 BF35 AB38 VCC16 VCC79 AK32 P31 VCC16
AU38 VCCGT17 VCCGT96 BF36 AC13 VCC17 VCC80 AK33 P32 VCC17
AV29 VCCGT18 VCCGT97 BF37 AC14 VCC18 VCC81 AK34 P33 VCC18
AV30 VCCGT19 VCCGT98 BF38 AC29 VCC19 VCC82 AK35 P34 VCC19
AV31 VCCGT20 VCCGT99 BG29 AC30 VCC20 VCC83 AK36 P35 VCC20
AV32 VCCGT21 VCCGT100 BG30 AC31 VCC21 VCC84 AK37 P36 VCC21
AV33 VCCGT22 VCCGT101 BG31 AC32 VCC22 VCC85 AK38 R13 VCC22
AV34 VCCGT23 VCCGT102 BG32 AC33 VCC23 VCC86 AL13 R31 VCC23
AW14 VCCGT26 VCCGT105 BG35 AC36 VCC26 VCC89 AL31 R34 VCC26
AW31 VCCGT27 VCCGT106 BG36 AD13 VCC27 VCC90 AL32 R35 VCC27
AW32 VCCGT28 VCCGT107 BH33 AD14 VCC28 VCC91 AL35 R36 VCC28
AW35 VCCGT31 VCCGT110 BH36 AD33 VCC31 VCC94 AL38 T29 VCC31
AW36 VCCGT32 VCCGT111 BH37 AD34 VCC32 VCC95 AM13 T30 VCC32
AW37 VCCGT33 VCCGT112 BH38 AD35 VCC33 VCC96 AM14 T31 VCC33
AW38 VCCGT34 VCCGT113 BJ16 AD36 VCC34 VCC97 AM29 T32 VCC34
AY29 VCCGT35 VCCGT114 BJ17 AD37 VCC35 VCC98 AM30 T35 VCC35
AY30 VCCGT36 VCCGT115 BJ19 AD38 VCC36 VCC99 AM31 T36 VCC36
2 AY31 VCCGT37 VCCGT116 BJ20 AE13 VCC37 VCC100 AM32 T37 VCC37 2
AY32 VCCGT38 VCCGT117 BJ21 AE14 VCC38 VCC101 AM33 T38 VCC38
AY35 VCCGT39 VCCGT118 BJ23 AE30 VCC39 VCC102 AM34 U29 VCC39
AY38 VCCGT42 VCCGT121 BJ27 AE35 VCC42 VCC105 AN13 U32 VCC42
BA13 VCCGT43 VCCGT122 BJ37 AE36 VCC43 VCC106 AN14 U33 VCC43
BA14 VCCGT44 VCCGT123 BJ38 AE37 VCC44 VCC107 AN31 U34 VCC44
BA29 VCCGT45 VCCGT124 BK16 AE38 VCC45 VCC108 AN32 U35 VCC45
BA30 VCCGT46 VCCGT125 BK17 AF29 VCC46 VCC109 AN33 U36 VCC46
BA31 VCCGT47 VCCGT126 BK19 AF30 VCC47 VCC110 AN34 V13 VCC47
BA36 VCCGT52 VCCGT131 BK26 AF35 VCC52 VCC115 AP13 V34 VCC52
BB13 VCCGT53 VCCGT132 BK27 AF36 VCC53 VCC116 AP30 V35 VCC53
BB14 VCCGT54 VCCGT133 BL15 AF37 VCC54 VCC117 AP31 V36 VCC54
BB31 VCCGT55 VCCGT134 BL16 AF38 VCC55 VCC118 AP32 V37 VCC55
BB32 VCCGT56 VCCGT135 BL17 AG14 VCC56 VCC119 AP35 V38 VCC56
BB33 VCCGT57 VCCGT136 BL23 AG31 VCC57 VCC120 AP36 W13 VCC57
BB36 VCCGT60 VCCGT139 BL26 AG34 VCC60 VCC123 K13 W30 VCC60
BB37 VCCGT61 VCCGT140 BL27 AG35 VCC61 VCC124 W31 VCC61
BB38 VCCGT62 VCCGT141 BL28 AG36 VCC62 W32 VCC62 10 OF 13
BC29 VCCGT63 VCCGT142 BL36 VCC63 VCC63
BC30 VCCGT64 VCCGT143 BL37 CFL-H_BGA1440
BC31 VCCGT65 VCCGT144 BM15
3 BC32 VCCGT66 VCCGT145 BM16 AG37 VCCSENSE 3
VCCGT67 VCCGT146 VCC_SENSE VCCSENSE <89>
BC35 BM17 9 OF 13 AG38 VSSSENSE
VCCGT68 VCCGT147 VSS_SENSE VSSSENSE <89>
BC36 BM36
BC37 VCCGT69 VCCGT148 BM37 CFL-H_BGA1440
BC38 VCCGT70 VCCGT149 BN15
VCCGT71 VCCGT150
1. Vcc_SENSE/ Vss_SENSE Trace Length Match < 25 mils
BD13 BN16 2. Maintain 25-mil separation distance away from any other dynamic signals.
BD14 VCCGT72 VCCGT151 BN17
BD32 VCCGT76 VCCGT155 BP15
BP37 VCCGT79 VCCGT158 BR37
BP38 VCCGT159 VCCGT164 BT15
BR15 VCCGT160 VCCGT165 BT16
VCCGT163 VCCGT168
AH37 VSSGT_SENSE
11 OF VSSGT_SENSE VSSGT_SENSE <89>
13 AH38 VCCGT_SENSE
VCCGT_SENSE VCCGT_SENSE <89>
CFL-H_BGA1440
1. VccGT_SENSE / VssGT_SENSE Trace Length Match < 25 mils
2. Maintain 25-mil separation distance away from any other dynamic signals.
4 4

CFL-H(6/8)VCC_CORE/GT
A B C D E
A B C D E
+1.2V_VDDQ_CPU
Max: 3300mA
+VCC_SA CFL-H +1.2V_VDDQ_CPU +1.2V_VDDQ_CPU +1.2V_VDDQ +1.2V_VDDQ_CPU EH50F red-ink issue , 22uF 0603*2 change to 10uF 0402*4
UC1L 3.3A
@ JPC1
10U_0402_6.3V6M
10U_0402_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
+VCC_SA J30 AA6 1 2
VCCSA1 VDDQ1 1 2
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
Max: 11100mA K29 AE12 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
K30 VCCSA2 VDDQ2 AF5 JUMP_43X118
VCCSA3 VDDQ3
CC70
CC71
CC72
CC73
CC74
CC75
CC76
CC77
CC78
CC79
CC80
CC81
CC83
CC84
CC95
CC96
CC82
CC85
K31 AF6
K32 VCCSA4 VDDQ4 AG5 @ JPC2
K33 VCCSA5 VDDQ5 AG9 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1 1
K34 VCCSA6 VDDQ6 AJ12 1 2
K35 VCCSA7 VDDQ7 AL11 JUMP_43X118
L31 VCCSA8 VDDQ8 AP6
L32 VCCSA9 VDDQ9 AP7
L35 VCCSA10 VDDQ10 AR12 571483_CFL_H_RVP_CRB_TDK_Rev0p5
L36 VCCSA11 VDDQ11 AR6 +1.2V_VDDQ_CPU: 10uF * 12 22uF * 4
L37 VCCSA12 VDDQ12 AT12
VCCSA13 VDDQ13 PLACE CAP BACKSIDE
L38 AW6
M29 VCCSA14 VDDQ14 AY6
M30 VCCSA15 VDDQ15 J5
M31 VCCSA16 VDDQ16 J6
M32 VCCSA17 VDDQ17 K12 +1.2V_VDDQ +1.2V_VCCPLL_OC
M33 VCCSA18 VDDQ18 K6 +VCCIO
M34 VCCSA19 VDDQ19 L12 RC24 1 @ 2 0_0402_5%
+VCC_IO M35 VCCSA20 VDDQ20 L6
Max: 6400mA VCCSA21 VDDQ21
1U_0201_6.3V6M
1U_0201_6.3V6M
M36 R6
VCCSA22 VDDQ22
10U_0402_6.3V6M
T6 1 1
+VCCIO VDDQ23
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
W6 1 1 1 1 @
VDDQ24
CC86
CC87
Y12
VDDQ25
CC88
CC89
CC90
CC91
AG12
G15 VCCIO1 +1.2V_VCCPLL_OC 2 2
G17 VCCIO2 +1.2V_VCCPLL_OC 2 2 2 2
G19 VCCIO3 BH13 Max: 130mA
G21 VCCIO4 VCCPLL_OC1 BJ13
H15 VCCIO5 VCCPLL_OC2 G11 +1.05V_VCCST
H16 VCCIO6 VCCPLL_OC3
H17 VCCIO7 H30 Max: 60mA +1.05VS_VCCSTG
H19 VCCIO8 VCCST 571483_CFL_H_RVP_CRB_TDK_Rev0p5 571483_CFL_H_RVP_CRB_TDK_Rev0p5
2 H20 VCCIO9 H29 Max: 20mA +1.2V_VCCPLL_OC: 1uF * 2 +0.95VS_VCCIO: 10uF * 12 22uF * 4 2
H21 VCCIO10 VCCSTG2
VCCIO11 +1.05V_VCCSFR
PLACE CAP BACKSIDE
H26 G30
H27 VCCIO12 VCCSTG1
J15 VCCIO13 H28 Max: 150mA
J16 VCCIO14 VCCPLL1 J28
J17 VCCIO15 VCCPLL2
J19 VCCIO16 +1.05V_VCCST +1.05V_VCCSFR
J20 VCCIO17 M38 VCCSA_SENSE
VCCIO18 VCCSA_SENSE VSSSA_SENSE VCCSA_SENSE <89>
J21 M37 RC25 1 @ 2 0_0402_5%
VCCIO19 VSSSA_SENSE VSSSA_SENSE <89>
J26 150mA
VCCIO20 VCCIO_SENSE
1U_0201_6.3V6M
1U_0201_6.3V6M
J27 H14
VCCIO21 VCCIO_SENSE VSSIO_SENSE VCCIO_SENSE <88>
J14 1 1
12 OF 13 VSSIO_SENSE VSSIO_SENSE <88>
CC92
CC93
CFL-H_BGA1440
1. VccGT_SENSE / VssGT_SENSE Trace Length Match < 25 mils 2 2
2. Maintain 25-mil separation distance away from any other dynamic signals.
571483_CFL_H_RVP_CRB_TDK_Rev0p5
+1.05V_VCCST: 1uF * 1 571483_CFL_H_RVP_CRB_TDK_Rev0p5
+1.05V_VCCSFR: 1uF * 1
PLACE CAP BACKSIDE PLACE CAP BACKSIDE
+1.05VS_VCCSTG
3 3
1U_0201_6.3V6M
1
CC94
2
571483_CFL_H_RVP_CRB_TDK_Rev0p5
+1.05VS_VCCSTG: 1uF * 1
4 4

CFL-H(7/8)VCCSA/VCCIO/VDDQ
A B C D E
A B C D E
CFL-H
CFL-H CFL-H UC1H CFL-H
UC1F UC1G BN4 F15 UC1M
A10 AK4 AW5 BJ15 BN7 VSS_325 VSS_409 F17
A12 VSS_1 VSS_82 AL10 AY12 VSS_163 VSS_244 BJ18 BP12 VSS_326 VSS_410 F19
A16 VSS_2 VSS_83 AL12 AY33 VSS_164 VSS_245 BJ22 BP14 VSS_327 VSS_411 F2 E2
VSS_3 VSS_84 VSS_165 VSS_246 VSS_328 VSS_412 Impedance Spectrum Tool Trigger TP@ TC7
IST_TRIG E3 RSVD_TP5
A18 AL14 AY34 BJ25 BP18 F21 TP@ TC8
A20 VSS_4 VSS_85 AL33 B9 VSS_166 VSS_247 BJ29 BP21 VSS_329 VSS_413 F23 E1 IST_TRIG
VSS_5 VSS_86 VSS_167 VSS_248 VSS_330 VSS_414 TP@ TC9 RSVD_TP4
A22 AL34 BA10 BJ30 BP24 F25 TP@ TC10 D1
A24 VSS_6 VSS_87 AL4 BA11 VSS_168 VSS_249 BJ31 BP25 VSS_331 VSS_415 F27 RSVD_TP3
A26 VSS_7 VSS_88 AL7 BA12 VSS_169 VSS_250 BJ32 BP26 VSS_332 VSS_416 F29 BR1 BK28
VSS_8 VSS_89 VSS_170 VSS_251 VSS_333 VSS_417 TP@ TC11 RSVD_TP1 RSVD11
1 A28 AL8 BA37 BJ33 BP29 F3 TP@ TC12 BT2 BJ28 1
A30 VSS_9 VSS_90 AL9 BA38 VSS_171 VSS_252 BJ34 BP33 VSS_334 VSS_418 F31 RSVD_TP2 RSVD10
A6 VSS_10 VSS_91 AM1 BA6 VSS_172 VSS_253 BJ35 BP34 VSS_335 VSS_419 F36 BN35
A9 VSS_11 VSS_92 AM12 BA7 VSS_173 VSS_254 BJ36 BP7 VSS_336 VSS_420 F4 RSVD15
AA12 VSS_12 VSS_93 AM2 BA8 VSS_174 VSS_255 BK13 BR12 VSS_337 VSS_421 F5 J24
AA29 VSS_13 VSS_94 AM3 BA9 VSS_175 VSS_256 BK14 BR14 VSS_338 VSS_422 F8 H24 RSVD28
AA30 VSS_14 VSS_95 AM37 BB1 VSS_176 VSS_257 BK15 BR18 VSS_339 VSS_423 F9 BN33 RSVD27
AB33 VSS_15 VSS_96 AM38 BB12 VSS_177 VSS_258 BK18 BR21 VSS_340 VSS_424 G10 BL34 RSVD14
AB34 VSS_16 VSS_97 AM4 BB2 VSS_178 VSS_259 BK22 BR24 VSS_341 VSS_425 G12 RSVD13
AB6 VSS_17 VSS_98 AM5 BB29 VSS_179 VSS_260 BK25 BR25 VSS_342 VSS_426 G14 N29
AC1 VSS_18 VSS_99 AN12 BB3 VSS_180 VSS_261 BK29 BR26 VSS_343 VSS_427 G16 R14 RSVD30
AC12 VSS_19 VSS_100 AN29 BB30 VSS_181 VSS_262 BK6 BR29 VSS_344 VSS_428 G18 AE29 RSVD31
AC2 VSS_20 VSS_101 AN30 BB4 VSS_182 VSS_263 BL13 BR34 VSS_345 VSS_429 G20 AA14 RSVD2
AC3 VSS_21 VSS_102 AN5 BB5 VSS_183 VSS_264 BL14 BR36 VSS_346 VSS_430 G22 AP29 RSVD1
AC37 VSS_22 VSS_103 AN6 BB6 VSS_184 VSS_265 BL18 BR7 VSS_347 VSS_431 G23 AP14 RSVD5
AC38 VSS_23 VSS_104 AP10 BC12 VSS_185 VSS_266 BL19 BT12 VSS_348 VSS_432 G24 A36 RSVD4
AC4 VSS_24 VSS_105 AP11 BC13 VSS_186 VSS_267 BL20 BT14 VSS_349 VSS_433 G26 VSS_A36
AC5 VSS_25 VSS_106 AP12 BC14 VSS_187 VSS_268 BL21 BT18 VSS_350 VSS_434 G28 A37
AC6 VSS_26 VSS_107 AP33 BC33 VSS_188 VSS_269 BL22 BT21 VSS_351 VSS_435 G4 VSS_A37
AD10 VSS_27 VSS_108 AP34 BC34 VSS_189 VSS_270 BL29 BT24 VSS_352 VSS_436 G5 PCH_TRIGOUT_R H23
VSS_28 VSS_109 VSS_190 VSS_271 VSS_353 VSS_437 <21> PCH_TRIGOUT_R CPU_TRIGOUT PROC_TRIGIN
AD11 AP8 BC6 BL33 BT26 G6 RC26 1 2 30_0402_5% J23
VSS_29 VSS_110 VSS_191 VSS_272 VSS_354 VSS_438 <21> CPU_TRIGOUT_R PROC_TRIGOUT
AD12 AP9 BD10 BL35 BT29 G8
AD29 VSS_30 VSS_111 AR1 BD11 VSS_192 VSS_273 BL38 BT32 VSS_355 VSS_439 G9 F30
AD30 VSS_31 VSS_112 AR13 BD12 VSS_193 VSS_274 BL6 BT5 VSS_356 VSS_440 H11 RSVD24
AD6 VSS_32 VSS_113 AR14 BD37 VSS_194 VSS_275 BM11 C11 VSS_357 VSS_441 H12
AD8 VSS_33 VSS_114 AR2 BD6 VSS_195 VSS_276 BM12 C13 VSS_358 VSS_442 H18 E30
AD9 VSS_34 VSS_115 AR29 BD7 VSS_196 VSS_277 BM13 C15 VSS_359 VSS_443 H22 RSVD23
AE33 VSS_35 VSS_116 AR3 BD8 VSS_197 VSS_278 BM14 C17 VSS_360 VSS_444 H25
AE34 VSS_36 VSS_117 AR30 BD9 VSS_198 VSS_279 BM18 C19 VSS_361 VSS_445 H32 B30 BL31
2 AE6 VSS_37 VSS_118 AR31 BE1 VSS_199 VSS_280 BM2 C21 VSS_362 VSS_446 H35 C30 RSVD7 RSVD12 AJ8 2
AF1 VSS_38 VSS_119 AR32 BE2 VSS_200 VSS_281 BM21 C23 VSS_363 VSS_447 J10 RSVD21 RSVD3 G13
AF12 VSS_39 VSS_120 AR33 BE29 VSS_201 VSS_282 BM22 C25 VSS_364 VSS_448 J18 RSVD25
AF13 VSS_40 VSS_121 AR34 BE3 VSS_202 VSS_283 BM23 C27 VSS_365 VSS_449 J22 G3
AF14 VSS_41 VSS_122 AR35 BE30 VSS_203 VSS_284 BM24 C29 VSS_366 VSS_450 J25 J3 RSVD26 C38
VSS_42 VSS_123 VSS_204 VSS_285 VSS_367 VSS_451 RSVD29 RSVD22 TC13 TP@
AF2 AR36 BE4 BM25 C31 J32 C1 TC14 TP@
AF3 VSS_43 VSS_124 AR37 BE5 VSS_205 VSS_286 BM26 C37 VSS_368 VSS_452 J33 RSVD20 BR2
VSS_44 VSS_125 VSS_206 VSS_287 VSS_369 VSS_453 RSVD17 TC15 TP@
AF4 AR38 BE6 BM27 C5 J36 BR35 BP1 TC16 TP@
AG10 VSS_45 VSS_126 AR4 BF12 VSS_207 VSS_288 BM28 C8 VSS_370 VSS_454 J4 BR31 RSVD19 RSVD16 B38
VSS_46 VSS_127 VSS_208 VSS_289 VSS_371 VSS_455 RSVD18 RSVD8 TC17 TP@
AG11 AR5 BF33 BM29 C9 J7 BH30 B2 TC18 TP@
AG13 VSS_47 VSS_128 AT29 BF34 VSS_209 VSS_290 BM3 D10 VSS_372 VSS_456 K1 RSVD9 RSVD6
AG29 VSS_48 VSS_129 AT30 BF6 VSS_210 VSS_291 BM33 D12 VSS_373 VSS_457 K10 13 OF 13
VSS_49 VSS_130 VSS_211 VSS_292 VSS_374 VSS_458 Add for Corner NCTF testing
AG30 AT6 BG12 BM35 D14 K11
AG6 VSS_50 VSS_131 AU10 BG13 VSS_212 VSS_293 BM38 D16 VSS_375 VSS_459 K2 CFL-H_BGA1440
AG7 VSS_51 VSS_132 AU11 BG14 VSS_213 VSS_294 BM5 D18 VSS_376 VSS_460 K3
AG8 VSS_52 VSS_133 AU12 BG37 VSS_214 VSS_295 BM6 D20 VSS_377 VSS_461 K38
AH12 VSS_53 VSS_134 AU33 BG38 VSS_215 VSS_296 BM7 D22 VSS_378 VSS_462 K4
AH33 VSS_54 VSS_135 AU34 BG6 VSS_216 VSS_297 BM8 D24 VSS_379 VSS_463 K5
AH34 VSS_55 VSS_136 AU6 BH1 VSS_217 VSS_298 BM9 D26 VSS_380 VSS_464 K7
AH35 VSS_56 VSS_137 AU7 BH10 VSS_218 VSS_299 BN12 D28 VSS_381 VSS_465 K8
AH36 VSS_57 VSS_138 AU8 BH11 VSS_219 VSS_300 BN14 D3 VSS_382 VSS_466 K9
AH6 VSS_58 VSS_139 AU9 BH12 VSS_220 VSS_301 BN18 D30 VSS_383 VSS_467 L29
AJ1 VSS_59 VSS_140 AV37 BH14 VSS_221 VSS_302 BN19 D33 VSS_384 VSS_468 L30
AJ13 VSS_60 VSS_141 AV38 BH2 VSS_222 VSS_303 BN2 D6 VSS_385 VSS_469 L33
AJ2 VSS_61 VSS_142 AW1 BH3 VSS_223 VSS_304 BN20 D9 VSS_386 VSS_470 L34
AJ3 VSS_62 VSS_143 AW12 BH4 VSS_224 VSS_305 BN21 E34 VSS_387 VSS_471 M12
AJ37 VSS_63 VSS_144 AW2 BH5 VSS_225 VSS_306 BN24 E35 VSS_388 VSS_472 M13
AJ38 VSS_64 VSS_145 AW29 BH6 VSS_226 VSS_307 BN29 E38 VSS_389 VSS_473 N10
AJ4 VSS_65 VSS_146 AW3 BH7 VSS_227 VSS_308 BN30 E4 VSS_390 VSS_474 N11
3 AJ5 VSS_66 VSS_147 AW30 BH8 VSS_228 VSS_309 BN31 E9 VSS_391 VSS_475 N12 3
AJ6 VSS_67 VSS_148 AW4 BH9 VSS_229 VSS_310 BN34 N3 VSS_392 VSS_476 N2
W4 VSS_68 VSS_149 U6 T2 VSS_230 VSS_311 P38 N33 VSS_393 VSS_477 BT8
W5 VSS_69 VSS_150 V12 T3 VSS_231 VSS_312 P6 N34 VSS_394 VSS_478 BR9
Y10 VSS_70 VSS_151 V29 T33 VSS_232 VSS_313 R12 N4 VSS_395 VSS_479
Y11 VSS_71 VSS_152 V30 T34 VSS_233 VSS_314 R29 N5 VSS_396 A3
Y13 VSS_72 VSS_153 A14 T4 VSS_234 VSS_315 AY14 N6 VSS_397 VSS_A3 A34
Y14 VSS_73 VSS_154 AD7 T5 VSS_235 VSS_316 BD38 N7 VSS_398 VSS_A34 A4
Y37 VSS_74 VSS_155 V6 T7 VSS_236 VSS_317 R30 N8 VSS_399 VSS_A4 B3
Y38 VSS_75 VSS_156 W1 T8 VSS_237 VSS_318 T1 N9 VSS_400 VSS_B3 B37
Y7 VSS_76 VSS_157 W12 T9 VSS_238 VSS_319 T10 P12 VSS_401 VSS_B37 BR38
Y8 VSS_77 VSS_158 W2 U37 VSS_239 VSS_320 T11 P37 VSS_402 VSS_BR38 BT3
Y9 VSS_78 VSS_159 W3 U38 VSS_240 VSS_321 T12 M14 VSS_403 VSS_BT3 BT35
AK29 VSS_79 VSS_160 W33 BJ12 VSS_241 VSS_322 T13 M6 VSS_404 VSS_BT35 BT36
AK30 VSS_80
6 OF VSS_161
13 W34 BJ14 VSS_2427 OF VSS_323
13 T14 N1 VSS_405 VSS_BT36 BT4
VSS_81 VSS_162 VSS_243 VSS_324 F11 VSS_406 VSS_BT4 C2
CFL-H_BGA1440 CFL-H_BGA1440 F13 VSS_4078 OF 13VSS_C2 D38
VSS_408 VSS_D38
CFL-H_BGA1440
4 4

CFL-H(8/8)GND/RSVD
A B C D E
A B C D E
CNP-H
UH1B
DMI_CTX_PRX_N0 K34 J3 USB20_N1
<9> DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 DMI0_RXN USB2N_1 USB20_P1 USB20_N1 <71>
<9> DMI_CTX_PRX_P0 J35 J2 USB3 MB
DMI_CRX_PTX_N0 DMI0_RXP USB2P_1 USB20_N2 USB20_P1 <71>
<9> DMI_CRX_PTX_N0 C33 N13
DMI_CRX_PTX_P0 DMI0_TXN USB2N_2 USB20_P2 USB20_N2 <43>
<9> DMI_CRX_PTX_P0 B33 N15 USB3 MB TypeC
DMI_CTX_PRX_N1 DMI0_TXP USB2P_2 USB20_N3 USB20_P2 <43> +3VALW _PCH_PRIM
<9> DMI_CTX_PRX_N1 G33 K4
DMI_CTX_PRX_P1 DMI1_RXN USB2N_3 USB20_P3 USB20_N3 <72>
<9> DMI_CTX_PRX_P1 F34 K3 USB3 MB
<9> DMI_CRX_PTX_N1 C32 M10
<9> DMI_CRX_PTX_P1 B32 L9 USB3 SUB
DMI_CTX_PRX_N2 DMI1_TXP USB2P_4 USB20_N5 USB20_P4 <73>
<9> DMI_CTX_PRX_N2 K32 M1
DMI_CTX_PRX_P2 DMI2_RXN USB2N_5 USB20_P5 USB20_N5 <38>
<9> DMI_CTX_PRX_P2 J32 L2 Camera
<9> DMI_CRX_PTX_N2 C31 K7
DMI_CRX_PTX_P2 DMI2_TXN USB2N_6 USB20_P6 USB20_N6 <38> USB_OC0# RH213
1 <9> DMI_CRX_PTX_P2 B31 K6 TS 1 2 10K_0402_5% 1
DMI_CTX_PRX_N3 DMI2_TXP USB2P_6 USB20_P6 <38>
<9> DMI_CTX_PRX_N3 G30 L4
DMI_CTX_PRX_P3 F30 DMI3_RXN USB2N_7 L3 USB_OC1# RH214 1 2 10K_0402_5%
<9> DMI_CTX_PRX_P3 DMI_CRX_PTX_N3 DMI3_RXP USB2P_7 USB20_N8
<9> DMI_CRX_PTX_N3 C29 G4
<9> DMI_CRX_PTX_P3 B29 G5 FingerPrint
DMI3_TXP USB2P_8 USB20_P8 <66>
A25 M6
B25 RSVD USB2N_9 N8
The 30 HSIO lanes on PCH-H supports the following configurations: P24 RSVD USB2P_9 H3
1. Up to 24 PCIe* Lanes R24 RSVD USB2N_10 H2
— A maximum of 16 PCIe* Ports (or devices) can be enabled
C26 RSVD USB2P_10 R10
‧ When a GbE Port is enabled, the maximum number of PCIe* Ports (or RSVD USB2N_11
devices) that can be enabled reduces based off the following: B26 P9 FOR CNVI follow 571906_CNL_PCH_TA_WW11.pdf
Max PCIe* Ports (or devices) = 16 - GbE (0 or 1) F26 RSVD USB2P_11 G1
— PCIe* Lanes 1-4 (PCIe* Controller #1), 5-8 (PCIe* Controller #2), 9-12 (PCIe* G26 RSVD USB2N_12 G2
Controller #3), 13-16 (PCIe* Controller #4), 17-20 (PCIe* Controller #5), and
B27 RSVD USB2P_12 N3 +3VALW
21-24 (PCIe* Controller #6) can be individually configured RSVD USB2N_13
2. Up to 6 SATA Lanes C27 N2 X'tal Input:
— A maximum of 6 SATA Ports (or devices) can be enabled L26 RSVD USB2P_13 E5 USB20_N14 High: Differential
— SATA Lane 0 has the flexibility to be mapped to Flex I/O Lane 16 or 18 RSVD USB2N_14 USB20_P14 USB20_N14 <52> Low: Single ended
M26 F6 BT
1
— SATA Lane 1 has the flexibility to be mapped to Flex I/O Lane 17 or 19 RSVD USB2P_14 USB20_P14 <52>
3. Up to 10 USB 3.1 Lanes
D29
E28 RSVD AH36 USB_OC0#
— A maximum of 10 USB 3.1 Ports (or devices) can be enabled RSVD GPP_E9/USB2_OC0# USB_OC0# <43> STRAP RH3
4. Up to 4 GbE Lanes K29 AL40 USB_OC1#
— A maximum of 1 GbE Port (or device) can be enabled RSVD GPP_E10/USB2_OC1# USB_OC1# <71> 10K_0402_5%
M29 AJ44
5. Supports up to 3 Remapped (IntelR Rapid Storage Technology) PCIe* storage RSVD GPP_E11/USB2_OC2# AL41
2
devices GPP_E12/USB2_OC3# GPD_7
— x2 and x4 PCIe* NVMe SSD G17 AV47
F16 PCIE1_RXN/USB31_7_RXN GPP_F15/USB2_OC4# AR35
— x2 IntelR Optane? Memory Device
— See the “ PC I Express * (PCIe*) ” chapt er f or t he P CH PCI e* Controllers,configurations A17 PCIE1_RXP/USB31_7_RXP GPP_F16/USB2_OC5# AR37
1
, and lanes that can be used for IntelR Rapid Storage Technology PCIe* storage support B17 PCIE1_TXN/USB31_7_TXN GPP_F17/USB2_OC6# AV43
PCIE1_TXP/USB31_7_TXP GPP_F18/USB2_OC7# RH7
6. For unused SATA/PCIe* Combo Lanes, Flex I/O Lanes that can be configured as PCIe* or SATA, R21
PCIE2_RXN/USB31_8_RXN USB2_RCOMP 10K_0402_5%
the lanes must be statically assigned to SATA or PCIe* via the SATA/PCIe Combo Port Soft P21 F4 RH4 1 2 113_0402_1%
PCIE2_RXP/USB31_8_RXP USB2_COMP USB2_VBUS_SENSE RH5 @
Straps discussed in the SPI Programming Guide and B18 F3 1 @ 2 0_0402_5%
through the IntelR Flash Image Tool (FIT) tool. C18 PCIE2_TXN/USB31_8_TXN USB2_VBUSSENSE U13
2
2 2
K18 PCIE2_TXP/USB31_8_TXP RSVD1 G3 USB2_ID RH6 1 @ 2 0_0402_5%
J18 PCIE3_RXN/USB31_9_RXN USB2_ID
B19 PCIE3_RXP/USB31_9_RXP BE41 GPD_7
C19 PCIE3_TXN/USB31_9_TXN GPD7
N18 PCIE3_TXP/USB31_9_TXP G45 PCIE_PTX_DRX_P24
PCIE4_RXN/USB31_10_RXN PCIE24_TXP PCIE_PTX_DRX_N24 PCIE_PTX_DRX_P24 <68>
R18 G46 PCIE_PTX_DRX_N24 <68>
D20 PCIE4_RXP/USB31_10_RXP PCIE24_TXN Y41 PCIE_PRX_DTX_P24
PCIE4_TXN/USB31_10_TXN PCIE24_RXP PCIE_PRX_DTX_N24 PCIE_PRX_DTX_P24 <68> M.2 SSD-1 PCIE L3
C20 Y40
F20 PCIE4_TXP/USB31_10_TXP PCIE24_RXN G48 PCIE_PTX_DRX_P23 PCIE_PRX_DTX_N24 <68>
PCIE5_RXN PCIE23_TXP PCIE_PTX_DRX_N23 PCIE_PTX_DRX_P23 <68>
G20 G49 PCIE_PTX_DRX_N23 <68>
B21 PCIE5_RXP PCIE23_TXN W44 PCIE_PRX_DTX_P23
PCIE5_TXN PCIE23_RXP PCIE_PRX_DTX_N23 PCIE_PRX_DTX_P23 <68> M.2 SSD-1 PCIE L2
A22 W43
K21 PCIE5_TXP PCIE23_RXN H48 PCIE_PTX_DRX_P22 PCIE_PRX_DTX_N23 <68>
PCIE6_RXN PCIE22_TXP PCIE_PTX_DRX_N22 PCIE_PTX_DRX_P22 <68>
J21 H47 PCIE_PTX_DRX_N22 <68>
D21 PCIE6_RXP PCIE22_TXN U41 PCIE_PRX_DTX_P22
PCIE6_TXN PCIE22_RXP PCIE_PRX_DTX_N22 PCIE_PRX_DTX_P22 <68> M.2 SSD-1 PCIE L1
C21 U40
B23 PCIE6_TXP PCIE22_RXN F46 PCIE_PTX_DRX_P21 PCIE_PRX_DTX_N22 <68>
PCIE7_TXP PCIE21_TXP PCIE_PTX_DRX_N21 PCIE_PTX_DRX_P21 <68>
C23 G47 PCIE_PTX_DRX_N21 <68>
J24 PCIE7_TXN PCIE21_TXN R44 PCIE_PRX_DTX_P21
PCIE7_RXP PCIE21_RXP PCIE_PRX_DTX_N21 PCIE_PRX_DTX_P21 <68> M.2 SSD-1 PCIE L0
L24 T43
F24 PCIE7_RXN PCIE21_RXN PCIE_PRX_DTX_N21 <68>
G24 PCIE8_RXN
B24 PCIE8_RXP
C24 PCIE8_TXN 2 OF 13
PCIE8_TXP
CNP-H_BGA874 Rev1.0
3 3
4 4

PCH(1/8)DMI/PCIE/USB2
A B C D E
A B C D E
PCH-H XTAL_IN/OUT POR is 24MHz for 571697_CNL_MOW_WW16_2017.pdf CNP-H
XTAL_24M_PCH_OUT XTAL_24M_PCH_OUT_R
remove TP as C5PRH UH1G
1 EMC@ 2 BE33
RH11 33_0402_1% GPP_A16/CLKOUT_48
PCH_CPU_24M_CLK_P D7 Y3
<10> PCH_CPU_24M_CLK_P PCH_CPU_24M_CLK_N CLKOUT_CPUNSSC_P CLKOUT_ITPXDP# TP@ TH2
C6 Y4 TP@ TH3
XTAL_24M_PCH_IN 1 EMC@ 2 XTAL_24M_PCH_IN_R <10> PCH_CPU_24M_CLK_N CLKOUT_CPUNSSC# CLKOUT_ITPXDP_P
1 2
RH8 1M_0402_5% RH9 33_0402_1% PCH_CPU_BCLK_P B8 B6 PCH_CPU_PCIBCLK_N
<10> PCH_CPU_BCLK_P PCH_CPU_BCLK_N CLKOUT_CPUBCLK_P CLKOUT_CPUPCIBCLK# PCH_CPU_PCIBCLK_P PCH_CPU_PCIBCLK_N <10>
C8 A6
<10> PCH_CPU_BCLK_N CLKOUT_CPUBCLK# CLKOUT_CPUPCIBCLK_P PCH_CPU_PCIBCLK_P <10>
YH1
24MHZ_18PF_XRCGB24M000F2P51R0 XTAL_24M_PCH_OUT_R U9 AJ6 CLK_PEG_VGA#
XTAL_24M_PCH_IN_R XTAL_OUT CLKOUT_PCIE_N0 CLK_PEG_VGA CLK_PEG_VGA# <25>
1 U10 AJ7 DGPU 1
XTAL_IN CLKOUT_PCIE_P0 CLK_PEG_VGA <25>
3 1
3 1 XCLK_BIASREF CLK_PCIE_LAN#
33P_0402_50V8J
18P_0402_50V8J
RH10 1 2 60.4_0402_1% T3 AH9
NC NC XCLK_BIASREF CLKOUT_PCIE_N1 CLK_PCIE_LAN CLK_PCIE_LAN# <51>
AH10 GLAN
PCH_RTCX1 CLKOUT_PCIE_P1 CLK_PCIE_LAN <51>
CH5
CH6
XCLK_BIASREF (PDG) BA49
4 2 Trace Width/Space: 15mil /15 mil PCH_RTCX2 BA48 RTCX1 AE14 CLK_PCIE_W LAN#
Max Trace Length: 1000 mil RTCX2 CLKOUT_PCIE_N2 CLK_PCIE_W LAN CLK_PCIE_W LAN# <52>
8/24 AE15 NGFF WL+BT(KEY E)
VGA_CLKREQ# CLKOUT_PCIE_P2 CLK_PCIE_W LAN <52>
<25> VGA_CLKREQ# BF31
LAN_CLKREQ# BE31 GPP_B5/SRCCLKREQ0# AE6 CLK_PCIE_NGFF1#
<51> LAN_CLKREQ# W LAN_CLKREQ# GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_N3 CLK_PCIE_NGFF1 CLK_PCIE_NGFF1# <68>
<52> W LAN_CLKREQ# AR32 AE7 M2-1 SSD
SSD1_CLKREQ# GPP_B7/SRCCLKREQ2# CLKOUT_PCIE_P3 CLK_PCIE_NGFF1 <68>
<68> SSD1_CLKREQ# BB30
SSD2_CLKREQ# BA30 GPP_B8/SRCCLKREQ3# AC2 CLK_PCIE_NGFF2#
PCH_RTCX1 <68> SSD2_CLKREQ# GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_N4 CLK_PCIE_NGFF2 CLK_PCIE_NGFF2# <68>
AN29 AC3 M2-2 SSD
GPP_B10/SRCCLKREQ5# CLKOUT_PCIE_P4 CLK_PCIE_NGFF2 <68>
AE47
PCH_RTCX2 AC48 GPP_H0/SRCCLKREQ6# AB2
AE41 GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_N5 AB3
1 2 AF48 GPP_H2/SRCCLKREQ8# CLKOUT_PCIE_P5
RH12 10M_0402_5% AC41 GPP_H3/SRCCLKREQ9# W4
AC39 GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_N6 W3
AE39 GPP_H5/SRCCLKREQ11# CLKOUT_PCIE_P6
YH2 Raptor remove no use srcclkreq AB48 GPP_H6/SRCCLKREQ12#
GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_N7
W7
1 2 AC44 W6
AC43 GPP_H8/SRCCLKREQ14#
GPP_H9/SRCCLKREQ15#
CLKOUT_PCIE_P7 Raptor
10P_0402_50V8J
10P_0402_50V8J
1 1 AC14
V2 CLKOUT_PCIE_N8 AC15
32.768KHZ_9PF_X1A000141000200
V3 CLKOUT_PCIE_N15 CLKOUT_PCIE_P8
CLKOUT_PCIE_P15
CH7
CH8
U2
2 Trace Space: 15 mil 2 T2 CLKOUT_PCIE_N9 U3
Max Trace Length: 1000 mil T1 CLKOUT_PCIE_N14 CLKOUT_PCIE_P9
2 CLKOUT_PCIE_P14 AC9 2
AA1 CLKOUT_PCIE_N10 AC11
Y2 CLKOUT_PCIE_N13 CLKOUT_PCIE_P10
CLKOUT_PCIE_P13 AE9
use same part w C5MMH Raptor AC7 CLKOUT_PCIE_N11 AE11
+3VS CLKOUT_PCIE_N12 CLKOUT_PCIE_P11
+3VS AC6
CLKOUT_PCIE_P12 7 OF 13 R6 REFCLK_CNV
CLKIN_XTAL REFCLK_CNV <52>
CNP-H_BGA874 Rev1.0
1
RH217 1 2 10K_0402_5% LAN_CLKREQ#
RH14
RH218 1 2 10K_0402_5% VGA_CLKREQ# RH221 1 2 10K_0402_5% SSD2_CLKREQ# 10K_0402_5%
RH219 1 2 10K_0402_5% W LAN_CLKREQ#
2
RH220 1 2 10K_0402_5% SSD1_CLKREQ#
CNP-H
UH1M
AW13 BD4 CLK_CNV_PRX_DTX_N

GPP_G0/SD_CMD CNV_WR_CLKN CLK_CNV_PRX_DTX_P CLK_CNV_PRX_DTX_N <52>
For DDX03 R02 BE9 BE3 CLK_CNV_PRX_DTX_P <52>
BF8 GPP_G1/SD_DATA0 CNV_WR_CLKP
BF9 GPP_G2/SD_DATA1 BB3 CNV_PRX_DTX_N0
XTAL Frequency Select GPP_G3/SD_DATA2 CNV_WR_D0N CNV_PRX_DTX_P0 CNV_PRX_DTX_N0 <52>
BG8 BB4
+1.8VALW _PRIM GPP_G4/SD_DATA3 CNV_WR_D0P CNV_PRX_DTX_N1 CNV_PRX_DTX_P0 <52>
remove SD signal from PCH BE8 BA3
GPP_G5/SD_CD# CNV_WR_D1N CNV_PRX_DTX_P1 CNV_PRX_DTX_N1 <52>
BD8 BA2
GPP_G6/SD_CLK CNV_WR_D1P CNV_PRX_DTX_P1 <52>
AV13
GPP_G7/SD_WP BC5 CLK_CNV_PTX_DRX_N
3 CNV_BRI_PTX_DRX CNV_WT_CLKN CLK_CNV_PTX_DRX_P CLK_CNV_PTX_DRX_N <52> 3
RH15 1 2 4.7K_0402_5% AP3 BB6 CLK_CNV_PTX_DRX_P <52>
AP2 GPP_I11/M2_SKT2_CFG0 CNV_WT_CLKP
AN4 GPP_I12/M2_SKT2_CFG1 BE6 CNV_PTX_DRX_N0
This signal has a weak internal pull-down 20K. STRAP GPP_I13/M2_SKT2_CFG2 3.3V CNV_WT_D0N CNV_PTX_DRX_N0 <52>
AM7 BD7 CNV_PTX_DRX_P0
0 = 38.4/19.2MHz XTAL frequency selected.
1 = 24MHz XTAL frequency selected. (DDX03)
remove CPU_C10_GATE# GPP_I14/M2_SKT2_CFG3 CNV_WT_D0P BG6 CNV_PTX_DRX_N1 CNV_PTX_DRX_P0 <52>
CNV_WT_D1N CNV_PTX_DRX_P1 CNV_PTX_DRX_N1 <52>
Notes: AV6 BF6
1. The internal pull-down is disabled after RSMRST# GPP_J0/CNV_PA_BLANKING CNV_WT_D1P CNV_W T_RCOMP CNV_PTX_DRX_P1 <52>
AY3 BA1 RH16 1 2 150_0402_1%
de-asserts.
AR13 GPP_J1/CPU_C10_GATE# CNV_WT_RCOMP
2. This signal is in the primary well. GPP_J11/A4WP_PRESENT PCIE_RCOMPN
AV7 B12 RH17 1 2 100_0402_1%
AW3 GPP_J10 PCIE_RCOMPN A13 PCIE_RCOMPP
AT10 GPP_J_2 1.8V PCIE_RCOMPP BE5 SD_RCOMP_1P8 RH18 1 2 200_0402_1%
+1.8VALW _PRIM CNV_BRI_PTX_DRX AV4 GPP_J_3 SD_1P8_RCOMP BE4 SD_RCOMP_3P3 RH19 1 2 200_0402_1%
VCCPSPI Select <52> CNV_BRI_PTX_DRX CNV_BRI_PRX_DTX AY2 GPP_J4/CNV_BRI_DT/UART0B_RTS# SD_3P3_RCOMP BD1
checked CRB
<52> CNV_BRI_PRX_DTX CNV_RGI_PTX_DRX GPP_J5/CNV_BRI_RSP/UART0B_RXD GPPJ_RCOMP_1P81 GPPJ_RCOMP_1P8 RH20 1
BA4 BE1 2 200_0402_1%
<52> CNV_RGI_PTX_DRX CNV_RGI_PRX_DTX GPP_J6/CNV_RGI_DT/UART0B_TXD GPPJ_RCOMP_1P82
AV3 BE2
<52> CNV_RGI_PRX_DTX GPP_J7/CNV_RGI_RSP/UART0B_CTS# GPPJ_RCOMP_1P83
@ GPP_J9 AW2
RH21 1 2 4.7K_0402_5% GPP_J9 GPP_J8/CNV_MFUART2_RXD
AU9 Y35
The signal has a weak internal pull-down 20K GPP_J9/CNV_MFUART2_TXD RSVD2 Y36
0 = VCCPSPI is connected to 3.3V rail
STRAP RSVD3
1 = VCCPSPI is connected to 1.8V rail
Note: If VCCPSPI is connected to 1.8V rail, this pin BC1
+1.8VALW _PRIM 13 OF 13 RSVD1 AL35
strap must be a ‘ 1’ fo r th e prope r functionalit y TP@ TH4
of the SPI (Flash) I/Os TP
#571483_CFL_H_RVP_CRB_TDK_Rev0p5
CNP-H_BGA874 Rev1.0
Recommend external test point
+1.8VALW _PRIM RH181 1 CNVI@ 2 20K_0402_1% CNV_BRI_PRX_DTX
M.2 CNV Mode Select
RH182 1 CNVI@ 2 20K_0402_1% CNV_RGI_PRX_DTX
571391_CFL_H_PDG_Rev0p71
To avoid floating input at the I/O pin BRI_RSP and RGI_RSP it is recommended to add
RH22 2 1 10K_0402_5% CNV_RGI_PTX_DRX a weak pull up resistor to the SoC pin with a recommended value of 20K ohm.
4 4
STRAP
RH23 2 @ 1 10K_0402_5%
An external pull-up or pull-down is required.
0 = Integrated CNVi enable.
1 = Integrated CNVi disable.
Pulled down by CRF CNVi RGI_DT pin Security Classification Compal Secret Data Compal Electronics, Inc.
PCH(2/8)CLK/CNVI/SD
A B C D E
A
no follow naming CNP-H

Raptor UH1E
AL13
GPP_I5/DDPB_CTRLCLK AR8
DP0_HPD_PCH RT881 1 @ 2 0_0402_5% AT6 GPP_I6/DDPB_CTRLDATA AN13
<25,39> DP0_HPD_PCH HDMI_HPD_PCH GPP_I0/DDPB_HPD0/DISP_MISC0 GPP_I7/DDPC_CTRLCLK
<25,40> HDMI_HPD_PCH AN10 AL10
AP9 GPP_I1/DDPC_HPD1/DISP_MISC1 GPP_I8/DDPC_CTRLDATA AL9
AL15 GPP_I2/DDPD_HPD2/DISP_MISC2 GPP_I9/DDPD_CTRLCLK AR3
GPP_I3/DDPF_HPD3/DISP_MISC3 GPP_I10/DDPD_CTRLDATA AN40
GPP_F23/DDPF_CTRLDATA AT49
GPP_F22/DDPF_CTRLCLK
AP41
EDP_HPD AN6 GPP_F14/PS_ON#
can remove if no use DP <38> EDP_HPD GPP_I4/EDP_HPD/DISP_MISC4
08/18 M45
GPP_K23/IMGCLKOUT1 L48
GPP_K22/IMGCLKOUT0 T45
remove PCH DP SCLK/SDATA GPP_K21 T46
5 OF 13 GPP_K20 AJ47
DDP[B..F]CTRLDATA GPP_H23/TIME_SYNC0
This signal has a weak internal Pull-down. CNP-H_BGA874 Rev1.0
0 = Port B~D is not detected. intel critical net recommend
1 = Port B,C,D is detected. (Default)
Notes: RH198 1 2 100K_0201_5%
1. The internal Pull-down is disabled after
PCH_PWROK de-asserts. CNP-H
2. This signal is in the primary well. UH1A PLT_RST# CH9 1 2 100P_0402_50V8J
1 @ 2 EC_PME#_R BE36 AV29 PLT_RST#
<51,58> EC_PME# GPP_A11/PME#/SD_VDD2_PWR_EN# GPP_B13/PLTRST# PLT_RST# <58,66>
RH24 0_0402_5% XEMC@
R15 Y47
R13 RSVD2 GPP_K16/GSXCLK Y46 GPIO Serial Expander (GSX) is the capability
RSVD1 GPP_K12/GSXDOUT Y48 provided by the PCH to expand the GPIOs
CRB connect GND GPP_K13/GSXSLOAD on a platform that needs more GPIOs than the
W46 ones provided by the PCH.
RH186 1 @ 2 0_0402_5% AL37 GPP_K14/GSXDIN AA45
AN35 VSS GPP_K15/GSXSRESET#
TH6 TP@ TP
RH258 1 NTPM@ 2 0_0402_5% PCH_SPI_SI AU41 AL47
<66> PCH_SPI_SI_R SPI0_MOSI GPP_E3/CPU_GP0
RH259 1 NTPM@ 2 0_0402_5% PCH_SPI_SO BA45 AM45
<66> PCH_SPI_SO_R PCH_SPI_CS#0 AY47 SPI0_MISO GPP_E7/CPU_GP1 TP_INT# +3VS
BF32 2 1
PCH_SPI_CLK SPI0_CS0# GPP_B3/CPU_GP2 EC_TP_INT# <58,63>
RH260 1 NTPM@ 2 0_0402_5% AW47 BC33 DH1
<66> PCH_SPI_CLK_R SPI0_CLK GPP_B4/CPU_GP3
intel critical net recommend AW48 RB751V-40_SOD323-2
SPI0_CS1# AE44 TP_INT# RH28 2 1 100K_0402_5%
PCH_SPI_IO2 AY48 GPP_H18/SML4ALERT# AJ46
PCH_SPI_IO3 BA46 SPI0_IO2 GPP_H17/SML4DATA AE43
PCH_SPI_CLK RH195 1 @ 2 100K_0201_5% AT40 SPI0_IO3 GPP_H16/SML4CLK AC47 GPP_H15
<66> PCH_SPI_CS#2 SPI0_CS2# GPP_H15/SML3ALERT# AD48
BE19 GPP_H14/SML3DATA AF47
BF19 GPP_D1/SPI1_CLK/SBK1_BK1 GPP_H13/SML3CLK AB47 GPP_H12
GPP_D0/SPI1_CS#/SBK0_BK0 GPP_H12/SML2ALERT# GPP_H12 <19> +RTCVCC
BF18 AD47
BE18 GPP_D3/SPI1_MOSI/SBK3_BK3 GPP_H11/SML2DATA AE48
BC17 GPP_D2/SPI1_MISO/SBK2_BK2 GPP_H10/SML2CLK
* wait confirm CG7 GPP_D22/SPI1_IO3 SM_INTRUDER#
PDG P348 quad mode support PH1K BD17 1 OF 13 BB44 1M_0402_5% 2 1 RH30
GPP_D21/SPI1_IO2 INTRUDER#
CRB PU 20k
+3VALW _SPI #571182_CFL_PCH_EDS_Rev1.0 recommend 100k CNP-H_BGA874 Rev1.0 RVP: 330K
#571391_CFL_H_PDG_Rev0p71
R2 = 5ohm for SPI dual-load A 1 M pull-up is used on the customer reference
1 board (CRB). This is needed to reduce leakage 1
from Coin Cell Battery in G3 state.
RH25 2 1 1K_0402_5% PCH_SPI_IO2 RH258 RH259 RH260
RH26 2 1 1K_0402_5% PCH_SPI_IO3
RH27 2 1 1K_0402_5%PCH_SPI_SI
4.99_0402_1% 4.99_0402_1% 4.99_0402_1%
+3VALW _PCH_PRIM SD034499B80 SD034499B80 SD034499B80
TPM@ TPM@ TPM@
RH29 2 1 100K_0402_5% GPP_H15 STRAP
#571182_CNL_PCH_H_EDS_V1_Rev0.7
External pull-up is required. Recommend 100K if pulled
up to 3.3V or 75K if pulled up to 1.8V.
571007_CFL_MOW_Archive_WW22_2017
STUFF R on GPP_H15
PCH PLTRST Buffer RH32 1 @ 2 0_0402_5%

SPI ROM ( 16MByte )
+3VALW _SPI +3VS
+3VALW _SPI
CH10 0.1U_0201_10V6K
UH2 PCH_SPI_CS#0
1 2 1 @ 2 CH11 1 2
PCH_SPI_CS#0 1 8 RH31 4.7K_0402_5%
PCH_SPI_SO_0_R 2 /CS VCC 7 PCH_SPI_IO3_0_R 0.1U_0201_10V6K
PCH_SPI_IO2_0_R 3 DO(IO1) /HOLD(IO3) 6 PCH_SPI_CLK_0_R
/WP(IO2) CLK
5
4 5 PCH_SPI_SI_0_R UH3
GND DI(IO0) PLT_RST# 1
P
B 4
W 25Q128FVSIQ_SO8 Y PLT_RST_BUF# <25,51,52,68>
2
A
G
P/N: SA0000B8400 , XMC
TC7SH08FU_SSOP5
3
PCH_SPI_SI_0_R RH107 1 2 33_0402_1% PCH_SPI_SI_R SA00000OH00
PCH_SPI_SO_0_R RH108 1 2 33_0402_1% PCH_SPI_SO_R
PCH_SPI_IO3_0_R 1 2 PCH_SPI_IO3
PCH_SPI_CLK_0_R 1
@
PCH_SPI_CLK_0_R
RH109 33_0402_1%
PCH_SPI_CLK_R
EH50F:main source change to SA00000OH00
@ 2 1 2 RH110 1 2 33_0402_1%
PCH_SPI_IO2_0_R RH111 1 2 33_0402_1% PCH_SPI_IO2
RH33 CH12
0_0402_5% 68P_0402_50V8J intel PDG 1.8
33 ohm for 3.3V for singel load
place 500 mil from PCH
note : 1050 Use 8M rom

PCH(3/8)DDC/SPI
A
A B C D E
#571391_CFL_H_PDG_Rev0p5
‧ eSPI clock and eSPI data mismatched: <500 mils.
‧ eSPI clock and eSPI chip select mismatched: <500 mils.
‧ eSPI signal maximum 9 Vias
* If DATA signals are entirely routed on MS, stuff the resistor with 15 Ohm.
CNP-H
UH1F
F9 BB39 LPC_AD0
<71> USB3_PTX_DRX_N1 USB31_1_TXN 1.8V GPP_A1/LAD0/ESPI_IO0 LPC_AD1 LPC_AD0 <58>
F7 AW37 LPC Bus check straps
<71> USB3_PTX_DRX_P1 USB31_1_TXP (eSPI) GPP_A2/LAD1/ESPI_IO1 LPC_AD2 LPC_AD1 <58>
USB3 MB <71> USB3_PRX_DTX_N1 D11 AV37
USB31_1_RXN GPP_A3/LAD2/ESPI_IO2 LPC_AD3 LPC_AD2 <58>
<71> USB3_PRX_DTX_P1 C11 BA38 LPC : +3.3V
USB31_1_RXP GPP_A4/LAD3/ESPI_IO3 LPC_AD3 <58>
C3
<42> USB3_PTX_DRX_N2 USB31_2_TXN LPC_FRAME#
D4 BE38
<42> USB3_PTX_DRX_P2 USB31_2_TXP GPP_A5/LFRAME#/ESPI_CS0# TPM_SERIRQ LPC_FRAME# <58>
1 USB3 Type C <42> USB3_PRX_DTX_N2 B9 AW35 TPM_SERIRQ <58,66> +3VS 1
C9 USB31_2_RXN GPP_A6/SERIRQ/ESPI_CS1# BA36 LPC_PIRQA#
<42> USB3_PRX_DTX_P2 USB31_2_RXP GPP_A7/PIRQA#/ESPI_ALERT0# BE39 KBRST#
C17 GPP_A0/RCIN#/ESPI_ALERT1# BF38 ESPI_RST# RH262 1 @ 2 0_0402_5%
USB31_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET# OVRM_EN <22,58> TPM_SERIRQ
C16 2 1 RH37
G14 USB31_6_TXP BB36 CLK_LPC RH35 2 1 22_0402_5%
USB31_6_RXN GPP_A9/CLKOUT_LPC0/ESPI_CLK CLK_LPC_R <58> 10K_0402_5%
F14 BB34
C15 USB31_6_RXP GPP_A10/CLKOUT_LPC1
B15 USB31_5_TXN T48
J13 USB31_5_TXP GPP_K19/SMI# T47 LPC_PIRQA# 1 2 RH38
K13 USB31_5_RXN GPP_K18/NMI#
USB31_5_RXP Raptor 10K_0402_5%
G12 AH40
<72> USB3_PTX_DRX_P3 USB31_3_TXP GPP_E6/SATA_DEVSLP2 SSD_DEVSLP1
F11 AH35
<72> USB3_PTX_DRX_N3 USB31_3_TXN GPP_E5/SATA_DEVSLP1 SSD_DEVSLP1 <68>
USB3 MB <72> USB3_PRX_DTX_P3 C10 AL48 KBRST# 1 2 RH248
B10 USB31_3_RXP GPP_E4/SATA_DEVSLP0 AP47
<72> USB3_PRX_DTX_N3 USB31_3_RXN GPP_F9/SATA_DEVSLP7
CONFIRM WITH SW 10K_0402_5%
AN37
C14 GPP_F8/SATA_DEVSLP6 AN46
<73> USB3_PTX_DRX_P4 USB31_4_TXP GPP_F7/SATA_DEVSLP5
B14 AR47
<73> USB3_PTX_DRX_N4 USB31_4_TXN GPP_F6/SATA_DEVSLP4
USB3 SUB <73> USB3_PRX_DTX_P4 J15 AP48
K16 USB31_4_RXP 6 OF 13 GPP_F5/SATA_DEVSLP3
<73> USB3_PRX_DTX_N4 USB31_4_RXN
CNP-H_BGA874 Rev1.0
Raptor
CNP-H
2 UH1C 2
CL_CLK AR2 G36 PCIE_PRX_DTX_N9
TH10 TP@ CL_DATA CL_CLK PCIE9_RXN PCIE_PRX_DTX_P9 PCIE_PRX_DTX_N9 <68>
For Intel CLINK TH11 TP@ AT5 F36
CL_RST# AU4 CL_DATA PCIE9_RXP C34 PCIE_PTX_DRX_N9 PCIE_PRX_DTX_P9 <68>
TH12 TP@ CL_RST# PCIE9_TXN PCIE_PTX_DRX_P9 PCIE_PTX_DRX_N9 <68>
M.2 SSD-1 PCIE L3
D34
P48 PCIE9_TXP PCIE_PTX_DRX_P9 <68>
V47 GPP_K8
V48 GPP_K9 K37 PCIE_PRX_DTX_N10
HDD GPP_K10 PCIE10_RXN PCIE_PRX_DTX_P10 PCIE_PRX_DTX_N10 <68>
W47 J37
GPP_K11 PCIE10_RXP C35 PCIE_PTX_DRX_N10 PCIE_PRX_DTX_P10 <68>
PCIE10_TXN PCIE_PTX_DRX_P10 PCIE_PTX_DRX_N10 <68>
M.2 SSD-1 PCIE L2
L47 B35
L46 GPP_K0 PCIE10_TXP PCIE_PTX_DRX_P10 <68>
Raptor U48 GPP_K1
GPP_K2 PCIE15_RXN/SATA2_RXN
F44 PCIE_PRX_DTX_N15
PCIE_PRX_DTX_P15 PCIE_PRX_DTX_N15 <52>
U47 E45 NGFF
N48 GPP_K3 PCIE15_RXP/SATA2_RXP B40 PCIE_PTX_DRX_N15 PCIE_PRX_DTX_P15 <52>
N47 GPP_K4 PCIE_15_SATA_2_TXN C40 PCIE_PTX_DRX_P15 PCIE_PTX_DRX_N15 <52> WL+BT(KEY E)
P47 GPP_K5 PCIE15_TXP/SATA2_TXP PCIE_PTX_DRX_P15 <52>
R46 GPP_K6 L41
GPP_K7 PCIE16_RXN/SATA3_RXN M40
C36 PCIE16_RXP/SATA3_RXP B41
<68> PCIE_PTX_DRX_P11 B36 PCIE11_TXP/SATA0A_TXP PCIE16_TXN/SATA3_TXN C41
<68> PCIE_PTX_DRX_N11 F39 PCIE11_TXN/SATA0A_TXN PCIE16_TXP/SATA3_TXP
M.2 SSD-1 PCIE L1 <68> PCIE_PRX_DTX_P11 PCIE11_RXP/SATA0A_RXP
G38 K43
<68> PCIE_PRX_DTX_N11 PCIE11_RXN/SATA0A_RXN PCIE17_RXN/SATA4_RXN K44 SATA_PRX_DTX_N4 <67>
AR42 PCIE17_RXP/SATA4_RXP A42 SATA_PRX_DTX_P4 <67>
GPP_F10/SATA_SCLOCK PCIE17_TXN/SATA4_TXN SATA_PTX_DRX_N4 <67>
HDD
AR48 B42
Raptor DGPU_PRSNT# AU47 GPP_F11/SATA_SLOAD
GPP_F13/SATA_SDATAOUT0
PCIE17_TXP/SATA4_TXP SATA_PTX_DRX_P4 <67>
+3VS
AU46 P41
GPP_F12/SATA_SDATAOUT1 PCIE18_RXN/SATA5_RXN R40
3 PCIE_PTX_DRX_N14 C39 PCIE18_RXP/SATA5_RXP C42 3
<51> PCIE_PTX_DRX_N14 PCIE_PTX_DRX_P14 PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN
D39 D42
<51> PCIE_PTX_DRX_P14 PCIE_PRX_DTX_N14 PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP
GLAN D46
<51> PCIE_PRX_DTX_N14 PCIE_PRX_DTX_P14 PCIE14_RXN/SATA1B_RXN
C47 AK48
<51> PCIE_PRX_DTX_P14 PCIE14_RXP/SATA1B_RXP GPP_E8/SATA_LED#
B38 AH41
C38 PCIE13_TXN/SATA0B_TXN GPP_E0/SATAXPCIE0/SATAGP0 AJ43 SATA_GP1
C45 PCIE13_TXP/SATA0B_TXP GPP_E1/SATAXPCIE1/SATAGP1 AK47 SATA_GP1 <68> SATA_GP1 RH201 2 1 10K_0402_5%
C46 PCIE13_RXN/SATA0B_RXN GPP_E2/SATAXPCIE2/SATAGP2 AN47 RH187 1 @ 2 10K_0402_5%
PCIE13_RXP/SATA0B_RXP GPP_F0/SATAXPCIE3/SATAGP_3 AM46
GPP_F1/SATAXPCIE4/SATAGP4 SATA_GP5
M.2 SSD PCIE/SATA select pin
E37 AM43 TP@ TH13
<68> PCIE_PTX_DRX_P12 D38 PCIE12_TXP/SATA1A_TXP GPP_F2/SATAXPCIE5/SATAGP5 AM47
<68> PCIE_PTX_DRX_N12 J41 PCIE12_TXN/SATA1A_TXN GPP_F3/SATAXPCIE6/SATAGP6 AM48
M.2 SSD-1 PCIE L0 <68> PCIE_PRX_DTX_P12 PCIE12_RXP/SATA_1A_RXP GPP_F4/SATAXPCIE7/SATAGP7
H42
<68> PCIE_PRX_DTX_N12 PCIE12_RXN/SATA1A_RXN AU48 PCH_BKL_PW M
GPP_F21/EDP_BKLTCTL PCH_BKL_PW M <38>
B44 AV46 ENBKL
PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN PCH_ENVDD ENBKL <58>
A44 AV44
R37 PCIE20_TXN/SATA7_TXN
PCIE20_RXP/SATA7_RXP
GPP_F19/EDP_VDDEN
PCH_THERMTRIP# RH40 1
PCH_ENVDD <38>
#571391_CFL_H_PDG_Rev0p5.pdf Raptor:conf i r m wt ih SW
R35 AD3 2 620_0402_5%
PCIE20_RXN/SATA7_RXN THRMTRIP# PCH_PECI PCH_THERMTRIP#_R <10>
D43 AF2 RH41 1 @ 2 13_0402_5% H_PECI
PCIE19_TXP/SATA6_TXP PECI H_PM_SYNC H_PECI <10,58>
C44 AF3 RH42 1 2 30_0402_5% H_PM_SYNC_R
+3VALW _PCH_PRIM PCIE19_TXN/SATA6_TXN PM_SYNC H_PLTRST_CPU# H_PM_SYNC_R <10>
N42 AG5
PCIE19_RXP/SATA6_RXP 3 OF 13 PLTRST_CPU# H_PM_DOW N_R H_PLTRST_CPU# <10>
M44 AE2
PCIE19_RXN/SATA6_RXN PM_DOWN H_PM_DOW N_R <10>
1
CNP-H_BGA874 Rev1.0
RH43
10K_0402_5% UMA@ XEMC@
H_PECI .1U_0402_16V7K 1 2 CH50
2
4 4
DGPU_PRSNT#
1
RH44
GPP_F13 Security Classification Compal Secret Data Compal Electronics, Inc.
10K_0402_5% VGA@ DGPU_PRSNT# 2019/12/28 2019/12/28 Title
DIS,Optimus 0 PCIE/SATA/USB3/eSPI
2
Custom 1.0
UMA 1 Raptor DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A B C D E
A B C D E
+1.2V_VDDQ
<58> ME_EN 1 @ 2
RH45 0_0402_5%
2
RH226 1 2 33_0402_5% HDA_RST#
<56> HDA_RST#_R
RH46
RH227 1 2 33_0402_5% HDA_BIT_CLK 470_0402_1%
<56> HDA_BIT_CLK_R
RH228 1 2 33_0402_5% HDA_SDOUT
<56> HDA_SDOUT_R
1
DRAM_RESET# 1 2
HDA_SYNC DDR_DRAMRST#_R <23,24>
RH229 1 2 33_0402_5% RH47 0_0402_5%
<56> HDA_SYNC_R
Raptor
2 1 @
1 CH13 1U_0201_6.3V6M 1
100K_0201_5% 2 1RH196 HDA_BIT_CLK CNP-H
100K_0201_5% 2 1RH197 HDA_RST# UH1D
HDA_BIT_CLK BD11 BF36
HDA_SDIN0 BE11 HDA_BCLK/I2S0_SCLK GPP_A12/BM_BUSY#/ISH_GP6/SX_EXIT_HOLDOFF# AV32 PM_CLKRUN#
intel critical net recommend <56> HDA_SDIN0 HDA_SDOUT BF12 HDA_SDI0/I2S0_RXD GPP_A8/CLKRUN#
HDA_SYNC BG13 HDA_SDO/I2S0_TXD BF41 LAN_DISABLE_N
HDA_SYNC/I2S0_SFRM GPD11/LANPHYPC TP@ TH14
del RF reserve cap on HDA HDA_RST# BE10 BD42 SLP_W LAN#
HDA_RST#/I2S1_SCLK GPD9/SLP_WLAN# TP@ TH15
BF10
BE12 HDA_SDI1/I2S1_RXD BB46 DRAM_RESET#
BD12 I2S1_TXD/SNDW2_DATA DRAM_RESET# BE32 PCH_VRALERT#
I2S1_SFRM/SNDW2_CLK GPP_B2/VRALERT# BF33 TYPEC_3A
RH48,49 close to PCH GPP_B1/GSPI1_CS1#/TIME_SYNC1 BE29
TYPEC_3A <43>
RH48 1 2 30_0402_5% CPU_DISPA_SDO AM2 GPP_B0/GSPI0_CS1# R47 PCH_GPP_K17
<6> CPU_DISPA_SDO_R CPU_DISPA_SDI_R HDACPU_SDO GPP_K17/ADR_COMPLETE PCH_GPP_B11 TP@ TH19
AN3 AP29 TP@ TH20
<6> CPU_DISPA_SDI_R RH49 1 CPU_DISPA_BCLK HDACPU_SDI GPP_B11/I2S_MCLK SYS_PW ROK
2 30_0402_5% AM3 AU3 SYS_PW ROK <58,78>
<6> CPU_DISPA_BCLK_R HDACPU_SCLK SYS_PWROK
FOR Jefferson Peak RESET pin is glitch free,it AV18 BB47 W AKE#
AW18 GPP_D8/I2S2_SCLK WAKE# BE40 PM_SLP_A#
is recommended that a pull-down resistor of 75K CLKREQ_CNV# BA17 GPP_D7/I2S2_RXD GPD6/SLP_A# BF40 SLP_LAN# TP@ TH37
ohm on GPP_D5(CNV_RF_RESET#) <52> CLKREQ_CNV# CNV_RF_RESET# GPP_D6/I2S2_TXD/MODEM_CLKREQ SLP_LAN# TP@ TH21
BE16 BC28
<52> CNV_RF_RESET# GPP_D5/I2S2_SFRM/CNV_RF_RESET# GPP_B12/SLP_S0# PM_SLP_S3#
<56> PCH_DMIC_DATA0 BF15 BF42
BD16 GPP_D20/DMIC_DATA0/SNDW4_DATA 1.8V GPD4/SLP_S3# BE42 PM_SLP_S4# PM_SLP_S3# <58,78>
<56> PCH_DMIC_CLK0 GPP_D19/DMIC_CLK0/SNDW4_CLK GPD5/SLP_S4# PM_SLP_S5# PM_SLP_S4# <58,78>
AV16 BC42
+RTCVCC TH22 TP@
TH24 TP@ AW15 GPP_D18/DMIC_DATA1/SNDW3_DATA
GPP_D17/DMIC_CLK1/SNDW3_CLK
GPD10/SLP_S5# TP@ TH23
Raptor TBT
PCH_SRTCRST# BE45 SUSCLK
RH50 1 2 20K_0402_1% GPD8/SUSCLK PM_BATLOW # SUSCLK <52,68>
BF44
GPD0/BATLOW# BE35 SUSACK#_R
CH18 1 2 1U_0201_6.3V6M PCH_RTCRST# GPP_A15/SUSACK# TP@ T207
2 BE47 BC37 1 @ 2 2
<58> PCH_RTCRST# PCH_SRTCRST# RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK SUSPW RDNACK <58>
CLR ME BD46 RH51 0_0402_5%
SRTCRST#
Delay 18~25 ms
PCH_PW ROK AY42 BG44 LAN_W AKE#
PCH_RTCRST# <58,78> PCH_PW ROK EC_RSMRST# PCH_PWROK GPD2/LAN_WAKE# AC_PRESENT_R AC_PRESENT
RH52 1 2 20K_0402_1% <58> EC_RSMRST# BA47 BG42 1 @ 2 AC_PRESENT <58>
RSMRST# GPD1/ACPRESENT BD39 SLP_SUS# RH53
SLP_SUS# PBTN_OUT#_R TP@ 0_0402_5% --No Support Deep Sx
PBTN_OUT#
BE46 1 2
@ T208 PBTN_OUT# <58>
CH19 1 2 1U_0201_6.3V6M PCH_DPW ROK AW41 GPD3/PWRBTN# AU2 SYS_RESET# RH54 0_0402_5%
PCH_SMBALERT# BE25 DSW_PWROK SYS_RESET# AW29 PCH_SPKR
ECLR CMOS <19> PCH_SMBALERT# PCH_SMBCLK GPP_C2/SMBALERT# GPP_B14/SPKR H_CPUPW RGD PCH_SPKR <19,56>
JCMOS1 1 @ 2 0_0603_5% Delay 18~25 ms BE26 AE3
PCH_SMBDATA GPP_C0/SMBCLK CPUPWRGD H_CPUPW RGD <10>
BF26
PCH_SML0ALERT# BF24 GPP_C1/SMBDATA AL3 XDP_ITP_PMODE
<19> PCH_SML0ALERT# PCH_SML0CLK GPP_C5/SML0ALERT# ITP_PMODE CPU_XDP_TCK0 TP@ T209
BF25 AH4 CPU_XDP_TCK0 <10>
PCH_SML0DATA BE24 GPP_C3/SML0CLK PCH_JTAGX AJ4 CPU_XDP_TMS
PCH_SML1ALERT# BD33 GPP_C4/SML0DATA PCH_JTAG_TMS AH3 CPU_XDP_TDO CPU_XDP_TMS <10>
<19> PCH_SML1ALERT# PCH_SML1CLK BF27 GPP_B23/SML1ALERT#/PCHHOT# PCH_JTAG_TDO AH2 CPU_XDP_TDI CPU_XDP_TDO <10> Connect CPU & PCH
+3VALW _DSW GPP_C6/SML1CLK PCH_JTAG_TDI CPU_XDP_TDI <10>
PCH_SML1DATA BE27 4 OF 13 AJ3 PCH_JTAG_TCK1
GPP_C7/SML1DATA PCH_JTAG_TCK PCH_JTAG_TCK1 <10>
CNP-H_BGA874 Rev1.0
RH55 2 1 1K_0402_5% W AKE#
RH56 2 1 8.2K_0402_5% PM_BATLOW # +3VALW _DSW PM_SLP_S3# RH193 1 2 100K_0201_5%

+3VS PM_SLP_S4# RH194 1 2 100K_0201_5%
RH57 2 @ 1 100K_0402_5% AC_PRESENT_R
RH225 1 2 10K_0402_5% LAN_W AKE# intel critical net recommend
RH58 2 @ 1 100K_0402_5% PBTN_OUT#_R
5
G
QH7B
3 EC_RSMRST# 1 2 PCH_DPW ROK 3
2N7002KDW _SOT363-6 (DDR,G-Sensor) @
RH59 0_0402_5%
PCH_SMBCLK 3 4 D_CK_SCLK
S
D_CK_SCLK <23,24>
D
+3VALW _PCH_PRIM PCH_PW ROK RH223 1 2 10K_0402_5%

G
QH7A
2N7002KDW _SOT363-6 2 1 SYS_RESET# EC_RSMRST# RH224 1 2 10K_0402_5%
RH183 10K_0402_5%
PCH_SMBDATA 6 1D_CK_SDATA
+3VS
S
D_CK_SDATA <23,24>
D
100K_0402_5% 1 @ 2 RH184 SYS_PW ROK

RH60 2 1 10K_0402_5% PM_CLKRUN#
100K_0402_5% 1 @ 2 RH61 PCH_DPW ROK
RH191 2 1 2.2K_0402_5% D_CK_SCLK XEMC@

RH192 2 1 2.2K_0402_5% D_CK_SDATA .1U_0402_16V7K 1 2 CH20 SYS_RESET# +3VALW _PCH_PRIM
XEMC@ PCH_VRALERT# RH62 2 @ 1 10K_0402_5%

.1U_0402_16V7K 1 2 CH21 SYS_PW ROK
+3VALW _PCH_PRIM
XEMC@
.1U_0402_16V7K 1 2 CH22 PCH_PW ROK
RH230 2 1 2.2K_0402_5% PCH_SMBCLK
XEMC@
RH231 2 1 2.2K_0402_5% PCH_SMBDATA .1U_0402_16V7K 1 2 CH51 EC_RSMRST#
RH232 2 1 2.2K_0402_5% PCH_SML1CLK

4 PCH_SML1CLK <25,58,66> 4
(EC, VGA, Thermal Sensor) From ESD Team Request
RH233 2 1 2.2K_0402_5% PCH_SML1DATA
PCH_SML1DATA <25,58,66> Near PCH side

1 2 PCH_SML0CLK PCH(5/8)PMU/HDA/SMBUS/DMIC
RH63 499_0402_1% AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1 2 PCH_SML0DATA DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
RH64 499_0402_1% MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. EH50F M/B LA-H431PR10
A B C D E
A B C D E
+3VALW _PCH_PRIM
CNP-H
RH234 2 1 2.2K_0402_5% I2C_1_SCL UH1K
RH235 2 1 2.2K_0402_5% I2C_1_SDA
I2C_0_SCL
Raptor GSPI1_MOSI VGA_ID1
RH236 2 1 2.2K_0402_5% BA26 BA20
RH237 2 1 2.2K_0402_5% I2C_0_SDA BD30 GPP_B22/GSPI1_MOSI GPP_D9/ISH_SPI_CS#/GSPI2_CS0# BB20 VGA_ID2
EC_SCI# AU26 GPP_B21/GSPI1_MISO GPP_D10/ISH_SPI_CLK/GSPI2_CLK BB16 PROJECT_ID0
<58> EC_SCI# GPP_B20/GSPI1_CLK GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO PROJECT_ID1
AW26 AN18
+3VS GPP_B19/GSPI1_CS0# GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI
GSPI0_MOSI BE30 BF14
RH66 2 @ 1 10K_0402_5% EC_SCI# GC6_FB_EN BD29 GPP_B18/GSPI0_MOSI GPP_D16/ISH_UART0_CTS#/CNV_WCEN AR18
TS_EN BF29 GPP_B17/GSPI0_MISO GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/CNV_WFEN BF17 SUB_DET
<38,58> TS_EN GPP_B16/GSPI0_CLK GPP_D14/ISH_UART0_TXD/I2C2_SCL
1 RH68 2 1 49.9K_0402_1% UART_2_PRXD_DTXD BB26 BE17 CPU_ID 1
GPP_B15/GSPI0_CS0# GPP_D13/ISH_UART0_RXD/I2C2_SDA
RH69 2 1 49.9K_0402_1% UART_2_PTXD_DRXD check needed? BB24
DGPU_AC_DETECT BE23 GPP_C9/UART0A_TXD
<25,58,83> DGPU_AC_DETECT GPP_C8/UART0A_RXD
RH70 2 @ 1 49.9K_0402_1% UART_2_PRTS_DCTS AP24
GPU_EVENT_R# BA24 GPP_C11/UART0A_CTS#
CG11 connect to GPP_B15 GPP_C10/UART0A_RTS#
RH71 2 @ 1 49.9K_0402_1% UART_2_PCTS_DRTS AG45
BD21 GPP_H20/ISH_I2C0_SCL AH46
RH72 1 VGA@ 2 10K_0402_5% DGPU_PW R_EN AW24 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H19/ISH_I2C0_SDA
DGPU_HOLD_RST# AP21 GPP_C14/UART1_RTS#/ISH_UART1_RTS# AH47
<25> DGPU_HOLD_RST# DGPU_PW R_EN GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_H22/ISH_I2C1_SCL
AU24 AH48
<25,37> DGPU_PW R_EN GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H21/ISH_I2C1_SDA
UART_2_PCTS_DRTS AV21
UART_2_PRTS_DCTS AW21 GPP_C23/UART2_CTS#
UART_2_PTXD_DRXD BE20 GPP_C22/UART2_RTS# AV34
<52> UART_2_PTXD_DRXD UART_2_PRXD_DTXD GPP_C21/UART2_TXD GPP_A23/ISH_GP5
BD20 AW32
<52> UART_2_PRXD_DTXD GPP_C20/UART2_RXD GPP_A22/ISH_GP4 BA33 Raptor: delete needless strap
I2C_1_SCL BE21 GPP_A21/ISH_GP3 BE34
<63> I2C_1_SCL GPP_C19/I2C1_SCL GPP_A20/ISH_GP2
RH73 1 VGA@ 2 10K_0402_5% DGPU_HOLD_RST# I2C_1_SDA BF21 BD34 PANEL_OD_EN
<63> I2C_1_SDA I2C_0_SCL GPP_C18/I2C1_SDA GPP_A19/ISH_GP1 PANEL_OD_EN <38>
BC22 BF35
I2C_0_SDA BF23 GPP_C17/I2C0_SCL GPP_A18/ISH_GP0 BD38
GPP_C16/I2C0_SDA GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7
BE15
+3VALW _PCH_PRIM BE14 GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4_BK4
11 OF 13
GPP_D23/ISH_I2C2_SCL/I2C3_SCL
CNP-H_BGA874 Rev1.0
RH74 1 @ 2 4.7K_0402_5% GPP_H12 <Touch PAD>
GPP_H12 <16>
This signal has a weak internal pull-down. STRAP
2 0 = Master Attached Flash Sharing (MAFS) enabled (Default) Raptor:delete needless vga/project id 2
1 = Slave Attached Flash Sharing (SAFS) enabled.
Notes:
1. This signal is in the primary well.
Warning: This strap must be configured to ‘ 0’ i f th e +1.8VALW _PRIM
eSPI or LPC strap is configured to ‘ 0’
GPU_EVENT_R# 1 @ 2 GPU_EVENT# CPU_ID RH208 1 H82@ 2 1K_0402_5%

GPU_EVENT# <25>
RH200 0_0402_5%
GC6_FB_EN 1 @ 2 GC6_FB_EN3V3 RH207 1 H62@ 2 10K_0402_5%
GC6_FB_EN3V3 <25,37>
RH199 0_0402_5%
+3VALW _PCH_PRIM
FOR 40 PIN SUB/B +1.8VALW _PRIM

RH112 1 @ 2 4.7K_0402_5%
PCH_SMBALERT# <18>
SMBALERT# / GPP_C2 has a weak internal Pull-down. SUB_DET RH185 1 @ 2 1K_0402_5%
0 = Disable Intel ME (TLS) (Default) VBIOS select
1 = Enable Intel ME (TLS) +1.8VALW _PRIM +1.8VALW _PRIM
VGA_ID1 RH84 1 @ 2 1K_0402_5% PROJECT_ID0 RH88 1 @ 2 1K_0402_5%

RH113 1 @ 2 4.7K_0402_5%
PCH_SML0ALERT# <18>
RH85 1 2 10K_0402_5% RH89 1 2 10K_0402_5%
SML0ALERT# / GPP_C5 has a weak internal Pull-down.
0 = LPC is selected (for EC 9022).
1 = eSPI is selected VGA_ID2 PROJECT_ID1
RH86 1 @ 2 1K_0402_5% RH90 1 @ 2 1K_0402_5%
RH87 1 2 10K_0402_5% RH91 1 2 10K_0402_5%

3 RH114 1 2 150K_0402_1% 3
PCH_SML1ALERT# <18>
SML1ALERT# / GPP_B23 has an internal pull-down.
0 = Disable IntelR DCI-OOB (Default)
1 = Enable IntelR DCI-OOB
STRAP
VGA_ID2 VGA_ID1 Project_ID1 Project_ID0
VGA ID Project ID
GPP_D10 GPP_D9 GPP_D12 GPP_D11
+3VS Default 0 0 EH50F(2060 WO RD) 0 0
Reserved 0 1 EH50F(2060 W RD) 0 1
RH77 1 @ 2 4.7K_0402_5% GSPI0_MOSI STRAP Reserved 1 0 EH5VF(2050 WO RD) 1 0
The signal has a weak internal Pull-down.
0 = Disable “ No Reboot” mode . (Default) Reserved 1 1 EH5VF(2050 W RD) 1 1
1 = Enable “ No Reboot” mod e (PC H wil l disabl e th e
TCO Timer system reboot feature). This function is
useful when running ITP/XDP. SCI capability is available on all GPIOs
Notes: PCH GPIOs that can be routed to generate SMI# or NMI:
1. The internal Pull-down is disabled after ‧ GPP_B14, GPP_B20, GPP_B23
PCH_PWROK is high. ‧ GPP_C[23:22]
‧ GPP_D[4:0]
‧ GPP_E[8:0]
‧ GPP_I[3:0]
‧ GPP_G[7:0] (support SMI# only).
@ GSPI1_MOSI The voltage of all GPIO pads in each GPP group is determined by the voltage supplied to the group (either 3.3V or 1.8V),
RH80 1 2 150K_0402_1% STRAP except for GPP_I and GPD group, (which are 3.3V only), and GPP_J group (which is 1.8V only).
This Signal has a weak internal Pull-down.
4 0: SPI (Default) All GPIOs have programmable internal pull-up/pull-down resistors which are off by default. 4
1: LPC The internal pull-up/pull-down for each GPIO can be enabled by BIOS programming.
Notes:
1. The internal Pull-down is disabled after PCH_PWROK is high.
RH83 2 @ 1 100K_0402_5% PCH_SPKR Security Classification Compal Secret Data Compal Electronics, Inc.
PCH_SPKR <18,56>
Top
0 =
Swap Override
Disable “ Top Swap” mode. (Default
)
STRAP PCH(6/8)GPIO/I2C/UART/STRAP
1 = Enable “ Top Swap” mode
. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
The internal Pull-down is disabled after PCH_PWROK is high. AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
A B C D E
A B C D E
GPIO Group Voltage
GPPA 3.3V
+1.05VALW_PCH_PRIM
+1.05VALW CNP-H +3VALW_PCH_PRIM
+1.05VALW_PCH_PRIM UH1H GPPB
5.95A AA22 AW9 0.182A GPPC 3.3V
@ JPH1 AA23 VCCPRIM_1P051 VCCPRIM_3P32
1 2 5.95A AB20 VCCPRIM_1P052 BF47 +VCCRTCEXT
1 2 HSIO for DMIU/USB3.1/PCIE=4162mA VCCPRIM_1P053 DCPRTC1 +VCCRTCEXT GPPD 3.3V
AB22 BG47 +VCCRTCEXT * 1.8V
VCCPRIM_1P054 DCPRTC2
1U_0201_6.3V6M
JUMP_43X79 1 AB23
VCCPRIM_1P055 +3VALW_SPI
0.1U_0201_10V6K
AB27 V23 0.095A GPPE
VCCPRIM_1P056 VCCPRIM_3P35
CH23
AB28 1 3.3V
VCCPRIM_1P057 GPPF
CH24
AB30 AN44 0.05A
2 AD20 VCCPRIM_1P058 VCCSPI +RTCVCC
AD23 VCCPRIM_1P059 BC49
1 GPPG 3.3V 1
AD27 VCCPRIM_1P0510 VCCRTC1 BD49 2
AD28 VCCPRIM_1P0511 VCCRTC2
AD30 VCCPRIM_1P0512 AN21 0.145A GPPH 3.3V
AF23 VCCPRIM_1P0513 VCCPGPPG_3P3 AY8 GPPK
+1.05VALW_VCCMPHY AF27 VCCPRIM_1P0516 VCCPRIM_3P33 BB7 0.97A
+1.05VALW_VCCMPHY AF30 VCCPRIM_1P0517 VCCPRIM_3P34
@ JPH2
VCCPRIM_1P0518
GPPI 3.3V Only
1 2 6.6A AC35 0.262A
1 2 6.6A U26 VCCPGPPHK1 AC36
JUMP_43X79 U29 VCCPRIM_1P0523 VCCPGPPHK2 AE35 0.174A GPPJ 1.8V Only
V25 VCCPRIM_1P0524 VCCPGPPEF1 AE36
VCCPRIM_1P0525 VCCPGPPEF2 +1.8VALW_PRIM
22U_0603_6.3V6M
1U_0201_6.3V6M
1 V27
VCCPRIM_1P0526 GPD
1
V28 AN24 0.14A 3.3V Only
VCCPRIM_1P0527 VCCPGPPD +1.8VALW_PRIM
CH25
CH26
V30 AN26
2 +1.05VALW_PCH V31 VCCPRIM_1P0528 VCCPGPPBC1 AP26 0.343A
2 VCCPRIM_1P0529 VCCPGPPBC2
0.0012A AD31 AN32 0.101A
VCCPRIM_1P0514 VCCPGPPA
4.7U_0402_6.3V6M
1U_0201_6.3V6M
1 1
0.2A AE17 AT44 0.106A
VCCPRIM_1P0515 VCCPRIM_3P31
CH27
CH28
BE48
3-5MM FROM PACKAGE EDGE 0.42A W22 VCCDSW_3P31 BE49 0.113A
VCCDUSB_1P051 VCCDSW_3P32 +3VALW_DSW +3VALW_HDA 2 2
W23
+1.05VALW_PCH +1.05V_VCCDSW VCCDUSB_1P052 BB14 0.00767A
BG45 VCCHDA AG19
RH94 1 2 0_0603_5% BG46 VCCDSW_1P051 VCCPRIM_1P83 AG20 +1.8VALW_PRIM
0.109A W31 VCCDSW_1P052 VCCPRIM_1P84 AN15 0.766A Close to BB11
+1.05VALW_VCCAZPLL VCCPRIM_MPHY_1P05 VCCPRIM_1P85 AR15
0.015A D1 VCCPRIM_1P86 BB11
E1 VCCPRIM_1P0521 VCCPRIM_1P87 +1.8V_PHVLDO +1.8VALW_PRIM
+1.05VALW_VCCAMPHYPLL 0.213A C49 VCCPRIM_1P0522 AF19 0.882A VCCPHVLDO_1P8
D49 VCCAMPHYPLL_1P051 VCCPRIM_1P81 AF20 +1.8V_PHVLDO RH242 1 @ 2 0_0603_5% (RH242 unpop when External VRM mode )
E49 VCCAMPHYPLL_1P052 VCCPRIM_1P82
+1.05VALW_PCH +1.05VALW_PCH +1.05V_VCCDSW VCCAMPHYPLL_1P053 AG31 0.193A
+1.05VALW_XTAL VCCPRIM_1P0520 +1.05VALW_PCH
0.00428A P2 AF31 0.0895A
VCCA_XTAL_1P051 VCCPRIM_1P0519 +1.05VALW_PCH
P3 AK22
0.169A W19 VCCA_XTAL_1P052 VCCPRIM_1P241 AK23 +1.24V_VCCLDOSRAM_IN +1.24V_PRIM_DPHY
2 VCCA_SRC_1P051 VCCPRIM_1P242 +1.24V_VCCLDOSRAM_IN 2
0.1U_0201_10V6K
0.1U_0201_10V6K
1U_0201_6.3V6M
1 W20 Short pins AJ22,AJ23,AK22,AK23 together

VCCA_SRC_1P052 AJ22
1 1 VCCDPHY_1P241 +1.24V_PRIM_DPHY at surface layer from PDG Rev0.71
CH29
CH30
CH31
0.0198A C1 AJ23 Internal LDO RH96 1 @ 2 0_0402_5%

C2 VCCAPLL_1P054 VCCDPHY_1P242 BG5
2 VCCAPLL_1P055 VCCDPHY_1P243 +1.24V_PRIM_MAR
0.0085A V19 RH96 pop if CNVi is used
2 2 VCCA_BCLK_1P05 K47 VCCMPHY_SENSE 571391_CFL_H_PDG_Rev1p8.pdf
VCCMPHY_SENSE VSSMPHY_SENSE TP@ TH27
0.021A B1 K46 TP@ TH28
For DDX03 R02
B2 VCCAPLL_1P051 VSSMPHY_SENSE
B3 VCCAPLL_1P052 8 OF 13 +1.24V_PRIM_MAR
VCCAPLL_1P053
CNP-H_BGA874 Rev1.0
place near VCCDUSB 1-3MM FROM PACKAGE 1-3MM FROM PACKAGE EDGE
FOR W22/W23 VCCPRIM_MPHY W31
4.7U_0402_6.3V6M
1
CH32
+1.05VALW_PCH 2
+1.05VALW_PCH
+1.05VALW_PCH
0.1U_0201_10V6K
1U_0201_6.3V6M
1 1
+3VALW_PCH_PRIM
CH34
1U_0201_6.3V6M
1
+3VALW_PCH_PRIM +3VALW_PCH_PRIM
CH33
+3VALW +3VALW_PCH_PRIM +3VALW_PCH_PRIM +3VALW_SPI

CH35
2 2
0.1U_0201_10V6K
2
0.1U_0201_10V6K
1U_0201_6.3V6M
1 1
0.1U_0201_10V6K
CH38
RH97 1 2 0_0805_5% RH98 1 2 0_0603_5% 1
CH36
CH37
1
CH39
1-5MM FROM PACKAGE EDGE 1-3MM FROM PACKAGE EDGE 1-5MM FROM PACKAGE EDGE +1.8VALW +1.8VALW_PRIM 2 2
FOR VCCAPLL C1/C2 FOR VCCA_BCLK V19 FOR VCCAPLL B1/B2/B3 +3VALW_DSW 2 @
2 @
RH99 1 2 0_0402_5% RH100 1 @ 2 0_0603_5%
0.1U_0201_10V6K
1
CH40
3 3
1-3MM FROM PACKAGE 1-3MM FROM PACKAGE 1-3MM FROM PACKAGE
FOR PGPPEF AE35/AE37 FOR PGPPHK AC35/AC36 FOR VCCPRIM AY8/BB7
2
+1.05VALW_PCH +3VALW_HDA
+1.05VALW_VCCAZPLL 0_0402_5% 2 @ 1 RH101
RH102 1 2 0_0402_5%
1P_0402_50V8
1P_0402_50V8
1 1
1P_0402_50V8
1P_0402_50V8
CH41
CH42
1 1
CH43
CH44
2 2
@ @
2 2
@ @ reserve filter folloe CRB
8/21
1-3MM FROM PACKAGE EDGE
+1.05VALW_VCCAMPHYPLL
RH103 1 2 0_0402_5%
V/VX : use un-chargeable RTC
RTC Battery
22U_0603_6.3V6M
1U_0201_6.3V6M
1 1
DH2 +RTCVCC +RTCBATT
CH45
CH46
JRTC1
+CHGRTC
2
2 2 1 1
LC filter colse to pin 1
@ RH104 2 1 1K_0402_5% 3 2
+RTCBATT 2
1uF 1-3MM FROM PACKAGE EDGE
0.1U_0201_10V6K
EH50F : BAV70W_SOT323-3 3
GND
1U_0201_6.3V6M
4 1 1 4 4
change to 1k GND
CH48
(follow Intel DG)

CH47
ACES_50271-0020N-001
+1.05VALW_XTAL
2 2 CONN@
RH105 1 2 0_0402_5% SP02000RO00
22U_0603_6.3V6M
1
CH49
2 Issued Date 2019/12/28 Deciphered Date 2019/12/28 Title
@
PCH(7/8)Power
A B C D E
A B C D E
CNP-H
UH1L CNP-H
CNP-H UH1J
UH1I BG3 M24 Y14
A2 AL12 BG33 VSS VSS M32 RSVD7 Y15
A28 VSS VSS AL17 BG37 VSS VSS M34 RSVD8 U37
1 1
A3 VSS VSS AL21 BG4 VSS VSS M49 RSVD6 U35
A33 VSS VSS AL24 BG48 VSS VSS M5 RSVD5
A37 VSS VSS AL26 C12 VSS VSS N12 N32
A4 VSS VSS AL29 C25 VSS VSS N16 RSVD3 R32
A45 VSS VSS AL33 C30 VSS VSS N34 RSVD4
A46 VSS VSS AL38 C4 VSS VSS N35 AH15
A47 VSS VSS AM1 C48 VSS VSS N37 RSVD2 AH14
A48 VSS VSS AM18 C5 VSS VSS N38 RSVD1
A5 VSS VSS AM32 D12 VSS VSS P26
A8 VSS VSS AM49 D16 VSS VSS P29
AA19 VSS VSS AN12 D17 VSS VSS P4 AL2 XDP_PREQ#
VSS VSS VSS VSS PREQ# XDP_PRDY# XDP_PREQ# <10>
AA20 AN16 D30 P46 AM5 XDP_PRDY# <10>
AA25 VSS VSS AN34 D33 VSS VSS R12 PRDY# AM4 CPU_XDP_TRST#
VSS VSS VSS VSS CPU_TRST# PCH_TRIGOUTRH106 1 PCH_TRIGOUT_R CPU_XDP_TRST# <10>
AA27 AN38 D8 R16 AK3 2 30_0402_5%
VSS VSS VSS VSS TRIGGER_OUT CPU_TRIGOUT_R PCH_TRIGOUT_R <13>
AA28 AP4 E10 R26 AK2
VSS VSS VSS VSS TRIGGER_IN CPU_TRIGOUT_R <13>
AA30 AP46 E13 R29
AA31 VSS VSS AR12 E15 VSS VSS R3 10 OF 13
AA49 VSS VSS AR16 E17 VSS VSS R34 CNP-H_BGA874 Rev1.0
AA5 VSS VSS AR34 E19 VSS VSS R38
AB19 VSS VSS AR38 E22 VSS VSS R4
AB25 VSS VSS AT1 E24 VSS VSS T17
AB31 VSS VSS AT16 E26 VSS VSS T18
AC12 VSS VSS AT18 E31 VSS VSS T32
AC46 VSS VSS AT32 E8 VSS VSS U12
2 AD1 VSS VSS AT34 F41 VSS VSS U15 2
AD19 VSS VSS AT45 F43 VSS VSS U17
AD2 VSS VSS AV11 F47 VSS VSS U21
AD22 VSS VSS AV39 G44 VSS VSS U24
AD25 VSS VSS AW10 G6 VSS VSS U33
AD49 VSS VSS AW4 H8 VSS VSS U38
AE12 VSS VSS AW40 J10 VSS VSS V20
AE33 VSS VSS AW46 J26 VSS VSS V22
AE38 VSS VSS B47 J29 VSS VSS V4
AE4 VSS VSS B48 J4 VSS VSS V46
AE46 VSS VSS B49 J40 VSS VSS W25
AF22 VSS VSS BA12 J46 VSS VSS W27
AG1 VSS VSS BA5 J9 VSS VSS Y10
AG22 VSS VSS BA6 K11 VSS VSS Y12
AG23 VSS VSS BB41 K39 VSS VSS Y17
AG25 VSS VSS BB43 M16 VSS VSS Y33
AG27 VSS VSS BB9 M18 VSS VSS Y38
AG28 VSS VSS BC10 M21 VSS 12 OF 13 VSS Y9
AG30 VSS VSS BC13 VSS VSS
AG49 VSS VSS BC15 CNP-H_BGA874 Rev1.0
AH12 VSS VSS BC19
AH17 VSS VSS BC24
AH33 VSS VSS BC26
AH38 VSS VSS BC31
AJ19 VSS VSS BC35
AJ20 VSS VSS BC40
AJ25 VSS VSS BC45
3 AJ27 VSS VSS BC8 3
AJ28 VSS VSS BD43
AJ30 VSS VSS BE44
AJ31 VSS VSS BF1
AK19 VSS VSS BF2
AK20 VSS VSS BF3
AK25 VSS VSS BF48
AK27 VSS VSS BF49
AK28 VSS VSS BG17
AK30 VSS VSS BG2
AK31 VSS VSS BG22
AK4 VSS VSS BG25
AK46 VSS 9 OF 13 VSS BG28
VSS VSS
CNP-H_BGA874 Rev1.0
4 4

PCH(8/8)GND/RSVD
A B C D E
A B C D E
+3V_OVRM
CSSP_B+ RG2895 1 VGA@ 2 75K_0402_1% PFM_CH1_BS_IN1

RG2896
1
CG2780
2K_0402_5%
RG2975
2K_0402_5%
RG2976
2K_0402_5%
RG2977
2K_0402_5%
RG2978
1 2 1 1 2 1
649_0402_1%
1000P_0402_50V7K ON@ +3V_OVRM VGA@ VGA@ VGA@ VGA@
VGA@
2
PFM_CH1_SH_IN_P3
CSSP_NVVDD RG2897 1 VGA@ 2 75K_0402_1% PFM_CH1_BS_IN2 1 UPI@ 2 PFM_CH1_SH_IN_N3
+3VS SNN_PFM_CH1_SH_IN_P4
RG2899 0_0402_5%
RG2898 SNN_PFM_CH1_SH_IN_N4
CG2781 1 ON@ 2
2 1 1 2
0730 FAE CF suggest RG3019 0_0402_5%
+3VLP
2
649_0402_1%
0_0402_5%
RG2903
0_0402_5%
RG2900
1000P_0402_50V7K ON@
VGA@ @ @
0727 FAE CF suggest
1
1
VGA@
CG2782
UG108 1U_0201_6.3V6M
2
3 27
6 BS_IN1 VCC
PFM_CH1_BS_IN3 11 BS_IN2 2 PFM_CH1_SH_IN_P1 RG2902 1 VGA@ 2 100_0402_1% CSSP_B+
PFM_CH1_BS_IN4 BS_IN3 SH_IN_P1 PFM_CH1_SH_IN_N1 CSSN_B+ CSSP_B+ <96>
14 1 RG2904 1 @ 2 0_0402_5%
BS_IN4 SH_IN_N1 PFM_CH1_SH_IN_P2 CSSP_NVVDD CSSN_B+ <96>
5 RG2905 1 VGA@ 2 100_0402_1%
SH_IN_P2 PFM_CH1_SH_IN_N2 CSSN_NVVDD CSSP_NVVDD <96>
RG2906 4 RG2907 1 @ 2 0_0402_5%
PFM_FILTER_GND_FET SH_IN_N2 PFM_CH1_SH_IN_P3 CSSN_NVVDD <96>
1 @ 2 9 12
GND_FET SH_IN_P3 13 PFM_CH1_SH_IN_N3
0_0402_5% SH_IN_N3 15 SNN_PFM_CH1_SH_IN_P4
RG2910 1 ON@ 2 287_0402_1% 32 SH_IN_P4 16 SNN_PFM_CH1_SH_IN_N4
RG2911 1 ON@ 2 287_0402_1% 7 SH_O1 SH_IN_N4 VGA@
2 RG2912 1 @ 2 169_0402_1% 10 SH_O2 20 ADC_IN_P RG2913 1 @ 2 0_0402_5% CG2784 1 2 47P_0402_50V8J 2
RG2914 1 @ 2 169_0402_1% 17 SH_O3 DIFF_OUT_P 19 ADC_IN_N RG2915 1 @ 2 0_0402_5% CG2785 1 2 47P_0402_50V8J
SH_O4 DIFF_OUT_N VGA@
1 1 1 1
PFM_PF_BSOK_R
0.015U_0402_16V7K
0.015U_0402_16V7K
0.015U_0402_16V7K
0.015U_0402_16V7K
30
BS_OK ADC_IN_P <25>
CG2786
CG2787
CG2788
CG2789
RG2916
ADC_IN_N <25>
1 @ 2 PFM_ADC_MUX_SEL_R 29 8 SNN_ADC_CUSTOM8
2 2 2 2 0_0402_5% MUX_SEL NC 18 SNN_ADC_CUSTOM18
NC 21 SNN_ADC_CUSTOM21
PFM_ADC_FILTER_EN 28 NC 31 SNN_ADC_CUSTOM31
ENABLE NC
23 PFM_BG_REF_OUT R2917 1 ON@ 2 243K_0402_1%
PFM_SKIP_R 25 BG_REF_OUT 24 PFM_BS_REF
@ @ VGA@ VGA@ SKIP BS_REF 22 PFM_CM_REF_IN
GPIO28_OC_W ARN# CM_REF_IN RG2918
1 1 1
<25> GPIO28_OC_W ARN# PFM_ADC_FILTER_MODE
1000P_0402_50V7K
CG2790
1000P_0402_50V7K
CG2791
1000P_0402_50V7K
CG2792
26 33 1 VGA@ 2
MODE_SEL GND 365K_0402_1%
1
2 2 2 1
681K_0402_1%
RG2920
10K_0402_1%
RG2921
1000P_0402_50V7K
CG2793
NCP45491XMNTW G_QFN32_4X4
VGA@
+3V_OVRM
SA0000C9Q00 2
ON@ VGA@ VGA@ VGA@
2
VGA@
1
RG2923 VGA@
@ 10K_0402_1%
2
3 PFM_ADC_FILTER_EN 3
1
D
RG2925 2 OVRM_EN
OVRM_EN <17,58>
10K_0402_1% G
1
UPI@ S QG549
3
L2N7002W T1G_SC-70-3 RG3020

2
ON@ 100K_0402_5%
ON@
SB00001GE00
2
uPI sku
UG108 RG2896 RG2910 R2917

ON semi : Add QG549 for S3/S4/S5 +3V_OVRM
reduce power consumption when S3/S4/S5
1
+3V_OVRM
RG2926 US5650QQKI 487_0402_1% 215_0402_1% 324K_0402_1%
+3V_OVRM VGA@ 10K_0402_1% S IC US5650QQKI W QFN 32P POW ER MONITOR SD00000EL80 SD000000180 SD034324380
1
SA0000CMA00 uPI@ uPI@ uPI@

RG2924 uPI@ RG2898 RG2911
2
1K_0402_1%
1
RG2928 PFM_PF_BSOK_R
2
@ 10K_0402_1% VGA@ PFM_SKIP_R

487_0402_1% 215_0402_1%
2
4 PFM_ADC_FILTER_MODE 4
SD00000EL80 SD000000180
uPI@ uPI@
0730 FAE CF suggest ,
1
RG2929
0727 FAE CF suggest reserve pull high only
@ 10K_0402_1%
2
OVR-M
A B C D E
5 4 3 2 1
CHANNEL-A BOT REVERSE (4mm) <7>

<7>
DDR_A_CLK0
DDR_A_CLK#0
DDR_A_CLK0
DDR_A_CLK#0
137
139
JDIMM1A
CK0(T)
CK0#(C)
REVERSE
DQ0
DQ1
8
7
DDR_A_D0
DDR_A_D1
DDR_A_CLK1 DDR_A_D2
Interleaved Memory <7> DDR_A_CLK1

138 20
DDR_A_CLK#1 140 CK1(T) DQ2 21 DDR_A_D3
<7> DDR_A_CLK#1 CK1#(C) DQ3 DDR_A_D4
4
DDR_A_CKE0 109 DQ4 3 DDR_A_D5
<7> DDR_A_CKE0 DDR_A_CKE1 CKE0 DQ5 DDR_A_D6
110 16
TOP: JDIMM1 CONN Non-ECC DIMM <7> DDR_A_D[0..15]
<7> DDR_A_CKE1
<7> DDR_A_CS#0
DDR_A_CS#0
DDR_A_CS#1
149
CKE1
S0#
DQ6
DQ7
DQS0(T)
17
13
DDR_A_D7
DDR_A_DQS0
DDR_A_DQS#0 DDR_A_DQS0 <7>
157 11
<7> DDR_A_D[16..31] <7> DDR_A_CS#1 S1# DQS0#(C) DDR_A_DQS#0 <7>
D
162 D
+3VS +3VS +3VS 165 S2#/C0 28 DDR_A_D8
<7> DDR_A_D[32..47] S3#/C1 DQ8 29 DDR_A_D9
DDR_A_ODT0 155 DQ9 41 DDR_A_D10
<7> DDR_A_D[48..63] <7> DDR_A_ODT0 ODT0 DQ10
1
1
DDR_A_ODT1 161 42 DDR_A_D11
<7> DDR_A_ODT1 ODT1 DQ11 DDR_A_D12
RD4 RD1 RD5 24
@ 0_0402_5% @ 0_0402_5% @ 0_0402_5% JDIMM1B DDR_A_BG0 115 DQ12 25 DDR_A_D13
REVERSE <7> DDR_A_BG0 DDR_A_BG1 113 BG0 DQ13 38 DDR_A_D14
111 141 <7> DDR_A_BG1 DDR_A_BA0 150 BG1 DQ14 37 DDR_A_D15
+1.2V_VDDQ +1.2V_VDDQ <7> DDR_A_BA0
2
2
SA0_CHA_DIM1 SA1_CHA_DIM1 SA2_CHA_DIM1 112 VDD1 VDD11 142 DDR_A_BA1 145 BA0 DQ15 34 DDR_A_DQS1
VDD2 VDD12 <7> DDR_A_BA1 BA1 DQS1(T) DDR_A_DQS#1 DDR_A_DQS1 <7>
117 147 32
118 VDD3 VDD13 148 DDR_A_MA0 144 DQS1#(C) DDR_A_DQS#1 <7>
VDD4 VDD14 <7> DDR_A_MA0 A0
1
1
123 153 DDR_A_MA1 133 50 DDR_A_D16
VDD5 VDD15 <7> DDR_A_MA1 DDR_A_MA2 A1 DQ16 DDR_A_D17
RD3 RD6 RD2 124 154 132 49
0_0402_5% 0_0402_5% 0_0402_5% 129 159 131 62
130 160 128 63
135 VDD8 VDD18 163 <7> DDR_A_MA4 DDR_A_MA5 126 A4 DQ19 46 DDR_A_D20
<7> DDR_A_MA5
2
2
+3VS 136 VDD9 VDD19 DDR_A_MA6 127 A5 DQ20 45 DDR_A_D21
VDD10 <7> DDR_A_MA6 DDR_A_MA7 A6 DQ21 DDR_A_D22
122 58
<7> DDR_A_MA7 DDR_A_MA8 A7 DQ22 DDR_A_D23
255 258 125 59
VDDSPD VTT +0.6VS_VTT <7> DDR_A_MA8 DDR_A_MA9 121 A8 DQ23 55 DDR_A_DQS2
<7> DDR_A_MA9 DDR_A_MA10 A9 DQS2(T) DDR_A_DQS#2 DDR_A_DQS2 <7>
0.1U_0201_10V6K
164 257 146 53
2.2U_0402_6.3V6M
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM 2 2
+0.6V_DDR_VREFCA VREFCA VPP1 259 +2.5V <7> DDR_A_MA10 DDR_A_MA11 120 A10_AP DQS2#(C) DDR_A_DQS#2 <7>
VPP2 <7> DDR_A_MA11 DDR_A_MA12 A11 DDR_A_D24
119 70
<7> DDR_A_MA12 DDR_A_MA13 A12 DQ24 DDR_A_D25
CD1
CD2
1 99 158 71
VSS VSS <7> DDR_A_MA13 DDR_A_MA14_WE# A13 DQ25 DDR_A_D26
2 102 151 83
1 1 VSS VSS <7> DDR_A_MA14_WE# DDR_A_MA15_CAS# A14_WE# DQ26 DDR_A_D27
5 103 156 84
SPD ADDRESS FOR CHANNEL A : 6 VSS
VSS
VSS
VSS
106 <7>
<7>
DDR_A_MA15_CAS#
DDR_A_MA16_RAS#
DDR_A_MA16_RAS# 152 A15_CAS#
A16_RAS#
DQ27
DQ28
66 DDR_A_D28
DDR_A_D29
9 107 67
WRITE ADDRESS: 0XA0 PLACE NEAR TO PIN
10
14
VSS
VSS
VSS
VSS
167
168
<7> DDR_A_ACT#
DDR_A_ACT# 114
ACT#
DQ29
DQ30
79
80
DDR_A_D30
DDR_A_D31
READ ADDRESS: 0XA1 15
18
VSS
VSS
VSS
VSS
171
172 <7> DDR_A_PAR
DDR_A_PAR
DDR_A_ALERT#
143
116 PARITY
DQ31
DQS3(T)
76
74
DDR_A_DQS3
DDR_A_DQS#3 DDR_A_DQS3 <7>
SA0 = 0; SA1 = 0; SA2 = 0. 19
22
VSS
VSS
VSS
VSS
175
176 +1.2V_VDDQ RD7 2 <7> DDR_A_ALERT#
1 240_0402_1% DIMM1_CHA_EVENT#
DDR_DRAMRST#_R
134
108
ALERT#
EVENT#
DQS3#(C)
174 DDR_A_D32
DDR_A_DQS#3 <7>
C
DDR4 POR OPERATING SPEED: 1867 MT/S 23
26
VSS
VSS
VSS
VSS
180
181
<18,24> DDR_DRAMRST#_R RESET# DQ32
DQ33
173
187
DDR_A_D33
DDR_A_D34 C
STRETCH GOAL IS 2133 MT/S 27

30
VSS
VSS
VSS
VSS
184
185 <18,24> D_CK_SDATA
254
253 SDA
DQ34
DQ35
186
170
DDR_A_D35
DDR_A_D36
VSS VSS <18,24> D_CK_SCLK SCL DQ36 DDR_A_D37
31 188 169
35 VSS VSS 189 SA2_CHA_DIM1 166 DQ37 183 DDR_A_D38
36 VSS VSS 192 SA1_CHA_DIM1 260 SA2 DQ38 182 DDR_A_D39
Layout Note: Layout Note: VSS VSS SA0_CHA_DIM1 SA1 DQ39 DDR_A_DQS4
39 193 256 179
Place near JDIMM1.257,259 Place near JDIMM1.258 40 VSS VSS 196 SA0 DQS4(T) 177 DDR_A_DQS#4 DDR_A_DQS4 <7>
43 VSS VSS 197 DQS4#(C) DDR_A_DQS#4 <7>
44 VSS VSS 201 92 195 DDR_A_D40
47 VSS VSS 202 91 CB0_NC DQ40 194 DDR_A_D41
48 VSS VSS 205 101 CB1_NC DQ41 207 DDR_A_D42
+2.5V +0.6VS_VTT 51 VSS VSS 206 105 CB2_NC DQ42 208 DDR_A_D43
10uF*2 10uF*2 VSS VSS CB3_NC DQ43 DDR_A_D44
52 209 88 191
1uF*2 1uF*1 56 VSS VSS 210 87 CB4_NC DQ44 190 DDR_A_D45
57 VSS
VSS
VSS
VSS
213 For ECC DIMM 100 CB5_NC
CB6_NC
DQ45
DQ46
203 DDR_A_D46
DDR_A_D47
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1 1 1 60 214 104 204

61 VSS VSS 217 97 CB7_NC DQ47 200 DDR_A_DQS5
VSS VSS DQS8(T) DQS5(T) DDR_A_DQS#5 DDR_A_DQS5 <7>
CD3
CD4
CD5
CD6
CD7
CD8
CD9
64 218 95 198
VSS VSS DQS8#(C) DQS5#(C) DDR_A_DQS#5 <7>
65 222
2 2 2 2 2 2 2 68 VSS VSS 223 216 DDR_A_D48
69 VSS VSS 226 12 DQ48 215 DDR_A_D49
72 VSS VSS 227 +1.2V_VDDQ 33 DM0#/DBI0# DQ49 228 DDR_A_D50
73 VSS VSS 230 54 DM1#/DBI1# DQ50 229 DDR_A_D51
85 VSS VSS 239 DDR_DRAMRST#_R 241 DM6#/DBI6# DQ55 221 DDR_A_DQS6
VSS VSS DM7#/DBI7# DQS6(T) DDR_A_DQS#6 DDR_A_DQS6 <7>
86 243 96 219
VSS VSS DM8#/DBI8# DQS6#(C) DDR_A_DQS#6 <7>
33P_0402_50V8J
89 244
90 VSS VSS 247
Layout Note: VSS VSS 2
93 248 EMC@
PLACE THE CAP near JDIMM1. 164 VSS VSS DDR_A_D56
CD10
94 251 237
98 VSS VSS 252 DQ56 236 DDR_A_D57
B VSS VSS 1 DQ57 249 DDR_A_D58 B
262 261 DQ58 250 DDR_A_D59
GND GND DQ59 232 DDR_A_D60
DQ60 233 DDR_A_D61
+0.6V_DDR_VREFCA LOTES_ADDR0206-P001A DQ61 245 DDR_A_D62
2.2uF*1 DQ62 DDR_A_D63
246
0.1uF*1 CONN@
PLACE NEAR TO SODIMM DQ63 242 DDR_A_DQS7
DQS7(T) DDR_A_DQS#7 DDR_A_DQS7 <7>
2 2 240
DQS7#(C) DDR_A_DQS#7 <7>
CD11 CD12
0.1U_0201_10V6K 2.2U_0402_6.3V6M
Part Number:SP07001CY00
1 1 Part Value:S SOCKET LOTES ADDR0206-P001A 260P DDR4 LOTES_ADDR0206-P001A
CONN@
+1.2V_VDDQ
DIMM Side CPU Side
2
RD8 +0.6V_DDR_VREFCA +0.6V_VREFCA
Layout Note:
Place near JDIMM1 2 1K_0402_1%
@
CD13
1
0.1U_0201_10V6K
1
1 RD9 2
VREF traces should be at least 20 mils
10uF*6 2_0402_1% wide with 20 mils spacing to other
+1.2V_VDDQ 1uF*8 +1.2V_VDDQ 2
1 signals
330uF*1
2
+1.2V_VDDQ CD15
RD10 CD14 0.022U_0402_16V7K
0.1U_0201_10V6K 2
1K_0402_1%
1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
2
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1
CD16
CD17
CD18
CD19
CD20
CD21
CD22
CD23
A + CD32 RD11 A
CD24
CD25
CD26
CD27
CD28
CD29
CD30
CD31
330U_D2_2V_Y 24.9_0402_1%
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1
@ @

DDRIV_CHA: DIMM0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
5 4 3 2 1
5 4 3 2 1
CHANNEL-B BOT STD (4mm)

TOP: JDIMM2 CONN Non-ECC DIMM Interleaved Memory <8> DDR_B_D[0..15]
<8> DDR_B_CLK0
<8> DDR_B_CLK#0
<8> DDR_B_CLK1
DDR_B_CLK0
DDR_B_CLK#0
DDR_B_CLK1
DDR_B_CLK#1
137
139
138
140
JDIMM2A
CK0(T)
CK0#(C)
CK1(T)
STD
DQ0
DQ1
DQ2
8
7
20
21
DDR_B_D0
DDR_B_D1
DDR_B_D3
DDR_B_D7
<8> DDR_B_CLK#1 CK1#(C) DQ3 DDR_B_D4
4
+3VS +3VS +3VS <8> DDR_B_D[16..31] DDR_B_CKE0 109 DQ4 3 DDR_B_D5
<8> DDR_B_CKE0 DDR_B_CKE1 CKE0 DQ5 DDR_B_D2
110 16
<8> DDR_B_D[32..47] <8> DDR_B_CKE1 CKE1 DQ6 17 DDR_B_D6
DQ7
1
1
DDR_B_CS#0 149 13 DDR_B_DQS0
D <8> DDR_B_D[48..63] <8> DDR_B_CS#0 DDR_B_CS#1 157 S0# DQS0(T) 11 DDR_B_DQS#0 DDR_B_DQS0 <8> D
RD12 RD13 RD14
<8> DDR_B_CS#1 162 S1# DQS0#(C) DDR_B_DQS#0 <8>
0_0402_5% 0_0402_5% @ 0_0402_5% JDIMM2B
@ S2#/C0 DDR_B_D8
STD 165 28
111 141 S3#/C1 DQ8 29 DDR_B_D9
+1.2V_VDDQ +1.2V_VDDQ
2
2
SA0_CHB_DIM3 SA1_CHB_DIM3 SA2_CHB_DIM3 112 VDD1 VDD11 142 DDR_B_ODT0 155 DQ9 41 DDR_B_D11
117 VDD2 VDD12 147 <8> DDR_B_ODT0 DDR_B_ODT1 161 ODT0 DQ10 42 DDR_B_D15
VDD3 VDD13 <8> DDR_B_ODT1 ODT1 DQ11
1
118 148 24 DDR_B_D14

VDD4 VDD14 DQ12
1
1
RD16 123 153 DDR_B_BG0 115 25 DDR_B_D10
124 VDD5 VDD15 154 <8> DDR_B_BG0 DDR_B_BG1 113 BG0 DQ13 38 DDR_B_D12
RD15 @ 0_0402_5% RD17
VDD6 VDD16 <8> DDR_B_BG1 DDR_B_BA0 BG1 DQ14 DDR_B_D13
0_0402_5% 0_0402_5% 129 159 150 37
130 VDD7 VDD17 160 <8> DDR_B_BA0 DDR_B_BA1 145 BA0 DQ15 34 DDR_B_DQS1
<8> DDR_B_BA1 DDR_B_DQS1 <8>
2
135 VDD8 VDD18 163 BA1 DQS1(T) 32 DDR_B_DQS#1

DDR_B_DQS#1 <8>
2
2
+3VS 136 VDD9 VDD19 DDR_B_MA0 144 DQS1#(C)
VDD10 <8> DDR_B_MA0 DDR_B_MA1 A0 DDR_B_D16
133 50
<8> DDR_B_MA1 DDR_B_MA2 A1 DQ16 DDR_B_D17
255 258 132 49
VDDSPD VTT +0.6VS_VTT <8> DDR_B_MA2 DDR_B_MA3 131 A2 DQ17 62 DDR_B_D19
<8> DDR_B_MA3 DDR_B_MA4 A3 DQ18 DDR_B_D20
0.1U_0201_10V6K
164 257 128 63
2.2U_0402_6.3V6M
+0.6V_DDRB_VREFCA VREFCA VPP1 259 +2.5V <8> DDR_B_MA4 DDR_B_MA5 126 A4 DQ19 46 DDR_B_D22
2 2 VPP2 <8> DDR_B_MA5 DDR_B_MA6 A5 DQ20 DDR_B_D18
127 45
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM <8> DDR_B_MA6 DDR_B_MA7 A6 DQ21 DDR_B_D23
CD33
CD34
1 99 122 58
2 VSS VSS 102 <8> DDR_B_MA7 DDR_B_MA8 125 A7 DQ22 59 DDR_B_D21
1 1 5 VSS VSS 103 <8> DDR_B_MA8 DDR_B_MA9 121 A8 DQ23 55 DDR_B_DQS2
VSS VSS <8> DDR_B_MA9 A9 DQS2(T) DDR_B_DQS2 <8>
SPD ADDRESS FOR CHANNEL B : 6
9 VSS VSS
106
107 <8> DDR_B_MA10
DDR_B_MA10
DDR_B_MA11
146
120 A10_AP DQS2#(C)
53 DDR_B_DQS#2
DDR_B_DQS#2 <8>
VSS VSS <8> DDR_B_MA11 A11
WRITE ADDRESS: 0XA4 PLACE NEAR TO PIN
10
14 VSS VSS
167
168 <8> DDR_B_MA12
DDR_B_MA12
DDR_B_MA13
119
158 A12 DQ24
70
71
DDR_B_D30
DDR_B_D27
VSS VSS <8> DDR_B_MA13 DDR_B_MA14_WE# A13 DQ25 DDR_B_D26
READ ADDRESS: 0XA3 15
18 VSS VSS
171
172 <8>
<8>
DDR_B_MA14_WE#
DDR_B_MA15_CAS#
DDR_B_MA15_CAS#
151
156 A14_WE# DQ26
83
84 DDR_B_D24
VSS VSS DDR_B_MA16_RAS# A15_CAS# DQ27 DDR_B_D25
SA0 = 0; SA1 = 1; SA2 = 0. 19
22 VSS
VSS
VSS
VSS
175
176
<8> DDR_B_MA16_RAS#
152
A16_RAS# DQ28
DQ29
66
67 DDR_B_D28
DDR_B_ACT# DDR_B_D29
DDR4 POR OPERATING SPEED: 1867 MT/S 23
26 VSS
VSS
VSS
VSS
180
181 <8> DDR_B_ACT#
DDR_B_PAR
114
ACT# DQ30
DQ31
79
80 DDR_B_D31
DDR_B_DQS3
27 184 143 76
STRETCH GOAL IS 2133 MT/S 30 VSS
VSS
VSS
VSS
185 <8> DDR_B_PAR
<8> DDR_B_ALERT#
DDR_B_ALERT#
DIMM3_CHB_EVENT#
116 PARITY
ALERT#
DQS3(T)
DQS3#(C)
74 DDR_B_DQS#3 DDR_B_DQS3 <8>
DDR_B_DQS#3 <8>
31 188 2 RD18 1 134
C 35 VSS VSS 189 +1.2V_VDDQ 240_0402_1% DDR_DRAMRST#_R 108 EVENT# 174 DDR_B_D34 C
VSS VSS <18,23> DDR_DRAMRST#_R RESET# DQ32 DDR_B_D35
Layout Note: Layout Note: 36 192 173
39 VSS VSS 193 DQ33 187 DDR_B_D36
Place near JDIMM2.257,259 Place near JDIMM2.258 40 VSS VSS 196 254 DQ34 186 DDR_B_D32
VSS VSS <18,23> D_CK_SDATA SDA DQ35 DDR_B_D39
43 197 253 170
44 VSS VSS 201 <18,23> D_CK_SCLK SCL DQ36 169 DDR_B_D38
47 VSS VSS 202 SA2_CHB_DIM3 166 DQ37 183 DDR_B_D37
48 VSS VSS 205 SA1_CHB_DIM3 260 SA2 DQ38 182 DDR_B_D33
+2.5V +0.6VS_VTT 51 VSS VSS 206 SA0_CHB_DIM3 256 SA1 DQ39 179 DDR_B_DQS4
10uF*2 10uF*2 VSS VSS SA0 DQS4(T) DDR_B_DQS#4 DDR_B_DQS4 <8>
52 209 177
1uF*2 1uF*1 56 VSS VSS 210 DQS4#(C) DDR_B_DQS#4 <8>
57 VSS VSS 213 92 195 DDR_B_D40
VSS VSS CB0_NC DQ40 DDR_B_D41
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1 1 1 60 214 91 194
61 VSS VSS 217 101 CB1_NC DQ41 207 DDR_B_D42
VSS VSS CB2_NC DQ42 DDR_B_D43
CD35
CD36
CD37
CD38
CD39
CD40
CD41
64 218 105 208

2 2 2 2 2 2 2 68 VSS VSS 223 87 CB4_NC DQ44 190 DDR_B_D45
69 VSS VSS 226
For ECC DIMM 100 CB5_NC DQ45 203 DDR_B_D46
73 VSS VSS 230 97 CB7_NC DQ47 200 DDR_B_DQS5
VSS VSS DQS8(T) DQS5(T) DDR_B_DQS#5 DDR_B_DQS5 <8>
77 231 95 198
78 VSS VSS 234 DQS8#(C) DQS5#(C) DDR_B_DQS#5 <8>
81 VSS VSS 235 216 DDR_B_D48
82 VSS VSS 238 12 DQ48 215 DDR_B_D52
85 VSS VSS 239
+1.2V_VDDQ 33 DM0#/DBI0# DQ49 228 DDR_B_D50
86 VSS VSS 243 54 DM1#/DBI1# DQ50 229 DDR_B_D55
Layout Note:
PLACE THE CAP WITHIN 200 MILS Raptor 98 VSS
VSS
VSS
VSS
252 241 DM6#/DBI6#
DM7#/DBI7#
DQ55
DQS6(T)
221 DDR_B_DQS6
DDR_B_DQS#6 DDR_B_DQS6 <8>
96 219
FROM THE JDIMM2 DM8#/DBI8# DQS6#(C) DDR_B_DQS#6 <8>
262 261
GND GND
B DDR_DRAMRST#_R LOTES_ADDR0205-P001A 237 DDR_B_D61 B

DQ56 236 DDR_B_D57
CONN@ DQ57 DDR_B_D60
+0.6V_DDRB_VREFCA
.1U_0402_16V7K
2.2uF*1 249
DQ58 250 DDR_B_D56
0.1uF*1 2 DQ59 DDR_B_D59
XEMC@ 232
Part Number: SP07001HW00 DQ60 DDR_B_D62
CD64
2 2 233
Part Value: S SOCKET LOTES ADDR0205-P001A DDR4 STD 261 DQ61 245 DDR_B_D63
CD42 CD43 1 262 GND1 DQ62 246 DDR_B_D58
0.1U_0201_10V6K GND2 DQ63 242 DDR_B_DQS7
2.2U_0402_6.3V6M DQS7(T) DDR_B_DQS7 <8>
1 1 +1.2V_VDDQ 240 DDR_B_DQS#7
DQS7#(C) DDR_B_DQS#7 <8>
LOTES_ADDR0205-P001A
CONN@
PLACE NEAR TO JDIMM2
2
Layout Note: DIMM Side CPU Side
2
CD44
Place near JDIMM2 @ 0.1U_0201_10V6K RD19
1
1K_0402_1%
+0.6V_DDRB_VREFCA +0.6V_B_VREFDQ
1
10uF*6
1 RD20 2
+1.2V_VDDQ 1uF*8 +1.2V_VDDQ 2_0402_1%
330uF*1 VREF traces should be at least 20 mils
2 wide with 20 mils spacing to other
2
2 1
signals
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
RD21 CD45
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 CD51 1K_0402_1% 0.1U_0201_10V6K CD55

1
CD46
CD47
CD48
CD49
CD50
CD52
CD53
CD54
0.1U_0201_10V6K 0.022U_0402_16V7K
1 2
CD56
CD57
CD58
CD59
CD60
CD61
CD62
CD63
A A
2
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
RD22
24.9_0402_1%
@ @
1
DDRIV_CHB: DIMM0
5 4 3 2 1
5 4 3 2 1
Raptor: use 1060 sequence +3VS

UG9A
1
+1.0VSDGPU
RG2879
+1.8VSDGPU_AON +3VS 10K_0201_5%
VGA@ 1/22 PCI_EXPRESS
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
CG1060
CG1068
CG1069
CG1063
CG1077
CG1078
CG1079
1 1 1 1 1 1 1 2 2 2
2
1.8VSDGPU_MAIN_EN3V3
1
BK44
CG5
CG14
CG7
CG1076
CG1080
1 1.8VSDGPU_MAIN_EN3V3 <37> PEX_WAKE
CG942 VGA@ RG2878 +1.8VSDGPU_AON PEX_DVDD BB35
DGPU_PEX_RST# 1 2 DGPU_PEX_RST#_R BK26 BB36
0.1U_0201_10V6K 100K_0201_5% @ PEX_RST PEX_DVDD VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2
VGA@ RG4 0_0402_5% BC35 2 2 2 2 2 2 2 1 1 1
PEX_CLKREQ# PEX_DVDD
6
2 BL26 BC36
PEX_CLKREQ PEX_DVDD
2
5
2 BD33
D
G QG545B VGA@ PEX_DVDD
PJT138KA_SOT363-6 0809 NV PGOOD change to +1.8VS BM26 PEX_REFCLK PEX_DVDD BD36
GND VCC
S
DGPU_HOLD_RST# <15> CLK_PEG_VGA
2
1 BM27 PEX_REFCLK
1
<19> DGPU_HOLD_RST# IN B 4 DGPU_PEX_RST# NV_PGOOD <15> CLK_PEG_VGA# BB33
RG3 VGA@ PEX_CVDD
PLT_RST_BUF# OUT Y DGPU_PEX_RST# <37>
3
2 10K_0201_5% BG26 PEX_TX0 PEX_CVDD BC33
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
<16,51,52,68> PLT_RST_BUF# IN A 1.8VSDGPU_MAIN_EN 5
D <9> PEG_CRX_C_GTX_P0 BH26
CG1061
CG1062
CG1070
CG1073
CG1072
CG1075
CG1064
CG1065
CG1071
CG1074
CG1066
CG1067
G
<9> PEG_CRX_C_GTX_N0 PEX_TX0 1 1 1 1 1 1 1 1 1 1 1 1
UG105 S VGA@
1
NL17SZ08DFT2G_SC70-5 QG545A 2 BL27 PEX_RX0
4
Gate <9> PEG_CTX_C_GRX_P0
2
VGA@ PJT138KA_SOT363-6 BK27 PEX_RX0 @ @ @ @ @ @ @ @ VGA@ VGA@ VGA@ VGA@
D <9> PEG_CTX_C_GRX_N0 2 2 2 2 2 2 2 2 2 2 2 2 D
RG3007 1
<15> VGA_CLKREQ# Drain BF26
100K_0201_5% PEX_TX1
PEX_CLKREQ# <9> PEG_CRX_C_GTX_P1
@ 3 BE26 PEX_TX1 PEX_HVDD BB26
Source <9> PEG_CRX_C_GTX_N1 BB27
PEX_HVDD
1
QG16 BK29 PEX_RX1 PEX_HVDD BB29
1.8VSDGPU_MAIN_EN3V3 <9> PEG_CTX_C_GRX_P1
LBSS139WT1G_SC70-3 BL29 PEX_RX1 PEX_HVDD BB32
+1.8VSDGPU_AON <9> PEG_CTX_C_GRX_N1 BC26 +1.8VSDGPU_MAIN
VGA@ PEX_HVDD
BF27 PEX_TX2 PEX_HVDD BC27
<9> PEG_CRX_C_GTX_P2 BG27 BC29
1 <9> PEG_CRX_C_GTX_N2 PEX_TX2 PEX_HVDD
+3VS CG920 VGA@ PEX_HVDD BC30
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
UG103 VGA@ 0.1U_0201_10V6K BM29 BC32
CG1081
CG1084
CG1086
CG1087
CG1090
CG1082
CG1083
CG1085
CG1088
CG1089
<9> PEG_CTX_C_GRX_P2 PEX_RX2 PEX_HVDD 1 1 1 1 1 1 1 1 1 1
5
NL17SZ08DFT2G_SC70-5 BM30 PEX_RX2 PEX_HVDD BD27
<58> GPU_OVERT# 2 <9> PEG_CTX_C_GRX_N2
PEX_HVDD BD30
GND VCC
1 BG29 PEX_TX3 @ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@
<19,37> DGPU_PWR_EN IN B 2 0_0201_5% 1VSDGPU_EN_1V8 <9> PEG_CRX_C_GTX_P3
2
4 RG202 1 @ BH29 2 2 2 2 2 2 2 2 2 2
<9> PEG_CRX_C_GTX_N3 PEX_TX3
+1.8VSDGPU_AON +1.8VSDGPU_MAIN RG183 1 2 2 OUT Y
DG4 IN A BL30
10K_0201_5% <9> PEG_CTX_C_GRX_P3 PEX_RX3
VGA@ RB751S40T1G_SOD523-2 DG3 VGA@ BK30 PEX_RX3
<9> PEG_CTX_C_GRX_N3
RB751S40T1G_SOD523-2
1
3
2
1 2 1 2 NFGC6@ BF29 PEX_TX4

<9> PEG_CRX_C_GTX_P4
1
RG39 RG182 RG190 1 1 2 BE29 PEX_TX4

<9> PEG_CRX_C_GTX_N4
10K_0201_5% 100K_0201_5% VGA@ 10K_0402_5% RG3015 0_0201_5%
VGA@ VGA@ VGA@ CG928 VGA@ BK32 PEX_RX4
DG28 <9> PEG_CTX_C_GRX_P4
6
0.22U_0402_16V7K BL32 PEX_RX4
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1VSDGPU_EN_3V3 <9> PEG_CTX_C_GRX_N4
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
2
D
QG12B 2 2 1 1 2 2 2
G
2
1
1 BF30
CG20
CG11
CG12
CG21
CG24
CG1093
CG1094
S
PJT138KA_SOT363-6 GPU_FB_EN_FGC6_AND_3V3 1VSDGPU_EN <37,94> <9> PEG_CRX_C_GTX_P5 PEX_TX5
VGA@ 3 BG30 PEX_TX5
1
PEX_PLL_HVDD BB30 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2
3
DG23 BAV70W_SOT323-3 BM32 2 2 1 1 1

<9> PEG_CTX_C_GRX_P5 PEX_RX5
5 BM33
D
OVERT# G QG12A RB751S40T1G_SOD523-2 FGC6@ PEX_RX5
S
PJT138KA_SOT363-6 @
VGA@ 2 1 BG32 PEX_TX6
NVVDD1_EN <37,95> <9> PEG_CRX_C_GTX_P6
4
BH32 PEX_TX6
0803 NV reivew del NVPG protect circuit

1
RG191
2 1.0VSDGPU_EN_FGC6 <9> PEG_CTX_C_GRX_P6
BL33
BK33
PEX_RX6
PEX_RX6
1
6.2K_0402_1% VGA@ BF32 PEX_TX7
<9> PEG_CRX_C_GTX_P7 BE32
VGA@ CG929 PEX_TX7
0.1U_0201_10V6K +1.8VSDGPU_MAIN
2 BK35
<9> PEG_CTX_C_GRX_P7 PEX_RX7 +PEX_PLL_HVDD
BL35 PEX_RX7 1 @ 2
<9> PEG_CTX_C_GRX_N7 +1.8VSDGPU_MAIN
RG3001 0_0402_5%
BF33 PEX_TX8
1U_0201_6.3V6M
1U_0201_6.3V6M
4.7U_0402_6.3V6M
BG33
CG1095
CG1096
DG22 <9> PEG_CRX_C_GTX_N8 PEX_TX8 1 1 1
CG1097
1VSDGPU_PG 2 BM35 PEX_RX8
<94> 1VSDGPU_PG
GC6_FB_EN3V3 3
1
1.35VSDGPU_EN <37,93> to EC <9> PEG_CTX_C_GRX_P8
BM36 PEX_RX8 @ VGA@ VGA@
5
+3VS QG6A 2 2 2
1
PJT138KA 2N SOT363-6 BG35
G
VGA_SMB_CK2 <9> PEG_CRX_C_GTX_P9 PEX_TX9
C BAV70W_SOT323-3 RG29 VGA@ 4 3 BH35 PEX_TX9 C
PCH_SML1CLK <18,58,66> <9> PEG_CRX_C_GTX_N9
1
D
VGA@ 100K_0201_5%
2
RG31 VGA@ BL36 PEX_RX9
+3VS 10K_0201_5% <9> PEG_CTX_C_GRX_P9 BK36
QG6B
G
PEX_RX9
2
VGA_SMB_DA2 1 6 PJT138KA 2N SOT363-6 <9> PEG_CTX_C_GRX_N9
VGA@
PCH_SML1DATA <18,58,66>
D
BF35 PEX_TX10
2
1
VGA@ BE35 PEX_TX10

GC6_FB_EN3V3 <19,37> <9> PEG_CRX_C_GTX_N10
RG34
100K_0201_5% BK38 PEX_RX10
<9> PEG_CTX_C_GRX_P10 BL38
VGA@ PEX_RX10
6
2
2 BF36
D
G
QG14B VGA@ PEX_TX11
S
PJT138KA_SOT363-6 BG36 PEX_TX11
+1.8VSDGPU_AON
1
BM38 PEX_RX11
<9> PEG_CTX_C_GRX_P11
3
BM39 PEX_RX11
GPU_GC6_FB_EN <9> PEG_CTX_C_GRX_N11
0.1U_0201_10V6K
5
D
1
G
CG2812
S FGC6@ BG38 PEX_TX12
<9> PEG_CRX_C_GTX_P12 BH38
VGA@ QG14A PEX_TX12
4
PJT138KA_SOT363-6
5
2 BL39 PEX_RX12
<9> PEG_CTX_C_GRX_P12 BK39 PEX_RX12
GND VCC
GPU_GC6_FB_EN <9> PEG_CTX_C_GRX_N12
1
FP_FUSE, EH50F change to AOZ1334DI-02 GPU_GPIO20_FGC6
IN B
OUT Y
4 GPU_FB_EN_FGC6_AND
BF38 PEX_TX13
2 BE38 PEX_TX13
+1.8VSDGPU_AON +FP_FUSE_GPU IN A <9> PEG_CRX_C_GTX_N13
BK41 PEX_RX13
<9> PEG_CTX_C_GRX_P13
BL41 PEX_RX13
3
1 UG109 FGC6@
1
CG1176 1 NL17SZ08DFT2G_SC70-5 BF39 PEX_TX14

2.2U_0402_6.3V6M CG1178 RG2836 BG39 PEX_TX14
VGA@ 2.2U_0402_6.3V6M 2.21K_0402_1%
2 UC5 VGA@ VGA@ BM41
<9> PEG_CTX_C_GRX_P14 PEX_RX14
1 6 2 BM42 PEX_RX14
2
2 IN OUT <9> PEG_CTX_C_GRX_N14

RG10 3 IN 7 BH41
GPIO26_FP_FUSE 2 +5VALW GPIO26_FP_FUSE_R +1.8VSDGPU_AON <9> PEG_CRX_C_GTX_P15 PEX_TX15
1 4 VBIASVCC_PAD 5 BG41
<9> PEG_CRX_C_GTX_N15 PEX_TX15
ON GND
0_0402_5% 1 AOZ1334DI-02_DFN8-7_3X3 BL42 PEX_RX15 PEX_TERMP BL44 2 1
to NVVDD controller <9> PEG_CTX_C_GRX_P15

2
@ SA000070V00 +1.8VSDGPU_MAIN BK42 PEX_RX15

10K_0201_5%
VGA@ <9> PEG_CTX_C_GRX_N15

CG1179 VGA@ RG23
RG2837
VGA@ 0.1U_0201_10V6K 2.49K_0402_1%

2
NV_PGOOD VGA@ GPIO12 2 1
DGPU_AC_DETECT <19,58,83>
1
COMMON DG18
+3VS +3VS +1.8VS RB751S40T1G_SOD523-2
5 VGA@
QG547A
1
PJT138KA 2N SOT363-6
G
10K_0201_5%
10K_0201_5%
VGA_I2CC_SCL 1
1
B 4 3 VGA@ B
10K_0201_5%
VGA_I2CC_SCL_PWR <95>
S
RG2840 RG2841 CG1180

2
VGA@ @ @ 0.1U_0201_10V6K RG2842

QG547B UG110 2 VGA@
G
2
VGA_I2CC_SDA 1 6 PJT138KA 2N SOT363-6 VGA@
2
VGA_I2CC_SDA_PWR <95>
5
S
UG9T MC74VHC1G09DFT2G_SC70-5
1VSDGPU_PG 1 +1.8VSDGPU_AON
Raptor:Low act i ve VGA@
G VCC
B 4 NV_PGOOD
COMMON NVVDD1_PG 2 Y
<95> NVVDD1_PG A
12/22 MISC 1 DP@
+1.8VSDGPU_AON CG340
3
2 1 +1.8VSDGPU_AON
BG5 BJ8 VGA_SMB_CK2
OVERT# OVERT I2CS_SCL
<37> OVERT# BH8 VGA_SMB_DA2 +1.8VSDGPU_AON
I2CS_SDA 0.1U_0201_10V6K
1.8VSDGPU_MAIN_EN
1
RG2884 1 VGA@ 2 10K_0201_5% DP@
BF12 TS_VREF RG180
GND VCC
I2CC_SCL
I2CC_SDA
BG9
BH9
VGA_I2CC_SCL
VGA_I2CC_SDA
RG11
RG12
2 VGA@
2 VGA@
1 2.2K_0402_5%
1 2.2K_0402_5%
GPU_EVENT#_D
RG8 1 VGA@ 2 10K_0201_5%
PG pull up at PWR side <16,39> DP0_HPD_PCH
DP0_HPD_PCH
DGPU_PEX_RST#
1
2
IN B
OUT Y
4 2
Gate
10K_0402_5%
2
IN A 1 GPU_DP0_HPD#
BG8 RG19 2 VGA@ 1 2.2K_0402_5% +3VSDGPU +3VSDGPU Drain
I2CB_SCL
I2CB_SDA BF8 RG20 2 VGA@ 1 2.2K_0402_5% 3 DP@
3
DP@ UG28 Source QG5
1
RG2845 NL17SZ08DFT2G_SC70-5 LBSS139WT1G_SC70-3
1
BJ1 THERMDN GPIO12 RG2887 1 VGA@ 2 10K_0201_5% RG2844 10K_0201_5%
BJ2 THERMDP
DG use 2.2K VGA_SMB_CK2
RG17 1 VGA@ 2 1.8K_0402_5%
10K_0201_5%
@
VGA@
6
RG198 1 @ 2 0_0402_5%
2
VGA_SMB_DA2 1 VGA@ 2 2
D
RG18 1.8K_0402_5% G QG539B
2
NVVDD_VID
S
PJT138KA_SOT363-6
GPIO0 BD6 VGA@
1
BB5 GPU_GC6_FB_EN NVVDD_VID <95>
GPIO1 GPU_EVENT#_D NVVDD_PSI
3
GPIO2 BD1 2 1 RG15 1 VGA@ 2 10K_0201_5%
BJ9 BE4 GPU_EVENT# <19> 1.35VSDGPU_PG 5
D
ADC_IN GPIO3 G
QG539A
<22> ADC_IN_P BJ11 BE1 1.8VSDGPU_MAIN_EN 1 VGA@ 2 <37,93> 1.35VSDGPU_PG
ADC_IN GPIO4 DG2 ALERT# RG504 10K_0201_5% S
PJT138KA_SOT363-6
<22> ADC_IN_N 1.8VSDGPU_MAIN_EN <37>
GPIO5 BG2 RB751S40T1G_SOD523-2 VGA@
4
BD2 NVVDD_PSI GPIO28_OC_WARN# 1 VGA@ 2
GPIO6 VGA@ RG692 10K_0201_5%
NVVDD_PSI <95>
GPIO7 BD7
BH4 VRAM_VDD_CTL FBVDDQ_PSI +1.8VSDGPU_AON
GPIO8 RG2952 1 VGA@ 2 10K_0201_5%
BJ3 VRAM_VDD_CTL <93>
GPIO9 ALERT#
BD3 MEM_VREF VRAM_VDD_CTL
GPIO10 RG2953 1 @ 2 10K_0201_5%
JTAG_TCLK BK24 BH3
@ T59 PAD~D JTAG_TCK GPIO11
JTAG_TMS BL23 BE6 GPU_GPIO15
@ T60 PAD~D JTAG_TMS GPIO12 GPIO12 RG3002 1 VGA@ 2 10K_0201_5% VGA@ CG2795
JTAG_TDI BM23 BB1 +3VS +3VS 2 1 +1.8VSDGPU_AON
@ T61 PAD~D JTAG_TDI GPIO13
JTAG_TDO BM24 BG4 GPU_DP0_HPD# GPU_GPIO22
@ T62 PAD~D JTAG_TDO GPIO14 RG3003 2 VGA@ 1 2.2K_0402_5%
1 2 JTAG_TRST# BL24 BG1 GPU_GPIO15
JTAG_TRST GPIO15 0.1U_0201_10V6K
1
1
GPIO16 BE2
BH1 VRAM_VDD_CTL
RG518 GPIO17 RG2954 1 @ 2 10K_0201_5% RG2851 RG2852 RG2980 VGA@
GND VCC
BE3 +3VS 10K_0201_5% +3VS 10K_0201_5% HDMI_HPD_PCH 1
10K_0201_5% GPIO18 10K_0402_5%
BK23 BD4 GPU_GPIO20_FGC6 <16,40> HDMI_HPD_PCH IN B
VGA@ NVJTAG_SEL GPIO19 RG2888 1 VGA@ 2 10K_0201_5% VGA@ VGA@ 4 2
A BE5 GPU_GPIO20_FGC6 DGPU_PEX_RST# 2 OUT Y Gate A
GPIO20
2
2
GPU_GC6_FB_EN GPU_FB_EN_FGC6_AND_3V3 1VSDGPU_EN_3V3 HDMI_HPD_GPU#
1
1
BA5 RG22 1 VGA@ 2 10K_0201_5% IN A 1
GPIO21 GPU_GPIO22 GPU_FB_EN_FGC6_AND_3V3 <37>
BB6 RG2850 RG2853 Drain
GPIO22 GPU_GPIO23 PWR check the FBVDDQ_PSI if need MEM_VREF
1
GPIO23 BG3 RG2885 1 VGA@ 2 1K_0402_1% 100K_0201_5% 100K_0201_5% 3 VGA@
3
RG26 BD5 VGA@ VGA@ VGA@ UG111 Source QG548
GPIO24 FBVDDQ_PSI DGPU_PEX_RST#
6
6
10K_0201_5% GPIO25 BB2 RG25 1 VGA@ 2 100K_0201_5% NL17SZ08DFT2G_SC70-5 LBSS139WT1G_SC70-3
2
2
BE7 GPIO26_FP_FUSE FBVDDQ_PSI <93> 2
D
2
D
VGA@ GPIO26 G
QG542B VGA@ G
QG543B VGA@
BA4 HDMI_HPD_GPU#
GPIO27 PJT138KA_SOT363-6 PJT138KA_SOT363-6
N17E 1M
S S
2
BB4 GPIO28_OC_WARN#
Check N18E-G3 PN GPIO28
1
1
BA3 GPIO29_IDLE_IN_SW GPIO28_OC_WARN# <22>
GPIO29 RG2979 1 @ 2 0_0402_5%
3
3
GPIO30 BB3
GPU_FB_EN_FGC6_AND 5 G
D 1VSDGPU_EN_1V8 5 G
D
UG9 S S VGA@
GPU_GPIO23
RG3004 1 VGA@ 2 100K_0201_5% QG542A QG543A
4
4
2
2
PJT138KA_SOT363-6 PJT138KA_SOT363-6
RG3005 VGA@ RG3006
GPIO29_IDLE_IN_SW
RG2883 1 VGA@ 2 10K_0201_5% 100K_0201_5% 100K_0201_5%
@ @
S IC N17E-G3-A1/8GB BGA 2152 GPU ABO ! Issued Date 2019/12/28 Deciphered Date 2019/12/28 Title
1
1
SA00009PS20
@ N18E-G3(1/8) PCIE,GPIO
NV checking funct i on THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Size Document Number
EH50F M/B LA-H431PR10

Rev
1.0

5 4 3 2 1
5 4 3 2 1
UG9N
COMMON
UG9Q
7/22 IFPAB
DL-DVI DVI/HDMI DP DP0-DP VGA@

COMMON
10/22 IFPE
DVI/HDMI DP
RG38
IFPA_AUX BH11 1K_0402_1%
SD A SD A DP0_AUXN <39> IFPEF_RSET
IFPA_AUX BG11 2 1 BD17 IFPE_RSET SDA IFPE_AUX BL8
SCL SCL DP0_AUXP <39> BK8
SCL IFPE_AUX
RG679
1K_0402_1% IFPA_L3 BF21 DP0_TXN3 <39>
2 1 IFPAB_RSET BD23 TX C TX C
IFPA_L3 BG21 BG14
IFPAB_RSET TX C TX C DP0_TXP3 <39> TXC IFPE_L3
BD15 IFPE_PLLVDD IFPE_L3 BH14
+GPU_PLLVDD_XS_SP TXC
VGA@
1U_0201_6.3V6M
BG23 BF14
CG1228
D TXD 0 TXD 0 IFPA_L2 DP0_TXN2 <39> 1 TXD0 IFPE_L2 D
TXD 0 TXD 0 IFPA_L2 BH23 DP0_TXP2 <39> TXD0 IFPE_L2 BE14
+GPU_PLLVDD_XS_SP BD21 IFPAB_PLLVDD
VGA@ IFPE_L1 BF15
1U_0201_6.3V6M
2 TXD1
BF23 BG15
CG1227
1 TXD 1 TXD 1 IFPA_L1 DP0_TXN1 <39> TXD1 IFPE_L1
TXD 1 TXD 1 IFPA_L1 BE23 DP0_TXP1 <39> IFPE
IFPE_L0 BG17
TXD2
VGA@ TXD2 IFPE_L0 BH17
2 BF24
TXD 2 TXD 2 IFPA_L0 DP0_TXN0 <39>
IFPA_L0 BG24
TXD 2 TXD 2 DP0_TXP0 <39>
+1.0VSDGPU
BC21 IFP_IOVDD
BC23
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
IFP_IOVDD
4.7U_0402_6.3V6M
CG1196
CG1197
CG1198
1 1 1 1
CG1195
Under GPU SD A IFPB_AUX BG12
BH12
VGA@
2
VGA@
2
VGA@
2
VGA@
2
SCL IFPB_AUX
IFPB_L3 BL18
TX C
+1.0VSDGPU
BB18 IFP_IOVDD IFPB_L3 BK18
TX C
BB17
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
IFP_IOVDD
4.7U_0402_6.3V6M
DP0_AUXN
CG1184
CG1185
CG1186
CG1187
1 1 1 1 1
BB20 IFPB_L2 BK20
CG1188
IFP_IOVDD TXD 3 TXD 0

BB21 IFPB_L2 BL20 DP0_AUXP
IFP_IOVDD TXD 3 TXD 0
VGA@ VGA@ VGA@ VGA@ VGA@
1
2 2 2 2 2
IFPB_L1 BM21 RG2839 RG2838
TXD 4 TXD 1
TXD 4 TXD 1 100K_0402_5% 100K_0402_5%
IFPB_L1 BM20 VGA@ VGA@
2
TXD 5 TXD 2 IFPB_L0 BL21
TXD 5 TXD 2
IFPB_L0 BK21
C
IFPAB C
+1.0VSDGPU
RG3008 1 @ 2 0_0603_5%
1
RG3009
10K_0402_5% UG9R
VGA@
COMMON
2
6/22 IFPF/USB-C
USB-C DP
+1.8VSDGPU_AON
BB15 USB_DVDD IFPF_AUX BM9
SBU2
RG3011 1 @ 2 0_0603_5% BC15 USB_DVDD SBU1 IFPF_AUX BM8
1
RG3010 IFPF_L3 BK11

RX1
10K_0402_5% IFPF_L3 BL11
RX1
VGA@
IFPF_L2 BM11
TX1
IFPF_L2 BM12
TX1
2
B B
IFPF_L1 BL12
TX2
IFPF_L1 BK12
TX2
AW10 USB_HVDD
AW11 USB_HVDD IFPF_L0 BK14
RX2
IFPF_L0 BL14
RX2
+1.8VSDGPU_AON
AW9 USB_PLL_HVDD
1U_0201_6.3V6M
1U_0201_6.3V6M
CG1214
CG1215
1 1
USB_L0 BA1
USB_L0 BA2
VGA@ VGA@
2 2 BA7
USB_L1
+3VSDGPU BA8
USB_L1
RG3013 1 @ 2 0_0603_5% BE12 USB_VDDP

1
RG3012
10K_0402_5%
VGA@
2
USB_SCL BB8
USB_SDA BB7
RG2854 1 @ 2 2.49K_0402_1% BG6 USB_TERMP0
RG2855 1 @ 2 2.49K_0402_1% BH6 USB_TERMP1
RG2856 1 @ 2 1K_0402_5% BA6 USB_RBIAS

IFPF/USB-C
A A

N18E-G3(2/8) DP
5 4 3 2 1
5 4 3 2 1
UG9O
COMMON
RG37 8/22 IFPC
1K_0402_1%
2 1 IFPCD_RSET BD20 IFPCD_RSET
DVI/HDMI DP
VGA@
D +GPU_PLLVDD_XS_SP BD18 IFPCD_PLLVDD IFPC_AUX BL9 D

SDA GPU_DP2_CTRL_DAT <40>
BK9
1U_0201_6.3V6M
SCL IFPC_AUX GPU_DP2_CTRL_CLK <40>
CG1229
1
TXC IFPC_L3 BF17

GPU_DP2_N3 <40>
VGA@ TXC IFPC_L3 BE17
2 GPU_DP2_P3 <40>
IFPC_L2 BF18 GPU_DP2_N2 <40>
IFPC
TXD0
TXD0 IFPC_L2 BG18
BG20
GPU_DP2_P2 <40> HDMI 2.0
TXD1 IFPC_L1 GPU_DP2_N1 <40>
TXD1 IFPC_L1 BH20 GPU_DP2_P1 <40>
IFPC_L0 BF20 GPU_DP2_N0 <40>

TXD2
IFPC_L0 BE20 GPU_DP2_P0 <40>
TXD2
+1.0VSDGPU BB23 IFP_IOVDD

BC17
1U_0201_6.3V6M
1U_0201_6.3V6M
IFP_IOVDD
4.7U_0402_6.3V6M
CG1189
CG1191
1 1 1
CG1190
VGA@ VGA@ VGA@

2 2 2
C C
UG9P
COMMON
9/22 IFPD
DVI/HDMI DP
Under GPU BF11

SDA IFPD_AUX
IFPD_AUX BE11
SCL
TXC IFPD_L3 BM14

TXC IFPD_L3 BM15
TXD0 IFPD_L2 BL15

IFPD_L2 BK15
TXD0
IFPD BK17
TXD1 IFPD_L1
TXD1 IFPD_L1 BL17
B BM17 B
TXD2 IFPD_L0
IFPD_L0 BM18
TXD2
+1.0VSDGPU BC18 IFP_IOVDD

BC20
1U_0201_6.3V6M
1U_0201_6.3V6M
IFP_IOVDD
CG1192
CG1194
1 1
VGA@ VGA@
2 2
A A

N18E-G3(3/8) eDP,HDMI
5 4 3 2 1
5 4 3 2 1
D D
UG9B UG9C UG9D UG9E
COMMON COMMON COMMON COMMON

2/22 FBA 3/22 FBB 4/22 FBC 5/22 FBD
U51 FBA_D0 FBA_CMD0 Y51 H32 FBB_D0 FBB_CMD0 B35 C6 FBC_D0 FBC_CMD0 C11 AK8 FBD_D0 FBD_CMD0 AD2
<33> FBA_D0 FBA_CMD1 FBA_CMD0 <33> <34> FBB_D0 FBB_CMD1 FBB_CMD0 <34> <35> FBC_D0 FBC_CMD1 FBC_CMD0 <35>
U48 FBA_D1 FBA_CMD1 Y52 D32 FBB_D1 FBB_CMD1 A35 D6 FBC_D1 FBC_CMD1 B11 AK4 FBD_D1 FBD_CMD1 AD1
U50 FBA_D2 FBA_CMD2 Y49 A33 FBB_D2 FBB_CMD2 D35 A6 FBC_D2 FBC_CMD2 A11 AK2 FBD_D2 FBD_CMD2 AD4
<33> FBA_D2 U49 AA52 FBA_CMD2 <33> <34> FBB_D2 B32 A36 FBB_CMD2 <34> <35> FBC_D2 B6 D11 FBC_CMD2 <35> AK3 AC1
<33> FBA_D3 FBA_D3 FBA_CMD3 FBA_CMD3 <33> <34> FBB_D3 FBB_D3 FBB_CMD3 FBB_CMD3 <34> <35> FBC_D3 FBC_D3 FBC_CMD3 FBC_CMD3 <35> FBD_D3 FBD_CMD3
R51 FBA_D4 FBA_CMD4 AA51 E32 FBB_D4 FBB_CMD4 B36 B4 FBC_D4 FBC_CMD4 A12 AK5 FBD_D4 FBD_CMD4 AC2
<33> FBA_D4 FBA_CMD4 <33> <34> FBB_D4 FBB_CMD4 <34> <35> FBC_D4 FBC_CMD4 <35>
R50 FBA_D5 FBA_CMD5 AA50 G32 FBB_D5 FBB_CMD5 C36 A4 FBC_D5 FBC_CMD5 B12 AK6 FBD_D5 FBD_CMD5 AC3
R47 FBA_D6 FBA_CMD6 AC50 J30 FBB_D6 FBB_CMD6 C38 B3 FBC_D6 FBC_CMD6 C12 AK9 FBD_D6 FBD_CMD6 AA3
U46 FBA_D7 FBA_CMD7 AC51 F32 FBB_D7 FBB_CMD7 B38 C4 FBC_D7 FBC_CMD7 C14 AK7 FBD_D7 FBD_CMD7 AA2
<33> FBA_D7 V46 AC52 FBA_CMD7 <33> <34> FBB_D7 H36 A38 FBB_CMD7 <34> <35> FBC_D7 D9 B14 FBC_CMD7 <35> AG4 AA1
Y45 FBA_D9 FBA_CMD9 AC49 G36 FBB_D9 FBB_CMD9 D38 C9 FBC_D9 FBC_CMD9 A14 AF9 FBD_D9 FBD_CMD9 AA4
<33> FBA_D9 Y47 AD52 FBA_CMD9 <33> <34> FBB_D9 J36 A39 FBB_CMD9 <34> <35> FBC_D9 E9 D14 FBC_CMD9 <35> AG6 Y1
Y46 FBA_D11 FBA_CMD11 AD51 F36 FBB_D11 FBB_CMD11 B39 B9 FBC_D11 FBC_CMD11 A15 AG7 FBD_D11 FBD_CMD11 Y2
V50 FBA_D12 FBA_CMD12 AD50 F33 FBB_D12 FBB_CMD12 C39 B8 FBC_D12 FBC_CMD12 B15 AJ4 FBD_D12 FBD_CMD12 Y3
<33> FBA_D12 V47 AF50 FBA_CMD12 <33> <34> FBB_D12 D33 C41 FBB_CMD12 <34> <35> FBC_D12 A8 C15 FBC_CMD12 <35> AJ5 V3
U52 FBA_D14 FBA_CMD14 AF51 J32 FBB_D14 FBB_CMD14 B41 F6 FBC_D14 FBC_CMD14 C17 AJ6 FBD_D14 FBD_CMD14 V2
V51 FBA_D15 FBA_CMD15 AF52 G33 FBB_D15 FBB_CMD15 A41 E6 FBC_D15 FBC_CMD15 B17 AG5 FBD_D15 FBD_CMD15 V1
AJ44 FBA_D16 FBA_CMD16 AN50 E45 FBB_D16 FBB_CMD16 B49 F18 FBC_D16 FBC_CMD16 B24 Y6 FBD_D16 FBD_CMD16 L3
AG48 FBA_D17 FBA_CMD17 AN51 D45 FBB_D17 FBB_CMD17 A49 G18 FBC_D17 FBC_CMD17 A24 Y5 FBD_D17 FBD_CMD17 L2
AJ45 FBA_D18 FBA_CMD18 AN52 F45 FBB_D18 FBB_CMD18 A48 E18 FBC_D18 FBC_CMD18 D23 V5 FBD_D18 FBD_CMD18 L1
AG49 FBA_D19 FBA_CMD19 AM49 G45 FBB_D19 FBB_CMD19 D47 H18 FBC_D19 FBC_CMD19 A23 Y4 FBD_D19 FBD_CMD19 M4
AF46 FBA_D20 FBA_CMD20 AM52 D42 FBB_D20 FBB_CMD20 A47 D15 FBC_D20 FBC_CMD20 B23 AA6 FBD_D20 FBD_CMD20 M1
AF47 FBA_D21 FBA_CMD21 AM51 E42 FBB_D21 FBB_CMD21 B47 E15 FBC_D21 FBC_CMD21 C23 AA5 FBD_D21 FBD_CMD21 M2
AF48 FBA_D22 FBA_CMD22 AM50 F42 FBB_D22 FBB_CMD22 C47 G17 FBC_D22 FBC_CMD22 C21 AC5 FBD_D22 FBD_CMD22 M3
<33> FBA_D22 AD47 AK50 FBA_CMD22 <33> <34> FBB_D22 H41 C45 FBB_CMD22 <34> <35> FBC_D22 H17 B21 FBC_CMD22 <35> AC4 FBD_CMD23 P3
<33> FBA_D23 FBA_D23 FBA_CMD23 FBA_CMD23 <33> <34> FBB_D23 FBB_D23 FBB_CMD23 FBB_CMD23 <34> <35> FBC_D23 FBC_D23 FBC_CMD23 FBC_CMD23 <35> FBD_D23
AD49 FBA_D24 FBA_CMD24 AK51 E41 FBB_D24 FBB_CMD24 B45 J15 FBC_D24 FBC_CMD24 A21 AD7 FBD_D24 FBD_CMD24 P2
AD48 FBA_D25 FBA_CMD25 AK52 F39 FBB_D25 FBB_CMD25 A45 H15 FBC_D25 FBC_CMD25 D20 AC6 FBD_D25 FBD_CMD25 P1
AC46 FBA_D26 FBA_CMD26 AJ49 E39 FBB_D26 FBB_CMD26 D44 E14 FBC_D26 FBC_CMD26 A20 AF6 FBD_D26 FBD_CMD26 R4
AC47 FBA_D27 FBA_CMD27 AJ52 D39 FBB_D27 FBB_CMD27 A44 F14 FBC_D27 FBC_CMD27 B20 AD6 FBD_D27 FBD_CMD27 R1
<33> FBA_D27 AA47 AJ51 FBA_CMD27 <33> <34> FBB_D27 F38 B44 FBB_CMD27 <34> <35> FBC_D27 H11 C20 FBC_CMD27 <35> AF7 R2
AA46 FBA_D29 FBA_CMD29 AJ50 E38 FBB_D29 FBB_CMD29 C44 G11 FBC_D29 FBC_CMD29 C18 AF8 FBD_D29 FBD_CMD29 R3
AA45 FBA_D30 FBA_CMD30 AG50 D36 FBB_D30 FBB_CMD30 C42 F11 FBC_D30 FBC_CMD30 B18 AF2 FBD_D30 FBD_CMD30 U3
<33> FBA_D30 Y44 AG51 FBA_CMD30 <33> +1.35VSDGPU <34> FBB_D30 E36 B42 FBB_CMD30 <34> +1.35VSDGPU <35> FBC_D30 E11 A18 FBC_CMD30 <35> +1.35VSDGPU AF3 U2
AW51 FBA_D32 FBA_CMD32 AF49 M50 FBB_D32 FBB_CMD32 D41 J29 FBC_D32 FBC_CMD32 A17 F4 FBD_D32 FBD_CMD32 V4
<33> FBA_D32 BA52 AG52 FBA_CMD32 <33> <34> FBB_D32 P48 A42 FBB_CMD32 <34> <35> FBC_D32 F30 D17 FBC_CMD32 <35> E1 U1
<33> FBA_D33 FBA_D33 FBA_CMD33 FBA_DEBUG0 FBA_CMD33 <33> <34> FBB_D33 FBB_D33 FBB_CMD33 FBB_DEBUG0 FBB_CMD33 <34> <35> FBC_D33 FBC_D33 FBC_CMD33 FBC_DEBUG0 FBC_CMD33 <35> FBD_D33 FBD_CMD33
AW50 FBA_D34 FBA_CMD34 Y50 RG2930 2 @ 1 60.4_0201_1% M51 FBB_D34 FBB_CMD34 C35 RG2932 2 @ 1 60.4_0201_1% H29 FBC_D34 FBC_CMD34 A9 RG2934 2 @ 1 60.4_0201_1% F3 FBD_D34 FBD_CMD34 AD3
<33> FBA_D34 FBA_DEBUG1 <34> FBB_D34 FBB_DEBUG1 <35> FBC_D34 FBC_DEBUG1
BA51 FBA_D35 FBA_CMD35 AR50 RG2931 2 @ 1 60.4_0201_1% M49 FBB_D35 FBB_CMD35 B50 RG2933 2 @ 1 60.4_0201_1% G30 FBC_D35 FBC_CMD35 C24 RG2935 2 @ 1 60.4_0201_1% F5 FBD_D35 FBD_CMD35 J3
<33> FBA_D35 <34> FBB_D35 <35> FBC_D35
BA50 FBA_D36 P47 FBB_D36 B30 FBC_D36 D2 FBD_D36
<33> FBA_D36 BB50 <34> FBB_D36 P52 <35> FBC_D36 A30 D1
FBA_D37 FBB_D37 FBC_D37 FBD_D37
<33>
<33>
<33>
FBA_D37
FBA_D38
FBA_D39
BA49
AW49
AV48
FBA_D38
FBA_D39 FBA_DBG_RFU1 AA44
AN44
0803 NV review <34>
<34>
<34>
FBB_D37
FBB_D38
FBB_D39
R46
P46
L50
FBB_D38
FBB_D39 FBB_DBG_RFU1 J35
J41
0803 NV review <35>
<35>
<35>
FBC_D37
FBC_D38
FBC_D39
H30
C30
D27
FBC_D38
FBC_D39 FBC_DBG_RFU1 J14
J23
0803 NV review C3
C2
J5
FBD_D38
FBD_D39 FBD_DBG_RFU1
FBD_DBG_RFU2
AC9
P9
<33> FBA_D40 FBA_D40 FBA_DBG_RFU2 <34> FBB_D40 FBB_D40 FBB_DBG_RFU2 <35> FBC_D40 FBC_D40 FBC_DBG_RFU2 FBD_D40
AT49 FBA_D41 L51 FBB_D41 J26 FBC_D41 J4 FBD_D41
C <33> FBA_D41 AT47 <34> FBB_D41 L52 <35> FBC_D41 F27 L8 C
<33> FBA_D42 FBA_D42 <34> FBB_D42 FBB_D42 <35> FBC_D42 FBC_D42 FBD_D42
AT48 FBA_D43 L49 FBB_D43 G27 FBC_D43 J2 FBD_D43
<33> FBA_D43 <34> FBB_D43 <35> FBC_D43
AT46 FBA_D44 FBA_CLK0 AG45 M46 FBB_D44 FBB_CLK0 H42 C27 FBC_D44 FBC_CLK0 G15 F1 FBD_D44 FBD_CLK0 Y8
<33> FBA_D44 FBA_CLK0 <33> <34> FBB_D44 FBB_CLK0 <34> <35> FBC_D44 FBC_CLK0 <35>
AV51 FBA_D45 FBA_CLK0 AG46 L47 FBB_D45 FBB_CLK0 G42 B27 FBC_D45 FBC_CLK0 F15 F2 FBD_D45 FBD_CLK0 Y7
<33> FBA_D45 FBA_CLK0# <33> <34> FBB_D45 FBB_CLK0# <34> <35> FBC_D45 FBC_CLK0# <35>
AV52 FBA_D46 FBA_CLK1 AK46 M48 FBB_D46 FBB_CLK1 F47 A27 FBC_D46 FBC_CLK1 H21 H4 FBD_D46 FBD_CLK1 R8
<33> FBA_D46 FBA_CLK1 <33> <34> FBB_D46 FBB_CLK1 <34> <35> FBC_D46 FBC_CLK1 <35>
AV49 FBA_D47 FBA_CLK1 AK45 M47 FBB_D47 FBB_CLK1 E47 G29 FBC_D47 FBC_CLK1 J21 H5 FBD_D47 FBD_CLK1 R7
<33> FBA_D47 AJ48 FBA_CLK1# <33> <34> FBB_D47 D48 FBB_CLK1# <34> <35> FBC_D47 H20 FBC_CLK1# <35> V7
AJ46 FBA_D49 C50 FBB_D49 D18 FBC_D49 V8 FBD_D49
<33> FBA_D49 <34> FBB_D49 <35> FBC_D49
AJ47 FBA_D50 C48 FBB_D50 G20 FBC_D50 V6 FBD_D50
<33> FBA_D50 <34> FBB_D50 <35> FBC_D50
AK49 FBA_D51 C49 FBB_D51 E20 FBC_D51 V9 FBD_D51
<33> FBA_D51 <34> FBB_D51 <35> FBC_D51
AM47 FBA_D52 E49 FBB_D52 F23 FBC_D52 U4 FBD_D52
<33> FBA_D52 AM46 <34> FBB_D52 E50 <35> FBC_D52 E21 R5
AN48 FBA_D54 F49 FBB_D54 D21 FBC_D54 R6 FBD_D54
<33> FBA_D54 <34> FBB_D54 <35> FBC_D54
AN49 FBA_D55 F48 FBB_D55 E23 FBC_D55 U8 FBD_D55
<33> FBA_D55 AM44 U45 <34> FBB_D55 F50 J33 <35> FBC_D55 G24 F8 P6 AJ8
<33> FBA_D56 FBA_D56 FBA_WCK01 FBA_WCK01 <33> <34> FBB_D56 FBB_D56 FBB_WCK01 FBB_WCK01 <34> <35> FBC_D56 FBC_D56 FBC_WCK01 FBC_WCK01 <35> FBD_D56 FBD_WCK01
AM45 FBA_D57 FBA_WCK01 U44 D52 FBB_D57 FBB_WCK01 H33 H26 FBC_D57 FBC_WCK01 G8 R9 FBD_D57 FBD_WCK01 AJ7
<33> FBA_D57 AN45 V45 FBA_WCK01# <33> <34> FBB_D57 J50 G35 FBB_WCK01# <34> <35> FBC_D57 F24 G9 FBC_WCK01# <35> P4 AG8
<33> FBA_D58 FBA_D58 FBA_WCKB01 FBA_WCKB01 <33> <34> FBB_D58 FBB_D58 FBB_WCKB01 FBB_WCKB01 <34> <35> FBC_D58 FBC_D58 FBC_WCKB01 FBC_WCKB01 <35> FBD_D58 FBD_WCKB01
AN46 FBA_D59 FBA_WCKB01 V44 H48 FBB_D59 FBB_WCKB01 H35 G26 FBC_D59 FBC_WCKB01 F9 P5 FBD_D59 FBD_WCKB01 AG9
<33> FBA_D59 FBA_WCKB01# <33> <34> FBB_D59 FBB_WCKB01# <34> <35> FBC_D59 FBC_WCKB01# <35>
AR48 FBA_D60 FBA_WCK23 AC45 H51 FBB_D60 FBB_WCK23 J39 F26 FBC_D60 FBC_WCK23 H12 L7 FBD_D60 FBD_WCK23 AD8
<33> FBA_D60 AN47 AC44 FBA_WCK23 <33> <34> FBB_D60 J51 H39 FBB_WCK23 <34> <35> FBC_D60 D26 G12 FBC_WCK23 <35> L6 AD9
<33> FBA_D61 FBA_D61 FBA_WCK23 FBA_WCK23# <33> <34> FBB_D61 FBB_D61 FBB_WCK23 FBB_WCK23# <34> <35> FBC_D61 FBC_D61 FBC_WCK23 FBC_WCK23# <35> FBD_D61 FBD_WCK23
AR47 FBA_D62 FBA_WCKB23 AD46 H49 FBB_D62 FBB_WCKB23 F41 B26 FBC_D62 FBC_WCKB23 G14 L4 FBD_D62 FBD_WCKB23 AC7
<33> FBA_D62 AR46 AD45 FBA_WCKB23 <33> <34> FBB_D62 H52 G41 FBB_WCKB23 <34> <35> FBC_D62 C26 H14 FBC_WCKB23 <35> L5 AC8
<33> FBA_D63 FBA_D63 FBA_WCKB23 FBA_WCKB23# <33> <34> FBB_D63 FBB_D63 FBB_WCKB23 FBB_WCKB23# <34> <35> FBC_D63 FBC_D63 FBC_WCKB23 FBC_WCKB23# <35> FBD_D63 FBD_WCKB23
FBA_WCK45 AV47 FBB_WCK45 L46 FBC_WCK45 J27 FBD_WCK45 J6
FBA_WCK45 <33> FBB_WCK45 <34> FBC_WCK45 <35>
FBA_WCK45 AV46 FBB_WCK45 L45 FBC_WCK45 H27 FBD_WCK45 J7
FBA_WCK45# <33> FBB_WCK45# <34> FBC_WCK45# <35>
U47 FBA_DQM0 FBA_WCKB45 AW48 C32 FBB_DQM0 FBB_WCKB45 M44 A5 FBC_DQM0 FBC_WCKB45 E29 AJ1 FBD_DQM0 FBD_WCKB45 H7
<33> FBA_DBI0 FBA_WCKB45 <33> <34> FBB_DBI0 FBB_WCKB45 <34> <35> FBC_DBI0 FBC_WCKB45 <35>
Y48 FBA_DQM1 FBA_WCKB45 AW47 E33 FBB_DQM1 FBB_WCKB45 M45 C8 FBC_DQM1 FBC_WCKB45 F29 AG1 FBD_DQM1 FBD_WCKB45 H6
<33> FBA_DBI1 AG47 AR45 FBA_WCKB45# <33> <34> FBB_DBI1 E44 H47 FBB_WCKB45# <34> <35> FBC_DBI1 J18 G23 FBC_WCKB45# <35> AA7 P8
<33> FBA_DBI2 FBA_DQM2 FBA_WCK67 FBA_WCK67 <33> <34> FBB_DBI2 FBB_DQM2 FBB_WCK67 FBB_WCK67 <34> <35> FBC_DBI2 FBC_DQM2 FBC_WCK67 FBC_WCK67 <35> FBD_DQM2 FBD_WCK67
AC48 FBA_DQM3 FBA_WCK67 AR44 G39 FBB_DQM3 FBB_WCK67 H46 F12 FBC_DQM3 FBC_WCK67 H23 AD5 FBD_DQM3 FBD_WCK67 P7
<33> FBA_DBI3 BB51 AT45 FBA_WCK67# <33> <34> FBB_DBI3 P49 J47 FBB_WCK67# <34> <35> FBC_DBI3 D29 FBC_DQM4 H24 FBC_WCK67# <35> D3 M7
<33> FBA_DBI4 FBA_DQM4 FBA_WCKB67 FBA_WCKB67 <33> <34> FBB_DBI4 FBB_DQM4 FBB_WCKB67 FBB_WCKB67 <34> <35> FBC_DBI4 FBC_WCKB67 FBC_WCKB67 <35> FBD_DQM4 FBD_WCKB67
AV50 FBA_DQM5 FBA_WCKB67 AT44 L48 FBB_DQM5 FBB_WCKB67 J46 E27 FBC_DQM5 FBC_WCKB67 J24 H3 FBD_DQM5 FBD_WCKB67 M8
<33> FBA_DBI5 FBA_WCKB67# <33> <34> FBB_DBI5 FBB_WCKB67# <34> <35> FBC_DBI5 FBC_WCKB67# <35>
AM48 FBA_DQM6 D50 FBB_DQM6 F20 FBC_DQM6 U5 FBD_DQM6
<33> FBA_DBI6 AR49 <34> FBB_DBI6 H50 <35> FBC_DBI6 E26 M9
<33> FBA_DBI7 FBA_DQM7 <34> FBB_DBI7 FBB_DQM7 <35> FBC_DBI7 FBC_DQM7 FBD_DQM7
R48 FBA_DQS_WP0 B33 FBB_DQS_WP0 D5 FBC_DQS_WP0 AJ3 FBD_DQS_WP0

<33> FBA_EDC0 V48 <34> FBB_EDC0 E35 <35> FBC_EDC0 D8 AG2
<33> FBA_EDC1 FBA_DQS_WP1 <34> FBB_EDC1 FBB_DQS_WP1 <35> FBC_EDC1 FBC_DQS_WP1 FBD_DQS_WP1
AF44 FBA_DQS_WP2
+FBX_PLLAVDD G44 FBB_DQS_WP2
+FBX_PLLAVDD E17 FBC_DQS_WP2
+FBX_PLLAVDD AA9 FBD_DQS_WP2
+FBX_PLLAVDD
<33> FBA_EDC2 <34> FBB_EDC2 <35> FBC_EDC2
AA48 FBA_DQS_WP3 H38 FBB_DQS_WP3 E12 FBC_DQS_WP3 AF4 FBD_DQS_WP3
<33> FBA_EDC3 BB52 <34> FBB_EDC3 P50 <35> FBC_EDC3 E30 E3
<33> FBA_EDC4 FBA_DQS_WP4 <34> FBB_EDC4 FBB_DQS_WP4 <35> FBC_EDC4 FBC_DQS_WP4 FBD_DQS_WP4
AT50 FBA_DQS_WP5 J48 FBB_DQS_WP5 B29 FBC_DQS_WP5 H2 FBD_DQS_WP5
<33> FBA_EDC5 <34> FBB_EDC5 <35> FBC_EDC5
AK48 FBA_DQS_WP6 D51 FBB_DQS_WP6 G21 FBC_DQS_WP6 U6 FBD_DQS_WP6
<33> FBA_EDC6 AR51 AN42 <34> FBB_EDC6 F51 L38 <35> FBC_EDC6 E24 L17 M5 V11
<33> FBA_EDC7 FBA_DQS_WP7 FBA_PLL_AVDD <34> FBB_EDC7 FBB_DQS_WP7 FBB_PLL_AVDD <35> FBC_EDC7 FBC_DQS_WP7 FBC_PLL_AVDD FBD_DQS_WP7 FBD_PLL_AVDD
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
W45 Y16 Y24 Y32
CG54
CG1102
CG1103
CG1104
GND 1 GND 1 GND 1 GND 1
W47 GND Y17 GND Y25 GND Y33 GND
W51 GND VGA@ Y19 GND VGA@ Y27 GND VGA@ Y35 GND VGA@
W6 2 Y20 2 Y28 2 Y36 2
GND GND GND GND
Y14 GND Y22 GND Y30 GND Y38 GND
+FBX_PLLAVDD Y15 GND Y23 GND Y31 GND Y39 GND
N18E-G3
AF42
L29
FB_REFPLL_AVDD0
Under GPU
1U_0201_6.3V6M
1U_0201_6.3V6M
FB_REFPLL_AVDD1
CG1100
CG1101
1 1
VGA@ VGA@
Under GPU Under GPU FBD N/A
Under GPU
2 2 +1.8VSDGPU_MAIN
B VGA@ B
1 2
LG6
PBY160808T-300Y-N_2P
22U_0603_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1 1
1
CG1099
CG1098
CG55
+1.35VSDGPU VGA@ VGA@ VGA@

2
2 2 +1.35VSDGPU
+1.35VSDGPU
CKE CKE
2
VGA@ 10K_0402_5% 10K_0402_5% VGA@ 10K_0402_5% 10K_0402_5% CKE
2
RG53 RG54 RG55 RG56
FBA_CMD10 VGA@ FBB_CMD10 VGA@
1
VGA@ 10K_0402_5% 10K_0402_5%

RG57 RG58
FBA_CMD26 FBB_CMD26
VGA@
FBC_CMD10
1
FBA_CMD2 FBB_CMD2
FBC_CMD26
FBA_CMD18 FBB_CMD18
FBC_CMD2
2
FBC_CMD18
VGA@ 10K_0402_5% 10K_0402_5% VGA@ 10K_0402_5% 10K_0402_5%
2
RG47 RG48 RG49 RG50
VGA@ VGA@
1
VGA@ 10K_0402_5% 10K_0402_5%

RG51 RG52
VGA@
Reset
1
Reset Reset
at the end of this trace. (VRAM) at the end of this trace. (VRAM) at the end of this trace. (VRAM)
A A

N18E-G3(4/8) MEM
5 4 3 2 1
5 4 3 2 1
+NVVDD1 UG9J +NVVDD1

UG9M
+NVVDD1 +NVVDD1 UG9L
COMMON
18/22 VDD_2/3 COMMON +1.35VSDGPU +1.35VSDGPU
22/22 VDD_3/3 COMMON
AH39 VDD VDD AP23 19/22 FBVDDQ
AH40 VDD VDD AP24
AJ13 VDD VDD AP25 BG45 VDD VDD R23 AA10 FBVDDQ FBVDDQ AT43
AJ40 VDD VDD AP26 BG46 VDD VDD R24 AA11 FBVDDQ FBVDDQ K12
AK13 VDD VDD AP27 BG47 VDD VDD R25 AA42 FBVDDQ FBVDDQ K14
D D
AK14 VDD VDD AP28 BG48 VDD VDD R26 AA43 FBVDDQ FBVDDQ K15
AK15 VDD VDD AP29 BG49 VDD VDD R27 AC10 FBVDDQ FBVDDQ K17
AK19 VDD VDD AP33 BH44 VDD VDD R31 AD10 FBVDDQ FBVDDQ K23
AK23 VDD VDD AP37 BH49 VDD VDD R35 AF10 FBVDDQ FBVDDQ K29
AK24 VDD VDD AP38 BH50 VDD VDD R36 AF43 FBVDDQ FBVDDQ K30
AK25 VDD VDD AP39 BH51 VDD VDD R37 AG10 FBVDDQ FBVDDQ K32
AK26 VDD VDD AP40 BH52 VDD VDD R38 AG11 FBVDDQ FBVDDQ K33
AK27 VDD VDD AR13 BJ44 VDD VDD R39 AG42 FBVDDQ FBVDDQ K35
AK28 VDD VDD AR40 BJ45 VDD VDD R40 AG43 FBVDDQ FBVDDQ K36
AK29 VDD VDD AT13 BJ46 VDD VDD T13 AJ10 FBVDDQ FBVDDQ K38
AK30 VDD VDD AT14 BJ47 VDD VDD T40 AJ11 FBVDDQ FBVDDQ K39
AK31 VDD VDD AT15 BJ48 VDD VDD U13 AJ42 FBVDDQ FBVDDQ K41
AK32 VDD VDD AT16 BJ49 VDD VDD U14 AJ43 FBVDDQ FBVDDQ L14
AK33 VDD VDD AT17 BJ50 VDD VDD U15 AK10 FBVDDQ FBVDDQ L15
AK36 VDD VDD AT20 BK47 VDD VDD U18 AK43 FBVDDQ FBVDDQ L21
AK37 VDD VDD AT21 BK48 VDD VDD U19 AM42 FBVDDQ FBVDDQ L23
AK38 VDD VDD AT22 BK49 VDD VDD U20 AM43 FBVDDQ FBVDDQ L24
AK39 VDD VDD AT23 BK50 VDD VDD U21 AN43 FBVDDQ FBVDDQ L26
AK40 VDD VDD AT24 BK51 VDD VDD U22 AR42 FBVDDQ FBVDDQ L27
AL13 VDD VDD AT25 BK52 VDD VDD U23 AR43 FBVDDQ FBVDDQ L30
AL40 VDD VDD AT26 BL46 VDD VDD U24 R42 FBVDDQ FBVDDQ L32
AM13 VDD VDD AT27 BL47 VDD VDD U25 R43 FBVDDQ FBVDDQ L33
AM14 VDD VDD AT28 BL48 VDD VDD U26 U10 FBVDDQ FBVDDQ L35
AM15 VDD VDD AT29 BL49 VDD VDD U27 U11 FBVDDQ FBVDDQ L36
AM16 VDD VDD AY26 BL50 VDD VDD U28 U43 FBVDDQ FBVDDQ L39
AM17 VDD VDD AY27 BL51 VDD VDD U29 V10 FBVDDQ FBVDDQ M10
AM18 VDD VDD AY28 BL52 VDD VDD U30 V42 FBVDDQ FBVDDQ M43
AM19 VDD VDD AY29 BM47 VDD VDD U31 V43 FBVDDQ FBVDDQ P10
AM20 VDD VDD AY30 BM48 VDD VDD U32 Y10 FBVDDQ FBVDDQ P11
C AM21 VDD VDD AY31 BM49 VDD VDD U33 Y11 FBVDDQ FBVDDQ P42 C
AM22 VDD VDD AY32 BM50 VDD VDD U34 Y42 FBVDDQ FBVDDQ P43
AM23 VDD VDD AY33 BM51 VDD VDD U35 Y43 FBVDDQ FBVDDQ R10
AM24 VDD VDD AY34 N13 VDD VDD U36 FBVDDQ R11
10U_0402_6.3V6M
AM25 VDD VDD AY35 N14 VDD VDD U37
AM26 VDD VDD AY36 N15 VDD VDD U38 1
CG243
AM27 VDD VDD AY37 N16 VDD VDD U39
AM28 VDD VDD AY38 N17 VDD VDD U40 TC23
AM29 VDD VDD AY39 N18 VDD VDD V13 FBVDDQ_SENSE E52
2 FB_VDDQ_SENSE <93>
AM30 VDD VDD AY40 N19 VDD VDD V40
AM31 VDD VDD AY43 N20 VDD VDD W13
AM32 VDD VDD AY45 N21 VDD VDD W14
AM33 BA43 N22 W15 VGA@ FB_VREF TP@
VDD VDD VDD VDD FB_VREF P45
AM34 BA44 N23 W16 FB_VREF
VDD VDD VDD VDD
AM35 VDD VDD BA45 N24 VDD VDD W17 +1.35VSDGPU
2
AM36 VDD VDD BA46 N25 VDD VDD W18 1
RG2881
49.9_0402_1%
VGA@
AM37 VDD VDD BA47 N26 VDD VDD W19
3.9P_0402_50V8C
AM38 VDD VDD BB38 N27 VDD VDD W20
FBCAL_VDDQ RG67 1 VGA@
CG2778
AM39 VDD VDD BB39 N28 VDD VDD W21 FB_CAL_PD_VDDQ R44 2 40.2_0402_1% VGA@
AM40 BB45 N29 W22 2
VDD VDD VDD VDD
1
AN13 BB46 N30 W23 FBCAL_GND
VDD VDD VDD VDD FB_CAL_PU_GND P44 RG68 1 VGA@ 2 40.2_0402_1%
AN40
AP13
AP14
VDD
VDD
VDD
VDD
BB47
BB48
BC38
N31
N32
N33
VDD
VDD
VDD
VDD
W24
W25
W26
eagle HW reserved FB_CALTERM_GND R45
FBCAL_TERM RG69 1 VGA@ 2 40.2_0402_1%
VDD VDD VDD VDD
AP15
AP16
AP17
VDD
VDD
VDD
VDD
BC39
BC40
BC41
N34
N35
N36
VDD
VDD
VDD
VDD
W27
W28
W29
N18E CRB probe circuit
VDD VDD VDD VDD
AP18 VDD VDD BC45 N37 VDD VDD W30
AP19
AP20
AP21
VDD
VDD
VDD
VDD
BC47
BC49
BD39
N38
N39
N40
VDD
VDD
VDD
VDD
W31
W32
W33
N18E CRB change to 40.2
VDD VDD VDD VDD
AP22 VDD VDD BE48 P13 VDD VDD W34
BD41 VDD VDD BE49 P40 VDD VDD W35
BD46 VDD VDD BE50 R13 VDD VDD W36
BD49 VDD VDD BF42 R16 VDD VDD W39
BD50 VDD VDD BF44 R17 VDD VDD W40
B B
BD51 VDD VDD BF45 R18 VDD VDD Y13
BE41 VDD VDD BF47 R19 VDD VDD Y40
BE42
BE43
BE46
VDD
VDD
VDD
VDD
BF49
BF51
BG43
R20
R21
R22
VDD
VDD
Place under GPU
VDD VDD VDD
BE47 VDD VDD BG44
+1.35VSDGPU
NVVDD_SENSE BK45 NVVDD1_VCC_SENSE <95>
10U_0402_6.3V6M
GND_SENSE BL45 NVVDD1_VSS_SENSE <95>

1
CG245
CG216
CG217
CG218
CG219
CG220
CG221
CG222
CG223
CG224
CG225
CG226
CG227
CG228
VGA@ 1 1 1 1 1 1 1 1 1 1 1 1 1
2
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2 2 2 2 2 2 2 2 2 2 2 2 2
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
eagle HW reserved
+1.35VSDGPU +1.35VSDGPU
FBA FBC
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CG1107
CG1108
CG1111
CG1112
CG1114
CG1115
CG1105
CG1106
CG1109
CG1110
CG1113
CG1116
CG1117
CG1118
CG1150
CG1149
CG1155
CG1147
CG1148
CG1151
CG1152
CG1153
CG1154
CG1156
CG1157
CG1158
CG1159
CG1160
1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 1 1 1 1 1 1 1 1 1 1 1 2 2
@ @ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 1 1
A A
FBB FBD
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
CG1119
CG1120
CG1121
CG1124
CG1125
CG1126
CG1128
CG1130
CG1122
CG1123
CG1127
CG1129
CG1131
CG1132
CG1134
CG1136
CG1135
CG1138
CG1140
CG1144
CG1143
CG1133
CG1137
CG1139
CG1141
CG1142
CG1145
CG1146
1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 1 1 1 1 1 1 1 1 1 1 1 2 2 Security Classification Compal Secret Data Compal Electronics, Inc.
@ @ @ @ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ @ @ @ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 1 1
N18E-G3(5/8) Power
Size Document Number Re v
1.0
5 4 3 2 1
5 4 3 2 1
UG9F UG9G UG9H
COMMON COMMON COMMON

+NVVDD1 UG9I +NVVDD1 15/22 GND_1/3 16/22 GND_2/3 21/22 GND_3/3
UG9K
COMMON A2 GND GND AH6 AR20 GND GND B52 BL40 GND GND N51
COMMON +1.8VSDGPU_AON 17/22 VDD_1/3 A26 GND GND AH8 AR21 GND GND B7 BL43 GND GND N6
20/22 NC/1V8 A29 GND GND AJ14 AR22 GND GND BA48 BL5 GND GND N8
AA13 VDD VDD AE28 A3 GND GND AJ15 AR23 GND GND BA9 BL7 GND GND P14
+FP_FUSE_GPU 1V8_AON BA10
1V8_AON BB14
AA14
AA15
VDD
VDD
VDD
VDD
AE29
AE30
A32
A50
GND
GND
GND
GND
AJ16
AJ17
AR24
AR25
GND
GND
GND
GND
BB49
BC13
BM2
BM3
GND
GND
GND
GND
P15
P16
1V8_AON BC14 AA16 VDD VDD AE31 A51 GND GND AJ18 AR26 GND GND BC16 C1 GND GND P17
AA17 VDD VDD AE32 AA49 GND GND AJ19 AR27 GND GND BC19 C29 GND GND P18
D +FP_FUSE_GPU AA18 VDD VDD AE33 AA8 GND GND AJ2 AR28 GND GND BC2 C33 GND GND P19 D
AA19 VDD VDD AE34 AB10 GND GND AJ20 AR29 GND GND BC22 C5 GND GND P20
AA20 VDD VDD AE35 AB14 GND GND AJ21 AR30 GND GND BC25 C51 GND GND P21
BD14 BD24 SNN_SYM21_NC1 AA21 AE36 AB15 AJ22 AR31 BC28 C52 P22
FP_FUSE_SRC NC VDD VDD GND GND GND GND GND GND
BM44 SNN_SYM21_NC2 AA22 AE37 AB16 AJ23 AR32 BC31 D10 P23
NC VDD VDD GND GND GND GND GND GND
BM45 SNN_SYM21_NC3 AA23 AE38 AB17 AJ24 AR33 BC34 D12 P24
NC VDD VDD GND GND GND GND GND GND
AA24 VDD VDD AE39 AB18 GND GND AJ25 AR34 GND GND BC37 D13 GND GND P25
AA25 VDD VDD AE40 AB19 GND GND AJ26 AR35 GND GND BC4 D16 GND GND P26
AA26 VDD VDD AF13 AB2 GND GND AJ27 AR36 GND GND BC51 D19 GND GND P27
AA29 VDD VDD AF16 AB22 GND GND AJ30 AR39 GND GND BD26 D25 GND GND P30
AA33 VDD VDD AF25 AB26 GND GND AJ34 AT4 GND GND BD38 D34 GND GND P34
AA34 VDD VDD AF26 AB27 GND GND AJ35 AT5 GND GND BD52 D37 GND GND P35
AA35 VDD VDD AF30 AB28 GND GND AJ36 AT51 GND GND BE10 D4 GND GND P36
AA38 VDD VDD AF33 AB31 GND GND AJ39 AU10 GND GND BE16 D46 GND GND P39
AA39 VDD VDD AF34 AB32 GND GND AJ9 AU14 GND GND BE18 D49 GND GND P51
AA40 VDD VDD AF40 AB33 GND GND AK1 AU15 GND GND BE19 D7 GND GND R49
AB13 VDD VDD AG13 AB34 GND GND AK44 AU16 GND GND BE21 E2 GND GND R52
AB40 VDD VDD AG19 AB35 GND GND AK47 AU17 GND GND BE22 E4 GND GND T10
AC13 VDD VDD AG20 AB36 GND GND AL10 AU18 GND GND BE24 E48 GND GND T14
+1.8VSDGPU_AON AC14 VDD VDD AG21 AB37 GND GND AL14 AU19 GND GND BE25 E5 GND GND T15
AC17 VDD VDD AG27 AB4 GND GND AL17 AU21 GND GND BE30 F10 GND GND T18
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
AC18 AG28 AB43 AL18 AU22 BE31 F13 T19
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
VDD VDD GND GND GND GND GND GND

AC19 AG29 AB45 AL19 AU23 BE33 F16 T2
CG1161
CG1162
CG1163
CG1181
CG1182
CG1183
1 1 1 1 1 1 1 1 1 VDD VDD GND GND GND GND GND GND

CG291
CG1173
CG1174
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ AC22 VDD VDD AG37 AB51 GND GND AL21 AU26 GND GND BE37 F21 GND GND T22
2 2 2 2 2 2 2 2 2 AC23 VDD VDD AG38 AB6 GND GND AL22 AU27 GND GND BE39 F22 GND GND T23
AC25 VDD VDD AG40 AD14 GND GND AL24 AU29 GND GND BF2 F28 GND GND T25
AC26 VDD VDD AH13 AD15 GND GND AL25 AU30 GND GND BF4 F31 GND GND T26
C C
AC29 VDD VDD AH16 AD18 GND GND AL28 AU33 GND GND BG10 F37 GND GND T29
AC36 VDD VDD AH23 AD25 GND GND AL35 AU4 GND GND BG31 G2 GND GND T36
AD13 VDD VDD AH28 AD30 GND GND AL4 AU6 GND GND BG7 G51 GND GND T43
AD40 VDD VDD AH29 AD31 GND GND AL43 AU8 GND GND BH15 G6 GND GND T45
AE13 VDD VDD AH30 AD32 GND GND AL45 AV4 GND GND BH18 H1 GND GND T47
AE16 VDD VDD AH33 AD35 GND GND AL51 AW14 GND GND BH24 H16 GND GND T6
AE17 VDD VDD AH34 AD36 GND GND AL6 AW15 GND GND BH27 H19 GND GND T8
AE18 VDD VDD AH35 AD37 GND GND AL8 AW16 GND GND BH30 H22 GND GND U7
AE19 VDD VDD AH36 AD38 GND GND AM4 AW17 GND GND BH33 H25 GND GND U9
AE20 VDD VDD AH37 AD39 GND GND AM9 AW18 GND GND BH36 H28 GND GND V14
AE21 VDD VDD AH38 AD44 GND GND AN14 AW19 GND GND BH39 H31 GND GND V15
AE22 VDD VDD AV28 AE10 GND GND AN15 AW20 GND GND BH42 H34 GND GND V16
AE23 VDD VDD AV29 AE2 GND GND AN16 AW21 GND GND BH5 H37 GND GND V17
AE24 VDD VDD AV30 AE4 GND GND AN17 AW22 GND GND BJ10 H40 GND GND V18
AE25 VDD VDD AV31 AE43 GND GND AN18 AW23 GND GND BJ12 H43 GND GND V19
AE26 VDD VDD AV32 AE45 GND GND AN19 AW24 GND GND BJ13 J1 GND GND V20
AE27 VDD VDD AV33 AE47 GND GND AN20 AW25 GND GND BJ14 J12 GND GND V21
AT30 VDD VDD AV34 AE49 GND GND AN21 AW26 GND GND BJ15 J17 GND GND V22
AT34 VDD VDD AV38 AF1 GND GND AN25 AW30 GND GND BJ19 J52 GND GND V26
AT35 VDD VDD AV39 AF19 GND GND AN26 AW31 GND GND BJ20 K13 GND GND V27
B AT37 VDD VDD AV42 AF21 GND GND AN28 AW33 GND GND BJ22 K19 GND GND V29 B
AT40 VDD VDD AW13 AF27 GND GND AN31 AW36 GND GND BJ25 K25 GND GND V32
AT42 VDD VDD AW40 AF28 GND GND AN32 AW37 GND GND BJ26 K28 GND GND V33
AU13 VDD VDD AW42 AF29 GND GND AN33 AW38 GND GND BJ27 K31 GND GND V34
AV13 VDD VDD AW45 AF37 GND GND AN36 AW46 GND GND BJ30 K4 GND GND V37
AV14 VDD VDD AY13 AF38 GND GND AN37 AW5 GND GND BJ31 K40 GND GND V38
AV17 VDD VDD AY16 AF5 GND GND AN4 AY10 GND GND BJ34 K49 GND GND V52
AV18 VDD VDD AY17 AG14 GND GND AN5 AY2 GND GND BJ35 K51 GND GND W10
AV19 VDD VDD AY18 AG15 GND GND AN8 AY4 GND GND BJ36 K6 GND GND W2
AV20 VDD VDD AY19 AG16 GND GND AP10 AY47 GND GND BJ37 K8 GND GND W4
AV21 VDD VDD AY20 AG17 GND GND AP2 AY49 GND GND BJ38 M52 GND GND W43
AV22 VDD VDD AY21 AG18 GND GND AP4 AY51 GND GND BJ39 M6 GND GND Y9
AV23 VDD VDD AY22 AG24 GND GND AP43 AY6 GND GND BJ40 N10 GND
AV24 VDD VDD AY23 AG25 GND GND AP45 AY8 GND GND BJ41 N2 GND
AV25 VDD VDD AY24 AG26 GND GND AP47 B1 GND GND BJ42 N4 GND
AV26 VDD VDD AY25 AG3 GND GND AP49 B10 GND GND BJ43 N43 GND
AV27 VDD AG30 GND GND AP51 B13 GND GND BJ7 N45 GND
AG31 GND GND AP6 B16 GND GND BK1 N47 GND
AG32 GND GND AP8 B19 GND GND BL1 N49 GND
AG33 GND GND AR14 B2 GND GND BL10 BL37 GND
AG34 GND GND AR15 B22 GND GND BL13
AG44 GND GND AR16 B25 GND GND BL16
AH10 GND GND AR17 B28 GND GND BL19
AH43 GND GND BL34 B37 GND GND BL25
AH45 GND GND BC24 B40 GND GND BL28
AH47 GND B43 GND GND BL31
AH49 GND B46 GND GND B5
AH51 GND B48 GND GND B51
A A

N18E-G3(6/8) Power,GND
5 4 3 2 1
5 4 3 2 1
+1.8VSDGPU_AON
+1.8VSDGPU_AON
UG9U
2
COMMON
X76@ @ @ VGA@ @ @ 14/22 MISC 2 @ @ @
RG78 RG79 RG80 RG81 RG82 RG83 RG84 RG85 RG86
100K_0402_1% 100K_0402_1% 100K_0402_1% 100K_0402_1% 100K_0402_1% 100K_0402_1% BJ4 ROM_CS# 100K_0402_1% 10K_0402_5% 100K_0402_1%
ROM_CS
1
BK2 ROM_SI
D ROM_SI D
BK4 ROM_SO
ROM_SO
STRAP0 BL3 BK3 ROM_SCLK
STRAP0 ROM_SCLK
STRAP1 BL4 STRAP1
STRAP2 BM4 STRAP2
STRAP3 BM5 STRAP3
2
STRAP4 BK5 STRAP4
STRAP5 BJ5 STRAP5 VGA@ VGA@ VGA@
RG87 RG88 RG89
100K_0402_1% 10K_0402_5% 100K_0402_1%
2
@
1
X76@ VGA@ VGA@ @ VGA@ VGA@ BF9 GPU_BUFRST# T63
BUFRST
RG90 RG91 RG92 RG93 RG94 RG95 PAD~D
100K_0402_1% 100K_0402_1% 100K_0402_1% 100K_0402_1% 100K_0402_1% 100K_0402_1%
1
The Strap for ROM_SO should be 10K while all others are 100K.
(LSB) (MSB) (LSB) (MSB)
G-sync with VGA device Strap0 Strap1 Strap2 Strap3 Strap4 Strap5 ROM_SO ROM_SI ROM_SCLK
PD PD PD PU PD PD PD PD PD
Samsung 100kOhm 100kOhm 100kOhm 100kOhm 100kOhm 100kOhm 10kOhm 100kOhm 100kOhm +1.8VSDGPU_AON
K4Z80325BC-HC14 N18E CS# add 33ohm +1.8VSDGPU_AON
PU PD PD PU PD PD PD PD PD
MICRON 100kOhm 100kOhm 100kOhm 100kOhm 100kOhm 100kOhm 10kOhm 100kOhm 100kOhm
1
C C
MT61K256M32JE-14:A VGA@ 1 VGA@
RG74 CG66
VGA@ 10K_0402_5% 0.1U_0201_10V6K
RG2964
2
33_0402_5% UG13 2 VGA@
ROM_CS# 1 2 ROM_CS_R# 1 8 RG75
ROM_SO 1 @ 2 ROM_SO_R 2 CS# VCC 7 33_0402_5%
RG76 0_0402_5% 3 DO(IO1) HOLD#(IO3) 6 ROM_SCLK_R 1 2 ROM_SCLK
4 WP#(IO2) CLK 5 ROM_SI_R 1 2 ROM_SI
GND DI(IO0)
W25Q80EWSSIG_SO8 RG77
VGA@ 33_0402_5%
VGA@
DGPU VBIOS ROM 8Mb

P/N: SA00009QP00
UG9V
+1.8VSDGPU_MAIN +GPU_PLLVDD_XS_SP COMMON

13/22 XTAL/PLL
1 2 BD12 SP_PLLVDD
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
4.7U_0402_6.3V6M
LG4 BC12
CG1220
CG1222
1 1 1 VID_PLLVDD
1
PBY160808T-301Y-N
CG1223
CG1221
VGA@
VGA@ VGA@ VGA@ VGA@
2
2 2 2
B B
U42 GPCPLL_AVDD0
AF11 GPCPLL_AVDD1
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
+1.8VSDGPU_AON
CG1226
CG1224
CG1225
1 1 1
BB24 XSN_PLLVDD
2
VGA@ VGA@ VGA@ @
2 2 2 RG2882
100K_0402_1%
1
BJ6 XTALOUTBUFF_R
EXT_REFCLK_FL XTALOUTBUFF BK6
BL6 XTALIN XTALOUT BM6

1
VGA@
RG101 RG98
10K_0402_5% 100K_0402_1%
RG99 1 @ 2 10M_0402_5%
2
VGA@
1
RG199 VGA@
VGA@ 330_0402_1%
YG1
27MHZ_10PF_XRCGB27M000F2P18R0
2
A XTALIN 1 3 XTALOUT A
1 3
1 NC NC 1
CG75 CG76
2 4
15P_0402_50V8J 15P_0402_50V8J
2 2
VGA@ VGA@

N18E-G3(7/8) Strap,ROM
5 4 3 2 1
5 4 3 2 1
Pull down NVHS_DVDD, NVHS_CVDD, NVHS_HVDD,

NVHS_PLL_HVDD rails to GND with 10K Resistor
UG9S
D D
COMMON
11/22 NVHS
NVHS_RX0 AM1
NVHS_RX0 AN1
NVHS_RX1 AN2
+1.0VSDGPU +NVHS_DVDD NVHS_RX1 AN3
RG2996 1 @ 2 0_0603_5%
NVHS_RX2 AR3
1
NVHS_RX2 AR2
RG2890
10K_0402_5% NVHS_RX3 AR1
2 VGA@ NVHS_RX3 AT1
AT10 NVHS_DVDD NVHS_RX4 AT2

AT9 NVHS_DVDD NVHS_RX4 AT3
AV10 NVHS_DVDD
AV11 NVHS_DVDD NVHS_RX5 AV3
+1.0VSDGPU NVHS_RX5 AV2
AR10 NVHS_CVDD
AT11 NVHS_RX6 AV1
1U_0201_6.3V6M
1U_0201_6.3V6M NVHS_CVDD
AW1
CG2837
CG2838
1 1 NVHS_RX6
NVHS_RX7 AW2
VGA@ VGA@ NVHS_RX7 AW3
2 2
C NVHS_TX0 AM7 C
NVHS_TX0 AM8
NVHS_TX1 AN7
NVHS_TX1 AN6
+1.8VSDGPU_MAIN +NVHS_HVDD
RG2997 1 @ 2 0_0603_5% AM10 NVHS_HVDD NVHS_TX2 AR6
AM11 NVHS_HVDD NVHS_TX2 AR5
1
RG2892 AN10 NVHS_HVDD

10K_0402_5% AN11 NVHS_HVDD NVHS_TX3 AR7
VGA@ AR11 NVHS_HVDD AR8
NVHS_TX3
AN9 NVHS_PLL_HVDD NVHS_TX4
AT7
2
NVHS_TX4
AT6
NVHS_TX5 AV6
AV5
NVHS_TX5
+NVHS_PLL_HVDD AV7
NVHS_TX6
RG2998 1 @ 2 0_0603_5%
NVHS_TX6
AV8
1
NVHS_TX7 AW7
RG2893 NVHS_TX7 AW6
10K_0402_5%
VGA@
2
AM3 NVHS_TERMP NVHS_REFCLK AM6

NVHS_REFCLK AM5
B B
AM2
EXT_REFCLK_SLI
N18E-G3
NVHS RX/TX N/A
A A

N18E-G3(8/8) NVLINK
5 4 3 2 1
5 4 3 2 1
UG1 MF=1 UG2 MF=2

C2 B4 C2 B4
<28> FBA_EDC0 C13 EDC0_A DQ0_A A3 FBA_D4 <28> <28> FBA_EDC4 C13 EDC0_A DQ0_A A3 FBA_D39 <28>
<28> FBA_EDC1 EDC1_A DQ1_A FBA_D7 <28> <28> FBA_EDC5 EDC1_A DQ1_A FBA_D35 <28>
T2 B3 T2 B3
<28> FBA_EDC3 T13 EDC0_B DQ2_A B2 FBA_D1 <28> <28> FBA_EDC7 T13 EDC0_B DQ2_A B2 FBA_D32 <28>
<28> FBA_EDC2 EDC1_B DQ3_A FBA_D5 <28> <28> FBA_EDC6 EDC1_B DQ3_A FBA_D38 <28>
E3 E3
DQ4_A E2 FBA_D3 <28> DQ4_A E2 FBA_D34 <28>
D2 DQ5_A F2 FBA_D6 <28> D2 DQ5_A F2 FBA_D33 <28>
<28> FBA_DBI0 DBI0#_A DQ6_A FBA_D2 <28> <28> FBA_DBI4 DBI0#_A DQ6_A FBA_D37 <28>
D13 G2 D13 G2
<28> FBA_DBI1 R2 DBI1#_A DQ7_A B11 FBA_D0 <28> <28> FBA_DBI5 R2 DBI1#_A DQ7_A B11 FBA_D36 <28>
<28> FBA_DBI3 DBI0#_B DQ8_A FBA_D8 <28> <28> FBA_DBI7 DBI0#_B DQ8_A FBA_D43 <28>
R13 A12 R13 A12
<28> FBA_DBI2 DBI1#_B DQ9_A B12 FBA_D15 <28> <28> FBA_DBI6 DBI1#_B DQ9_A B12 FBA_D46 <28>
DQ10_A B13 FBA_D13 <28> DQ10_A B13 FBA_D44 <28>
D DQ11_A FBA_D14 <28> DQ11_A FBA_D42 <28> D
J10 E12 J10 E12
<28> FBA_CLK0 K10 CK DQ12_A E13 FBA_D12 <28> <28> FBA_CLK1 K10 CK DQ12_A E13 FBA_D45 <28>
<28> FBA_CLK0# CK# DQ13_A FBA_D10 <28> <28> FBA_CLK1# CK# DQ13_A FBA_D40 <28>
G10 F13 G10 F13
<28> FBA_CMD10 M10 CKE#_A DQ14_A G13 FBA_D11 <28> <28> FBA_CMD26 M10 CKE#_A DQ14_A G13 FBA_D41 <28>
CKE#_B DQ15_A FBA_D9 <28> CKE#_B DQ15_A FBA_D47 <28>
U4 U4
DQ0_B V3 FBA_D30 <28> DQ0_B V3 FBA_D57 <28>
DQ1_B FBA_D29 <28> DQ1_B FBA_D56 <28>
U3 U3
J5 DQ2_B U2 FBA_D28 <28> J5 DQ2_B U2 FBA_D59 <28>
<28> FBA_CMD6 K5 CABI#_A DQ3_B P3 FBA_D31 <28> <28> FBA_CMD22 K5 CABI#_A DQ3_B P3 FBA_D58 <28>
CABI#_B DQ4_B FBA_D25 <28> CABI#_B DQ4_B FBA_D61 <28>
P2 P2
DQ5_B N2 FBA_D27 <28> DQ5_B N2 FBA_D60 <28>
DQ6_B FBA_D24 <28> DQ6_B FBA_D63 <28>
M2 M2
DQ7_B U11 FBA_D26 <28> DQ7_B U11 FBA_D62 <28>
DQ8_B V12 FBA_D23 <28> DQ8_B V12 FBA_D49 <28>
DQ9_B FBA_D22 <28> DQ9_B FBA_D50 <28>
RG2857 2 VGA@ 1 121_0402_1% J14 U12 RG2939 2 VGA@ 1 121_0402_1% J14 U12
2 VGA@ 1 K14 ZQ_A DQ10_B U13 FBA_D20 <28> 2 VGA@ 1 K14 ZQ_A DQ10_B U13 FBA_D53 <28>
RG108 121_0402_1% RG2938 121_0402_1%
ZQ_B DQ11_B FBA_D17 <28> ZQ_B DQ11_B FBA_D48 <28>
P12 P12
DQ12_B P13 FBA_D21 <28> DQ12_B P13 FBA_D52 <28>
DQ13_B N13 FBA_D16 <28> DQ13_B N13 FBA_D51 <28>
DQ14_B FBA_D19 <28> DQ14_B FBA_D54 <28>
M13 M13
DQ15_B FBA_D18 <28> DQ15_B FBA_D55 <28>
SNN_FBAL_TCK_M N5 H3 SNN_FBAU_TCK N5 H3
SNN_FBAL_TDI_M F10 TCK CA0_A G11 FBA_CMD0 <28> SNN_FBAU_TDI F10 TCK CA0_A G11 FBA_CMD20 <28>
SNN_FBAL_TDO_M TDI CA1_A FBA_CMD9 <28> SNN_FBAU_TDO TDI CA1_A FBA_CMD28 <28>
N10 G4 N10 G4
SNN_FBAL_TMS_M F5 TDO CA2_A H12 FBA_CMD8 <28> SNN_FBAU_TMS F5 TDO CA2_A H12 FBA_CMD21 <28>
TMS CA3_A FBA_CMD7 FBA_CMD32 <28> TMS CA3_A FBA_CMD23 FBA_CMD29 <28>
H5 H5
CA4_A H10 FBA_CMD11 FBA_CMD7 <28> CA4_A H10 FBA_CMD27 FBA_CMD23 <28>
CA5_A J12 FBA_CMD15 FBA_CMD11 <28> CA5_A J12 FBA_CMD30 FBA_CMD27 <28>
CA6_A FBA_CMD14 FBA_CMD15 <28> CA6_A FBA_CMD31 FBA_CMD30 <28>
J11 J11
CA7_A J4 FBA_CMD3 FBA_CMD14 <28> CA7_A J4 FBA_CMD19 FBA_CMD31 <28>
CA8_A FBA_CMD1 FBA_CMD3 <28> CA8_A FBA_CMD17 FBA_CMD19 <28>
J3 J3
CA9_A FBA_CMD1 <28> CA9_A FBA_CMD17 <28>
L3 L3
FBA_WCK01 CA0_B FBA_CMD4 <28> FBA_WCK45 CA0_B FBA_CMD16 <28>
D4 M11 D4 M11
<28> FBA_WCK01 FBA_WCK01# D5 WCK_A CA1_B M4 FBA_CMD12 <28> <28> FBA_WCK45 FBA_WCK45# D5 WCK_A CA1_B M4 FBA_CMD25 <28>
<28> FBA_WCK01# FBA_WCK23 WCK#_A CA2_B FBA_CMD5 <28> <28> FBA_WCK45# FBA_WCK67 WCK#_A CA2_B FBA_CMD24 <28>
R11 L12 R11 L12
<28> FBA_WCK23 FBA_WCK23# R10 WCK_B CA3_B L5 FBA_CMD7 FBA_CMD13 <28> <28> FBA_WCK67 FBA_WCK67# R10 WCK_B CA3_B L5 FBA_CMD23 FBA_CMD33 <28>
<28> FBA_WCK23# WCK#_B CA4_B L10 FBA_CMD11 <28> FBA_WCK67# WCK#_B CA4_B L10 FBA_CMD27
CA5_B K12 FBA_CMD15 CA5_B K12 FBA_CMD30
EH50F remove all reserve MEM_VREF schemat i c W=16mils
+FBAA_VREFC
CA8_B
CA9_B
K3 FBA_CMD1
+1.35VSDGPU
W=16mils
+FBAB_VREFC
CA8_B
CA9_B
K3 FBA_CMD17
+1.35VSDGPU
K1 K1
VREFC VREFC
C1 C1
J1 VDDQ1 E1 J1 VDDQ1 E1
<28> FBA_CMD2 RESET# VDDQ2 H1 <28> FBA_CMD18 RESET# VDDQ2 H1
VDDQ3 L1 VDDQ3 L1
C B1 VDDQ4 P1 B1 VDDQ4 P1 C
+FBAA_VREFC D1 VSS1 VDDQ5 T1 D1 VSS1 VDDQ5 T1
F1 VSS2 VDDQ6 J2 F1 VSS2 VDDQ6 J2
+FBAB_VREFC
2
G1 VSS3 VDDQ7 K2 G1 VSS3 VDDQ7 K2

1K_0402_5%
M1 VSS4 VDDQ8 C4 M1 VSS4 VDDQ8 C4

RG2875
VSS5 VDDQ9 VSS5 VDDQ9
2
VGA@ N1 F4 N1 F4
1K_0402_5%
R1 VSS6 VDDQ10 N4 R1 VSS6 VDDQ10 N4
RG3016
U1 VSS7 VDDQ11 T4 VGA@ U1 VSS7 VDDQ11 T4
1
A2 VSS8 VDDQ12 B5 A2 VSS8 VDDQ12 B5

V2 VSS9 VDDQ13 U5 V2 VSS9 VDDQ13 U5
1
C3 VSS10 VDDQ14 B10 C3 VSS10 VDDQ14 B10
D3 VSS11 VDDQ15 U10 D3 VSS11 VDDQ15 U10
F3 VSS12 VDDQ16 C11 F3 VSS12 VDDQ16 C11
G3 VSS13 VDDQ17 F11 G3 VSS13 VDDQ17 F11
M3 VSS14 VDDQ18 N11 M3 VSS14 VDDQ18 N11
N3 VSS15 VDDQ19 T11 N3 VSS15 VDDQ19 T11
R3 VSS16 VDDQ20 J13 R3 VSS16 VDDQ20 J13
T3 VSS17 VDDQ21 K13 T3 VSS17 VDDQ21 K13
A4 VSS18 VDDQ22 C14 A4 VSS18 VDDQ22 C14
E4 VSS19 VDDQ23 E14 E4 VSS19 VDDQ23 E14
H4 VSS20 VDDQ24 H14 H4 VSS20 VDDQ24 H14
L4 VSS21 VDDQ25 L14 L4 VSS21 VDDQ25 L14
P4 VSS22 VDDQ26 P14 P4 VSS22 VDDQ26 P14
V4 VSS23 VDDQ27 T14 V4 VSS23 VDDQ27 T14
C5 VSS24 VDDQ28 C5 VSS24 VDDQ28
T5 VSS25 T5 VSS25
C10 VSS26 A1 C10 VSS26 A1
T10 VSS27 VDD1 V1 T10 VSS27 VDD1 V1
A11 VSS28 VDD2 H2 A11 VSS28 VDD2 H2
E11 VSS29 VDD3 L2 E11 VSS29 VDD3 L2
H11 VSS30 VDD4 E5 H11 VSS30 VDD4 E5
L11 VSS31 VDD5 P5 L11 VSS31 VDD5 P5
P11 VSS32 VDD6 E10 P11 VSS32 VDD6 E10
V11 VSS33 VDD7 P10 V11 VSS33 VDD7 P10
C12 VSS34 VDD8 H13 C12 VSS34 VDD8 H13
D12 VSS35 VDD9 L13 D12 VSS35 VDD9 L13
F12 VSS36 VDD10 A14 F12 VSS36 VDD10 A14
G12 VSS37 VDD11 V14 G12 VSS37 VDD11 V14
M12 VSS38 VDD12 +1.8VSDGPU_AON M12 VSS38 VDD12 +1.8VSDGPU_AON
N12 VSS39 N12 VSS39
R12 VSS40 A5 R12 VSS40 A5
T12 VSS41 VPP1 V5 T12 VSS41 VPP1 V5
A13 VSS42 VPP2 A10 A13 VSS42 VPP2 A10
V13 VSS43 VPP3 V10 V13 VSS43 VPP3 V10
B14 VSS44 VPP4 B14 VSS44 VPP4
D14 VSS45 R4 FBA_WCKB23 D14 VSS45 R4 FBA_WCKB67
F14 VSS46 WCK0_t_B,NC R5 FBA_WCKB23# FBA_WCKB23 <28> F14 VSS46 WCK0_t_B,NC R5 FBA_WCKB67# FBA_WCKB67 <28>
VSS47 WCK0_c_B,NC FBA_WCKB23# <28> VSS47 WCK0_c_B,NC FBA_WCKB67# <28>
G14 G14
M14 VSS48 G5 SNN_FBAL_RFU_A_M M14 VSS48 G5 SNN_FBAU_RFU_A
N14 VSS49 RFU_A,NC M5 SNN_FBAL_RFU_B_M N14 VSS49 RFU_A,NC M5 SNN_FBAU_RFU_B
B R14 VSS50 RFU_B,NC R14 VSS50 RFU_B,NC B
U14 VSS51
180-BALL D10 FBA_WCKB01# U14 VSS51
180-BALL D10 FBA_WCKB45#
FBA_WCKB01# <28> FBA_WCKB45# <28>
VSS52 SGRAM GDDR6 WCK1_c_A,NC D11 FBA_WCKB01 VSS52 SGRAM GDDR6 WCK1_c_A,NC D11 FBA_WCKB45
WCK1_t_A,NC FBA_WCKB01 <28> WCK1_t_A,NC FBA_WCKB45 <28>
X76@ K4Z80325BC-HC14_FBGA180~D X76@ K4Z80325BC-HC14_FBGA180~D
+1.35VSDGPU
+1.35VSDGPU
Close to DRAM Close to DRAM
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
CG1311
CG1315
CG1317
CG1319
CG1320
CG1305
CG1312
CG1313
CG1314
CG1316
CG1318
CG1321
Close to DRAM Close to DRAM 1 1 1 1 1 1 1 1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CG1302
CG1301
CG1303
CG2817
CG2816
CG2818
2 2 2 2 2 2
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
@ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@

CG1234
CG1235
CG1236
CG1237
CG1239
CG1238
CG1240
CG1241
CG1242
CG1243
CG1244
CG1245
1 1 1 1 1 1 1 1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
2 2 2 2 2 2 2 2 2 2 2 2 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@

CG1276
CG1275
CG1277
CG2814
CG2813
CG2815
2 2 2 2 2 2 1 1 1 1 1 1
@ @ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
1 1 1 1 1 1
+1.35VSDGPU Right under DRAM +1.35VSDGPU

around DRAM
around DRAM
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
CG1322
CG1324
CG1325
CG1326
CG1327
CG1329
CG1328
CG1333
CG1323
CG1330
CG1331
CG1332
1 1 1 1 1 1 1 1 1 1 1 1
1
CG1304
CG1306
CG1307
CG1308
CG1309
CG1310
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
@ @ @ @ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
CG1247
CG1248
CG1250
CG1251
CG1254
CG1246
CG1249
CG1252
CG1253
CG1255
CG1256
CG1257
1 1 1 1 1 1 1 1 1 1 1 1
2
1
2 2 2 2 2 2 2 2 2 2 2 2
CG1278
CG1279
CG1280
CG1281
CG1282
CG1283
@ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2
2 2 2 2 2 2 2 2 2 2 2 2
+1.35VSDGPU Close to DRAM +1.8VSDGPU_AON
A +1.35VSDGPU Close to DRAM +1.8VSDGPU_AON A
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
4.7U_0402_6.3V6M
CG1286
CG1288
CG1289
CG1291
CG1294
CG1284
CG1285
CG1287
CG1290
CG1292
CG1293
CG1295
CG1298
CG1296
CG1297
CG1299
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CG1300
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
4.7U_0402_6.3V6M
@ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
CG1258
CG1259
CG1261
CG1265
CG1264
CG1267
CG1269
CG1260
CG1262
CG1263
CG1266
CG1268
CG1271
CG1270
CG1272
CG1273
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
CG1274
@ @ @ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

N18E-GDDR6_A
5 4 3 2 1
5 4 3 2 1
UG3 MF=1 UG4 MF=2

C2 B4 C2 B4
<28> FBB_EDC0 C13 EDC0_A DQ0_A A3 FBB_D1 <28> <28> FBB_EDC4 C13 EDC0_A DQ0_A A3 FBB_D35 <28>
<28> FBB_EDC1 EDC1_A DQ1_A FBB_D6 <28> <28> FBB_EDC5 EDC1_A DQ1_A FBB_D33 <28>
T2 B3 T2 B3
<28> FBB_EDC3 T13 EDC0_B DQ2_A B2 FBB_D2 <28> <28> FBB_EDC7 T13 EDC0_B DQ2_A B2 FBB_D32 <28>
<28> FBB_EDC2 EDC1_B DQ3_A FBB_D4 <28> <28> FBB_EDC6 EDC1_B DQ3_A FBB_D36 <28>
E3 E3
DQ4_A E2 FBB_D5 <28> DQ4_A E2 FBB_D39 <28>
D2 DQ5_A F2 FBB_D3 <28> D2 DQ5_A F2 FBB_D34 <28>
<28> FBB_DBI0 DBI0#_A DQ6_A FBB_D0 <28> <28> FBB_DBI4 DBI0#_A DQ6_A FBB_D37 <28>
D13 G2 D13 G2
<28> FBB_DBI1 R2 DBI1#_A DQ7_A B11 FBB_D7 <28> <28> FBB_DBI5 R2 DBI1#_A DQ7_A B11 FBB_D38 <28>
<28> FBB_DBI3 DBI0#_B DQ8_A FBB_D13 <28> <28> FBB_DBI7 DBI0#_B DQ8_A FBB_D42 <28>
R13 A12 R13 A12
<28> FBB_DBI2 DBI1#_B DQ9_A B12 FBB_D14 <28> <28> FBB_DBI6 DBI1#_B DQ9_A B12 FBB_D43 <28>
DQ10_A B13 FBB_D12 <28> DQ10_A B13 FBB_D40 <28>
D DQ11_A FBB_D11 <28> DQ11_A FBB_D45 <28> D
J10 E12 J10 E12
<28> FBB_CLK0 K10 CK DQ12_A E13 FBB_D15 <28> <28> FBB_CLK1 K10 CK DQ12_A E13 FBB_D41 <28>
<28> FBB_CLK0# CK# DQ13_A FBB_D8 <28> <28> FBB_CLK1# CK# DQ13_A FBB_D44 <28>
G10 F13 G10 F13
<28> FBB_CMD10 M10 CKE#_A DQ14_A G13 FBB_D9 <28> <28> FBB_CMD26 M10 CKE#_A DQ14_A G13 FBB_D46 <28>
CKE#_B DQ15_A FBB_D10 <28> CKE#_B DQ15_A FBB_D47 <28>
U4 U4
DQ0_B V3 FBB_D24 <28> DQ0_B V3 FBB_D62 <28>
DQ1_B FBB_D30 <28> DQ1_B FBB_D59 <28>
U3 U3
J5 DQ2_B U2 FBB_D29 <28> J5 DQ2_B U2 FBB_D57 <28>
<28> FBB_CMD6 K5 CABI#_A DQ3_B P3 FBB_D31 <28> <28> FBB_CMD22 K5 CABI#_A DQ3_B P3 FBB_D63 <28>
CABI#_B DQ4_B FBB_D25 <28> CABI#_B DQ4_B FBB_D56 <28>
P2 P2
DQ5_B N2 FBB_D26 <28> DQ5_B N2 FBB_D61 <28>
DQ6_B FBB_D27 <28> DQ6_B FBB_D60 <28>
M2 M2
DQ7_B U11 FBB_D28 <28> DQ7_B U11 FBB_D58 <28>
DQ8_B V12 FBB_D21 <28> DQ8_B V12 FBB_D55 <28>
DQ9_B FBB_D16 <28> DQ9_B FBB_D48 <28>
RG2943 2 VGA@ 1 121_0402_1% J14 U12 RG2940 2 VGA@ 1 121_0402_1% J14 U12
2 VGA@ 1 K14 ZQ_A DQ10_B U13 FBB_D20 <28> 2 VGA@ 1 K14 ZQ_A DQ10_B U13 FBB_D52 <28>
RG2942 121_0402_1% RG2941 121_0402_1%
ZQ_B DQ11_B FBB_D17 <28> ZQ_B DQ11_B FBB_D50 <28>
P12 P12
DQ12_B P13 FBB_D18 <28> DQ12_B P13 FBB_D49 <28>
DQ13_B N13 FBB_D22 <28> DQ13_B N13 FBB_D51 <28>
DQ14_B FBB_D23 <28> DQ14_B FBB_D53 <28>
M13 M13
DQ15_B FBB_D19 <28> DQ15_B FBB_D54 <28>
SNN_FBBL_TCK_M N5 H3 SNN_FBBU_TCK N5 H3
SNN_FBBL_TDI_M F10 TCK CA0_A G11 FBB_CMD0 <28> SNN_FBBU_TDI F10 TCK CA0_A G11 FBB_CMD20 <28>
SNN_FBBL_TDO_M TDI CA1_A FBB_CMD9 <28> SNN_FBBU_TDO TDI CA1_A FBB_CMD28 <28>
N10 G4 N10 G4
SNN_FBBL_TMS_M F5 TDO CA2_A H12 FBB_CMD8 <28> SNN_FBBU_TMS F5 TDO CA2_A H12 FBB_CMD21 <28>
TMS CA3_A FBB_CMD7 FBB_CMD32 <28> TMS CA3_A FBB_CMD23 FBB_CMD29 <28>
H5 H5
CA4_A H10 FBB_CMD11 FBB_CMD7 <28> CA4_A H10 FBB_CMD27 FBB_CMD23 <28>
CA5_A J12 FBB_CMD15 FBB_CMD11 <28> CA5_A J12 FBB_CMD30 FBB_CMD27 <28>
CA6_A FBB_CMD14 FBB_CMD15 <28> CA6_A FBB_CMD31 FBB_CMD30 <28>
J11 J11
CA7_A J4 FBB_CMD3 FBB_CMD14 <28> CA7_A J4 FBB_CMD19 FBB_CMD31 <28>
CA8_A FBB_CMD1 FBB_CMD3 <28> CA8_A FBB_CMD17 FBB_CMD19 <28>
J3 J3
CA9_A FBB_CMD1 <28> CA9_A FBB_CMD17 <28>
L3 L3
FBB_WCK01 CA0_B FBB_CMD4 <28> FBB_WCK45 CA0_B FBB_CMD16 <28>
D4 M11 D4 M11
<28> FBB_WCK01 FBB_WCK01# D5 WCK_A CA1_B M4 FBB_CMD12 <28> <28> FBB_WCK45 FBB_WCK45# D5 WCK_A CA1_B M4 FBB_CMD25 <28>
<28> FBB_WCK01# FBB_WCK23 WCK#_A CA2_B FBB_CMD5 <28> <28> FBB_WCK45# FBB_WCK67 WCK#_A CA2_B FBB_CMD24 <28>
R11 L12 R11 L12
<28> FBB_WCK23 FBB_WCK23# R10 WCK_B CA3_B L5 FBB_CMD7 FBB_CMD13 <28> <28> FBB_WCK67 FBB_WCK67# R10 WCK_B CA3_B L5 FBB_CMD23 FBB_CMD33 <28>
<28> FBB_WCK23# WCK#_B CA4_B L10 FBB_CMD11 <28> FBB_WCK67# WCK#_B CA4_B L10 FBB_CMD27
CA5_B K12 FBB_CMD15 CA5_B K12 FBB_CMD30
W=16mils
+FBBA_VREFC
CA8_B
CA9_B
K3 FBB_CMD1
+1.35VSDGPU
W=16mils
+FBBB_VREFC
CA8_B
CA9_B
K3 FBB_CMD17
+1.35VSDGPU
K1 K1
VREFC VREFC
C1 C1
<28> FBB_CMD2 RESET# VDDQ2 H1 <28> FBB_CMD18 RESET# VDDQ2 H1
VDDQ3 L1 VDDQ3 L1
C B1 VDDQ4 P1 B1 VDDQ4 P1 C
+FBBA_VREFC D1 VSS1 VDDQ5 T1 +FBBB_VREFC D1 VSS1 VDDQ5 T1
2
2
M1 C4 M1 C4
1K_0402_5%
1K_0402_5%
N1 VSS5 VDDQ9 F4 N1 VSS5 VDDQ9 F4
RG2874
RG3017
VGA@ R1 VSS6 VDDQ10 N4 VGA@ R1 VSS6 VDDQ10 N4
U1 VSS7 VDDQ11 T4 U1 VSS7 VDDQ11 T4
1
1
T5 VSS25 T5 VSS25
N12 VSS39 N12 VSS39
D14 VSS45 R4 FBB_WCKB23 D14 VSS45 R4 FBB_WCKB67
F14 VSS46 WCK0_t_B,NC R5 FBB_WCKB23# FBB_WCKB23 <28> F14 VSS46 WCK0_t_B,NC R5 FBB_WCKB67# FBB_WCKB67 <28>
VSS47 WCK0_c_B,NC FBB_WCKB23# <28> VSS47 WCK0_c_B,NC FBB_WCKB67# <28>
G14 G14
M14 VSS48 G5 SNN_FBBL_RFU_A_M M14 VSS48 G5 SNN_FBBU_RFU_A
N14 VSS49 RFU_A,NC M5 SNN_FBBL_RFU_B_M N14 VSS49 RFU_A,NC M5 SNN_FBBU_RFU_B
U14 VSS51
180-BALL D10 FBB_WCKB01# U14 VSS51
180-BALL D10 FBB_WCKB45#
FBB_WCKB45# <28>
VSS52 SGRAM GDDR6 WCK1_c_A,NC D11 FBB_WCKB01 FBB_WCKB01# <28> VSS52 SGRAM GDDR6 WCK1_c_A,NC D11 FBB_WCKB45
WCK1_t_A,NC FBB_WCKB01 <28> WCK1_t_A,NC FBB_WCKB45 <28>
+1.35VSDGPU
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
+1.35VSDGPU
CG1405
CG1411
CG1412
CG1416
CG1417
CG1419
CG1418
CG1420
CG1421
CG1413
CG1414
CG1415
1 1 1 1 1 1 1 1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CG1402
CG1401
CG1403
CG2823
CG2822
CG2824
Close to DRAM Close to DRAM 2 2 2 2 2 2
@ @ @ @ @ @ @ @ @ VGA@ VGA@ VGA@
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M

CG1361
CG1363
CG1365
CG1367
CG1369
CG1368
CG1370
CG1355
CG1362
CG1364
CG1366
CG1371
1 1 1 1 1 1 1 1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1 1 1
CG1352
CG1351
CG1353
CG2820
CG2819
CG2821
2 2 2 2 2 2
@ @ @ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@
1 1 1 1 1 1

around DRAM
Right under DRAM
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
CG1422
CG1431
CG1433
CG1423
CG1424
CG1425
CG1426
CG1427
CG1428
CG1429
CG1430
CG1432
around DRAM 1 1 1 1 1 1 1 1 1 1 1 1
1
CG1404
CG1406
CG1407
CG1408
CG1409
CG1410
@ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2
2 2 2 2 2 2 2 2 2 2 2 2
CG1372
CG1374
CG1376
CG1379
CG1383
CG1373
CG1375
CG1377
CG1378
CG1380
CG1381
CG1382
1 1 1 1 1 1 1 1 1 1 1 1
1
1
CG1354
CG1356
CG1357
CG1358
CG1359
CG1360
@ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2
2 2 2 2 2 2 2 2 2 2 2 2
Close to DRAM
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
4.7U_0402_6.3V6M
A +1.35VSDGPU +1.8VSDGPU_AON A
CG1385
CG1384
CG1392
CG1390
CG1393
CG1391
CG1386
CG1387
CG1388
CG1389
CG1394
CG1395
CG1398
CG1396
CG1397
CG1399
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CG1400
@ @ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
4.7U_0402_6.3V6M
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
CG1335
CG1334
CG1337
CG1340
CG1343
CG1341
CG1336
CG1338
CG1339
CG1342
CG1344
CG1345
CG1348
CG1346
CG1347
CG1349
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CG1350
@ @ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

N18E-GDDR6_B
5 4 3 2 1
5 4 3 2 1
0805 follow CRB_004
UG5 MF=1 UG6 MF=2

C2 B4 C2 B4
<28> FBC_EDC0 C13 EDC0_A DQ0_A A3 FBC_D1 <28> <28> FBC_EDC4 C13 EDC0_A DQ0_A A3 FBC_D38 <28>
<28> FBC_EDC1 EDC1_A DQ1_A FBC_D7 <28> <28> FBC_EDC5 EDC1_A DQ1_A FBC_D34 <28>
T2 B3 T2 B3
<28> FBC_EDC3 T13 EDC0_B DQ2_A B2 FBC_D5 <28> <28> FBC_EDC7 T13 EDC0_B DQ2_A B2 FBC_D36 <28>
<28> FBC_EDC2 EDC1_B DQ3_A FBC_D4 <28> <28> FBC_EDC6 EDC1_B DQ3_A FBC_D39 <28>
E3 E3
DQ4_A E2 FBC_D6 <28> DQ4_A E2 FBC_D35 <28>
D2 DQ5_A F2 FBC_D3 <28> D2 DQ5_A F2 FBC_D32 <28>
<28> FBC_DBI0 DBI0#_A DQ6_A FBC_D0 <28> <28> FBC_DBI4 DBI0#_A DQ6_A FBC_D33 <28>
D13 G2 D13 G2
<28> FBC_DBI1 R2 DBI1#_A DQ7_A B11 FBC_D2 <28> <28> FBC_DBI5 R2 DBI1#_A DQ7_A B11 FBC_D37 <28>
<28> FBC_DBI3 DBI0#_B DQ8_A FBC_D14 <28> <28> FBC_DBI7 DBI0#_B DQ8_A FBC_D40 <28>
R13 A12 R13 A12
<28> FBC_DBI2 DBI1#_B DQ9_A B12 FBC_D15 <28> <28> FBC_DBI6 DBI1#_B DQ9_A B12 FBC_D43 <28>
DQ10_A B13 FBC_D8 <28> DQ10_A B13 FBC_D46 <28>
D DQ11_A FBC_D12 <28> DQ11_A FBC_D42 <28> D
J10 E12 J10 E12
<28> FBC_CLK0 K10 CK DQ12_A E13 FBC_D13 <28> <28> FBC_CLK1 K10 CK DQ12_A E13 FBC_D44 <28>
<28> FBC_CLK0# CK# DQ13_A FBC_D9 <28> <28> FBC_CLK1# CK# DQ13_A FBC_D45 <28>
G10 F13 G10 F13
<28> FBC_CMD10 M10 CKE#_A DQ14_A G13 FBC_D11 <28> <28> FBC_CMD26 M10 CKE#_A DQ14_A G13 FBC_D47 <28>
CKE#_B DQ15_A FBC_D10 <28> CKE#_B DQ15_A FBC_D41 <28>
U4 U4
DQ0_B V3 FBC_D25 <28> DQ0_B V3 FBC_D56 <28>
DQ1_B FBC_D29 <28> DQ1_B FBC_D57 <28>
U3 U3
J5 DQ2_B U2 FBC_D28 <28> J5 DQ2_B U2 FBC_D58 <28>
<28> FBC_CMD6 K5 CABI#_A DQ3_B P3 FBC_D31 <28> <28> FBC_CMD22 K5 CABI#_A DQ3_B P3 FBC_D59 <28>
CABI#_B DQ4_B FBC_D26 <28> CABI#_B DQ4_B FBC_D60 <28>
P2 P2
DQ5_B N2 FBC_D24 <28> DQ5_B N2 FBC_D61 <28>
DQ6_B FBC_D30 <28> DQ6_B FBC_D62 <28>
M2 M2
DQ7_B U11 FBC_D27 <28> DQ7_B U11 FBC_D63 <28>
DQ8_B V12 FBC_D23 <28> DQ8_B V12 FBC_D51 <28>
DQ9_B FBC_D20 <28> DQ9_B FBC_D50 <28>
RG2947 2 VGA@ 1 121_0402_1% J14 U12 RG2944 2 VGA@ 1 121_0402_1% J14 U12
2 VGA@ 1 K14 ZQ_A DQ10_B U13 FBC_D22 <28> 2 VGA@ 1 K14 ZQ_A DQ10_B U13 FBC_D48 <28>
RG2946 121_0402_1% RG2945 121_0402_1%
ZQ_B DQ11_B FBC_D21 <28> ZQ_B DQ11_B FBC_D49 <28>
P12 P12
DQ12_B P13 FBC_D18 <28> DQ12_B P13 FBC_D53 <28>
DQ13_B N13 FBC_D19 <28> DQ13_B N13 FBC_D52 <28>
DQ14_B FBC_D17 <28> DQ14_B FBC_D55 <28>
M13 M13
DQ15_B FBC_D16 <28> DQ15_B FBC_D54 <28>
SNN_FBCL_TCK_M N5 H3 SNN_FBCU_TCK N5 H3
SNN_FBCL_TDI_M F10 TCK CA0_A G11 FBC_CMD0 <28> SNN_FBCU_TDI F10 TCK CA0_A G11 FBC_CMD20 <28>
SNN_FBCL_TDO_M TDI CA1_A FBC_CMD9 <28> SNN_FBCU_TDO TDI CA1_A FBC_CMD28 <28>
N10 G4 N10 G4
SNN_FBCL_TMS_M F5 TDO CA2_A H12 FBC_CMD8 <28> SNN_FBCU_TMS F5 TDO CA2_A H12 FBC_CMD21 <28>
TMS CA3_A FBC_CMD7 FBC_CMD32 <28> TMS CA3_A FBC_CMD23 FBC_CMD29 <28>
H5 H5
CA4_A H10 FBC_CMD11 FBC_CMD7 <28> CA4_A H10 FBC_CMD27 FBC_CMD23 <28>
CA5_A J12 FBC_CMD15 FBC_CMD11 <28> CA5_A J12 FBC_CMD30 FBC_CMD27 <28>
CA6_A FBC_CMD14 FBC_CMD15 <28> CA6_A FBC_CMD31 FBC_CMD30 <28>
J11 J11
CA7_A J4 FBC_CMD3 FBC_CMD14 <28> CA7_A J4 FBC_CMD19 FBC_CMD31 <28>
CA8_A FBC_CMD1 FBC_CMD3 <28> CA8_A FBC_CMD17 FBC_CMD19 <28>
J3 J3
CA9_A FBC_CMD1 <28> CA9_A FBC_CMD17 <28>
L3 L3
FBC_WCK01 CA0_B FBC_CMD4 <28> FBC_WCK45 CA0_B FBC_CMD16 <28>
D4 M11 D4 M11
<28> FBC_WCK01 FBC_WCK01# D5 WCK_A CA1_B M4 FBC_CMD12 <28> <28> FBC_WCK45 FBC_WCK45# D5 WCK_A CA1_B M4 FBC_CMD25 <28>
<28> FBC_WCK01# FBC_WCK23 WCK#_A CA2_B FBC_CMD5 <28> <28> FBC_WCK45# FBC_WCK67 WCK#_A CA2_B FBC_CMD24 <28>
R11 L12 R11 L12
<28> FBC_WCK23 FBC_WCK23# R10 WCK_B CA3_B L5 FBC_CMD7 FBC_CMD13 <28> <28> FBC_WCK67 FBC_WCK67# R10 WCK_B CA3_B L5 FBC_CMD23 FBC_CMD33 <28>
<28> FBC_WCK23# WCK#_B CA4_B L10 FBC_CMD11 <28> FBC_WCK67# WCK#_B CA4_B L10 FBC_CMD27
CA5_B K12 FBC_CMD15 CA5_B K12 FBC_CMD30
+FBCA_VREFC
W=16mils CA8_B
CA9_B
K3 FBC_CMD1
+1.35VSDGPU
W=16mils
+FBCB_VREFC
CA8_B
CA9_B
K3 FBC_CMD17
+1.35VSDGPU
K1 K1
VREFC VREFC
C1 C1
<28> FBC_CMD2 RESET# VDDQ2 H1 <28> FBC_CMD18 RESET# VDDQ2 H1
VDDQ3 L1 VDDQ3 L1
C B1 VDDQ4 P1 +FBCB_VREFC B1 VDDQ4 P1 C
+FBCA_VREFC D1 VSS1 VDDQ5 T1 D1 VSS1 VDDQ5 T1
2
1K_0402_5%
2
M1 C4 M1 C4
RG3018
1K_0402_5%
N1 VSS5 VDDQ9 F4 VGA@ N1 VSS5 VDDQ9 F4

RG2873
VGA@ R1 VSS6 VDDQ10 N4 R1 VSS6 VDDQ10 N4

U1 VSS7 VDDQ11 T4 U1 VSS7 VDDQ11 T4
1
1

T5 VSS25 T5 VSS25
N12 VSS39 N12 VSS39
D14 VSS45 R4 FBC_WCKB23 D14 VSS45 R4 FBC_WCKB67
F14 VSS46 WCK0_t_B,NC R5 FBC_WCKB23# FBC_WCKB23 <28> F14 VSS46 WCK0_t_B,NC R5 FBC_WCKB67# FBC_WCKB67 <28>
VSS47 WCK0_c_B,NC FBC_WCKB23# <28> VSS47 WCK0_c_B,NC FBC_WCKB67# <28>
G14 G14
M14 VSS48 G5 SNN_FBCL_RFU_A_M M14 VSS48 G5 SNN_FBCU_RFU_A
N14 VSS49 RFU_A,NC M5 SNN_FBCL_RFU_B_M N14 VSS49 RFU_A,NC M5 SNN_FBCU_RFU_B
U14 VSS51
180-BALL D10 FBC_WCKB01# U14 VSS51
180-BALL D10 FBC_WCKB45#
FBC_WCKB01# <28> FBC_WCKB45# <28>
VSS52 SGRAM GDDR6 WCK1_c_A,NC D11 FBC_WCKB01 VSS52 SGRAM GDDR6 WCK1_c_A,NC D11 FBC_WCKB45
WCK1_t_A,NC FBC_WCKB01 <28> WCK1_t_A,NC FBC_WCKB45 <28>
EH50F +1.35VSDGPU
Add for cap reduce +1.35VSDGPU +1.35VSDGPU
+1.35VSDGPU
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
CG1505
CG1511
CG1513
CG1516
CG1517
CG1518
CG1520
CG1521
CG1512
CG1514
CG1515
CG1519
1 1 1 1 1 1 1 1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
CG1502
CG1501
CG1503
CG2829
CG2828
CG2830
2 2 2 2 2 2
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CG1461
CG1462
CG1464
CG1470
CG1471
CG1455
CG1463
CG1465
CG1466
CG1467
CG1468
CG1469
CG2839
CG2840
1 1 1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1
@ @ @ @ @ @ @ @ VGA@ VGA@ VGA@ VGA@

CG1452
CG1451
CG1453
CG2826
CG2825
CG2827
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@

@ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ 1 1 1 1 1 1
2
2 2 2 2 2 2 2 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@

1 1 1 1 1 1

around DRAM
around DRAM
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
CG1522
CG1524
CG1525
CG1526
CG1528
CG1532
CG1523
CG1527
CG1529
CG1530
CG1531
CG1533
1 1 1 1 1 1 1 1 1 1 1 1
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
1
CG1504
CG1506
CG1507
CG1508
CG1509
CG1510
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
CG1472
CG1473
CG1474
CG1475
CG1477
CG1478
CG1476
CG1479
CG1480
CG1481
CG1482
CG1483
1 1 1 1 1 1
1
@ @ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
CG1454
CG1456
CG1457
CG1458
CG1459
CG1460
2
2 2 2 2 2 2 2 2 2 2 2 2
@ @ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2
2 2 2 2 2 2
A A
EH50F +1.35VSDGPU Close to DRAM +1.8VSDGPU_AON
pop for power via
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
4.7U_0402_6.3V6M
CG1486
CG1489
CG1492
CG1495
CG1485
CG1484
CG1487
CG1488
CG1490
CG1491
CG1493
CG1494
CG1498
CG1496
CG1497
CG1499
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
CG1500
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
4.7U_0402_6.3V6M
CG1435
CG1437
CG1439
CG1440
CG1441
CG1443
CG1444
CG1434
CG1436
CG1438
CG1442
CG1445
CG1448
CG1446
CG1447
CG1449
1 1 1 1 1 1 1 1 1 1 1 1
1
@ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
CG1450
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
@ @ @ @ @ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2
2 2 2 2 2 2 2 2 2 2 2 2

N18E-GDDR6_C
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
A B C D E F G H
remove GPK
1 1
<19,25> DGPU_PWR_EN
<25,93> 1.35VSDGPU_EN
<25,95> NVVDD1_EN
<25> 1.8VSDGPU_MAIN_EN
<25> 1.8VSDGPU_MAIN_EN3V3
<19,25> GC6_FB_EN3V3
<25> OVERT#
<25> DGPU_PEX_RST#
@
CG939 1 2 0.1U_0201_10V6K OVERT#
@
CG940 1 2 0.1U_0201_10V6K DGPU_PEX_RST#
@
CG941 1 2 0.1U_0201_10V6K 1.8VSDGPU_MAIN_EN
Reserve for 1.8V O.D. pin.
+1.8VALW to +1.8VSDGPU_AON & +3VS to +3VSDGPU +1.8VSDGPU_AON

DG8
DGPU_PWR_EN 3
1V8_AON_EN 1
2 RB751S40T1G_SOD523-2 1 @ CG936 2
+3VS DG30 2 0.1U_0201_10V6K
VGA@ <25,93> 1.35VSDGPU_PG
1 2
1
BAV70W_SOT323-3 +1.8VALW +1.8VSDGPU_AON 2
5
UG19 VGA@ RG2771VGA@ UG27

RG2778 100K_0402_5% 1 14
VCC
DGPU_PWR_EN 1 1K_0402_5% 2 VIN1 VOUT1 13

IN B 4 3VSDGPU_EN_1 3VSDGPU_EN_R_3V3 VIN1 VOUT1
10U_0402_6.3V6M
CG334 VGA@
1 2 CG335 220P_0402_50V7K
2
1.8VSDGPU_MAIN_EN3V3 2 OUT Y VGA@ 1V8_AON_EN 3 12 1 2 1
GND
IN A +5VALW ON1 CT1 VGA@

1
CG315 VGA@ 4 11
NL17SZ08DFT2G_SC70-5 0.1U_0201_10V6K VBIAS GND CG336 220P_0402_50V7K
3
VGA@ 3VSDGPU_EN_GC6 5 10 1 2 2
2 ON2 CT2 VGA@
6 9 +3VSDGPU
1 +3VS VIN2 VOUT2
VGA@ CG337 1 7 8
VIN2 VOUT2
1U_0201_6.3V6M
CG314 VGA@
0.1U_0201_10V6K
15 1 1
2 GPAD
10U_0402_6.3V6M
CG945
0.1U_0201_10V6K
CG317
2 EM5209VF_DFN14_2X3
DG26
GC6_FB_EN3V3 VGA@ 2 2
3
3VSDGPU_EN_R_3V3
1 3VSDGPU_EN_GC6
3VSDGPU_EN_GC6 <39> 3VSDGPU_EN_GC6
VGA@
VGA@
2
BAV70W_SOT323-3
VGA@
+1.0VSDGPU
3
+1.8VALW to +1.8VSDGPU_MAIN +5VS
2
For Power down sequence +3VSD_GPU discharge if need 3
RG192 VGA@
NFGC6@ 20_0402_5%
2
1 2
RG3014 0_0201_5% RG193 VGA@ +3VSDGPU
1
100K_0402_5% +NVVDD1
DG27
1.8VSDGPU_MAIN_EN1 @ 2 1.8VSDGPU_MAIN_EN3V3 3
1
1
RG200 0_0201_5% 1 1.8VSDGPU_MAIN_EN3V3_FGC6 +5VS
1
GPU_FB_EN_FGC6_AND_3V3 2 1VSDGPU_EN#2 G
D
QG18B VGA@ +5VS RG2847 VGA@
<25> GPU_FB_EN_FGC6_AND_3V3 S PJT138KA_SOT363-6 RG194 VGA@ 1_0603_5%
BAV70W_SOT323-3 1_0603_5%
1
2
FGC6@
2
2
VGA@ QG18A VGA@ RG2846
2
PJT138KA_SOT363-6 VGA@ RG2779 100K_0402_5%
3
+1.35VSDGPU 100K_0402_5% VGA@ QG540B

1VSDGPU_EN 5 G
D
VGA@ QG20B PJT138KA_SOT363-6
<25,94> 1VSDGPU_EN
6
S PJT138KA_SOT363-6
1
2
6
3VSDGPU_EN_GC6#
2
D
+1.8V/+3.3V level G
1.8VSDGPU_MAIN_EN_FGC6
4
+5VS R40 VGA@ NVVDD1_EN# 2 G

D
S
20_0402_5% S VGA@ QG540A
1
VGA@ QG20A PJT138KA_SOT363-6
1
+1.8VALW
3
+1.8VSDGPU_MAIN PJT138KA_SOT363-6
1
2
3
3VSDGPU_EN_GC6 5 G
D
RG195 VGA@ NVVDD1_EN 5 G

D
S
1 100K_0402_5% S
+1.8V/+3.3V level
4
1
VGA@ CG339 CG338 +1.8V/+3.3V level
4
22U_0603_6.3V6M 10U_0402_6.3V6M QG19B VGA@
1
VGA@ D 2N7002KDW_SOT363-6
2
UG20 2 1.35VSDGPU_EN# 5
4 1 6 G 4
+5VALW 2 IN OUT
3 IN 7 S
+1.8VALW
4
1.8VSDGPU_MAIN_EN3V3_FGC6 4 VBIASVCC_PAD 5
ON GND VGA@ QG19A
1
6
VGA@ AOZ1334DI-02_DFN8-7_3X3 2N7002KDW_SOT363-6 D

CG319 SA000070V00 1.35VSDGPU_EN 2
0.1U_0201_10V6K VGA@ G
2
+3.3V level S
1
EH50F change to AOZ1334DI-02 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N18E-GPU Power control
A B C D E F G H
A B C D E
SM01000EJ00 3000ma
220ohm@100mhz
LCD POWER CIRCUIT DCR 0.04 Place closed to
JEDP1 +LCDVDD
+3VS +LCDVDD +19VB_CPU +INVPW R_B+ +3VS
UX1 W=60mils
1U_0201_6.3V6M
CX2
5 1 W=60mils W=60mils
10U_0402_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
IN OUT LX1 EMC@ CX7
1 1 1 1
1 2 1 1 HCB2012KF-221T30_0805 @ 1
GND 1 2 CX8 CX1
4 3 CX3 CX4 1
2 EN OC 0.1U_0201_10V6K CX6 2 2 2
2 2 1
SY6288C20AAC_SOT23-5 @ CX5 1000P_0402_50V7K
10U_0402_6.3V6M 68P_0402_50V8J EMC@
<17> PCH_ENVDD 2
XEMC@
1
2
RX1
100K_0402_5%
2
+INVPW R_B+_BOOST +INVPW R_B+
W=40mils RH261 1 @ 2 0_0603_5%

RX3
0_0402_5%
1 @ 2 EDP_HPD_R
<16> EDP_HPD
LED PANEL Conn.
1
RX4 +INVPW R_B+ JEDP1
W=60mils 1
100K_0402_5% 1
2
2 3 2
4 3
5 4
PCH_BKL_PW M 6 5
2 BKOFF# 7 6 2
+LCDVDD EDP_HPD_R 8 7
9 8
RX10 1 @ 2 100K_0402_5% 10 9
11 10
XEMC@ PANEL_OD_EN 12 11
PCH_BKL_PW M <19> PANEL_OD_EN 12
CX9 1 2 220P_0402_50V7K 13
<17> PCH_BKL_PW M EDP_AUXN CX20 EDP_AUXN_C 13
<6> EDP_AUXN 1 2 0.1U_0201_10V6K 14
XEMC@ EDP_AUXP CX19 1 2 0.1U_0201_10V6K EDP_AUXP_C 15 14
<6> EDP_AUXP 15
BKOFF# CX10 1 2 220P_0402_50V7K 16
<58> BKOFF# EDP_TXP0 CX11 EDP_TXP0_C 16
1 2 0.1U_0201_10V6K 17
<6> EDP_TXP0 EDP_TXN0 CX12 EDP_TXN0_C 17
1 2 0.1U_0201_10V6K 18
<6> EDP_TXN0 18
RX5 1 @ 2 10K_0402_5% 19
EDP_TXP1 CX13 1 2 0.1U_0201_10V6K EDP_TXP1_C 20 19
1 2 0.1U_0201_10V6K 21
<6> EDP_TXN1 21
22
1 2 0.1U_0201_10V6K 24
+LCDVDD <6> EDP_TXN2 24
25
1 2 0.1U_0201_10V6K 27
<6> EDP_TXN3 27
1
28
RX11 29 28
<14> USB20_P6 29
10K_0402_5% 30
<14> USB20_N6 30
31
32 31
Touch +TS_PW R
2
PANEL_OD_EN 33 32
Screen TS_EN 33
34
<19,58> TS_EN 34
1
+3VS 35 41
3 RX12 USB20_N5_CAMERA 36 35 GND 42 3
@ 10K_0402_5% USB20_P5_CAMERA 37 36 GND 43
For 37 GND
Camera 38 44
DMIC_CLK_R 39 38 GND 45
<56> DMIC_CLK_R
2
DMIC_DATA_R 40 39 GND 46
<56> DMIC_DATA_R 40 GND
ACES_50203-04001-002
CONN@
SP010014B10
DMIC_CLK_R
USB Touch Screen DMIC_DATA_R
2
+TS_PW R
+5VS +3VS
RX6 1 @ 2 0_0603_5% DX1
YSLC05CH_SOT23-3
RX7 1 TS@ 2 0_0603_5% XEMC@
Camera
1
RX8 1 @ 2 0_0402_5% USB20_N5_CAMERA
<14> USB20_N5
RX9 1 @ 2 0_0402_5% USB20_P5_CAMERA
<14> USB20_P5
4 4

eDP CONN.
A B C D E
A B C D E
Display Port
DP@ CV38 2 1 .1U_0402_16V7K DP0_TXP3_C
<26> DP0_TXP3 DP0_TXN3_C
DP@ CV39 2 1 .1U_0402_16V7K
<26> DP0_TXN3
<26> DP0_TXP2
DP@ CV40 2 1 .1U_0402_16V7K DP0_TXP2_C
DP0_TXN2_C
W=40mils
+3VS_DP
DP@ CV37 2 1 .1U_0402_16V7K
<26> DP0_TXN2
1 1
DP@ CV42 2 1 .1U_0402_16V7K DP0_TXP1_C JDP1
<26> DP0_TXP1
DP@ CV41 2 1 .1U_0402_16V7K DP0_TXN1_C place near UV42 (same side) 20
<26> DP0_TXN1 DP_PWR
19
DP@ CV44 2 1 .1U_0402_16V7K DP0_TXP0_C DP_CA_DET_R 1 @ 2 DP_CA_DET DP0_AUXN_C_SW 18 GND
<26> DP0_TXP0 DP0_TXN0_C DP0_TXN2_C AUX_CH-
DP@ CV43 2 1 .1U_0402_16V7K RY40 0_0402_5% 17
<26> DP0_TXN0 DP0_AUXP_C_SW LAN2-
16
DP0_TXP2_C 15 AUX_CH+
@ 14 LAN2+
QY5A 13 GND
GND
5
@ QY6A PJT138KA_SOT363-6 DP0_TXN3_C 12
to PCH PJT138KA_SOT363-6 DP0_TXN1_C 11 LAN3- 21
G
DP_CTRL_CLK_C 3 4 DP_CTRL_CLK_L 4 3 DP_CTRL_CLK DP0_TXP3_C 10 LAN1- GND 22
DP0_TXP1_C LAN3+ GND
S
9 23
D
8 LAN1+ GND 24
@ 7 GND GND
GND
2
@ QY6B QY5B DP_CA_DET 6
+3VS +3VS PJT138KA_SOT363-6 PJT138KA_SOT363-6 DP0_TXN0_C 5 CA_DET
G
LAN0-
2
DP_CTRL_DAT_C 6 1 DP_CTRL_DAT_L 1 6 DP_CTRL_DAT 4
DP0_TXP0_C CFG1
S
3
D
LAN0+
2
QY3 RV907 DP0_HPD 2

RY26 2 3ohm/10pF 1M_0402_5% 1 HP_DET
1M_0402_5% Gate DP@ GND
1
1 DP0_HPD DP_CTRL_CLK_C @ CV340 2 1 .1U_0402_16V7K DP_CTRL_CLK SDAN_613007-020231
Drain CONN@
1
3 DP_CTRL_DAT_C @ CV341 2 1 .1U_0402_16V7K DP_CTRL_DAT RY35 DC06000AIB0

<16,25> DP0_HPD_PCH Source
2
1M_0402_5%
LBSS139W T1G_SC70-3 RY25 DP@
2
DP@ 100K_0402_5%
2 DP@ 2
need check pin4 CFG1

1
+3VSDGPU
+5VS
CV339
1 2
100K_0402_5%
100K_0402_5%
100K_0402_5%
+5VS
1
0.1U_0201_10V6K
1
RV320
RV318
RV319
DP@
R4080
+5VS 10K_0402_5%
DP@
2
1
DP@ DP@ DP@

2
R4081 DP_AUX_PROT UV42

10K_0402_5% 16
DP@ Vcc 4 DP0_AUXP_C_SW
DP0_AUXP_PROT DP@ CV337 1 2 0.1U_0201_10V6K DP0_AUXP_C 2 1A 7 DP0_AUXN_C_SW
2
1B1 2A
1
C 3 9
2 Q46 DP0_AUXN_PROT DP@ CV338 1 2 0.1U_0201_10V6K DP0_AUXN_C 5 1B2 3A 12
2B1 4A
100K_0402_5%
B MMBT3904_SOT23-3 6
2B2
1
E DP@ 11 15
3
3B1 OE DP_CA_DET
RV322
10 1
3B2 S
1
3 R521 C 14 3
1 2 2 Q45 13 4B1 8
<37> 3VSDGPU_EN_GC6 B MMBT3904_SOT23-3 4B2 GND 17
0:DP
1:HDMI
2
10K_0402_5% E DP@ T-PAD DP@
3
DP@ SN74CBT3257CRGYR_QFN16_4X3P5
DP@
W=40mils W=40mils INPUT/OUTPUT

OE# S A Function
DP0_AUXP 1 6 DP0_AUXP_PROT DP@ +3VALW +3VS_DP
D
<26> DP0_AUXP
S
CV56
0.1U_0201_10V6K UV3
QY4A 2 1 5 1 L L B1 A=B1
IN OUT
0.1U_0201_10V6K
2N7002KDW _SOT363-6
G
DP@ 2 1 L H B2 A=B2
2
GND
CV27
DP@
SUSP# 4 3
<58,68,78,83,85,87,88> SUSP# EN OC
DP_AUX_PROT
1
C2776 SY6288C20AAC_SOT23-5 2 H X Z NC
0.01U_0201_6.3V7K DP@
DP@
2
5
G
4 4
0921 change souce to +3VALW, CTRL to SUSP#
DP0_AUXN 4 3 DP0_AUXN_PROT
S
<26> DP0_AUXN
D
QY4B
2N7002KDW _SOT363-6
DP@ 2019/12/28 2019/12/28 Title
DP CONN
A B C D E
A B C D E
Raptor
CY22 1 2 .1U_0402_16V7K HDMI_CLKP HDMI_CLKN RY27 1 2 499_0402_1% HDMI_GND
<27> GPU_DP2_P3 HDMI_CLKN HDMI_CLKP
CY24 1 2 .1U_0402_16V7K RY28 1 2 499_0402_1%
<27> GPU_DP2_N3 HDMI_TX_N0 RY29 1 2 499_0402_1%
CY16 1 2 .1U_0402_16V7K HDMI_TX_P0 HDMI_TX_P0 RY30 1 2 499_0402_1%
<27> GPU_DP2_P2
CY17 1 2 .1U_0402_16V7K HDMI_TX_N0 +5VS W=40mils +HDMI_5V_OUT
<27> GPU_DP2_N2
CY18 1 2 .1U_0402_16V7K HDMI_TX_P1
<27> GPU_DP2_P1 HDMI_TX_N1 UY2
1 CY19 1 2 .1U_0402_16V7K 1
<27> GPU_DP2_N1 HDMI_TX_N1 RY31 1 2 499_0402_1%
CY20 1 2 .1U_0402_16V7K HDMI_TX_P2 HDMI_TX_P1 RY32 1 2 499_0402_1% 3
<27> GPU_DP2_P0 HDMI_TX_N2 HDMI_TX_N2 OUT
CY21 1 2 .1U_0402_16V7K RY33 1 2 499_0402_1% 1
<27> GPU_DP2_N0 HDMI_TX_P2 RY34 1 2 499_0402_1% 1
IN CY23
2 0.1U_0201_10V6K
GND 2
AP2330W -7_SC59-3
3
D
5 QY2B
EMI request +3VS
G 2N7002KDW _SOT363-6
4
HDMI_CLKP RY15 1 2 6.04_0402_1% HDMI_R_CLKP
1
2
XEMC@ CY26 RY36 +1.8VSDGPU_AON

3.3P_0402_50V8 @ 150_0402_1%
1
2
HDMI_CLKN RY14 1 2 6.04_0402_1% HDMI_R_CLKN
5
QY1A
PJT138KA_SOT363-6
G
HDMI_TX_P0 RY16 1 2 6.04_0402_1% HDMI_R_TX_P0 4 3 HDMI_CTRL_CLK
<27> GPU_DP2_CTRL_CLK
D
2 1 RY37 2
2
@ 150_0402_1% QY1B
PJT138KA_SOT363-6 +HDMI_5V_OUT
G
1 6 HDMI_CTRL_DAT
<27> GPU_DP2_CTRL_DAT
2
HDMI_TX_N0 1 2 6.04_0402_1% HDMI_R_TX_N0 HDMI_CTRL_DAT 2 1 2.2K_0402_5%
D
RY17 RH238
HDMI_CTRL_CLK RH239 2 1 2.2K_0402_5%
3ohm/10pF
+1.8VSDGPU_AON
HDMI_TX_P1 RY18 1 2 6.04_0402_1% HDMI_R_TX_P1
GPU_DP2_CTRL_CLK RH240 2 1 2.2K_0402_5%
1
DY2 GPU_DP2_CTRL_DAT RH241 2 1 2.2K_0402_5%

RY38 HDMI_R_CLKP 1 1 10 9 HDMI_R_CLKP
@ 150_0402_1%
HDMI_R_CLKN 2 2 9 8 HDMI_R_CLKN
2
HDMI_TX_N1 RY19 1 2 6.04_0402_1% HDMI_R_TX_N1 HDMI_R_TX_P04 4 7 7 HDMI_R_TX_P0
HDMI_R_TX_N05 5 6 6 HDMI_R_TX_N0
HDMI_TX_P2 RY20 1 2 6.04_0402_1% HDMI_R_TX_P2
3 3
1
RY39 8
@ 150_0402_1% +HDMI_5V_OUT HDMI connector
L05ESDL5V0NA-4 SLP2510P8
@EMC@ JHDMI1
2
HDMI_TX_N2 RY22 1 2 6.04_0402_1% HDMI_R_TX_N2 HDMI_HPD 19

18 HP_DET
17 +5V
DY3 HDMI_CTRL_DAT 16 DDC/CEC_GND
3 HDMI_R_TX_N11 1 HDMI_R_TX_N1 HDMI_CTRL_CLK SDA 3
10 9 15
14 SCL
HDMI_R_TX_P12 2 HDMI_R_TX_P1 Reserved
9 8 13
HDMI_R_CLKN 12 CEC 20
HDMI_R_TX_N24 4 HDMI_R_TX_N2 CK- GND
7 7 11 21
HDMI_R_CLKP 10 CK_shield GND 22
HDMI_R_TX_P25 5 HDMI_R_TX_P2 HDMI_R_TX_N0 CK+ GND
to PCH 6 6 9 23
8 D0- GND
+3VS +3VS 3 3 HDMI_R_TX_P0 7 D0_shield
HDMI_R_TX_N1 6 D0+
8 5 D1-
D1_shield
2
HDMI_R_TX_P1 4
L05ESDL5V0NA-4 SLP2510P8 HDMI_R_TX_N2 3 D1+
RY24 @EMC@ 2 D2-
D2_shield
2
1M_0402_5% HDMI_R_TX_P2 1
G
QY2A D2+
1
2N7002KDW _SOT363-6 ACON_HMR2E-AK120D

DY1 CONN@
1 6 HDMI_HPD HDMI_HPD 6 3 HDMI_CTRL_DAT
S
<16,25> HDMI_HPD_PCH I/O4 I/O2 DC232000Y00

D
RY11 5 2 ZZZ2
RY11 design guide rev2.0 use 20K pull down. 100K_0402_5%
VDD GND
1
HDMI_CTRL_CLK 4 1
I/O3 I/O1 +HDMI_5V_OUT
4
AZC099-04S.R7G_SOT23-6 HDMI_ROYALTY 4
@EMC@ ROYALTY HDMI W /LOGO+HDCP
RO0000003HM
P/N: SC300002900, S DIO(BR) AZC199-04S.R7G SOT23-6 ESD 45@

HDMI CONN.
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
5 4 3 2 1
+5VALW +5VALW _MUX
US14
5 1
IN OUT
D D
10U_0402_6.3V6M
0.1U_0201_10V6K
2 1 1
GND
CS116
CS15
4 3
<58,72,73> USB_EN EN OC
SY6288C20AAC_SOT23-5 2 2
Close to Pin19
+5VALW _MUX +USB3_VCCC CC1_VCONN

CC2_VCONN
1 1
1
CS129 CS130
RS20 RS134 220P_0402_50V7K 220P_0402_50V7K
4.7K_0402_5% 200K_0402_1%
2 2
US3
2
OCP_DET# VMON
1
VMON 17 12 CC1_VCONN
VMON CC1 CC2_VCONN CC1_VCONN <43>
RS128 RS135 14 CC2_VCONN <43>
10K_0402_5% 10K_0402_1% OCP_DET# 16 CC2
<43> OCP_DET# OCP_DET
USBC_EN 15
2
<43> USBC_EN VBUS_EN Type-C Port Side

C 11 USB3_CC_TX_P2 CS112 1 2 .1U_0402_16V7K USB3_CC_TX_P2_C C
USB3.0 (Port 2) System side C_TX2_1P/2N 10 USB3_CC_TX_N2 CS113 1 2 .1U_0402_16V7K USB3_CC_TX_N2_C USB3_CC_TX_P2_C <43>
C_TX2_1N/2P USB3_CC_TX_N2_C <43>
CS125 1 USB3_PRX_C_DTX_P2
2 0.22U_0201_6.3V6M 4
<17> USB3_PRX_DTX_P2 USB3_PRX_C_DTX_N2 SSRX_1P/2N USB3_CC_RX_P2 CS121 1
CS126 1 2 0.22U_0201_6.3V6M 5 24 2 0.33U_0201_6.3V6M USB3_CC_RX_P2_C USB3_CC_RX_P2_C <43>
<17> USB3_PRX_DTX_N2 SSRX_1N/2P C_RX2_1P/2N USB3_CC_RX_N2 CS122 1
1 2 0.33U_0201_6.3V6M USB3_CC_RX_N2_C USB3_CC_RX_N2_C <43>
C_RX2_1N/2P
CS127 1 USB3_PTX_C_DRX_P2 6
2 0.22U_0201_6.3V6M 10 Gbps 2:1 MUX 8 USB3_CC_TX_P1 CS114 1 2 .1U_0402_16V7K USB3_CC_TX_P1_C
<17> USB3_PTX_DRX_P2 USB3_PTX_C_DRX_N2 7 SSTX_1P/2N C_TX1_1P/2N USB3_CC_TX_N1 CS115 1 USB3_CC_TX_N1_C USB3_CC_TX_P1_C <43>
<17> USB3_PTX_DRX_N2 CS128 1 2 0.22U_0201_6.3V6M 9 2 .1U_0402_16V7K
SSTX_1N/2P C_TX1_1N/2P USB3_CC_TX_N1_C <43>
2 USB3_CC_RX_P1 CS123 1 2 0.33U_0201_6.3V6M USB3_CC_RX_P1_C

C_RX1_1P/2N USB3_CC_RX_N1 CS124 1 USB3_CC_RX_P1_C <43>
3 2 0.33U_0201_6.3V6M USB3_CC_RX_N1_C USB3_CC_RX_N1_C <43>
PLUG_ORI 23 C_RX1_1N/2P
M1 21 GPIO
M0 22 CURRENT_M1
CURRENT_M0
USB3_CC_RX_P2_C
USB3_CC_RX_N2_C
VCON_IN
LDO_3V3
18
REXT
2
5V_IN
1
RS129 25 RS130 RS131

6.2K_0402_1% E-PAD 220K_0201_1% 220K_0201_1%
+3VO_MUX +3VO_MUX RTS5441E-GRT_QFN24_4X4
20
19
13
1
2
+3VO_MUX +5VALW _MUX

B B
1
1
1
1 1
RS1 RS3 CS14 CS117 USB3_CC_RX_P1_C
RS114 @ 10K_0402_5% 10K_0402_5% 4.7U_0402_6.3V6M 0.1U_0201_10V6K USB3_CC_RX_N1_C
10K_0402_5%
2
2 2
Close to Pin13
2
2
PLUG_ORI M1 M0 1 2 TYPEC_1P5A_EC <43,58>
RH263 0_0402_5% RS132 RS133
1
220K_0201_1% 220K_0201_1%
RS115 RS2 @ RS4 @
1
10K_0402_5% 10K_0402_5% 10K_0402_5%
2
5441E Current Limit

M1 M0 MODE RTS5441 M0 truth table by 2018 BIOS spec
L H 0.9A TYPEC_1P5A_EC MODE limit point Condition
H L 1.5A H 3A 3.5A AC mode or Battery >30%
A H H 3A L 1.5A 1.92A Battery <30% when DC mode A

CC+USB TYPE C
5 4 3 2 1
5 4 3 2 1
+5VALW +USB3_VCCC
RSET
150U_D2_6.3VM_R17M
0.1U_0201_10V6K
1
1
0.1U_0402_25V6
22U_0805_25V6M
22U_0805_25V6M
1 1 1 1
CS95
CS96
CS97 @
CS98 @
CS99 @
+ RS113 RS109 RS110
6.2K_0402_5% 8.2K_0402_5% 4.3K_0402_1%
2 2 2 2 2
3 2
US11 D
6 1 5 TYPEC_3A <18>
IN OUT G
D D
SGA00003700
RSET 5 2 S QS2B
4
SET GND 1 @ 2 2N7002KDW _SOT363-6
OCP_DET# <42>
6
RS136 0_0402_5% D
4 3 1 @ 2 2 TYPEC_1P5A_EC <42,58>
<42> USBC_EN EN FLAG USB_OC0# <14> G
RS112 0_0402_5%
1
G518B1TP1U_TSOT23-6 1
RB77 S QS2A
1
47K_0402_5% footprint : G518 CS100 2N7002KDW _SOT363-6
PN : SA0000BDN00(SILERGY SY6861B1) 0.01U_0201_6.3V7K check bios
2
1050 is use PCH output
2
G518 MOS Current Limit
Initial Current mode selection
For ESD request GPP_B1
(TYPEC_1P5A)
GPP_B4
(TYPEC_3A)
RSET(kΩ ) MODE limit point
DS3
USBC_EN V BUS
EMC@ L L 6.2 0.9A 1.09A
1 9 USB3_CC_TX_P1_C
<42> USB3_CC_TX_P1_C L 0
USB3_CC_TX_N1_C L H 3.53 1.5A 1.92A
<42> USB3_CC_TX_N1_C 2 8 L 0
CC1_VCONN CC1_VCONN
H L 2.54 2A 2.67A
4 7 H 0
TBTA_SBU1 TBTA_SBU1
*H H 1.94 3A 3.5A
5 6 H 1
C C
3
TVW DF1004AD0_DFN9
SC300003Z00
DS4 EMC@
1 9
2 8
4 7 USB3_CC_TX_N2_C
<42> USB3_CC_TX_N2_C
5 6 USB3_CC_TX_P2_C +USB3_VCCC +USB3_VCCC
<42> USB3_CC_TX_P2_C
3
JTYPEC1
TVW DF1004AD0_DFN9 A1 B12
GND GND
SC300003Z00 USB3_CC_TX_P1_C A2 B11 USB3_CC_RX_P1_C
USB3_CC_TX_N1_C A3 SSTXP1 SSRXP1 B10 USB3_CC_RX_N1_C
0.1U_0402_25V6 2 1 CS84 SSTXN1 SSRXN1
DS6 EMC@ A4 B9 CS87 1 2 0.1U_0402_25V6
USB20_P2_L 1 9 USB20_P2_L VBUS VBUS
A5 B8 TBTA_SBU2
<42> CC1_VCONN CC1 SBU2
1
USB20_N2_L 2 8 USB20_N2_L CS13
B 10U_0603_25V6M USB20_P2_L A6 B7 USB20_N2_L B
4 7 USB3_CC_RX_N2_C USB20_N2_L A7 DP1 DN2 B6 USB20_P2_L
<42> USB3_CC_RX_N2_C
2
DN1 DP2
2
5 6 USB3_CC_RX_P2_C 3 TBTA_SBU1 A8 B5 CC2_VCONN <42>

<42> USB3_CC_RX_P2_C SBU1 CC2
0.1U_0402_25V6
DS19 EMC@ 2 1 CS86 A9 B4 CS85 1 2 0.1U_0402_25V6
MESC5V02BD03_SOT23-3 VBUS VBUS
3 USB3_CC_RX_N2_C A10 B3 USB3_CC_TX_N2_C
USB3_CC_RX_P2_C A11 SSRXN2 SSTXN2 B2 USB3_CC_TX_P2_C
TVW DF1004AD0_DFN9 SSRXP2 SSTXP2
SC300003Z00 A12 B1
GND GND
1
DS5 EMC@ 1 5
CC2_VCONN 1 9 CC2_VCONN 2 GND GND 6
3 GND GND 7
TBTA_SBU2 2 8 TBTA_SBU2 4 GND GND 8
GND GND
4 7 USB3_CC_RX_N1_C DEREN_40-42407-0246300RHF
<42> USB3_CC_RX_N1_C
CONN@
5 6 USB3_CC_RX_P1_C
<42> USB3_CC_RX_P1_C DC23300RC00
CC1_VCONN & CC2_VCONN need 20miil trace width.
3
TVW DF1004AD0_DFN9
SC300003Z00
A A
LS10 EMC@
USB20_P2 2 1 USB20_P2_L
<14> USB20_P2 2 1
USB20_N2 3 4 USB20_N2_L Security Classification Compal Secret Data Compal Electronics, Inc.
<14> USB20_N2 3 4
DLM0NSN900HY2D_4P
SM070005U00 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CC+USB TYPE C
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
5 4 3 2 1
5 4 3 2 1
D D
C C
Reserve Page
B B
A A
2019/12/28
Compal Secret Data
2019/12/28 Title
Reserve Page
5 4 3 2 1
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
5 4 3 2 1
D D
C C
Reserve Page
B B
A A
2019/12/28
Compal Secret Data
2019/12/28 Title
Reserve Page
5 4 3 2 1
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
5 4 3 2 1
+3VALW
1 1
CL12 CL13
4.7U_0402_6.3V6M
0.1U_0201_10V6K
2 2
+3V_LAN 1A
UL3 +AVDDL W=20mils
5
IN OUT
1 W=40mils
1U_0201_6.3V6M
1U_0201_6.3V6M
4.7U_0402_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1000P_0402_50V7K~D
2
10U_0402_6.3V6M
10U_0402_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
GND 1 1 1 1 1 1 1 1
CL14
1U_0201_6.3V6M
1U_0201_6.3V6M
D D
LAN_PWR_EN 4 3 CL23 CL24 CL25 CL26 CL27 CL28 CL29
<58> LAN_PWR_EN EN OC 1 1 1 1 1 1 1
SY6288C20AAC_SOT23-5 CL16 CL17 CL21 CL19 CL20 CL18 CL22 2 2 2 2 2 2 2 2
1
CL15
2 2 2 2 2 2 2
0.1U_0201_10V6K
2
close to UL1 pin1 close to UL1 pin16 close to UL1 pin6 close to UL1 pin34 close to UL1 pin31 close to UL1 pin13 close to UL1 pin19
UL1
<17> PCIE_PRX_DTX_P14
CL139 1 2 .1U_0402_16V7K PCIE_PRX_C_DTX_P14 30
TX_P VDD33
1 W=40mils +3V_LAN
16
CL138 1 2 .1U_0402_16V7K PCIE_PRX_C_DTX_N14 29 AVDD33
<17> PCIE_PRX_DTX_N14 TX_N
CL137 1 2 .1U_0402_16V7K PCIE_PTX_C_DRX_P14 35 13 +AVDDL
<17> PCIE_PTX_DRX_P14 RX_P AVDDL 19
CL136 1 2 .1U_0402_16V7K PCIE_PTX_C_DRX_N14 36 AVDDL 31
<17> PCIE_PTX_DRX_N14
CLK_PCIE_LAN
RX_N AVDDL
AVDDL
34 +DVDDL W=20mils
33 6
<15> CLK_PCIE_LAN REFCLK_P AVDDL_REG
1U_0201_6.3V6M
0.1U_0201_10V6K
CLK_PCIE_LAN# 32
<15> CLK_PCIE_LAN# REFCLK_N 1 1
22 +AVDDH
LAN_CLKREQ# 4 AVDDH 9 CL5 CL6
<15> LAN_CLKREQ# CLKREQ# AVDDH_REG
PLT_RST_BUF# 2 2 2
<16,25,52,68> PLT_RST_BUF# PERST# 37 +DVDDL
1 @ 2 LAN_PME# 3 DVDDL_REG
remind : if no support wake, <16,58> EC_PME# RL10 0_0402_5% WAKE#
LAN_MDIP0
1 2 11
C
don't monitor this pin +3V_LAN
RL1 4.7K_0402_5%~D 25
SMCLK
TRXP0
TRXN0
12 LAN_MDIN0
LAN_MDIP1 C
26 14
SMDATA TRXP1
TRXN1
15 LAN_MDIN1
LAN_MDIP2
close to UL1 pin37
28 17
27 NC TRXP2 18 LAN_MDIN2
41 TESTMODE TRXN2 20 LAN_MDIP3
GND TRXP3 21 LAN_MDIN3
XTLI 8 TRXN3
XTLO 7 XTLI
XTLO
+AVDDH W=20mils
40
1 2 5 LX
1U_0201_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
+3V_LAN ISOLAT#
RL2 30K_0402_5% 24 1 1 1
PPS
1 2 LED_0 38 10 +RBIAS 1 2 CL7 CL8 CL9
+3V_LAN LED_0 RBIAS
YL1 RL11 10K_0402_5% 39
25MHZ_20PF_XRCGB25M000F2P18R0 1 2 LED_2 23 LED_1 RL3 2 2 2
RL12 10K_0402_5% LED_2 2.37K_0402_1%~D
3 1
LED_1
XTLI XTLO
3 1 S IC E2500-RIV1-RL QFN 40P E-LAN CTRL
NC NC
1 1
CL10 CL11
1
15P_0402_50V8J 4 2 15P_0402_50V8J
RL13
2 2
10K_0402_5% close to UL1 pin9 close to UL1 pin22
P/N: SJ10000UP00 (S CRYSTAL 25MHZ 10PF XRCGB25M000F2P34R0)
2 LAN Connector
B
check need power or not? 3/15 TIMAG: S X'FORM_ IH-160 LAN,SP050006F00 B
BOTHHAND: S X'FORM_ GST5009-E LF LAN,SP050006B10 JRJ45
TL1
RL6 RJ45_MIDI3- 8
+VDDCT_L 1 24 RJ45_CT0 1 2 PR4-
LAN_MDIP0 2 TCT1 MCT1 23 RJ45_MIDI0+ 75_0402_1%~D RJ45_MIDI3+ 7
LAN_MDIN0 3 TD1+ MX1+ 22 RJ45_MIDI0- PR4+
TD1- MX1- RL7 RJ45_MIDI1- 6
4 21 RJ45_CT1 1 2 PR2-
LAN_MDIP1 5 TCT2 MCT2 20 RJ45_MIDI1+ 75_0402_1%~D RJ45_MIDI2- 5
LAN_MDIN1 6 TD2+ MX2+ 19 RJ45_MIDI1- PR3-
TD2- MX2- RL8 RJ45_MIDI2+ 4
7 18 RJ45_CT2 1 2 PR3+
LAN_MDIN2 9 TD3+ MX3+ 16 RJ45_MIDI2- PR2+
TD3- MX3- RL9 RJ45_MIDI0- 2
10 15 RJ45_CT3 1 2 PR1-
LAN_MDIN3 12 TD4+ MX4+ 13 RJ45_MIDI3- PR1+ 12
TD4- MX4- GND 11
GND 10
RJ45_GND GND 9
350UH_GST5009-CLF GND
SANTA_130460-5
change to comon CONN@
DC234007W00
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
40mil
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
CL31
CL32
CL33
CL34
CL35
CL36
CL37
CL38
2 1 2 1 2 1 2 1 RJ45_GND 1 2 LANGND
C67
40mil 10P_0402_50V8J
1 2 1 2 1 2 1 2
LANGND
1
@
J5 JP1
A A
JUMP_43X118 XEMC@
B88069X9231T203_4P5X3P2-2
2
D1
EMC@
MESC5V02BD03_SOT23-3
1
LAN E2400
5 4 3 2 1
A B C D E
Wireless LAN
+3VALW W=60mils +3VS_W LAN
UM1
1U_0201_6.3V6M
CM15
5 1
IN OUT
1
2
@ GND
1 1
4 3
2 <58> W LAN_ON EN OC
SY6288C20AAC_SOT23-5
CNVI@
+3VALW +3VS_W LAN
RM55 1 @ 2 0_0805_5% NGFF WL+BT (KEY E)

+3VS
RM11 1 @ 2 0_0805_5% UART_2_PRXD_R_DTXD RM42 1 UART@ 2 0_0402_5%

UART_2_PTXD_R_DRXD UART_2_PRXD_DTXD <19>
1 1 1 RM43 1 UART@ 2 0_0402_5%
UART_2_PTXD_DRXD <19>
CM12 @ CM13
60mil 4.7U_0402_6.3V6M 0.1U_0201_10V6K CM14 Co-layout with CNVi PH +3VS at SOC side,
0.1U_0201_10V6K for win7 USB3 debug
2 2 2
KEY E +3VS_W LAN
JNGFF1
1 2
USB20_P14 GND_1 3.3VAUX_2 CNVI@
3 4 1 RM41 2
<14> USB20_P14 USB20_N14 USB_D+ 3.3VAUX_4
(For BT) USB2 Port.14 5 6 @ T52 75K_0402_1%
<14> USB20_N14 USB_D- LED1#
7 8
CNV_PRX_DTX_N1 9 GND_7 PCM_CLK 10 CNV_RF_RESET#_R RM34 1 @ 2 0_0201_5%
<15> CNV_PRX_DTX_N1 CNV_PRX_DTX_P1 SDIO_CLK PCM_SYNC CNV_RF_RESET# <18>
2
<15> CNV_PRX_DTX_P1 11 12 2
13 SDIO_CMD PCM_OUT 14 CLKREQ_CNV#_R RM35 1 @ 2 0_0201_5%
CNV_PRX_DTX_N0 SDIO_DAT0 PCM_IN CLKREQ_CNV# <18>
<15> CNV_PRX_DTX_N0 15 16 @ T53
CNV_PRX_DTX_P0 17 SDIO_DAT1 LED2# 18
<15> CNV_PRX_DTX_P0 SDIO_DAT2 GND_18
19 20
CLK_CNV_PRX_DTX_N 21 SDIO_DAT3 UART_WAKE 22 UART_2_PRXD_R_DTXD RM36 1 CNVI@ 2 0_0402_5%
<15> CLK_CNV_PRX_DTX_N CLK_CNV_PRX_DTX_P SDIO_WAKE UART_TX CNV_BRI_PRX_DTX <15>
23
<15> CLK_CNV_PRX_DTX_P SDIO_RST
24 UART_2_PTXD_R_DRXD RM37 1 CNVI@ 2 0_0402_5%
UART_RX CNV_RGI_PRX_DTX CNV_RGI_PTX_DRX <15>
25 26
PCIE_PTX_C_DRX_P15 GND_33 UART_RTS CNV_BRI_PTX_DRX CNV_RGI_PRX_DTX <15>
CM18 2 1 0.1U_0402_16V7K 27 28 CNV_BRI_PTX_DRX <15>
<17> PCIE_PTX_DRX_P15 PCIE_PTX_C_DRX_N15 PET_RX_P0 UART_CTS E51TXD_P80DATA_R
CM19 2 1 0.1U_0402_16V7K 29 30 RM12 2 @ 1 0_0402_5%
<17> PCIE_PTX_DRX_N15 PET_RX_N0 CLink_RST E51RXD_P80CLK_R E51TXD_P80DATA <58>
31 32 RM13 2 @ 1 0_0402_5%
PCIE_PRX_DTX_P15 GND_39 CLink_DATA E51RXD_P80CLK <58>
(link to PICE Port 3) <17> PCIE_PRX_DTX_P15 33 34
PCIE_PRX_DTX_N15 35 PER_TX_P0 CLink_CLK 36
PCIE X1 <17> PCIE_PRX_DTX_N15 PER_TX_N0 COEX3
37 38
CLK_PCIE_W LAN 39 GND_45 COEX2 40
<15> CLK_PCIE_W LAN CLK_PCIE_W LAN# REFCLK_P0 COEX1 SUSCLK_R
41 42 RM14 1 @ 2 0_0402_5%
<15> CLK_PCIE_W LAN# REFCLK_N0 SUSCLK(32KHz) W L_RST#_R SUSCLK <18,68>
(From PCH CLKOUT2) 43 44 RM15 1 @ 2 0_0402_5%
W LAN_CLKREQ# GND_51 PERST0# BT_ON PLT_RST_BUF# <16,25,51,68>
PCIE CLK <15> W LAN_CLKREQ# 45 46
W LAN_PME# CLKREQ0# W_DISABLE2# W L_OFF# BT_ON <58>
47 48
PEWAKE0# W_DISABLE1# W L_OFF# <58>
49 50
CNV_PTX_DRX_N1 51 GND_57 I2C_DAT 52
<15> CNV_PTX_DRX_N1 CNV_PTX_DRX_P1 RSVD/PCIE_RX_P1 I2C_CLK
53 54
<15> CNV_PTX_DRX_P1 RSVD/PCIE_RX_N1 I2C_IRQ REFCLK_CNV_R
55 56 RM40 1 CNVI@ 2 0_0402_5% REFCLK_CNV <15>
CNV_PTX_DRX_N0 57 GND_63 RSVD_64 58
<15> CNV_PTX_DRX_N0 CNV_PTX_DRX_P0 RSVD/PCIE_TX_P1 RSVD_66 For CNVi Feature
59 60
<15> CNV_PTX_DRX_P0 RSVD/PCIE_TX_N1 RSVD_68
61 62 1 XEMC@
CLK_CNV_PTX_DRX_N 63 GND_69 RSVD_70 64 CM17
3 <15> CLK_CNV_PTX_DRX_N CLK_CNV_PTX_DRX_P RSVD_71 3.3VAUX_72 3
65 66 0.1U_0402_16V7K
<15> CLK_CNV_PTX_DRX_P RSVD_73 3.3VAUX_74
67 For ESD req reserve LC filter
GND_75 68 2
69 GND1 close PCH
GND2
BELLW _80152-3221
CONN@ E51TXD_P80DATA_R
SP070013E00
1
RM19
100K_0402_5%
2 1 W LAN_PME#
+3VS_W LAN
RM16 10K_0402_5%
2
2 1 BT_ON
RM56 10K_0402_5%
4 4

WLAN M.2
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
HD Audio Codec 2000mA 600ohm@100MHz

DCR 0.1
+5VS
40mil +5VS_PVDD
LA1
HCB1608KF-601T20_0603
1 2
+5VS
PN:SM01000UN00 1 1 1 1
+5VS_AVDD
10U_0402_6.3V6M
CA1
0.1U_0201_10V6K
CA2
10U_0402_6.3V6M
CA29
0.1U_0201_10V6K
CA3
20mil RA1 @
0_0603_5%
2 2 2 2 1 2
1 1 1 1
0.1U_0201_10V6K
CA5
10U_0402_6.3V6M
CA6
2 2
near Pin41 near Pin46
GNDA
CA7 1 2 0.1U_0201_10V6K
near Pin26 +1.8VS
near Pin9 CA8 1 2 10U_0402_6.3V6M
+3VS +1.8VS_VDDA 1 @ 2
1 @ 2 +3VS_DVDDIO RA3 0_0402_5%
1 1
0.1U_0201_10V6K
CA11
10U_0402_6.3V6M
CA12
RA2 0_0402_5%
+3VS 20mil +3VS_DVDD

2 2
Int. Speaker Conn.
1 @ 2 GNDA
RA4 0_0402_5% 1 1
10U_0402_6.3V6M
CA9
0.1U_0201_10V6K
CA10
2 2 HDA_BIT_CLK_R JSPK2
40mil SPK_L+
near Pin1 Place near Pin40 SPKL+ EMC@1 LA4 2 HCB1608KF-121T30_0603 1
1
2
SPKL- EMC@1 LA5 2 HCB1608KF-121T30_0603 SPK_L- 2
41
46
26
40
2
9
10P_0402_50V8J 2 1 CA27 DMIC_CLK UA1 RA5 3
G1 4
0_0402_5%
DVDD
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
@RF@ G2
Reserved for RF CVILU_CI4202M2HR0-NH
1
XEMC@ CONN@
LINE1_L 22 43 SPKL- SP02001CK00 GND
LINE1_R LINE1-L(PORT-C-L) SPK-OUT-L- 2
21 42 SPKL+
LINE1-R(PORT-C-R) SPK-OUT-L+ CA13
24 45 SPKR+ SPKR+ <73> 22P_0402_50V8J
2 23 LINE2-L(PORT-E-L) SPK-OUT-R+ 44 SPKR- 1 2
+MICBIAS LINE2-R(PORT-E-R) SPK-OUT-R- SPKR- <73>
XEMC@
31
30 LINE1-VREFO-L 32 HP_LEFT
LINE1-VREFO-R HPOUT-L(PORT-I-L) 33 HP_RIGHT
+3VS RING2 17 HPOUT-R(PORT-I-R)
2 1 SENSE_A SLEEVE 18 MIC2-L(PORT-F-L) /RING
40mil MIC2-R(PORT-F-R) /SLEEVE 10 HDA_SYNC_R
RA13 100K_0402_1%
DMIC_DATA 2 SYNC 6 HDA_BIT_CLK_R HDA_SYNC_R <18>
DMIC_CLK 3 GPIO0/DMIC-DATA BCLK 5 HDA_SDOUT_R HDA_BIT_CLK_R <18>
GPIO1/DMIC-CLK SDATA-OUT 8 HDA_SDIN0_AUDIO 1 2 HDA_SDOUT_R <18>
<58> EC_MUTE#
47
PDB
SDATA-IN RA10 33_0402_5%
HDA_SDIN0 <18>
Digital MIC
48
11 SPDIF-OUT/GPIO2
<18> HDA_RST#_R RESETB 16 MIC BOM upload by Audio Team
MONO_IN 12 MONO-OUT
PCBEEP +MIC2_VREFO
Close codec
<73> HP_PLUG# RA12 2 1 200K_0402_1% SENSE_A 13 29
14 HP/LINE1 JD(JD1) MIC2-VREFO
RA17 2 @ 1 20K_0402_5% 15 MIC2/LINE2 JD(JD2)
SPDIFO/FRONT JD(JD3)/GPIO3 7 CA14 1 2 10U_0402_6.3V6M
1 LDO3-CAP GND
37 39 CA16 1 2 10U_0402_6.3V6M TO eDP cable
CA15 35 CBP LDO2-CAP 27 CA17 1 2 10U_0402_6.3V6M DMIC_DATA 2 @ 1 DMIC_DATA_R
GNDA CBN LDO1-CAP DMIC_DATA_R <38>
1U_0201_6.3V6M 10mil RA14 1 2 100K_0402_5% RA7 0_0402_5%
2
CODEC_VREF GNDA PCH_DMIC_DATA0 2
+3VS_DVDD
36 28 CA18 @1 2 10U_0402_6.3V6M <18> PCH_DMIC_DATA0 @ 1
CPVDD VREF RA8 33_0402_5%
CA20 1 2 2.2U_0402_6.3V6M
20 PCH_DMIC_CLK0 2 @ 1
+3VALW VD33 STB <18> PCH_DMIC_CLK0
CA21 @1 2 0.1U_0201_10V6K RA9 33_0402_5%
GNDA CA19 1 2 19 34 CPVEE
MIC CAP CPVEE DMIC_CLK DMIC_CLK_R
1U_0201_6.3V6M
CA22
1 2 1
10U_0402_6.3V6M LA6 EMC@ BLM15PX221SN1D_2P DMIC_CLK_R <38>
GNDA
RA19 2 @ 1 0_0402_5% 4 25
SM01000Q500
3 49 DC DET AVSS1 38 2 3
Thermal PAD AVSS2
ALC255-CG_MQFN48_6X6
GND SA000082700
GNDA
Headphone Out
+MIC2_VREFO
TO IO/B
RA15 1 2 2.2K_0402_5% SLEEVE SLEEVE <73>
RA18 1 2 2.2K_0402_5% RING2 RING2 <73>
RA22 RA25 1 @ 2 0_0402_5% RA26 1 @ 2 0_0402_5%

22K_0402_5% CA25 HP_LEFT RA20 1 @ 2 0_0603_5% HPOUT_L_1 HPOUT_L_1 <73>
1U_0201_6.3V6M
2 1 BEEP#_R 1 2 MONO_IN RA29 1 @ 2 0_0402_5% RA30 1 @ 2 0_0402_5% HP_RIGHT RA21 1 @ 2 0_0603_5% HPOUT_R_1
<58> BEEP# HPOUT_R_1 <73>
2
RA27 RA31 1 @ 2 0_0402_5% RA32 1 @ 2 0_0402_5% LINE1_L CA23 1 2 4.7U_0402_6.3V6M

1
22K_0402_5% XEMC@
LINE1_R
100P_0402_50V8J
CA26
2 1 RA24 CA24 1 2 4.7U_0402_6.3V6M

<18,19> PCH_SPKR 4.7K_0402_5% RA33 1 @ 2 0_0402_5% RA34 1 @ 2 0_0402_5%
2
1
+MICBIAS DA3
GND GNDA GND GNDA 2 2 RA23 1
4.7K_0402_5%
4 GND 1 4
3 2 RA28 1
4.7K_0402_5%
BAT54A-7-F_SOT23-3
PN:SCSBAT54100

HD Audio Codec ALC255
A B C D E
5 4 3 2 1
D D
C C
Reserve Page
B B
A A

Reserve Page
Custom 1.0
5 4 3 2 1
A B C D E
Board ID
+3VLP_EC
+3VLP_EC +3VLP_ECA
2
+3VLP LB1
JPB1 FBMA-L11-160808-800LMT_0603 RB1
1 2 1 2 +3VLP_ECA 100K_0402_1%
1 2 Ra
JUMP_43X39
1
AD_BID
0.1U_0201_10V6K
0.1U_0201_10V6K
@ 1 1 1
CB1
CB2
CB3
2
1
+3VLP_EC @ RB2 0.1U_0201_10V6K RB3 @ CB4
1 For Power consumption 2 2 2 1
0_0402_5% 56K_0402_1% Rb 0.1U_0201_10V6K
Measurement
RB4 1 @ 2 47K_0402_5% EC_PME# ECAGND 2
ECAGND <66,82>
1
+3VLP_LPC
Analog Board ID definition,
111
125
22
33
96
67
Please see page 3.
9
UB1
ESPI Bus Pin : 1~5.7.8.10.12.14
VCC_LPC
VCC
VCC
VCC
VCC
AVCC
VCC0
LPC Bus Pin : 3~5.7.8.10.12.13
For turn off internal LPC module of KB9032 SUSPWRDNACK 1 21 EC_VCCST_PG_R

<18> SUSPWRDNACK GATEA20/GPIO00 EC_VCCST_PG/GPIO0F EC_VCCST_PG_R <10,78>
2 23 BEEP#
<71> CHG_CTL3 TPM_SERIRQ 3 KBRST#/GPIO01 BEEP#/GPIO10 26 FAN_PWM1 BEEP# <56>
XEMC@
1 2 100P_0402_50V8J PLT_RST# <17,66> TPM_SERIRQ LPC_FRAME# 4 SERIRQ EC_FAN_PWM/GPIO12 27 FAN_PWM2 FAN_PWM1 <77>
CB5 PWM Output
<17> LPC_FRAME# LPC_AD3 LPC_FRAME# AC_OFF/GPIO13 FAN_PWM2 <77>
5 near SOC
<17> LPC_AD3 LPC_AD2 LPC_AD3 PCH_RTCRST# <18>
7
<17> LPC_AD2 LPC_AD2
1
CB6 1 2 100P_0402_50V8J AC_IN LPC_AD1 8 63 BATT_TEMP D
<17> LPC_AD1 LPC_AD0 10 LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 64 BATT_TEMP <82,83> EC_CLR_CMOS 2
LPC & MISC QB6
<17> LPC_AD0 LPC_AD0 VCIN1_BATT_DROP/AD1/GPIO39 65 ADP_I CHG_CTL1 <71>
G L2N7002WT1G_SC-70-3
ADP_I/AD2/GPIO3A ADP_I <82,83>
1
XEMC@ XEMC@ CLK_LPC_R 12 66 AD_BID
AD Input S SB00001GE00
3
2 1 2 1 CLK_LPC_R <17> CLK_LPC_R PLT_RST# 13 CLK_PCI_EC AD_BID/AD3/GPIO3B 75 VRAM_TEMP RB26
<16,66> PLT_RST# EC_RST# PCIRST#/GPIO05 AD4/GPIO42 EC_PME# VRAM_TEMP <66>
CB7 RB6 37 76 10K_0402_5%
<77> EC_RST# EC_SCI# EC_RST# AD5/GPIO43 EC_PME# <16,51>
22P_0402_50V8J 33_0402_5% 20
EC_RST# <19> EC_SCI# WLAN_ON EC_SCI#/GPIO0E
38
<52> WLAN_ON
2
CLKRUN#/GPIO1D
1 LAN_PWR_EN
CB10 68
<63> KSI[0..7] DA0/GPIO3C EC_TP_INT# LAN_PWR_EN <51>
DA Output EN_DFAN1/DA1/GPIO3D 70
VR_PWRGD EC_TP_INT# <16,63>
0.1U_0201_10V6K KSI0 55 71
2 KSI1 56 KSI0/GPIO30 DA2/GPIO3E 72 GPU_OVERT#
+3VLP_EC KSI1/GPIO31 DA3/GPIO3F GPU_OVERT# <25>
KSI2 57
KSI3 58 KSI2/GPIO32 83 EC_MUTE#
EC_SMB_CK1 KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A USB_EN EC_MUTE# <56> SYS_PWROK_R
RB10 1 2 2.2K_0402_5% Add CB10 for shipping mode issue KSI4 59 84 1 @ 2 SYS_PWROK <18,78>
2 EC_SMB_DA1 KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B EC_SMB_CK3 USB_EN <42,72,73> 2
RB11 1 2 2.2K_0402_5% KSI5 60 85 RB7 0_0402_5%
RB78 1 2 2.2K_0402_5% EC_SMB_CK3 place near UB1 KSI6 61 KSI5/GPIO35
PS2 Interface
PSCLK2/GPIO4C 86 EC_SMB_DA3 EC_SMB_CK3 <63>
EC_SMB_DA3 KSI6/GPIO36 PSDAT2/GPIO4D TP_CLK EC_SMB_DA3 <63>
RB79 1 2 2.2K_0402_5% KSI7 62 87
<63> KSO[0..17] KSI7/GPIO37 TP_CLK/GPIO4E TP_DATA TP_CLK <63>
KSO0 39 88
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <63> +3VS
KSO1 40
KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97 ENBKL
KSO3/GPIO23 ENKBL/GPXIOA00 TP_PWR_EN ENBKL <17>
KSO4 43 98
44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 ME_EN TP_PWR_EN <63>
KSO5
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH ME_EN <18> GPU_OVERT# RB12 1 @ 2 10K_0402_5%
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 VCIN0_PH <82>
SPOK_3V RB72 1 @ 2 0_0402_5% KSO8 47 KSO7/GPIO27
KSO8/GPIO28 SPI Device Interface SPOK_5V
KSO9 48 119
KSO9/GPIO29 MISO/GPIO5B BT_ON SPOK_5V <84>
KSO10 49 120
SPOK_5V RB73 SPOK_3V5V KSO10/GPIO2A MOSI/GPIO5C EC_CLR_CMOS BT_ON <52> +3VLP_EC
1 @ 2 0_0402_5% KSO11 50 SPI Flash ROM SPICLK/GPIO58 126
KSO12 51 KSO11/GPIO2B 128 FP_PWR_EN
KSO12/GPIO2C SPICS#/GPIO5A FP_PWR_EN <66> EC Internal PU
KSO13 52
KSO14 53 KSO13/GPIO2D LID_SW# RB13 1 2 100K_0402_1%
KSO15 54 KSO14/GPIO2E 73 TYPEC_1P5A_EC
KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 SYS_PWROK_R TYPEC_1P5A_EC <42,43>
KSO16 81 74
KSO17 82 KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 89
KSO17/GPIO49 GPIO50 90 BATT_BLUE_LED# BATT_4S <83>
For abnormal shutdown BATT_CHG_LED#/GPIO52 91 LEDPWR_EN BATT_BLUE_LED# <73>
EC_SMB_CK1 CAPS_LED#/GPIO53 PWR_LED# LEDPWR_EN <63>
77 GPIO 92
SPOK_3V5V EC_RSMRST# <82,83> EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CLK1/GPIO44 PWR_LED#/GPIO54 BATT_AMB_LED# PWR_LED# <73>
1 2 78 93
<82,83> EC_SMB_DA1 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_AMB_LED# <73>
DB2 RB751V-40_SOD323-2 79 95 SYSON
<18,25,66> PCH_SML1CLK 80 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 121 VR_ON SYSON <78,85,87>
<18,25,66> PCH_SML1DATA EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 VR_ON <78,88,89>
127
PCH_PWROK DPWROK_EC/GPIO59 CHG_ILMSEL <71>
1 2 PU at CPU side SM Bus
DB3 RB751V-40_SOD323-2
PM_SLP_S3# 6 100 EC_RSMRST#
<18,78> PM_SLP_S3# OVRM_EN PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 DGPU_AC_DETECT EC_RSMRST# <18>
14 101
EC_VCCST_PG_R <17,22> OVRM_EN SPOK_3V GPIO07 GPXIOA04 VCIN1_ADP_PROCHOT DGPU_AC_DETECT <19,25,83>
1 2 15 102
<84,87> SPOK_3V TP_EN GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 VCOUT1_PROCHOT VCIN1_ADP_PROCHOT <82>
DB4 RB751V-40_SOD323-2 16 103
<63> TP_EN TS_EN GPIO0A VCOUT1_PROCHOT#/GPXIOA06
17 104 MAINPWON
<19,38> TS_EN WL_OFF# 18 GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 105 MAINPWON <77,82,84>
3 BKOFF# 3
<52> WL_OFF# AC_PRESENT GPIO0C BKOFF#/GPXIOA08 THERMAL_ALERT# BKOFF# <38>
19 GPIO GPO 106 For Thermal Portect Shutdown
<18> AC_PRESENT KBL_EN AC_PRESENT/GPIO0D GPXIOA09 3V_EN_R THERMAL_ALERT# <66>
25 107
<63> KBL_EN FAN_SPEED1 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 CHG_EN
28 108 DB1
<77> FAN_SPEED1 FAN_SPEED2 FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11 CHG_EN <71>
29 RB751V-40_SOD323-2
<77> FAN_SPEED2 E51TXD_P80DATA 30 FANFB1/GPIO15 1 2 3V_EN
MAINPWON
VCOUT1_PROCHOT <52> E51TXD_P80DATA E51RXD_P80CLK EC_TX/GPIO16 AC_IN 3V_EN <84>
31 110 1
<52> E51RXD_P80CLK PCH_PWROK EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 EC_ON AC_IN <83>
32 112 RB14
<18,78> PCH_PWROK PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON <84>
2
PWR_SUSP_LED# 34 114 ON/OFFBTN# CB8 3V_EN_R 1 2 RB15 1 2

<73> PWR_SUSP_LED# TURBO_EN# SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 LID_SW# ON/OFFBTN# <63,77>
RB19 36 GPI 115 .1U_0402_16V7K 1M_0402_5%
<77> TURBO_EN# NUM_LED#/GPIO1A LID_SW#/GPXIOD04 116 LID_SW# <66> 2
@ 0_0402_5% SUSP# XEMC@ 1K_0402_5%
SUSP#/GPXIOD05 SW_PROCHOT# SUSP# <39,68,78,83,85,87,88>
117
GPXIOD06 118 EC_PECI 1 2
H_PECI <10,17>
1
PBTN_OUT# 122 PECI/GPXIOD07 RB16 33_0402_1%

DGPU_AC_DETECT SW_PROCHOT# <18> PBTN_OUT# PM_SLP_S4# PBTN_OUT#/GPIO5D
123 124 PDG 33ohm, checklist 43ohm.
<18,78> PM_SLP_S4# PM_SLP_S4#/GPIO5E V18R/VCC_IO2 +3VLP_EC
AGND
GND
GND
GND
GND
GND
@ QB1A QB1B @
6
2N7002KDW_SOT363-6 D D 2N7002KDW_SOT363-6 KB9022QD_LQFP128_14X14

11
24
35
94
113
ECAGND 69
VCOUT1_PROCHOT 2 5 VCOUT1_PROCHOT
G G
CO-LAY with KB9032QA (SA000080J00) 20mil
CB9 1 2 BATT_TEMP RB17
S S 100P_0402_50V8J 0_0402_5%
1
LB2 2 1 1 @ 2 VR_HOT#
VR_HOT# <89>
FBMA-L11-160808-800LMT_0603
RB18
0_0402_5%
ECAGND H_PROCHOT# 1 @ 2 SW_PROCHOT#
<10,83> H_PROCHOT#
2015/1/9 acer require:

reserved protact circuit when
adaptor 107% happen
RB76 1 @ 2 0_0402_5% VR_PWRGD
<89> VCCCORE_VR_PWRGD
4 4

EC ENE-KB9012A4/KB9022
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
5 4 3 2 1
2.2K 2.2K
+3VALW_PCH_PRIM
+3VS
2.2K +3VS 2.2K
PCH_SMBCLK D_CK_SCLK
2N7002KDW
PCH_SMBDATA D_CK_SDATA SO-DIMM A & B
PCH_SML0CLK 499
+3VALW_PCH_PRIM 1.8K
D
PCH_SML0DATA 499 D
CoffeeLake-H 2.2K +1.8VSDGPU_AON 2.2K
PCH 1.8K @
+3VALW_PCH_PRIM +1.8VSDGPU_AON
+3VS
2.2K +1.8VSDGPU_AON 2.2K
+1.8VSDGPU_AON @
PCH_SML1CLK 0ohm EC_SMB_CK2 VGA_SMB_CK2 VGA_I2CC_SCL VGA_I2CC_SCL_PWR
PJT138KA PJT138KA Power IC

PCH_SML1DATA 0ohm EC_SMB_DA2 VGA_SMB_DA2 VGA_I2CC_SDA VGA_I2CC_SDA_PWR
UP9512
2.2K
2.2K
+3VLP_EC +1.8VSDGPU_AON
2.2K 2.2K
N18E-G1
EC_SMB_CK1 100 ohm EC_SMB_CK1-1
BATTERY I2CB_SCL
EC_SMB_DA1 100 ohm EC_SMB_DA1-1 CONN
I2CB_SDA
KB9022 0 ohm EC_SMB_CK1_CHGR 4.7K

ADC_IN_P
0 ohm EC_SMB_DA1_CHGR Charger +3VS
4.7K Current Sensor
+3VS ADC_IN_N
EC_SMB_CK2
2N7002KDW
C EC_SMB_DA2 THERMAL SENSOR C
B B
A A

N17 Sequence
5 4 3 2 1
Reserve Page

Reserve Page
KB Conn. Touch Pad
KSI[0..7]
KSI[0..7] <58>
KSO[0..17]
KSO[0..17] <58>
+3V_PTP +3V_PTP +3V_PTP
JKB1 +3VALW +3V_PTP
30
29 GND2 2 @ 1
GND1 +3VALW
1
KSO16 28 UK3 0_0402_5% RK5
1
KSO17 27 28 5 1 2 @ 1
27 IN OUT 1 +3VS
2
KSO0 26 2 CK7 RK8 RK9 0_0402_5% RK6
G
KSO1 25 26 2 4.7U_0402_6.3V6M QK1A 2.2K_0402_5% 2.2K_0402_5%
KSO2 24 25 CK6 GND 2N7002KDW_SOT363-6 @ CK1
2
KSO3 23 24 1U_0201_6.3V6M 4 3 2 0.1U_0201_10V6K JTP1
2
KSO4 22 23 1 EN OC 6 1 I2C_1_SCL_R 2 1 1
S
22 <19> I2C_1_SCL TP_CLK 1
KSO5 21 SY6288C20AAC_SOT23-5 2
D
21 2
1
KSO6 20 @EMC@ TP_DATA 3
KSO7 19 20 CK8
EC PS2 4 3
19 <58> TP_PWR_EN 4
5
KSO8 18 10P_0402_50V8J I2C_1_SDA_R 5
2
KSO9 17 18 QK1B I2C_1_SCL_R 6 5 9
16 17 PCH I2C EC_TP_INT# 7 6 G1 10
KSO10
16 TP_PWR_EN follow SYSON behavior 2N7002KDW_SOT363-6
<16,58> EC_TP_INT# TP_EN 7 G2
KSO11 15 8
15 I2C_1_SDA_R <58> TP_EN 8
KSO12 14 <19> I2C_1_SDA 3 4
S
KSO13 13 14 ACES_51524-0080N-001
1
KSO14 12 13 @EMC@ CONN@
KSO15 11 12 CK9 SP01001A900
KSI0 10 11 10P_0402_50V8J
2
KSI1 9 10
KSI2 8 9 +3V_PTP
KSI3 7 8 DK2
KSI4 6 7 TP_CLK 6 3 EC_TP_INT#
KSI5 5 6 I/O4 I/O2
5
1
KSI6 4 +3V_PTP
KSI7 3 4 RK10 RK11
2 3 4.7K_0402_5% 4.7K_0402_5% 5 2
2 VDD GND
2
ON/OFFBTN# 1
<58,77> ON/OFFBTN# 1
2
ACES_85201-2805 RK7
CONN@ 10K_0402_5% TP_DATA 4 1 TP_EN
TP_CLK I/O3 I/O1
<58> TP_CLK
1
TP_DATA EC_TP_INT# AZC099-04S.R7G_SOT23-6
SP01000GO00 <58> TP_DATA
@EMC@
LED driver +3VALW +5V_LEDPWR +5V_LEDPWR

KB
BackLight
1
1
2.2K_0402_5%
RE69
LEDDRV@
2.2K_0402_5%
RE70
LEDDRV@
5
5
G
QE62B QE63B
2
2N7002KDW_SOT363-6 2N7002KDW_SOT363-6
EC_SMB_CK3 4 3 EC_SMB_CK3_LEDDRV_L 3 4 EC_SMB_CK3_LEDDRV +5VS JBL1
S
<58> EC_SMB_CK3
D
LEDDRV@ LEDDRV@ U4 1
D
5 1 +5VS_BL 2 1
IN OUT 2
2
3
G
2 4 3
GND 4
<58> KBL_EN 1 @ 2 4 3 5
EC_SMB_DA3 1 6 EC_SMB_DA3_LEDDRV_L 6 1 EC_SMB_DA3_LEDDRV R18 0_0402_5% EN OC 6 GND
S
1
S
<58> EC_SMB_DA3 GND

D
SY6288C20AAC_SOT23-5
D
QE62A QE63A C32 @ ACES_51524-0040N-001

2N7002KDW_SOT363-6 2N7002KDW_SOT363-6 0.1U_0201_10V6K CONN@
LEDDRV@ LEDDRV@ 2
SP010022M00
+5VALW
EC_SMB_CK3_LEDDRV_L 4.7K_0402_5% 2 LEDDRV@

1 R4036
EC_SMB_DA3_LEDDRV_L 4.7K_0402_5% 2 LEDDRV@
1 R4037
+5VALW +5V_LEDPWR
UE5
5 1
IN OUT
2 JBL2
GND KB_D_LED_B_DRV# 1
1 @ 2 4 3 KB_D_LED_G_DRV# 2 1
<58> LEDPWR_EN EN OC KB_D_LED_R_DRV# 2
RE71 0_0402_5% 3
SY6288C20AAC_SOT23-5 KB_C_LED_B_DRV# 4 3
LEDDRV@ KB_C_LED_G_DRV# 5 4
KB_C_LED_R_DRV# 6 5
KB_B_LED_B_DRV# 7 6
follow SYSON KB_B_LED_G_DRV#
KB_B_LED_R_DRV#
8
9
7
8
KB_A_LED_B_DRV# 10 9
KB_A_LED_G_DRV# 11 10
KB_A_LED_R_DRV# 12 11
+5V_LEDPWR
AD3 AD2 AD1 AD0 +5V_LEDPWR 13 12
+5V_LEDPWR 13
14
0 0 0 0 14
1
RE65
4.7K_0402_1% 1
LEDDRV@ CE3 +5V_LEDPWR 15
UE4 0.1U_0201_10V6K 16 GND
LEDDRV@ GND
2
24 27 2 ACES_51522-01401-P01
RESET Vcc CONN@
3 KB_A_LED_R_DRV# SP01001R800
OUT0
1
EC_SMB_CK3_LEDDRV 25 4 KB_A_LED_G_DRV#
EC_SMB_DA3_LEDDRV 26 SCL OUT1 5 KB_A_LED_B_DRV# RE79 RE78 RE77 RE76
SDA OUT2 6 KB_B_LED_R_DRV# @ 4.7K_0402_1% @ 4.7K_0402_1% @ 4.7K_0402_1% @ 4.7K_0402_1%
AD0 31 OUT3 8 KB_B_LED_G_DRV#
AD1 32 A0 OUT4 9 KB_B_LED_B_DRV#
2
AD2 1 A1 OUT5 10 KB_C_LED_R_DRV#

AD3 2 A2 OUT6 11 KB_C_LED_G_DRV#
A3 OUT7 14 KB_C_LED_B_DRV# AD0
12 OUT8 15 KB_D_LED_R_DRV# AD1
13 N.C. OUT9 16 KB_D_LED_G_DRV# AD2
28 N.C. OUT10 17 KB_D_LED_B_DRV# AD3
29 N.C. OUT11 19
N.C. OUT12
1
30 20
N.C. OUT13 21 RE75 RE74 RE73 RE72
1
OUT14 22 4.7K_0402_1% 4.7K_0402_1% 4.7K_0402_1% 4.7K_0402_1%

RE64 OUT15 LEDDRV@ LEDDRV@ LEDDRV@ LEDDRV@
@ 10K_0402_5% 7 23
2
18 GND GND 33
GND GND
set RE7 to 10k / output = 1.875mA
2
TLC59116FIRHBR_VQFN32_5X5
LEDDRV@
Raptor: NC for 59116F

KB/TP/LEDs(TLC59116F)
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
To Hall sensor/B
THERMAL SENSOR Close to VRAM choke
+3VS +3VS
+3VLP_ECA
1
RF9
1 RF10 2.2K_0402_5% 1
1
TMS@ 2.2K_0402_5% TMS@
G
QF1B TMS@
2
+3VLP 2N7002KDW _SOT363-6 RF7
16.5K_0402_1%
JHS1 3 4 TMS_SMB_CLK
<18,25,58> PCH_SML1CLK
2
1
D
1
2
LID_SW # 2 TMS@
G
<58> LID_SW# 2 <58> VRAM_TEMP
3 QF1A
4 3 2N7002KDW _SOT363-6
4
1
5 6 1 TMS_SMB_DATA RH250
<18,25,58> PCH_SML1DATA
S
6 GND 100K_0402_1%_TSM0B104F4251RZ
D
GND SL200002H00
ACES_51524-0040N-001
2
CONN@
SP010022M00 +3VS
+3VS ECAGND
1
TMS@
TMS@ 1 UF2 RF24
CF20 1 8 TMS_SMB_CLK 10K_0402_5%
0.1U_0201_10V6K VDD SCL
2 7 TMS_SMB_DATA
2
2 D+ SDA
3 6 THERMAL_ALERT#
D- ALERT# THERMAL_ALERT# <58>
1 TMS@ 2 TH_THERM# 4 5
+3VS T_CRIT# GND
2 RF23 10K_0402_5% 2
NCT7718W _MSOP8
SA000067P00
Part Number SMBUS ADDRESS
TPM S IC NCT7718W MSOP 8P THEMAL SENSOR
TMS@
NCT7718W 1001_1000b
SA000067P00
+3VALW R45 +3VALW _TPM +3VS R46 +3VS_TPM
0_0603_5% 0_0603_5%
1 @ 2 1 @ 2
Finger Print
10U_0402_6.3V6M
0.1U_0201_10V6K
10U_0402_6.3V6M
0.1U_0201_10V6K
C57
0.1U_0201_10V6K
C58
0.1U_0201_10V6K
C55
1 1 1 1 1 1
C56
C59
C54
2 2 near 2 2 2 2
TPM@
TPM@ TPM@ TPM@ TPM@ TPM@

pin1
+3VALW FP@
near RK14 1 2 0_0402_5% JFP1
+FP_VCC 10
+3VALW pin8,22 +5VALW 9 GND
R48 TPM@ RK15 1 @ 2 0_0402_5% GND
10K_0402_5% 8
1 2 PCH_SPI_CS#2 +FP_VCC USB20_P8_L 7 8
2 7
FP@ USB20_N8_L 6
3 CK4 UK2 5 6 3
1U_0201_6.3V6M 5 1 4 5
1 IN OUT 3 4
1 3
2 FP@ 2
R50 1 TPM@ 2 33_0402_1% PCH_SPI_SO_TPM_R GND CK5 1 2
<16> PCH_SPI_SO_R PCH_SPI_SI_TPM_R FP_PW R_EN 1
R51 1 TPM@ 2 33_0402_1% <58> FP_PWR_EN 4 3 4.7U_0402_6.3V6M
<16> PCH_SPI_SI_R R52 1 TPM@ 2 33_0402_1% PCH_SPI_CLK_TPM_R EN OC 2 JXT_FP201H-008G10M
<16> PCH_SPI_CLK_R SY6288C20AAC_SOT23-5 CONN@
FP@ SP010020S00
U9 +3VALW _TPM
TH41 1 RK16 1 @ 2 0_0402_5% USB20_N8_L PIN ETU801 FA577E-1200
VSB +3VS_TPM <14> USB20_N8 USB20_P8_L
@ 29 RK17 1 @ 2 0_0402_5%
30 SDA/GPIO0 8
<14> USB20_P8 1 +FP_VCC(5V) +FP_VCC(3V)
SCL/GPIO1 VHIO 22
0_0402_5% 1 @ 2 R47 TPM_BADD 6 VHIO 2 USBP D+
GPIO3 2
PCH_SPI_SO_TPM_R 24 NC 3 3 USBN D-
PCH_SPI_SI_TPM_R 21 MISO NC 5 DK1 FPESD@
18 MOSI/GPIO7 NC 7 6 3 USB20_N8_L 4 GND GND
<17,58> TPM_SERIRQ PIRQ/GPIO2 NC I/O4 I/O2
9
NC 10 5 NC NC
PCH_SPI_CLK_TPM_R 19 NC 11
20 SCLK NC 12 5 2 6 NC NC
<16> PCH_SPI_CS#2 SCS/GPIO5 NC +FP_VCC VDD GND
17 14
<16,58> PLT_RST#
27 PLTRST NC 15 7 NC
13 NC NC 26
4 GPIO4 NC 25 USB20_P8_L 4 1 8 NC 4
NC 28 I/O3 I/O1
4 NC 31 AZC099-04S.R7G_SOT23-6
PP/GPIO6 NC 32
NC
16
GND 23 Security Classification Compal Secret Data Compal Electronics, Inc.
GND 33
PGND Issued Date 2019/12/28 Deciphered Date 2019/12/28 Title
NPCT750AAAYX_QFN32_5X5
Sensors
TPM@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
SA0000AQ250 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
A B C D E
A B C D E
SATA Re-Driver and cable HDD Conn. +5VS +5VS_HDD +3VS
1 @ 2
100mils
RO4 0_0805_5%
10U_0402_6.3V6M
CO12
1 1 1
RO21 1 NORD@ 2 0_0201_5% SATA_PRX_DTX_P4_R NORD@ CO18 1 20.01U_0201_6.3V7K RDSATA_PRX_DTX_P4_C CO13 CO11
<17> SATA_PRX_DTX_P4 SATA_PRX_DTX_N4_R NORD@ CO19 1 RDSATA_PRX_DTX_N4_C
RO22 1 NORD@ 2 0_0201_5% 20.01U_0201_6.3V7K 0.1U_0201_10V6K 0.1U_0201_10V6K
<17> SATA_PRX_DTX_N4 2 2 2
@ @
RO23 1 NORD@ 2 0_0201_5% SATA_PTX_DRX_N4_R NORD@ CO20 1 20.01U_0201_6.3V7K RDSATA_PTX_DRX_N4_C
1 <17> SATA_PTX_DRX_N4 SATA_PTX_DRX_P4_R NORD@ CO21 1 RDSATA_PTX_DRX_P4_C 1
<17> SATA_PTX_DRX_P4 RO24 1 NORD@ 2 0_0201_5% 20.01U_0201_6.3V7K
FFC Type
B_EQ1
A_EQ2
A_EQ1
DEW
JHDD1
CO1 +3VS 14
13 GND
2 1 GND
SATARD@ +5VS_HDD 12
0.01U_0201_6.3V7K UO1 11 12
20
19
18
17
16
SATARD@ PS8527CTQFN20GTR2A_TQFN20_4X4 10 11
G_INT2_R 9 10
TP@ TC24
DEW
VDD2
B_EQ1
A_EQ2
A_EQ1
8 9
7 8
SATA_PTX_DRX_P4 SATARD@ CO4 1 2 SATA_PTX_C_DRX_P4 0.01U_0201_6.3V7K 1 15 RDSATA_PTX_DRX_P4 RDSATA_PRX_DTX_P4 SATARD@ CO14 2 1 0.01U_0201_6.3V7K RDSATA_PRX_DTX_P4_C 6 7
SATA_PTX_DRX_N4 SATARD@ CO5 1 2 SATA_PTX_C_DRX_N4 0.01U_0201_6.3V7K 2 A_INP A_OUTP 14 RDSATA_PTX_DRX_N4 RDSATA_PRX_DTX_N4 SATARD@ CO15 2 1 0.01U_0201_6.3V7K RDSATA_PRX_DTX_N4_C 5 6
3 A_INN A_OUTN 13 B_EQ2 4 5
SATA_PRX_DTX_N4 SATARD@ CO8 1 2 SATA_PRX_C_DTX_N4 0.01U_0201_6.3V7K 4 GND1 B_EQ2 12 RDSATA_PRX_DTX_N4 RDSATA_PTX_DRX_N4 SATARD@ CO16 2 1 0.01U_0201_6.3V7K RDSATA_PTX_DRX_N4_C 3 4
SATA_PRX_DTX_P4 SATARD@ CO9 1 2 SATA_PRX_C_DTX_P4 0.01U_0201_6.3V7K 5 B_OUTN B_INN 11 RDSATA_PRX_DTX_P4 RDSATA_PTX_DRX_P4 SATARD@ CO17 2 1 0.01U_0201_6.3V7K RDSATA_PTX_DRX_P4_C 2 3
21 B_OUTP B_INP 1 2
GND2 1
VDD1
REXT
B_DE
A_DE
ACES_51625-01201-001
EN
CONN@
SP010028W00
6
7
8
9
10
+3VS G_INT2_R
SATARD@
1
RO6 1 @ 2 4.7K_0402_5% A_DE RO7 2 1
+3VS +3VS
0.1U_0201_10V6K
SATARD@ CO10
4.99K_0402_1% RO25
B_DE
A_DE
B_DE 1
RO8 1 @ 2 4.7K_0402_5% 0_0402_5%
2 1 RO9 @ 2 2
RO10 1 @ 2 4.7K_0402_5% B_EQ1 4.7K_0402_5%
2
2
RO11 1 @ 2 4.7K_0402_5% A_EQ1
RO12 1 SATARD@
2 4.7K_0402_5% A_EQ2
RO13 1 2 4.7K_0402_5% B_EQ2

@ USE 8527 re-driver
RO14 1 @ 2 4.7K_0402_5% DEW SA00007JU10
RO15 1 @ 2 4.7K_0402_5% A_DE
RO16 1 @ 2 4.7K_0402_5% B_DE
RO17 1 @ 2 4.7K_0402_5% B_EQ1
RO18 1 @ 2 4.7K_0402_5% A_EQ1
RO19 1 @ 2 4.7K_0402_5% A_EQ2
RO20 1 SATARD@
2 4.7K_0402_5% B_EQ2
3 3
4 4

HDD/ Re-Driver
A B C D E
5 4 3 2 1
SSD
Raptor:LANE REVERSAL for SATA/PCIe NGFF Slot_1 Key M (left side)
+3VS_NGFF PWR
Combo Lanes +3VALW
+3VS_NGFF1 +3VS_NGFF1
JSSD1
1 2 U43 J17
3 GND 3P3VAUX 4 1 14 +3V_NGFF_1 1 2
PCIE_PRX_DTX_N9 5 GND 3P3VAUX 6 2 VIN1 VOUT1 13
<17> PCIE_PRX_DTX_N9 PCIE_PRX_DTX_P9 PERn3 NC VIN1 VOUT1
C386
0.1U_0201_10V6K
7 8 R351 0_0402_5% C832 JUMP_43X118 1
<17> PCIE_PRX_DTX_P9 9 PERp3 NC 10 2 1 +3V_NGFF_GATE 3 12 1 2
@ @
GND DAS/DSS# <39,58,78,83,85,87,88> SUSP# ON1 CT1
CN7 1 2 0.22U_0402_16V7KPCIE_PTX_C_DRX_N9 11 12 1 1000P_0402_50V7K
<17> PCIE_PTX_DRX_N9 PETn3 3P3VAUX
D CN8 1 2 0.22U_0402_16V7KPCIE_PTX_C_DRX_P9 13 14 @ 4 11 D
<17> PCIE_PTX_DRX_P9 PETp3 3P3VAUX +5VALW VBIAS GND 2
0.01U_0201_6.3V7K
15 16 C829
PCIE_PRX_DTX_N10 GND 3P3VAUX
C388
17 18 5 10 1 2
<17> PCIE_PRX_DTX_N10 PCIE_PRX_DTX_P10 PERn2 3P3VAUX 2 ON2 CT2
19 20 1000P_0402_50V7K
<17> PCIE_PRX_DTX_P10 PERp2 NC
21 22 6 9
CN5 1 2 0.22U_0402_16V7KPCIE_PTX_C_DRX_N10 23 GND NC 24 7 VIN2 VOUT2 8 +3VS_NGFF2
<17> PCIE_PTX_DRX_N10 PETn2 NC VIN2 VOUT2
CN6 1 2 0.22U_0402_16V7KPCIE_PTX_C_DRX_P10 25 26 +3VALW +3VALW
<17> PCIE_PTX_DRX_P10 27 PETp2 NC 28 15 J27
PCIE_PRX_DTX_N11 29 GND NC 30 GPAD +3V_NGFF_2 1 2
<17> PCIE_PRX_DTX_N11 PCIE_PRX_DTX_P11 PERn1 NC
31 32 1 1 EM5209VF_DFN14_2X3
1U_0201_6.3V6M
1U_0201_6.3V6M
C830
0.1U_0201_10V6K
33 34 20mohm/6A per channel JUMP_43X118 1
2 0.22U_0402_16V7KPCIE_PTX_C_DRX_N11 GND NC
C843
C826
CN3 1 35 36 @
<17> PCIE_PTX_DRX_N11 1 2 0.22U_0402_16V7KPCIE_PTX_C_DRX_P11 37 PETn1 NC 38
CN4
<17> PCIE_PTX_DRX_P11
PCIE_PRX_DTX_P12
39
41
PETp1
GND
DEVSLP
NC
40
42
SSD_DEVSLP1 <17> 2 2 SHORT DEFAULT 2
<17> PCIE_PRX_DTX_P12 PCIE_PRX_DTX_N12 PERn0/SATA-B+ NC
43 44
<17> PCIE_PRX_DTX_N12 45 PERp0/SATA-B- NC 46
CN1 1 2 0.22U_0402_16V7KPCIE_PTX_C_DRX_N12 47 GND NC 48
<17> PCIE_PTX_DRX_N12 1 2 0.22U_0402_16V7KPCIE_PTX_C_DRX_P12 49 PETn0/SATA-A- NC 50 PLT_RST_BUF#
CN2
<17> PCIE_PTX_DRX_P12 PETp0/SATA-A+ PERST# SSD1_CLKREQ#_R PLT_RST_BUF# <16,25,51,52>
51 52 1 @ 2
<15> CLK_PCIE_NGFF1#
CLK_PCIE_NGFF1#
CLK_PCIE_NGFF1
53 GND
REFCLKN
CLKREQ#
PEWake#
54 RN20 0_0402_5%
SSD1_CLKREQ# <15>
Raptor:Use +3VS
55 56
<15> CLK_PCIE_NGFF1 57 REFCLKP NC 58
GND NC
67 68 SUSCLK_SSD1 1 @ 2
1 2 69 NC SUSCLK(32kHz) 70 SUSCLK <18,52>
@ PEDET0 RN3 0_0402_5%
<17> SATA_GP1 PEDET(NC-PCIE/GND-SATA) 3P3VAUX
RN5 0_0402_5% 71 72
73 GND 3P3VAUX 74
75 GND 3P3VAUX
Pull high at PCH side GND
GND1
76
77
GND2 PLT_RST_BUF#
LOTES_APCI0079-P005A close to JSSD1
CONN@ 1
SP07001EZ00
XEMC@ CN49
C C
1000P_0402_50V7K~D
2
Raptor:reserve for ESD
+3VS_NGFF1
SSD 1
10U_0402_6.3V6M
10U_0402_6.3V6M
0.1U_0201_10V6K
1 1 2
NGFF Slot_2 Key M (left side) CN47
@
CN43 CN42
+ CN41
150U_D2_6.3VM_R17M
SGA00003700
+3VS_NGFF2 2 2 1 2
JSSD2
1 2
PCIE_PRX_DTX_N24
3
5
GND
GND
3P3VAUX
3P3VAUX
4
6
placement close PCIE SSD side
<14> PCIE_PRX_DTX_N24 PCIE_PRX_DTX_P24 7 PERn3 NC 8
9 10
CN9 1 2 0.22U_0402_16V7KPCIE_PTX_C_DRX_N24 11 GND
PETn3
DAS/DSS#
3P3VAUX
12 Raptor:reserve
CN10 1 2 0.22U_0402_16V7KPCIE_PTX_C_DRX_P24 13 14
<14> PCIE_PTX_DRX_P24 PETp3 3P3VAUX
15 16
PCIE_PRX_DTX_N23 17 GND 3P3VAUX 18
<14> PCIE_PRX_DTX_N23
PCIE_PRX_DTX_P23 19 PERn2
PERp2
3P3VAUX
NC
20
PLT_RST_BUF#
PEDET Module Type
21 22
CN12 1 2 0.22U_0402_16V7KPCIE_PTX_C_DRX_P23 25 PETn2 NC 26
close to JSSD2
B
<14> PCIE_PTX_DRX_P23
PCIE_PRX_DTX_N22
27 PETp2
GND
NC
NC
28
1
0 SATA B
29 30 XEMC@ CN50
<14> PCIE_PRX_DTX_N22 PCIE_PRX_DTX_P22 PERn1 NC
31 32 1000P_0402_50V7K~D
<14> PCIE_PRX_DTX_P22 33 PERp1 NC 34 2
CN13 1 2 0.22U_0402_16V7KPCIE_PTX_C_DRX_N22 35 GND
PETn1
NC
NC
36 1 PCIE
CN14 1 2 0.22U_0402_16V7KPCIE_PTX_C_DRX_P22 37 38
<14> PCIE_PTX_DRX_P22 PETp1 DEVSLP
39 40
PCIE_PRX_DTX_P21 41 GND NC 42
<14> PCIE_PRX_DTX_N21
PCIE_PRX_DTX_N21 43 PERn0/SATA-B+
PERp0/SATA-B-
NC
NC
44 Raptor:reserve for ESD
45 46
<14> PCIE_PTX_DRX_N21 2 0.22U_0402_16V7KPCIE_PTX_C_DRX_P21 PETn0/SATA-A- NC PLT_RST_BUF#
CN16 1 49 50
<14> PCIE_PTX_DRX_P21 PETp0/SATA-A+ PERST# SSD2_CLKREQ#_R
51 52 1 @ 2
CLK_PCIE_NGFF2# 53 GND CLKREQ# 54 SSD2_CLKREQ# <15> +3VS_NGFF2
RN21 0_0402_5%
<15> CLK_PCIE_NGFF2# CLK_PCIE_NGFF2 REFCLKN PEWake#
55 56
<15> CLK_PCIE_NGFF2 57 REFCLKP NC 58
GND NC
1
10U_0402_6.3V6M
10U_0402_6.3V6M
0.1U_0201_10V6K
1 1 2
@ + CN44
67 68 SUSCLK_SSD2 1 @ 2 SUSCLK CN48 CN46 CN45 150U_D2_6.3VM_R17M
69 NC SUSCLK(32kHz) 70 RN8 0_0402_5% SGA00003700
71 PEDET(NC-PCIE/GND-SATA) 3P3VAUX 72 2 2 1 2
73 GND 3P3VAUX 74
75 GND 3P3VAUX
GND
GND1
76
77
placement close PCIE SSD side
GND2
LOTES_APCI0079-P005A
CONN@ Raptor:reserve
SP07001EZ00
A
PEDET Module Type A
0 SATA
1 PCIE
M.2 SSD_PCIe/SATA
5 4 3 2 1
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
USB3.0 /2.0 CMC

USB3_PTX_L_DRX_P1 1
DS1 EMC@
9 USB3_PTX_L_DRX_P1 Charger Port
USB3_PTX_L_DRX_N1 2 8 USB3_PTX_L_DRX_N1 Raptor
<17> USB3_PTX_DRX_P1 1 2 USB3_PTX_C_DRX_P1 RS86 1 @ 2 0_0402_5% USB3_PTX_L_DRX_P1
CS2 .1U_0402_16V7K USB3_PRX_L_DTX_P1 4 7 USB3_PRX_L_DTX_P1 +USB3_VCCA
1 <17> USB3_PTX_DRX_N1 1 2 USB3_PTX_C_DRX_N1 RS89 1 @ 2 0_0402_5% USB3_PTX_L_DRX_N1 USB3_PRX_L_DTX_N1 5 6 USB3_PRX_L_DTX_N1

W=100mils 1
CS3 .1U_0402_16V7K
1 2
EMC@
USB3_PRX_DTX_P1 RS90 1 @ 2 0_0402_5% USB3_PRX_L_DTX_P1 3 CS5 + CS6
<17> USB3_PRX_DTX_P1
150U_D2_6.3VM_R17M .1U_0402_16V7K
TVW DF1004AD0_DFN9 SGA00003700 1
USB3_PRX_DTX_N1 RS91 1 @ 2 0_0402_5% USB3_PRX_L_DTX_N1 2
<17> USB3_PRX_DTX_N1 SC300003Z00
USB3.0 Conn.
JUSB1
1
DS2 EMC@ U2DN1_L 2 VBUS
6 3 U2DN1_L U2DP1_L 3 D-
I/O4 I/O2 4 D+
LS3 EMC@ +USB3_VCCA USB3_PRX_L_DTX_N1 5 GND
U2DP1 2 1 U2DP1_L USB3_PRX_L_DTX_P1 6 StdA-SSRX- 10
2 1 5 2 7 StdA-SSRX+ GND 11
VDD GND USB3_PTX_L_DRX_N1 8 GND-DRAIN GND 12
U2DN1 3 4 U2DN1_L USB3_PTX_L_DRX_P1 9 StdA-SSTX- GND 13
3 4 StdA-SSTX+ GND
DLM0NSN900HY2D_4P U2DP1_L 4 1 ACON_TARAC-9V1391
I/O3 I/O1 CONN@
AZC099-04S.R7G_SOT23-6 DC23300AG00
2
USB Host Charger 2
+5VALW
RS14 1 CHG@ 2 10K_0402_5% CHG_CTL2
RS15 1 @ 2 10K_0402_5% CHG_ILMSEL
+5VALW
RS8 1 @ 2 0_1206_5%
0911 Rerserve PU, vendor
0.1U_0201_10V6K
suggest to EC control if
22U_0603_6.3V6M
1 1
CS7
future need support SDP2

CS9
@ CHG@ +USB3_VCCA
2 2 US12
CHG@
+5VALW _CHG 1 12 +USB3VCCA_CHG 2 @ 1
0904 vendor recommend VIN VOUT RS92 0_1206_5%
2
<14> USB20_N1 DM_OUT
RS11 3
3 <14> USB20_P1 DP_OUT 3
0_0402_5% 10 U2DP1
USB_OC1# 2 @ 1 13 DP_IN 11 U2DN1
<14> USB_OC1# FAULT# DM_IN
CHG_ILMSEL 4
1 <58> CHG_ILMSEL ILIM_SEL
CS8 CHG_EN 5 15
<58> CHG_EN EN ILIM_L
0.1U_0201_10V6K 16
@ 2 ILIM_HI
1
CHG_CTL1 6
<58> CHG_CTL1 CHG_CTL2 CTL1
22.1K_0402_1%
7 9
CHG_CTL3 CTL2 NC
RS12
8 14 @ RS13
<58> CHG_CTL3 CTL3 GND 17 39K_0402_1%
Thermal Pad CHG@
2
SLGC55544CVTR_TQFN16_3X3
ILM R vaule
Ios(mA)=50250/R(Kohm)
0831 Reserve ILIM_L R as vendor recommend ILIM_Hi=2273mA
ILIM_L=1288mA(reserve)
USB Host Charger Truth Table

CHG_EN CTL1 CTL2 CTL3 ILIM_SEL MODE Current Limit Note
Setting
4 0 0 1 0 1 SDP1-OFF ILIM_H Port power off 4
1 0 1 0 1 SDP1 ILIM_H Data Lines Connected

1 0 1 1 1 DCP ILIM_H Data Lines Disconnected
Auto
1 1 1 1 1 CDP ILIM_H Data Lines Connected
USB TYPEA with Charger
A B C D E
A B C D E
USB3.0
+5VALW
For ESD request +USB3_VCCB
1 2 USB3_PTX_C_DRX_P3 RS124 1 @ 2 0_0402_5% USB3_PTX_L_DRX_P3 CS107 EMC@
<17> USB3_PTX_DRX_P3 DS20 EMC@
CS109 .1U_0402_16V7K .1U_0402_16V7K US13
USB3_PTX_L_DRX_P3 1 9 USB3_PTX_L_DRX_P3 1 2 5 1
IN OUT W=60mils
1 1 2 USB3_PTX_C_DRX_N3 RS123 1 @ 2 0_0402_5% USB3_PTX_L_DRX_N3 1
<17> USB3_PTX_DRX_N3 USB3_PTX_L_DRX_N3 2 USB3_PTX_L_DRX_N3
CS108 .1U_0402_16V7K 8 2
GND
USB3_PRX_L_DTX_P3 4 7 USB3_PRX_L_DTX_P3 4 3
<42,58,73> USB_EN EN OC
USB3_PRX_L_DTX_N3 5 6 USB3_PRX_L_DTX_N3 SY6288C20AAC_SOT23-5
USB3_PRX_DTX_P3 RS126 1 @ 2 0_0402_5% USB3_PRX_L_DTX_P3 3

<17> USB3_PRX_DTX_P3
TVWDF1004AD0_DFN9
USB3_PRX_DTX_N3 RS125 1 @ 2 0_0402_5% USB3_PRX_L_DTX_N3
<17> USB3_PRX_DTX_N3 SC300003Z00 +USB3_VCCB
W=100mils
1 2
EMC@
CS111 + CS110
150U_D2_6.3VM_R17M .1U_0402_16V7K
SGA00003700 1
2
6
DS21 EMC@
3 U2DP3_L USB3.0 Conn.
I/O4 I/O2 JUSB2
+USB3_VCCB 1
U2DN3_L 2 VBUS
LS13 EMC@ 5 2 U2DP3_L 3 D-
2 1 U2DP3_L VDD GND 4 D+
<14> USB20_P3 2 1 USB3_PRX_L_DTX_N3 5 GND
USB3_PRX_L_DTX_P3 6 StdA-SSRX- 10
2 3 4 U2DN3_L U2DN3_L 4 1 7 StdA-SSRX+ GND 11 2
<14> USB20_N3 3 4 I/O3 I/O1 USB3_PTX_L_DRX_N3 8 GND-DRAIN GND 12
DLM0NSN900HY2D_4P AZC099-04S.R7G_SOT23-6 USB3_PTX_L_DRX_P3 9 StdA-SSTX- GND 13
StdA-SSTX+ GND
SM070005U00 ACON_TARAC-9V1391
CONN@
DC23300AG00
3 3
4 4

USB3.0 Conn/USB Charger
A B C D E
A B C D E
USB_Audio/B
JIO2
26
GND2
25 JIO3
LS12 EMC@ HPOUT_L_1 24 GND1 HPOUT_L_1 1
USB20_P4_L HPOUT_R_1 24 <56> HPOUT_L_1 HPOUT_R_1 1
3 4 23 2
<14> USB20_P4 3 4 23 <56> HPOUT_R_1 2
1
SLEEVE 22 <56> SLEEVE SLEEVE 3 1
RING2 21 22 RING2 4 3
USB20_N4_L HP_PLUG# 21 <56> RING2 HP_PLUG# 4
2 1 20 <56> HP_PLUG# 5
<14> USB20_N4 2 1 20 5
19 6
GNDA 19 GNDA 6
DLM0NSN900HY2D_4P SPKR+ 18 SPKR+ 40mil 7
18 <56> SPKR+ 7
SM070005U00 17 8
SPKR- 16 17 SPKR- 9 8
15 16 <56> SPKR- 40mil 10 9
BATT_AMB_LED# 14 15 BATT_AMB_LED# 11 10
BATT_BLUE_LED# 14 <58> BATT_AMB_LED# BATT_BLUE_LED# 11
13 12
PWR_SUSP_LED# 13 <58> BATT_BLUE_LED# PWR_SUSP_LED# 12
12 <58> PWR_SUSP_LED# 13
PWR_LED# 11 12 PWR_LED# 14 13
11 <58> PWR_LED# 14
+5VALW 10 +5VALW 15
9 10 16 15
8 9 17 16
7 8 18 17
6 7 19 18
+3VALW USB_EN 6 +3VALW USB_EN 19
5 <42,58,72> USB_EN
20
4 5 21 20
USB20_P4_L 3 4 USB20_P4_L 22 21
USB20_N4_L 2 3 USB20_N4_L 23 22
1 2 24 23
1 25 24
<17> USB3_PRX_DTX_N4 25
CONN@ 26
<17> USB3_PRX_DTX_P4 26
CVILU_CF35242D0RD-NH 27
28 27
<17> USB3_PTX_DRX_N4 28
<17> USB3_PTX_DRX_P4
29
30 29
30
31
GND_1 32
GND_2
ELCO_046809630310846+
CONN@
SP010028T00
2 2
3 3
4 4

IO/XBOX DB
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
Turbo Key Clips SCREW

+3VALW CLIP1 CLIP2 CLIP3 @ H2 @ H3 @ H4 @ H5 @ H6 @ H7 @ H17 @ H20
EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P H_3P0 H_3P0 H_3P0 H_3P0 H_4P0 H_4P0 H_2P5N H_3P0X2P5N
1
RF26
1
10K_0402_5% JTURBO1
1
1 1
2 1
2
3 2 5 @ H8 @ H9 @ H14 @ H15 @ H16
<58> TURBO_EN# 3 G1
4 6 H_4P0 H_4P0 H_3P8 H_3P8 H_3P8
4 G2 CLIP4 CLIP5 CLIP6 FD1 FD2
ACES_51575-00401-001 EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
CONN@
1
@ @
1
1
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80
FD3 FD4
CLIP7
EMIST_SUL-12A2M_1P
CLIP8
EMIST_SUL-12A2M_1P
CLIP9
EMIST_SUL-12A2M_1P
STAND OFF @ @
1
@ H10 @ H11 @ H12 @ H13 @ H18 @ H19
SP01002LG00 H_3P3 H_3P3 H_3P3 H_3P3 H_3P2 H_3P2 FIDUCIAL_C40M80 FIDUCIAL_C40M80
1
CPU FAN Conn GPU FAN Conn
+5VS +5VS
Raptor
PCB P/N
1 @ 2 +VCC_FAN1 1 @ 2 +VCC_FAN2
2
RF21 0_0805_5% RF18 0_0805_5% Raptor 2
CF15
4.7U_0402_6.3V6M
+3VS 1 2 CF17
4.7U_0402_6.3V6M
@ CF18 +3VS 1 2
1
1000P_0402_50V7K
RF17 1 2 @ CF19
1
10K_0402_5% 1000P_0402_50V7K
RF22 1 2
JFAN1 10K_0402_5%
2
+VCC_FAN1 1
2 1 40mil
JFAN2
<58> FAN_SPEED1
2
FAN_PWM1 3 2 +VCC_FAN2 1
<58> FAN_PWM1 4 3 2 1
1 4 <58> FAN_SPEED2 FAN_PWM2 2
CF14 3
<58> FAN_PWM2 3
1000P_0402_50V7K 5 1 4
XEMC@ 6 GND CF16 4
2 GND 1000P_0402_50V7K 5
CVILU_CI4204M2HR0-NH XEMC@ 6 GND
CONN@ 2 GND
SP020012X00 CVILU_CI4204M2HR0-NH
CONN@
SP020012X00
3 3
Reset Circuit
ON/OFF BTN
+3VLP 1 @ 2
MAINPWON <58,82,84>
R2786 0_0402_5%
1 @ 2
EC_RST# <58>
2
R2787 0_0402_5%
R17 R2785
+3VLP 100K_0402_5% 10K_0402_5% BI_GATE PH to +RTCVCC at PWR
2 1
side
1
Q42A D
ON/OFFBTN# BI_GATE# 2
<58,63> ON/OFFBTN#
G
Reset Button
2N7002KDW_SOT363-6
S @ SW6
1
@ SW1 BI_GATE 1 2 BI_GATE

1
Test Only EVQPLDA15_4P
3
1 3 Q42B D C856
BI_GATE 5 0.1U_0201_10V6K
BOT 2 4 <82> BI_GATE G 2 3 4
2N7002KDW_SOT363-6
S
6
5
SKRPABE010_4P
SN10000CV00
4 4

PWRBTN/PCB PN//SCREW/FAN
A B C D E
A B C D E
System DC inferface For Power ON/Off Sequence

@
CQ2 1 2 0.1U_0201_10V6K UQ1 @ JPQ2 PM_SLP_S3
1 14 +5VS_OUT 1 2 +3VALW
+5VALW VIN1 VOUT1 1 2 +5VS
2
2 13
G
VIN1 VOUT1
1
JUMP_43X118
SUSP# RQ1 1 @ 2 0_0402_5% 5VS_ON 3 12 1 2 R37 Q10A
ON1 CT1 CQ1 1000P_0402_50V7K 100K_0402_5% 2N7002KDW_SOT363-6
4 11 1 6
S
+5VALW VBIAS GND EC_VCCST_PG_R <10,58>
D
1 1
2
RQ2 2 @ 1 0_0402_5% 3VS_ON 5 10 1 2 MOW14, For tCPU28 200us(max)
ON2 CT2 CQ3 1000P_0402_50V7K SLP_S3# to VCCST_PWRGD deassertion
5
@ 6 9 @ JPQ1
G
+3VALW VIN2 VOUT2 +3VS_OUT 1
CQ4 1 2 0.1U_0201_10V6K 7 8 2
VIN2 VOUT2 1 2 +3VS
Q10B
15 JUMP_43X118 2N7002KDW_SOT363-6
GPAD Q11A 4 3
S
VR_ON <58,88,89>
D
EM5209VF_DFN14_2X3 2N7002KDW_SOT363-6 D
+3VALW +5VALW +3VS_OUT +5VS_OUT 2 MOW14, For tPLT17 200us(max)
<18,58> PM_SLP_S3# G SLP_S3# to IMVP VR_ON deassertion
5
G
2 2 2 2
S
1
CQ7 CQ8 CQ5 CQ6 Q11B
1U_0201_6.3V6M 1U_0201_6.3V6M 0.1U_0201_10V6K 0.1U_0201_10V6K 2N7002KDW_SOT363-6
1 1 1 1 4 3 SUSP#
D
MOW14, For tPLT18 200us(max)
SLP_S3# to VCCIO VR disable
2
Place CQ7 close UQ1 pin 1&2
G
@
Place CQ8 close UQ1 pin 6&7 Q12A
2N7002KDW_SOT363-6
1 6
S
SYS_PWROK <18,58>
D
5
G
+3VALW @
+5VALW +0.6VS_VTT +5VALW +1.2V_VDDQ Q12B
2N7002KDW_SOT363-6
1
4 3
S
PCH_PWROK <18,58>
2
D
R38
2
@ R27 R2765 R30 R29 100K_0402_5%
100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5%
@ @ @
2
2 PM_SLP_S4 2
1
1
discharge Q13A
5
SUSP discharge SYSON# 2N7002KDW_SOT363-6 D
G
trace 20 mils 2
trace 20 mils <18,58> PM_SLP_S4# G Q13B
2N7002KDW_SOT363-6
6
Q7A D D Q7B S 4 3 SYSON
S
1
3
D
2 5 SUSP Q8B D D Q8A MOW14, For tPLT15 200us(max)
<39,58,68,83,85,87,88> SUSP# 5 2
G G
<58,85,87> SYSON
SYSON SYSON# SLP_S4# to VDDQ ramp down
@ @ G G
2N7002KDW_SOT363-6 S S 2N7002KDW_SOT363-6
1
4
1
2N7002KDW_SOT363-6 S S 2N7002KDW_SOT363-6
1
R32 @ @
10K_0402_5% P/N: SB00000EO00 footprint use SB00000ZU00
@
2
+1.05VALW TO +1.05V_VCCST /+1.8VALW TO +1.8VS +1.05VALW TO +1.05VS_VCCSTG

+1.05VALW
@ +1.8VS
2
CQ15 1 2 0.1U_0201_10V6K UQ2
3 1 14 +1.8VS_OUT RQ9 1 @ 2 0_0603_5% CQ12 3
+1.8VALW VIN1 VOUT1
2 13 1U_0201_6.3V6M
VIN1 VOUT1 1 UC4
SUSP# RQ4 1 @ 2 0_0402_5% EN_+1.8VS 3 12 1 2 1
ON1 CT1 CQ14 1000P_0402_50V7K +5VALW 2 VIN1 +1.05VS_VCCSTG
4 11 VIN2
+5VALW VBIAS GND +1.05VS_VCCSTG_OUT
7 6 RQ61 @ 2 0_0603_5%
SYSON RQ8 1 @ 2 0_0402_5% EN_1.0V_VCCSTU 5 10 1 2 +1.05V_VCCST VIN thermal VOUT
ON2 CT2 CQ16 1000P_0402_50V7K 3
+1.05V_VCCST_OUT RQ5 1 VBIAS 2
+1.05VALW
6 9 @ 2 0_0603_5%
@ 7 VIN2 VOUT2 8 SUSP# RQ3 2 @ 1 0_0402_5% EN_1.0V_VCCSTG 4 5 CQ10
CQ20 1 2 0.1U_0201_10V6K VIN2 VOUT2 ON GND
0.1U_0201_10V6K
15 1
GPAD 1
@
EM5209VF_DFN14_2X3 CQ13 AOZ1334DI-01_DFN8-7_3X3
0.1U_0201_10V6K
2
+1.0VS_VCCSTG: 60mA
R ON = 4.4m ohm
VDROP= 11mV
Delay time: 9.3us
+1.8VALW +1.05V_VCCST_OUT +1.8VS_OUT

+1.05VALW
2 2 2
2
CQ11 CQ9 CQ22
1U_0201_6.3V6M CQ24 0.1U_0201_10V6K 0.1U_0201_10V6K
1 1 1
1U_0201_6.3V6M
1
4 4


DC INTERFACE
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
1 1
2 2
Reserve Page
3 3
4 4

Reserve Page
A B C D E
A B C D E
@
1
ACES_50290-00801-001
+19V_ADPIN FBMA-L11-201209-800LMA50T
EMI@ PL101 +19V_VIN 1
1 1 2
1 2 EMI@ PL102
2
EMI@ PC104
3
1000P_0402_50V7K
FBMA-L11-201209-800LMA50T
3
1
4
EMI@ PC102
PR103
100P_0402_50V8J
4 5 1 2 PR102
5
1
6 4.7_1206_5% EMI@ PL103
6
1
7 FBMA-L11-201209-800LMA50T 4.7_1206_5%
2
7 8
2
8 1 2
2
1
PJP101
1
PC101 EMI@ EMI@ PC105
99.9
0.1U_0603_25V7K Bead SM01000U600 0.1U_0603_25V7K
2
2 2
3 3
@ PR101
0_0402_5%
1 2
+3VLP +CHGRTC
4 4

DCIN
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. DH53F M/B LA-F991P
A B C D E
A B C D E
+3VLP
1
1 1
PC205 @
1
0.1U_0603_25V7K
2
@
PR207 100_0402_1% @ PR215 PR214
100K_0402_1%
1 2 26.7K_0402_1% 21.5K_0402_1%
EC_SMB_DA1 <58,83>
PR213
PR205 100_0402_1%
2
1
1 2
EC_SMB_CK1 <58,83>
PU201 @
1 8
VCC TMSNS1
(Common Part)
PR202 2 7 2 1
Battery Bot Side <45,47> SL200002H00
2
200K_0402_1% GND RHYST1
@
1
1 2 MAINPWON 3 6 @ PR216
+3VLP <58,77,84> MAINPWON OT1 TMSNS2
100K_0402_1%_NCP15WF104F03RC
@ PJP201 10K_0402_1% @
PIN1 GND 1 4 5 2 1
1 2 OT2 RHYST2
PIN2 GND 2 3
1 2
BATT_TEMP <58,83>
1
EC_SMB_DA1-1
PH202
G718TM1U_SOT23-8 @ PR218
PIN3 SMD
2
3 4 EC_SMB_CK1-1 PR203 1K_0402_1% 14K_0402_1%
4 5 BATT_TS
100K_0402_1%_NCP15WF104F03RC
PIN4 SMC 5 6 BATT_B/I
6 7
PIN5 TEMP
PH203
(Common Part)
2
7 8
PIN6 BI 8 9 +RTCVCC SL200002H00
GND 10
PIN7 Batt+ GND
PIN8 Batt+ PH3 Near VGA. @
CVILU_CI9908M2HR0-NH
1
PR212
100K_0402_5%
1
2 D 2
2 PQ201
<77> BI_GATE G LBSS139LT1G 1N SOT-23-3
S
3
+12.6V_BATT+
EMI@ PL201
FBMA-L11-201209-800LMA50T
1 2 BI_S
+12.6V_BATT
EMI@ PL202 When PR204=18.7K
1
FBMA-L11-201209-800LMA50T
1 2 @ PR217 For KB9022
0_0402_5% OTP Active Recovery
2
VCIN0_PH(V) 89'C, 1V 56'C, 2V
1
PC201 EMI@ PC202 EMI@
1000P_0402_50V7K 0.01U_0402_50V7K
2
PH202(ohm) 8.0524K 26.11K
+3VLP_ECA
PR206
10K_0402_1%
1 2
ADP_I <58,83>
1
3 3
PR204
18.7K_0402_1%
VCIN1_ADP_PROCHOT <58>
2
VCIN0_PH <58>
1
PC203 must close to EC pin
1
PR208
10K_0402_1% PH201
2
@ PC203
100K_0402_1%_NCP15WF104F03RC
2
0.1U_0402_25V6
1
T202@ PH201 is Common Part SL200002H00
T201@
ECAGND<58,66>
T202 T201 must close to PH201
ADP_I=20*I(adapter)*0.01
4
I(adapter)=adapter(W)*130%/19 4
2016/11/03
Compal Secret Data
2017/06/14 Title
BATTERY CONN/OTP
A B C D E
5 4 3 2 1
Protection for reverse input
Vgs = 20V
Vds = 60V PQB3
Id = 250mA L2N7002WT1G_SC70-3
1
D
D D
2
G max Power loss 0.22W for 90W;0.12W for 65W system;0.05W for 45W
S CSR rating: 1W
3
+19VB
1 2 1 2 VCSIP-VCSIN spec < 81mV
PRB1 PRB2
1M_0402_1% 3M_0402_5%
PQB11 EMP21N03HC_N_DFN56-8-5 PQB12

+19V_P1 AON7380_DFN3X3-8-5
Need check the SOA for inrush 5 1 PRB4
2 1 +19V_P2 0.005_1206_1% EMI@ PLB11 +19VB_CHG
3 2 FBMA-L11-201209-800LMA50T
3 5 1 4 1 2
+19V_VIN
EMI@
EMI@
EMI@
2200P_0402_50V7K
4
2 3 Isat: 10A
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
0.1U_0402_25V6
CSIP_CHG_R
DCR: 14mohm
1
CSIN_CHG_R
PCB2
PCB3
PCB4
PCB6
PCB5
2
2
1 2
@ PCB1
1000P_0402_50V7K
1
1_0402_5%
2_0402_5%
1
PRB5
PRB6
1
PRB7
2
499K_0402_1%
2
PCB7
PQB13
2
4.02K_0402_1%
4.02K_0402_1%
0.033U_0402_25V7K
1 2 AON7380_DFN3X3-8-5
0.1U_0402_25V6
PCB25
1
1
0.1U_0402_25V6
PCB24
L->H 2
2.04 vin min w/o 2M =17.41 5 3
@
2
C H->L PRB10 C
PCB9 0.22U_0603_25V7K
2.02 vin min w 2M =17.77 100_0402_1%
4
PRB8
PRB9
0.022U_0402_25V,SE075223K80 1 2 +12.6V_BATT
1
CMSRC_CHG
2200P_0402_50V7K
66.5K_0402_1%
@ PCB10
1
PRB11
PCB8
1
ASGATE_CHG 1 2
2
BGATE_CHG
2
OPCN_CHG 2
0.1U_0402_25V7K
CSIN_CHG
CSIP_CHG
OPCP_CHG
VBAT_CHG
PDB2
1 VDD_CHG
5
30MA_30V_0.5UA_0.4V_SOD323-2
PQB1
1 2 VDDP_CHG
AON7506_DFN3X3-8-5
100K_0402_1%
support Turbo boost : 2200P Support max charge 3.5A
32
31
30
29
28
27
26
25
no support Turbo boost : 0.1u PUB1 4 Choke 4.7uH SH00000YC00 (Common Part) Power loss: 0.245W
PRB12
CSIP
ASGATE
QPCP
BGATE
CSIN
CMSRC
OPCN
VBAT
PRB13 PCB11 (Size:6.6 x 7.3 x 3 mm) CSR rating: 1W
0_0603_5% 0.22U_0603_25V7K (DCR:28m~33m) VCSPP-VCSON spec < 81mV
ACIN_CHG 1 24 BST_CHG 1 2 BST_CHG_R1 2
2
3
2
1
ACIN BOOT PRB16
2 23 UG_CHG PLB1 0.01_1206_1%
<58> AC_IN @0@ PRB14 0_0402_5% ACOK UGATE 4.7UH_PCMB063T-4R7MS_8A_20% +12.6V_BATT
1
EC_SMB_DA1_R 3 LX_CHG +17.4V_BATT_CHG 1

158K_0402_1%
1 2 22 1 2 4
<58,82> EC_SMB_DA1 SDA PHASE
PRB15
@0@ PRB17 0_0402_5%

EC_SMB_CK1_R 4 LG_CHG
4.7_1206_5%
1 2 21 2 3
<58,82> EC_SMB_CK1 SCL LGATE
EMI@ PRB19
@0@ PRB18 0_0402_5%
1 2 5 20 VDDP_CHG
2
PROCHOT# VDDP
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
<10,58> H_PROCHOT#
1
2 1K_0402_1%AMON_ISL95520 6 VDD_CHG
PCB12
PCB13
PCB14
PCB26
PRB201 19 1 2
<58,82> ADP_I AMON VDD
2
PRB221 2 1K_0402_1%BMON_ISL95520 7 ISL88739AHRZ-T_QFN32_4X4 18 PRB21 4.7_0402_5%
2
BMON DCIN
680P_0402_50V7K
@
BATGONE
Close to EC. 8 17 PCB15
NC CCLIM NTC 1U_0402_6.3V6K 4
2
ACLIM
COMP
1
PROG
B B
AGND
CSON
CSOP
EMI@ PCB17
FSET
PRB24 PCB16
1
100K_0402_1% 1U_0402_6.3V6K
1
PCB18 PCB19 @0@
2
0.1U_0402_25V6 0.1U_0402_25V6 PRB23 PDB1
33
10
11
12
13
14
15
16
3
2
1
Follow adapter and 0_0402_5% PRB25 10_1206_5% 3
+19V_VIN
2
battery wattage in 1 2 1 PQB2
2
Close to Vsys current source. 2 EMB12N03V_N_DFN33-8-5
2
2
FSET_CHG
EC.
PCB20
1U_0603_25V6
Base on CPU Core VR design. VF = 0.38V For 4S per cell 4.35V battery
The resistor is pop on CPU VR schematic. S SCH DIO BAS40CW SOT-323
1
1
PRB27
10K_0402_1% ACIN_CHG
VDD_CHG
VDD=5V
Iaclimhw=Vaclimhw/(32xRS1) @0@ PRB26
2
0_0603_5%
1
CCLIM_CHG 1 2
+12.6V_BATT
200K_0402_1%
4S_BATT@ PRB28
1
ACLIM_CHG 2M_0402_1%
PRB29
PRB30
PROG_CHG CSOP_CHG 1 2 CSOP_CHG_R
200K_0402_1%
2
+3VS Pull high on HW side COMP_CHG PRB31 2_0402_5%
2
1
@ PRB32 PR333=0 ohm, Fs=500KHZ ~ +/- 15% PCB21 4S_BATT@ PQB4
1
1
0.033U_0402_16V7K 100_0402_1%
76.8K_0402_1% 0.1U_0402_25V6
2
PRB33
1 2 LTC015EUBFS8TL_UMT3F
1
CSON_CHG CSON_CHG_R
150K_0402_1%
560P_0402_50V7K
@0@ 1 2
1
1
PRB37
@VGA@ @VGA@ OCCP setting PRB34
1
300K_0402_1%
PRB41 180W@
PCB22
PRB35 PRB36 @ PQB7 0_0402_5% @0@ PRB38 0_0402_5%

2
2
1
D
110K_0402_1%
10K_0402_1% 10K_0402_1%
2
1
AC_IN
PRB39
2 4S_BATT@ PRB40
2
G @ BATT_TEMP <58,82> 100K_0402_1%

2
1
PCB23
S 1 2 2
3
<58> BATT_4S
L2N7002WT1G_SC70-3 BATGONE(BATT_TEMP)
2
<19,25,58> DGPU_AC_DETECT logic high: above 2.4V

2
logic low: under 0.8V

Hybrid boost power mode 4S_BATT@
3
1
Cell = 4s PQB8 D
6
D 2
2 <39,58,68,78,85,87,88> SUSP# G
A A
G
@VGA@ @VGA@ @VGA@ 2N7002KW_SOT323-3 S
3
PQB6 PQB5B S PQB5A
1
1
RUM001L02_VMT3 2N7002KDW_SOT363-6 2N7002KDW_SOT363-6

3
D
H_PROCHOT# 2 AC_IN 5 PRB41=110K,(ACLIM=(5*110/310)/32*0.005=11.09A).
G PRB39=300K,(CCLIM=(5*300/500)/32*0.01=9.375A).
S
4

3
(Rs1 = 10mΩ and Rs2 = 5mΩ or Rs1 = 20mΩ and Rs2 = 10mΩ) .
CC_LIM = VccLIM / 64 x Rs2 Issued Date 2014/11/05 2014/12/15 Title
=============================================================
Deciphered Date
PWR_CHARGER
(Rs1 = 10mΩ and Rs2 = 10mΩ or Rs1 = 20mΩ and Rs2 = 20mΩ) . THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CC_LIM = VccLIM / 32 x Rs2
============================================================= MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AC_LIM = Vac_LIM / 32 x Rs1 Date: Wednesday, February 13, 2019 Sheet 83 of 100
5 4 3 2 1
A B C D E
EMI@ PL311
FBMA-L11-201209-800LMA50T
1 2 PU301
+19VB SY8288BRAC_QFN20_3X3 @0@ PR303 PC301
0_0603_5% 0.1U_0603_25V7K
+19VB_3V BST_3V 1 2 1 2
2200P_0402_50V7K
Choke 2.2uH SH00000YV00 (Common Part)
EMI@ PC302
PC303
EMI@ PC304
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
0.1U_0402_25V6
(Size:7.2 x 6.7 x 3 mm)
1
@ PC305
PC306
PL301 (DCR:14m~16m Ohm)
BS
IN
IN
IN
IN
2.2UH_7.8A_20%_7X7X3_M
2
LX_3V6 20 LX_3V 1 2
@EMI@
LX LX +3VALWP
1 7 19 1
GND LX
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
8 18
PR301 +3VALWP GND GND @EMI@
@ PC307
PC308
PC309
@ PC310
PC311
PC312
499K_0402_1% 9 17 PR304
+3VLP
2
ENLDO_3V5V 1 2 PG LDO 4.7_1206_5%
+19VB
13V_SN
10 16
2
1
1
NC NC
150K_0402_1%
PC313
OUT
EN2
EN1
21
PR302
4.7U_0402_6.3V6M
NC
FF
2
PR305 GND @EMI@
100K_0402_5% PC314
11
12
13
14
15
680P_0402_50V7K
2
2
3.3V LDO 150mA~300mA
SPOK_3V
<58,87> SPOK_3V Iocp=10A
ENLDO_3V5V PC315 PR306
1000P_0402_50V7K 1K_0402_5%
3V_FB 1 2 1 2
EN1 and EN2 dont't floating <58> 3V_EN
@ PJ302
+3VALWP 1 2 +3VALW
1 2
keep short pad, JUMP_43X118
EMI@ PL511 snubber is for EMI only.
FBMA-L11-201209-800LMA50T
1 2
+19VB @0@ PR501 5V10A@ PC501
0_0402_5% 0.1U_0603_25V7K
+19VB_5V BST_5V 1 2 BST_5V_R 1 2
2
Choke 1.5uH SH000016700 (common part) 2
2200P_0402_50V7K
0.1U_0402_25V6
0.1U_0402_25V6
5V10A@ PU501
(Size:6.8 x 6.47 x 3 mm)
13
(DCR:14m~15m Ohm)
1
SY8270CTMC_QFN13_4X3
10U_0603_25V6M
10U_0603_25V6M
1
1
@EMI@ PC517
PC502
PC503
EMI@ PC504
@EMI@ PC505
BS
IN
PL501
1.5UH_9A_20%_7X7X3_M
2
2
LX_5V 2 12
LX LX LX_5V 1 2 +5VALWP
3 11
GND GND
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
+3VLP
1
1
VCC_5V
PR502
PC507
PC508
PC509
PC510
PC511
PC512
4 10 1 2
4.7_1206_5%
PG VCC
@EMI@
2
1
OUT
LDO
EN2
EN1
5V10A@ PC506 @
FF
PR503 2.2U_0402_6.3V6M
2
100K_0402_5%
9
2
15V_SN
680P_0402_50V7K
<58> SPOK_5V +5VLP
ENLDO_3V5V
@EMI@
5V10A@ PC514
PC513
5V LDO 150mA~300mA Iocp=12A
4.7U_0402_6.3V6M
2
1
EN1 and EN2 dont't be floating.
EN :H>0.8V ; L<0.4V 5V_3V_EN
2
Fsw : 600K Hz
3 5V10A@ PC515 5V10A@ PR506 @ PJ502 3

1000P_0402_50V7K 1K_0402_1% +5VALWP 1 2 +5VALW
5V_FB 1 2 5V_FB_1 1 2 1 2
JUMP_43X118
@0@ PR509 5V8A@ PC521

0_0402_5% 0.1U_0603_25V7K
+19VB_5V BST_5V_8A 1 2 BST_5V_8A_R 1 2
PR504
2.2K_0402_5%
5V8A@ PU502 1 2
<58> EC_ON
5
SY8288CRAC_QFN20_3X3 @0@ PR505

0_0402_5%
BS
IN
IN
IN
IN
1 2
LX_5V 6
LX LX
20 LX_5V <58,77,82> MAINPWON
7 19
GND LX
8 18 5V_3V_EN
GND GND
SPOK_5V VCC_5V_8A
1M_0402_1%
9 17 1 2
1
PG VCC
1
10 16
PR507
NC NC 5V8A@ PC518 PC516
OUT
LDO
EN2
EN1
21 2.2U_0402_6.3V6M 4.7U_0402_6.3V6M
FF
2
GND
2
11
12
13
14
15
+5VLP_5V_8A
4 4
4.7U_0402_6.3V6M
5V8A@ PC519
1
ENLDO_3V5V
5V_3V_EN
2
+5VALWP
5V_8A_FB 1 2 5V_8A_FB_1 1 2
+3VALW/+5VALW
5V8A@ PC520 5V8A@ PR508 Custom 0.1
1000P_0402_50V7K 1K_0402_1%
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. DH5AV_JV_0V_LA-G021P
A B C D E
A B C D E
@ PJM1
JUMP_43X79 Pin19 need pull separate from +1.35VP.
1 2
1 2 +19VB_1.2VP If you have +1.35V and +0.675V sequence question, 0.6Volt +/- 5%
you can change from +1.35VP to +1.35VS. TDC 0.7A
1 2 +19VB_1.2VP PRM11 Peak Current 1A
+19VB @EMI@ PLM11 2.2_0603_5%
HCB2012KF-121T50_0805 BST_1.2VP_R 1 2 BST_1.2VP
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
0.1U_0402_25V6
0.1U_0402_25V6
1 +1.2VP 1
1
@EMI@ PCM1
EMI@ PCM2
PCM3
PCM4
EMI@ PCM20
UG_1.2VP +0.6VSP
2
LX_1.2VP
10U_0603_6.3V6M
10U_0603_6.3V6M
5
1
PCM5
1
PCM6
PCM7
0.1U_0603_25V7K
16
17
18
19
20
2
PUM1
2
VLDOIN
PHASE
UGATE
BOOT
VTT
Choke 1uH SH00000YE00 (Common Part) 4 21
PAD
(Size:6.86 x 6.47 x 3 mm) LG_1.2VP 15 1
(DCR:6.2m~7.2m Ohm) PQM1 LGATE VTTGND
EMB20N03V_DFN3X3-8-5 IOCP
1
2
3
14 2
PLM1 PRM1 PGND VTTSNS
1UH_PCMC063T-1R0MN_11A_20% 20K_0402_1%
1 2 LX_1.2VP 1 2 CS_1.2VP 13 3
+1.2VP PCM8 CS RT8207PGQW _W QFN20_3X3 GND
1
1U_0201_6.3V6K
1 2 12 4 VTTREF_1.2VP
VDDP VTTREF
5
@EMI@ PRM2 PRM3
4.7_1206_5% 5.1_0603_5%
VDD_1.2VP
PCM9
1 2 11 5
PCM10
PCM11
PCM12
PCM13
PCM14
+1.2VP
1 2
VDD VDDQ
1
PGOOD
PCM16
1 1 1 1 1 1 +5VALW 2 1
TON
1
2 @EMI@ PCM15 4 PCM17 0.033U_0402_16V7K 2
FB
S5
S3
2
1
680P_0402_50V7K @ PDM1
2
1U_0201_6.3V6K 30MA_30V_0.5UA_0.4V_SOD323-2
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
10
6
2 2 2 2 2 2 PRM4
2.2_0402_1%
1
2
3
FB_1.2VP
PQM2
EN_1.2VP
EMB12N03V_N_DFN33-8-5 PRM5
EN_0.6VSP
6.19K_0402_1%
TON_1.2VP
+5VALW Frequency 1 2 +1.2VP
PRM6
470K_0402_1%
1
+19VB_1.2VP 1 2
Vout=0.75V* (1+Rup/Rdown)
H/S AON7408 Rds(on) :typ:27m Ohm, max:34m Ohm PRM8 @0@ PRM7 =0.75*(1+(6.19/10))
0_0402_5% 10K_0402_1%
Idsm(TA=25)=7.5A, Idsm(TA=70)=5.5A 1 2 =1.214V 1.2%
2
<58,78,87> SYSON
L/S AON7506 Rds(on) :typ:13m Ohm, max:15.8m Ohm
1
Idsm(TA=25)=12A, Idsm(TA=70)=10.5A @ PCM18
Mode Level VTTREF_1.35V +0.675VSP 0.1U_0402_16V7K
=0.75*(1+(8.2/10))
S5 L off off
2
S3 L on
Choke: SH00000YE00
off
Size:7x7x3 (Common Part) =1.365V 1.1%
Rdc=6.7mohm(Typ), 7.4mohm(Max) CYNTEC @0@
S0 H on on
Rdc=Xmohm(Typ), 11mohm(Max) TOKO PRM9
0_0402_5%
Rdc=6.2mohm(Typ), 7.2mohm(Max) Maglayers 1 2
Note: S3 - sleep ; S5 - power off Rdc=8.3mohm(Typ), 10mohm(Max) Tai-Tech <39,58,68,78,83,87,88> SUSP#
Rdc=6.7mohm(Typ), 7.4mohm(Max) Chilisin @ PJM2
3 PRM10 @0@ JUMP_43X118 3
Rdc=6.9± 15% Panasonic 0_0402_5% +1.2VP 1 2 +1.2V_VDDQ
1 2 1 2
Switching Frequency: 530kHz <10> SM_PG_CTRL
Imax=5.67A, Iocp=8.1A
1
@ PCM19 @ PJM3
Iocp=~10A JUMP_43X39
OVP: 110%~120% 0.1U_0402_16V7K
+0.6VSP
1 2
+0.6VS_VTT
2
1 2
VFB=0.607V, Vout=1.214V
4 4

DDR4
A B C D E
A B C D E
Choke 1uH SH00000YE00 (Common Part)

(Size:6.86 x 6.47 x 3 mm)
(DCR:6.2m~7.2m Ohm)
Choke: SH00000YE00 Size:7x7x3 (Common Part)
Rdc=6.7mohm(Typ), 7.4mohm(Max) CYNTEC
Rdc=Xmohm(Typ), 11mohm(Max) TOKO
Rdc=6.2mohm(Typ), 7.2mohm(Max) Maglayers
Rdc=8.3mohm(Typ), 10mohm(Max) Tai-Tech
Rdc=6.7mohm(Typ), 7.4mohm(Max) Chilisin
Rdc=6.9± 15% Panasonic
@EMI@ PL1111 +19VB_1VALW
1 1
HCB2012KF-121T50_0805 EN pin don't floating @EMI@ PR1101 @EMI@ PC1101
1 2 4.7_1206_5% 680P_0402_50V7K @ PJ1101
If have pull down resistor at HW side, pls delete PR702 SNUB_1VALW
+19VB +19VB_1VALW
PU1101 @0@ PR1102
1 2 1 2
+1.05VALWP
JUMP_43X118
1
1 2
2
+1.05VALW
1 2 2 9 PC1106
1 2 IN PG 0_0603_5% 0.1U_0603_25V7K
10U_0603_25V6M
0.1U_0402_25V6
@ PJ1102 3 1 BST_1VALW 1 2 BST_1VALW_R 1 2 PL1101
EMI@ PC1102
0.1U_0603_25V7K
2200P_0402_50V7K
IN BS
1
JUMP_43X79 1UH_11A_20%_7X7X3_M
EMI@ PC1103
@EMI@ PC1104
PC1105
330P_0402_50V7K
LX_1VALW
4
IN LX
6 1 2
+1.05VALWP
220U_B2_4VM_R35M
2
1
5 19
PC1107
1
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
IN LX
1
7 20 +
PC1108
PC1109
PC1110
PC1111
@ PC1116
@ PC1112
15.4K_0402_1%
2
GND LX
1
8 14 FB_1VALW
PR1104
2
GND FB 2
Rup
1
18 17 LDO_3V
1K_0402_1%
GND VCC
PR1110
2
1
EN_1VALW 11 10
EN NC
ILMT_1VALW
PC1113 FB = 0.6V
13 12 2.2U_0402_6.3V6M
2
LDO_3V ILMT NC
15 16
+3VALW BYP NC
1
21
PAD
1
@0@ =0.6*(1+(15.4/20))
PR1103 SY8288RAC_QFN20_3X3 PR1106
Vout=1.062V
1
0_0402_5%
PC1114
Rdown 20K_0402_1%
2
ILMT_1VALW 1U_0201_6.3V6M
2
1
@0@
PR1105
0_0402_5%
2
2 2
PR1107
10K_0402_1%
1 2
8288RAC +1.8_PG <87>
Min @ PR1108
ILMT='0' 8A 10K_0402_1%
ILMT=Floating 12A EN_1VALW 1 2
ILMT='1' 16A +3VALW
1
@ PC1115
PR1109
0.22U_0402_16V7K
2
1M_0402_1%
2
3 3
4 4

1V
A B C D E
A B C D E
PR1809
100K_0402_5%
2 1
+3VALW
Choke 1uH SH00000Z200 (Common Part)
+1.8_PG <86> (Size:5.0 x 4.7 x 3 mm)
(DCR:13m~14m Ohm)
+19VB @ PJ1802 PU1801

1 2 +19VB_1.8VALWP 2 9 @0@ PR1808 PC1810 @EMI@ PR1802 @EMI@ PC1806
1 2 IN PG 0_0603_5% 0.1U_0603_25V7K 4.7_1206_5% 680P_0402_50V7K
3 1 1.8VALWP_BST 1 2 1 2 1 2 1.8VALWP_SNB 1 2
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
JUMP_43X79 IN BS
1
PC1801
PC1802
4 6
EMI@ PC1816
EMI@ PC1815
@EMI@ PC1808
1 IN LX 1
2
5 19 PL1801
IN LX 1UH_6.6A_20%_5X5X3_M
1.8VALWP_LX
7
GND LX
20 1 2
+1.8VALWP
330P_0402_50V7K
8 14 1.8VALWP_FB
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
GND FB
PC1803
1
1
PR1801 @0@ 18 17 1.8VALWP_LDO
(R1)
PC1805
PC1817
0_0402_5% GND VCC
PC1812
PC1813
PC1814
PC1804
1
1
1 2 11 10 PC1809
2
<58,84> SPOK_3V EN NC 2.2U_0402_6.3V6M PR1803
1.8VALWP_ILMT 13 12 20.5K_0402_1% @ @
2
ILMT NC
1
15 16
1K_0402_1%
+3VALW
2
BYP NC
1
PR1805
PR1810
1M_0402_1% @ PC1811 21
PAD
1
0.47U_0402_6.3V6K
2
SY8286RAC_QFN20_3X3 Vout=0.6V* (1+Rup/Rdown)
2
1.8VALWP_LDO PC1807 Vout=0.6V*(1+20.5/10)
2
1U_0201_6.3V6M FB = 0.6V =1.83V (x1.017)
1
@0@ @ PJ1801
PR1807 JUMP_43X79
1
0_0402_5% 1 2
PR1804 +1.8VALWP 1 2 +1.8VALW
2
1.8VALWP_ILMT 10K_0402_1%
(R2)
1
2
@0@ 8286RAC
PR1806
Min Typ Max
0_0402_5%
ILMT='0' 6.5A 7.5A 8.5A
2
ILMT=Floating 9.5A 10.5A 11.5A

ILMT='1' 12.5A 13.5A 14.5A
2 +3VALW 2
+5VALW
2
PJ2501 @ PJ2502
2
JUMP_43X79 JUMP_43X79
1 2
@ +2.5VP 1 2 +2.5V
1
1
1
PC2501
1U_0402_6.3V6K
2
1
PC2502
FB=0.8V
22U_0603_6.3V6M Note:Iload(max)=4A
2
PU2501 G9661MF11U_SO8
PR2501 @0@ 4 5
0_0402_5% VIN_2.5V 3 VDD NC 6
<58,78,85> SYSON 1 2 EN_2.5V 2 VIN VOUT 7 +2.5VP
GND
1 EN ADJ 8
22U_0603_6.3V6M
22U_0603_6.3V6M
0.01U_0402_25V7K
PGOOD GND
1
0.1U_0402_16V7K
1
PR2503
PC2504
9
1
1
PR2502
Rup
PC2503
PC2505
@ PC2506
21.5K_0402_1%
2
1M_0402_5%
2
2
@ FB_2.5V
1
PR2504
10K_0402_1%
Rdown Vout=0.8V* (1+Rup/Rdown)
Vout=0.8V* (1+(21.5/10)) = 2.52V (x1.008)
2
3 3
2s_battery_EMI@ 2s_battery_EMI@
PCT1 PRT1
680P_0603_50V7K 4.7_1206_5%
P-MOS 2 1 2 1
2s_battery@
PQT1
AONR21321_DFN8-5
2s_battery bead@ PLT12 1 2s_battery@ PLT1
2 5 PDT1
5A_Z120_25M_0805_2P 4.7UH_PCME051E-4R7MS_3A_20%
1 2 3 1 2 2 1 +12VSP 1 2
+5VALW +INVPWR_B+_BOOST
SH00000OG00
10U_0603_25V6M
2s_battery@ PCT4
2s_battery bead@ PLT11

SS3P4-M3-84A_SMP2
1
LX_12VSP 5A_Z120_25M_0805_2P
1500P_0402_50V7K
100P_0402_50V8J
4
1
2s_battery@
2s_battery@ PCT3
@2s_battery@ PCT5
1
2s_battery@ PRT2 2s_battery@ 2s_battery@ PCT6 2s_battery@ PRT3 1

2
PCT8
PCT9
PCT7
PCT10
PCT11
100K_0402_1% PCT2 88.7K_0402_1%
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
2200P_0402_50V7K
2
0.022U_0402_25V7K 10U_0603_25V6M
2
2
6
1
1 2
2
LX
LX
1
2s_battery@
2s_battery@
2s_battery@
2
2
2s_battery_EMI@
2s_battery_EMI@
8 2FB_12VSP
2s_battery@ PRT4 Vin FB
10K_0402_1%
9 10 SS_12VSP 1 2
2
FREQ SS
2s_battery@ PCT12
1
@2s_battery@ PRT5 1COMP_12VSP 0.01U_0402_50V7K

COMP
1
0_0402_5% D 2s_battery@ EN_12VSP 3

1 2 2 PQT2 EN 2s_battery@
<39,58,68,78,83,85,88> SUSP#
1
G 2N7002KW_SOT323-3 PRT6
Vout=1.24*(1+88.7/10)=12.2V
GND
GND
PAD
S 2s_battery@ 10K_0402_1%
3
2
1
2s_battery@ PUT1 PRT7

4 2s_battery@ RT9297GQW_WDFN10_3X3 10K_0402_1% 4
11
PCT13 SA00004JV00
2
0.1U_0402_25V7K
1
2s_battery@
PCT14
4700P_0402_25V7K
2

1.5VS/2.5V
A B C D E
5 4 3 2 1
D D
@EMI@ PRH1 @EMI@ PCH1 @ PJH1

4.7_1206_5% 680P_0402_50V7K 1 2
1 2 SNB_+VCCIOP 1 2 +1.0VS_VCCIOP 1 2 +VCCIO
JUMP_43X118
@EMI@ PLH11
HCB2012KF-121T50_0805 Choke: SH00000Z300 (Common Part)
1 2
Rdc=10mohm(Typ), 12mohm(Max) Size:6*5.4*3 Tai-Tech
@ PJH2 PUH1 @0@ 0_0603_5% Rdc=11mohm(Typ), 12mohm(Max) Size:5.3*4.9*3 Maglayers
1 2 +VCCIOP_B+ 2 9 PCH4
+19VB 1 2 IN PG PRH2
0.1U_0603_25V7K
JUMP_43X79 3 1 +VCCIOP_BST 1 2+VCCIOP_BST_R 1 2 PLH1
10U_0603_25V6M
0.1U_0402_25V6
2200P_0402_50V7K
IN BS
1
PCH2 0.68UH_7.9A_20%_5X5X3_M
PCH3
PCH5
+VCCIOP_LX
2
4
IN LX
6 1 2
+1.0VS_VCCIOP
1
5 19
PCH10
330P_0402_50V7K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
IN LX
@EMI@
1
1
1
EMI@
7 20
PCH6
PCH7
PCH8
PCH9
PCH11
PCH12
10_0402_1%
2
GND LX @
PRH3
8 14 +VCCIOP_FB
2
2
2
GND FB
2
@
PRH4
1K_0402_1%
18 17 +VCCIOP_LDO_3V
2
GND VCC
1
+VCCIOP_EN 11 10 PCH13 @
EN NC 2.2U_0402_6.3V6M
1
+VCCIOP_ILMT 13 12 FB = 0.6V Rup
2
ILMT NC 1 2
15 16
+3VALW BYP NC PRH5 =0.6*(1+(12k/20.5k))
1
21 12K_0402_1%
OVP=0.95V*115%=1.0925V
1U_0201_6.3V6M
PAD
PCH14
C C
20.5K_0402_1%
1
SY8286RAC_QFN20_3X3
Vout=0.951 V 2%
Rdown
2
PRH6
Pin 7 BYP is for CS.
Common NB can delete +3VALW and PC15
2
PRH7 @0@ 0_0402_5%
VCCIO_SENSE_R 1 2 VCCIO_SENSE
+VCCIOP_LDO_3V VCCIO_SENSE <12>
PRH8 @0@ 0_0402_5%

1
@0@ PRH9 1 2 VSSIO_SENSE

VSSIO_SENSE <12>
@0@ 0_0402_5%
PRH10 VR_ON 1 2
0_0402_5% <58,78,89> VR_ON
2
+VCCIOP_ILMT PRH11
1K_0402_5%
1
SUSP# 1 2 +VCCIOP_EN
@0@ <39,58,68,78,83,85,87> SUSP#
PRH12
0.1U_0402_25V6
1M_0402_5%
1
1
PCH15
check delay time with HW
PRH13
0_0402_5%
2
2
2
8286RAC
Min Typ Max
ILMT='0' 6.5A 7.5A 8.5A
ILMT=Floating 9.5A 10.5A 11.5A
ILMT='1' 12.5A 13.5A 14.5A
B B
A A

DH53F M/B LA-F991P
C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1.0VS_VCCIO
5 4 3 2 1
1 2 3 4 5
Place close to Choke in VCCSA first phase circuit

PHZ1 PRZ1 PRZ2
100K_0402_1%_TSM0B104F4251RZ 12K_0402_1% 7.5K_0603_1%
PCZ1 1 2 1 2 1 2
PRZ3 100_0402_1% 2200P_0402_50V7K
<91> CSN_1PH SW_1PH <91> +1.05V_VCCST
1
1 2 1 2 PCZ2
100_0402_1%
1
2
PRZ4 0.01U_0402_50V7K
499_0402_1%
45.3_0402_1%
45.3_0402_1%
PRZ9 @0@ PRZ10 10_0402_1% 1 2 PCZ3
PRZ5
PRZ6
PRZ7
PRZ8
A 0_0402_5% 1K_0402_5% A
0.1U_0402_25V6
1
1 2 1 2 VSN_1PH
<12> VSSSA_SENSE
2
@
2
2
2 1 1 2 @
PCZ4
CSP_1PH
1000P_0402_50V7K PRZ12 PCZ5 PCZ6 PRZ13
470P_0402_50V8J
1
1.62K_0402_1% 3300P_0402_50V7-K 2200P_0402_50V7K 100_0402_1%
1
1 2 1 2 VSP_1PH CSN_1PH_R 81215_VR_HOT
1 2
PCZ7
31.6K_0402_1%
<12> VCCSA_SENSE +3VS VR_HOT# <58>
PRZ14
PRZ11 @0@ PCZ8
2
PRZ15 100_0402_1% 0_0402_5% 1 2 1000P_0402_50V7K 81215_SCLK 1 2
CPU_SVID_CLK <10>
1 2 1 2 PRZ16 49.9_0402_1%
IMON_1PH
+VCC_SA PWM1_1PH/ICCMAX1 <91>
1
PCZ9
1000P_0402_50V7K PRZ19 81215_ALERT 1 2
CPU_SVID_ALERT#_R <10>
12.4K_0402_1% PRZ17 @0@ PRZ18 0_0402_5%
2 1 10K_0402_1% PRZ23
PRZ21 100_0402_1% 34.8K_0402_1% 81215_SDIO 1 2
<58> VCCCORE_VR_PWRGD CPU_SVID_DAT <10>
2
1 2 PRZ22 PCZ10 PRZ20 10_0402_1%
+VCC_CORE 1.5K_0402_1% 0.01U_0402_25V7K 1 2
PRZ24 @0@ 2 1 2 1 CPU_EN
0_0402_5% 81215_SCLK
1 2 VSP_4PH 81215_ALERT 1 2
<11> VCCSENSE 81215_SDIO VR_ON <58,78,88>
1 2
2
PRZ25 @0@
PCZ12 PCZ11 0_0402_5% PRZ26 100_0402_1%
1000P_0402_50V7K PRZ28 15P_0402_50V8J 1 2 +VCC_GT
1
1K_0402_1%
1 2 1 2 VSN_4PH VSN_1PH PRZ30 @0@
<11> VSSSENSE
0_0402_5%
ILIM_1PH
COMP_1PH
PRZ27 @0@ 1 2
VSP_1PH VCCGT_SENSE <11>
PRZ29 100_0402_1% 0_0402_5% 1 2
1 2
1
PCZ13 H62@ PRZ35 PCZ14
2200P_0402_50V7K 27.4K_0402_1% PRZ31 1000P_0402_50V7K
1.37K_0402_1%
2
1 2 1 2 VSSGT_SENSE <11>
PRZ32 @0@
PUZ1 1 2 0_0402_5% PRZ33 100_0402_1%
PCZ16 PRZ34 PCZ17 1 2
53
52
51
50
49
48
47
46
45
44
43
42
41
40
NCP81215MNTXG_QFN52_6X6
15P_0402_50V8J 49.9_0402_1% 470P_0402_50V8J PCZ15
1 2 1 2 1 2 H82@ PRZ35 2200P_0402_50V7K
TAB
VR_RDY
SCLK
ALERT#
SDIO
VSP_1PH
VSN_1PH
COMP_1PH
ILIM_1PH
CSN_1PH
CSP_1PH
IMON_1PH
PWM_1PH/ICCMAX_1PH
EN
B B
24.9K_0402_1%
PRZ36 PRZ37 2 1 PRZ38 PCZ19 PCZ20
3.65K_0402_1% 1K_0402_1% PRZ39 49.9_0402_1% 470P_0402_50V8J 15P_0402_50V8J
1 2 1 2 1 2 29.4K_0402_1% 1 2 1 2 1 2
PCZ21 VSP_4PH 1 39 81215_VR_HOT 1 2
PCZ18 470P_0402_50V8J VSN_4PH 2 VSP_4PH VRHOT# 38 VSP_2PH PCZ23 2 1 1 2 1 2
2200P_0402_50V7K 2 1 3 VSN_4PH VSP_2PH 37 VSN_2PH 470P_0402_50V8J
DIFFOUT_4PH 4 IMON_4PH VSN_2PH 36 1 2 PRZ40 PRZ41 PCZ22
FB_4PH 5 DIFFOUT_4PH IMON_2PH 35 DIFFOUT_2PH 1K_0402_1% 3.65K_0402_1% 2200P_0402_50V7K
COMP_4PH 6 FB_4PH DIFFOUT_2PH 34 FB_2PH
1 2 ILIM_4PH 7 COMP_4PH FB_2PH 33 COMP_2PH
Place close to Choke in VCORE CSCOMP_4PH ILIM_4PH COMP_2PH ILIM_2PH
PRZ42 30.1K_0402_1% 8 32 1 2
first phase circuit CSCOMP_4PH ILIM_2PH
1
CSSUM_4PH 9 31 PRZ43 12K_0402_1% CSCOMP_2PH

75K_0402_1%
CSSUM_4PH CSCOMP_2PH
1
PHZ2 10 30 CSSUM_2PH
75K_0402_1%
PRZ44
470P_0402_50V8J
470P_0402_50V8J
CSP1_4PH 11 CSREF_4PH CSSUM_2PH 29 PHZ3
PRZ45
680P_0402_50V7K
100P_0402_50V8J
CSP1_4PH CSREF_2PH
1
CSP2_4PH CSP1_2PH
PWM1_4PH/ICCMAX_4PH
PWM1_2PH/ICCMAX_2PH
220K_0402_5%_ERTJ0EV224J 12 28 220K_0402_5%_ERTJ0EV224J
PCZ25
PWM4_4PH/ROSC_MPH
CSP2_4PH CSP1_2PH
2
1
CSP3_4PH
PWM2_2PH/ROSC_1PH
PCZ26 13 27 2 1 Place close to Choke in VCCGT first phase circuit
PCZ24
PCZ27
PCZ28
+5VALW
2
1 2
CSP3_4PH CSP2_2PH
TTSENSE_1PH/PSYS
PRZ47
165K_0402_1%
1 2
2
PWM3_4PH/VBOOT
1
90.9K_0603_1% 0.1U_0402_25V7K PRZ46
PWM2_4PH/ADDR
1
2
1 2 1K_0402_1% PCZ29
PRZ48
<89,90> SW1_4PH
TTSENSE_2PH
PRZ50 0.1U_0402_25V7K @ PRZ49
TSENSE_4PH
2
90.9K_0603_1% 274K_0402_1% PRZ51
CSP4_4PH
1 2 100K_0603_1%
<89,90> SW2_4PH
2
PRZ52 1 2
SW1_2PH <89,91>
2
DRON
VRMP
90.9K_0603_1%
VCC
1 2 2 1
<89,90> SW3_4PH
PRZ54 +5VALW
90.9K_0603_1% PRZ55 @ PRZ53
14
15
16
17
18
19
20
21
22
23
24
25
26
1 2 1K_0402_1% 1K_0402_1%
<89,90> SW4_4PH
1 2 PCZ30
+19VB_CPU 0.1U_0402_25V6 CSP4_4PH
CSREF_4PH PCZ31 2 1 TSENSE_4PH PCZ32
<90> CSREF_4PH
0.01U_0402_50V7K 0.1U_0402_25V6 PRZ57
1 2 TSENSE_2PH 1 2 24.9K_0402_1% CSREF_2PH
CSREF_2PH <91>
1 2 1 2
1U_0402_6.3V6K
<90,91> DRVON
PRZ59 +5VALW PRZ56 PWM2_2PH/ROSC1 1 2
1
2.15K_0402_1% 2.2_0603_5% PRZ58

PCZ33
1 2 CSP1_4PH 25.5K_0402_1%
110K_0402_1%
<89,90> SW1_4PH
1
H82@ PRZ61
2
2
4.32K_0402_1%
24.9K_0402_1%
97.6K_0402_1%
97.6K_0402_1%
PWM1_2PH/ICCMAX2 <91>
1
C PCZ34 @ PRZ60 C
PRZ66
PRZ62
PRZ63
PRZ64
PRZ65
0.1U_0402_25V6 100K_0402_1%
1
2.15K_0402_1%
2
CSREF_4PH CSP1_2PH 1 2
<90> PWM1_4PH/ICCMAX4 SW1_2PH <89,91>
1
PRZ67
2
2.15K_0402_1%
1 2 CSP2_4PH PCZ35
<89,90> SW2_4PH
H62@ PRZ61 0.1U_0402_25V6
1
2
102K_0402_1%
PCZ36 @ PRZ68 CSREF_2PH
0.1U_0402_25V6 100K_0402_1%
1
CSREF_4PH <90> PWM2_4PH/ADDR

1
PRZ69
2.15K_0402_1%
CSP3_4PH <90> PWM3_4PH/VBOOT
1 2
<89,90> SW3_4PH
2
<90> PWM4_4PH/ROSCM
PCZ37 @ PRZ70
0.1U_0402_25V6 100K_0402_1%
1
CSREF_4PH
1
TSENSE_4PH TSENSE_2PH
PRZ71
2
2
2.15K_0402_1%
0_0402_5%
0_0402_5%
@0@ PRZ72
@0@ PRZ73
1 2 CSP4_4PH
<89,90> SW4_4PH
2
PCZ38 @ PRZ74 Place close to H-side,L-side MOS Place close to H-side,L-side MOS
1
0.1U_0402_25V6 100K_0402_1% in VCORE first phase in VCCGT first phase

1
1
1
CSREF_4PH
1
PHZ4 PRZ75 PHZ5 PRZ76

61.9K_0402_1% 61.9K_0402_1%
220K_0402_5%_ERTJ0EV224J 220K_0402_5%_ERTJ0EV224J
2
2
2
D D
Security Classification Compal Secret Data

2016/02/01 2017/12/31 Title
Issued Date Deciphered Date Compal Electronics, Inc.
Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. CPU IC SKL_H 42
1 2 3 4 5
5 4 3 2 1
Main Func = CORE
MOSFET: DFN 5X6E

H/S Rds(on): 5.2mohm(Typ), 7mohm(Max)
L/S Rds(on): 0.8mohm(Typ), 1.05mohm(Max)
EMI@ PLZ11
HCB2012KF-121T50_0805
PRZ85 +19VB_CPU 1 2
0_0603_5% +19VB
1 2 DRVH1_VCORE-1 PCZ39 PCZ46 EMI@ PLZ12
33U_25V_NC_6.3X4.5
33U_25V_NC_6.3X4.5
33U_25V_NC_6.3X4.5
0.1U_0603_25V7K
0.1U_0603_25V7K
0.1U_0603_25V7K
HCB2012KF-121T50_0805
1
10U_0603_25V6M
10U_0603_25V6M
1 2
EMI@ PCZ58
EMI@ PCZ59
EMI@ PCZ60
1 1 1
@H82@
PRZ77 + + +
@ PCZ48
PCZ47
PCZ65
2
2
2.2_0603_5% PQZ1 PQZ2
BOOT1_VCORE
2
1 2
D 2 2 2 D
G1
D1
G1
D1
PCZ50
0.22U_0603_25V7K 7 7
PUZ2 D2/S1 D2/S1 PLZ1
1
NCP81151MNTBG_DFN8_2X2 0.15UH_NA__36A_20%
1 9 1 4
G2
G2
S2
S2
S2
S2
S2
S2
BST FLAG +VCC_CORE
2
2 8 DRVH1_VCORE 2 3
<89> PWM1_4PH/ICCMAX4
3
PWM DRVH
VSW1_VCORE
AON6962_DFN5X6D-8-7 AON6962_DFN5X6D-8-7 SH00001EE00 (common part) Choke: SH00001D800 Size:7x7x4 Maglayers
3 7
<89,91> DRVON EN SW 7x7X4 DCR:0.67mΩ +/-5% Isat: 45A
Isat:45A
1
4 6 @EMI@
+5VALW VCC GND PRZ78 DCR:0.67mΩ +/-5%
5 DRVL1_VCORE
DRVL 4.7_1206_5%
1 2 CSREF_4PH<89>
1
PCZ49
2
PRZ89 10_0402_1%
2.2U_0402_6.3V6M SNB1_VCORE
2
SW1_4PH<89>
1
@EMI@
PCZ51
680P_0402_50V7K
2
PRZ84
0_0603_5% +19VB_CPU
1 2 DRVH2_VCORE-1 PCZ66 PCZ67
+VCC CORE
1
10U_0603_25V6M
10U_0603_25V6M
PRZ79
@H82@ TDC= 80A->86A
Peak Current= 128A->140A
2
2.2_0603_5% PQZ3 PQZ4
BOOT2_VCORE
2
1 2 OCP Current= 154A->168A
G1
D1
G1
D1
Load Line= 1.8mV/A
PCZ53
0.22U_0603_25V7K 7 7
Vboot= 0V
1
1 9 1 4
G2
G2
S2
S2
S2
S2
S2
S2
BST FLAG +VCC_CORE
2
2 8 DRVH2_VCORE 2 3
<89> PWM2_4PH/ADDR
3
PWM DRVH AON6962_DFN5X6D-8-7 AON6962_DFN5X6D-8-7
VSW2_VCORE SH00001EE00 (common part)
C DRVON 3 7 C
EN SW 7x7X4
4 6 Isat:45A
+5VALW VCC GND
1
DRVL2_VCORE
@EMI@ DCR:0.67mΩ +/-5%
5 PRZ80
DRVL
4.7_1206_5%
1
PCZ52 1 2
2
2.2U_0402_6.3V6M PRZ90 10_0402_1%
2
SNB2_VCORE
SW2_4PH<89>
1
@EMI@
PCZ54
680P_0402_50V7K
2
PRZ83
0_0603_5% +19VB_CPU
1
10U_0603_25V6M
10U_0603_25V6M
@H82@
PRZ81
2
2.2_0603_5% PQZ5 PQZ6
BOOT3_VCORE
1
2
1 2
G1
D1
G1
D1
PCZ56
0.22U_0603_25V7K 7 7
1
1 9 1 4
G2
G2
S2
S2
S2
S2
S2
S2
BST FLAG +VCC_CORE
2
2 8 DRVH3_VCORE 2 3
<89> PWM3_4PH/VBOOT
6
3
DRVON 3 7
EN SW 7x7X4
4 6 Isat:45A
+5VALW VCC GND
1
DRVL3_VCORE
@EMI@ DCR:0.67mΩ +/-5%
5 PRZ82
DRVL
4.7_1206_5%
1
PCZ55 1 2
2
2.2U_0402_6.3V6M PRZ91 10_0402_1%
2
SNB3_VCORE
B B
SW3_4PH<89>
1
@EMI@
PCZ57
680P_0402_50V7K
2
PRZ86
0_0603_5% +19VB_CPU
1
10U_0603_25V6M
10U_0603_25V6M
@H82@
PRZ87
2
2.2_0603_5% PQZ7 PQZ8
BOOT4_VCORE
1
1 2
G1
D1
G1
D1
PCZ62
0.22U_0603_25V7K 7 7
1
1 9 1 4
G2
G2
S2
S2
S2
S2
S2
S2
BST FLAG +VCC_CORE

2
2 8 DRVH4_VCORE 2 3
<89> PWM4_4PH/ROSCM
6

DRVON 3 7
EN SW 7x7X4
4 6 Isat:45A
+5VALW VCC GND
1
DRVL4_VCORE
@EMI@ DCR:0.67mΩ +/-5%
5 PRZ88
DRVL
4.7_1206_5%
1
PCZ61 1 2
2
2.2U_0402_6.3V6M PRZ92 10_0402_1%

2
SNB4_VCORE
SW4_4PH<89>
1
@EMI@
PCZ64
680P_0402_50V7K
2
A A
Security Classification Compal Secret Data

CPU_CORE
5 4 3 2 1
5 4 3 2 1
Main Func = VCCGT/+VCCSA

+19VB_CPU
PCG4 PCG3 PCG2 PCG1
1
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
PRG1
2
D 2.2_0603_5% D
BOOT1_VCCGT 1 2
1 2 DRVH1_VCCGT-1
SH00001EE00 (common part) +VCCGT
7x7X4
1
PCG6 PRG3 0_0603_5%
Isat:45A TDC= 25A
2
0.22U_0603_25V7K PQG1
PUG1 AON6962_DFN5X6D-8-7 DCR:0.67mΩ +/-5% Peak Current= 32A
G1
D1
2
1
NCP81151MNTBG_DFN8_2X2
9
PLG1
0.15UH_NA__36A_20%
OCP Current= 39A
BST FLAG 7
D2/S1
VSW1_VCCGT 1 4
+VCC_GT
Load Line= 2.7mV/A
2 8 DRVH1_VCCGT
<89> PWM1_2PH/ICCMAX2 PWM DRVH 2 3
Vboot= 0V
DRVON 3 7 VSW1_VCCGT
G2
S2
S2
S2
EN SW
4 6 near choke
+5VALW
3
VCC GND
1
@EMI@
5 DRVL1_VCCGT PRG2 PRG4
DRVL 10_0402_1%
4.7_1206_5%
CSREF_2PH<89>
1
PCG5 1 2
2
2.2U_0402_6.3V6M
2
SNB1_GT
SW1_2PH <89>
1
@EMI@
PCG7
680P_0402_50V7K
2
C C
+19VB_CPU
PCA2 PCA1
1
10U_0603_25V6M
10U_0603_25V6M
2
2
PRA2 PCA5
2.2_0603_5% 0.22U_0603_25V7K
1 2 BST_R_+VCC_SA 1 2 HG_+VCC_SA
+VCCSA
TDC= 10A
Choke 0.47uH SH00001ED00 (Commom Part) Peak Current = 11A
(Size:5.7 x 5.4 x 3.0 mm)
PUA1
NCP81253MNTBG_DFN8_2X2 (DCR:6.2m +-5%) OCP Current= 13A
PQA1
Load Line= 10.3mV/A
1
BST_+VCC_SA 1 8 EMB09A03VP_EDFN3X3-8-10 PLA1

BST DRVH 0.47UH_MMD05CZR47M_12A_20% Vboot= 1.05V
G1
D1
D1
D1
B 2 7 SW_+VCC_SA SW_+VCC_SA 1 4 B
<89> PWM1_1PH/ICCMAX1 PWM SW +VCC_SA
3 6 9 10 2 3
<89,90> DRVON EN GND D2/S1 D1
4 5
+5VALW
PAD
VCC DRVL
1
@EMI@
G2
S2
S2
S2
PRA1
4.7_1206_5%
9
5
1
PCA4
CSN_1PH<89>
2
2.2U_0402_6.3V6M LG_+VCC_SA
2
SNB_SA
1
@EMI@
PCA6 SW_1PH <89>
680P_0402_50V7K
2
A A

+VCC_GT/+VCC_SA
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C1PRG LA-E051P
5 4 3 2 1
A
D
+VCC_CORE
Acoustic
for
Design
2 1 2 1 2 1 2 1 2 1 2 1 2 1
+VCC_CORE
2
1
+
@
@
PCZ159 PCZ149 PCZ139 H82@ PCZ134 PCZ124 PCZ114 PCZ104 PCZ176
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 220U_D7_2VM_R4.5M
2 1 2 1 2 1 2 1 2 1 2 1 2 1
5
5
2
1
+
@
@
PCZ160 PCZ150 PCZ140 PCZ135 PCZ125 PCZ115 PCZ105 PCZ101
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 220U_D2_2V_Y
2 1 2 1 2 1 2 1 2 1 2 1 2 1
1
+
PCZ161 PCZ151 PCZ141 PCZ136 H82@ PCZ126 PCZ116 PCZ106 PCZ102
24 +6@ X
28 +13@ X
1
1
H82 Total
2 1 2 1 2 1 2 1 2 1 2 1 2 1
1
+
@
@
PCZ162 PCZ152 PCZ142 H82@ PCZ137 PCZ127 PCZ117 PCZ107 PCZ103
2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1
X
X
@
@
@ PCZ163 PCZ153 PCZ143 PCZ138 PCZ128 PCZ118 PCZ108 H82@ PCZ170
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
VCORE Output Capacitor:

1uF_0201
22uF_0603_X5R (H62: 22 +19@)
220uF_D7_2V
220uF_D2_2V
2 1 2 1 2 1 2 1 2 1 2 1 2 1
@
@ PCZ164 PCZ154 PCZ144 PCZ129 PCZ119 PCZ109 PCZ171
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1 2 1 2 1 2 1
@ PCZ165 PCZ155 PCZ145 PCZ130 PCZ120 H82@ PCZ110 PCZ172

2 1 2 1 2 1 2 1 2 1 2 1 2 1

2 1 2 1 2 1 2 1 2 1 2 1 2 1
@
4
4
2 1 2 1 2 1 2 1 2 1 2 1 2 1
@
@ PCZ168 PCZ158 PCZ148 H82@ PCZ133 PCZ123 PCZ113 PCZ175
+VCC_GT
2 1 2 1 2 1 2 1
PCG133 PCG123 PCG113 PCG103

1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
PCG134 PCG124 PCG114 PCG104

1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
+VCC_GT
@ PCG135 PCG125 PCG115 PCG105
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2@
1
+
PCG101
2 1 2 1 2 1 2 1 220U_D2_2V_Y
@
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
1
+
2 1 2 1 2 1 2 1 PCG102
220U_D2_2V_Y
3
3
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
Issued Date
12+8@
18+2@
1 +1@
Total VCCGT Output Capacitor:
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1

1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
X 1uF_0201
X 220uF_D2_2V
X 22uF_0603_X5R
2 1 2 1 2 1 2 1
@

1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1

NA
1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1

1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
Compal Secret Data
Deciphered Date
+VCC_SA
2
2
2014/07/04
2 1 2 1
2 1
1+4@
8+4@
Total VCCSA Output Capacitor:
PCA107 PCA101
PCA113 22U_0603_6.3V6M 22U_0603_6.3V6M
1U_0201_6.3V6M
2 1 2 1
2 1
PCA108 PCA102
@ PCA114 22U_0603_6.3V6M 22U_0603_6.3V6M
X 1uF_0201
X 22uF_0603
1U_0201_6.3V6M
2 1 2 1
2 1
PCA109 PCA103
@ PCA115 22U_0603_6.3V6M 22U_0603_6.3V6M
1U_0201_6.3V6M
Date:
Size Document Number
Title
Custom
2 1 2 1
2 1
DH53F M/B LA-F991P
PCA110 PCA104
@ PCA116 22U_0603_6.3V6M 22U_0603_6.3V6M
Wednesday, February 13, 2019
1U_0201_6.3V6M
2 1 2 1
2 1
@
PCA111 PCA105
@ PCA117 22U_0603_6.3V6M 22U_0603_6.3V6M
1U_0201_6.3V6M
2 1 2 1
@
PCA112 PCA106
22U_0603_6.3V6M 22U_0603_6.3V6M
1
1
Sheet
92
of
100
R ev
0.1
D
5 4 3 2 1
EMI@ PLW2
HCB2012KF-121T50_0805
1 2
@ PJW1
JUMP_43X79
B+_+1.35VS_VGAP 1 2
1 2 GPU_B+
2200P_0402_50V7K
PRW1
N18E-G1
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
0.1U_0402_25V6
PRW28 1K_0402_1%
PCW1
PCW2
EMI@ PCW32
1
1
1 2 +1.35VSDGPU
PCW3
PCW4
PCW5
PCW28
PCW29
PCW30
PCW31
31.6K_0402_1% <25,37> 1.35VSDGPU_EN
2 1
D
+3VALW
PCW6 TDC 35A D
2
Peak Current 47A
EMI@
EMI@
0.1U_0402_25V6
1 2
@ PRW3
0_0402_5%
1 2 N18E-G0
<25> FBVDDQ_PSI UG1_+1.35VS_VGAP
+1.35VSDGPU
TDC 30A
1
SW1_+1.35VS_VGAP
SH00001TQ00
PRW6
13X8X4 Peak Current 35A
10K_0402_1%
Isat:55A
PRW4
DCR:1.3mΩ (+/-5%)
2
Inside@ PRW26 2.2_0603_5% PQW1 PQW3
0_0402_5% 2 1 AOE6932_DFN5X6E8-10 AOE6932_DFN5X6E8-10
4
PLW1
BOOT1_+1..35VS_VGAP_R
VRAM_VDD_CTL_R 1 2 0.47UH_MHT-MHDZIR47MEM1-RT_30A_20%
G1
S1/D2
D1
D1
G1
S1/D2
D1
D1
SW1_+1.35VS_VGAP-1
+1.35VSDGPU
BOOT1_+1.35VS_VGAP
1 2
UG1_+1.35VS_VGAP
VID_+1.35VS_VGAP
PSI_+1.35VS_VGAP
EN_+1.35VS_VGAP
1
9 10 9 10
1
D1 S2 D1 S2
D2/S1
D2/S1
D2/S1
D2/S1
D2/S1
D2/S1
Outside@ PRW27
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1 1
0_0402_5% @EMI@ PRW8
G2
G2
470U_X_2VY_R9M
470U_D2_2VM_R4.5M
560U_D2_2VM_R4.5M
1
4.7_1206_5% + + +
PCW9
PCW10
PCW33
PCW11
PCW12
PCW13
2
2
2 2 2
SNB1_+1.35VS_VGAP
@ @ @ @
1
PUW1
1
RT8816BGQW_WQFN20_3X3 PCW14
0.22U_0603_25V7K
UGATE1
BOOT1
VID
PSI
EN
2
C C
REFADJ_+1.35VS_VGAP 6 20 SW1_+1.35VS_VGAP
REFADJ PHASE1 LG1_+1.35VS_VGAP
1
REFIN_+1.35VS_VGAP 7 19 LG1_+1.35VS_VGAP @EMI@ PCW16
REFIN LGATE1 PRW11 Bottom Source MOSFET: AOE6932 5x6 DFN 680P_0402_50V7K
2.2_0603_5%
H/S Rds(on): 5.2mohm(Typ), 8mohm(Max)
2
VREF_+1.35VS_VGAP 8 18 PVCC_+1.35VS_VGAP 1 2
VREF PVCC +5VALW L/S Rds(on): 1.15mohm(Typ), 1.8mohm(Max)
PRW12 PRW13
2.2_0402_1% 499K_0402_1%
2 1 2 1 TON_+1.35VS_VGAP 9 17 PCW17
B+_+1.35VS_VGAP TON LGATE2
1
2.2U_0402_6.3V6M
OCSET/SS
RGND 10 16
PCW18
2
UGATE2
RGND PHASE2
PGOOD
BOOT2
2
1TON_+1.35VS_VGAP_R
VSNS
2
GND
0_0402_5%
@ PRW14
0.1U_0402_25V6
21
11
12
13
14
15
1
VREF_+1.35VS_VGAP VREF_+1.35VS_VGAP
1.35VSDGPU_PG
Vsense_+1.35VS_VGAP
OCset_+1.35VS_VGAP
9.31K_0402_1%
1
REFIN_+1.35VS_VGAP
PRW2
Inside@ PCW20
0.1U_0402_25V6
Inside@ PRW22
4.64K_0402_1%
1
1
R1
REF1
0.1U_0402_25V6
PCW7
Outside@
2
1
2
REFADJ
Outside@
2
B Inside@ PRW25 B
Outside@ PCW8
Outside@ PRW7
60.4K_0402_1%
20K_0402_1%
78.7K_0402_1%
0.033U_0402_16V7K
1
+3VALW REFADJ_+1.35VS_VGAP_R 1 2 REFADJ_+1.35VS_VGAP
PRW5
1
PRW18
Inside@ PCW21
R2 R3
2200P_0402_50V7K
10K_0402_1%
1
1 2 Outside@
Inside@ PRW23
Outside@
7.87K_0402_1%
+3VS
2
PRW21
10K_0402_1%
RBOOT
2
PRW19
100_0402_1%
2
1 2
+1.35VSDGPU 1.35VSDGPU_PG <25,37>
6
DMN53D0LDW-7 2N SOT363-6
PRW9 @0@ REFIN_+1.35VS_VGAP
56K_0402_1%
1
0_0402_5%
5 2 VRAM_VDD_CTL_R 1 2
PRW17
VRAM_VDD_CTL <25>
PQW2B
PQW2A
2200P_0402_50V7K
1
Inside@ PRW24
Inside@ PCW22
When,VRAM_VDD_CTL=High
26.1K_0402_1%
4
1
PRW10
@ PCW15
0.1U_0402_16V7K
2
1
<29> FB_VDDQ_SENSE
1 2 When PRW17=56K, Rocset for 57A @ 10K_0402_1%
REF2 Vboot=1.364V (x1.010)
2
@ PRW20
Outside@
Outside@
2
0_0402_5% When,VRAM_VDD_CTL=Low
Vboot=1.266V (x1.013)
2
@ PCW27
1
0.1U_0402_25V6
A When,VRAM_VDD_CTL=High When,VRAM_VDD_CTL=Low A
Vboot=Vref*R2/(R1+R2+80) Vboot=Vref*R2/(R1+R2+80)
=2*20K/(9.31K+20K+80) =2*(20K//78.7K)/(9.31K+(20K//78.7K)+80)
=1.361V (x1.008) =1.259V (x1.007)

PWR_+1.5VRAM
5 4 3 2 1
SKL_H 42
A B C D E
@ PJ1002
JUMP_43X79
1 2
+1.0VSDGPUP 1 2 +1.0VSDGPU
1 1
PR1004
10_0402_1%
1VSDGPU_EN_R 1 2
1VSDGPU_EN <25,37>
1
Current limit = 4.7A(min) PR1005 PC1006
0.1U_0402_25V6
2
PR1001 1M_0402_5%
10K_0402_5%
2
2 1
+3VS
PU1001 Choke 1uH SH00000YG00 (Common Part)

<25> 1VSDGPU_PG 9
1 PGND 8 (Size:3.8 x 3.8 x 1.9 mm)
VIN_1.0VSDGPUP FB SGND (DCR:20m~25m)
@ PJ1001 2 7 PL1001
JUMP_43X79 PG EN 1UH_2.8A_30%_4X4X2_F
1 2 3 6 LX_1.0VSDGPUP 1 2
+3VALW 1 2 IN LX +1.0VSDGPUP
4 5
68P_0402_50V8J
PGND NC
1
Rup
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
PC1001 EMI@
PC1002
1
SY8003ADFC_DFN8_2X2 PR1002 PR1003
PC1003
PC1004
PC1005
22U_0603_6.3V6M 4.7_0603_5% 13.7K_0402_1%
2
2 2
2
FB_1.0VSDGPUP @
1
EMI@
Rdown
1
FB=0.6V PC1007
Note:Iload(max)=3A 680P_0402_50V7K PR1006
20K_0402_1%
2
VFB=0.6V
2
=0.6V* (1+13.7/20)
Vout=1.011V
3 3
4 4

1.05VSDGPU
A B C D E
5 4 3 2 1
@ PCV1 PRV2 +5VCC

0.1U_0402_25V6 34K_0402_1%
2 1 2 1
PRV1 @0@ PRV3 PRV4

1 2 1 2 38.3K_0402_1%
24K_0402_1% 2 1
N18E-G1
NVVDD_B+
0_0402_5% NVVDD
PCV2
0.1U_0402_25V6 +5VCC PRV6 PRV7 TDC 82A
+3VS 1 2
2
4.3K_0402_1%
1
442_0402_1%
1 2
Peak Current 225A
OCP 270A Fsw=300kHz
91K_0402_1%
PRV8
10K_0402_1%
10K_0402_1%
PRV9 PCV3
1
D D
3.6K_0402_1% 1U_0402_6.3V6K
2 1 1 2
PRV139
PRV140
PRV11
2
10K_0402_1%
2 1
2
2
VGA_I2CC_SDA_PWR
VGA_I2CC_SCL_PWR PCV4
0.1U_0402_25V6 @ PCV5 0.1U_0402_25V6
1
1
0_0402_5%
0_0402_5%
1 2 1 2
@ PRV142
@ PRV141 1 2 1 2 PRV14
2K_0402_1%
PRV12 @0@ PRV13 @0@ 1 2
2
@0@ PRV16
0_0402_5% 0_0402_5%
0_0402_5%
1 2 2 1
PCV6 PRV15 PRV145 @0@
0.015U_0402_16V7K 2.4K_0402_1% 0_0402_5%
+5VCC 1 2
FDMF3170_REFIN
ADDR/FSW_GPU
FDMF3170_IMON1 <96>
1 2 1 2
0.1U_0402_25V6
VINMON_GPU
2
PCV8
@ PCV7
COMP_GPU
1
IMON_GPU
PRV20 @0@ PRV18 @0@ 0.1U_0402_25V6 @
DAC_GPU
EAP_GPU
LPC_GPU
<29> NVVDD1_VCC_SENSE 0_0402_5% 0_0402_5% PRV19
2
0_0402_5%
1 2
PRV21
1K_0402_1%
2
+5VCC
@
PRV10
2
100K_0402_1%
+NVVDD1 1 2 @ PRV146 @0@
PRV22 PRV25 0_0402_5%
24
23
22
21
20
19
18
17
1
1
1 2
100K_0402_1%
10_0402_1% @ 0_0402_5% @ PCV11
FDMF3170_IMON2 <96>
1
1 2 1 2
0.1U_0402_25V6
C C
COMP
EAP
DAC
VINMON
ADDR
IMON
LPC
REFOUT
VOUT_S
1
PRV29
@ PCV13
0.1U_0402_25V6 @
0.1U_0402_25V6
2 1 25 16 CSPSUM_GPU
PCV14
PRV30
FB CSPSUM
2
PRV31 1K_0402_1% 1K_0402_1%
2
NVVDD1_FBRTN 26 15 CSNSUM_GPU
2
@ FBRTN CSNSUM
1
TSENSE_GPU 27 14 CSP1_GPU PRV147 @0@

PRV34 @0@ TSENSE CSP1 0_0402_5%
<29> NVVDD1_VSS_SENSE 0_0402_5% VGA_I2CC_SDA_PWR 28 PUV1 13 CSP2_GPU 1 2
SDA CSP2 FDMF3170_IMON3 <97>
1 2
0.1U_0402_25V6
<96,97> TSENSE_GPU UP9512QQKI_WQFN32_4X4
1
VGA_I2CC_SCL_PWR 29 12 CSP3_GPU
SCL CSP3
@ PCV17
1 2 @
PRV35 <25> VGA_I2CC_SDA_PWR EN_GPU 30 11 CSP4_GPU PRV36
10_0402_1% EN CSP4 1K_0402_1%
2
NVVDD1_FBRTN <25> VGA_I2CC_SCL_PWR PSI_GPU 31 10
2
1 2 PSI 5VCC
+3VALW NVVDD1_PG
PRV39 32 9
PGOOD PW M1 FDMF3170_REFIN <96,97>
1
10K_0402_1%
10K_0402_1%
+5VS
REFADJ
33
PRV40
+5VCC
CH_OC
GND
REFIN
PWM4
PWM3
PWM2
VREF
VID
6
2 1
2
4.7U_0402_6.3V6M
PQV01A
PQV01B
PRV42
PCV18
2.2_0603_5%
<25,37> NVVDD1_EN
2 5
PWM4_GPU
PWM3_GPU
PWM2_GPU
CH_OC_GPU
2
1
VID_GPU
+3VS 1 2
B REFADJ_GPU B
@ PRV46
0_0402_5%
PWM1_GPU
1
6.19K_0402_1%
PRV44
REFIN_GPU
PRV50 @0@
R1 @0@ PRV54 0_0402_5%
NVVDD_PSI <25> 0_0402_5% 1 2
R3 GPU_PWM1 <96>
2
1 2
PRV53 @0@ PRV56 0_0402_5%
2 1 1 2 GPU_PWM2 <96>
1 2
PRV71 133K_0402_1%
309_0402_1% 16.5K_0402_1%
1
@ PRV52 4.32K_0402_1% @0@ PRV58 0_0402_5%

1 2
PRV57
0_0402_5%
PRV61
R4 GPU_PWM3 <97>
1
100K_0402_1%
+3VS 1 2
1 2
PRV64
215K_0402_1%
45.3K_0402_1%
45.3K_0402_1%
<25> NVVDD1_PG R5
2
PRV63
R2PRV66
2
+5VS 2 1
PRV155 2K_0402_1%
1
@ PCV9 PRV70 @0@
@ 100K_0402_1%
1U_0402_6.3V6K 0_0402_5% 20.5K_0402_1%
4700P_0402_50V7K
1U_0402_6.3V6K
1
1
PCV26
1 2 1 2
2
PCV25
PRV72
PRV73
PRV69
@ PUV8
TC7SH08FU_SSOP5~D <25> NVVDD_VID C
2
2
5
A A
1
1
P
+5VS
2
B 4 GPU_DRVON <96,97>
EN_GPU 2 O
A
G
NVVDD1_FBRTN
3
PWMVID 的 RC BOM
請根據GPU's confi g 設定 PWR_VGA_UP9512P
PRV156
0_0402_5% AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1 2 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-F551P
5 4 3 2 1
1 2 3 4 5
GPU_B+ NVVDD_B+
EMI@ PLV11
+19VB PRV74 PRV75
HCB2012KF-121T50_0805
1 2 1 4 1 4
EMI@ PLV12 2 3 2 3
HCB2012KF-121T50_0805
1 2
0.005_1206_1% 0.005_1206_1% NVVDD1
TDC= 82A
Peak Current= 225A
OCP= 270A
+5VS Vboot= 0.8V
A A
2
<22> CSSP_B+ <22> CSSN_B+ CSSP_NVVDD <22> <22> CSSN_NVVDD
NCP303150@
PRV77
0_0402_5%
QD9619@ PRV76 NVVDD_B+
1
30K_0402_5%
1 2
Use 0603 size
QD9619@
33U_25V_NC_6.3X4.5
33U_25V_NC_6.3X4.5
TSENSE_GPU <95,97>
PRV82 0_0402_5%
PCV30
PCV31
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
0.1U_0402_25V6
1 1
1 2 TMON1_FDMF3170 BST1_FDMF3170
1 2
1
PRV80 + +
PCV32
PCV33
PCV34
PCV35
PCV78
@ PCV429
PCV36
2.2_0603_5%
2
1
+5VS 2 2
EMI@
EMI@
16
17
11
10
13
9
PCV40
0.1U_0603_25V7K
VIN1
FAULT
BOOT
ZCD_EN
N/C
VIN
2
QD9619@
PRV85 0_0402_5%
PCV27 +NVVDD1 1 2 VOS1_FDMF3170 1
2.2U_0402_6.3V6M NC
1 2 4 12 PHASE1_FDMF3170
PVCC PHASE
1 2 VCC1_FDMF3170 3
PRV78 VCC
2_0402_5% 2 SH00001QL00
AGND
1
PCV37
2.2U_0402_6.3V6M 5
13X8X4
PGND PUV2 Isat:77A
2
20 QD9619AQR1_PQFN41_5X6 DCR:0.48mΩ (+/-5%)

PGND2
+NVVDD1
B PLV2 B
1 2 PWM1_FDMF3170 14 8 LX1_FDMF3170 1 2
GPU_DRVON <95,97> <95> GPU_PWM1 @0@ PRV79 0_0402_5% PWM SW
1
1 2 EN1_FDMF3170 15
@0@ PRV84 0_0402_5% DISB# 0.22UH_MHT-MHDZIR22MEM3-RT_45A_20%
FDMF3170_IMON1 18 EMI@ PRV154
<95> FDMF3170_IMON1 IMON 4.7_1206_5%
1 2 FDMF3170_REFIN1 19
PGND1
2
@0@ PRV81 0_0402_5% REFIN
GPU1_SNB1
GL
TP
1
layout reference Close to IC.
EMI@ PCV255
6
21
7
680P_0402_50V7K
2
+5VS
2
NCP303150@
PRV87
0_0402_5%
1
30K_0402_5%
1 2
Use 0603 size
QD9619@
PRV92 0_0402_5%
PCV47
PCV48
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
0.1U_0402_25V6
1 2
1
PRV90
PCV49
PCV50
PCV51
PCV52
PCV62
C C
2.2_0603_5%
2
1
+5VS
@EMI@
@EMI@
16
17
11
10
13
9
PCV57
0.1U_0603_25V7K
VIN1
FAULT
BOOT
ZCD_EN
N/C
VIN
QD9619@
PRV95 0_0402_5%
2.2U_0402_6.3V6M NC
1 2 4 12 PHASE2_FDMF3170
PVCC PHASE
1 2 VCC2_FDMF3170 3
PRV86 VCC
2_0402_5% 2 SH00001QL00
1
PCV54 AGND
2.2U_0402_6.3V6M 5
13X8X4
PGND PUV3 Isat:77A
2

PGND2
+NVVDD1
PLV3
1 2 PWM2_FDMF3170 14 8 LX2_FDMF3170 1 2
<95> GPU_PWM2 @0@ PRV89 0_0402_5% PWM SW
1
1 2 EN2_FDMF3170 15
@0@ PRV94 0_0402_5% DISB# 0.22UH_MHT-MHDZIR22MEM3-RT_45A_20%
<95> FDMF3170_IMON2 IMON 4.7_1206_5%
PGND1
@0@ PRV91 0_0402_5% REFIN

GPU1_SNB2
GL
TP
FDMF3170_REFIN <95,97>
1
layout reference Close to IC.

EMI@ PCV60
6
21
D 680P_0402_50V7K D
2

PWR_+NVVDD1
1 2 3 4 5
5 4 3 2 1
+5VS
2
NCP303150@
PRV97
0_0402_5%
1
30K_0402_5%
1 2
Use 0603 size
D
QD9619@ D
PRV102 0_0402_5%
PCV64
PCV65
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
0.1U_0402_25V6
1 2
<95,96> TSENSE_GPU
1
PRV100
PCV66
PCV67
PCV68
PCV69
2.2_0603_5%
2
1
+5VS
@EMI@
@EMI@
16
17
11
10
13
9
PCV74
0.1U_0603_25V7K
VIN1
FAULT
BOOT
ZCD_EN
N/C
VIN
2
QD9619@
PRV105 0_0402_5%
2.2U_0402_6.3V6M NC
1 2 4 12 PHASE3_FDMF3170
PVCC PHASE
1 2 VCC3_FDMF3170 3
PRV98 VCC
2_0402_5% 2 SH00001QL00
AGND
1
PCV71
2.2U_0402_6.3V6M 5
13X8X4
2 PGND PUV4 Isat:77A
PGND2
+NVVDD1
PLV4
1 2 PWM3_FDMF3170 14 8 LX3_FDMF3170 1 2
<95> GPU_PWM3 @0@ PRV99 0_0402_5% PWM SW
1
1 2 EN3_FDMF3170 15
<95,96> GPU_DRVON @0@ PRV104 0_0402_5% DISB# 0.22UH_MHT-MHDZIR22MEM3-RT_45A_20%
<95> FDMF3170_IMON3 IMON 4.7_1206_5%
PGND1
<95,96> FDMF3170_REFIN
2
@0@ PRV101 0_0402_5% REFIN
GPU1_SNB3
GL
TP
1
C layout reference Close to IC. C
EMI@ PCV77
21
7
680P_0402_50V7K
2
B B
A A

PWR_+NVVDD1
5 4 3 2 1
A
+NVVDD1
2 1 2 1 2 1 2 1 2 1 2 1
Place near GPU

2
1
+
PCV239 PCV215 PCV199 PCV179 PCV159 PCV251 PCV132
10U_0402_6.3V6M 10U_0402_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 560U_D2_2VM_R4.5M
2 1 2 1 2 1 2 1 2 1 2 1
1
+
5
2 1 2 1 2 1 2 1 2 1 2 1
1
+
2 1 2 1 2 1 2 1 2 1 2 1
1
+
2 1 2 1 2 1 2 1 2 1 2 1
1
+
2 1 2 1 2 1 2 1 2 1 2 1
1
+
2 1 2 1 2 1 2 1 2 1 2 1
1
+
2 1 2 1 2 1 2 1 2 1 2 1
1
+
PCV206 PCV186 PCV166 PCV146
@
PCV246 PCV222 PCV139
2 1 2 1 2 1 2 1 2 1 2 1
1
+
@
PCV247 PCV223 PCV272
2 1 2 1 2 1 2 1 2 1 2 1
1
+
2 1 2 1 2 1 2 1 2 1 2 1
PCV358 PCV225 PCV209 PCV189 PCV169 PCV149

22U_0603_6.3V6M 10U_0402_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1 2 1 2 1 2 1 2 1

4
4
2 1 2 1 2 1 2 1 2 1 2 1

2 1 2 1 2 1 2 1 2 1 2 1
@
PCV266 PCV229
2 1 2 1 2 1 2 1 2 1 2 1
@
PCV267 PCV228
Place under GPU

2 1 2 1 2 1 2 1 2 1 2 1
@
PCV268 PCV230
1uF_0201 X 113 (93+20)

10uF_0402X 23
22uF_0603 X 10 @X6
560uF_D2_R4.5 X 10
Ipeak:225A
Imax:82A
+NVVDD
N18E-G1
2 1 2 1 2 1 2 1 2 1 2 1
@
PCV269 PCV231
2 1 2 1 2 1 2 1 2 1 2 1
@
PCV270 PCV232
2 1 2 1 2 1 2 1 2 1 2 1
@
PCV271 PCV233
2 1 2 1 2 1 2 1 2 1
PCV234 PCV238 PCV198 PCV178 PCV158

10U_0402_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M
3
3
+NVVDD1
Issued Date
2 1 2 1
PCV401 PCV252
1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1
PCV402 PCV253
1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1
PCV403 PCV254
2016/01/06
1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1
PCV404 PCV256
1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1
PCV405 PCV257
1U_0201_6.3V6M 1U_0201_6.3V6M
Compal Secret Data
2 1 2 1
PCV406 PCV258
1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1
Deciphered Date
PCV407 PCV259
1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1
2
2
PCV408 PCV260
1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1
PCV409 PCV261
1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1
PCV410 PCV262
2017/01/06
1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1
PCV411 PCV263
1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1
PCV412 PCV264
1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1
PCV413 PCV265
1U_0201_6.3V6M 1U_0201_6.3V6M
2 1
Date:
Size
Title
PCV414
1U_0201_6.3V6M
2 1
Document Number
PCV415
PWR_VGA DECOUPLING
Wednesday, February 13, 2019
LA-F551P
1U_0201_6.3V6M
2 1
PCV416
1U_0201_6.3V6M
2 1
PCV417
1U_0201_6.3V6M
2 1
1
PCV418
1U_0201_6.3V6M
2 1
Sheet
PCV419
1U_0201_6.3V6M
2 1
PCV420
98
1U_0201_6.3V6M
of
100
R ev
0.1
D
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 2 for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
Change the PCV139, PCV272 from pop to un-pop.
Change the PRW13 from 383K_0402_1% (SD034383380) to 499K_0402_1% (SD034499380).
D
Change the PCW27 from pop to un-pop, and . PCW27.2 net name change from +1.35VSDGPU to Vsense_+1.35VS_VGAP. D
P86, P93 Change the PCW21, PCW22 From 4700P_0402_50V (SE074472K80) to 2200P_0402_50V(SE074222K80).
01 Design Update EVT EA Tuning 0.2 P95, P98 Change the PUV8, PCV9 from pop to un-pop. 11/12 B
Add location PRV156 0_0402_5% (SD028000080), and pop.
Add location PC1116 22U_0603_6.3V (SE00000M000), and un-pop.
Change the PRW17 from 56.2K_0402_1% (SD000001580) to 56K_0402_1% (SD034560280).
Change the PRW1 from 20K_0402_1% (SD034200280) to 1K_0402_1% (SD034100180).

02 Design Update Power Sequence 0.2 P93, P94 Change the PR1001 From 100K_0402_5% (SD028100380) to 10K_0402_5% (SD028100280). 11/13 B
Change the PQB2,PQM2 from AON7506 (SB000010A00) to EMB12N03V (SB00001HV00).

03 Design Update Solution Change 0.2 P83, P85 PQB1,PQB12,PQB13,PQM1,PQT1 footprint change to common footprint.
PCZ47,PCZ65,PCV36 change to common part P/N (SF000007200 ). 11/13 B
PLZ1,PLG1,PLZ2,PLZ3,PLZ4 change to common part P/N (SH00001EE00).
Change the location from PRG5 to PUG1.
03 Design Update Location modify 0.2 P91 Change the location from PRA3 to PUA1. 11/13 B
C
04 Design Update 0 ohm to R-short 0.2 P82 PR217 change from 0 ohm to R-short. 11/16 B C
05 Design Update EMI request 0.2 P93 PLW2, PCW1, PCW2, PCW32 change from un-pop to pop. 11/22 B
Change the PRZ12 from 1.78K_0402_1% (SD00000WY80) to 1.62K_0402_1% (SD000003380).

Change the PCZ25 from 680P_0402_50V7K (SE074681K80) to 470P_0402_50V8J (SE071471J80).
Change the PRZ51 from 84.5K_0603_1% (SD014845280) to 100K_0603_1% (SD014100380).
06 Design Update CPU test result 0.2 P89, P92 Change the PRZ35 from 25.5K_0402_1% (SD034255280) to 24.9K_0402_1% (SD034249280) . ->H82@ 11/22 B
Change the PRZ35 from 25.5K_0402_1% (SD034255280) to 27.4K_0402_1% (SD034274280) . ->H62@
Change the PRZ61 from 110K_0402_1% (SD034110380) to 102K_0402_1% (SD028102380) . ->H62@
Change the PCZ101,PCZ104,PCZ105,PCZ122,PCZ112,PCZ107,PCZ124,PCZ171,PCZ119 from pop to un-pop. ->H82@
Change the PCZ101,PCZ104,PCZ105,PCZ122,PCZ112,PCZ107,PCZ124,PCZ171,PCZ119,
PCZ110,PCZ126,PCZ133,PCZ134,PCZ137,PCZ170 from pop to un-pop. ->H62@
Change the PRZ43 from 12.1K_0402_1% (SD034121280) to 12K_0402_1% (SD034120280).
07 Design Update Solution Change 0.3 P84, P89 Change the PL501 P/N From SH00000II00 to SH000016700 (commonpart). 12/07 C
08 Design Update Power Sequence 0.3 P87 PC1811 (0.47_0402_6.3V, SE124474K80) change from pop to un-pop. 12/11 C
B B
09 Design Update Solution Change 1.0 P83 Add location PDB2 30MA_30V_0.5UA_0.4V_SOD323-2 (SCS00009P00), and un-pop. 12/19 C
PCG116, PCG120 change from pop to un-pop (22uF_0603_6.3V, SE00000M000).
10 Design Update Solution Change 1.0 P92 PCG107, PCG108 change from un-pop to pop (22uF_0603_6.3V, SE00000M000). 12/21 C
P85, P87 PRM8,PRM10,PRW9,PRZ25,PR1801,PR2501 change from 0 ohm to R-short.

11 Design Update 0 ohm to R-short 1.0 P89, P93 PRZ9,PRZ11,PRZ18,PRZ24,PRZ27,PRZ30,PRZ32,PRZ72,PRZ73 change from 0 ohm to R-short. 12/28 C
P95, P96 PRV1,PRV16,PRV18,PRV20,PRV34,PRV50,PRV54,PRV56,PRV58,PRV70,PRV145,PRV146,PRV147 change from 0 ohm to R-short.
P97 PRV12,PRV13,PRV84,PRV94,PRV104,PRV79,PRV81,PRV89,PRV91,PRV99,PRV101 change from 0 ohm to R-short.
PCZ47,PCZ65,PCV36 (33U_25V_4.5mm OS con) change from SF000007200 to SF000007700 and pop.
12 Design Update Solution Change 1.0 P90, P96 PCZ48,PCV429 (33U_25V_4.5mm OS con) change from SF000007200 to SF000007700 and un-pop. 01/04 C
PR1004 change from 0_0402_5% (SD028000080) to 10_0402_5% (SD034100A80).

13 Design Update Power Sequence 1.0 P94 PC1006 change from un-pop to 0.1uF_0402_25V (SE00000G880). 01/14 C2
09 Design Update Solution Change 1.0 P83 PDB2, 30MA_30V_0.5UA_0.4V_SOD323-2 (SCS00009P00), change from un-pop to pop. 02/01 C2
A A
2016/11/03
Compal Secret Data
2017/06/14 Title
PIR
5 4 3 2 1
5 4 3 2 1
Version change list Page 2 of 2 for

(P.I.R. List) PWR
Item Fixed Issue Rev. PG# Modify List Date Phase
01
D D
02
03
04
C C
05
06
07
08
B B
A A
2016/11/03
Compal Secret Data
2017/06/14 Title
PIR
5 4 3 2 1

Compal Confidential MB Schematic Document for EH50F/EH70F/EH51F/EH5VF/EH53F/EH73F laptop models

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Compal Confidential MB Schematic Document for EH50F/EH70F/EH51F/EH5VF/EH53F/EH73F laptop models

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A B C D E

Security Classification Compal Secret Data Compal Electronics, Inc.

RTC circuit Fan Control Thermal sensor

Conn. page 39 X4 DMI Offline USB Charger

VBIOS ROM USB3.0

LAN(GbE) 837pin FCBGA

RJ45 HD Audio HDA Codec Speaker

SPI ROM MIC Jack

Board ID Table for AD channel Power State

EC_SMB_CK1 ISL88739 (Charger IC) 0x12 VRAM BOM X76@

LED driver 0xC0

43 level BOM table Board ID PCB Revision Board ID PCB Revision

Security Classification Compal Secret Data Compal Electronics, Inc.

PU7105 PJ7107 RH100 +1.8VALW _PRIM PCH

PU8106 PL8107 +VCC_GT CPU

RH93 +1.05VALW _VCCMPHY PCH

PU7201 PJ7201 +VCCIO +1.05V_VCCST

+19VB_NVVDD RF7 +VCC_FAN2 FAN2

U4 +5VS_BL JBL1 KB BackLight

RO4 +5VS_HDD JHDD1

PL1301 PJ1302 HDMI A

EH50F_EVT Power Sequence

→ 1.494ms → 154us SYSON

Security Classification Compal Secret Data Compal Electronics, Inc.

K36 D29 EDP_TXP0

S IC N18E-G1-KD-A1 QS FCBGA 2228 GPU Compal Secret Data

Security Classification Compal Secret Data Compal Electronics, Inc.

<24> DDR_B_D[0..63] DDR CHANNEL B

RC3 1 2 121_0402_1% SM_RCOMP0 G1 BN13 +0.6V_VREFCA

Security Classification Compal Secret Data Compal Electronics, Inc.

PEG Lane Reversed CFL-H

Security Classification Compal Secret Data Compal Electronics, Inc.

PCH_CPU_BCLK_P B31 BN25 CFG0 CFG0 RC7 1 @ 2 1K_0402_5%

RC78 2 CMC@ 1 51_0402_5% CPU_XDP_TDO

RC14 1 2 499_0402_1% H_PROCHOT#_R

RC15 1 2 60.4_0402_1% EC_VCCST_PG

RC16 1 2 20_0402_5% H_PM_DOW N RC13 1 2 220_0402_5% CPU_SVID_ALERT#

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

PLACE CAP BACKSIDE PLACE CAP BACKSIDE

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

PCH-H XTAL_IN/OUT POR is 24MHz for 571697_CNL_MOW_WW16_2017.pdf CNP-H

RH219 1 2 10K_0402_5% W LAN_CLKREQ#

AW13 BD4 CLK_CNV_PRX_DTX_N

no follow naming CNP-H

RH26 2 1 1K_0402_5% PCH_SPI_IO3

PCH PLTRST Buffer RH32 1 @ 2 0_0402_5%

note : 1050 Use 8M rom

RH55 2 1 1K_0402_5% W AKE#

RH56 2 1 8.2K_0402_5% PM_BATLOW # +3VALW _DSW PM_SLP_S3# RH193 1 2 100K_0201_5%

+3VALW _PCH_PRIM PCH_PW ROK RH223 1 2 10K_0402_5%

100K_0402_5% 1 @ 2 RH184 SYS_PW ROK

100K_0402_5% 1 @ 2 RH61 PCH_DPW ROK

RH191 2 1 2.2K_0402_5% D_CK_SCLK XEMC@

XEMC@ PCH_VRALERT# RH62 2 @ 1 10K_0402_5%

RH232 2 1 2.2K_0402_5% PCH_SML1CLK

Security Classification Compal Secret Data Compal Electronics, Inc.

GPU_EVENT_R# 1 @ 2 GPU_EVENT# CPU_ID RH208 1 H82@ 2 1K_0402_5%

FOR 40 PIN SUB/B +1.8VALW _PRIM

VGA_ID1 RH84 1 @ 2 1K_0402_5% PROJECT_ID0 RH88 1 @ 2 1K_0402_5%

RH87 1 2 10K_0402_5% RH91 1 2 10K_0402_5%