ACTIVITY NO.

2
Computer Architecture
ICS 222(LAB)
2:30-4:00 MTh

Submitted by:
Blanco, Jose Mari
Garcia, Kevin
Gragasin, Mark Jr.
Manangan, Jeremy

BSCS 2
I. MEMORY UNIT
A. RAM
 Semiconductor memories where all read and write functions are performed.
 It is a volatile memory which needs constant supply of power to store data. All data
will be lost when power is turned off.
 Random Access Memory: Can access any memory cell directly
 An IC made of millions of transistors and capacitors

TYPES OF RAM
SRAM: Static RAM
􀁺 Uses multiple transistors, typically four to six, for each memory cell (a bit)
􀁺 Used primarily for cache, registers in main storage units and processors
􀁺 Created with a circuit called ‘flip-flop’ which preserves status of data inside the circuit.
􀁺 Data is not lost therefore refresh is unnecessary resulting in higher processing speed.
􀁺 Cost is high because the circuits are complicated and memory capacity is smaller than
DRAM

DRAM: Dynamic RAM

􀁺 Cost low because circuit is simple and small
􀁺 A transistor and a capacitor are paired to create a memory cell (a bit)
􀁺 The capacitor holds the bit of information and acts as a switch for read and write
􀁺 Needs constant charge to store data
􀁺 The problem with the capacitor is that its value leaks with time
􀁺 Memory is refreshed at regular intervals which affects performance speed
􀁺 Refresh operation happens automatically 1000s of times/sec – as such, it is ‘dynamic’
􀁺 Used in storage units of computers, printers and other devices

SDRAM: Synchronous DRAM

􀁺 High speed DRAM
􀁺 Developed to keep up with the operating speed of processors
􀁺 Takes advantage of the burst mode concept by staying on the row containing the
requested bit and moving rapidly through the columns, reading each bit as it goes
􀁺 The idea is that most of the time the data needed by the CPU will be in sequence
􀁺 SDRAM is about five percent faster than EDO RAM
􀁺 Maximum transfer rate to L2 cache ≈ 528MBps

RDRAM: Rambus DRAM

􀁺 A radical departure from the previous DRAM architecture
􀁺 Uses a Rambus in-line memory module (RIMM)
􀁺 Use of a special high-speed data bus called the Rambus channel
􀁺 RDRAM memory chips work in parallel to achieve
a data rate of 800 MHz

VRAM: Video RAM

􀁺 Also known as Multiport dynamic random access memory (MPDRAM)
􀁺 Used specifically for video adapters or 3-D accelerators

Other Types of RAM

􀁺 FPM DRAM: Fast page mode DRAM
􀁺 It waits for the first bit of data to be located and read before it looks for the next bit
􀁺 Maximum transfer rate to L2 cache ≈ 176MBps

􀁺 EDO RAM: Extended data-out DRAM

􀁺 As soon as the address of the first bit is located, it begins looking for the next bit
􀁺 It is about five percent faster than FPM DRAM
􀁺 Maximum transfer rate to L2 cache ≈ 264MBps

B. ROM
 Read-only memory, also known as firmware
 Instructions are written in ROM by the firm or manufacturer of the chip.
 Data stored in such chip is non-volatile
 Data stored in these chips is either unchangeable or requires a special operation to
change

TYPES OF ROM
ROM
􀁺 Also known as ‘mask’ ROM
􀁺 Firmware – a program used to start a computer, etc
􀁺 User cannot add any programs or data
􀁺 Used in memories of games, software etc.

PROM
􀁺 Has a grid of columns and rows just as ordinary ROM
􀁺 Every intersection of a column and row has a fuse connecting them
􀁺 The higher voltage breaks the connection between the column and row by burning out the
fuse
􀁺 Programmable read-only memory can only be programmed once
􀁺 Inexpensive
􀁺 Great for prototyping the data for a ROM before committing to the costly ROM fabrication
process

EPROM
􀁺 Erasable programmable read-only memory
􀁺 Can be rewritten many times
􀁺 Similar to PROM, except that the intersection can be charged to create barrier for signal
transmission
􀁺 Incremental changes cannot be done
􀁺 Ultraviolet light is used to erase the chip

EEPROM
􀁺 Electrically erasable programmable read-only memory
􀁺 Incremental changes can be done
􀁺 Electric field is used to alter the data
􀁺 Slow as only one byte can be changed each time

Flash Memory
􀁺 Similar to EEPROM
􀁺 Uses in-circuit wiring to erase by applying an electrical field to the entire chip or to
predetermined sections of the chip called blocks
􀁺 Chunk of 512 bytes data can be altered each time

II. PC WIZARD RESULTS

General Information :
DIMM 1 (RAS 1, RAS 0) : 512 (Double Bank)
DIMM 2 : Empty

Information SPD EEPROM (DIMM 1) :

Manufacturer : Kingston
Part Number :K
Serial Number : 702AD7ED
Type : DDR-SDRAM PC-3200 (200MHz) - [DDR-400]
Size : 512MB (2 rows, 4 banks)
Module Buffered : No
Module Registered : No
Module SLi Ready (EPP) : No
Width : 64-bit
Error Correction Capability (EC... No
Max. Burst Length : 8
Refresh : Reduced (.5x)7.8 µs, Self Refreshµs
Voltage : SSTL 2.5vv
Prefetch Buffer : 2-bit
Supported Frequencies : 133MHz, 166MHz, 200MHz
CAS Latency (tCL) : 2 clocks @ 133MHz, 2.5 clocks @ 166MHz, 3 clocks @ 200MHz
RAS to CAS (tRCD) : 2 clocks @ 133MHz, 3 clocks @ 166MHz, 3 clocks @ 200MHz
RAS Precharge (tRP) : 2 clocks @ 133MHz, 3 clocks @ 166MHz, 3 clocks @ 200MHz
Cycle Time (tRAS) : 6 clocks @ 133MHz, 7 clocks @ 166MHz, 8 clocks @ 200MHz

Memory Controller Information :

Memory Controller : SIMM, DIMM, SDRAM
Number of connectors : 2
Max. Module Size : 1024MB
Max. Memory Size : 2048MB
Supported Speed : 70ns, 60ns, 50ns
Supported Voltages : 2.9v
Error Detection Method : No
Error Correction Capability : None
Current/Supported Interleave : 1-way/1-way