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5 4 3 2 1

AMD S1 PROCESSOR UNBUFFERED


DDR II 400/533/667 DDR2 NEAR
EXTERNAL CLOCK GENERATOR 638-Pin uFCPGA 638 SODIMM 9,10
5,6,7,8

Ver 2.0 HyperTransport 200-PIN DDR2 SODIMM

OUT
D
ICS951462 LINK0 16x16 D

IN
16 UNBUFFERED
DDR2 FAR
SODIMM 9,10
LVDS CON LVDS
15 ATI NB - RSRS485M 200-PIN DDR2 SODIMM

HyperTransport LINK0 CPU I/F


INTEGRATED GRAPHICS CRT VGA CON
BOOTSTRAPS I2C I/F LVDS/TVOUT/TMDS 15
ROM(DNI)
13 1 X16 PCIE VIDEO/SDVO I/F
1 X4 PCIE I/F WITH SB
2(4) X1 PCIE I/F

X1 PCIE INTERFACE
11,12,13,14

C
PCIE C

RTL8111B
NEW CARD PCIE ETHERNET X2
23 X1 25

ATI SB - SB460
NewCard MiniPCI USBPORT USBPORT USBPORT
USB#3 USB#4 USB#2 USB#1 USB#0 USB 2.0 USB 2.0 (8 PORTS)
23 28 28 28 28
SATA (4 PORTS) AZALIA CODEC AZALIA
HD AUDIO I/F CONNECTOR
DNI DNI DNI AZALIA HD AUDIO 26 27
USB#7 USB#6 USB#5
AC97 2.3
ATA 66/100/133
SPI I/F
SATA I/F SATA_HDD
LPC I/F SATA#0 29
ACPI 2.0
INT RTC OZ128
BOOTSTRAPS I2C I/F PCI 1394 &
ROM (SB) 21
HW MONITOR CARDREADER 22

B
PCI/PCI BDGE B

SECONDARY PCI BUS 17, 18, 19, 20, 21

MINIPCI SLOT LPC BUS


30

BATTERY CHAGER CPU CORE POWER CPU MEMORY POWER KBC ENE3910
41 36 38 31

PS2 ISA I/F


SYSTEM MAIN POWER CPU&RS485 HT RS485 CORE
37 VLDT POWER 35 POWER 39
KBD
MOUSE BIOS DISCHARGE CIRCUIT RESET,FAN,SPKR
52 & ENABLES 42
31 34
A
SB460 & PCIE POWER A

39

MICRO-STAR INT'L CO.,LTD.


Title

BLOCK DIAGRAM
Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 1 of 44
5 4 3 2 1
5 4 3 2 1

TABLE OF CONTENTS
P01: BLOCK DIAGRAM P28: USB2.0 CON x 3 / Camera DESKTOP MODE LAPTOP MODE DESKTOP MODE LAPTOP MODE
POWER RAIL POWER RAIL
P02: TABLE OF CONTENTS P29: HDD & CDROM CONN. S0 S1 S3 S4 S5 S0 S1 S3 S4 S5 S0 S1 S3 S4 S5 S0 S1 S3 S4 S5
+12V_ATX +12V ON ON OFF OFF OFF OFF OFF OFF OFF OFF VCC_NB +1.2V ON ON OFF OFF OFF ON ON OFF OFF OFF
P03: POWER DELIVERY CHART P30: MiniPCI/BlueTooth(6855B)
-12V_ATX -12V ON ON OFF OFF OFF OFF OFF OFF OFF OFF VDDA_1V2 +1.2V ON ON OFF OFF OFF ON ON OFF OFF OFF
P04: CLOCK DISTRIBUTION P31: KBC (ENE3910) & ISA BIOS
+5VALW_ATX +5V ON ON ON ON ON OFF OFF OFF OFF OFF VDDA18 +1.8V ON ON OFF OFF OFF ON ON OFF OFF OFF
P05: Socket S1 HT I/F P32: LED & LAUNCH Key
D
+3.3VALW_ATX +3.3V ON ON ON ON ON OFF OFF OFF OFF OFF VDD18 +1.8V ON ON OFF OFF OFF ON ON OFF OFF OFF D
P06: Socket S1 DDRII MEMORY I/F P33: POWER GOOD
+5VDUAL_ATX +5V ON ON ON ON ON OFF OFF OFF OFF OFF VDDR3 +3.3V ON ON OFF OFF OFF ON ON OFF OFF OFF
P07: Socket S1 CTRL P34: SYSTEM & CPU FAN
+3.3VDUAL_ATX +3.3V ON ON ON ON ON OFF OFF OFF OFF OFF VDDR +1.8V ON ON OFF OFF OFF ON ON OFF OFF OFF
P08: Socket S1 PWR & GND P35: M_1.2V VDDA 2.5V VLDT
+5V_ATX +5V ON ON OFF OFF OFF OFF OFF OFF OFF OFF CPU_VDDIO_SUS +1.8V ON ON ON OFF OFF ON ON ON OFF OFF
P09: DDR2 SODIMMS: A/B CHANNEL P36: VCORE
+3.3V_ATX +3.3V ON ON OFF OFF OFF OFF OFF OFF OFF OFF CPU_M_VREF_SUS +0.9V ON ON ON OFF OFF ON ON ON OFF OFF
P10: DDR2 SODIMMS TERMINATIONS P37: SYSTEM POWER 3/5VSUS
+VDC +12V OFF OFF OFF OFF OFF ON ON ON ON ON MEM_M_VREF_SUS+0.9V ON ON ON OFF OFF ON ON ON OFF OFF
P11: RS485-HT LINK0 I/F P38: DDR2 1.8V VTT 0.9V
+VIN +12V ON ON OFF OFF OFF ON ON OFF OFF OFF CPU_VTT_SUS +0.9V ON ON ON OFF OFF ON ON ON OFF OFF
P12: RS485-PCIE LINK I/F P39: VCC_NB 1.2V 1.8V 1.5VRUN
+5VALW_NTB +5V OFF OFF OFF OFF OFF ON ON ON ON ON +VIN_MEM +12V/+5V ON ON ON OFF OFF ON ON ON OFF OFF
P13: RS485-SYSTEM I/F & CLKGEN P40: M_Battery select
+3.3VALW_NTB +3.3V OFF OFF OFF OFF OFF ON ON ON ON ON A_VBAT +3.0V ON ON ON ON ON ON ON ON ON ON
P14: RS485-POWER P41: M_Battery Charger
+5VSUS_NTB +5V OFF OFF OFF OFF OFF ON ON ON OFF OFF VCC_SB +1.2V ON ON OFF OFF OFF ON ON OFF OFF OFF
P15: LVDS & INVERTER P43: PCB IMPEDANCE JUMP
+3.3VSUS_NTB +3.3V OFF OFF OFF OFF OFF ON ON ON OFF OFF PCIE_VDDR +1.2V ON ON OFF OFF OFF ON ON OFF OFF OFF
P16: CLOCK GENERATOR(ICS951462) P43: CPU CORE PWR
+5V_NTB +5V OFF OFF OFF OFF OFF ON ON OFF OFF OFF AVDD_USB +3.3V ON ON ON OFF OFF ON ON ON OFF OFF
P17: SB460-PCIE/PCI/CPU/LPC
+3.3V_NTB +3.3V OFF OFF OFF OFF OFF ON ON OFF OFF OFF +3.3V_AVDDC +3.3V ON ON ON OFF OFF ON ON ON OFF OFF
P18: SB460-ACPI/GPIO/USB/AUDIO
+5VALW +5V ON ON ON ON ON ON ON ON ON ON PLLVDD_ATA +1.2V ON ON OFF OFF OFF ON ON OFF OFF OFF
P19: SB460-SATA/IDE/HWM/SPI
+3.3VALW +3.3V ON ON ON ON ON ON ON ON ON ON XTLVDD_ATA +3.3V ON ON OFF OFF OFF ON ON OFF OFF OFF
P20: SB460-POWER & DECOUPLING
C
+1.2VALW +1.2V ON ON ON ON ON ON ON ON ON ON AVDD_HWM +3.3V ON ON OFF OFF OFF ON ON OFF OFF OFF C
P21: SB460-STRAPS
+5VSUS +5V ON ON ON OFF OFF ON ON ON OFF OFF AVDDCK_3.3V +3.3V ON ON OFF OFF OFF ON ON OFF OFF OFF
P22: PCI/1394/FLASH CARD(OZ128)
+3.3VSUS +3.3V ON ON ON OFF OFF ON ON ON OFF OFF AVDDCK_1.2 +1.2V ON ON OFF OFF OFF ON ON OFF OFF OFF
P23: NEWCARD & MDC CONN
+5V +5V ON ON OFF OFF OFF ON ON OFF OFF OFF +1.2V_USB_PHY +1.2V ON ON ON ON ON ON ON ON ON ON
P24: DVI
+3.3V +3.3V ON ON OFF OFF OFF ON ON OFF OFF OFF VCC_AUDIO +5V ON ON OFF OFF OFF ON ON OFF OFF OFF
P25: PCIE GIGALAN(RTL8111B)
CPU_VDD_RUN VID[5:0] ON ON OFF OFF OFF ON ON OFF OFF OFF +3.3V_NC +3.3V ON ON OFF OFF OFF ON ON OFF OFF OFF
P26: Audio(ALC882)
VLDT_RUN +1.05V ON ON OFF OFF OFF ON ON OFF OFF OFF +1.5V_NC +1.5V ON ON OFF OFF OFF ON ON OFF OFF OFF
P27: AMP(FAN7031)HP & Mic
CPU_VCCA_RUN +1.5V ON ON OFF OFF OFF ON ON OFF OFF OFF +3.3VSUS_NC +3.3V ON ON ON OFF OFF ON ON ON OFF OFF

BOWFIN POWER ON/OFF SEQUENCE (ACPI_S3=LOW) DEFAULT JUMPER SETTING FOR POWER ON PCI DEVICES IRQ TABLE
t10=50mS
t8=10mS
t6=50uS

t7=10mS

t9=10mS
wait PSON#

t3=50uS+t_vdda_gd

t5=5mS+t_vldt_gd

DEVICE IDSEL# REQ/GNT# PCI INT CLOCK


t1=50uS
t2=50uS

t4=50uS

JUMPER DEF. FUNCTION


t1=1uS

t=50mS

ENE ASIC8M

SIO_PSON# NB VGA N/A N/A A


ATX_PSON#
JU600 1-2 CMOS NORMAL MODE OR CLEAR CMOS
SB AD31(INT) N/A N/A
ATX_PWRGD
JU601 2-3 SELECT SB600 DEBUG BUS STRAPS OR IGNORE THEM
ATA100 AD31 N/A A INT
B VDIMM_DUAL_EN
JU602 1-2 SELECT SB600 BIOS FLASH TYPE B
AC97/AZALIA AD31 N/A B INT
VDDA_EN_OD
JU603 2-3 SELECT SB600 STRAPS FOR PCIE
USB AD30 N/A D INT
VCORE_EN_OD SW600 OPEN SELECT SATA IS[1:0]: CLOSED HIGH; OPEN LOW PCI SLOT2 AD23 2 G PCI_CLK7
VCORE_GD SW601 OPEN SELECT SATA IS[3:2]: CLOSED HIGH; OPEN LOW PCI SLOT1 AD22 1 F PCI_CLK1
VLDT_EN_OD SW1100 OPEN SELECT LCD PANEL ID LCD_ID[1:0]: CLOSED LOW; OPEN HIGH PCI SLOT0 AD21 0 E PCI_CLK0
CPU_PWRGD_OD SW1101 OPEN SELECT LCD PANEL ID LCD_ID[3:2]: CLOSED LOW; OPEN HIGH MINI PCI SLOT AD20 3 E,F PCI_CLK2
VRM_PWRGD SW2700 1-2 SELECT CPU MODE: 1-2 PERFORMANCE MODE; 2-3 BATTERY MODE
VDRAM_PWRGD SW2800 OPEN SELECT CPU VID[5:2]: CLOSED LOW; OPEN HIGH
NB_PWRGD SW2801 OPEN SELECT CPU VID[1:0]: CLOSED LOW; OPEN HIGH
SMBUS TABLE
SB_PWRGD
SOURCE SIGNAL NAME LINKED DEVICES
SW3100 1-2 SELECT LAPTOP/DESKTOP MODE: 1-2 DESKTOP MODE; 2-3 LAPTOP MODE
ALL_POWERGOOD SW3101 OPEN RESET BUTTON NB DAC_SCL/DAC_SDAT CRT/LVDS
PCI_RST# SW3102 OPEN POWER-ON BUTTON I2C_CLK/I2C_DATA LVDS/TMDS
RESET_CPU_L I2C_CLK/DDC_DATA GFX X16
SB SCLK0/SDATA0 SO-DIMMs/CLK_GEN/CNR CON
EXT CLKx
/LPC SLOT/BAT CHG/THERM_SENSOR
SCLK1/SDATA1 GB ETH/GPP X1/NEW CARD
A AMD CPU POWER A
VDDA_2.5V_RUN what's /PCI SLOTs
VDD_CORE_RUN that?
VDDHT
NB RS690/485 POWER
VDDR3,VDDR,VDDA18
AVDD,AVDDQ
VDDA12,VCC_NB,HTPVDD
MICRO-STAR INT'L CO.,LTD.
SB SB600/460 POWER Title
+3.3V_SB,+1.8V_SB
AVDD_CK TABLE OF CONTENTS
+3.3VALW_SB Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 2 of 44
5 4 3 2 1
5 4 3 2 1

SB SB460 +5V 1.5V SW CPU_VDDA_RUN (S0, S1)


+3.3VALW_NTB REGULATOR AMD CPU

+3.3VSUS_NTB +VIN VCCA 2.5V


BATTERY

CHARGER
BATTERY
CPU_VDD_RUN (S0, S1)
+VDC MAIN PWR SW +5V SW REGULATOR VDDCORE
REGULATOR
+5VALW_NTB 0.375-1.500V 30A
+5VSUS_NTB +VIN
VLDT 1.2V SW VLDT_RUN (S0, S1) VLDT 1.2V 3A
D +5V NB RS485 D
REGULATOR
+3.3V_NTB

SWITCH
HT VLDT 1.2V 1A

SWITCH
+3.3VALW

POWER SWITCH
+VIN
+/-5%
PWR
CPU

NB CORE SW VCC_NB (S0, S1)


12V

+5V_NTB NB CORE 10A


+5V REGULATOR
PCI-E CORE
+3.3VSUS +VIN &PCI-E IO 3.5A
+VIN_MEM PCIE&SB SW VDDA_1V2(S0, S1)
SW HTPLL (1.8V) 200mA
+/-5%

+5V REGULATOR
12V

PLL & DAC-Q(1.8V)


+5VSUS +3.3V 200mA
+5V 1.8V SW +1.8V(S0, S1) TRANSFORMER
REGULATOR
ATX POWER SUPPLY

400mA
+/-5%
5VSB

+5VALW_ATX +3.3V AVDD (S0, S1) DAC 300mA


+5VALW
+5VDUAL_ATX
SW
+/-5%

+5V_ATX +5VSUS
DDRII SODIMMX2
5V

+3.3VALW LDO +3.3VALW_ATX +VIN CPU_VDDIO_SUS (S0, S1, S3)


1.8V VDD&VTT VDD MEM 4A
REGULATOR
+5V +5VSUS SW REGULATOR CPU_VTT_SUS (S0, S1)
+/-5%

+3.3VDUAL_ATX
3.3V

SW VTT_MEM 0.5A

VCC_SB (S0, S1)


C C

+3.3V_ATX
+/-5%
-12V

X4 PCI-E 0.8A
ATA I/O 0.2A
ATA PLL 0.01A
PCI-E PVDD 80mA
SB CORE 0.6A
CONTROL SIGNAL: +3.3VALW 1.2V LDO +1.2VALW 1.2V S5 PW 0.22A
MOBILE: BATTERY REGULATOR
+3.3V 3.3V I/O 0.45A
DESKTOP: ATX +3.3VALW 3.3V S5 PW 0.01A
+5V USB CORE I/O 0.2A

MINI PCI SLOT GBIT ENTHENET


+3.3V 3.3V(S0, S1)1.5A 3.3V 0.5A
B +5V 5V (S0, S1) 0.1A (S0, S1, S3, S4, S5) B

+3.3VALW 3.3V(S3, S5) 0.2A


+VIN PCI-E CARD
1.5V (S0, S1) 0.7A
3.3V (S3, S5) 0.3A
+3.3V 3.3V (S0, S1) 1.3A
+5V

+5VALW SUPER I/O


PCI Slot (per slot) X1 PCIE per X16 PCIE CNR CONNECTOR
+3.3VDUAL (S3) 0.01A
5V 5.0A 3.3V 3.0A 3.3V 3.0A 5V 1.0A +3.3V (S0, S1) 0.01A
USB X7 FR USB X2 RL 2XPS/2
3.3V 7.6A 3.3V 1.0A +5V (S0, S1) 0.1A
12V 0.5A 12V 5.5A
12V 0.5A 12V 0.5A VDD VDD 5VDual
3.3Vaux 0.1A
3.3Vaux 0.375A 3.3Vaux 1.0A 5VDual 5VDual HD CODEC
1.0A
-12V 0.1A -12V 0.1A 3.5A 1.0A 3.3V CORE 0.3A
5VDual 0.5A 5V ANALOG 0.1A
A A

MICRO-STAR INT'L CO.,LTD.


Title

POWER DELIVERY CHART


Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 3 of 44
5 4 3 2 1
5 4 3 2 1

D D

PCI CLK0
PCI SLOT0
33MHZ

PCI CLK1
PCI SLOT1
33MHZ

HTREFCLK PCI CLK2


MINI PCI SLOT
66MHZ 33MHZ
ATI NB - RS485M ATI SB
NB-OSC PCI CLK3 KB_CLK
KEYBOARD
14.318MHZ SB460 33MHZ SUPER IO
C
NEAR SO-DIMM REV SO-DIMM SUPER IO CLK IT8712F MS_CLK C
48MHZ MOUSE

14.318MHZ
SB-OSCIN
TVCLKIN
TVCLKIN
2 PAIR MEM CLK

2 PAIR MEM CLK

NB PCIE CLK PCI CLK4


LPC SLOT
100MHZ 33MHZ
SB PCIE CLK
100MHZ PCI CLK5
SB-OSCIN SB-OSCIN LPC BIOS
EXTERNAL 33MHZ
14.318MHZ 14.318MHZ
CLK GEN.
PCIE CLK PCI CLK6
DEBUG POST
100MHZ PCIE GFX SLOT - 16 LANES 33MHZ
ATHLON64 S1 CPU 1 PAIR CPU CLK
200MHZ PCIE CLK
100MHZ PCI CLK7
LGA638 PACKAGE PCIE GPP SLOT 1 - 1 LANE PCI SLOT2
33MHZ
PCIE CLK
100MHZ PCIE GPP SLOT 2 - 1 LANE AZALIA_BITCLK
AZALIA CODEC
PCIE CLK
100MHZ PCI EXPRESS CARD - 1 LANE
B B

25M Hz
PCIE CLK 25MHZ OSC INPUT
GIGABIT ETHERNET - 1 LANE
100MHZ

PCIE CLK
100MHZ
USB CLK
48MHZ

32.768K Hz
SUPER IO CLK
48MHZ

14.31818MHz

A A

MICRO-STAR INT'L CO.,LTD.


Title

CLOCK DISTRIBUTION
Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 4 of 44
5 4 3 2 1
5 4 3 2 1

PROCESSOR HYPERTRANSPORT INTERFACE


VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
D
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE D

+VLDT
U1A
0922 by D4 AE5
VLDT_A3 VLDT_B3
harry D3 VLDT_A2 VLDT_B2 AE4
D2 AE3 4.7u_0805
VLDT_A1 VLDT_B1
D1 VLDT_A0 VLDT_B0 AE2 C1

11 HT_CADIN15_P N5 L0_CADIN_H15 L0_CADOUT_H15 T4 HT_CADOUT15_P 11


11 HT_CADIN15_N P5 L0_CADIN_L15 L0_CADOUT_L15 T3 HT_CADOUT15_N 11
11 HT_CADIN14_P M3 L0_CADIN_H14 L0_CADOUT_H14 V5 HT_CADOUT14_P 11
11 HT_CADIN14_N M4 L0_CADIN_L14 L0_CADOUT_L14 U5 HT_CADOUT14_N 11
L5 V4 +VLDT
11 HT_CADIN13_P L0_CADIN_H13 L0_CADOUT_H13 HT_CADOUT13_P 11
11 HT_CADIN13_N M5 L0_CADIN_L13 L0_CADOUT_L13 V3 HT_CADOUT13_N 11
C
11 HT_CADIN12_P K3 L0_CADIN_H12 L0_CADOUT_H12 Y5 HT_CADOUT12_P 11 C
11 HT_CADIN12_N K4 L0_CADIN_L12 L0_CADOUT_L12 W5 HT_CADOUT12_N 11
H3 AB5 4.7u_0805 0.22u_0603 0.01u_0402
11 HT_CADIN11_P L0_CADIN_H11 L0_CADOUT_H11 HT_CADOUT11_P 11
H4 AA5 C2 C3 C4 C5 C6 C7
11 HT_CADIN11_N L0_CADIN_L11 L0_CADOUT_L11 HT_CADOUT11_N 11
G5 AB4 4.7u_0805 0.22u_0603 0.01u_0402
11 HT_CADIN10_P L0_CADIN_H10 L0_CADOUT_H10 HT_CADOUT10_P 11
11 HT_CADIN10_N H5 L0_CADIN_L10 L0_CADOUT_L10 AB3 HT_CADOUT10_N 11
11 HT_CADIN9_P F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 HT_CADOUT9_P 11
11 HT_CADIN9_N F4 L0_CADIN_L9 L0_CADOUT_L9 AC5 HT_CADOUT9_N 11
11 HT_CADIN8_P E5 L0_CADIN_H8 L0_CADOUT_H8 AD4 HT_CADOUT8_P 11
11 HT_CADIN8_N F5 L0_CADIN_L8 L0_CADOUT_L8 AD3 HT_CADOUT8_N 11
11 HT_CADIN7_P N3
N2
L0_CADIN_H7 L0_CADOUT_H7 T1
R1
HT_CADOUT7_P 11 LAYOUT: Place bypass cap on topside of board
11 HT_CADIN7_N L0_CADIN_L7 L0_CADOUT_L7 HT_CADOUT7_N 11
11 HT_CADIN6_P L1 L0_CADIN_H6 L0_CADOUT_H6 U2 HT_CADOUT6_P 11 NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY
11 HT_CADIN6_N M1 L0_CADIN_L6 L0_CADOUT_L6 U3 HT_CADOUT6_N 11 TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
11 HT_CADIN5_P L3 L0_CADIN_H5 L0_CADOUT_H5 V1 HT_CADOUT5_P 11 TO OTHER HT POWER PINS
11 HT_CADIN5_N L2 L0_CADIN_L5 L0_CADOUT_L5 U1 HT_CADOUT5_N 11 PLACE CLOSE TO VLDT0 POWER PINS
11 HT_CADIN4_P J1 L0_CADIN_H4 L0_CADOUT_H4 W2 HT_CADOUT4_P 11
B 11 HT_CADIN4_N K1 L0_CADIN_L4 L0_CADOUT_L4 W3 HT_CADOUT4_N 11 B
11 HT_CADIN3_P G1 L0_CADIN_H3 L0_CADOUT_H3 AA2 HT_CADOUT3_P 11
11 HT_CADIN3_N H1 L0_CADIN_L3 L0_CADOUT_L3 AA3 HT_CADOUT3_N 11
11 HT_CADIN2_P G3 L0_CADIN_H2 L0_CADOUT_H2 AB1 HT_CADOUT2_P 11
11 HT_CADIN2_N G2 L0_CADIN_L2 L0_CADOUT_L2 AA1 HT_CADOUT2_N 11
11 HT_CADIN1_P E1 L0_CADIN_H1 L0_CADOUT_H1 AC2 HT_CADOUT1_P 11
11 HT_CADIN1_N F1 L0_CADIN_L1 L0_CADOUT_L1 AC3 HT_CADOUT1_N 11
11 HT_CADIN0_P E3 L0_CADIN_H0 L0_CADOUT_H0 AD1 HT_CADOUT0_P 11
11 HT_CADIN0_N E2 L0_CADIN_L0 L0_CADOUT_L0 AC1 HT_CADOUT0_N 11

11 HT_CLKIN1_P J5 L0_CLKIN_H1 L0_CLKOUT_H1 Y4 HT_CLKOUT1_P 11


11 HT_CLKIN1_N K5 L0_CLKIN_L1 L0_CLKOUT_L1 Y3 HT_CLKOUT1_N 11
11 HT_CLKIN0_P J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 HT_CLKOUT0_P 11
+VLDT J2 W1
11 HT_CLKIN0_N L0_CLKIN_L0 L0_CLKOUT_L0 HT_CLKOUT0_N 11

R1 51_0402 HT_CTLIN1_P P3 T5 HT_CPU_CTLOUT1_P TP1


R2 51_0402 HT_CTLIN1_N P4 L0_CTLIN_H1 L0_CTLOUT_H1 HT_CPU_CTLOUT1_N
L0_CTLIN_L1 L0_CTLOUT_L1 R5 TP2
A
N1 R2
MICRO-STAR INT'L CO.,LTD. A
11 HT_CTLIN0_P L0_CTLIN_H0 L0_CTLOUT_H0 HT_CTLOUT0_P 11
P1 R3 Title
11 HT_CTLIN0_N L0_CTLIN_L0 L0_CTLOUT_L0 HT_CTLOUT0_N 11
SOCKET S1 HT I/F
Athlon 64 S1 Size Document Number Rev
Processor Custom 2.0
Socket MS-10581
Date: Friday, May 26, 2006 Sheet 5 of 44
5 4 3 2 1
A B C D E

Processor DDR2 Memory Interface


VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE 9 MEM_MB_DATA[63..0] U1C MEM_MA_DATA[63..0] 9
MEM_MB_DATA63 AD11 AA12 MEM_MA_DATA63
MEM_MB_DATA62 MB_DATA63 MA_DATA63 MEM_MA_DATA62
AF11 MB_DATA62 MA_DATA62 AB12
MEM_MB_DATA61 AF14 AA14 MEM_MA_DATA61
MEM_MB_DATA60 MB_DATA61 MA_DATA61 MEM_MA_DATA60
AE14 MB_DATA60 MA_DATA60 AB14
MEM_MB_DATA59 Y11 W11 MEM_MA_DATA59
MEM_MB_DATA58 MB_DATA59 MA_DATA59 MEM_MA_DATA58
AB11 MB_DATA58 MA_DATA58 Y12
MEM_MB_DATA57 AC12 AD13 MEM_MA_DATA57
MEM_MB_DATA56 MB_DATA57 MA_DATA57 MEM_MA_DATA56
AF13 MB_DATA56 MA_DATA56 AB13
CPU_M_VREF_SUS MEM_MB_DATA55 AF15 AD15 MEM_MA_DATA55
4 CPU_VDDIO_SUS U1B CPU_VTT_SUS MEM_MB_DATA54 MB_DATA55 MA_DATA55 MEM_MA_DATA54 4
AF16 MB_DATA54 MA_DATA54 AB15
MEM_MB_DATA53 AC18 AB17 MEM_MA_DATA53
MEM_MB_DATA52 MB_DATA53 MA_DATA53 MEM_MA_DATA52
W17 MEMVREF VTT1 D10 AF19 MB_DATA52 MA_DATA52 Y17
CPU_VTT_SUS 1000p_0603 (DNI) C10 MEM_MB_DATA51 AD14 Y14 MEM_MA_DATA51
R3 SNS_+0.9VTT VTT2 MEM_MB_DATA50 MB_DATA51 MA_DATA51 MEM_MA_DATA50
Y10 VTT_SENSE VTT3 B10 AC14 MB_DATA50 MA_DATA50 W14
39.2_0402 1% AD10 C9 CI10 CI11 CI12 MEM_MB_DATA49 AE18 W16 MEM_MA_DATA49
C8 VTT4 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 MEM_MB_DATA48 MB_DATA49 MA_DATA49 MEM_MA_DATA48
VTT5 W10 AD18 MB_DATA48 MA_DATA48 AD17
M_ZN AE10 AC10 MEM_MB_DATA47 AD20 Y18 MEM_MA_DATA47
M_ZP MEMZN VTT6 MEM_MB_DATA46 MB_DATA47 MA_DATA47 MEM_MA_DATA46
AF10 MEMZP VTT7 AB10 AC20 MB_DATA46 MA_DATA46 AD19
AA10 EMI MEM_MB_DATA45 AF23 AD21 MEM_MA_DATA45
VTT8 MEM_MB_DATA44 MB_DATA45 MA_DATA45 MEM_MA_DATA44
VTT9 A10 AF24 MB_DATA44 MA_DATA44 AB21
MEM_MB_DATA43 AF20 AB18 MEM_MA_DATA43
R4 MEM_MB_DATA42 MB_DATA43 MA_DATA43 MEM_MA_DATA42
9,10 MEM_MA0_CS#3 V19 MA0_CS_L3 MA0_CLK_H2 Y16 MEM_MA0_CLK2_P 9 AE20 MB_DATA42 MA_DATA42 AA18
39.2_0402 1% J22 AA16 MEM_MB_DATA41 AD22 AA20 MEM_MA_DATA41
9,10 MEM_MA0_CS#2 MA0_CS_L2 MA0_CLK_L2 MEM_MA0_CLK2_N 9 MB_DATA41 MA_DATA41
V22 E16 MEM_MB_DATA40 AC22 Y20 MEM_MA_DATA40
9,10 MEM_MA0_CS#1 MA0_CS_L1 MA0_CLK_H1 MEM_MA0_CLK1_P 9 MB_DATA40 MA_DATA40
T19 F16 MEM_MB_DATA39 AE25 AA22 MEM_MA_DATA39
9,10 MEM_MA0_CS#0 MA0_CS_L0 MA0_CLK_L1 MEM_MA0_CLK1_N 9 MB_DATA39 MA_DATA39
MEM_MB_DATA38 AD26 Y22 MEM_MA_DATA38
MEM_MB_DATA37 MB_DATA38 MA_DATA38 MEM_MA_DATA37
9,10 MEM_MB0_CS#3 Y26 MB0_CS_L3 MB0_CLK_H2 AF18 MEM_MB0_CLK2_P 9 AA25 MB_DATA37 MA_DATA37 W21
PLACE THEM CLOSE TO J24 AF17 MEM_MB_DATA36 AA26 W22 MEM_MA_DATA36
9,10 MEM_MB0_CS#2 MB0_CS_L2 MB0_CLK_L2 MEM_MB0_CLK2_N 9 MB_DATA36 MA_DATA36
W24 A17 MEM_MB_DATA35 AE24 AA21 MEM_MA_DATA35
CPU WITHIN 1" 9,10 MEM_MB0_CS#1 MB0_CS_L1 MB0_CLK_H1 MEM_MB0_CLK1_P 9
MEM_MB_DATA34 MB_DATA35 MA_DATA35 MEM_MA_DATA34
9,10 MEM_MB0_CS#0 U23 MB0_CS_L0 MB0_CLK_L1 A18 MEM_MB0_CLK1_N 9 AD24 MB_DATA34 MA_DATA34 AB22
MEM_MB_DATA33 AA23 AB24 MEM_MA_DATA33
MEM_MB_DATA32 MB_DATA33 MA_DATA33 MEM_MA_DATA32
9,10 MEM_MB_CKE1 H26 MB_CKE1 MB0_ODT1 W23 MEM_MB0_ODT1 9,10 AA24 MB_DATA32 MA_DATA32 Y24
J23 W26 MEM_MB_DATA31 G24 H22 MEM_MA_DATA31
9,10 MEM_MB_CKE0 MB_CKE0 MB0_ODT0 MEM_MB0_ODT0 9,10 MB_DATA31 MA_DATA31
J20 V20 MEM_MB_DATA30 G23 H20 MEM_MA_DATA30
9,10 MEM_MA_CKE1 MA_CKE1 MA0_ODT1 MEM_MA0_ODT1 9,10 MB_DATA30 MA_DATA30
J21 U19 MEM_MB_DATA29 D26 E22 MEM_MA_DATA29
9,10 MEM_MA_CKE0 MA_CKE0 MA0_ODT0 MEM_MA0_ODT0 9,10 MB_DATA29 MA_DATA29
MEM_MB_DATA28 C26 E21 MEM_MA_DATA28
9,10 MEM_MA_ADD[15..0] MEM_MB_ADD[15..0] 9,10 MB_DATA28 MA_DATA28
MEM_MA_ADD15 K19 J25 MEM_MB_ADD15 MEM_MB_DATA27 G26 J19 MEM_MA_DATA27
MEM_MA_ADD14 MA_ADD15 MB_ADD15 MEM_MB_ADD14 MEM_MB_DATA26 MB_DATA27 MA_DATA27 MEM_MA_DATA26
K20 MA_ADD14 MB_ADD14 J26 G25 MB_DATA26 MA_DATA26 H24
MEM_MA_ADD13 V24 W25 MEM_MB_ADD13 MEM_MB_DATA25 E24 F22 MEM_MA_DATA25
MEM_MA_ADD12 MA_ADD13 MB_ADD13 MEM_MB_ADD12 MEM_MB_DATA24 MB_DATA25 MA_DATA25 MEM_MA_DATA24
K24 MA_ADD12 MB_ADD12 L23 E23 MB_DATA24 MA_DATA24 F20
MEM_MA_ADD11 L20 L25 MEM_MB_ADD11 MEM_MB_DATA23 C24 C23 MEM_MA_DATA23
MEM_MA_ADD10 MA_ADD11 MB_ADD11 MEM_MB_ADD10 MEM_MB_DATA22 MB_DATA23 MA_DATA23 MEM_MA_DATA22
R19 MA_ADD10 MB_ADD10 U25 B24 MB_DATA22 MA_DATA22 B22
MEM_MA_ADD9 L19 L24 MEM_MB_ADD9 MEM_MB_DATA21 C20 F18 MEM_MA_DATA21
MEM_MA_ADD8 MA_ADD9 MB_ADD9 MEM_MB_ADD8 MEM_MB_DATA20 MB_DATA21 MA_DATA21 MEM_MA_DATA20
L22 MA_ADD8 MB_ADD8 M26 B20 MB_DATA20 MA_DATA20 E18
MEM_MA_ADD7 L21 L26 MEM_MB_ADD7 MEM_MB_DATA19 C25 E20 MEM_MA_DATA19
MEM_MA_ADD6 MA_ADD7 MB_ADD7 MEM_MB_ADD6 MEM_MB_DATA18 MB_DATA19 MA_DATA19 MEM_MA_DATA18
M19 MA_ADD6 MB_ADD6 N23 D24 MB_DATA18 MA_DATA18 D22
MEM_MA_ADD5 M20 N24 MEM_MB_ADD5 MEM_MB_DATA17 A21 C19 MEM_MA_DATA17
3 MEM_MA_ADD4 MA_ADD5 MB_ADD5 MEM_MB_ADD4 MEM_MB_DATA16 MB_DATA17 MA_DATA17 MEM_MA_DATA16 3
M24 MA_ADD4 MB_ADD4 N25 D20 MB_DATA16 MA_DATA16 G18
MEM_MA_ADD3 M22 N26 MEM_MB_ADD3 MEM_MB_DATA15 D18 G17 MEM_MA_DATA15
MEM_MA_ADD2 MA_ADD3 MB_ADD3 MEM_MB_ADD2 MEM_MB_DATA14 MB_DATA15 MA_DATA15 MEM_MA_DATA14
N22 MA_ADD2 MB_ADD2 P24 C18 MB_DATA14 MA_DATA14 C17
MEM_MA_ADD1 N21 P26 MEM_MB_ADD1 MEM_MB_DATA13 D14 F14 MEM_MA_DATA13
MEM_MA_ADD0 MA_ADD1 MB_ADD1 MEM_MB_ADD0 MEM_MB_DATA12 MB_DATA13 MA_DATA13 MEM_MA_DATA12
R21 MA_ADD0 MB_ADD0 T24 C14 MB_DATA12 MA_DATA12 E14
MEM_MB_DATA11 A20 H17 MEM_MA_DATA11
MEM_MB_DATA10 MB_DATA11 MA_DATA11 MEM_MA_DATA10
9,10 MEM_MA_BANK2 K22 MA_BANK2 MB_BANK2 K26 MEM_MB_BANK2 9,10 A19 MB_DATA10 MA_DATA10 E17
R20 T26 MEM_MB_DATA9 A16 E15 MEM_MA_DATA9
9,10 MEM_MA_BANK1 MA_BANK1 MB_BANK1 MEM_MB_BANK1 9,10 MB_DATA9 MA_DATA9
T22 U26 MEM_MB_DATA8 A15 H15 MEM_MA_DATA8
9,10 MEM_MA_BANK0 MA_BANK0 MB_BANK0 MEM_MB_BANK0 9,10 MB_DATA8 MA_DATA8
MEM_MB_DATA7 A13 E13 MEM_MA_DATA7
MEM_MB_DATA6 MB_DATA7 MA_DATA7 MEM_MA_DATA6
9,10 MEM_MA_RAS# T20 MA_RAS_L MB_RAS_L U24 MEM_MB_RAS# 9,10 D12 MB_DATA6 MA_DATA6 C13
U20 V26 MEM_MB_DATA5 E11 H12 MEM_MA_DATA5
9,10 MEM_MA_CAS# MA_CAS_L MB_CAS_L MEM_MB_CAS# 9,10 MB_DATA5 MA_DATA5
U21 U22 MEM_MB_DATA4 G11 H11 MEM_MA_DATA4
9,10 MEM_MA_WE# MA_WE_L MB_WE_L MEM_MB_WE# 9,10 MB_DATA4 MA_DATA4
MEM_MB_DATA3 B14 G14 MEM_MA_DATA3
MEM_MB_DATA2 MB_DATA3 MA_DATA3 MEM_MA_DATA2
A14 MB_DATA2 MA_DATA2 H14
DDR II: CMD/CTRL/CLK MEM_MB_DATA1 A11 F12 MEM_MA_DATA1
MEM_MB_DATA0 MB_DATA1 MA_DATA1 MEM_MA_DATA0
C11 MB_DATA0 MA_DATA0 G12
Athlon 64 S1
Processor Socket 9 MEM_MB_DM[7..0] MEM_MA_DM[7..0] 9
MEM_MB_DM7 AD12 Y13 MEM_MA_DM7
MEM_MB_DM6 MB_DM7 MA_DM7 MEM_MA_DM6
AC16 MB_DM6 MA_DM6 AB16
MEM_MB_DM5 AE22 Y19 MEM_MA_DM5
MEM_MB_DM4 MB_DM5 MA_DM5 MEM_MA_DM4
AB26 MB_DM4 MA_DM4 AC24
MEM_MB_DM3 E25 F24 MEM_MA_DM3
MEM_MB_DM2 MB_DM3 MA_DM3 MEM_MA_DM2
A22 MB_DM2 MA_DM2 E19
MEM_MB_DM1 B16 C15 MEM_MA_DM1
MEM_MB_DM0 MB_DM1 MA_DM1 MEM_MA_DM0
A12 MB_DM0 MA_DM0 E12

9 MEM_MB_DQS7_P AF12 MB_DQS_H7 MA_DQS_H7 W12 MEM_MA_DQS7_P 9


9 MEM_MB_DQS7_N AE12 MB_DQS_L7 MA_DQS_L7 W13 MEM_MA_DQS7_N 9
9 MEM_MB_DQS6_P AE16 MB_DQS_H6 MA_DQS_H6 Y15 MEM_MA_DQS6_P 9
9 MEM_MB_DQS6_N AD16 MB_DQS_L6 MA_DQS_L6 W15 MEM_MA_DQS6_N 9
9 MEM_MB_DQS5_P AF21 MB_DQS_H5 MA_DQS_H5 AB19 MEM_MA_DQS5_P 9
9 MEM_MB_DQS5_N AF22 MB_DQS_L5 MA_DQS_L5 AB20 MEM_MA_DQS5_N 9
9 MEM_MB_DQS4_P AC25 MB_DQS_H4 MA_DQS_H4 AD23 MEM_MA_DQS4_P 9
9 MEM_MB_DQS4_N AC26 MB_DQS_L4 MA_DQS_L4 AC23 MEM_MA_DQS4_N 9
9 MEM_MB_DQS3_P F26 MB_DQS_H3 MA_DQS_H3 G22 MEM_MA_DQS3_P 9
9 MEM_MB_DQS3_N E26 MB_DQS_L3 MA_DQS_L3 G21 MEM_MA_DQS3_N 9
9 MEM_MB_DQS2_P A24 MB_DQS_H2 MA_DQS_H2 C22 MEM_MA_DQS2_P 9
2 A23 C21 2
9 MEM_MB_DQS2_N MB_DQS_L2 MA_DQS_L2 MEM_MA_DQS2_N 9
9 MEM_MB_DQS1_P D16 MB_DQS_H1 MA_DQS_H1 G16 MEM_MA_DQS1_P 9
9 MEM_MB_DQS1_N C16 MB_DQS_L1 MA_DQS_L1 G15 MEM_MA_DQS1_N 9
9 MEM_MB_DQS0_P C12 MB_DQS_H0 MA_DQS_H0 G13 MEM_MA_DQS0_P 9
9 MEM_MB_DQS0_N B12 MB_DQS_L0 MA_DQS_L0 H13 MEM_MA_DQS0_N 9

DDR: DATA
Athlon 64 S1
VDD_VREF_SUS_CPU Processor Socket

CPU_VDDIO_SUS CPU_M_VREF_SUS

9 MEM_MB0_CLK2_P
R5
1K_0402 1%
0922 by C13
harry 1.5p_0402
9 MEM_MB0_CLK2_N
PLACE CLOSE TO PROCESSOR
9 MEM_MB0_CLK1_P WITHIN 1.5 INCH
A1 A26
1n_0402
R6 C14 C15 C19
1K_0402 1%1n_0402 1.5p_0402
9 MEM_MB0_CLK1_N

Athlon 64 S1g1
uPGA638
Top View
9 MEM_MA0_CLK2_P
1 1
LAYOUT:PLACE CLOSE TO CPU
C20
1.5p_0402
9 MEM_MA0_CLK2_N AF1
PLACE CLOSE TO PROCESSOR
9 MEM_MA0_CLK1_P WITHIN 1.5 INCH

C21
1.5p_0402
9 MEM_MA0_CLK1_N MICRO-STAR INT'L CO.,LTD.
Title

SOCKET S1 DDR2 MEMORY I/F


Size Document Number Rev
C 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 6 of 44
A B C D E
5 4 3 2 1

LAYOUT: ROUTE VDDA TRACE APPROX.

+1.8VRUN +3VRUN CPU_VDDIO_SUS


50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG. +VDDA ATHLON Control and Debug CPU_VDDIO_SUS

CPU_VDDIO_SUS
4.7K_0603 (DNI) L1 +3VSUS
R7
R18
300_0402
R19
DNI C25 0.1u_0402 CPU_VDDA_2.5_RUN 300L600m
C22 C23 C24
change to 300 Ohm
R8 R9 R10
10K_0603

R11

B
5
4.7u_0805 3300p_0603 0.2u_0603 4.7K_0603
D 0R_0402 U1D 220_0402 220_0402 300_0402 D
18 SB_CPUPWRGD 2
4 R21 CPU_ALL_PWROK F8 AF6 CPU_THERMTRIP#_R E C
VDDA2 THERMTRIP_L CPU_THERMTRIP# 18
1 F9 VDDA1 PROCHOT_L AC7 CPU_PROCHOT#_1.8
U2 Q1
NC7SZ08M5X CPU_VDDIO_SUS 1027 Harry CPU_HT_RESET# B7
R12 300_0603 (DNI) R13 CPU_ALL_PWROK RESET_L SMBT3904

3
A7 PWROK
300_0402CPU_LDTSTOP# F10
R14 300_0402 LDTSTOP_L CPU_VID5
VID5 A5 CPU_VID5 36
CPU_SIC_R AF4 C6 CPU_VID4
+1.8VRUN CPU_SID_R SIC VID4 CPU_VID3 CPU_VID4 36
AF5 SID VID3 A6 CPU_VID3 36
A4 CPU_VID2
CPU_VDDIO_SUS R15 44.2_0603 1% VID2 CPU_VID1 CPU_VID2 36
+VLDT CPU_HTREF1 P6 C5
R16 44.2_0603 1% HT_REF1 VID1 CPU_VID0 CPU_VID1 36
CPU_HTREF0 R6 B5
R23 C28 0.1u_0402 HT_REF0 VID0 CPU_VID0 36
300_0402 AC6 CPU_PRESENT#
CPU_PRESENT_L
5

F6 CPU_VDDIO_SUS
36 CPU_VDD_RUN_FB_H VDD_FB_H
2 0R_0402 place them to CPU within 1" E6 A3 CPU_PSI#
13,18 LDT_STOP# CPU_LDTSTOP# 36 CPU_VDD_RUN_FB_L VDD_FB_L PSI_L CPU_PSI# 36
4 R24
1 TP3 CPU_VDDIO_SUS_FB_H W9
U3 TP4 CPU_VDDIO_SUS_FB_L VDDIO_FB_H R17
Y9 VDDIO_FB_L
NC7SZ08M5X 10K_0603
C26 3.9n_0602 CPU_CLKIN_SC_P
3

16 CPUCLK A9 CLKIN_H
CPU_CLKIN_SC_N A8

B
CLKIN_L
C C
R20 TP5 CPU_DBRDY G10 E10 CPU_DBREQ#
+1.8VRUN 169_0402 1% DBRDY DBREQ_L CPU_PROCHOT#_1.8 E C CPU_PROCHOT# 36
CPU_TMS AA9
CPU_VDDIO_SUS
16 CPUCLK#
C27 3.9n_0602 CPU_TCK AC9
TMS
TCK
JTAC TDO AE9 CPU_TDO
TP6
Q2
CPU_TRST# AD9
R25 C29 0.1u_0402 CPU_TDI TRST_L SMBT3904
AF9 TDI
300_0402
5

CPU_TEST25_H_BYPASSCLK_H E9 C9 CPU_TEST29_H_FBCLKOUT_P R22 80.6_0603 1%


0R_0402 CPU_TEST25_L_BYPASSCLK_L TEST25_H TEST29_H CPU_TEST29_L_FBCLKOUT_N
17 LDT_RST# 2 E8 TEST25_L TEST29_L C8 ROUTE AS 80 Ohm DIFFERENTIAL PAIR
4 R26 CPU_HT_RESET# CPU_TEST19_PLLTEST0 G9 PLACE IT CLOSE TO CPU WITHIN 1"
R27 0R_0402 CPU_TEST18_PLLTEST1 TEST19
33,36 VDD_PG 1 H10 TEST18
U4 AA7
NC7SZ08M5X TEST13
C2 TEST9
TP7
3

D7 TEST17 TEST24 AE7


TP9 E7 AD7 TP8
TP11 TEST16 TEST23 TP10
F7 TEST15 TEST22 AE8
TP13 C7 AB8 TP12 CPU_TEST21_SCANEN
CPU_VDDIO_SUS TP14 TEST14 TEST21
AC8 TEST12 TEST20 AF7
TP15
TP16 C3 J7
TP18 TEST7 TEST28_H TP17
AA6 TEST6 TEST28_L H8
RN1 8P4R-10K_RN0402 R38 +3VRUN CPU_TEST5_THERMDC W7 AF8 TP19
T_CRIT_CPU# 10K_0603 CPU_TEST4_THERMDA THERMDC TEST27 TP20CPU_TEST26_BURNIN# CPU_VDDIO_SUS
1 2 W8 THERMDA TEST26 AE6
4 CPU_THRM_ALERT- TP21
B CPU_PH_G

B +3VSUS 3 Y6 TEST3 TEST10 K8 B


5 6 SMB_THRMCPU_DATA TP22 AB6 TEST2 TEST8 C4
7 8 SMB_THRMCPU_CLK R42
4.7K_0603 TP23 P20 H16 TP24 CPU_DBREQ# R28 510_0402
TP25 RSVD0 RSVD8 TP26 CPU_TMS R29 510_0402
P19 RSVD1 RSVD9 B18
TP27 N20 CPU_TCK R30 510_0402
TP28 RSVD2 TP29 CPU_TRST# R31 510_0402
N19 RSVD3 RSVD10 B3
C1 TP30 CPU_TDI R33 510_0402
CPU_PROCHOT#_1.8 RSVD11 CPU_TEST26_BURNIN# R34 300_0402
E C SB_TALERT# 18
H6 TP31 CPU_PRESENT# R35 1K_0402
Q3 RSVD12 TP32 CPU_TEST25_H_BYPASSCLK_H R36 510_0402
RSVD13 G6
D5 TP33
1029 connect to SUS power SMBT3904 RSVD14
Cap close to R24 TP34 CPU_TEST21_SCANEN R37 300_0402
1110 Albert RSVD15 TP35 CPU_TEST25_L_BYPASSCLK_L R39 510_0402
thermal RSVD16 W18
TP36 R26 R23 TP37 CPU_TEST19_PLLTEST0 R40 300_0402
+3VSUS RSVD4 RSVD17
sensor TP38 R25 RSVD5 RSVD18 AA8 TP39 CPU_TEST18_PLLTEST1 R41 300_0402
TP40 P22 H18 TP41
CPU_TEST4_THERMDA U5 TP42 RSVD6 RSVD19 TP43
R22 RSVD7 RSVD20 H19
1 8 SMB_THRMCPU_CLK
VDD SMBCLK SMB_THRMCPU_CLK 31
C30
2200p_0402 2 7 SMB_THRMCPU_DATA MISC
D+ SMBDATA SMB_THRMCPU_DATA 31
CPU_TEST5_THERMDC 3 6 AMD NPT S1 SOCKET
D- ALERT# CPU_THRM_ALERT- 31 Processor Socket
A A

33 T_CRIT_CPU# 4 T_CRIT_A# GND 5


R32 0_0603
C31 LM86CIMMXNOPB_MSOP8-RH
MICRO-STAR INT'L CO.,LTD.
0.1u_0402 Close to CPU socket Title

SOCKET S1 CTRL
Size Document Number Rev
B 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 7 of 44
5 4 3 2 1
5 4 3 2 1

U1F
AA4 VSS1 VSS66 J6
AA11 VSS2 VSS67 J8
AA13 VSS3 VSS68 J10
AA15 VSS4 VSS69 J12
AA17 VSS5 VSS70 J14
CPU_VDD_RUN CPU_VDD_RUN
U1E
AA19
AB2
VSS6
VSS7
VSS71
VSS72
J16
J18 BOTTOMSIDE DECOUPLING
AC4 VDD1 VDD43 V12 AB7 VSS8 VSS73 K2
AD2 VDD2 VDD44 V14 AB9 VSS9 VSS74 K7
G4 VDD3 VDD45 W4 AB23 VSS10 VSS75 K9
D D
H2 VDD4 VDD46 Y2 AB25 VSS11 VSS76 K11
J9 J15 AC11 K13 CPU_VDD_RUN
VDD5 VDD47 VSS12 VSS77
J11 VDD6 VDD48 K16 AC13 VSS13 VSS78 K15
J13 VDD7 VDD49 L15 AC15 VSS14 VSS79 K17
K6 VDD8 VDD50 M16 AC17 VSS15 VSS80 L6
K10 P16 AC19 L8 22u_0805 22u_0805 22u_0805 22u_0805 22u_0805
VDD9 VDD51 VSS16 VSS81 C32 C33 C34 C35 C36 C37 C38 C39 C40
K12 VDD10 VDD52 T16 AC21 VSS17 VSS82 L10
K14 U15 AD6 L12 22u_0805 22u_0805 22u_0805 22u_0805
VDD11 VDD53 VSS18 VSS83
L4 VDD12 VDD54 V16 AD8 VSS19 VSS84 L14
L7 CPU_VDDIO_SUS AD25 L16
VDD13 VSS20 VSS85
L9 VDD14 AE11 VSS21 VSS86 L18
L11 VDD15 VDDIO1 H25 AE13 VSS22 VSS87 M7
L13 J17 AE15 M9 CPU_VDD_RUN CPU_VDD_RUN
VDD16 VDDIO2 VSS23 VSS88
M2 VDD17 VDDIO3 K18 AE17 VSS24 VSS89 M11
M6 VDD18 VDDIO4 K21 AE19 VSS25 VSS90 M17
M8 VDD19 VDDIO5 K23 AE21 VSS26 VSS91 N4
M10 K25 AE23 N8 0.22u_0603 0.01u_0402
VDD20 VDDIO6 VSS27 VSS92 C41 C42 C43 C44 C807 C808 C809 C810 C811
N7 VDD21 VDDIO7 L17 B4 VSS28 VSS93 N10
N9 M18 B6 N16 0.22u_0603 0.01u_0402 1n_0402 1n_0402 1n_0402 1n_0402 1n_0402
VDD22 VDDIO8 VSS29 VSS94
N11 VDD23 VDDIO9 M21 B8 VSS30 VSS95 N18
P8 VDD24 VDDIO10 M23 B9 VSS31 VSS96 P2
P10 VDD25 VDDIO11 M25 B11 VSS32 VSS97 P7
R4 VDD26 VDDIO12 N17 B13 VSS33 VSS98 P9
C R7 VDD27 VDDIO13 P18 B15 VSS34 VSS99 P11 C
R9 P21 B17 P17 CPU_VDDIO_SUS
VDD28 VDDIO14 VSS35 VSS100
R11 VDD29 VDDIO15 P23 B19 VSS36 VSS101 R8
T2 VDD30 VDDIO16 P25 B21 VSS37 VSS102 R10
T6 VDD31 VDDIO17 R17 B23 VSS38 VSS103 R16
T8 T18 B25 R18 0.22u_0603
VDD32 VDDIO18 VSS39 VSS104 C45 C46 C47 C48
T10 VDD33 VDDIO19 T21 D6 VSS40 VSS105 T7
T12 T23 D8 T9 22u_0805 22u_0805 0.22u_0603
VDD34 VDDIO20 VSS41 VSS106
T14 VDD35 VDDIO21 T25 D9 VSS42 VSS107 T11
U7 VDD36 VDDIO22 U17 D11 VSS43 VSS108 T13
U9 VDD37 VDDIO23 V18 D13 VSS44 VSS109 T15
U11 VDD38 VDDIO24 V21 D15 VSS45 VSS110 T17
U13 VDD39 VDDIO25 V23 D17 VSS46 VSS111 U4
V6 VDD40 VDDIO26 V25 D19 VSS47 VSS112 U6
V8 VDD41 VDDIO27 Y25 D21 VSS48 VSS113 U8
V10 VDD42 D23 VSS49 VSS114 U10
D25 U12
POWER E4
F2
VSS50
VSS51
VSS115
VSS116 U14
U16
DECOUPLING BETWEEN PROCESSOR AND DIMMs
Athlon 64 S1 VSS52 VSS117
F11 U18
Processor
Socket
F13
VSS53
VSS54
VSS118
VSS119 V2 PLACE CLOSE TO PROCESSOR AS POSSIBLE
A1 A26 F15
F17
VSS55 VSS120 V7
V9
VSS56 VSS121 CPU_VDDIO_SUS
F19 VSS57 VSS122 V11
B F21 VSS58 VSS123 V13 B
F23 VSS59 VSS124 V15
F25 VSS60 VSS125 V17
H7 W6 4.7u_0805 0.22u_0603 0.22u_0603 0.01u_0402 0.01u_0402
VSS61 VSS126
Athlon 64 S1g1 H9 VSS62 VSS127 Y21 C49 C50 C51 C52 C53 C54 C55 C56 C57 C58 C59 C60
H21 Y23 4.7u_0805 4.7u_0805 4.7u_0805 0.22u_0603 0.22u_0603 0.01u_0402
VSS63 VSS128 0.01u_0402
uPGA638 H23
J4
VSS64 VSS129 N6
VSS65
Top View GROUND
CPU_VTT_SUS
Athlon 64 S1
Processor
Socket
4.7u_0805 0.22u_0603 0.22u_0603 1n_0402 1n_0402 0.01u_0402 0.01u_0402
AF1 C61 C62 C63 C64 C65 C66 C67 C68 C69 C70 C71 C72 C73 C74 C75 C76
4.7u_0805 4.7u_0805 4.7u_0805 0.22u_0603 0.22u_0603 1n_0402 1n_0402 0.01u_0402 0.01u_0402
CPU_VDD_RUN

CI77 CI78 CI79 CI80 CI81 CI82 CI83 CI84 CI85 CI86 CI87
A 0.01u_0402 0.01u_0402 0.01u_0402 0.01u_0402 A
0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402

MICRO-STAR INT'L CO.,LTD.


Title
EMI
SOCKET S1 PWR & GND
Size Document Number Rev

5 4
PROCESSOR POWER AND GROUND 3 2
B

Date:
MS-10581
Friday, May 26, 2006 Sheet
1
8 of 44
2.0
5 4 3 2 1

CPU_VDDIO_SUS

103
104
111
112
117
118
CPU_VDDIO_SUS

81
82
87
88
95
96
J1
6,10 MEM_MB_ADD[15..0] MEM_MB_DATA[63..0] 6
MEM_MB_ADD0 102 5 MEM_MB_DATA0

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
MEM_MB_ADD1 A0 DQ0 MEM_MB_DATA1
101 A1 DQ1 7
MEM_MB_ADD2 100 17 MEM_MB_DATA2
A2 DQ2

103
104
111
112
117
118
MEM_MB_ADD3 MEM_MB_DATA3

81
82
87
88
95
96
99 A3 DQ3 19
J2 MEM_MB_ADD4 98 4 MEM_MB_DATA4
6,10 MEM_MA_ADD[15..0] MEM_MA_DATA[63..0] 6 A4 DQ4
MEM_MA_ADD0 102 5 MEM_MA_DATA0 MEM_MB_ADD5 97 6 MEM_MB_DATA5

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
MEM_MA_ADD1 A0 DQ0 MEM_MA_DATA1 MEM_MB_ADD6 A5 DQ5 MEM_MB_DATA6
101 A1 DQ1 7 94 A6 DQ6 14
MEM_MA_ADD2 100 17 MEM_MA_DATA2 MEM_MB_ADD7 92 16 MEM_MB_DATA7
MEM_MA_ADD3 A2 DQ2 MEM_MA_DATA3 MEM_MB_ADD8 A7 DQ7 MEM_MB_DATA8
99 A3 DQ3 19 93 A8 DQ8 23
MEM_MA_ADD4 98 4 MEM_MA_DATA4 MEM_MB_ADD9 91 25 MEM_MB_DATA9
D MEM_MA_ADD5 A4 DQ4 MEM_MA_DATA5 MEM_MB_ADD10 A9 DQ9 MEM_MB_DATA10 D
97 A5 DQ5 6 105 A10 DQ10 35
MEM_MA_ADD6 94 14 MEM_MA_DATA6 MEM_MB_ADD11 90 37 MEM_MB_DATA11
MEM_MA_ADD7 A6 DQ6 MEM_MA_DATA7 MEM_MB_ADD12 A11 DQ11 MEM_MB_DATA12
92 A7 DQ7 16 89 A12 DQ12 20
MEM_MA_ADD8 93 23 MEM_MA_DATA8 MEM_MB_ADD13 116 22 MEM_MB_DATA13
MEM_MA_ADD9 A8 DQ8 MEM_MA_DATA9 MEM_MB_ADD14 A13 DQ13 MEM_MB_DATA14
91 A9 DQ9 25 86 A14/NC DQ14 36
MEM_MA_ADD10 105 35 MEM_MA_DATA10 MEM_MB_ADD15 84 38 MEM_MB_DATA15
MEM_MA_ADD11 A10 DQ10 MEM_MA_DATA11 A15/NC DQ15 MEM_MB_DATA16
90 A11 DQ11 37 6,10 MEM_MB_BANK[2..0] DQ16 43
MEM_MA_ADD12 89 20 MEM_MA_DATA12 MEM_MB_BANK0 107 45 MEM_MB_DATA17
MEM_MA_ADD13 A12 DQ12 MEM_MA_DATA13 MEM_MB_BANK1 BA0 DQ17 MEM_MB_DATA18
116 A13 DQ13 22 106 BA1 DQ18 55
MEM_MA_ADD14 86 36 MEM_MA_DATA14 MEM_MB_BANK2 85 57 MEM_MB_DATA19
MEM_MA_ADD15 A14/NC DQ14 MEM_MA_DATA15 BA2 DQ19 MEM_MB_DATA20
84 A15/NC DQ15 38 6 MEM_MB_DM[7..0] DQ20 44
43 MEM_MA_DATA16 MEM_MB_DM0 10 46 MEM_MB_DATA21
6,10 MEM_MA_BANK[2..0] DQ16 DM0 DQ21
MEM_MA_BANK0 107 45 MEM_MA_DATA17 MEM_MB_DM1 26 56 MEM_MB_DATA22
MEM_MA_BANK1 BA0 DQ17 MEM_MA_DATA18 MEM_MB_DM2 DM1 DQ22 MEM_MB_DATA23
106 BA1 DQ18 55 52 DM2 DQ23 58
MEM_MA_BANK2 85 57 MEM_MA_DATA19 MEM_MB_DM3 67 61 MEM_MB_DATA24
BA2 DQ19 MEM_MA_DATA20 MEM_MB_DM4 DM3 DQ24 MEM_MB_DATA25 CPU_VDDIO_SUS
6 MEM_MA_DM[7..0] DQ20 44 130 DM4 DQ25 63
MEM_MA_DM0 10 46 MEM_MA_DATA21 MEM_MB_DM5 147 73 MEM_MB_DATA26
MEM_MA_DM1 DM0 DQ21 MEM_MA_DATA22 MEM_MB_DM6 DM5 DQ26 MEM_MB_DATA27
26 DM1 DQ22 56 170 DM6 DQ27 75
MEM_MA_DM2 52 58 MEM_MA_DATA23 MEM_MB_DM7 185 62 MEM_MB_DATA28
MEM_MA_DM3 DM2 DQ23 MEM_MA_DATA24 DM7 DQ28 MEM_MB_DATA29 C778 0.1u_0402
67 DM3 DQ24 61 DQ29 64
MEM_MA_DM4 130 63 MEM_MA_DATA25 CPU_VDDIO_SUS 13 74 MEM_MB_DATA30
DM4 DQ25 6 MEM_MB_DQS0_P DQS0 DQ30
MEM_MA_DM5 147 73 MEM_MA_DATA26 31 76 MEM_MB_DATA31 C779 0.1u_0402
DM5 DQ26 6 MEM_MB_DQS1_P DQS1 DQ31
MEM_MA_DM6 170 75 MEM_MA_DATA27 51 123 MEM_MB_DATA32
DM6 DQ27 6 MEM_MB_DQS2_P DQS2 DQ32
MEM_MA_DM7 185 62 MEM_MA_DATA28 70 125 MEM_MB_DATA33 C780 0.1u_0402
DM7 DQ28 6 MEM_MB_DQS3_P DQS3 DQ33
64 MEM_MA_DATA29 C781 0.1u_0402 131 135 MEM_MB_DATA34
DQ29 6 MEM_MB_DQS4_P DQS4 DQ34
13 74 MEM_MA_DATA30 148 137 MEM_MB_DATA35 C782 0.1u_0402
6 MEM_MA_DQS0_P DQS0 DQ30 6 MEM_MB_DQS5_P DQS5 DQ35
31 76 MEM_MA_DATA31 C783 0.1u_0402 169 124 MEM_MB_DATA36
6 MEM_MA_DQS1_P DQS1 DQ31 6 MEM_MB_DQS6_P DQS6 DQ36
51 123 MEM_MA_DATA32 188 126 MEM_MB_DATA37 C784 0.1u_0402
6 MEM_MA_DQS2_P DQS2 DQ32 6 MEM_MB_DQS7_P DQS7 DQ37
70 125 MEM_MA_DATA33 C785 0.1u_0402 134 MEM_MB_DATA38
6 MEM_MA_DQS3_P DQS3 DQ33 DQ38
131 135 MEM_MA_DATA34 11 136 MEM_MB_DATA39 C786 0.1u_0402
C 6 MEM_MA_DQS4_P DQS4 DQ34 6 MEM_MB_DQS0_N DQS0 DQ39 C
148 137 MEM_MA_DATA35 C787 0.1u_0402 29 141 MEM_MB_DATA40
6 MEM_MA_DQS5_P DQS5 DQ35 6 MEM_MB_DQS1_N DQS1 DQ40
169 124 MEM_MA_DATA36 49 143 MEM_MB_DATA41 C788 0.1u_0402
6 MEM_MA_DQS6_P DQS6 DQ36 6 MEM_MB_DQS2_N DQS2 DQ41
188 126 MEM_MA_DATA37 C789 0.1u_0402 68 151 MEM_MB_DATA42
6 MEM_MA_DQS7_P DQS7 DQ37 6 MEM_MB_DQS3_N DQS3 DQ42
134 MEM_MA_DATA38 129 153 MEM_MB_DATA43 C790 0.1u_0402
DQ38 6 MEM_MB_DQS4_N DQS4 DQ43
11 136 MEM_MA_DATA39 C791 0.1u_0402 146 140 MEM_MB_DATA44
6 MEM_MA_DQS0_N DQS0 DQ39 6 MEM_MB_DQS5_N DQS5 DQ44
29 141 MEM_MA_DATA40 167 142 MEM_MB_DATA45 C792 0.1u_0402
6 MEM_MA_DQS1_N DQS1 DQ40 6 MEM_MB_DQS6_N DQS6 DQ45
49 143 MEM_MA_DATA41 C793 0.1u_0402 186 152 MEM_MB_DATA46
6 MEM_MA_DQS2_N DQS2 DQ41 6 MEM_MB_DQS7_N DQS7 DQ46
68 151 MEM_MA_DATA42 154 MEM_MB_DATA47 C794 0.1u_0402
6 MEM_MA_DQS3_N DQS3 DQ42 DQ47
129 153 MEM_MA_DATA43 C795 0.1u_0402 157 MEM_MB_DATA48
6 MEM_MA_DQS4_N DQS4 DQ43 DQ48
146 140 MEM_MA_DATA44 30 159 MEM_MB_DATA49 C796 0.1u_0402
6 MEM_MA_DQS5_N DQS5 DQ44 6 MEM_MB0_CLK1_P CK0 DQ49
167 142 MEM_MA_DATA45 C797 0.1u_0402 32 173 MEM_MB_DATA50
6 MEM_MA_DQS6_N DQS6 DQ45 6 MEM_MB0_CLK1_N CK0 DQ50
186 152 MEM_MA_DATA46 164 175 MEM_MB_DATA51 C798 0.1u_0402
6 MEM_MA_DQS7_N DQS7 DQ46 6 MEM_MB0_CLK2_P CK1 DQ51
154 MEM_MA_DATA47 C799 0.1u_0402 166 158 MEM_MB_DATA52
DQ47 6 MEM_MB0_CLK2_N CK1 DQ52
157 MEM_MA_DATA48 160 MEM_MB_DATA53
DQ48 MEM_MA_DATA49 C800 0.1u_0402 DQ53 MEM_MB_DATA54
6 MEM_MA0_CLK1_P 30 CK0 DQ49 159 6,10 MEM_MB_CKE0 79 CKE0 DQ54 174

SO-DIMM(RVS)
32 173 MEM_MA_DATA50 80 176 MEM_MB_DATA55
6 MEM_MA0_CLK1_N CK0 DQ50 6,10 MEM_MB_CKE1 CKE1 DQ55
164 175 MEM_MA_DATA51 C801 0.1u_0402 179 MEM_MB_DATA56
6 MEM_MA0_CLK2_P CK1 DQ51 DQ56
166 158 MEM_MA_DATA52 108 181 MEM_MB_DATA57
6 MEM_MA0_CLK2_N CK1 DQ52 6,10 MEM_MB_RAS# RAS DQ57
160 MEM_MA_DATA53 113 189 MEM_MB_DATA58
DQ53 6,10 MEM_MB_CAS# CAS DQ58
79 174 MEM_MA_DATA54 109 191 MEM_MB_DATA59
6,10 MEM_MA_CKE0 CKE0 DQ54 6,10 MEM_MB_WE# WE DQ59
80 176 MEM_MA_DATA55 110 180 MEM_MB_DATA60
6,10 MEM_MA_CKE1 CKE1 DQ55 6,10 MEM_MB0_CS#0 S0 DQ60
179 MEM_MA_DATA56 115 182 MEM_MB_DATA61
DQ56 6,10 MEM_MB0_CS#1 S1 DQ61
108 181 MEM_MA_DATA57 192 MEM_MB_DATA62
6,10 MEM_MA_RAS# RAS DQ57 DQ62
113 189 MEM_MA_DATA58 114 194 MEM_MB_DATA63
6,10 MEM_MA_CAS# CAS DQ58 6,10 MEM_MB0_ODT0 ODT0 DQ63
109 191 MEM_MA_DATA59 119
6,10 MEM_MA_WE# WE DQ59 6,10 MEM_MB0_ODT1 ODT1
SO-DIMM

110 180 MEM_MA_DATA60 50


6,10 MEM_MA0_CS#0 S0 DQ60 NC1
115 182 MEM_MA_DATA61 +3VRUN R43 4.7K_0603 198 69
6,10 MEM_MA0_CS#1 S1 DQ61 SA0 NC2
192 MEM_MA_DATA62 200 83
DQ62 SA1 NC3 MEM_MB0_CS#2 6,10
114 194 MEM_MA_DATA63 120
6,10 MEM_MA0_ODT0 ODT0 DQ63 NC4 MEM_MB0_CS#3 6,10
6,10 MEM_MA0_ODT1 119 ODT1 16,18,23 SDATA0 195 SDA NC/TEST 163
B B
(RVS)

NC1 50 16,18,23 SCLK0 197 SCL


198 SA0 NC2 69
200 83 +3VRUN 199
SA1 NC3 MEM_MA0_CS#2 6,10 VDDspd
NC4 120 MEM_MA0_CS#3 6,10
195 163 MEM_M_VREF_SUS 1 196
16,18,23 SDATA0 SDA NC/TEST VREF VSS56
16,18,23 SCLK0 197 SCL VSS55 193
2 VSS0 VSS54 190
+3VRUN 199 3 187
VDDspd VSS1 VSS53
8 VSS2 VSS52 184
MEM_M_VREF_SUS 1 196 9 183
VREF VSS56 VSS3 VSS51
VSS55 193 12 VSS4 VSS50 178
2 190 15 177 CPU_VDDIO_SUS
3
8
VSS0
VSS1
VSS54
VSS53 187
184 CPU_VDDIO_SUS
MEM_VREF_SUS 18
21
VSS5
VSS6
VSS49
VSS48 172
171
VSS2 VSS52 VSS7 VSS47
9 VSS3 VSS51 183 24 VSS8 VSS46 168
12 178 27 165 C802
VSS4 VSS50 VSS9 VSS45 C803
15 VSS5 VSS49 177 28 VSS10 VSS44 162
18 VSS6 VSS48 172 33 VSS11 VSS43 161
21 171 R44 MEM_M_VREF_SUS 34 156 47UF_1210
VSS7 VSS47 1K_0402 1% VSS12 VSS42 47UF_1210
24 VSS8 VSS46 168 39 VSS13 VSS41 155
27 VSS9 VSS45 165 40 VSS14 VSS40 150
28 VSS10 VSS44 162 41 VSS15 VSS39 149
CPU_VDDIO_SUS 33 161 1% 0922 by 42 145
VSS11 VSS43 VSS16 VSS38
34 VSS12 VSS42 156 harry 47 VSS17 VSS37 144
39 155 48 139

VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS13 VSS41 VSS18 VSS36
40 VSS14 VSS40 150 53 VSS19 VSS35 138
41 149 1n_0402 1n_0402 54 133
C804 C805 VSS15 VSS39 R45 C88 C89 C90 C91 C92 VSS20 VSS34
42 VSS16 VSS38 145
1K_0402 1%1n_0402 0.1u_0402 1n_0402 DDR2_SODIMM_RVS_H=9.2mm

121
122
127
128
132
47 144

59
60
65
66
71
72
77
78
47UF_1210 47UF_1210 VSS17 VSS37
48 139
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33

A VSS18 VSS36 A
53 VSS19 VSS35 138
54 VSS20 VSS34 133
121
122
127
128
132
59
60
65
66
71
72
77
78

MICRO-STAR INT'L CO.,LTD.


DDR2_SODIMM_RVS_H=5.2mm LAYOUT: PLACE CLOSE TO DIMMs Title

DDR2 SODIMMS A/B CHANNEL


Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 9 of 44
5 4 3 2 1
5 4 3 2 1
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
EMI
8P4R-47_RN0402 CPU_VTT_SUS MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6
8P4R-47_RN0402
MEM_MA_ADD[15..0] 8P4R-47_RN0402
6,9 MEM_MA_ADD[15..0] MEM_MA_CKE0
MEM_MA_ADD15 1 2 RN2 C93 0.1u_0402
CPU_VDDIO_SUS
MEM_MA_ADD14 MEM_MA_ADD12 3 4 CI99 CI100 CI101 CI102 CI103 CI104 CI105
MEM_MA_ADD13 MEM_MA_BANK2 5 6 C94 0.1u_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402
MEM_MA_ADD12 MEM_MA_ADD8 7 8
MEM_MA_ADD11 MEM_MA_ADD9 1 2 RN3 C95 0.1u_0402
CPU_VDDIO_SUS MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13
MEM_MA_ADD10 MEM_MA_ADD3 3 4
D MEM_MA_ADD9 MEM_MA_ADD5 5 6 C96 0.1u_0402 D
MEM_MA_ADD8 MEM_MA_ADD2 7 8
MEM_MA_ADD7 MEM_MA_BANK0 1 2 RN4 C97 0.1u_0402
CPU_VDDIO_SUS
MEM_MA_ADD6 MEM_MA_ADD10 3 4 CI109 CI110 CI111 CI112 CI113 CI114 CI115
MEM_MA_ADD5 MEM_MA_WE# 5 6 C98 0.1u_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402
MEM_MA_ADD4 MEM_MA_CAS# 7 8
MEM_MA_ADD3 MEM_MA_ADD13 1 2 RN5 C106 0.1u_0402
CPU_VDDIO_SUS MEM_MA_ADD14 MEM_MA_ADD15 MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4
MEM_MA_ADD2 MEM_MA0_CS#3 3 4
MEM_MA_ADD1 MEM_MA0_ODT1 5 6 C107 0.1u_0402
MEM_MA_ADD0 7 8
MEM_MA_BANK[2..0]
6,9 MEM_MA_BANK[2..0]
MEM_MA_BANK2 MEM_MA_ADD15 1 2 RN6 C108 0.1u_0402 CI120 CI121 CI122 CI123 CI124 CI125 CI126
CPU_VDDIO_SUS
MEM_MA_BANK1 MEM_MA_ADD14 3 4 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402
MEM_MA_BANK0 MEM_MA_CKE1 5 6 C116 0.1u_0402
MEM_MA0_CS#2 7 8
MEM_MA_CAS# MEM_MA_ADD6 1 2 RN7 C117 0.1u_0402 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11
6,9 MEM_MA_CAS# CPU_VDDIO_SUS
MEM_MA_WE# MEM_MA_ADD4 3 4
6,9 MEM_MA_WE#
MEM_MA_RAS# MEM_MA_ADD11 5 6 C118 0.1u_0402
6,9 MEM_MA_RAS#
MEM_MA_ADD7 7 8
8P4R-47_RN0402 CI130 CI131 CI132 CI133 CI134 CI135 CI136
8P4R-47_RN0402 C119 0.1u_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402
CPU_VDDIO_SUS
MEM_MA0_CS#0 MEM_MA_RAS# 1 2 RN8
6,9 MEM_MA0_CS#0 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15 MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2
MEM_MA0_CS#1 MEM_MA_BANK1 3 4 C127 0.1u_0402
C 6,9 MEM_MA0_CS#1 C
MEM_MA0_CS#2 MEM_MA_ADD0 5 6
6,9 MEM_MA0_CS#2
MEM_MA0_CS#3 MEM_MA_ADD1 7 8 C128 0.1u_0402
6,9 MEM_MA0_CS#3 CPU_VDDIO_SUS
MEM_MA0_ODT0 1 2 RN9 CI137 CI138 CI139 CI140 CI141 CI142 CI143
6,9 MEM_MA0_ODT0 MEM_MA0_ODT1 MEM_MA0_ODT0 3 4 C129 0.1u_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402
6,9 MEM_MA0_ODT1 MEM_MA0_CS#1 5 6
MEM_MA0_CS#0 7 8
MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2 MEM_MA_CKE0 MEM_MA_CKE1 MEM_MB_CKE0 MEM_MB_CKE1
MEM_MA_CKE1
6,9 MEM_MA_CKE1 MEM_MA_CKE0 8P4R-47_RN0402
6,9 MEM_MA_CKE0
8P4R-47_RN0402
8P4R-47_RN0402 CI146 CI147 CI148 CI149 CI150 CI151 CI152
8P4R-47_RN0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402
8P4R-47_RN0402
8P4R-47_RN0402 MEM_MA_CAS# MEM_MA_WE# MEM_MA_RAS# MEM_MB_CAS# MEM_MB_WE# MEM_MB_RAS# MEM_MA0_CS#0
CPU_VTT_SUS

MEM_MB_ADD[15..0]
6,9 MEM_MB_ADD[15..0] MEM_MB_CKE0
MEM_MB_ADD15 1 2 RN11 C144 0.1u_0402 CI156 CI157 CI158 CI159 CI160 CI161 CI162
CPU_VDDIO_SUS
MEM_MB_ADD14 MEM_MB_BANK2 3 4 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402
MEM_MB_ADD13 MEM_MB0_CS#2 5 6 C145 0.1u_0402
MEM_MB_ADD12 MEM_MB_ADD12 7 8 MEM_MA0_CS#1 MEM_MA0_CS#2 MEM_MA0_CS#3 MEM_MB0_CS#0 MEM_MB0_CS#1 MEM_MB0_CS#2 MEM_MB0_CS#3
MEM_MB_ADD11 MEM_MB_ADD9 1 2 RN12 C153 0.1u_0402
CPU_VDDIO_SUS
MEM_MB_ADD10 MEM_MB_ADD7 3 4
B MEM_MB_ADD9 MEM_MB_ADD8 5 6 C154 0.1u_0402 B
MEM_MB_ADD8 MEM_MB_ADD3 7 8 CI166 CI167 CI168 CI169 CI170 CI171 CI172
MEM_MB_ADD7 MEM_MB_ADD5 1 2 RN13 C155 0.1u_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402 10pf_0402
CPU_VDDIO_SUS
MEM_MB_ADD6 MEM_MB_ADD1 3 4
MEM_MB_ADD5 MEM_MB_ADD10 5 6 C163 0.1u_0402 MEM_MA0_ODT0 MEM_MA0_ODT1 MEM_MB0_ODT0 MEM_MB0_ODT1
MEM_MB_ADD4 MEM_MB_WE# 7 8
MEM_MB_ADD3 MEM_MB_CAS# 1 2 RN14 C164 0.1u_0402
CPU_VDDIO_SUS
MEM_MB_ADD2 MEM_MB0_CS#1 3 4
MEM_MB_ADD1 MEM_MB_ADD13 5 6 C165 0.1u_0402 CI177 CI178 CI179 CI180
MEM_MB_ADD0 7 8 10pf_0402 10pf_0402 10pf_0402 10pf_0402
MEM_MB_BANK[2..0]
6,9 MEM_MB_BANK[2..0]
MEM_MB_BANK2 MEM_MB_ADD11 1 2 RN15 C173 0.1u_0402
CPU_VDDIO_SUS
MEM_MB_BANK1 MEM_MB_ADD14 3 4
MEM_MB_BANK0 MEM_MB_ADD15 5 6 C174 0.1u_0402
MEM_MB_CKE1 7 8
MEM_MB_CAS# MEM_MB_ADD0 1 2 RN16 C175 0.1u_0402
6,9 MEM_MB_CAS# MEM_MB_WE# CPU_VDDIO_SUS
MEM_MB_ADD2 3 4
6,9 MEM_MB_WE# MEM_MB_RAS# MEM_MB_ADD6 5 6 C176 0.1u_0402
6,9 MEM_MB_RAS#
MEM_MB_ADD4 7 8

8P4R-47_RN0402 C181 0.1u_0402


CPU_VDDIO_SUS
8P4R-47_RN0402
MEM_MB0_CS#0 MEM_MB0_CS#0 1 2 RN17
6,9 MEM_MB0_CS#0 MEM_MB0_CS#1 MEM_MB_RAS# 3 4 C182 0.1u_0402
A 6,9 MEM_MB0_CS#1 MEM_MB0_CS#2 A
MEM_MB_BANK1 5 6
6,9 MEM_MB0_CS#2 MEM_MB0_CS#3 MEM_MB_BANK0 7 8 C183 0.1u_0402
6,9 MEM_MB0_CS#3 CPU_VDDIO_SUS
1 2 RN18
MEM_MB0_ODT0
6,9 MEM_MB0_ODT0 MEM_MB0_ODT1
MEM_MB0_CS#3
MEM_MB0_ODT0
3
5
4
6 C184 0.1u_0402
MICRO-STAR INT'L CO.,LTD.
6,9 MEM_MB0_ODT1
MEM_MB0_ODT1 7 8 Title

MEM_MB_CKE1
DDR2 SODIMMS TERMINATIONS
Size Document Number Rev
6,9 MEM_MB_CKE1 MEM_MB_CKE0 Custom 2.0
6,9 MEM_MB_CKE0
MS-10581
Date: Friday, May 26, 2006 Sheet 10 of 44
5 4 3 2 1
5 4 3 2 1

U6A

5 HT_CADOUT15_P R19 HT_RXCAD15P HT_TXCAD15P P21 HT_CADIN15_P 5


D 5 HT_CADOUT15_N R18 HT_RXCAD15N PART 1 OF 5 HT_TXCAD15N P22 HT_CADIN15_N 5 D
5 HT_CADOUT14_P R21 HT_RXCAD14P HT_TXCAD14P P18 HT_CADIN14_P 5
5 HT_CADOUT14_N R22 HT_RXCAD14N HT_TXCAD14N P19 HT_CADIN14_N 5
5 HT_CADOUT13_P U22 HT_RXCAD13P HT_TXCAD13P M22 HT_CADIN13_P 5
5 HT_CADOUT13_N U21 HT_RXCAD13N HT_TXCAD13N M21 HT_CADIN13_N 5
5 HT_CADOUT12_P U18 HT_RXCAD12P HT_TXCAD12P M18 HT_CADIN12_P 5
5 HT_CADOUT12_N U19 HT_RXCAD12N HT_TXCAD12N M19 HT_CADIN12_N 5
5 HT_CADOUT11_P W19 HT_RXCAD11P HT_TXCAD11P L18 HT_CADIN11_P 5
5 HT_CADOUT11_N W20 HT_RXCAD11N HT_TXCAD11N L19 HT_CADIN11_N 5
5 HT_CADOUT10_P AC21 HT_RXCAD10P HT_TXCAD10P G22 HT_CADIN10_P 5
5 HT_CADOUT10_N AB22 HT_RXCAD10N HT_TXCAD10N G21 HT_CADIN10_N 5
5 HT_CADOUT9_P AB20 HT_RXCAD9P HT_TXCAD9P J20 HT_CADIN9_P 5
5 HT_CADOUT9_N AA20 HT_RXCAD9N HT_TXCAD9N J21 HT_CADIN9_N 5

HYPER TRANSPORT CPU


5 HT_CADOUT8_P AA19 HT_RXCAD8P HT_TXCAD8P F21 HT_CADIN8_P 5
5 HT_CADOUT8_N Y19 HT_RXCAD8N HT_TXCAD8N F22 HT_CADIN8_N 5

5 HT_CADOUT7_P T24 HT_RXCAD7P HT_TXCAD7P N24 HT_CADIN7_P 5


5 HT_CADOUT7_N R25 HT_RXCAD7N HT_TXCAD7N N25 HT_CADIN7_N 5
C
5 HT_CADOUT6_P U25 HT_RXCAD6P HT_TXCAD6P L25 HT_CADIN6_P 5 C
5 HT_CADOUT6_N U24 HT_RXCAD6N HT_TXCAD6N M24 HT_CADIN6_N 5
5 HT_CADOUT5_P V23 HT_RXCAD5P HT_TXCAD5P K25 HT_CADIN5_P 5
5 HT_CADOUT5_N U23 HT_RXCAD5N HT_TXCAD5N K24 HT_CADIN5_N 5
5 HT_CADOUT4_P V24 HT_RXCAD4P HT_TXCAD4P J23 HT_CADIN4_P 5
5 HT_CADOUT4_N V25 HT_RXCAD4N HT_TXCAD4N K23 HT_CADIN4_N 5
5 HT_CADOUT3_P AA25 HT_RXCAD3P HT_TXCAD3P G25 HT_CADIN3_P 5
5 HT_CADOUT3_N AA24 HT_RXCAD3N HT_TXCAD3N H24 HT_CADIN3_N 5
5 HT_CADOUT2_P AB23 HT_RXCAD2P HT_TXCAD2P F25 HT_CADIN2_P 5
5 HT_CADOUT2_N AA23 HT_RXCAD2N HT_TXCAD2N F24 HT_CADIN2_N 5
5 HT_CADOUT1_P AB24 HT_RXCAD1P HT_TXCAD1P E23 HT_CADIN1_P 5
5 HT_CADOUT1_N AB25 HT_RXCAD1N HT_TXCAD1N F23 HT_CADIN1_N 5
5 HT_CADOUT0_P AC24 HT_RXCAD0P HT_TXCAD0P E24 HT_CADIN0_P 5
5 HT_CADOUT0_N AC25 HT_RXCAD0N HT_TXCAD0N E25 HT_CADIN0_N 5

5 HT_CLKOUT1_P W21 HT_RXCLK1P HT_TXCLK1P L21 HT_CLKIN1_P 5


5 HT_CLKOUT1_N W22 HT_RXCLK1N HT_TXCLK1N L22 HT_CLKIN1_N 5
B B
Y24 J24

I/F
5 HT_CLKOUT0_P HT_RXCLK0P HT_TXCLK0P HT_CLKIN0_P 5
5 HT_CLKOUT0_N W25 HT_RXCLK0N HT_TXCLK0N J25 HT_CLKIN0_N 5

5 HT_CTLOUT0_P P24 HT_RXCTLP HT_TXCTLP N23 HT_CTLIN0_P 5


5 HT_CTLOUT0_N P25 HT_RXCTLN HT_TXCTLN P23 HT_CTLIN0_N 5
R46 49.9_0402 HT_RXCALP A24 C25 HT_TXCALP R47 100_0402
R48 49.9_0402 HT_RXCALN C24 HT_RXCALP HT_TXCALP
D24 HT_TXCALN
+1.2VRUN HT_RXCALN HT_TXCALN

harry RS485M_A12
1025

A
MICRO-STAR INT'L CO.,LTD. A
Title

RS485M HT LINK I/F


Size Document Number Rev
A 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 11 of 44
5 4 3 2 1
5 4 3 2 1

U6B

G5 GFX_RX0P PART 2 OF 5 GFX_TX0P J1


G4 GFX_RX0N GFX_TX0N H2
J8 GFX_RX1P GFX_TX1P K2
J7 GFX_RX1N GFX_TX1N K1
J4 GFX_RX2P GFX_TX2P K3
D
J5 GFX_RX2N GFX_TX2N L3 D
L8 GFX_RX3P GFX_TX3P L1
L7 GFX_RX3N GFX_TX3N L2
L4 GFX_RX4P GFX_TX4P N2
L5 N1 17 A_RX2P R53 0R_0402 (DNI) GPP_RX0P_R
GFX_RX4N GFX_TX4N R54 0R_0402 (DNI) GPP_RX0N_R
M8 GFX_RX5P GFX_TX5P P2 17 A_RX2N
M7 GFX_RX5N GFX_TX5N P1
M4 P3 17 A_RX3P R55 0R_0402 (DNI) GPP_RX1P_R
GFX_RX6P GFX_TX6P R56 0R_0402 (DNI) GPP_RX1N_R
M5 GFX_RX6N GFX_TX6N R3 17 A_RX3N
P8 GFX_RX7P GFX_TX7P R1
P7 R2 C193 0.01u_0402 (DNI)GPP_TX0P_C
GFX_RX7N GFX_TX7N 17 A_TX2P
P4 T2 C194 0.01u_0402 (DNI)GPP_TX0N_C
GFX_RX8P GFX_TX8P 17 A_TX2N
P5 GFX_RX8N GFX_TX8N U1
R4 V2 C195 0.01u_0402 (DNI)GPP_TX1P_C
GFX_RX9P GFX_TX9P 17 A_TX3P
R5 V1 C196 0.01u_0402 (DNI)GPP_TX1N_C
GFX_RX9N GFX_TX9N 17 A_TX3N
R7 GFX_RX10P GFX_TX10P V3
R8 GFX_RX10N GFX_TX10N W3
U4 W1

PCIE I/F
GFX_RX11P GFX_TX11P
C U5 GFX_RX11N GFX_TX11N W2 NOTE: RS485 4-LANE ALINK CONFIGURATION C
W4 GFX_RX12P GFX_TX12P Y2
W5 AA1 Change them to
GFX_RX12N GFX_TX12N
Y4
Y5
GFX_RX13P GFX GFX_TX13P AA2
AB2
10nF ==>ATI
GFX_RX13N GFX_TX13N
V9 GFX_RX14P GFX_TX14P AB1
W9 GFX_RX14N GFX_TX14N AC1
AB7 GFX_RX15P GFX_TX15P AE3
AB6 GFX_RX15N GFX_TX15N AE4

GPP_RX0P_R W11 AD8 GPP_TX0P_C


GPP_RX0N_R GPP_RX0P GPP_TX0P GPP_TX0N_C
W12 GPP_RX0N GPP_TX0N AE8

GPP_RX1P_R AA11 AD7 GPP_TX1P_C


GPP_RX1N_R GPP_RX1P GPP_TX1P GPP_TX1N_C
AB11 GPP_RX1N GPP_TX1N AE7
PCIE I/F GPP GPP_TX2P_C C185 0.1u_0402
23 GPP_RX2P Y7 GPP_RX2P GPP_TX2P AD4 GPP_TX2P 23
23 GPP_RX2N AA7 AE5 GPP_TX2N_C C186 0.1u_0402
B GPP_RX2N GPP_TX2N GPP_TX2N 23 B

AB9 AD5 GPP_TX3P_C C187 0.1u_0402


25 GPP_RX3P GPP_RX3P GPP_TX3P GPP_TX3P 25
AA9 AD6 GPP_TX3N_C C188 0.1u_0402
25 GPP_RX3N GPP_RX3N GPP_TX3N GPP_TX3N 25

17 A_RX0P W14 AE9 A_TX0P_C C189 0.01u_0402


SB_RX0P SB_TX0P A_TX0P 17
17 A_RX0N W15 PCIE I/F SB AD10 A_TX0N_C C190 0.01u_0402
SB_RX0N SB_TX0N A_TX0N 17

17 A_RX1P AB12 AC8 A_TX1P_C C191 0.01u_0402


SB_RX1P SB_TX1P A_TX1P 17
17 A_RX1N AA12 AD9 A_TX1N_C C192 0.01u_0402
SB_RX1N SB_TX1N A_TX1N 17
R49 10K_0402
1 1%2 AA14 AD11 R50 150_0402 1%
PCE_ISET PCE_PCAL R52 100_1%_0402 Change them to
1 2 AB14 PCE_TXISET PCE_NCAL AE11 +1.2VRUN
R51 8.25K_0402 1% 10nF ==>ATI

RS485M_A12

A
MICRO-STAR INT'L CO.,LTD. A
Title

RS485M PCI-E LINK I/F


Size Document Number Rev
A 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 12 of 44
5 4 3 2 1
5 4 3 2 1

R G B

EMI
CI197 CI198 CI199
0.01u_0402 0.01u_0402 0.01u_0402

+3VRUN AVDD

L2
D D
+1.8VRUN 300L600m
AVDDQ C200
L3 4.7u_0805
1 2 U6C

300L300m B22 B14


AVDD1 TXOUT_L0P LVDS_TXL0P 15
C201 C22 PART 3 OF 5 B15
AVDD2 TXOUT_L0N LVDS_TXL0N 15
10u_0805 C202 G17 B13
+1.8VRUN AVSSN1 TXOUT_L1P LVDS_TXL1P 15
2.2u_0805 H17 A13
AVSSN2 TXOUT_L1N LVDS_TXL1N 15
A20 AVDDDI TXOUT_L2P H14 LVDS_TXL2P 15
B20 AVSSDI TXOUT_L2N G14 LVDS_TXL2N 15
C203 D17
2.2u_0805 TXOUT_L3P
A21 AVDDQ TXOUT_L3N E17
PLLVDD AVDDQ A22
L4 AVSSQ
TXOUT_U0P A15
1 2 PLEASE CLOSE TO NB C21 B16

CRT/TVOUT
C_R TXOUT_U0N
C20 Y_G TXOUT_U1P C17
300L300m D19 C18
C204 C205 COMP_B TXOUT_U1N
TXOUT_U2P B17
10u_0805 4.7u_0805 E19 A17
15 R RED TXOUT_U2N
15 G F19 GREEN TXOUT_U3P A18
15 B G19 BLUE TXOUT_U3N B18
15 VSYNC# C6 DACVSYNC
R57 R58 R59 A5 E15 +1.8VRUN +1.8VRUN
15 HSYNC# DACHSYNC TXCLK_LP LVDS_TXLCKP 15

150_0402 1%
TXCLK_LN D15 LVDS_TXLCKN 15
R60 715_0402 1% B21 H15
150_0402 1% 150_0402 1% RSET TXCLK_UP L5
TXCLK_UN G15
15 DAC_SCL B6 DACSCL 1 2

2
LVDS
To CRT A6 D14
C +1.8VRUN HTPVDD 15 DAC_SDAT DACSDA LPVDD C
E14 C206 C207 300L300m L6
L7 +1.8VRUN LPVSS 0.1u_0402 4.7u_0805
PLLVDD A10 PLLVDD
1 2 +3VRUN B10 A12 +1.8VRUN 300L300m

PWR
PLLVSS LVDDR18D_1

PLL
B12 L8
300L300m R61 LVDDR18D_2
HTPVDD B24 HTPVDD LVDDR18A_1 C12 1 2
C208 C209 10K_0603

1
B25 HTPVSS LVDDR18A_2 C13
10u_0805 4.7u_0805 R62 300L300m
B

1K_0402 R63 0R_0402 (DNI) C10 A16


18 WD_PWRGD/GPIO7 17 NB_RST# SYSRESET# LVSSR1
R64 0R_0402 C11 A14
31,33 NB_PWRGD POWERGOOD LVSSR3

PM
E C LDT_STOP#_NB C5 D12
7,18 LDT_STOP# LDTSTOP# LVSSR5
B5 C19 C210 C211 C212 C213
17 ALLOW_LDTSTOP ALLOW_LDTSTOP LVSSR6
Q4 C15 4.7u_0805 0.1u_0402 0.1u_0402 4.7u_0805
R65 10K_0603 LVSSR7
SMBT3904 C23 HTTSTCLK LVSSR8 C16
16 HTREFCLK B23 HTREFCLK
R66 10K_0603 C2 F14
TVCLKIN LVSSR12
LVSSR13 F15
B11

CLOCKs
16 NB_OSC OSCIN
R67 22_0603 (DNI) A11
16,18 SB_OSCIN OSCOUT

16 NBSRC_CLKP F2 GFX_CLKP
16 NBSRC_CLKN E1 GFX_CLKN LVDS_DIGON E12 LVDS_DIGON 15
LVDS_BLON G12 LVDS_BLON 15
16 SBLINK_CLKP G1 SB_CLKP LVDS_BLEN F12 TP44
+3VRUN G2
16 SBLINK_CLKN SB_CLKN
DVO_D0 AD14
R68 2.7K_0402 DFT_GPIO0 D6 AD15
LOAD_ROM# DFT_GPIO0 DVO_D1
D7 DFT_GPIO1 DVO_D2 AE15
R69 2.7K_0402 DFT_GPIO2 C8 AD16
DNI R70 2.7K_0402 DFT_GPIO3 DFT_GPIO2 DVO_D3
C7 DFT_GPIO3 DVO_D4 AE16
B R71 2.7K_0402 DFT_GPIO4 B8 AC17 B
R72 R73 R74 2.7K_0402 DFT_GPIO5 DFT_GPIO4 DVO_D5
A8 DFT_GPIO5 DVO_D6 AD18

DVO
4.7K_0603 4.7K_0603 AE19
DVO_D7

MIS.
17 BMREQ# B2 BMREQ# DVO_D8 AD19
I2C_CLK A2 AE20
To LCD panel 15 I2C_CLK B4
I2C_CLK DVO_D9
AD20
15 I2C_DATA I2C_DATA DVO_D10
I2C_DATA AA15 AE21
THERMALDIODE_P DVO_D11
AB15 THERMALDIODE_N
DVO_VSYNC AD13
TP45 C14 AC13
TP46 TMDS_HPD DVO_DE
B3 DDC_DATA DVO_HSYNC AE13
C3 TESTMODE DVO_IDCKP AE17
STRP_DATA A3 AD17
STRP_DATA DVO_IDCKN
R75
+3VRUN 4.7K_0603 RS485M_A12

R76
2K_0603

U7
1 5 STRP_DATA
A0 SDA I2C_CLK
2 A1 SCL 6 LOAD_ROM#: LOAD ROM STRAP ENABLE
3 A2
VCC 8 +3VRUN
R77 7 4 High, LOAD ROM STRAP DISABLE
A +3VRUN WP GND A
R78
10K_0603 (DNI) C214 2K_0603 (DNI) Low, LOAD ROM STRAP ENABLE
AT24C04N-10SU-2.7-RH (DNI) 0.1u_0603 (DNI)

LOAD_ROM# R79 3K_0603 (DNI)


MICRO-STAR INT'L CO.,LTD.
NOTE: ACCESS TO STRAP_DATA and I2C_CLK PINS Title
IS MANDATORY. RS485M SYSTEM I/F&CLK
Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 13 of 44
5 4 3 2 1
5 4 3 2 1

VDDA12 +1.2VRUN
VDDA12 U6D L9
AE24 VDD_HT1 PART 4 OF 5 VDDA12_1 D1
AD24 VDD_HT2 VDDA12_2 G7
AD22 E2 C219 80L6_30_0805
VDD_HT3 VDDA12_3 C215 C216 C217 C218 10u_0805
AB17 VDD_HT4 VDDA12_4 C1
C220 C221 C222 C223 C224 C225 C226 AE23 E3 1u_0603 1u_0603 1u_0603 10u_0805
10u_0805 10u_0805 1u_0603 1u_0603 1u_0603 1u_0603 1u_0603 VDD_HT5 VDDA12_5
Y17 VDD_HT6 VDDA12_6 D2
W17 VDD_HT7 VDDA12_7 M9
AC18 VDD_HT8 VDDA12_8 F4

POWER
AD21 VDD_HT9 VDDA12_9 B1
D +1.8VRUN L10 VDD18 AC19 D3
D
VDD_HT10 VDDA12_10 VCC_NB
AC20 VDD_HT11 VDDA12_11 L9
AB19 VDD_HT12 VDDA12_12 E6
300L600m AD23
C227 C228 VDD_HT13
AA17 VDD_HT14 VDDC_1 L11
2.2u_08052.2u_0805 AE25 L13
VDD_HT15 VDDC_2
VDDC_3 L15
J14 M12 C229 C230 C231 C232 C233 C234
VDD18_1 VDDC_4 10u_0805 10u_0805 1u_0603 1u_0603 1u_0603 1u_0603
J15 VDD18_2 VDDC_5 R15
+1.8VRUNL11 VDDA18 M14
VDDC_6
AE2 VDDA18_1 VDDC_7 N11
AB3 VDDA18_2 VDDC_8 N13
220L3A 10u_0805 1u_0603 U7 N15
C235 C236 C237 C238 C239 C240 C241 VDDA18_3 VDDC_9
W7 VDDA18_4 VDDC_10 J11
10u_0805 1u_0603 1u_0603 1u_0603 1u_0603 AB4 H11 C242 C243 C244
VDDA18_5 VDDC_11 1u_0603 1u_0603 1u_0603
AC3 VDDA18_6 VDDC_12 P12
AD2 VDDA18_7 VDDC_13 P14
AE1 VDDA18_8 VDDC_14 R11
+3VRUN VDDR3 R13
L12 1 VDDC_15
2 E11 VDDR3_1 VDDC_16 A19
D11 VDDR3_2 VDDC_17 B19
300L300m U11
C245 VDDC_18
AC12 VDD_DVO1 VDDC_19 U14
4.7u_0805 AD12 P17
C VDD_DVO2 VDDC_20 C
AE12 VDD_DVO3 VDDC_21 L17
VDDC_22 J19
VDDR E7 D20 EMI
+1.8VRUN L13 VDDA12_13 VDDC_23 VDDA12
F7 VDDA12_14 VDDC_24 G20
F9 VSSA49 VDDC_25 A9
G9 VSSA50 VDDC_26 B9
220L3A C9
C246 C247 C248 VDDC_27 CI249 CI250 CI251 CI252 CI253 CI254
+1.2VRUN D22 VDDHT_PKG VDDC_28 D9
1u_0603 1u_0603 1u_0603 VDDA12 M1 A7 0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402
VDDA12_PKG1 VDDC_29
VDDA12 AC11 VDDA12_PKG2 VDDC_30 A4
VDDC_31 U12
VDDA12 U15
VDDC_32 +1.8VRUN
VDDA12 RS485M_A12 NB RS485 POWER STATES
Power Signal S0 S1 S3 S4/S5 G3
C255
10u_0805 CI256 CI257 CI258 CI259 CI260 CI261 CI262 VDDHT ON ON OFF OFF OFF
0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402
C263 C264 VDDR ON ON OFF OFF OFF
4.7u_0805 1u_0603
VDD18 ON ON OFF OFF OFF
+3VRUN
VDDC ON ON OFF OFF OFF
B B
VDDA18 ON ON OFF OFF OFF
CI265 CI266 CI267 CI268
0.1u_04020.1u_04020.1u_04020.1u_0402 VDDA12 ON ON OFF OFF OFF
AVDD ON ON OFF OFF OFF
AC10
AE10

AC4

AC2

AD1
AC5
AC6
AC7
AD3
AC9
AE6

AA3
V12
V11
V14

V15

Y15

Y11

Y12
Y14

VCC_NB
W6
M3

M2
M6
G3

G6
H1

H3

N3

R6
U2

U3
U6

R9

AVDDDI ON ON OFF OFF OFF


A1

P6

P9

Y1

Y3
Y9
F3

F1

T1

T3
L6
J2

J6

J3

U6E PLLVDD ON ON OFF OFF OFF


VSSA1
VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
VSSA9
VSSA10
VSSA11
VSSA12
VSSA13
VSSA14
VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22
VSSA23
VSSA24
VSSA25
VSSA26
VSSA27
VSSA28
VSSA29
VSSA30
VSSA31
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48

RS485M_A12 CI269 CI270 CI271 CI272 CI273 CI274 HTPVDD ON ON OFF OFF OFF
0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402
VDDR3 ON ON OFF OFF OFF
+1.2VRUN LPVDD ON ON OFF OFF OFF
PAR 5 OF 5

GROUND
LVDDR18D ON ON OFF OFF OFF
CI275 CI276 CI277 CI278 LVDDR18A ON ON OFF OFF OFF
0.1u_04020.1u_04020.1u_04020.1u_0402
M15 VSS10
J22 VSS11
G23 VSS12
J12 VSS13
L12 VSS14
L14 VSS15
L20 VSS16
L23 VSS17
M11 VSS18
M20 VSS19
M23 VSS20
M25 VSS21
N12 VSS22
N14 VSS23
B7 VSS24
L24 VSS25
P13 VSS26
P20 VSS27
P15 VSS28
R12 VSS29
R14 VSS30
R20 VSS31
W23 VSS32
Y25 VSS33
AD25VSS34
U20 VSS35
H25 VSS36
W24 VSS37
Y22 VSS38
AC23VSS39
D25 VSS40
G24 VSS41
AC14VSS42
H12 VSS43
AC22VSS44
R23 VSS45
C4 VSS46
AE22 VSS47
T23 VSS48
T25 VSS49
AE14 VSS50
R17 VSS51
H23 VSS52
M17 VSS53
A23 VSS54
AC15VSS55
F17 VSS56
D4 VSS57
AC16VSS58
M13 VSS59

VDDA18
A25 VSS1
F11 VSS2
D23 VSS3
E9 VSS4
G11 VSS5
Y23 VSS6
P11 VSS7
R24 VSS8
AE18 VSS9

A A

CI279 CI280 CI281 CI282 C2I83


MICRO-STAR INT'L CO.,LTD.
0.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402 Title

RS485M POWER & GND


Size Document Number Rev
B 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 14 of 44
5 4 3 2 1
5 4 3 2 1

+3VRUN

+5VRUN

A
R80
2.2K_0402 D1
Q5 CRT5V

G
S-RB551V-30_SOD323

13 DAC_SDAT S D N-2N7002_SOT23

C
C284
+3VRUN
D 0.1u_0402 D
R81 R82
2.2K_0402 2.2K_0402 P1

16

18
R83 6
2.2K_0402 L14 60L500m LRED 1 11
Q6 13 R L15 60L500m LGREEN 7

G
13 G L16 60L500m LBLUE DDC2BD
13 B 2 12
13 DAC_SCL S D N-2N7002_SOT23 8
R84 100_0402 DDC2BD 3 13 HSYN
+5VRUN 9
R85 100_0402 DDC2BC 4 14 VSYN
D2 +CRT5V 10
A C R_HSYN R86 33_0402 HSYN 5 15 DDC2BC
R_VSYN R87 33_0402 VSYN
C285
S-RB551V-30_SOD323 U8 C286 C287 C288 C289 C290 C291 C292

17

19
5

1
D01-RB551V0-R06 0.1u_0402 R89 R90 C293 C294 C295
R88 22p_0402 22p_0402 CONN-D-SUB15F_blue-3
HSYNC# 2 4 N59-15F0371-F02
13 HSYNC# 150_0402 1% 22p_0402 22p_0402 VGA_15P_DZ11A9
22p_0402 22p_0402 22p_0402 22p_0402
NC7SZ125M5X_NL_SOT23-5-LF 150_0402 1% 150_0402 1%
22p_0402 22p_0402
3

+CRT5V FOR EMI

U9
5

C C

VSYNC# 2 4
13 VSYNC#

NC7SZ125M5X_NL_SOT23-5-LF
3

+3VRUN

R91

10K_0402

PWR_SRC JLCD1
+V3.3S_LVDS_PANEL 1 11
whether can connect with run 1 11 LVDS_TXL2N 13
Q7 2 2 12 12 LVDS_TXL2P 13
power +3VRUN +V3.3S_LVDS_PANEL 3 13
3 13 LVDS_TXLCKN
N-Si3456DV_TSOP6 4 4 14 14 LVDS_TXLCKN 13
5 15 LVDS_TXLCKP
13 LVDS_TXL0N 5 15 LVDS_TXLCKP 13
6 13 LVDS_TXL0P 6 6 16 16
5 4 +V3.3S_LVDS_PANEL 7 17
+3VRUN R92 7 17
2 13 LVDS_TXL1N 8 8 18 18 I2C_CLK 13
1 13 LVDS_TXL1P 9 9 19 19
+3VSUS 100K_0603 10 20
10 20 I2C_DATA 13
C296 C297 21 22
B R93 22u_1206 0.01u_0402 21 22 B

3
23 23 24 24
SW1 R95 R94 47_0805 25 26
LCD CABLE JLCD1 25 26
10K_0402 100K_0603 Q8 Q9
C298 1 ====> GND LVC-D20SFYG3TP
D

D
4 2 LID- 0.01u_0402 N5Q-20F0040-H21
LID- 31 2 ==========> 1
3 1 Q10 G G LVC_D20SFYG
D

CASHTEC_FR3S1520_REED_SW 3 ==========> 2
S

S
<CONN NAME> C299 G N-2N7002_SOT23 N-2N7002_SOT23
13 LVDS_DIGON 4 ==========> 17
N72-0100290-D02
SW_MPU101_6EB 2200p_0603
S

N-2N7002_SOT23 5 ====> NC
R96 0_0603
6 ==========> 18 +3VRUN
PWR_SRC +V3.3S_LVDS_PANEL R97 0_0603 (DNI)
7 ==========> 20

whether can connect with run 8 ==========> 5


power L17
9 ==========> 6
80L3_100_0805
10 ====> GND

11 ==========> 8
+3VSUS C300 C301 C302 For EMI
12 ==========> 9
10u_1210 0.1u_0603 0.1u_0603
Harry 0313 13 ====> GND
5

CN1 14 ==========> 11
A A
LID- 2 1
31 EC_BLON 15 ==========> 12
R98 0_0603 4 BL-ON 2
1 BL-ON 3
13 LVDS_BLON 16 ====> GND
U10 4
31 BR-AD-ADJ
NC7SZ08M5X 5
17 ==========> 14
3

C303 BOX/HEADER/1*6 18 ==========> 15 MICRO-STAR INT'L CO.,LTD.


C304 N32-1060170-H06 Title
0.1u_0402 53398_06 19 ====> GND
0.01u_0402 LVDS & INVERTER
20 ====> GND Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 15 of 44
5 4 3 2 1
<
5 4 3 2 1
<

+3VRUN
CLK_VDD NBSRC_CLKN CI836 10p_0402
L18
NBSRC_CLKP CI837 10p_0402
+3VRUN
300L600m GPP_CLK3N CI838 10p_0402
C305 C306 C307 C308 C309 C310 C311 C312 C313 CLK_VDDA L19 1 2
22u_0805 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 GPP_CLK3P CI839 10p_0402
300L300m
C314 C315 CPUCLK# CI840 10p_0402
0.1u_0402 22u_0805
CPUCLK CI841 10p_0402
D D
EMI AKung 0314
+3VRUN

1- PLACE ALL SERIAL TERMINATION CLK_VDD


L20 1 2
RESISTORS CLOSE TO U800 U11
2- PUT DECOUPLING CAPS CLOSE TO U800 300L300m
POWER PIN 54 VDDCPU VDDA 50
+3VRUN C316 14 49 R99 261_0603
2.2u_0805 VDD_SRC1 GNDA
23 VDD_SRC2
28 56 CPUCLK_EXT_R R100 47.5_0402
VDD_SRC3 CPUCLK8T0 CPUCLK 7
44 55 CPUCLK#_EXT_R R101 47.5_0402
VDD_SRC4 CPUCLK8C0 CPUCLK# 7
L21 1 2 5 52
VDD_48 CPUCLK8T1
39 VDD_ATIG CPUCLK8C1 51
300L300m 2 VDD_REF SBLINK_CLKP_R R102 33_0402
60 VDDHTT SRCCLKT0 16 SBLINK_CLKP 13
C317 17 SBLINK_CLKN_R R103 33_0402
SRCCLKC0 SBLINK_CLKN 13
2.2u_0805 53 41 NBSRC_CLKP_R R104 33_0402
GND_CPU ATIGCLKT0 NBSRC_CLKP 13
15 40 NBSRC_CLKN_R R105 33_0402
GND_SRC1 ATIGCLKC0 NBSRC_CLKN 13
22 37 GFX_CLKP_R R106 33_0402
GND_SRC2 ATIGCLKT1 GFX_CLKN_R R107 33_0402
Parallel Resonance Crystal 29
45
GND_SRC3 ATIGCLKC1 36
35
C318 33p_0603 GND_SRC4 ATIGCLKT2
8 GND_48 ATIGCLKC2 34
38 GND_ATIG ATIGCLKT3 30
1 GND_REF ATIGCLKC3 31

2
CLK_VDD 58 18 SBSRC_CLKP_R R109 33_0402
GNDHTT SRCCLKT1 SBSRC_CLKP 17
Y1 R108 19 SBSRC_CLKN_R R110 33_0402
SRCCLKC1 SBSRC_CLKN 17
14.31818MHZ20P_S-2 1M_0603 (DNI) 3 20 GPP_CLK0P_R R111 33_0402
XIN SRCCLKT2 GPP_CLK0N_R R112 33_0402

1
SRCCLKC2 21
C R113 C319 33p_0603 R114 0_0603 4 24 GPP_CLK1P_R R115 33_0402 C
10K_0603 XOUT SRCCLKT3 GPP_CLK1N_R R116 33_0402
SRCCLKC3 25
26 GPP_CLK2P_R R117 33_0402
SRCCLKT4 GPP_CLK2P 23
27 GPP_CLK2N_R R118 33_0402
SRCCLKC4 GPP_CLK2N 23
R119 0R_0402 (DNI) 11 47 GPP_CLK3P_R R120 33_0402
18 SYS_RST# RESET_IN# SRCCLKT5 GPP_CLK3P 25
61 46 GPP_CLK3N_R R121 33_0402
NC SRCCLKC5 GPP_CLK3N 25
SRCCLKT6 43
SRCCLKC6 42
SRCCLKT7 12
SRCCLKC7 13

49.9_0402

49.9_0402

49.9_0402

49.9_0402

49.9_0402

49.9_0402

49.9_0402

49.9_0402

49.9_0402

49.9_0402

49.9_0402

49.9_0402

49.9_0402

49.9_0402

49.9_0402

49.9_0402
R122 0R_0402

R125 1%

R126 1%

R127 1%

R128 1%

R129 1%

R130 1%

R131 1%

R132 1%

R133 1%

R134 1%

R135 1%

R136 1%

R137 1%

R138 1%

R139 1%

R140 1%
9,18,23 SCLK0 9 SMBCLK CLKREQA# 57
10 32 R123 0R_0402
9,18,23 SDATA0 SMBDAT CLKREQB#
33 R124 0R_0402
CLKREQC# R141 10K_0603 (DNI)
48 IREF 48MHz_1 7
Ioh = 5 * Iref (2.32mA) 6 CLK_48M_USB_R
R142 48MHz_0 CLK_VDD
475_0402
Voh = 0.71V @ 60 ohm 1% 63 R143 33_0402
FS1/REF1 CLK_48M_USB 18
64 R145
FS0/REF0 C320 0.01u_0402 R144 R146
FS2/REF2 62
59 2.2K_0402
HTTCLK0 2.2K_0402 2.2K_0402
R147 8.2K_0603 R148 0R_0402 (DNI)
ICS951462AGLFT_TSSOP64-RH LPC_OSCIN_R R149 8.2K_0603 R150 0R_0402 (DNI)
R151 8.2K_0603 R152 0R_0402 (DNI)

SB_OSCIN_R R153 33_0402


SB_OSCIN 13,18
B NB_OSCIN_R R154 33_0402 B
NB_OSC 13
HTREFCLK_R R155 33_0402
HTREFCLK 13

R156
51.1_0402

CI321
HTREFCLK +3VRUN VCC_NB

0.01u_0402
CI324 C322 C323
CLK_48M_USB 0.1u_0402 0.1u_0402

0.01u_0402
EMI

STICHING CAPS

A A

MICRO-STAR INT'L CO.,LTD.


Title

CLOCK GENERATOR
Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 16 of 44
5 4 3 2 1
<
5 4 3 2 1

U12A EMI

A_RST# AG10
SB460 SB 23x23mm U2 PCI_CLK0_R R157 33_0402 PCI_CLK0
A_RST# PCICLK0 PCI_CLK0 21,22
Part 1 of 4 T2 PCI_CLK1_R R158 33_0402
PCICLK1 PCI_CLK1 21,30

PCI CLKS
PCI_CLK2_R R159 33_0402 CI778
hange them to 10nF
16 SBSRC_CLKP
16 SBSRC_CLKN
J24
J25
PCIE_RCLKP PCICLK2 U1
V2 PCI_CLK3_R R160 33_0402
PCI_CLK2 21,24 PCI_CLK0 For Cardreader
PCIE_RCLKN PCICLK3 PCI_CLK3 21
==>ATI W3 PCI_CLK4_R R161 33_0402 22p_0402
A_RX0P_C PCICLK4 PCI_CLK4 21
C325 0.01u_0402 P29 U3 PCI_CLK5_R R162 33_0402
12 A_RX0P A_RX0N_C PCIE_TX0P PCICLK5 PCI_CLK5 21,31
C326 0.01u_0402 PCI_CLK6_R R163 33_0402
12 A_RX0N
C327 0.01u_0402 A_RX1P_C
P28
M29
PCIE_TX0N PCICLK6 V1
T1 R164 0R_0402
PCI_CLK6 21
SB_SPDIF_OUT 21
PCI_CLK1 For MiniPCI
12 A_RX1P A_RX1N_C PCIE_TX1P SPDIF_OUT/GPIO41
PLACE THESE PCIE AC COUPLING C328 0.01u_0402
CAPS CLOSE TO SB460
12 A_RX1N
C329 0.01u_0402 A_RX2P_C
M28
K29
PCIE_TX1N
AJ9 PCIRST# PCI_CLK2 For TPM
12 A_RX2P A_RX2N_C PCIE_TX2P PCIRST#
C330 0.01u_0402
D 12 A_RX2N
C331 0.01u_0402 A_RX3P_C
K28
H29
PCIE_TX2N PCI_AD[31..0] PCI_CLK5 For KBC D
12 A_RX3P A_RX3N_C PCIE_TX3P PCI_AD[31..0] 21,22,30
C332 0.01u_0402 H28 W7 PCI_AD0
12 A_RX3N PCIE_TX3N AD0/ROMA18
Y1 PCI_AD1
AD1/ROMA17 PCI_AD2
12 A_TX0P T25 PCIE_RX0P AD2/ROMA16 W8
12 A_TX0N T26 W5 PCI_AD3
PCIE_RX0N AD3/ROMA15

PCI EXPRESS INTERFACE


12 A_TX1P T22 AA5 PCI_AD4 PCI_CLK6
PCIE_RX1P AD4/ROMA14 PCI_AD5 PCI_CLK5
12 A_TX1N T23 PCIE_RX1N AD5/ROMA13 Y3
12 A_TX2P M25 AA6 PCI_AD6 PCI_CLK4
PCIE_RX2P AD6/ROMA12 PCI_AD7 PCI_CLK3
12 A_TX2N M26 PCIE_RX2N AD7/ROMA11 AC5
12 A_TX3P M22 AA7 PCI_AD8 PCI_CLK2
PCIE_RX3P AD8/ROMA9 PCI_AD9 PCI_CLK1
12 A_TX3N M23 PCIE_RX3N AD9/ROMA8 AC3
AC7 PCI_AD10
R165 150_04021% AD10/ROMA7 PCI_AD11
E29 PCIE_CALRP AD11/ROMA6 AJ7
R166 150_04021% E28 AD4 PCI_AD12
PCIE_VDDR PCIE_CALRN AD12/ROMA5
AB11 PCI_AD13 C333 C334 C335 C336 C337 C338
+1.8VRUN R167 4.12K_0402 1% AD13/ROMA4 PCI_AD14
E27 PCIE_CALI AD14/ROMA3 AE6
L22 AC9 PCI_AD15 22p_0402 22p_0402 22p_0402 22p_0402 22p_0402 22p_0402
AD15/ROMA2 PCI_AD16 +3VRUN
U29 PCIE_PVDD AD16/ROMD0 AA3
AJ4 PCI_AD17
220L3A AD17/ROMD1 PCI_AD18
U28 PCIE_PVSS AD18/ROMD2 AB1
CI339 CI340 CI341 C342 C343 AH4 PCI_AD19
0.1u_0402 0.1u_0402 0.1u_0402 10u_08051u_0603 AD19/ROMD3 PCI_AD20 LDRQ#0 R168 10K_0603
PCIE_VDDR F27 PCIE_VDDR_1 AD20/ROMD4 AB2
F28 AJ3 PCI_AD21 LDRQ#1 R169 10K_0603
PCIE_VDDR_2 AD21/ROMD5 PCI_AD22 LAD3 R170 100K_0603
F29 PCIE_VDDR_3 AD22/ROMD6 AB3
EMI G26 AH3 PCI_AD23 LAD2 R171 100K_0603
PCIE_VDDR_4 AD23/ROMD7 PCI_AD24 LAD1 R172 100K_0603
PLEASE G27 PCIE_VDDR_5 AD24 AC1
CLOSE TO G28 AH2 PCI_AD25 LAD0 R173 100K_0603
PCIE_VDDR_6 AD25 PCI_AD26 PCI_CLKRUN# R174 10K_0603
SB460.U29 G29 PCIE_VDDR_7 AD26 AC2
J27 AH1 PCI_AD27 SERIRQ R175 10K_0603
PCIE_VDDR_8 AD27 PCI_AD28
J29 PCIE_VDDR_9 AD28 AD2
C +1.8VRUN PCIE_VDDR PCI_AD29 C
L23 EMI EMI
L25 PCIE_VDDR_10 AD29 AG2
PCI_AD30
LPC PULL UPS

PCI INTERFACE
L26 PCIE_VDDR_11 AD30 AD1
L29 AG1 PCI_AD31
PCIE_VDDR_12 AD31 PCI_CBE#0
N29 PCIE_VDDR_13 CBE0#/ROMA10 AB9 PCI_CBE#0 22,30
220L3A PCI_CBE#1
CI344 CI345 C346 C347 C348 C349 C350 C351 CI352 CBE1#/ROMA1 AF9
AJ5 PCI_CBE#2
PCI_CBE#1 22,30 PCI PULL UPS
CBE2#/ROMWE# PCI_CBE#2 22,30
0.1u_0402 0.1u_0402 22u_0805 1u_0603 1u_0603 1u_0603 1u_0603 1u_0603 0.1u_0402 AG3 PCI_CBE#3 +3VRUN
CBE3# PCI_CBE#3 22,30
FRAME# AA2 PCI_FRAME# 22,30
DEVSEL#/ROMA0 AH6 PCI_DEVSEL# 22,30
AG5 8P4R-8.2K_RN0603 1 2 RN20
IRDY# PCI_IRDY# 22,30 22 PCI_REQ#0
TRDY#/ROMOE# AA1 PCI_TRDY# 22,30 30 PCI_REQ#1 3 4
AF7 PCI_REQ#2 5 6
PAR/ROMA19 PCI_PAR 22,30 PCI_REQ#3
STOP# Y2 PCI_STOP# 22,30 7 8
AG8 PCI_REQ#4 R176 8.2K_0603
PERR# PCI_PERR# 30
SERR# AC11 PCI_SERR# 30
32K_X1 AJ8
REQ0# PCI_REQ#0 22
REQ1# AE2 PCI_REQ#1 30
Y2 32.768KHZ12.5P_S-2 AG9 PCI_REQ#2
REQ2# PCI_REQ#3 8P4R-8.2K_RN0603 1
1 4 32K_X2
REQ3# AH8 22 PCI_INTA# 2 RN21
2 3 AH5 PCI_REQ#4 3 4
REQ4# 30 PCI_INTB#
GNT0# AD11 PCI_GNT#0 22 30 PCI_INTC# 5 6
R177 AF2 PCI_INTD# 7 8
GNT1# PCI_GNT#2 PCI_GNT#1 30
20M_0603 R178 20M_0603 AH7
GNT2# PCI_GNT#3 TP47
AB12 22,30 PCI_FRAME# 8P4R-8.2K_RN0603 1 2 RN22
GNT3# PCI_GNT#4 TP48
GNT4# AG4 TP49 22,30 PCI_TRDY# 3 4
C354 C355 AG7 22,30 PCI_IRDY# 5 6
CLKRUN# PCI_LOCK# PCI_CLKRUN# 22,30,31
18p_0603 18p_0603 AF6 22,30 PCI_DEVSEL# 7 8
LOCK# 8P4R-8.2K_RN0603 1
22,30 PCI_STOP# 2 RN23
INTE#/GPIO33 AD3 PCI_INTA# 22 30 PCI_SERR# 3 4
INTF#/GPIO34 AF1 PCI_INTB# 30 30 PCI_PERR# 5 6
B AF4 PCI_LOCK# 7 8 B
INTG#/GPIO35 PCI_INTD# PCI_INTC# 30
PLACE THESE COMPONENTS CLOSE TO SB460, 32K_X1 D2 AF3
X1 INTH#/GPIO36
AND USE GROUND GUARD FOR 32K_X1 AND

XTAL
32K_X2
+3VRUN DNI?
32K_X2 C1 X2
LAD0 AG24 LAD0 24,31
ATI AC26 AG25
CPU_PG LAD1 LAD1 24,31
W26 INTR/LINT0 LAD2 AH24 LAD2 24,31

LPC
R430 W24 AH25
NMI/LINT1 LAD3 LAD3 24,31
10K_0603 W25 INIT# LFRAME# AF24 LFRAME# 21,24,31
AA24 AJ24 LDRQ#0
D21 SMI# LDRQ0# LDRQ#1 LDRQ#0 31
AA23 AH26 +3VALW RTCVCC
BMREQ#_A ATI NC45 LDRQ1# BMREQ#_A
13 BMREQ# C A AA22 IGNNE# BMREQ# W22
AA26 A20M# SERIRQ AF23 SERIRQ 22,24,31
CPU

1
Y27 FERR#
BAS40WS C806 AA25 D3 D3
13 ALLOW_LDTSTOP STPCLK#/ALLOW_LDTSTP RTCCLK RTC_CLK 21
18p_0603 R179 10K_0603 (DNI) AH9 F5 3
RTC
+1.2VRUN CPU_STP#/DPSLP_3V# RTC_IRQ# RTC_IRQ# 21
B24 S-BAT54C_SOT23
NC13 RTCVCC
W23 DPRSLPVR VBAT E1
HARRY AC25 D1
7 LDT_RST# LDT_RST# RTC_GND C358

2
per PA_IXP400BO2.pdf, to enable C3pop, C1e power saving features, extra R/C , diode should be added to widen the C356 C357
pulse to at least 8ns 218S4RASA12G 1u_0603 0.1u_0402 1u_0603

R180 1K_0603
+3VSUS +3VSUS R183 33_0402 +3VSUS +3VSUS
LAN_RST# 25

C359 0.1u_0402 R181 33_0402 C360 0.1u_0402


TPM_RST# 24

2
1
A A
BH1X2S_white-1.25pitch 3 4
R182 33_0402 N32-1020290-H06
14

14

14

14

NB_RST# 13
U13A U13B U13C U13D 53398_02 CN2

A_RST# 1 2 3 4 R184 33_0402 PCIRST# 5 6 9 8 R185 33_0402


NEWCARD_RST# 23 CARDBUS_RST- 22
MICRO-STAR INT'L CO.,LTD.
2

PHILIPS ( 74HCT14 ) PHILIPS ( 74HCT14 ) R186 33_0402 R187 PHILIPS ( 74HCT14 ) PHILIPS ( 74HCT14 ) R188 33_0402 Title
LPCRST# 31 MINIPCI_RST# 30
R431 10K_0603
7

SB460 PCIE/PCI/CPU/LPC
8.2K_0603 R189 33_0402 Size Document Number Rev
IDERST# 29
Custom 2.0
1

add a 8.2K pull-down MS-10581


resistor ATI Date: Friday, May 26, 2006 Sheet 17 of 44
5 4 3 2 1
5 4 3 2 1

+3VRUN

R190 10K_0603 SB460_GPIO13 U12D


R191 10K_0603 SB460_GPIO31
SB460 SB 23x23mm Part 4 of 4
R192 10K_0603 LPC_SMI#
R193 10K_0603 TALERT#/GPIO10 22,30 PCI_PME# A3 A17 R194 10_0402
ROM_CS# PCI_PME#/GEVENT4# USBCLK CLK_48M_USB 16
R432 10K_0603 25 PCIE_WAKE# B2
R433 10K_0603 WD_PWRGD/GPIO7 RI#/EXTEVNT0# R195 11.8K_0402
31 SLP_S3# F7 SLP_S3# USB_RCOMP A14

ACPI / WAKE UP EVENTS


31 SLP_S5# A5 SLP_S5#
pull it up to +3VRUN through 10K E3 A11
+3VSUS 31 SB_PWRON# PWR_BTN# USB_ATEST1 TP50
resistor 31,33 SB_PWRGD B5 PWR_GOOD USB_ATEST0 A10 TP51
D B3 D
24 LPCPD# SUS_STAT#
R196 10K_0603 PCIE_WAKE# F9 H12
SB_TEST1 NC22 NC28
E9 TEST1 NC27 G12
R197 10K_0603 SYS_RST# SB_TEST0 G9
R198 10K_0603 LPC_PME# TEST0
31 KA20M#_SB AF26 GA20IN NC20 E12
31 KRST#_SB AG26 KBRST# NC19 D12
R199 10K_0603 SB_PWRON# 31 LPC_PME# D7 LPC_PME#/GEVENT3#
31 LPC_SMI# C25 LPC_SMI#/EXTEVNT1# USB_HSDP7+ E14
R200 10K_0603 PCI_PME# D9 D14

USB INTERFACE
TP88 S3_STATE/GEVENT5# USB_HSDM7-
R201 10K_0603 WAKE_UP# 16 SYS_RST# F4
R202 4.7K_0603 SLP_S5# SYS_RESET#/GPM7#
23 WAKE_UP# E7 WAKE#/GEVENT8# USB_HSDP6+ G14
R203 4.7K_0603 SLP_S3# 31,40,41 AC_OK# R204 0R_0402 (DNI)
C2 H14
R205 4.7K_0603 PCIE_CLKEN BLINK/GPM6# USB_HSDM6-
7 CPU_THERMTRIP# G7 SMBALERT#/THRMTRIP#/GEVENT2#
USB_HSDP5+ D16
R434 10K_0603 USB_OC#4 E16
R435 10K_0603 USB_OC#3 SUSPWROK USB_HSDM5-
31,33 SUSPWROK E2 RSMRST#
R436 10K_0603 USB_OC#2 OSC / RST D18
USB_OC#1 USB_HSDP4+ USBP4 30
R437 10K_0603 13,16 SB_OSCIN B23 E18
USB_OC#0 14M_OSC USB_HSDM4- USBN4 30
R438 10K_0603
C28 NC18 USB_HSDP3+ G16 USBP3 23
060515 Justin ROM_CS# A26 H16
ROM_CS#/GPIO1 USB_HSDM3- USBN3 23
27 SB_DEPOP B29 GHI#/GPIO6
13 WD_PWRGD/GPIO7 A23 VGATE/GPIO7 USB_HSDP2+ G18 USBP2 28
B27 GPIO4 USB_HSDM2- H18 USBN2 28
SHUTDOWN#/GPIO5 D23 SHUTDOWN#/GPIO5
26 SPKR B26 SPKR/GPIO2 USB_HSDP1+ D19 USBP1 28
9,16,23 SCLK0 C27 SCL0/GPOC0# USB_HSDM1- E19 USBN1 28
9,16,23 SDATA0 B28

GPIO
SDA0/GPOC1#
C3 SCL1/GPOC2# USB_HSDP0+ G19 USBP0 28
F3 SDA1/GPOC3# USB_HSDM0- H19 USBN0 28
C R206 10K_0603 (DNI) ACZ_SDATA_IN2 D26 AVDD_USB1 C
29 IDE_DMA66 DDC1_SCL/GPIO9
R207 10K_0603 (DNI) ACZ_SDATA_IN1 C26 LI24 +3VSUS
R208 10K_0603 (DNI) ACZ_SDATA_IN0 SB_GPIO0 DDC1_SDA/GPIO8
A27 LDT_PG/SSMUXSEL/GPIO0 AVDDTX_0 B9
R209 10K_0603 (DNI) AC_BITCLK/GPIO38 A4 B11
NC11 AVDDTX_1 0.1u_0402 220L3A
AVDDTX_2 B13
B16 C361 CI362 CI363 CI364
R210 10K_0603 (DNI) AZ_RST# AVDDTX_3 10u_08050.1u_0402 0.1u_0402
C6 NC16 AVDDTX_4 B18
R211 10K_0603 (DNI) AZ_SYNC 1027 C5 A9 EMI
NC15 AVDDRX_0

USB OC
R212 10K_0603 (DNI) AZ_SDATA_OUT PCIE_CLKEN Harry C4 B10
23 PCIE_CLKEN USB_OC7#/GEVENT7# AVDDRX_1 AVDD_USB2 +3VSUS
R213 10K_0603 (DNI) AZ_BIT_CLK 31 KBSCI# B4 B12
SB460_AZ_RST# USB_OC6#/GEVENT6# AVDDRX_2 LI25
B6 USB_OC5#/AZ_RST#/GPM5# AVDDRX_3 B14
R214 100K_0603 (DNI) SYS_RST# USB_OC#4 A6 B17
USB_OC#3 USB_OC4#/GPM4# AVDDRX_4
C8 USB_OC3#/GPM3#
SB460 NC pin K2 K3 C365 USB_OC#2 C7 A12 220L3A
USB_OC#1 USB_OC2#/FANOUT1/LLB#/GPM2# AVDDC C366 CI367 CI368 CI369
B8 USB_OC1#/GPM1#
22p_0402 USB_OC#0 A8 A13 10u_0805 0.1u_0402 0.1u_0402 0.1u_0402
USB_OC0#/GPM0# AVSSC
+3VRUN A16
R222 22_0603 N2 AVSS_USB_1
23,26,30 AZ_BIT_CLK AZ_BITCLK AVSS_USB_2 C9

AZALIA
R215 2.2K_0603 SCLK0 23,26,30 AZ_SDATA_OUT R223 0R_0402 M2 C10
R216 2.2K_0603 SDATA0 AZ_SDOUT AVSS_USB_3
TP52 K2 NC31 AVSS_USB_4 C11
L3 C12 +3.3V_AVDDC +3VSUS +3VSUS PLACE C629 AND
23,26,30 AZ_SYNC AZ_SYNC AVSS_USB_5
K3 C13 L26 C630 CLOSE TO
R221 0R_0402 SB_GPIO0 NC32 AVSS_USB_6
7 SB_CPUPWRGD AVSS_USB_7 C14 1 2 U600

USB PWR
AC_BITCLK/GPIO38 R224 0R_0402 L1 C16
LDT_PG R225 0R_0402 L2 AC_BITCLK/GPIO38 AVSS_USB_8 300L300m
21 AC_SDATA_OUT AC_SDOUT/GPIO39 AVSS_USB_9 C17
26 ACZ_SDATA_IN0 L4 C18 C370 C371
ACZ_SDIN0/GPIO42 AVSS_USB_10 0.1u_0402 2.2u_0603
23 ACZ_SDATA_IN1 J2 ACZ_SDIN1/GPIO43 AVSS_USB_11 C19

AC97
30 ACZ_SDATA_IN2 J4 ACZ_SDIN2/GPIO44 AVSS_USB_12 C20
TP53 M3 AC_SYNC/GPIO40 AVSS_USB_13 D11
B NOTE: PLACE R247(L1 CPU_VDDIO_SUS_ADJ L5 D21 B
RES) NEAR CNR/CODEC38 CPU_VDDIO_SUS_ADJ AC_RST#/GPIO45 AVSS_USB_14
AVSS_USB_15 E11
BRANCH POINT (NOT E21 R226 R227
NEAR SB460). AVSS_USB_16
AVSS_USB_17 F11 10K_0603 (DNI)
R228 0R_0402 TALERT#/GPIO10 E23 F12 10K_0603 (DNI)
7 SB_TALERT# TP54 FANOUT0/GPIO3 AVSS_USB_18
SB460_GPIO31 AC21 F14
SB460_GPIO13 GPIO31 AVSS_USB_19 SB_TEST0
AD7 GPIO13/REQ5# AVSS_USB_20 F16
AE7 DPSLP_OD#/GPIO37 AVSS_USB_21 F18
TP55 SB460_GPIO14 AA4 F19
TALERT#/GPIO10 GNT5#/GPIO14 AVSS_USB_22 SB_TEST1
T4 TALERT#/GPIO10 AVSS_USB_23 F21
R229 0R_0402 D4 G11
7,13 LDT_STOP# SLP#/LDT_STP# AVSS_USB_24
TP56 AB19 NC8 AVSS_USB_25 G21
R230 0R_0402 SB460_AZ_RST# H11
23,26,27,30 AZ_RST# AVSS_USB_26
AVSS_USB_27 H21
AVSS_USB_28 J11
TEST POINT TP602 FOR J12 R231 R232
AVSS_USB_29
SB460_FANOUT0 AVSS_USB_30 J14 10K_0603
J16 10K_0603
AVSS_USB_31
AVSS_USB_32 J18
AVSS_USB_33 J19
+3VRUN R233 10K_0603SHUTDOWN#/GPIO5

218S4RASA12G

A A

MICRO-STAR INT'L CO.,LTD.


Title

SB460 ACPI/GPIO/USB/AUDIO
Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 18 of 44
5 4 3 2 1
5 4 3 2 1

Close to SB as possible U12B

SATA_TX0+_C C812 0.01u_0402 SATA_TX0+


29 SATA_TX0+_C SATA_TX0-_C C813 0.01u_0402 SATA_TX0-
AH21
AJ21
SATA_TX0+ SB460 SB 23x23mm AB29
29 SATA_TX0-_C SATA_TX0- IDE_IORDY IDE_IORDY# 29
D
Part 2 of 4 IDE_IRQ AA28 SIRQI 29 D
SATA_RX0-_C C814 0.01u_0402 SATA_RX0- AH20 AA29
29 SATA_RX0-_C SATA_RX0+_C C815 SATA_RX0- IDE_A0 IDE_A0 29
0.01u_0402 SATA_RX0+ AJ20 AB27
29 SATA_RX0+_C SATA_RX0+ IDE_A1 IDE_A1 29
IDE_A2 Y28 IDE_A2 29
AH18 SATA_TX1+ IDE_DACK# AB28 IDE_DACK# 21,29
060515 Justin AJ18 AC27
SATA_TX1- IDE_DRQ IDE_REQ 29
IDE_IOR# AC29 IDE_IOR# 29
Close to HD as possible AH17 AC28
SATA_RX1- IDE_IOW# IDE_IOW# 29
AJ17 SATA_RX1+ IDE_CS1# W28 IDE_CS1# 29
IDE_CS3# W27 IDE_CS3# 29
AH13 SATA_TX2+
AH14 AD28 IDE_D0
SATA_TX2- IDE_D0 IDE_D1
IDE_D1 AD26
AH16 AE29 IDE_D2
SATA_RX2- IDE_D2 IDE_D3

ATA 66/100
AJ16 AF27

SERIAL ATA
SATA_RX2+ IDE_D3 IDE_D4
IDE_D4 AG29
AJ11 AH28 IDE_D5
SATA_TX3+ IDE_D5 IDE_D6
AH11 SATA_TX3- IDE_D6 AJ28
AJ27 IDE_D7
060515 Justin IDE_D7 IDE_D8
AH12 SATA_RX3- IDE_D8 AH27
AJ13 AG27 IDE_D9
SATA_X1 SATA_RX3+ IDE_D9 IDE_D10
IDE_D10 AG28
R450 1K_0402 1% SATA_CAL AF12 AF28 IDE_D11
060515 Justin SATA_CAL IDE_D11 IDE_D12
IDE_D12 AF29
C816 2.2u_0603 (DNI) SATA_X1 AD16 AE28 IDE_D13
C SATA_X1 IDE_D13 C
AD25 IDE_D14
SATA_X2 IDE_D14 IDE_D15
AD18 SATA_X2 IDE_D15 AD29
PLACE SATA_CAL IDE_D[15..0]
IDE_D[15..0] 29
SATA_X2 SATA_ACT# AC12
RES & CAP VERY 29 SATA_ACT# SATA_ACT#
25MHZ20P_S-2 CLOSE TO BALL PLLVDD_ATA AD14
Y8 PLLVDD_SATA_1
AJ10 J3
OF SB460 PLLVDD_SATA_2 NC29
J6
NC30
XTLVDD_ATA AC16 G3

SPI ROM
XTLVDD_SATA NC24
NC23 G2
NOTE: AVDD_SATA AE14 AVDD_SATA_1 NC26 G6
R451 1M_0603 AE16 AVDD_SATA_2
R635 IS 1K 1% FOR 25MHz AE18 AVDD_SATA_3 NC17 C23
060515 Justin AE19 G5
C817 C818 XTAL, 4.99K 1% FOR 100MHz AF19
AVDD_SATA_4 NC25
AVDD_SATA_5
INTERNAL CLOCK AF21 AVDD_SATA_6 NC35 M4
27p_0603 27p_0603 AG22 T3
AVDD_SATA_7 NC46
AG23 AVDD_SATA_8 NC50 V4
AH22 AVDD_SATA_9
AH23 AVDD_SATA_10 NC40 N3
AJ12 AVDD_SATA_11 NC41 P2
AJ14 W4

SERIAL ATA POWER


AVDD_SATA_12 NC54
AJ19 AVDD_SATA_13
B AJ22 AVDD_SATA_14 NC43 P5 B
AJ23 AVDD_SATA_15 NC44 P7
NC45 P8
AB14 AVSS_SATA_1 NC48 T8
AB16 AVSS_SATA_2 NC47 T7
060515 Justin

HW MONITOR
AB18 AVSS_SATA_3
+1.8VRUN AC14 V5
+1.8VRUN XTLVDD_ATA PLLVDD_ATA AVSS_SATA_4 NC51
AC18 AVSS_SATA_5 NC33 L7
AC19 AVSS_SATA_6 NC38 M8
060515 L52
AD12 AVSS_SATA_7 NC52 V6
Justin 220R_200mA AD19 M6
AVSS_SATA_8 NC36
AD21 AVSS_SATA_9 NC42 P4
220R_200mA L53 C819 C820 AE12 M7
AVSS_SATA_10 NC37
AE21 AVSS_SATA_11 NC53 V7
C821 1u_0603 1u_0603 AF11 AVSS_SATA_12
AF14 AVSS_SATA_13
1u_0603 AF16 AVSS_SATA_14
C649 CLOSE TO THE AF18 AVSS_SATA_15 NC39 N1
BALL OF U12 AG11 AVSS_SATA_16
C650 CLOSE TO THE AG12 AVSS_SATA_17 NC34 M1
BALL OF U12 AG13 AVSS_SATA_18
+1.8VRUN AVDD_SATA AG14 AVSS_SATA_19
AG16 AVSS_SATA_20
L54 220L3A AG17
A
AVSS_SATA_21 A
AG18 AVSS_SATA_22
22u_0805 AG19
C822 C823 C824 C825 C826 AVSS_SATA_23
AG20 AVSS_SATA_24
0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 AG21
AH10
AVSS_SATA_25 MICRO-STAR INT'L CO.,LTD.
AVSS_SATA_26 Title
AH19 AVSS_SATA_27
060515 Justin SB460 SATA/IDE/HWM/SPI
Size Document Number Rev
218S4RASA12G B 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 19 of 44
5 4 3 2 1
5 4 3 2 1

+3VRUN U12C

A25
A28
VDDQ_1 SB460 SB 23x23mmVSS_1 A1
A20
VDDQ_2 VSS_2
C29 VDDQ_3 Part 3 of 4 VSS_3 A21
D24 VDDQ_4 VSS_4 A29
L9 VDDQ_5 VSS_5 B1
L21 VDDQ_6 VSS_6 B7
PLACE ALL THE DECOUPLING CAPS ON M5 VDDQ_7 VSS_7 B25
D P3 C21 D
THIS SHEET CLOSE TO SB460 AS VDDQ_8 VSS_8
P9 VDDQ_9 VSS_9 C22
POSSIBLE. T5 C24
VDDQ_10 VSS_10
V9 VDDQ_11 VSS_11 D6
+3VRUN W2 E24
VDDQ_12 VSS_12
W6 VDDQ_13 VSS_13 F2
W21 VDDQ_14 VSS_14 F23
W29 VDDQ_15 VSS_15 G1

1
AA12 VDDQ_16 VSS_16 J1
C383 AA16 J8
C384 C385 C386 C387 C388 C389 VDDQ_17 VSS_17
AA19 VDDQ_18 VSS_18 L6
150UF 1u_0603 1u_0603 1u_0603 1u_0603 1u_0603 1u_0603
2
AC4 VDDQ_19 VSS_19 L8
AC23 VDDQ_20 VSS_20 M9
AD27 VDDQ_21 VSS_21 M12
AE1 VDDQ_22 VSS_22 M15
AE9 VDDQ_23 VSS_23 M18
AE23 VDDQ_24 VSS_24 N13
AH29 VDDQ_25 VSS_25 N17
+3VRUN AJ2 P1
VDDQ_26 VSS_26
AJ6 VDDQ_27 VSS_27 P6
+1.8VRUN AJ26 P21
VDDQ_28 VSS_28
VSS_29 R12
M13 VDD_1 VSS_30 R15
C390 C391 C392 C393 M17 R18
0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 VDD_2 VSS_31
N12 VDD_3 VSS_32 T6
C394 C395 C396 C397 C398 N15 T9
22u_0805 1u_0603 1u_0603 1u_0603 1u_0603 VDD_4 VSS_33
N18 VDD_5 VSS_34 U13
R13 VDD_6 VSS_35 U17
R17 VDD_7 VSS_36 V3
U12 VDD_8 VSS_37 V8
C U15 V12 C
VDD_9 VSS_38
U18 VDD_10 VSS_39 V15
V13 VDD_11 VSS_40 V18
+3VSUS V17 V21
VDD_12 VSS_41
VSS_42 W1
A2 S5_3.3V_1 VSS_43 W9
A7 S5_3.3V_2 VSS_44 Y29
F1 AA11

POWER
+1.8VSUS S5_3.3V_3 VSS_45
J5 S5_3.3V_4 VSS_46 AA14
J7 S5_3.3V_5 VSS_47 AA18
+1.8VSUS K1 AC6
S5_3.3V_6 VSS_48
VSS_49 AC24
+1.8VRUN AVDDCK_1.8V +1.8VSUS G4 AD9
S5_1.8V_1 VSS_50
H1 S5_1.8V_2 VSS_51 AD23
L30 1 2 C399 C400 C401 C402 C403 H2 AE3
22u_0805 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 S5_1.8V_3 VSS_52
H3 S5_1.8V_4 VSS_53 AE27
300L300m AG6
C404 +1.8VSUS VSS_54
A18 USB_PHY_1.2V_1 VSS_55 AJ1
2.2u_0603 A19 AJ25
USB_PHY_1.2V_2 VSS_56
B19 USB_PHY_1.2V_3 VSS_57 AJ29
B20 USB_PHY_1.2V_4
B21 USB_PHY_1.2V_5
should be connected to +1.8VRUN on D27
PCIE_VSS_1
SB460 +1.2VRUN PCIE_VSS_2 D28
AA27 CPU_PWR PCIE_VSS_3 D29
1K_0402 F26
R237 V5_VREF PCIE_VSS_4
AE11 V5_VREF PCIE_VSS_5 G23
+5VRUN G24
PCIE_VSS_6
AVDDCK_1.8V A24 AVDDCK_3.3V PCIE_VSS_7 G25
PCIE_VSS_8 H27
B D4 should be connected to +1.8VRUN on B
A22 NC12 PCIE_VSS_9 J23
A C SB460 PCIE_VSS_10 J26
+3VRUN B22 J28
C405 C406 AVSSCK PCIE_VSS_11
PCIE_VSS_12 K27
BAS40WS 0.1u_0402 1u_0603 V29 L22
PCIE_VSS_42 PCIE_VSS_13
V28 PCIE_VSS_41 PCIE_VSS_14 L23
V27 PCIE_VSS_40 PCIE_VSS_15 L24
V26 PCIE_VSS_39 PCIE_VSS_16 L27
V25 PCIE_VSS_38 PCIE_VSS_17 L28
V24 PCIE_VSS_37 PCIE_VSS_18 M21
+3VSUS V23 M24
PCIE_VSS_36 PCIE_VSS_19
V22 PCIE_VSS_35 PCIE_VSS_20 M27
U27 PCIE_VSS_34 PCIE_VSS_21 N27
+1.8VSUS T29 N28
PCIE_VSS_33 PCIE_VSS_22
T28 PCIE_VSS_32 PCIE_VSS_23 P22
C407 C408 C409 +1.8VSUS T27 P23
22u_0805 0.1u_0402 0.1u_0402 PCIE_VSS_31 PCIE_VSS_24
T24 PCIE_VSS_30 PCIE_VSS_25 P24
T21 PCIE_VSS_29 PCIE_VSS_26 P25
P27 PCIE_VSS_28 PCIE_VSS_27 P26
C410 C411 C412 C413 C414
22u_0805 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402
218S4RASA12G

A A

MICRO-STAR INT'L CO.,LTD.


Title

SB460 POWER & GND


Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 20 of 44
5 4 3 2 1
5 4 3 2 1

REQUIRED STRAPS

NPTE: FOR SB460, EXTERNAL PU/PD ARE


REQUIRED +3VSUS +3VRUN +3VRUN +3VRUN +3VRUN

D +3VRUN D
R238 R239 R240 R241 R242
10K_0603 10K_0603 (DNI) 10K_0603 10K_0603 10K_0603
DNI
HARRY0121 R243 +3VSUS +3VRUN +3VRUN +3VRUN +3VRUN 17 RTC_IRQ#
2.2K_0603 (DNI) 17 SB_SPDIF_OUT
HARRY 0929
17,24 PCI_CLK2
17 PCI_CLK3
18 AC_SDATA_OUT R244 R245 R246 R247 R248 17,31 PCI_CLK5
10K_0603 (DNI) 10K_0603 (DNI) 10K_0603 10K_0603 17,24,31 LFRAME#
10K_0603 (DNI)
17 RTC_CLK
17 PCI_CLK4 R249 R250 R251 R252 R253 R254
17 PCI_CLK6 10K_0603 (DNI) 10K_0603 10K_0603 (DNI) 10K_0603 (DNI) 10K_0603 (DNI) 10K_0603 (DNI)
17,22 PCI_CLK0 DNI DNI DNI DNI DNI

17,30 PCI_CLK1

R255 R256 R257 R258


10K_0603 10K_0603 10K_0603
10K_0603 (DNI)

HARRY 0121 ACPWRON SPDIF_OUT PCI_CLK2 PCI_CLK3 PCI_CLK5 LFRAME#

SB460 PULL MANUAL SIO 24MHz XTAL MODE USB PHY PCIE_CM_SET ENABLE
HIGH PWR ON POWERDOWN LOW THERMTRIP#
NOT
C
AC_SDOUT RTC_CLK PCI_CLK4 PCI_CLK6 PCI_CLK0 PCI_CLK1 SUPPORTED DISABLE C
DEFAULT DEFAULT DEFAULT DEFAULT

PULL USE INTERNAL USE INT. CPU IF=K8 ROM TYPE:


HIGH DEBUG RTC PLL48 PULL AUTO SIO 48MHz 48MHZ OSC USB PHY PCIE_CM_SET DISABLE
H, H = PCI ROM LOW PWR MODE POWERDOWN HIGH THERMTRIP#
STRAPS DEFAULT
DEFAULT H, L = LPC I ROM DEFAULT ON ENABLE
DEFAULT DEFAULT
L, H = LPC II ROM
PULL IGNORE EXTERNAL USE EXT. CPU IF=P4
LOW DEBUG RTC 48MHZ L, L = FWH ROM
STRAPS NOTE: FOR SB460, PCICLK[8:7] ARE
DEFAULT DEFAULT CONNECTED TO SUBSTRATE
BALLS PCICLK[1:0]
OVERLAP COMMON PADS WHERE
POSSIBLE FOR DUAL-OP RESISTORS.
DEBUG STRAPS
SB600 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
+3VRUN +3VRUN +3VRUN +3VRUN +3VRUN +3VRUN

R259 R260 R262 R263 R264 R265


10K_0603 10K_0603 10K_0603 10K_0603 10K_0603
B 10K_0603 (DNI) B

19,29 IDE_DACK#
17,22,30 PCI_AD28
17,22,30 PCI_AD27
17,22,30 PCI_AD26
17,22,30 PCI_AD25
17,22,30 PCI_AD24

R266 R267 R268 R269 R270


10K_0603 (DNI) 10K_0603 (DNI) 10K_0603 (DNI) 10K_0603 (DNI) 10K_0603

IDE_DACK# PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24

USE USE PCI USE ACPI USE IDE USE DEFAULT


PULL LONG PLL BCLK PLL PCIE STRAPS
HIGH RESET
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
A A

PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM


LOW SHORT PCI PLL ACPI PLL PCIE
RESET BCLK STRAPS
MICRO-STAR INT'L CO.,LTD.
Title

SB460 STRAPS
Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 21 of 44
5 4 3 2 1
5 4 3 2 1

EMI
whether can connect with run close to chip FA0+
power

2
CI415 CI416 C433 1u_0603
0.1u_0402 0.1u_0402 L32
+3VRUN +3VRUN
+3VRUN L31 R272 R273 CMC_90ohm
C417 56.2_0402 1% 56.2_0402 1%
1394_XI
C418 C419 C420 C421 C422 600L200m_500-1 TPBIAS FA0#

1
2
15P_0402 TPA0+
C423 4.7u_0603 0.1u_0402 0.1u_0402 0.1u_0402 4.7u_0603 24.576MHZ16P_S-1 Y4 TPA0#
0.1u_0402 (DNI) TPB0+
C424 TPB0#
D D
1394_XO FB0+

1
Shield GND

4
15P_0402 R277 R278
+3VRUN +2VRUN required 56.2_0402 1% 56.2_0402 1% L33
C434 820PF_0402
CMC_90ohm
R279
+3VRUN C425 C426 C427 C428 C429
CN3 close to chip 5.1K_0402 1% FB0#

3
4.7u_0603 0.1u_0402 0.1u_0402 0.1u_0402 4.7u_0603 ERRTA

FB0# 1
C430 C431 C432 FB0+ TPB#
2 TPB
0.1u_0402 (DNI) 0.1u_0402 0.1u_0402 FA0# 3 TPA#

100
101
FA0+

26
56

67
73
78
80

16
90
U14 4 TPA

NC
NC
NC
NC
PCI_VCC1
PCI_VCC2

CORE_3V1
CORE_3V2

CORE_3VA1
CORE_3VA2
CORE_3VA3
CORE_3VA4

CORE_1.8V1
CORE_1.8V2
PCI_AD31 19 77 R274 5.9K_0402 1%
PCI_AD30 AD31 REF EMI
20 AD30
PCI_AD29 1394_XI Layout Note:

5
6
7
8
21 AD29 XI 82
PCI_AD28 22 83 1394_XO N5G-04M0101-A10 Please close to J6 connector
PCI_AD27 AD28 XO N5G-04M0101-A10 IEEE1394_c1470613
23 AD27
PCI_AD26 24 76 TPBIAS SD_WP/SM_WPI# CI779 0.01u_0402
PCI_AD25 AD26 BIAS TPA0+ AMP_1470383-1_1394 SD_CD# CI780 0.01u_0402
25 AD25 TPA+ 75
PCI_AD24 27 74 TPA0# SD_D1 CI781 0.01u_0402
PCI_AD23 AD24 TPA- TPB0+ SD_D0 CI782 0.01u_0402
29 AD23 TPB+ 72 ---GND IN 1394 CONN
PCI_AD22 30 71 TPB0# SD/MS_CLK CI783 0.01u_0402
PCI_AD21 AD22 TPB- SD_CMD CI784 0.01u_0402
31 AD21
PCI_AD20 32 70 SD_D3 CI785 0.01u_0402
PCI_AD19 AD20 NC17 SD_D2 CI786 0.01u_0402
34 AD19 NC16 69
C PCI_AD18 35 68 MS_BS/XD_D3 CI787 0.01u_0402 C
PCI_AD[31..0] PCI_AD17 AD18 NC15 For B1 chip A2/B0 NC Pin MS_D1/XD_D7 CI788 0.01u_0402
17,21,30 PCI_AD[31..0] 36 AD17 NC14 66
PCI_AD16 37 65 MS_D0/XD_D2 CI789 0.01u_0402
PCI_AD15 AD16 NC13 MS_D2/XD_D1 CI790 0.01u_0402
47 AD15
PCI_AD14 48 11 MS_CD# CI791 0.01u_0402
PCI_AD13 AD14 SC_VCC MS_D3/XD_D0 CI792 0.01u_0402
49 AD13 SC_3V# 2
PCI_AD12 50 3
PCI_AD11 AD12 SC_5V#
51 AD11 SC_RST 15
PCI_AD10 52 12

OZ128
PCI_AD9 AD10 SC_CLK
53 AD9 SC_IO 13
PCI_AD8 54 4
PCI_AD7 AD8 SC_CD#
57 AD7
PCI_AD6 58 8 MC_3V# MCARD_VCC3
PCI_AD5 AD6 MC_3V# R_SD/MS_CLK R281 33_0402 SD/MS_CLK
59 AD5 SD/MS_CLK 111
PCI_AD4 60 109 SD_D3
PCI_AD3 AD4 SD_D3 SD_D2 J6
61 AD3 SD_D2 110
PCI_AD2 62 105 SD_D1
PCI_AD1 AD2 SD_D1 SD_D0 SD_WP/SM_WPI#
63 AD1 SD_D0 106 SD-WP1 SD_WP
PCI_AD0 64 108 SD_CMD SD_CD# SD-CD1
AD0 SD_SMD SD_WP/SM_WPI# SD_D1 CD_SWITCH
SM_WPI#/SD_WP 115 SD-8 SD_DAT1
PCI_CBE#3 28 112 SD_CD# SD_D0 SD-7
17,30 PCI_CBE#3 PCI_CBE#2 C/BE3# SD_CD# SD_DAT0
17,30 PCI_CBE#2 38 C/BE2# SD-6 SD_VSS1
PCI_CBE#1 46 93 MS_D1/XD_D7 SD/MS_CLK SD-5
17,30 PCI_CBE#1 PCI_CBE#0 C/BE1# MS_D1/XD_D7 SD_CLK SD Signal
17,30 PCI_CBE#0 55 C/BE0# XD_D6 91 SD-4 SD_VDD
XD_D5 88 SD-3 SD_VSS2
PCI_AD20 R282 100_0603 9 86 SD_CMD SD-2
IDSEL XD_D4 MS_BS/XD_D3 SD_D3 SD_CMD
MS_BS/XD_D3 87 SD-1 SD_CD/DAT3
PCI_CLK0 45 89 MS_D0/XD_D2 SD_D2 SD-10
17,21 PCI_CLK0 PCI_DEVSEL# PCI_CLK MS_D0/XD_D2 MS_D2/XD_D1 SD_DAT2
17,30 PCI_DEVSEL# 42 DEVSEL# MS_D2/XD_D1 92
PCI_FRAME# 39 94 MS_D3/XD_D0 MS-1
17,30 PCI_FRAME# PCI_IRDY# FRAME# MS_D3/XD_D0 MS_BS/XD_D3 MS_VSS1
17,30 PCI_IRDY# 40 IRDY# XD_CE# 117 MS-2 MS_BS
B PCI_TRDY# MS_D1/XD_D7 B
17,30 PCI_TRDY# 41 TRDY# XD_R/B# 97 MS-3 MS_DATA1
PCI_STOP# 43 116 MS_D0/XD_D2 MS-4
17,30 PCI_STOP# PCI_PAR STOP# XD_CLE MS_D2/XD_D1 MS_DATA0 Mem Stick
17,30 PCI_PAR 44 PAR XD_ALE 107 MS-5 MS_DATA2
PCI_REQ#0 17 103 MS_CD# MS-6
17 PCI_REQ#0 PCI_GNT#0 REQ# XD_WE# +3VRUN MS_D3/XD_D0 MS_INS
17 PCI_GNT#0 18 GNT# XD_RE# 99 MS-7 MS_DATA3 GND SD-CD2
CARDBUS_RST- 5 96 MS-8 SD-WP2
17 CARDBUS_RST- PCI_INTA# PCI_RST# XD_WPO# MS_CD# MS_SCLK GND
17 PCI_INTA# 14 INTA# MS_CD# 98 MS-9 MS_VCC2
PCI_PME# 7 95 MS-10
18,30 PCI_PME# CLK_RUN# PME# XD_CD# MS_VSS2
10 CLKRUN#
SERIRQ 6 84 R283 C435 C436 CONN-SD_MMC_MS Card
17,24,31 SERIRQ SERIRQ TEST0 22K_0402 1u_0603 1u_0603 N58-23F0040-T01
TEST1 85
TP57 104 3IN1_SD_MS
MEDIA_ACTV MC_3V#
Q11
For EMI
AGND1
AGND2
GND1
GND2
GND3
GND4
GND5
GND6

NC10
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

P-NDS352AP_NL_SOT23
SOT23SGD_T N58-23F0010-T01
OZ128TN-LF D03-352AP09-F01 MCARD_VCC3
102
113
114
127
128

118
119
120
121
122
123
124
125
126
33

79
81

R284 10K_0402 (DNI)

PCI_CLKRUN# R285 0R_0402 CLK_RUN# +3VRUN +2VRUN


17,30,31 PCI_CLKRUN#
Vout = 2V / 30mA
U15
1 IN VOUT 5

2
LX8211 Vout=Vadjx(1+R286/R287) Vadj=1.175V
A GND A
1

C437 C438
3 4 R286
1n_0402 4.7u_0805 EN ADJ
AME8804 3.6K_1%_0402
<MSI-BOM> C439
SOT23_5_NPC30X
2

4.7u_0805
MICRO-STAR INT'L CO.,LTD.
1

R287 Title

5.6K_1%_0402 1394/FLASH CARD(OZ128)


Size Document Number Rev
Custom 2.0
2

MS-10581
Date: Friday, May 26, 2006 Sheet 22 of 44
5 4 3 2 1
5 4 3 2 1

CN4

26 GND0
GPP_TX2P 25
12 GPP_TX2P PETp0
GPP_TX2N 24
12 GPP_TX2N PETn0
U16
23 GND1
1 24 SDATA0
SMDATAI SMDATAO GPP_RX2P
12 GPP_RX2P 22 PERp0
NEWCARD_RST# 2 23
17 NEWCARD_RST# SYSRST# OC# GPP_RX2N 21
R288 10K_0402 (DNI) +3VSUS 12 GPP_RX2N PERn0
+3VSUS 3 SHDN# 3.3VAUX_IN 21 +3VSUS
D 20 GND2 D
R429 10K_0402 (DNI) 4 22 R289 10K_0402 (DNI)
STBY# CLKEN PCIE_CLKEN 18 GPP_CLK2P
16 GPP_CLK2P 19 REFCLK+

NEW CARD Connect


5 20 R290
3.3VIN 3.3VAUX_OUT +3VSUS_PCIE
GPP_CLK2N 18
16 GPP_CLK2N REFCLK-
6 19 10K_0402 (DNI)
+3VRUN 3.3VIN 1.5VIN R291 CPPE# 17 CPPE#
7 3.3VOUT 1.5VIN 18 +1_5VRUN 0_0603 CONN_CLKREQ# CONN_CLKREQ# 16 CLKREQ#
+3VRUN_PCIE 8 3.3VOUT 1.5VOUT 17
+3VRUN_PCIE 15 +3.3VS_0
NEWCARD_PERST# 9 16
PERST# 1.5VOUT +1_5VRUN_PCIE
14 +3.3VS_1
10 15 CPPE# R292 100K_0402 (DNI)
NC CPPE# +3VSUS
NEWCARD_PERST# 13
CPUSB# R293 100K_0402 (DNI) PERST#
11 GND CPUSB# 14
+3VSUS_PCIE 12 +3.3VAUX
12 13 SCLK0
SMCLKI SMCLKO WAKE_UP# R294 0_0603 NCARD_WAKE#
18 WAKE_UP# 11 WAKE#

+1_5VRUN_PCIE 10 +1.5V_1
P2231
SSOP24 9 +1.5V_2
SDATA0 R295 0R_0402 PCIE_SMBDATA 8
9,16,18 SDATA0 SMB_DATA
+3VSUS +3VRUN +1_5VRUN +3VRUN_PCIE +1_5VRUN_PCIE +3VSUS_PCIE SCLK0 R296 0R_0402 PCIE_SMBCLK 7
9,16,18 SCLK0 SMB_CLK
GND9 32
6 RESV1 GND8 31
GND7 30
C440 C441 C442 C443 C444 C445 C446 C447 5
C RESV2 C
GND6 29
0.1u_0402 0.1u_0402 0.1u_0402 10u_0805 0.1u_0402 10u_0805 0.1u_0402 0.1u_0402 CPUSB# 4 CPUSB#
18 USBP3
3 USB_D+ GND5 28

2
2 USB_D- GND4 27
L34
1 GND3
CMC_180ohm

NEWCARD_H5.0

1
PCI_H5_CARD26P
18 USBN3

B +3VSUS B
C449
C448

AC_SDIN1_1 R297 22_0603


ACZ_SDATA_IN1 18
10u_0805
0.01u_0402

C450
10p_0402 (DNI)

+3VSUS

HARRY 0125
CN5 remove R298
1 GND RESERVED1 2 TP58
18,26,30 AZ_SDATA_OUT 3 AZALIA_SDO RESERVED2 4 TP59
5 GND 3.3Vmain/aux 6
18,26,30 AZ_SYNC 7 AZALIA_SYNC GND 8
AC_SDIN1_1 R299 0_0603 9 10 22_0603
AZALIA_SDI GND BIT_CLK2 R300
18,26,27,30 AZ_RST# 11 AZALIA_RST# AZALIA_BCLK 12 AZ_BIT_CLK 18,26,30
GND
GND
GND
GND

A
C451 A
MDC 22p_0603
31
32
33
34

ME change to 5mm 02/06


MICRO-STAR INT'L CO.,LTD.
Title

NEW CARD & MDC


Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 23 of 44
5 4 3 2 1
3 2 1

+3VRUN

R446

X_10K_0402

C R447 C
TPM_PD IO Address:0x02E
18 LPCPD#

0R_0402 (DNI)
U17

17,31 LAD0 26 LAD0 GPIO 6 Can not used at


23 +3VRUN
17,31 LAD1 LAD1 RS485M-A11
17,31 LAD2 20 LAD2 3V_1 19
17,31 LAD3 17 LAD3 3V_2 24 version,See the
17,21,31 LFRAME# 22 LFRAME# 3V_3 10
+3VSUS errata
17 TPM_RST# 16 LRESET# 3VSB 5 ER_RS485A1
TPM_PD 28 LPCPD#
15 CLKRUN# GND1 18
17,22,31 SERIRQ 27 SERIRQ GND2 25
GND3 11
17,21 PCI_CLK2 21 LCLK GND4 4

9 TESTBI/BADD XTALO 14
8 TESTI XTALI/32KIN 13
R301 R302 7 Y5 X_32.768KHZ12.5P_S-2
B PP B
1 4
X_0R_0402 X_0R_0402 R303 2 12 2 3
GPIO2 NC1
1 NC4 NC2 3
0R_0402 (DNI) C452 C453
X_SLB9635TT1.2-RH X_18p_0603 X_18p_0603
B0C-0963502-I14
R304 R305
+3VRUN
0R_0402 (DNI) 0R_0402 (DNI)

+3VRUN
TESTBI/BADD
If this pin is connected to GND, addresses 2EH/2FH are used. If it is strapped to VCC,
addresses 4EH/4FH are used. Since normally 2EH/2FH are used by the SuperIO, it is
recommended to connect this pin to VCC.

Harry 0313
A A

MICRO-STAR INT'L CO.,LTD.


Title

TPM
Size Document Number Rev
A 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 24 of 44
3 2 1
5 4 3 2 1

DNI component check with C454 27p_0603X_IN


VDD33
Remove for 8111B and
Realtek's reference design 25MHZ20P_S-2 AVDD33
AVDD18 8100E
OK Y6 R307 R308 VDD33
R306 0_0603 (DNI) V_DAC

10K_0402 (DNI) LAN MAGNETICS


C455 27p_0603X_OUT C456 3.6K_0402
0.1u_0402 HARRY 0121 U19
U18
EECS 1 8 C457 V_DAC 1 24 MCT4 R309 75_0402 1%
GVDD EESK CS VCC MDI3- 0.01u_0402 TCT1 MCT1 TRD3- R310 75_0402 1%
2 SK DC 7 2 TD1+ MX1+ 23
VDD33 EEDI 3 6 C458 MDI3+ 3 22 TRD3+ R311 75_0402 1%
EEDO DI ORG C459 V_DAC TD1- MX1- MCT3 R312 75_0402 1%
4 DO GND 5 4 TCT2 MCT2 21
D C460 C461 0.1u_0402 MDI2- 0.01u_0402 5 20 TRD2- D
MDI2+ TD2+ MX2+ TRD2+
AT93C46-10SU-2.7 6 19
1u_0603 0.1u_0402 C463 C462 V_DAC TD2- MX2- MCT2
7 TCT3 MCT3 18
0.1u_0402 DVDD15 MDI1- 0.01u_0402 8 17 TRD1-

CTRL15
MDI1+ TD3+ MX3+ TRD1+ C464
9 TD3- MX3- 16
C465 V_DAC 10 15 MCT1 1000p_1808
MDI0- 0.01u_0402 TCT4 MCT4 TRD0-
11 TD4+ MX4+ 14
2.49K_0402 1% MDI0+ 12 13 TRD0+
R313 RSET TD4- MX4-

24HST1041A-3 CHASSIS_GND

U20

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
CN6

RSET
VCTRL15

CKTAL2
CKTAL1
AVDD33
VDD15
LED0
LED1
LED2
LED3
VDD33
VDD15

VDD15
GVDD

NC
NC
EESK
J7 MDC CONN
CTRL18 1 48 L35 12 13
VCTRL18 EESK

4
AVDD33 2 47 EEDI TS CN_TS CN_TS 11 14
MDI0+ AVDD33 EEDI VDD33 CN_RING RJ11
3 MDIP0 VDD33 46 1 10
C466 MDI0- 4 45 EEDO 2 1000L400m_450_0805 9
0.1u_0402 AVDD18 MDIN0 EEDO EECS C467 L36
5 AVDD18 EECS 44
MDI1+ 6 43 RING CN_RING
MDI1- MDIP1 VDD15 0.1u_0402 ME change to 5mm 02/06

3
7 MDIN1 RTL8111B-GR NC 42
BH1X2S_white-1.25pitch 1000L400m_450_0805
8 AVDD18 VDD15 41
MDI2+ 9 40 N32-1020650-M06
MDI2- MDIP2 NC SD_53780_0210 TRD3- TRD2-
10 MDIN2 NC 39 1 4
11 38 TRD3+ 2 5 TRD2+
MDI3+ AVDD18 VDD15 VDD33 TRD1- RJ45 TRD0-
12 37 3 7
MDI3- 13
MDIP3 VDD33
36
LAN MAGNETICS TRD1+ 6 8 TRD0+
MDIN3 ISOLATEB C468
14 AVDD18 NC 35
DVDD15 15 34 +3VRUN

LANWAKEB

REFCLK_N
VDD15 NC

REFCLK_P
C VDD33 16 33 0.1u_0402
EMI CHANGE: L02-1028024-T19 LTK_RJ4511ROS_RJ4511 C

ISOLATEB
VDD33 VDD15

PERSTB

EVDD18

EVDD18
N58-10F0040-A10

VDD15

VDD15
EGND

HSON
EGND
HSOP
RJ45_RJ11_SMT_14P

HSIN
HSIP
R314
NC
NC
65 GND
C469
0.1u_0402 1K_0402
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
EVDD18 R315

15K_0402

LAN_PEN1 C470 0.1u_0402


LAN_PEP1 GPP_RX3N 12
C471 0.1u_0402
GPP_RX3P 12
GPP_CLK3N
18 PCIE_WAKE# GPP_CLK3P GPP_CLK3N 16
GPP_CLK3P 16
LAN_RST#

MDI0+

MDI1+

MDI2+

MDI3+
MDI0-

MDI1-

MDI2-

MDI3-
17 LAN_RST#
12 GPP_TX3P
12 GPP_TX3N

LAN_GND R316 R317 R318 R319 R320 R321 R322 R323


VDD33 LAN_GND 49.9_0402 1% (DNI) 49.9_0402 1% (DNI) 49.9_0402 1% (DNI) 49.9_0402 1% (DNI) 49.9_0402 1% (DNI)

L37 49.9_0402 1% (DNI) 49.9_0402 1% (DNI)


+3VSUS
60L1_100_1206 49.9_0402 1% (DNI)
C473
C472 C474 C475 C476 C477
0.1u_0402

22u_0805 C478 C479


Icc33=103mA 0.01u_0402 (DNI) 0.01u_0402 (DNI) 0.01u_0402 (DNI) 0.01u_0402 (DNI)
0.1u_0402 0.1u_0402
B
Total(LAN)=Icc33+Icc18+Icc15 B
C480 C481
=103+198+367
0.01u_0402 0.01u_0402
=668mA
VDD33 AVDD33 C482 Install only for
10/100Mbit
L38 CHASSIS_GND 1000p_1808
60L1_100_1206 L39
300L700m_250_0805
L40
CHASSIS_GND 300L700m_250_0805

LAN_GND

VDD33
Only for 8111B
and 8100E AVDD18 VDD33 Only for 8111B
and 8100E
Icc18=198mA
3

Q12
CTRL18 1 P-BCP69_SOT223
Icc15=367mA
3

C483 Q13
C484 C485 C486 CTRL15 1 P-BCP69_SOT223 DVDD15
0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402
2
4

2
4

C487 C488
EVDD18 C490 C491 C492 C493 C494 C495 C496 C497 C498 C499 C500
10u_0805 0.1u_0402 C489
22u_0805 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402
A A
L41 R324
300L700m_250_0805 (DNI) 0_0805 L42
C501 C502 C503 300L700m_250_0805 (DNI)
4.7u_0805 0.1u_0402 0.1u_0402

C504

LAN_GND
C505
MICRO-STAR INT'L CO.,LTD.
22u_0805 (DNI)
22u_0805 (DNI) Title

GIGA LAN (RTL8111B)


Size Document Number Rev
Custom 2.0

Only for 8101E Only for 8101E MS-10581


Date: Friday, May 26, 2006 Sheet 25 of 44
5 4 3 2 1
5 4 3 2 1

AVDD_5V Q14 +5VSUS


060515 for Vista by Justin
Close to ALC883 N-AO3404_SOT23
AGND R325 S D

R326 10R_0603
20K_0603 1% 4700p_0603 0.1u_0603 10u_0805
27 SPDIFO

G
AGND C506 C507 C508 C509 C510
4700p_0603 0.1u_0603
AVDD_5V
D D

High (turn on) Low (Mute)


CODEC_3V
RUND 35,37,39
DEPOP_MUTE# Normal keep Power On/Down & AGND

48
47
46
45
44
43
42

41
40
39

38
37
High S3 U21

10K_0402R452

10K_0402R453
SPEAKER_MUTE# Normal keep Line-out Jack

SPDIFO

SIDE_SURR_L

AVSS2

SURR_OUT_L

AVDD2
SPDIFI / EAPD
SIDE_SURR_R

LFE_OUT
CEN_OUT

SURR_OUT_R
JDREF

LINE1_VREFOUT_R
High IN

FRONT_OUT_R 36 INTSPK_R 27
FRONT_OUT_L 35 INTSPK_L 27
1 DVDD1
2 34 R329
27 DEPOP_MUTE# GPIO0 SENSE B
27 SPEAKER_MUTE# 3 GPIO1 DCVOL 33 AVDD_5V
mute 4 10K_0603
DVSS1
MIC1_VREFOUT_R 32 MIC1_VREFOUT_R 27
18,23,30 AZ_SDATA_OUT 5 SDATA_OUT LINE2_VREFOUT 31
AC_BIT_CLK 6
18,23,30 AZ_BIT_CLK BIT_CLK
R330 22_0603 7 30
C511
18 ACZ_SDATA_IN0
R331 22_0603 8
DVSS2
SDATA_IN
REALTEK MIC2_VREFOUT_L
LINE1_VREFOUT_L 29
CODEC_3V 9 DVDD2
22p_0603 10 28
18,23,30 AZ_SYNC
18,23,27,30 AZ_RST# 11
SYNC
RESET# ALC883 MIC1_VREFOUT_L

VREF 27
MIC1_VREFOUT_L 27

PC_BEEP 12
C PC_BEEP C
AVSS1 26
25 C512

SENSE A
AVDD_5V

CD_GND
AVDD1

LINE2_R

LINE1_R
LINE2_L

LINE1_L
C513

MIC2_R

MIC1_R
MIC2_L

MIC1_L
CD_R
0.1u_0603 CODEC_3V +3VRUN

CD_L
AGND 10u_0805
L43
ALC880 1 2

13

14
15

16
17

18
19
20

21
22

23
24
80L3_100_0805
R454 5.1K_0402 1% AGND
C514 2.2u_0603 (DNI) C515 C516
27 FRONT-JD

C827

C828
C517
C518 2.2u_0603 (DNI) 0.1u_0603 0.1u_0603
R455 20K_0402 10u_0805
27 MIC-JD

1u_0603

1u_0603
AGND

C520 2.2u_0805
MIC1_R 27
AVDD_5V C522 2.2u_0805
MIC1_L 27

27
27
LINEOUT_R
LINEOUT_L
R332 C524 1u_0603 R335 47K_0603
CD_R 29
B B
4.7K_0603 C525 1u_0603 R336 47K_0603
CDGND 29
C519 4.7u_0805 C526 1u_0603 R337 47K_0603
CD_L 29
U22
5

AGND L44
1 C521 R338 R339 R340 1 2
31 BAT_LOW_TONE PC_BEEP
4 2 1 EMI
2 47K_0603 47K_0603 47K_0603 80L3_100_0805
18 SPKR
R333 10K_0603 0.1u_0603
2

C523
SZ86P5X_NL_SC70-LF C527 1000p_0603 C528 0.1u_0603
3

R334
1000p_0603 (DNI) AGND
8.2K_0603 C529 1000p_0603 C530 0.1u_0603
AGND AGND
1

whether can use two AGND


diode to cost down AGND AGND
this circuit?

A A

MICRO-STAR INT'L CO.,LTD.


Title

AUDIO(ALC883)
Size Document Number Rev
B 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 26 of 44
5 4 3 2 1
<
5 4 3 2 1

AVDD_5V
060515 for Vista by Justin PWR_SRC
+3VRUN Q16 +3V_SPDIF
U23
6 18 SPK_OUT_R+
PVDD#6 ROUT+ SPK_OUT_R-
15 PVDD ROUT- 14
AVDD_5V 16 R349 D S
VDD SPK_OUT_L+ 100K_0603
LOUT+ 4
C535 0.47u_0603 5 8 SPK_OUT_L-
26 LINEOUT_L LIN- LOUT-
0.1u_0603 N-2N7002_SOT23

G
C532 4700p_0603 C536 0.47u_0603 17 12 Q17
26 LINEOUT_R RIN+#17 NC
C534

D
C531 C533 19 MUTE_INTSPKR
10u_0805 0.1u_0603 C538 0.47u_0603 SHUTDOWN
7 RIN+ 26 SPEAKER_MUTE# G
AVDD_5V 21
C539 0.47u_0603 21
D 9 LIN+ D

S
N-2N7002_SOT23
AGND R343 100K_0603 (DNI) GAIN0 C540 10u_0805 10 11 +3V_SPDIF
BYPASS GND#11
GND 13
R345 100K_0603 (DNI) GAIN1 GAIN0 2 1
AGND GAIN1 GAIN0 GND#1
GAIN0 GAIN1 SE/BTL# 3 GAIN1 GND#20 20

6dB 0 0 0 R346 100K_0603 GAIN0 APA2031RI-TRL_TSSOP20-LF R348 CON1


AGND
R347 100K_0603 GAIN1 0_0603
10dB 0 1 0
11
15.6dB 1 0 0 9 GND
AGND 8 VCC
21.6dB 1 1 0 26 SPDIFO 7 VIN 12
10
4.3dB X X 1 C541 330u_2SP 6
300L300m 5
DEPOP_L L45 1 26 FRONT-JD

+
1 2 2
4
300L300m 2
DEPOP_R L46 1

+
1 2 2 3
1
C542 330u_2SP
C543 C544 CI545 R350

22K_0402 R456

22K_0402 R457
C546 C547 R351
100p_0603 100p_0603 2F11381-SJ5-TR

0.1u_0402 (DNI)
100p_0603 0_0603 N58-09F0041-F02
0.1u_0402 0_0603 SPDIF_MINI_JACK
D-S interchange
AGND
AGND
C Q34 AGND C
R459 33_0402 Q35 AGND AGND
26 INTSPK_R D2 G2 FOR EMI
S2 S1
R460 33_0402 D1 G1 G1 D1 DEPOP_R
26 INTSPK_L
S1 S2
DEPOP_L
G2 D2 SPEAKER
J8
2N7002DW SPK_OUT_L- 1 5
2N7002DW SPK_OUT_L+ 2
SPK_OUT_R+ 3
SYS_OFF SPK_OUT_R- 4
6
C548 C549 C550 C551
POWER ON/OFF/S3/S4 NOISE CONTROL 0.22u_0603 0.22u_0603 0.22u_0603 0.22u_0603
AGND
SYS_ON MOLEX_53261-0490
N32-1040430-H06
AGND 53398_04

Harry 02/07

MIC1_VREFOUT_R R353 2.2K_0402 (DNI)


MIC
26 MIC1_VREFOUT_R

8
7
CN7
MIC1_R 5
26 MIC1_R 26 MIC-JD
C552 4
R354 0R_0402 3
R461100K_0603 PWR R462100K_0603 PWR 1000p_0603 6
B +5VALW B

New Modify Sch for R355 0R_0402 MIC_1 2


Q37 SYS_ON Q38 SYS_OFF AGND 1
Vista 03/06 C553 C554
D

C830 (MUTE SPEAKER) MIC1_VREFOUT_L R356 2.2K_0402 IOC-JACK-D08-S56


R463 26 MIC1_VREFOUT_L 680PF 680PF N54-06F0431-A10
G G
10K_0402 10u_1210 MIC1_L AUDIO_JACK_6P_OB
26 MIC1_L
S

R464 1K_0402 N-2N7002_SOT23 N-2N7002_SOT23 AVDD_5V Modify Sch 03/06 C555


26 DEPOP_MUTE#
For EMI AGND
Q39 SE_MODE# 1000p_0603
R465 1K_0402 (DNI)
->MUTE Sch
D

18 SB_DEPOP
R458
D23 R466 10K_0402 D24 BAS40WS
G 100K_0603 AGND
18,23,26,30 AZ_RST# C A A C
MUTE_INTSPKR
S

N-2N7002_SOT23 +3VRUN
PWR_SRC BAS40WS
R467100K_0603
PWR
R468 10K_0402
Q36 Mobile Configuation:
D

C831 D25 BAS40WS


2.2u_0603 A C G
(3 external jacks, 1 internal Mic, 2 sets stereo internal speaker)
Q40 C829
R469 1u_0603 (DNI) Pin Assignment Location Re-tasking
D

N-2N7002_SOT23
180K_0603 G FRONT(pin-35/36) SPDIF jack, AMP SPDIF output, AMP output(Int.SPKR), ?
26 SPEAKER_MUTE#
SURR (pin-39/41) X X
S

N-2N7002_SOT23 AGND AGND


CEN/LFE (pin-43/44) X X

A POWER ON/OFF/S3/S4 NOISE CONTROL SIDESURR (pin-45/46) X X A


Close To Power Source LINE1 (pin-23/24) Line-in jack Line input, ?
POWER ON/OFF/S3/S4 NOISE CONTROL
MIC1 (pin-21/22) MIC-in jack Mic input, ?
MIC2 (pin-16/17) Int.MIC Int.Mic input
MICRO-STAR INT'L CO.,LTD.
Title

AMP & SPK & MIC & SPK


Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 27 of 44
5 4 3 2 1
5 4 3 2 1

DNI component check with MS1057 OK

+5VRUN USB5V_A
D +5VRUN USB5V_C 1.5A_MSMD_POLY_SW D

USB5V_C F1
F2

2
C556 C557 C558 C559

2
C560 EC1 C561 C562

+
1.5A_MSMD_POLY_SW C563 470p_0402 470p_0402 0.1u_0402 0.1u_0402
470p_0402 330u_7343 470p_0402 0.1u_0402

1
22u_1206

1
5
L_USBP1N
1 J9

5
1
18 USBN1 2 2

7
5
3 L_USBP0N
3

1
4 1 J10

7
5
4 1

6
L47 2
18 USBN0 2
CI564 CI565 3
CMC_180ohm 3

3
USB-D-WH-B

6
4 4

8
6
N53-04M0421-A10 L48

0.01u_0402 (DNI)

0.01u_0402 (DNI)
USB_CONN_C1470 CI566 CI567
3 CMC_180ohm USB

8
6
C 18 USBP1 C
N53-04M0430-A10

0.01u_0402 (DNI)
L_USBP1P 0.01u_0402 (DNI) USB4_SMT_1006

4
18 USBP0
FOR EMI L_USBP0P

SMT
USB5V_C
FOR EMI
Dip
2

2
C568 EC2 C569 C570
+

470p_0402 330u_7343 470p_0402 0.1u_0402 USB5V_A


USB5V_C
1

5
5
L_USBP2N 1 J11 6 4 L_USBP0P

5
1 L_USBP2N L_USBP1P
2 2 6 4
3 1 3 L_USBP0N
18 USBN2 3 L_USBP1N
4 L_USBP2P 1 3
4
4

6
D6
L49 CI571 CI572 D7 IPC220CZ6 /SO6 (DNI)

2
B B
USB-D-WH-B IPC220CZ6 /SO6 (DNI)

2
CMC_180ohm N53-04M0421-A10
0.01u_0402 (DNI)

0.01u_0402 (DNI)

USB_CONN_C1470

10/28
3

18 USBP2
L_USBP2P

FOR EMI

A A

MICRO-STAR INT'L CO.,LTD.


Title

USB 2.0X3
Size Document Number Rev
B 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 28 of 44
5 4 3 2 1
5 4 3 2 1

2.5"HD DRIVE
060515 Justin

CN8

19 SATA_TX0+_C S2 TX GND_2M_S_1 S1
D
19 SATA_TX0-_C S3 TX# GND_2M_S_4 S4 D
S5 S7 060523 EMI Kung
19 SATA_RX0-_C RX# GND_2M_S_7
19 SATA_RX0+_C S6 RX
P1 3.3V_1 GND_1M_P_4 P4
P2 3.3V_2 GND_2M_P_5 P5
P3 P6 SATA_TX0+_CCI851 10pf_0402
3.3V_3_PC GND_2M_P_6
P7 SATA_TX0-_C CI852 10pf_0402
5V_7_PC
P8 5V_8
P9 P10 SATA_RX0-_CCI853 10pf_0402
5V_9 GND_2M_P_10
P11 P_Reserver_11
+5VRUN SATA_RX0+_CCI854 10pf_0402
P13 V_12_13_PC GND_1M_P_12 P12
P14 V_12_14
P15 V_12_15
GND1 G1
GND2 G2
1

GND3 M1
C832 C833 C834 CI855 M2
0.1u_0402 0.1u_0402 0.1u_0402 (DNI) GND4
150UF
2

SATA CONN_22P
SATA_CON_22P

C C

IDE_D[15..0]
IDE_D[15..0] 19
+3VRUN

CN9
53

CD_L 51 CD_R
26 CD_L CDGND 1 2 CD_R 26 060515 Justin +3VRUN R359 R360
26 CDGND R361 47_0603 3 4 IDE_D8 10K_0402 10K_0402
17 IDERST# IDE_D7 5 6 IDE_D9
7 8 U24
IDE_D6 IDE_D10 NC7SZ08M5X
9 10

3
B IDE_D5 IDE_D11 B
IDE_D4 11 12 IDE_D12 CD_ACTIVE#
13 14 1
+5VRUN IDE_D3 IDE_D13 4
IDE_D2 15 16 IDE_D14 31 LED_HDD# SATA_ACT#
17 18 2 SATA_ACT# 19
IDE_D1 IDE_D15
IDE_D0 19 20 IDE_REQ
21 22 IDE_IOR# IDE_REQ 19

5
23 24 IDE_IOR# 19
1

C577 IDE_IOW#
C578 19 IDE_IOW# IDE_IORDY# 25 26 IDE_DACK#
2200p_0603 19 IDE_IORDY# SIRQI 27 28 IDE_DACK# 19,21
150UF 19 SIRQI IDE_A1 29 30 IDE_DMA66
2

19 IDE_A1 IDE_A0 31 32 IDE_A2 IDE_DMA66 18


19 IDE_A0 IDE_CS1# 33 34 IDE_CS3# IDE_A2 19
19 IDE_CS1# CD_ACTIVE# 35 36 IDE_CS3# 19
37 38
+5VRUN 39 40 +5VRUN
41 42
R362 43 44 C579 C580
CD_SEL 45 46
+5VRUN 47 48 0.1u_0402 0.01u_0402
49 50
54

1K_0402 (DNI) 52
R364 IDE_DMA66 R363 100K_0402
PIN32:PDIAG
Harry 060517
PIN37:PASP 1K_0402
PIN47:CABLE SELECT->Low:Master ALLTOP_BB_C12409_15001
N5C-50M0121-A10
NC or High:Slave CDROM50_BTB_RA
A A

MICRO-STAR INT'L CO.,LTD.


Title

SATA HDD/PATA CDROM CONN


Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 29 of 44
5 4 3 2 1
5 4 3 2 1

PCI_AD[31..0]
PCI_AD[31..0] 17,21,22
MINI PCI SOCKET
+3VSUS
CON2
D 1 2 D
TIP RING
3 LAN_0 LAN_1 4
Reserved 5 6
LAN_2 LAN_3 Reserved
7 LAN_4 LAN_5 8
9 LAN_6 LAN_7 10
LED_WLAN_ACT 11 12 LED_WLAN_LINK TP61
+3VRUN TP60 RF_ON/OFF- LAN_8 LAN_9
13 LAN_10 LAN_11 14
15 LAN_12 LAN_13 16 BLUETOOTH_LED# 31
17 PCI_INTB# 17 INT#B 5V 18 +5VRUN
19 3.3V_0 INT#A 20 PCI_INTC# 17
21 22 +3VRUN
18 USBN4 RSVD_0 RSVD_7 USBP4 18
23 GND_0 3.3VAUX 24
17,21 PCI_CLK1 25 PCICLK RST# 26 MINIPCI_RST# 17
27 GND_1 3.3V_7 28
17 PCI_REQ#1 29 REQ# GNT# 30 PCI_GNT#1 17
31 3.3V_1 GND_15 32
PCI_AD31 33 34 PCI_PME#
AD31 PME# PCI_PME# 18,22
PCI_AD29 35 36
AD29 RSVD_6 PCI_AD30
37 GND_2 AD30 38
PCI_AD27 39 40 4/12
PCI_AD25 AD27 3.3V_6 PCI_AD28
41 AD25 AD28 42
43 44 PCI_AD26
RSVD_1 AD26 PCI_AD24 R365
17,22 PCI_CBE#3 45 C/BE#3 AD24 46 100_0603
close CN8 for EMI PCI_AD23 47 48 PCI_AD25_R_MINI 1 2 PCI_AD25
PCI_CLK1 AD23 IDSEL
49 GND_3 GND_14 50
PCI_AD21 51 52 PCI_AD22 +3VSUS
RI366 PCI_AD19 AD21 AD22 PCI_AD20
53 AD19 AD20 54
100_0402 (DNI) 55 56
GND_4 PAR PCI_PAR 17,22
PCI_AD17 57 58 PCI_AD18
AD17 AD18 PCI_AD16
17,22 PCI_CBE#2 59 C/BE#2 AD16 60 1
C 61 62 C582 C583 C584 C
CI581 17,22 PCI_IRDY# IRDY# GND_13
63 3.3V_2 FRAME# 64 PCI_FRAME# 17,22 4.7u_0805
65 66 0.1u_0402 0.1u_0402
17,22,31 PCI_CLKRUN# CLKRUN# TRDY# PCI_TRDY# 17,22 2
0.01u_0402 (DNI) 67 68
17 PCI_SERR# SERR# STOP# PCI_STOP# 17,22
69 GND_5 3.3V_5 70
17 PCI_PERR# 71 PERR# DEVSEL# 72 PCI_DEVSEL# 17,22
17,22 PCI_CBE#1 73 C/BE#1 GND_12 74
PCI_AD14 75 76 PCI_AD15
AD14 AD15 PCI_AD13
77 GND_6 AD13 78
PCI_AD12 79 80 PCI_AD11
PCI_AD10 AD12 AD11
81 AD10 GND_11 82
83 84 PCI_AD9
PCI_AD8 GND_7 AD9 +5VRUN
85 AD8 C/BE#0 86 PCI_CBE#0 17,22
PCI_AD7 87 88
AD7 3.3V_4 PCI_AD6
89 3.3V_3 AD6 90
+5VRUN PCI_AD5 91 92 PCI_AD4
Bluetooth_on/off AD5 AD4 PCI_AD2
93 RSVD_2 AD2 94
PCI_AD3 95 96 PCI_AD0 C585 C586
AD3 AD0
97 5V RSVD_5 98
PCI_AD1 99 100 0.1u_0402 0.1u_0402
AD1 RSVD_4
101 GND_8 GND_10 102
18,23,26 AZ_SYNC 103 AC_SYNC M66EN 104
18 ACZ_SDATA_IN2 105 AC_DI AC_DO 106 AZ_SDATA_OUT 18,23,26
18,23,26 AZ_BIT_CLK 107 AC_BIT_CLK AC_ID0# 108
109 AC_ID1# AC_RST# 110 AZ_RST# 18,23,26,27
C587 R367 22_0603 111 112
MOD_A_MON RSVD_3
113 AGND GND_9 114
22p_0402 115 116
SYS_A_OUT SYS_A_IN
117 SYAOGND SYAIGND 118
+5VRUN 119 120 +3VSUS
B AGND_0 AGND_1 +3VRUN B
121 NC MCPIACT# 122
R368
1 2 123 VCC5A 3.3VAUX 124
0_0603
AMP_Mini-PCI-7.95H_ROHS

C588 C589 C590 C591 C592

0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402 0.1u_0402

+3VRUN
+3VRUN

R369
R370 10K_0603
BT_PWRON- LOW ==> ENABLE 10K_0603
RF_ON/OFF Control
RF_ON/OFF-
BT_PWRON- HIGH ==> DISENABLE Bluetooth_on/off Q18
Q19
WLAN_PWRON- High RF OPEN RF ON (HiZ)
D

A A
D

關 31 WLAN_PWRON- G
LOW RF OFF
31 BT_PWRON- G
S

N-2N7002_SOT23
S

N-2N7002_SOT23
MICRO-STAR INT'L CO.,LTD.
Title

MINI PCI/USB 2.0 BLUE TOOTH


Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 30 of 44
5 4 3 2 1
5 4 3 2 1

+3VALW
U25
+3VALW 161 VCCBAT VCC 16
VCC 34
CN10 80L700m_200-LF Pin 118 NB_VCC_PG High
17 GND VCC 45
KBOUT0 50 49 KBOUT0 35 123 1 2 L50 Input
KBOUT1 50 49 KBOUT1 GND VCC Pin 86 NB_PWRGD Output High
48 48 47 47 46 GND VCC 136

0.1u_0402

0.1u_0402

0.1u_0402

0.1u_0402
KBOUT2 46 45 KBOUT2 122 POWER & GND 157 C594 C595 C596
KBIN0 46 45 KBIN0 GND VCC C593 C597 Pin 91 SB_PWRGD Output after NB_PWRGD Output 35ms High
44 44 43 43 137 GND VCC 166
KBIN1 42 41 KBIN1 167
KBIN2 42 41 KBIN2 GND Pin 92 VLDT_PG input
40 40 39 39 159 BATGND VCCA 95
KBIN3 38 37 KBIN3 96 10u_0805
KBOUT3 38 37 KBOUT3 AGND
36 36 35 35
KBOUT4 34 33 KBOUT4 7 85
34 33 17,22,24 SERIRQ SERIRQ XIO8CS#/GPIO18 S5_ON 33
KBIN4 32 31 KBIN4 9 86 R371 0R_0402 (DNI)
32 31 17,21,24 LFRAME# LFRAME# XIO9CS#/GPIO19 NB_PWRGD 13,33
D KBIN5 30 29 KBIN5 15 91 R372 0R_0402 (DNI) D
30 29 17,24 LAD0 LAD0 XIOACS#/GPIO1A SB_PWRGD 18,33
KBIN6 28 27 KBIN6 14 92 R441 0R_0402 (DNI)
28 27 17,24 LAD1 LAD1 XIOBCS#/GPIO1B SW_1# VLDT_PG 33,35
KBIN7 26 25 KBIN7 13 LPC 93
26 25 17,24 LAD2 LAD2 XIOCCS#/GPIO1C
KBOUT5 24 23 KBOUT5 10 94 SW_2# U27
24 23 17,24 LAD3 LAD3 XIODCS#/GPIO1D SW_3# TP63 EC_A0 EC_D0
KBOUT6 22 21 KBOUT6 18 97 12 13
22 21 17,21 PCI_CLK5 LCLK XIOECS#/GPIO1E SW_4# TP64 EC_A1 A0 D0 EC_D1
KBOUT7 20 19 KBOUT7 +3VALW 25 98 11 14
20 19 17,22,30 PCI_CLKRUN# CLKRUN#/GPIO0C XIOFCS#/GPIO1F TP65 EC_A2 A1 D1 EC_D2
KBOUT8 18 17 KBOUT8 1_0603 1% (DNI) 10 15
KBOUT9 18 17 KBOUT9 R373 EC_A0 EC_A3 A2 D2 EC_D3
16 16 15 15 24 GPIO0B A0 124 9 A3 D3 17
KBOUT10 14 13 KBOUT10 LPCRST# 165 125 EC_A1 EC_A4 8 18 EC_D4

C
14 13 17 LPCRST# KRST# LRST#/GPIO2C A1 EC_A2 EC_A5 A4 D4 EC_D5
KBOUT11 12 11 KBOUT11 6 126 7 19
KBOUT12 12 11 KBOUT12 D8 R374 GA_20 KBRST#/GPIO03 A2 EC_A3 EC_A6 A5 D5 EC_D6
10 10 9 9 5 GA20/GPIO02 A3 127 6 A6 D6 20
KBOUT13 8 7 KBOUT13 10K_0603 KB_SCI- 31 128 EC_A4 EC_A7 5 21 EC_D7
KBOUT14 8 7 KBOUT14 BAS40WS EC_RST# ECSCI# A4 EC_A5 EC_A8 A7 D7 ML2
6 6 5 5 19 ECRST# A5 131 27 A8
KBOUT15 4 3 KBOUT15 132 EC_A6 EC_A9 26
4 3 KBIN0 A6 EC_A7 EC_A10 A9 EC_A18

A
2 2 1 1 71 KSI0/GPIK0 A7 133 23 A10 VPP 1
KBIN1 72 143 EC_A8 EC_A11 25
KBIN2 KSI1/GPIK1 A8 EC_A9 EC_A12 A11
73 KSI2/GPIK2 A9 142 4 A12
MOLEX_52207-2690_FPC-26p-CONN C598 KBIN3 74 135 EC_A10 EC_A13 28
LPCRST# 1u_0603 KBIN4 KSI3/GPIK3 A10 EC_A11 EC_A14 A13
77 KSI4/GPIK4 A11 134 29 A14
KBIN5 78 130 EC_A12 EC_A15 3 +3VALW AMI_LABEL
KBIN6 KSI5/GPIK5 A12 EC_A13 EC_A16 A15 L51
79 KSI6/GPIK6 A13 129 2 A16
R375 KBIN7 80 121 EC_A14 EC_A17 30 32
10K_0603 +3VALW U28 KSI7/GPIK7 A14 EC_A15 A17 VCC 80L2_100_0805
A15 120
S G==> G KBOUT0 49 113 EC_A16 MEM_CS- 22 C599 C600
D9 BAS40WS S S==>R KBOUT1 KSO0/GPOK0 A16 EC_A17 EC_RD- CE#
D D 50 KSO1/GPOK1 A17 112 24 OE#
A C GA_20 G D==>V KBOUT2 51 X-BUS 104 EC_A18 EC_WR- 31 16 0.1u_0402 10u_0805
18 KA20M#_SB G KBOUT3 KSO2/GPOK2 A18 WE# GND
52 KSO3/GPOK3 A19 103 TP66
ALLIANCE ( ASM809SEURF-T ) (DNI) KBOUT4 53 108
KBOUT5 KSO4/GPOK4 A20/GPIO23 TP67
D10 BAS40WS C601 56 KBC W39L040AP70Z
KBOUT6 KSO5/GPOK5 EC_D0
18 KRST#_SB A C KRST# 57 KSO6/GPOK6 D0 138
0.1u_0402 (DNI) KBOUT7 58 139 EC_D1 +3VALW
KBOUT8 KSO7/GPOK7 D1 EC_D2 EMI
59 KSO8/GPOK8 D2 140
D11 BAS40WS KBOUT9 60 141 EC_D3
change Footprint KBOUT10 KSO9/GPOK9 D3 EC_D4 BATCLK_M
C PWRBT- +3VALW R376 4.7K_0603

13
18 SB_PWRON# A 61 KSO10/GPOK10 D4 144
KBOUT11 64 145 EC_D5
C KBOUT12 KSO11/GPOK11 D5 EC_D6 BATDATA_M R377 4.7K_0603 C602 C603 CN11 C
65 KSO12/GPOK12 D6 146
D12 BAS40WS R378 10K_0603 KRST# KBOUT13 66 147 EC_D7 0.1u_0402 0.1u_0402
KBOUT14 KSO13/GPOK13 D7 EC_RD-
18 LPC_PME# A C KB_SWI- 67 KSO14/GPOK14 RD# 150 Add at 8/3 1
KBOUT15 68 151 EC_WR- 2
KSO15/GPOK15 WR# EC_CS- +3VRUN
TP68 153 KSO16/GPOK16 IOCS# 152 TP69 +5VRUN 3
D13 BAS40WS
TP70 154 KSO17/GPOK17 MEMCS# 173 MEM_CS- 17 LPCRST#
LPCRST# 4
A C KB_SCI- SERIRQ 5
18 KBSCI# R379 100_0603 PCI_CLK5
32 PWRSW- 2 GPWU0 SCL1 163 BATCLK_M 40 6
26 164 +3VALW LDRQ#0 7
18,40,41 AC_OK# GPWU1 SDA1 BATDATA_M 40 17 LDRQ#0
D14 BAS40WS 29 SM-BUS 169 LAD0 8
40 M_BATIN# GPWU2 SCL2 SMB_THRMCPU_CLK 7 EC_A4
18 LPC_SMI# A C KB_SMI- R380 100_0603 30
GPWU3 SDA2 170 SMB_THRMCPU_DATA 7
R381 4.7K_0603 LAD1 9
GPWU4 44 LAD2 10
R382 100_0603 GPWU4 EC_A5 R383 4.7K_0603 LAD3
76 GPWU5 PWM0/GPOW0 32 11
R384 100_0603 172 33 LFRAME# 12
32 MAIL_K# GPWU6/TIN1 PWM1/GPOW1 3910P105
R385 100_0603 176 36 R386 4.7K_0603
TP_DATA1 R387 18 SLP_S3# GPWU7/TIN2/FANFB2 PWM2/GPOW2/FAN1PWM FAN_PWM0 34
10K_0603 37
+5VRUN PWM3/GPOW3 BAT_LOW_TONE 26 EC_A1
38 R388 4.7K_0603
TP_CLK1 PWM4/GPOW4 TP71
TP_CLK1 R389 10K_0603 +5VRUN 110 39 BH1X12 (DNI)

14
TP_DATA1 PSCLK1 PWM5/GPOW5 3910P11 R390 4.7K_0603 53261_12
111 PSDAT1 PWM6/GPOW6 40 TP72
+3VALW R391 4.7K_0603 114 43 N32-1120020-M06
PSCLK2 PWM7/GPOW7/FAN2PWM TP73 3910P12
RN24 8P4R-10K_RN0402 R392 4.7K_0603 115 PS2 I/F R393 4.7K_0603
PSDAT2
1 2 391P81 R394 4.7K_0603 116 PSCLK3
3 4 VBAT R395 10K_0603 GPWU4 R396 4.7K_0603 117 PSDAT3 FANFB1/TOUT1/GPIO2E 171 FAN_TACH0 34
5 6 ICHG H/W Strap for ENE 3910
7 8 INP 391P81 81
+3VRUN VBAT AD0/GPIAD0
82 AD1/GPIAD1
RN25 8P4R-10K_RN0402 ICHG 83 54 LED_CAP#
4.7K_0603 KRST#_SB INP AD2/GPIAD2 CAPLOCK#/GPIO11
1 2 THRM-VGA R448 84 AD3/GPIAD3 FNLOCK#/GPIO12 55 BT_PWRON- Low LED
3 4 THRM-RAM THRM-VGA 87 41 LED_SCR#
AD4/GPIAD4 SCROLLLOCK#/GPIO0F
5 6 3910P90 R449 4.7K_0603 KA20M#_SB THRM-RAM 88 AD5/GPIAD5 NUMLOCK#/GPIO0A 23 LED_NUM# 亮
7 8 3910P89 3910P89 89 AD6/GPIAD6
3910P90 90
28
AD7/GPIAD7 DA0/GPODA0 99
100
BR-AD-ADJ 15 BLUETOOTH_LED#
32 LAUNCH_K# GPIO0E DA1/GPODA1 TP74
KB_SWI- 27 GPIO0D DA2/GPODA2 101 TP75 Low LED 亮

21
22
B
15 EC_BLON 175 TOUT2/GPIO2F DA3/GPODA3 102 TP76 44 N29290158 B
33,37 RUN_ON 8 GPIO04 DA4/GPODA4 1 TP77
3910P11 11 42
3910P12 GPIO05/FAN3PWM DA5/GPODA5 TP78
100_0603R397 12 47 BT_PWRON- R398 0R_0402 18
TP89 LED_BATLOW# GPIO06/FANFB3 DA6/GPODA6 TP79
20 GPIO07 DA7/GPODA7 174 TP80 17
LED_CHARGE# 21 R399 0R_0402 (DNI) 16
KB_SMI- GPIO08 30 BLUETOOTH_LED#
22 3 PM_SUS_STAT 15
GPIO09 E51IT0/GPIO00 BT_PWRON- 30
48 4 LED_HDD# 14
41 PRE_CHG GPIO10 E51IT1/GPIO01 TP81 29 LED_HDD#
62 106 LED_NUM# 13
40,41 ENCHG GPIO13 E51RXD/GPIO21/ISPCLK TP82
63 107 6855 LED_CAP# 12
7 CPU_THRM_ALERT- GPIO14 E51TXD/GPIO22/ISPDAT TP833910P105
R400 100_0603 69 105 LED_SCR# 11 CN12
32 IE_K# GPIO15 E51CS#/GPIO20/ISPEN_TP TP84
70 LED_CHARGE# 10
32 BT_WLAN_K# GPIO16
75 LED_BATLOW# 9 CONN-FPC6B
ENCHG 18 SLP_S5# GPIO17
PRE_CHG
32 PM_SUS_STAT 109
118
GPIO24
160
WLAN_PWRON- Low LED 亮 WLAN_PWRON- 8
7
FPC_SD52559_1817
N5A-18F0070-M06
33,39 NB_VCC_PG GPIO25 XCLKO
R401 100_0603 119 TP_CLK1 6
41 ENCHG_1P GPIO26
R402 R403 R404 100_0603 148 TP_DATA1 5
15 LID- GPIO27
10K_0603 10K_0603 149 CLOCKS 4
18,33 SUSPWROK GPIO28
R405 100_0603 155 3
37 SUS_ON GPIO29 +5VRUN
40 AC_CTL 156 GPIO2A +5VSUS 2
30 WLAN_PWRON- 162 GPIO2B +5VALW 1
PWRBT- 168 158 R406 10M_0603 (DNI)
GPIO2D XCLKI
C604 C605

20
19
KB3910F-C1-RH Y7 32.768KHZ12.5P_S-2 CI606 CI607 CI608 1000p_0603
SW2 1 4 0.1u_0402 0.1u_0402 0.1u_0402 1000p_0603
RN26 8P4R-10K_RN0402 2 3
SW_4# 1 8 1 2 C609 C610
SW_3# 2 7 3 4 EMI
+3VRUN
SW_2# 3 6 5 6 18p_0603 18p_0603
SW_1# 4 5 7 8

0.1u_0402
hch_hds4-04-e_sw-dip 1 2 3 4 0.1u_0402 CI611 CI612 CI613
SW_4# SW_3# SW_2# SW_1#
A A
R442 R443 R444 R445 0.1u_0402
0 0 0 0 PCB 1.0/1.1 close chip for EMI PM_SUS_STAT
100K_0603 100K_0603 100K_0603 100K_0603 PCI_CLK5 LED_HDD#
0 0 0 1 PCB 2.0 LED_NUM#
R407 LED_CAP#
0 0 1 0 100_0402 (DNI) LED_SCR#
LED_CHARGE#
0 0 1 1 LED_BATLOW#

0 1 0 0 C614
WLAN_PWRON-
0.1u_0402 0.1u_0402
MICRO-STAR INT'L CO.,LTD.
CI615 Title
0 1 0 1 0.01u_0402 (DNI) EMI CI616 CI617 CI618 CI619
KBC (ENE3910) & ISA BIOS
0 1 1 0 0.1u_0402 0.1u_0402 0.1u_0402 Size Document Number Rev
Custom 2.0
0 1 1 1 MS-10581
Date: Friday, May 26, 2006 Sheet 31 of 44
5 4 3 2 1
5 4 3 2 1

D +3VALW +3VSUS D

C
R408 D15 R409 D16

10K_0402 BAS40WS (DNI) 10K_0402 BAS40WS (DNI)

A
PWRSW- LAUNCH_K#
PWRSW- 31 LAUNCH_K# 31

C620 C621

0.1u_0402 0.1u_0402

+3VSUS +3VSUS
C C

J12
MAIL_K# 1
C

C
BT_WLAN_K# 2 R410 R411
IE_K# 3 D17 D18
PWRSW- 4 10K_0402 10K_0402
LAUNCH_K# BAS40WS (DNI) BAS40WS (DNI)
5
SUS_STAT_LED 6
A

A
7
8 MAIL_K# IE_K#
MAIL_K# 31 IE_K# 31
BH1X8S_white-1.25pitch
N32-1080060-H06
53398_08 C622 C623

0.1u_0402 0.1u_0402

+3VSUS

B B
R412
C

+5VALW
PM_SUS_STAT 31
R413 D19
47K_0603
10K_0402 BAS40WS (DNI)
G
A

BT_WLAN_K#
BT_WLAN_K# 31
S D 240R_0603 R414
+5VSUS

C624 SUS_STAT_LED
Q20
0.1u_0402
N-2N7002_SOT23

A A

MICRO-STAR INT'L CO.,LTD.


Title

LED & LAUNCH KEY


Size Document Number Rev
B 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 32 of 44
5 4 3 2 1
5 4 3 2 1

+3VSUS +3VSUS SB460 ONLY


+3VSUS U36C
31 S5_ON 9
C625
8 VTT_VDDIO_EN 38
+3VSUS 10
7,36 VDD_PG
PR1 0.1u_0402 C626 VHC32MTC_NL_TSSOP14-LF
+3VSUS

5
100K_0402 U37A U37B C627
D 0.1u_0402 D
SUSPWROK U36A

14
39 1.8VSUS_PWRGD 1 6 3 4 SUSPWROK 18,31
0.1u_0402

14
U38A 1
NC7WZ14-SC70 NC7WZ14-SC70 1 3 VDDA_EN
38 VTT_VDDIO_PG VDDA_EN 35

2
3 2
D22 NB_PWRGD 2
VHC32MTC_NL_TSSOP14-LF
PC1 BAS40WS (DNI)

7
LCX08MTC_NL_TSSOP14-LF

7
T_CRIT_CPU# C
0.68u_0603
+3VRUN
U36B
U38D AND_PG 4
U38C 12 6 VDD_EN 36
VDDA_PG 9 11 5
35 VDDA_PG
8 13
R415 10 VHC32MTC_NL_TSSOP14-LF
38 VTT_VDDIO_PG
LCX08MTC_NL_TSSOP14-LF
Q21 10K_0402 LCX08MTC_NL_TSSOP14-LF
D

N-2N7002_SOT23 (DNI) 31,35 VLDT_PG


G
U38B
2 7,36 VDD_PG 4
S

R416 6
C Q22 RUN_ON VLDT_EN 35 C
100K_0603 (DNI) 5

D
31,37 RUN_ON
N-2N7002_SOT23
G T_CRIT_CPU# 7 LCX08MTC_NL_TSSOP14-LF
1

U36D

S
12
11
13

VHC32MTC_NL_TSSOP14-LF

+3VSUS +3VRUN

KBC Pin 118 NB_VCC_PG Input High

2
+3VSUS
KBC Pin 86 NB_PWRGD Output High R417 R418
Will be change control by EC on
KBC Pin 91 SB_PWRGD Output after NB_PWRGD Output 35ms High EVT 4.7K_0603 100K_0603 U32
B B
+3VRUN KBC Pin 92 VLDT_PG A

1
1
VCC 5
+3VSUS RUN_ON 2 B

D
Y 4 SB_PWRGD 18,31
G Q23 C628 3 GND
R419
N-2N7002_SOT23 0.68u_0603

S
100K_0603 SN74AHC1G08

D
U33
VLDT_PG G Q24
31,39 NB_VCC_PG 1 A N-2N7002_SOT23
VCC 5 delay 68ms
NB PG to SB PG must large

S
RUN_ON 2 B
Y 4 NB_PWRGD 30ms
NB_PWRGD 13,31
3 GND

C629

D
SN74AHC1G08
0.68u_0603 RUN_ON G Q25
N-2N7002_SOT23

A S A

MICRO-STAR INT'L CO.,LTD.


Title

PWRGD
Size Document Number Rev
B 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 33 of 44
5 4 3 2 1
5 4 3 2 1

DNI component check with MS1013 OK

D D

PWR_SRC +5VRUN

U34A +3VRUN

1
2
5
6
LM358MX NOPB
R420 100K_0603
R421 100K_0603 3 Q26
31 FAN_PWM0
1 3 R422
N-Si3456DV_TSOP6
2

C630

C631
10K_0603

4
FAN_TACH0 31

0.1u_0402

0.1u_0402
VCCFAN1
C632 47p_0402 FAN1
C C
J13
R423 100K_0603 VCCFAN1 1
2
PWR_SRC C633 C634 3
CI635
U34B R424 10u_0805
0.1u_0402 BH1X3#_white-1.25pitch
8

LM358MX NOPB 100K_0603 N32-1030130-H06

0.1u_0402 (DNI)
3
5 53398_03
7 1 2
6
D20
S-BAT54C_SOT23 (DNI)
4

FOR EMI
B B

A MICRO-STAR INT'L CO.,LTD. A


Title

FAN
Size Document Number Rev
A 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 34 of 44
5 4 3 2 1
3 2 1

PR14
0R_0402
26,37,39 RUND 2 1

PR15 +1.2VRUN
+5VSUS 1M_0603 PQ3
C N-PFE3000_SO8 +VLDT C

8 3
PR16 7 2
100K_0402 6 1
5
PC22

10u_0805

4
D1

D2
PU3

2N7002DW G1

G2
S1

S2

cost down
33 VLDT_EN

PR18
100K_0402 +3VRUN

+VLDT +3VSUS
PR17

100K_0402

PR20 VLDT_PG
VLDT_PG 31,33

B PR22 100K_0402 B

D
1K_0603 G PQ4

C
PQ5 N-2N7002_SOT23
B

S
MMBT3904

E
whether can connect with run power
+3VSUS

PC19
1u_0805

+VDDA
PD2
1 IN BP 4 C A

VDDA_EN 3 PC20 S-RB751V-40


33 VDDA_EN SHDN
5 2 0.01u_0402 VDDA_PG
OUT GND VDDA_PG 33
+VDDA
PC21 PR19 1K_0603
VDDA 2.5V 1u_0805 PU2 PR21
A RT9167/A 100K_0603 PC23 A

2.2u_0805

MICRO-STAR INT'L CO.,LTD.


Title

M_1.2V VDDA 2.5V VLDT


Size Document Number Rev
B 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 35 of 44
3 2 1
5 4 3 2 1

CI24 CI25 CI26 CI27 CI28


0.1u_0603 0.1u_0603 0.1u_0603 0.1u_0603 0.1u_0603
+5VRUN SRC_VCORE

CPU_VDDIO_SUS CPU_VDD_RUN=387.5mV TO 1.55V @ 29A MAX, 37W MAX


PR23
10R_0603

VCC
PC29
PR28 10K_0402 CPU_VID0 PC30 EMI
PR29 10K_0402 CPU_VID1 2.2u_0603 2.2u_0603
PR30 10K_0402 CPU_VID2 PR24 PR25 PR26
D PR32 10K_0402 CPU_VID3 100K_0402 100K_0402 100K_0402 VCORE_GND PQ6 D

19

25
PR33 10K_0402 CPU_VID4 N-NTMFS4708NT1G_SO8-LF PC32 PC33 PC34 PC35 PC36 PC37 PC38 PC39 PC40 PWR_SRC
PR34 10K_0402 CPU_VID5 2200p_0402 2200p_0402 0.1u_0603 0.1u_0603 10u_1210 10u_1210 10u_1210 10u_1210 10u_1210 PL3

VCC

VDD
7 PR27 200K0402 SRC_VCORE
TON

5
17 PHASEGD PC31 1 80L6_30_0805
Harry 02/08 PR180 0.22u_0603
7,33 VDD_PG 1 PWRGD BST1 30 1 2 2
0_0603 3
7 CPU_PROCHOT# 4 VRHOT# DH1 29 4

28 PL4 PC188 CPU_VDD_RUN


LX1 PQ7 PQ8 0.56UH/25A 330u_2SP
26 N-NTMFS4119NT1G_SO8-LF N-NTMFS4119NT1G_SO8-LF 2 1
CPU_VID0 DL1 PC41 PC42 PC43 PC44 PC45 PC46

2.2R_0603 (DNI)
7 CPU_VID0 31 D0

1
CPU_VID1 32 27 PR177 330u_2SP 330u_2SP 330u_2SP 330u_2SP 330u_2SP 1u_0603
7 CPU_VID1 D1 PGND1

5
CPU_VID2 33 PR31 + + + + + +
7 CPU_VID2 D2
CPU_VID3 34 18 VCORE_GND 1 1 2K_0402
7 CPU_VID3 D3 GND
CPU_VID4 35 2 2
7 CPU_VID4 D4
CPU_VID5

2
7 CPU_VID5 36 D5 CSP1 16 3 3
4 4 Power PR35 PR182
37 15 02/06 1.54K_0402 1K_0402 1%
TWO-PH CSN1 PC184
PR36 0R_0402 38 PC47 0.33u_0603
33 VDD_EN SHDN# 1n_0402(DNI)
SKIP# 39 SKIP# PU4
CCI 9
Power 02/06 PR39 100K0402 1% 2 PC48 PR38 1.87K0402 1%
OFS MAX8774GTL+ 470p_0402

5
PR40
10K_0402 1% 1
C Power 02/06 PC50 2 PQ9 C
PR181 0.22u_0603 N-NTMFS4708NT1G_SO8-LF
BST2 20 1 2 3
PC51 8 4
CCV 0_0603
470p_0402 21 PL5
DH2 PQ10 PQ11 0.56UH/25A
PC52 REF 10 22 N-NTMFS4119NT1G_SO8-LF N-NTMFS4119NT1G_SO8-LF 2 1
0.1u_0402 REF LX2

2.2R_0603 (DNI)
24 PR172
DL2

5
VCORE_GND PR41 71.5k_0402 6 PR42
TIME
1 1 2K_0402
PR43 100K_0402 23 2 2
VCC PR44 13K_0402 PGND2 PR46
3 3
5 4 4 Power 10_0402
THRM
CSP2 13 02/06
PR47 10K_0402 PC180 PR45 PR183
3 14 1.54K_0402 1K_0402 1%
POUT CSN2 1n_0402(DNI)
PC54 PC53 0.33u_0603
0.1u_0603
11 PR48 1.87K0402 1% PR49 100_0402
FB CPU_VDD_RUN_FB_H 7
VCORE_GND 12 PR50 100_0402
GNDS CPU_VDD_RUN_FB_L 7
41 PC55 PC56 PR51
GNDA 4700p_0402 4700p_0402 10_0402
1207 Justin +5VRUN +5VRUN 40
IC

R439 R440
B PN N/A Cfg001 VCORE_GND B
100K_0603 100K_0603 ==>x

Q32 PR37 0R_0402 SKIP#


D

Q33 G
D

J15 J2
S

G N-2N7002_SOT23
7 CPU_PSI#
S

BSS138N_SOT23
VCORE_GND

A A

MICRO-STAR INT'L CO.,LTD.


Title

VCORE
Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 36 of 44
5 4 3 2 1
5 4 3 2 1

PWR_SRC
+5VALW

PR52
PL6 4.7R0603
80L6_30_0805 PD3 PC57

3
Place these CAPs RB717F_SOT323 PC58
VIN 2.2u_0805 1u_0603
close to FETs PWR_SRC_SYS
PWR_SRC_SYS PC65 Add by Sampson
PC59 0.1u_0603
1u_0805

1
D D

2
PC61 PC62 PC63 PC66 + PC189 + PC190 + PC191
PC64 PC60 10u_1210
10u_1210(DNI) 10u_1210 0.1u_0603 2200p_0402 2200p_0402 C15U25V C15U25V C15U25V

2
VREF2

8
7
6
5
4
3
2
1
PU5
TPS51120RHBR

GND
VO2
COMP2
VFB2

VREF2
VFB1
COMP1
VO1
PQ12 SKIPSEL PQ13
Current limit at 4.5A for +5VSUS
Current limit at 4A for +3.3V 8 1
9
10
EN5 SKIPSEL 32
31 TONSEL 1 8
PC67 PR53 EN3 TONSEL PR54 PC68
11 PGOOD2 PGOOD1 30
0.1u_0603 4.7R0603 12 29 4.7R0603 0.1u_0603
EN2 EN1 +5VSUS
7 2 13 VBST2 VBST1 28 2 7
PL7 14 27 PL8
CH-10U4.4A_S LL2 DRVH2 DRVH1 LL1 CH-10U4.4A_S
15 LL2 LL1 26
+3VSUS 6 3 16 DRVL2 DRVL1 25 3 6

1
PGND2

PGND1
VREG3

VREG5
V5FILT
1

5 4 33 4 5 PC71 PC72 + PC69

CS2

CS1
GNDA

VIN
PC70 + PC73
0.1u_0402 1u_0603 C220U6.3POS-1
C C220U6.3POS-1 0.1u_0402 N-SP8K10S_SO8 N-SP8K10S_SO8 C

2
17
18
19
20
21
22
23
24
2

PR175
0R_0402 PR176
0R_0402
PR57 PR58

8
7
6
5
14.3K0402 14.3K0402
PQ14
PR59 PR60 N-PFE3000_SO8 4RUND
2.2R_0603 (DNI) PC74 2.2R_0603 (DNI)
+3VALW
PR192 1u_0603
5
6
7
8

PC75 4.7_0402
PQ15 1n_0402(DNI)

3
2
1
RUND 4 N-PFE3000_SO8 PC76
PC77 1n_0402(DNI)
10u_0805 PC78
+3VSUS +5VRUN
10u_0805 For EMI
1
2
3

For EMI
VIN PR64
100K_0402
+3VRUN
VREF2 +5VALW

PR65
max voltage 5.5 2K_0402
31 SUS_ON 1 2
J17 X

B PC183 PR66 PR67 PR68 B


1n_0402 0R_0402 (DNI) 0R_0402 (DNI) 0R_0402 (DNI) PR69
PR70 PC79 0R_0402 (DNI)
240K_0402 0.1u_0402

SKIPSEL

TONSEL

PR71 PR72
0R_0402 0R_0402 (DNI)
PWR_SRC +5VRUN +3VRUN PWR_SRC

PWR_SRC +1.8VSUS +3VSUS PWR_SRC

PR73
PR74 PR75 PR76 100K_0603
PR77 100K_0603 301R_0805 120R_0805
PR78 PR79 PR80 100K_0603
100K_0603 120R_0805 120R_0805 (DNI) RUND
RUND 26,35,39
SUSD
D

D
PR81
G PR82 G G G
D

A 31,33 RUN_ON A
PR83 PQ16 100K_0603 PQ17 PQ18 PQ19 PC80
G PR84 G G G N-RHU002N06 N-RHU002N06 N-RHU002N06 N-RHU002N06 0.1u_0603
31 SUS_ON
S

S
PQ20 100K_0603 PQ21 PQ22 PQ23 PC81 470K_0603 (DNI)
N-RHU002N06 N-RHU002N06 N-RHU002N06 (DNI) N-RHU002N06 0.1u_0603
S

470K_0603 (DNI) HARRY 0121

MICRO-STAR INT'L CO.,LTD.


Title

SYSTEM POWER 3/5V 2.5VSUS


Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 37 of 44
5 4 3 2 1
5 4 3 2 1

+5VSUS

PR85
D 10R_0603 D
VCCA_VDDQ

PC82
PC83
1u_0603
4.7u_0805

PU6
5 VCCA VDDP1 20
CPU_VDDIO_SUS
PC84

A
13 1u_0603
VDDP2 PD4
12 VDDP2 PGND1 18 S-RB751V-40
PC85 PC86 PC87

C
10u_0805 10u_0805 1u_0603 25 PWR_SRC
GND
Current limit at 3.8A for SMDDR_VTERM EN/PSV 1 PR86 0R_0402
VTTEN
17 PGND2 PL9
4 2 PR87 750K_0402 PWR_SRC_VDDQ
VSSA TON
80L6_30_0805
TP85 REF_VDDQ 8 PC88 1n_0402 PC90 PC91 PC92
REF PR88 PC89
BST 24 1 2

5
6
7
8
PR90 10_0402 PC93 1n_0402 0.1u_0603 10u_1210 10u_1210
0_0603
PR89 9
C 10_0402 COMP 0.1u_0603 C
4
PC94 23 DH_VDDQ CPU_VDDIO_SUS
DH PQ24
TP86 0.1u_0603 N-PFE3000_SO8 PL10
CH-1.5U10A PC97

1
2
3
10 VTTS
PC95 PC96 22 LX_VDDQ PQ25 VDDQ 220U2.5SP
LX N-AO4410_SO8
1u_0603 0.1u_0603

5
6
7
8
PR179 PR91 Vout=1.5(1+(R5/R9))

1
21 Power 02/06
10_0402 ILIM 5.9K_0402 4 PR92 + + R5=10K, R9=49.9K
VTERM 15 2.2R_0603 (DNI) PC99 PC98 Vout=1.8V
CPU_VTT_SUS VTT
14 0.1u_0402 220U2.5SP
VTT DL_VDDQ

2
DL 19
PC100 PC101 PC102 +3VSUS PC103

1
2
3
1n_0402(DNI)
0.1u_0402 10u_0805 10u_0805 16
PR93 PGND2
100K_0402 PC104 1u_0603

3 PR94 10_0402
VDDQS Current limit at 6A for +1.8VSUS
7 PR96
33 VTT_VDDIO_PG PGOOD TP87
10K_0402 1%
11 VTTEN FB 6 FB_VDDQ 1 2
PR95
+5VSUS 0R_0402 SC486IMLTRT_MLPQ24
PR97

2
100K_0402 PC105 22p_0402

B +5VSUS PR98 FB=1.5V B


PR99
36.5K_0402
1K_0603
S3 state maybe can disable VTT,try to connect to RUN_ON Control H = 1.9V

1
PQ26
PR100 VTTEN L = 1.8V

D
N-2N7002_SOT23

2
4.7K_0603
D

G PR102 10K_0402
CPU_VDDIO_SUS_ADJ 18
G Q27 PR101

S
13.3K_0402
N-2N7002_SOT23
D

1
G Q28 PC106 PR103
33 VTT_VDDIO_EN
N-2N7002_SOT23 0.1u_0402 100K_0402
S

A A

MICRO-STAR INT'L CO.,LTD.


Title

DDR2 1.8V VTT 0.9V


Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 38 of 44
5 4 3 2 1
5 4 3 2 1

PWR_SRC_VTT

+5VSUS PC109 PC110


PR104 0.1u_0603 2200p_0402
10R_0603
PWR_SRC 813_VDDA
PC111 PC112
PWR_SRC_VTT PD5 PC107

3
PC108 RB717F_SOT323 10u_1210 10u_1210
PL11 1u_0603
80L6_30_0805 PC116 1u_0603
D 2200p_0402 D

PC115
PC113 PC114 0.1u_0603 813_DL1 813_DL2

2
10u_1210 10u_1210

5
1
2
PQ27

13

14

16

15

17

18
3
The Limited Current = 4A 8 1 PU7 PC118 4 +1.2VRUN
PC117 Power 02/06 Current Limit at 15 Amp

813_DH2
VDDP

GNDP
BST1

LDR1

LDR2

BST2
0.1u_0603 0.1u_0603
+1.8VSUS 7 2 PQ46
PC119 PL12 813_DH1 12 19 N-NTMFS4708NT1G_SO8-LF PL16 PC120 PC121
220U2.5SP 2.5U7.5A_S HDR1 HDR2 1UH22A 220U2.5SP 220U2.5SP
+VTT_P 6 3 813_LX1 11 20 813_LX2 +1_2V_P
LX1 LX2

2.2R_0603 (DNI)
1

1
PR173 1.8VSUS_PWRGD 10 21 +1.2RUN_PG PR174
PGD1 OZ813LP_QFN24 PGD2 PC123
+ 5 4 1 + +
PC122 PR105 PR106 PC124 9 22 2 PR108
0.1u_0402 100K_0402 CS1P CS2P PR107 51R_0402 0.1u_0402
3
2.2R_0603 (DNI)N-SP8K10S_SO8 PC125 PC126 100K_0402

2
8 CS1N CS2N 23 4

4700p_0402

4700p_0402
PC127
5
6
7
8

22p_0402
51R_0402

ON/SKIP1

ON/SKIP2
7 VSET1 VSET2 24

22p_0402
PQ30 PQ47 PR110

VDDA
VREF
RUND N-NTMFS4119NT1G_SO8-LF

TSET
26,35,37 RUND 4 N-PFE3000_SO8

VIN
PR109 PC181
1n_0402(DNI) 25 PC182
160K_0402 GNDA Power 02/06 1n_0402(DNI) 43.2KR1%_0402

C PC128 813_CS1P 813_CS2P PC129 3300P_0402 C


1
2
3

813_VREF 3

1
4700p_0402 813_CS1N 813_VDDA 813_CS2N

+1.8VRUN
813_VREF 813_VSET2

PC130
PR111
95.3K0402 1% 1u_0603 PC132 PR116
PWR_SRC_VTT 1n_0402 120K0402 1%

PR113
J18 X PR114 PC131 +5VSUS 2.2K_0402
60.4K0402 1% 1n_0402 PR117
1K_0402 PR184
RS690 =PCI-E CORE 0R_0402
813_VSET2 2 1
26,35,37 RUND
PR118
1K_0402 PR119
20K_0402 PC133
PC134 1n_0402
PR121 0.1u_0603
100K_0402 PR191 +1.2VRUN
PR124 +5VSUS 1M_0603 PQ43
+3VRUN 1.8VSUS_PWRGD 0R_0402 N-PFE3000_SO8 VCC_NB
1.8VSUS_PWRGD 33
1.8_PG
8 3
+1.8VRUN +3VSUS PR185 7 2
B PR123 harry 1025 6 1 B
100K_0402
100K_0402 +5VSUS 5
PR126 PC186
1K_0603
PR125 1.8_PG 10u_0805

4
D1

D2
100K_0402 HARRY 0121
PR128 PU10
D

PR186
1K_0603 G Q29 PC136 100K_0402
C

2N7002DW
PQ32 N-2N7002_SOT23 2.2u_0805
B
S

G1

G2
S1

S2
SMBT3904
E

How to choose the resister PR129 +1.2RUN_PG cost down


check spec 10R_0603 +5VRUN
1_5_VCC
+3VRUN
PC137

4.7u_0805 VCC_NB +3VSUS


6

+1.8VRUN PR187
100K_0402
VCNTL

5 PR189
VIN 1K_0603
9 PC138 PR188
VIN NB_VCC_PG 31,33
100K_0402
7 4.7u_0805 PR190

D
POK
4 1K_0603 G PQ44 PC187
+1_5VRUN

C
1_5_VCC 8 VOUT
A EN PC139 PQ45 N-2N7002_SOT23 2.2u_0805 A
VOUT 3 B

S
PR130 Newcard spec. request 750mA
15.8K_0402 100u_3528 APL5912 supply 5A MAX SMBT3904
peak

E
FB 2
GND

PR131
MICRO-STAR INT'L CO.,LTD.
1 2
PU8 18K0402 1% PC140 Title
1

APL5912
0.01u_0402 VCC_NB 1.2V 1.5VRUN 1.8VSUS
1

Size Document Number Rev


Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 39 of 44
5 4 3 2 1
5 4 3 2 1

+3VALW +5VALW

For EMI, Bottom Side

D PC141 0.1u_0603 (DNI) D

PR132 PR133 PR134


100K_0402 1.8K0402 (DNI) 1.8K0402 (DNI)

PQ33
PC142 2200p_0402 (DNI) P-PFE3001_SO8
PJ1 DC_IN+
1 PFL1 120L6_15_4532 8 PR135
2 1 2 +DC_IN 1 7 31 BATCLK_M 100_0402 CON3
3 2 6
PC143 PC144 3 5

2200p_0402 (DNI)

0.1u_0603 (DNI)
PWR-JACK3P_black-5.2mm PR136
DCJACK_5 PC145 PC148 31 BATDATA_M 100_0402 6
PR137 PC146 5
0.47u_0805 240K_0402 0.01u_0603 10u_1210 4

4
31 M_BATIN# 3
PR138 2
+VBATA

C
PC150 PC151 1
E PC149 PD6 PD7 0.01u_0402 0.01u_0402
PQ34 47K0402 0.1u_0402 PC152 PWR-1X8_black-NB
B N93-06M0131-A10
C P-DTA114EKA_SOT23 Z-UDZS5.6B_SOD323
0.1u_0603

A
Z-UDZS5.6B_SOD323
6: B-
5: SMCLK
D

31 AC_CTL G PQ35 4: SMDATA


N-2N7002_SOT23 3: BT Thermal
C
S

C
PR139
2: VBATA
100K_0402 1: VBATA

PQ39A
+3VALW P-AO4805_SO8

SDC_IN+ 7 1
PR140 8
100K_0402
PR141
10K_0402 (DNI)

2
AC_OK
PR142 10K_0402 PR143 100K_0402

D2

D1

D
PQ37 G PQ38
N-RHU002N06 (DNI)
N-2N7002DW_SOT363

S
G2

G1
S2

S1

PWR_SRC
18,31,41 AC_OK#

B B

PQ36B PQ36A
P-AO4805_SO8 P-AO4805_SO8
PD8
V_CHG 5 3 1 7 A C
6 8
ES3BB_DO214AA

PC153 +VBATA
4

0.1u_0603

PR144 10K_0402 PR145 100K_0402 5 3 PWR_SRC


6
PQ39B
CHG_BATT_N P-AO4805_SO8

4
D

PR146
G Q31 PR147
31,41 ENCHG
470K0402
2.2K_0402 N-2N7002_SOT23
S

A A

MICRO-STAR INT'L CO.,LTD.


Title

Battery Select
Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 40 of 44
5 4 3 2 1
<
5 4 3 2 1

Adapter= 65 W
SDC_IN+
Adapter input voltage set 17.4 Voltage
PR148
DC_IN+ 0.02R1%

PC154 PC155 PC156 PR149 PR150


D D
MAX1772_ACIN

2200p_0402

10u_1210
0.1u_0603
53.6_0603 1% 7.15K_0402 1%

A
PD9
S-RB751V-40
For PR151 PR152
EMI 4.7_0402 4.7_0402 MAX1772_LDO

C
PC157 PC158 1u_0603
1u_0805 PC159 PC160
0.47u_0805 0.47u_0805
SDC_IN+
MAX1772_REF PC164
10u_1210 PL14
33_0402
PR153 PC161 80L6_30_0805

27

26
PC165
0.1u_0603 PC162 PC163 10u_1210

CSSP

CSSN
4S1P: Charge current set 1.5 Amp 16 2200p_0402 0.1u_0603
PR154 PR155 PR156 CELLS PD10
1 DCIN LDO 2
4S2P: Charge current set 3.0 Amp 34K_0402 1% 47.5K_0402 1% 24.3K_0402 1%
BST 25 C A
Pre-charger: Charge current set 22 S-RB751V-40
DLOV PQ40
200mA PQ41
PR157 MAX1772_REFIN 13 REFIN
1.54K_0402 MAX1772_VCTL 15 1 8
MAX1772_ICTL VCTL PC166
31 PRE_CHG G2 D2 14 ICTL
S2
G1 D1 0.1u_0603 2 7
31 ENCHG_1P V_CHG
S1 PR159 PR160 24 PL15
PR158 PR161 100K_0402 DHI 15UH_104R

2.2R_0603 (DNI)
20.5K0402 1% +5VALW 49.9K_0402 15K_0402 1% 23 3 6
2N7002DW MAX1772_ACIN LX
C 11 ACIN
C
21 PR178 PR162 PC168 PC169 PC170 PC171
DLO 0.05R1% 10u_1210 10u_1210 10u_1210 10u_1210(DNI)
4 5
PR163 20 PC167
AC_OK# PGND 0.1u_0603
10K_0402 12 ACOK N-SP8K10S_SO8
MAX1772_ICHG 10 ICHG
19 CSIP PR164 1_0603 1% PC185
18,31,40 AC_OK# MAX1772_IINP CSIP CSIN PR165 1_0603 1%
28 IINP CSIN 18
1n_0402(DNI)
BATT 17
MAX1772_CCV 7 CCV
GND 8
MAX1772_CCI 6 9

REF

CLS
PC172 PR166 PC173 PR167 CCI GND
5 CCS
0.1u_0603 12K_0402 0.1u_0603 12K_0402 PC174 PC175
MAX1772EEI 0.1u_0603 0.1u_0603
PU9

3
MAX1772_REF
PR168
10K_0402 PC176
0.01u_0603

PC177
0.01u_0603
PC178
PC179 1u_0603
1n_0402

PR169 JT1 X
28.7K_0402 1%

B B

PR170 SET Iin MAX = 3.3A EMI


20K_0402 Solution RI1
RI2
0R_0402
0R_0402
RI3 0R_0402

+5VALW

PR171
10K_0402

ENCHG-1P ENCHG-2P PRE_CHG ENCHG


MAX1772_ICTL
D1

D2

X X 1 1 Pre-charge
PQ42

2N7002DW
1 0 0 1 4S1P-Fast charge

0 1 0 1 4S2P-Fast charge
G1

G2
S1

S2

31,40 ENCHG

X X X 0 STOP CHARGE

A A

MICRO-STAR INT'L CO.,LTD.


Title

M_Battery Charger
Size Document Number Rev
C 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 41 of 44
5 4 3 2 1
5 4 3 2 1

ME_PAD

ME_PAD
X_ME_PAD

X_ME_PAD

X_ME_PAD

X_ME_PAD

X_ME_PAD

X_ME_PAD

X_ME_PAD
P2 P3 P4 P5 P6 P7 P8 P9 P10
MH1 MH2 MH3 E23-1013030-A89
ML10 ML17 ML4 ML5 X_7.5X7.5 X_7.5X7.5 X_7.5X7.5

(PTH) (PTH) (PTH)

1
BATTERY MYLAR BATTERY MYLAR DDRMYLAR SB MYLAR

ME_PAD

ME_PAD

ME_PAD

ME_PAD
D D

X_ME_PAD

X_ME_PAD

X_ME_PAD

X_ME_PAD

X_ME_PAD
E26-1013220-G40 E26-1013220-G40 E26-1003120-G40 E26-1013220-G40

1
P11 P12 P13 P14 P15 P30 P17 P19 P20
P26
ML11 MH4 MH5 MH6
X_7.5X7.5 X_7.5X7.5 X_7.5X7.5 1
E23-1002010-A89
ME_PAD
(PTH) (PTH) (PTH) pad_146X189

1
1 9
2 8
BATTERY MYLAR
E26-1013220-G40 ML9

3
4
5
6
7

X_ME_PAD
ML12 SHD1 P21 P25 P27 P28
P22 P23 P24 P18
MH7 MH8 MH9 X_ME_PAD X_ME_PAD X_ME_PAD 1 1 1 1
X_7.5X7.5 X_7.5X7.5 X_7.5X7.5
E23-5510010-A89 E23-1006070-A89 ME_PAD X_ME_PAD X_ME_PAD
CONDUCTIVE GASKET FOR RJ11 ME_PAD ate_c006_106 ate_c006_106 ate_c006_106
E2Y-X006311-CA7 (PTH) (PTH) (PTH) ate_c006_106

1
SD MYLAR VGA SHIELDING
E26-1006100-G40 ML18 E2M-2110211-Y28

ML13 MH10 MH11 MH12 MH13

1
X_10X5 FOR CPU X_10X5 FOR CPU X_10X5 FOR CPU X_10X5 FOR CPU

MH14 MH16 MH15 P29


POWER MYLAR X_7.5X7.5 X_7.5X7.5 X_7.5X7.5 ME_PAD

PTH

PTH

PTH

PTH
E26-1013010-G40
KEYBOARD MYLAR
C E26-1006090-P38 C
(PTH) (PTH) (PTH)
ML19

1
SC1 SC2

1
ML15

For MDC

1
MH17
PROGRAM MYLAR M2X4 M2X4 X_7.5X7.5
for CPU
E26-1035120-G40 E43-1205003-H29 E43-1205003-H29
BLUETOOTH MYLAR
E2P-2141511-G40 ML20 (PTH)
固定 new card PCB x 13
ML16

1
SB MYLAR HOLES_R177D91 HOLES_R177D91
E2P-2141411-G40 MH18
HDD MYLAR MDC1
E26-1057010-G40 ML21
MH20 PTH 1
E2B-1022010-A89
HT1 HT2
X_4X2

1
QCOM ( MA560-3 ) New Card
MYLAR CHIP S52-2801110-Q09 MH19
E26-1057020-G40 QCOM ( MA560-3 )
B E2Y-Z000711-G40
for MDC B
WIRE1 PTH 1

MDCWIRE X_4X2
K10-3002075-H58

BAT1 FM1 FM2 FM3 FM4

SC3 SC4 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100

PCB1
FM5 FM6 FM7 FM8

X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100

FM9 FM10 FM11 FM12


VGASC VGASC
E42-5040501-H29 E42-5040501-H29 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100 X_F_PAD_M100
RTC_BAT PCB
D06-0100300-H04 P30-1058120-D05
FM13 FM14 FM15 FM16

X_F_PAD_M100 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120

SC5 FM17
FM18 FM19 FM20 FM21
A X_PANEL_PAD A
X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120

FM22 FM23 FM24 FM25 FM26


M2X4
E43-1203003-H29 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_PANEL_PAD MICRO-STAR INT'L CO.,LTD.
Title
固定 MDC FM27 FM28 FM29 FM30 FM31
ME Parts
X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 X_F_PAD_M120 Size Document Number Rev
Custom 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 42 of 44
5 4 3 2 1
5 4 3 2 1

J19 J20 J21 J22


L1_4mil_60 L3_4mil_60 L6_4mil_60 L8_4mil_60
1107
P07 C208 C209 C210 C211 DNI
X_PIN1*2 X_PIN1*2 X_PIN1*2 X_PIN1*2 Normal Signal 60 Ohm P13 R107 C104 DNI
1109
P07 remove PU6 PL8 C532 PC66 (2.5VSUS POWER PLANE)
P40 PR123 PR124 DNI (which pull hight to 5valw)
D P33 remove R451(RSMRST signal) D
P12 remove R59 R60 R61 R62 C117 C118 C119 C120 (For A-link lane)
P13 remove DVO direfferential net name (GPP_R_TX4P etc..)
1110
J23 J24 J25 J26 P39 remove PR118 NBVCCPG Pull up resistor
L1_6mil_50 Ohm L3_5mil_50 Ohm L6_5mil_50 Ohm L8_6mil_50 Ohm P07 modify LM86's power and increase pull up resistor
P24 replace U16 U17
RGB Signal 50 Ohm
1111
X_PIN1*2 X_PIN1*2 X_PIN1*2 X_PIN1*2 P37 PR52 replace resistor form 240k to 34k
P26 remove C429 C416 R363 let R362 DNI and add two DNI capacitor
P27 remove L23 L24 C450 C451 CON2
P12 remove R59 R60 R61 R62 C117 C118 C119 C120
P16 Replace R107 & R108 form 47R to 47.5R
P18 Replace R200 form 0805 to 0402
P37 Remove PC64 and let PR51 DNI
1115
P24 remove DVI interface
J27 J28 J29 J30 P15 increase VGA interface
L1_DIFF_5/7/5_100 Ohm+ L3_DIFF_4.5/7.5/4.5_100 Ohm+ L6_DIFF_4.5/7.5/4.5_100 Ohm+ L8_DIFF_5/7/5_100 Ohm+ P22 replace J3 connector

C Differential Pair 100 Ohm C

X_PIN1*2 X_PIN1*2 X_PIN1*2 X_PIN1*2

J43 J44 J45 J46


L1_DIFF_5/7/5_100 Ohm- L3_DIFF_4.5/7.5/4.5_100 Ohm- L6_DIFF_4.5/7.5/4.5_100 Ohm- L8_DIFF_5/7/5_100 Ohm-

X_PIN1*2 X_PIN1*2 X_PIN1*2 X_PIN1*2

J31 J32 J33 J34


L1_DIFF_5.5/7/5.5_93 Ohm+ L3_DIFF_5/7.5/5_93 Ohm+ L6_DIFF_5/7.5/5_93 Ohm+ L8_DIFF_5.5/7/5.5_93 Ohm+

Differential Pair 93 Ohm


X_PIN1*2 X_PIN1*2 X_PIN1*2 X_PIN1*2

J47 J48 J49 J50


L1_DIFF_5.5/7/5.5_93 Ohm- L3_DIFF_5/7.5/5_93 Ohm- L6_DIFF_5/7.5/5_93 Ohm- L8_DIFF_5.5/7/5.5_93 Ohm-

B B
X_PIN1*2 X_PIN1*2 X_PIN1*2 X_PIN1*2

J35 J36 J37 J38


L1_DIFF_6/8/6_90 Ohm+ L3_DIFF_6/8/6_90 Ohm+ L6_DIFF_6/8/6_90 Ohm+ L8_DIFF_6/8/6_90 Ohm+

Differential Pair 90 Ohm


X_PIN1*2 X_PIN1*2 X_PIN1*2 X_PIN1*2
J51 J52 J53 J54
L1_DIFF_6/8/6_90 Ohm- L3_DIFF_6/8/6_90 Ohm- L6_DIFF_6/8/6_90 Ohm- L8_DIFF_6/8/6_90 Ohm-

X_PIN1*2 X_PIN1*2 X_PIN1*2 X_PIN1*2

J39 J40 J41 J42


L1_DIFF_9/7/9_72 Ohm+ L3_DIFF_9/8/9_72 Ohm+ L6_DIFF_9/8/9_72 Ohm+ L8_DIFF_9/7/9_72 Ohm+

Differential Pair 72 Ohm


A X_PIN1*2 X_PIN1*2 X_PIN1*2 X_PIN1*2 A

J55 J56 J57 J58


L1_DIFF_9/7/9_72 Ohm- L3_DIFF_9/8/9_72 Ohm- L6_DIFF_9/8/9_72 Ohm- L8_DIFF_9/7/9_72 Ohm- MICRO-STAR INT'L CO.,LTD.
Title

IMPEDANCE
X_PIN1*2 X_PIN1*2 X_PIN1*2 X_PIN1*2 Size Document Number Rev
B 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 43 of 44
5 4 3 2 1
5 4 3 2 1

CPU_VDDIO_SUS
CPU_VDDIO_SUS CPU_VTT_SUS

CI637 CI638 CI639 CI640 CI641 CI642 CI643 CI644 CI645 CI646 CI647 CI648
0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402 CI649 CI650 CI651 CI652 CI653 CI654 CI655 CI656 CI657 CI658 CI659 CI660 CI661 CI662 CI663 CI664 CI665 CI666 CI667 CI668 CI669 CI670 CI671
0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402 0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402
D X7R X7R D
CPU_VDDIO_SUS X7R X7R X7R
CPU_VDDIO_SUS CPU_VTT_SUS

CI672 CI673 CI674 CI675 CI676 CI677 CI678 CI679 CI680 CI681 CI682 CI683
0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402 CI684 CI685 CI686 CI687 CI688 CI689 CI690 CI691 CI692 CI693 CI694 CI695 CI696 CI697 CI698 CI699 CI700 CI701 CI702 CI703 CI704 CI705 CI706
0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402 0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402
X7R X7R
CPU_VDDIO_SUS X7R X7R X7R
CPU_VDDIO_SUS CPU_VTT_SUS

CI707 CI708 CI709 CI710 CI711 CI712 CI713 CI714 CI715 CI716 CI717 CI718
0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402 CI719 CI720 CI721 CI722 CI723 CI724 CI725 CI726 CI727 CI728 CI729 CI730 CI731 CI732 CI733 CI734 CI735 CI736 CI737 CI738 CI739 CI740 CI741
0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402 0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402
X7R X7R
X7R X7R X7R
PWR_SRC
CPU_VDDIO_SUS CPU_VDDIO_SUS
C C

CI742 CI743 CI744 CI745 CI746 CI747 CI748 CI749 CI750 CI751 CI752 CI753
0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402 CI754 CI755 CI756 CI757 CI758 CI759 CI760 CI761 CI762 CI763 CI764 CI765 +3VSUS
0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402
X7R X7R
X7R X7R

CI803 CI804 CI805 CI806 CI807


0.1u_04020.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI)
CPU_VDDIO_SUS

+3VRUN

CI766 CI767 CI768 CI769 CI770 CI771 CI772 CI773 CI774 CI775 CI776 CI777
0.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_04020.1u_0402
CI793 CI794 CI795 CI796 CI797 CI798 CI799 CI800 CI801 CI802
X7R X7R 0.1u_04020.1u_0402
(DNI) 0.1u_04020.1u_04020.1u_0402
(DNI) 0.1u_04020.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402 (DNI) +5VSUS

X7R
CPU_VDD_RUN

B CI831 CI832 CI833 CI834 CI835 B


near X,Y near X,Y 0.1u_04020.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI) (DNI)
(6130,7073) (5442,2421) near X,Y ( 6838,2337)
+5VRUN PWR_SRC
PWR_SRC
near X,Y +5VRUN
near X,Y (6340,2105) (5990,2219)
CI825
CI826 CI827 CI823 CI824 near X,Y (6025,1505) on BOTTOM
0.1u_0402 (DNI) 0.1u_0402 (DNI) 0.1u_0603 (DNI) plane
0.1u_0603 (DNI) 0.1u_0603 (DNI) CI808 CI809 CI810 CI811 CI812 CI813 CI814 CI815 CI816 CI817 CI818 CI819 CI820 CI821 CI822 CI828
0.1u_04020.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_04020.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI) 0.1u_0402
(DNI) (DNI)

CPU_VDDIO_SUS CPU_VDDIO_SUS X7R


+5VRUN

near X,Y (6642,1865)


PWR_SRC near CN12
near CN7 +5VRUN+5VSUS+5VALW
N29290158 31
near X,Y (7747,1843)

CI829 CI830
A AGND A
0.1u_0603 (DNI) 0.1u_0603 (DNI) CI842 CI843 CI844 CI845 CI846 CI847 CI848 CI849 CI850
0.1u_0402
0.1u_0402
(DNI)
0.1u_0402
(DNI)
0.1u_0402
(DNI)
0.1u_0402
(DNI) (DNI) 10pf_0402
MICRO-STAR INT'L CO.,LTD.
+3VRUN 0.1u_0402 (DNI) Title

EMI
0.1u_0402 (DNI) 0.1u_0402 (DNI) Size Document Number Rev
B 2.0
MS-10581
Date: Friday, May 26, 2006 Sheet 44 of 44
5 4 3 2 1

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