Decodificadores con habilitador

Wakerly - Digital Design (3ED pag 315 - 321)

Binary Decoders

The most common decoder circuit is an n-to-2n decoder or binary decoder. Such a decoder has an n-bit binary input
code and a 1-out-of-2n output code. A binary decoder is used when you need to activate exactly one of 2n outputs based on
an n-bit input value.
For example, Figure 5-32(a) shows the inputs and outputs and Table 5-4 is the truth table of a 2-to-4 decoder. The
input code word 1,I0 represents an integer in the range 0–3. The output code word Y3, Y2, Y1, Y0 has Yi equal to 1 if and
only if the input code word is the binary representation of i and the enable input EN is 1. If EN is 0, then all of the outputs
are 0. A gate-level circuit for the 2-to-4decoder is shown in Figure 5-32(b). Each AND gate decodes one combination of
the input code word I1,I0.
The binary decoder’s truth table introduces a “don’t-care” notation for input combinations. If one or more input
values do not affect the output values for some combination of the remaining inputs, they are marked with an “x” for that
input combination. This convention can greatly reduce the number of rows in the truth table, as well as make the functions
of the inputs more clear.

Logic Symbols

The most basic rule is that logic symbols are drawn with inputs on the left and outputs on the right. The top and
bottom edges of a logic symbol are not normally used for signal connections. However, explicit power and ground
connections are sometimes shown at the top and bottom, especially if these connections are made on “nonstandard” pins.
The 74x139 Dual 2-to-4 Decoder is a two independent and identical 2-to-4 decoders. The gate-level circuit diagram
for this IC is shown in Figure 5-35(a). Notice that the outputs and the enable input of the ’139 are active-low. Most decoders
were originally designed with active-low outputs, since TTL inverting gates are generally faster than noninverting ones.
 A logic symbol for the 74x139 is shown in Figure 5-35(b). Notice that all of the signal names inside the symbol
outline are active-high (no “_L”), and that inversion bubbles indicate active-low inputs and outputs. Often a schematic may
use a generic symbol for just one decoder, one-half of a ’139, as shown in (c). In this case, the assignment of the generic
function to one half or the other of a particular ’139 package can be deferred until the schematic is completed.
Table 5-6 is the truth table for a 74x139-type decoder. The truth tables in some manufacturers’ data books use L
and H to denote the input and output signal voltage levels,

Some logic designers draw the symbol for 74x139s and other logic functions without inversion bubbles. Instead,
they use an overbar on signal names inside the symbol outline to indicate negation, as shown in Figure 5-36(a). This notation
is self-consistent, but it is inconsistent with our drawing standards for bubble-to-bubble logic design. The symbol shown in
(b) is absolutely incorrect: according to this symbol, a logic 1, not 0, must be applied to the enable pin to enable the decoder.
 The 74x138 3-to-8 Decoder

The 74x138 is a commercially available 3-to-8 decoder whose gate-level circuit diagram and symbol are shown in
Figure 5-37; its truth table is given in Table 5-7. Like the 74x139, the 74x138 has active-low outputs, and it has three enable
inputs (G1, /G2A, /G2B), all of which must be asserted for the selected output to be asserted.