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Simone Orcioni
Università Politecnica delle 15th May, 2018
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How do I design an amplifier using gm/id
methodology?
Question 8 answers
Asked 26th Oct, 2015
Saumil Vora
I want to design an Op-Amp using CMOS technology.
For that I have been designing a differential amplifier as
an input stage. I am stuck at transistor sizing. Recently I
came across gm/id methodology for transistor sizing. I
would like to know how this method can be used to
decide the aspect ratio of transistor. Please share some
material, if possible.
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How do you create a new part in PSpice using
specific Macro-model code?
Question 6 answers
Asked 5th Mar, 2015
Manolis Magdalis
How can we create a new part in PSpice? I have
macromodel code for a specific part in PSpice. How can
I use it to create the part?
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How can I decide the W/L ratio of MOSFET?
Question 17 answers
Asked 24th Apr, 2015
Saumil Vora
In analog IC design we choose length of MOSFET as
per technology file, but what for width? Means how I can
decide the width of MOSFET for particular application?
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Please tell me, Why the cutoff frequency is taken for
3dB and not other values like 1 or 2 db?
Question 57 answers
Asked 7th Feb, 2012
Cyril Robinson Azariah John Chelliah
Please tell me, Why the cutoff frequency is taken for
3dB and not other values like 1 or 2 db?
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How to find the charge-voltage characteritic of a
capacitor in circuit simulator?
Question 4 answers
Asked 28th May, 2018
Raghuram TR
Dear all,
Thanks in advance.
Regards,
Raghu
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Why an NMOS transistor is more vulnerable than
PMOS transistor to radiation?
Question 5 answers
Asked 28th Jul, 2017
T S Nidhin
especially the threshold voltage shift due to radiation
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Which software tool is best to design a circuit
diagram for journal papers?
Question 17 answers
Asked 10th Jan, 2017
Jagabar S. Mohamed Ali
Most of the reviewer comments are poor picture quality?
how to improve this and please suggest the software
tool.
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How can I perform periodic noise simulation of
symmetric input and output amplifier in CADENCE
Virtuoso?
Question 2 answers
Asked 24th Aug, 2016
Michał Wołodźko
I am trying to obtain total input and output noise in Volts
from 0.1 mHz to 10 kHz of the symmetric amplifier (see
attached image). What simulation should I use and what
settings should I use?
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ated Publications
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Towards real application: A development in
Cadence design environment for evolutionary
analog integrated circuit design
Conference Paper
Oct 2013
Mei Xue · Jingsong He
In this paper, we combine evolutionary algorithm with
Cadence design environment to do research on analog
integrated circuit automated design. This combined
approach can make full use of the advantage of
Cadence design environment on circuit simulation and
evolutionary algorithm on automated design. With the
strong analytical and computational capa...
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A Methodology to Measure the Verification Gap in
Analog and Mixed-Signal Designs
Article
Jan 2007
Jonathan B. David
ABSTRACT Ahigh,fraction of design ,bugs identified in
Mixed-Signal SOC's are attributed to the Analog and
Mixed signal sections. Traditional approaches to
verifying these circuits depend on circuit simulation and
waveform review, with the hope that enough corner
cases can be run prior to tapeout to catch all the
problems. This paper introduces a ne...
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