Running head: MEMORY MANAGEMENT 1

Memory Management

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Memory Management-Problems

A computer system has a 64KB main memory and 1 KB space for the cache memory,

and transfer between cache and main memory is 16 * 8 Blocks, uses 2 space blocks in each set,

and uses LRU when deciding to change blocks, uses Read Through for read, Write allocate for

write and simple write back for write back.

a) In access to main memory address which sub-spaces are divided and how much

bits of the spaces?

Solution

In this case, 64KB main memory.

•64KB -> 16Kwords, which is the same as 214 blocks

•Each block has 32 bits plus a tag (32-14-2=16 bits

Therefore, 6864 bits of the spaces

b) In this system main memory, each element has 8bit has 2 arrays, the start of these

address is arr1 = $0000, arr2 = $0200, and a mips program will read and compare these two

arrays and writes the big one into array starts with address arr3 = $0410, initially assume that the

cache memory is empty in which set and which blocks will the arrays will be placed, while the

program is run which moment the transfer between cache and main memory will be occurred.?

Solution

Main memory=64KB

2 arrays each array has 20 elements

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In this regard therefore, total number of elements will be = 20*2=40 elements

Each element=8 bit

total number of bits= 8*40=320 bits

Cache memory=empty

Demonstration

Diagram below demonstrate the creation of arrays,

Below Diagrams b and c showing the transfer between cache and main memory
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Answer: in this regard, arrays will be placed in the set 1 and in block 1 and block 65

b) When this program ends, calculate the hit ratio, when you know the cache access

time is 10ns and between main memory and cache memory blocks transfer time

is 100ns according to above data, calculate the average memory access time?

Solution

Hit ratio = percentage of memory accesses satisfied by the cache .

Average memory access time =Hit time + Miss rate x Miss penalty

Hit time = 10 ns

Miss rate = 10%

Miss penalty = 100 ns.

The average memory access time = 15 n

AMAT = 1 + 0.1 × 20 = 2ns

d) To reduce the average memory access time in which main memory address we

should place the arrays?

To reduce the average access time, the array has to be placed in the main memory that

has a cache mechanism in the processor which is checked to see if a copy of a particular memory

location is available in the cache before initiating the actual memory access. If the cache holds a

copy of the memory location, the slow access to main memory can be skipped. In this case

therefore, the array should be placed in Level 2 or Cache memory which has the fastest memory

which has faster access time.

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e) In which main memory addresses, we should place the arrays to make the worst

average memory access time?

To make the worst average memory access time, we should place the arrays in the Level

4 or Secondary Memory address, this is an external memory which is not as fast as main

memory.