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From
Nand to Tetris
Building a Modern Computer from First Principles
Chapter 5
Computer Architecture
These slides support chapter 5 of the book
The Elements of Computing Systems
By Noam Nisan and Shimon Schocken
MIT Press
Nand to Tetris / www.nand2tetris.org / Chapter 5 / Copyright © Noam Nisan and Shimon Schocken Slide 1
Computer Architecture: lecture plan
• Von Neumann Architecture
• Fetch-Execute Cycle
• The Hack CPU
• The Hack Computer
• Project 5 Overview
Universality
Same hardware can run many different software programs
Theory Practice
Alan Turing: John Von Nuemann:

Universal Turing Machine Stored Program Computer
Computer architecture
Memory CPU
program
Registers
intput ALU output

data
Memory CPU
program
Registers
ALU

data
control bus
address bus
data bus
Memory CPU
program
Registers
ALU

data
data bus
Memory CPU
program
Registers
ALU
ALU

data
control bus
data bus
Memory CPU
program
Registers
ALU

data
data bus
Memory CPU
program
Registers
ALU

data
address bus
data bus
Memory CPU
program
Registers
ALU

data
address bus
data bus
Memory CPU
Registers
ALU

data
address bus
data bus
Memory CPU
program
Registers
ALU

control bus
address bus
data bus
Memory CPU
program
Registers
ALU

data
control bus
address bus
data bus
• The Hack CPU
Basic CPU loop
Repeat:
• Fetch an instruction from the program memory
• Execute the instruction.
Fetching
• Put the location of the next instruction in the Memory address input
• Get the instruction code by reading the contents at that Memory location
Memory
program
Memory
output
instruction
data
Memory
address • Default: PC++
input • Jump: PC = address
Program
Counter
Executing
• The instruction code specifies “what to do”
q Which arithmetic or logical instruction to execute
q Which memory address to access (for read / write)
q If / where to jump
q …
different subsets of the
instruction bits control different
aspects of the operation
• Executing the instruction involves:

q accessing registers
q and / or:
q accessing the data memory.
Memory CPU
program
Registers
ALU

data
control bus
address bus
data bus
Fetch – Execute
Memory
program data
ALU
instruction
data
instruction data
address address
control bus
address bus
address bus (data flows not shown, to minimize clutter)

Fetch – Execute clash
Memory
program data
ALU
instruction
data
If the Memory is one address space:

instruction data This scheme will not work:
address address
• one Memory input
• one Memory output
control bus
address bus
address bus
Fetch – Execute clash
Memory
program
Memory
output
data
If the Memory is one address space:

Memory
address This scheme will not work:
input
• one Memory input
• one Memory output
instruction data
address address
control bus
address bus
address bus
Solution: multiplex
Memory
program data, when executing

Memory
output
instruction, when fetching

data
Memory
address
input
mux
fetch /
data execute
instruction
address address bit
control bus
address bus
address bus
Solution: multiplex, using an instruction register
Memory

Memory
output
ALU
instruction instruction
register
data
load
on
fetch
Memory
address
input
mux
fetch /
data execute
instruction
address address bit
control bus
address bus
address bus
Memory

Memory
output
ALU
instruction
register
data
load
on
fetch
Memory
address
input
mux
fetch /
data execute
instruction
address address bit
control bus
address bus
address bus
Memory
data
program
Memory
output
ALU
instruction
register
data
load
on
fetch
Memory
address
input
mux
fetch /
data execute
instruction
address address bit
control bus
address bus
address bus (data flows not shown, to minimize clutter)

Simpler solution: separate memory units
Variant of von Neumann Architecture (used by the Hack computer):
Two physically separate memory units:

q Instruction memory
Each can be addressed and manipulated
q Data memory seperately, and simultaneously
• Advantage:
q Complication avoided Sometmes called
“Harvard Architecture”
• Disadvantage:
q Two memory chips instead of one
q The size of the two chips is fixed.
• The Hack CPU
Hack computer
Computer System
CPU
instruction data out

ALU
instruction data
input output
memory memory
address data in
of next
instruction
D register
A register
PC
Hack CPU
Computer System
CPU

ALU
instruction data
input output
memory memory
address data in
of next
instruction
D register
A register
PC
Hack CPU: A 16-bit processor, designed to:

• Execute the current instruction: dataOut = instruction(dataIn)
• Figure out which instruction to execute next.
Hack CPU Interface
data in
data out
address of
restarting next
signal instruction
Hack CPU Implementation
pc
pc
(each "C" symbol represents a control bit)

Disclaimer:
• In what follows we don’t explain all the details of the
CPU implementation, intentionally
• We give enough information to let you figure out the
implementation on your own, when you will actually
build the CPU in project 5.
pc
(each "C" symbol represents a control bit)

CPU operation
pc
CPU operation: instruction handling
pc
@5 0000000000000101
A-instruction
CPU operation: handling A-instructions
@5 0000000000000101
A-instruction
CPU handling of an A-instruction:
• Decodes the instruction into:
q op-code
q 15-bit value
• Stores the value in the A-register

• Outputs the value (not shown in this diagram).
D=D+1;JMP 1110011111010111
C-instruction
CPU operation: handling C-instructions
D=D+1;JMP 1110011111010111
C-instruction CPU handling of a C-instruction:

• Decodes the instruction bits into:
q Op-code
q ALU control bits
q Destination load bits
q Jump bits
• Routes these bits to their chip-part destinations
• The chip-parts (most notably, the ALU) execute the instruction.
011111
11…01
1110011111010111
10…10
writeM
ALU data inputs: ALU control inputs:

• Input 1: from the D-register • control bits
(from the instruction)
• Input 2: from either:
q A-register, or
q data memory
1 011111
0
11…01
01 … 11
1110011111010111
10…10
writeM
0
ALU data output:

• Result of ALU calculation
• Fed simultaneously to: D-register, A-register, data memory
• Which destination actually commits to the ALU output is determined by
the instruction’s destination bits.
011111
11…01
01 … 11
1110011111010111
10…10
writeM
ALU control outputs:

• is the output negative?
• is the output zero?
CPU operation: control
pc
reset reset
computer exterior
(well, kind of)
• The computer is loaded with some program;

• Pushing reset causes the program to start running.
pc
16
1
loa
d
pc
16
PC operation (abstraction)
Emits the address of the next instruction: address of next
instruction
q restart: PC = 0
q no jump: PC++
q goto: PC=A
q conditional goto: if (condition) PC = A else PC++
111 a c c c c c c d d d j j j
16
1
loa
d
pc
16
PC operation (implementation)
if (reset==1) PC = 0 address of next
instruction
else
// in the course of handling the current instruction:
load = f (jump bits, ALU control outputs)
if (load == 1) PC = A // jump
else PC++ // next instruction
pc
That’s It!
• The Hack CPU
Hack Computer

instruc-
CPU data
tion
memory
memory
address data in
Abstraction:
A computer capable of running programs written in the Hack machine language
Implementation:
Built from the Hack chip-set.
Hack CPU

instruc-
CPU data
tion
memory
memory
address data in
Hack CPU
CPU abstraction:
Executes a Hack instruction and figures out which instruction to execute next
CPU Implementation:
Discussed before.
Hack Computer
✔
instruc-
CPU data
tion
memory
memory
address data in
Memory

instruc-
tion CPU Memory
memory
address data in
Memory: abstraction
load
Memory
0
in RAM
16 (16K)
out
16,383
16
16,384 Screen
address
(8K memory
15 map)
24,575
24,576 Keyboard
q Address 0 to 16383: data memory

q Address 16384 to 24575: screen memory map
q Address 24576: keyboard memory map
Memory: implementation
load
Memory
0
in RAM
16 (16K)
out
16,383
16
16,384 Screen
address
(8K memory
15 map)
24,575
24,576 Keyboard
q Address 0 to 16383: data memory

q Address 16384 to 24575: screen memory map
q Address 24576: keyboard memory map
RAM
load
Memory
0
in RAM
16 (16K)
out
16,383
16
16,384 Screen
address built in
(8K memory
map) project 3
15 24,575
24,576 Keyboard
The Hack RAM is realized by the RAM16K chip implemented in project 3.
Screen
Memory
0
in RAM
16 (16K)
out
16,383
16
16,384
address Screen
(8K memory
15 24,575 map)
24,576 Keyboard
Screen memory map
Display Unit (256 by 512, b/w)
Screen
0 1 2 3 4 5 6 7 511
(16384) 0 1111010100000000 0
1 0000000000000000 1
row 0

31 0011000000000001
refresh

32 0000101000000000
33 0000000000000000
row 1 255

63 0000000000000000
To set pixel (row,col) on/off:

(1) word = RAM[16384 + 32*row + col/16]
8159 0000000000000000
8160 0000000000000000 (2) Set the (col % 16)th bit of word to 0 or 1
row 255

(3) RAM[ i ] = word
8191 1011010100000000
Screen
Memory
0
in RAM
16 (16K)
built-in
out
chip
16,383
16
16,384
address Screen
(8K memory
15 24,575 map)
24,576 Keyboard
• The Hack screen is realized by a built-in chip named Screen
• Screen: a regular RAM + display output side-effect.
Keyboard
Memory
0
in RAM
16 (16K)
out
16,383
16
16,384 Screen
address
(8K memory
15 map)
24,575
24,576 Keyboard
Keyboard memory map
Keyboard
0000000001101011
0000000001001011
0000000000000000
0000000000110100 k
Scan-code of ‘k’ = 75
The Keyboard chip emits the scan-code of the currently pressed key,
or 0 if no key is pressed.
The Hack character set
key code key code key code key code key code
(space) 32 0 48 A 65 a 97 newline 128
! 33 1 49 B 66 b 98 backspace 129
“ 34 … … C … c 99 left arrow 130
# 35 9 57 … … … … up arrow 131
$ 36 Z 90 z 122 right arrow 132
: 58
% 37 down arrow 133
; 59 [ 91 { 123
& 38 home 134
< 60 / 92 | 124
‘ 39 end 135
= 61 ] 93 } 125
( 40 Page up 136
> 62 ^ 94 ~ 126
) 41 Page down 137
? 63 _ 95
* 42 insert 138
@ 64 ` 96
+ 43 delete 139
, 44 esc 140
- 45 f1 141
. 46 … …
/ 47 f12 152
Keyboard
Memory
0
in RAM built-in
(16K) chip
16
out
16,383 16
16,384 Screen
address
(8K memory
15 map)
24,575
24,576 Keyboard
• Realized by a built-in chip named Keyboard
• Keyboard: A read-only 16-bit register + a keyboard input side-effect.
Memory implementation
load
Memory
0
in RAM
RAM
16 (16K)
(16K)
out
16,383 16
16,384 Screen
address Screen
(8K memory
(8K memory
15 map)
map)
24,575
24,576 Keyboard
Implementation outline:
• Uses the three chip-parts RAM16K, Screen, and Keyboard (as just described)
• Routes the address input to the correct address input of the relevant chip-part.
Hack Computer
✔ ✔
instruc- instruct. data out
CPU data
tion
memory
memory
address data in
reset
reset
rese
t
Instruction memory
Hack Computer
Hack Program
0000000000001101
1110101001010101
0000000000000001
1110101001101011
CPU data
0000001100110101 load tion
1110010111011111
memory memory
address data in

1111001001100111
reset
To run a program on the Hack computer:

q Load the program into the Instruction Memory
Load a program
q Press “reset” into the Instruction
q The program starts running. Memory? How?
Instruction memory
Hack Computer
Hack Program
0000000000001101
1110101001010101
0000000000000001
1110101001101011
CPU data
0000001100110101 load tion
1110010111011111
memory memory
address data in

1111001001100111
reset
Loading a program into the Instruction Memory:

• Hardware implementation: plug-and-play ROM chips
(each comes pre-loaded with a program’s code)
• Hardware simulation: programs are stored in text files;
The simulator’s software features a load-program service.
Instruction memory
(to:
(from: the address out the CPU’s
CPU’s pc ROM32K instruction
14 16
output) output)
Built-in
chip
• The Hack Instruction Memory is realized by a built-in chip named ROM32K
• ROM32K: a read-only, 16-bit, 32K RAM chip + program loading side-effect.
Hack Computer implementation
That’s it!
“We ascribe beauty to that which is simple; which has no superfluous

parts; which exactly answers its end; which stands related to all things;
which is the mean of many extremes.”
-- Ralph Waldo Emerson
• The Hack CPU
Hardware organization: a hierarchy of chip parts
computer
memory CPU
RAM units PC ALU
registers adder
elementary
logic gates
Hardware projects
computer
p5
memory CPU
p5 p5
RAM chips PC ALU

p3 p3 p2
registers adder
p3
p2
elementary
logic gates p1
Project 5: building the Hack Computer
computer
p5
memory CPU
p5 p5
RAM chips PC ALU
registers adder
elementary
logic gates
Abstraction
Hack Computer
Implementation
CPU Abstraction
Hack CPU
CPU Implementation
111 a cccccc ddd jjj
Implementation tips:
• Chip-parts: Mux16, ARegister, DRegister, PC, ALU, …
• Control: use HDL subscripting to parse and route the instruction bits to the
control bits of the relevant chip-parts.
CPU Implementation
CPU.hdl
/**
* The Central Processing unit (CPU).
* Consists of an ALU and a set of registers,
* designed to fetch and execute instructions
* written in the Hack machine language.
*/
CHIP CPU {
IN
inM[16], // value of M = RAM[A]
instruction[16], // Instruction for execution
reset; // Signals whether to re-start the current program
// (reset == 1) or continue executing the current
// program (reset == 0).
OUT
outM[16] // value to write into M = RAM[A]
writeM, // Write into M?
addressM[15], // RAM address (of M)
pc[15]; // ROM address (of next instruction)
PARTS:
// Put you code here:
}
Memory
/** Memory of 16K 16-bit registers */
CHIP RAM16K { built in
IN project 3
address[14],
in[16],
/** Memory of 8K 16-bit registers
load;
OUT * with a display unit side effect. */
CHIP Screen {
out[16];
IN built-in
built-in
address[13], chips
chips
BUILTIN RAM16K;
in[16],
CLOCKED in, load;
} load;
OUT /** 16-bit register with a
out[16];
* keyboard input side effect */
CHIP Keyboard {
BUILTIN Screen;
OUT
CLOCKED in, load;
} out[16];
Implementation tips: BUILTIN Keyboard;

}
• Use the three chip-parts:
RAM16K, Screen, and Keyboard
• Route the address input to the correct address input of the relevant chip-part.
✔ ✔
Implementation tip:
Use the built-in ROM32K chip.
✔ ✔ ✔
Computer.hdl
/**
* The HACK computer, including CPU, ROM and RAM.
* When reset is 0, the program stored in the computer's ROM executes.
* When reset is 1, the execution of the program restarts.
*/
CHIP Computer {
IN reset;
PARTS:
// Put your code here.
}
Project 5 resources
www.nand2tetris.org
All the necessary project 5

files are available in:
nand2tetris / projects / 05
More resources
• HDL Survival Guide
• Hardware Simulator Tutorial
• nand2tetris Q&A forum
All available in: www.nand2tetris.org
Best practice advice
• Try to implement the chips in the given order
• Strive to use as few chip-parts as possible
• You will have to use chips that you’ve implemented in previous projects
• The best practice is to use their built-in versions.
• The Hack CPU
From Nand to Tetris
Building a Modern Computer from First Principles
Chapter 5
Computer Architecture
These slides support chapter 5 of the book
The Elements of Computing Systems
By Noam Nisan and Shimon Schocken
MIT Press

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From

• Von Neumann Architecture

• The Hack CPU

• The Hack Computer

Same hardware can run many different software programs

Alan Turing: John Von Nuemann:

• Von Neumann Architecture

• The Hack CPU

• The Hack Computer

• Fetch an instruction from the program memory

• Execute the instruction.

• Executing the instruction involves:

address bus (data flows not shown, to minimize clutter)

If the Memory is one address space:

If the Memory is one address space:

program data, when executing

instruction, when fetching

program data, when executing

program data, when executing

address bus (data flows not shown, to minimize clutter)

Two physically separate memory units:

q The size of the two chips is fixed.

• Von Neumann Architecture

• The Hack CPU

• The Hack Computer

instruction data out

instruction data out

Hack CPU: A 16-bit processor, designed to:

(each "C" symbol represents a control bit)

(each "C" symbol represents a control bit)

• Stores the value in the A-register

C-instruction CPU handling of a C-instruction:

ALU data inputs: ALU control inputs:

ALU data output:

ALU control outputs:

• The computer is loaded with some program;

• Von Neumann Architecture

• The Hack CPU

• The Hack Computer

instruction data out

instruction data out

instruction data out

q Address 0 to 16383: data memory

q Address 0 to 16383: data memory

The Hack RAM is realized by the RAM16K chip implemented in project 3.

• The Hack screen is realized by a built-in chip named Screen

• Screen: a regular RAM + display output side-effect.

• Realized by a built-in chip named Keyboard

• Keyboard: A read-only 16-bit register + a keyboard input side-effect.

To run a program on the Hack computer:

Loading a program into the Instruction Memory:

• The Hack Instruction Memory is realized by a built-in chip named ROM32K

• ROM32K: a read-only, 16-bit, 32K RAM chip + program loading side-effect.

“We ascribe beauty to that which is simple; which has no superfluous

• Von Neumann Architecture

• The Hack CPU

• The Hack Computer

RAM units PC ALU

RAM chips PC ALU

RAM chips PC ALU

111 a cccccc ddd jjj

Implementation tips: BUILTIN Keyboard;

All the necessary project 5