PD-91277A

IRFZ46N
HEXFET® Power MOSFET
l Advanced Process Technology D
l Ultra Low On-Resistance VDSS = 55V
l Dynamic dv/dt Rating
l 175°C Operating Temperature RDS(on) = 16.5mΩ
l Fast Switching G
l Fully Avalanche Rated ID = 53A‡
S
Description
Advanced HEXFET® Power MOSFETs from International
Rectifier utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.

The TO-220 package is universally preferred for all

commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220 contribute TO-220AB
to its wide acceptance throughout the industry.

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 53‡
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 37 A
IDM Pulsed Drain Current  180
PD @TC = 25°C Power Dissipation 107 W
Linear Derating Factor 0.71 W/°C
VGS Gate-to-Source Voltage ± 20 V
IAR Avalanche Current 28 A
EAR Repetitive Avalanche Energy 11 mJ
dv/dt Peak Diode Recovery dv/dt ƒ 5.0 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)

Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.4
RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient ––– 62
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Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.057 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 16.5 mΩ VGS = 10V, ID = 28A „
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 19 ––– ––– S VDS = 25V, ID = 28A„
––– ––– 25 VDS = 55V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
Qg Total Gate Charge ––– ––– 72 ID = 28A
Q gs Gate-to-Source Charge ––– ––– 11 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 26 VGS = 10V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 14 ––– VDD = 28V
tr Rise Time ––– 76 ––– ID = 28A
ns
td(off) Turn-Off Delay Time ––– 52 ––– RG = 12Ω
tf Fall Time ––– 57 ––– VGS = 10V, See Fig. 10 „
Between lead, D
LD Internal Drain Inductance ––– 4.5 –––
6mm (0.25in.)
nH G
from package
LS Internal Source Inductance ––– 7.5 –––
and center of die contact S

Ciss Input Capacitance ––– 1696 ––– VGS = 0V

Coss Output Capacitance ––– 407 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 110 ––– pF ƒ = 1.0MHz, See Fig. 5
EAS Single Pulse Avalanche Energy ‚ ––– 583… 152† mJ IAS = 28A, L = 389µH

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions
D
IS Continuous Source Current MOSFET symbol
––– ––– 53
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

––– ––– 180

(Body Diode) p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, I S = 28A, VGS = 0V „
trr Reverse Recovery Time ––– 67 101 ns TJ = 25°C, IF = 28A
Qrr Reverse Recovery Charge ––– 208 312 nC di/dt = 100A/µs „
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 ).
‚ Starting TJ = 25°C, L = 389µH
RG = 25Ω, IAS = 28A. (See Figure 12).
ƒ ISD ≤ 28A, di/dt ≤ 220A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C.
„ Pulse width ≤ 400µs; duty cycle ≤ 2%.
… This is a typical value at device destruction and represents
operation outside rated limits.
† This is a calculated value limited to TJ = 175°C.
‡ Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 39A.

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1000 VGS
1000 VGS
TOP 15V TOP 15V
I D , Drain-to-Source Current (A)

10V 10V

I D , Drain-to-Source Current (A)

8.0V 8.0V
7.0V 7.0V
6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
BOTTOM 4.5V BOTTOM4.5V
100 100

4.5V
10 10
4.5V

20µs PULSE WIDTH 20µs PULSE WIDTH

TJ = 25 °C TJ = 175 °C
1 1
0.1 1 10 100 0.1 1 10 100
VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 3.0
ID = 53A
RDS(on) , Drain-to-Source On Resistance
I D , Drain-to-Source Current (A)

2.5
TJ = 25 ° C

100 2.0
(Normalized)

TJ = 175 ° C

1.5

10 1.0

0.5
V DS= 25V
20µs PULSE WIDTH VGS = 10V
1 0.0
4 5 6 7 8 9 10 11 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( ° C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

Vs. Temperature
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3000 20
VGS = 0V, f = 1MHz ID = 28A
Ciss = Cgs + Cgd , Cds SHORTED V DS= 44V

VGS , Gate-to-Source Voltage (V)

Crss = Cgd V DS= 27V
2500 Coss = Cds + Cgd V DS= 11V
16
C, Capacitance (pF)

Ciss
2000
12

1500
Coss
8
1000

Crss 4
500

FOR TEST CIRCUIT

0 SEE FIGURE 13
1 10 100 0
0 10 20 30 40 50 60 70
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000 1000
OPERATION IN THIS AREA
LIMITED BY RDS (on)
ISD , Reverse Drain Current (A)

ID, Drain-to-Source Current (A)

100 100
TJ = 175 ° C

100µsec
10 10
TJ = 25 ° C 1msec

1 1
10msec
Tc = 25°C
Tj = 175°C
V GS = 0 V Single Pulse
0.1 0.1
0.2 0.7 1.2 1.7 2.2 1 10 100
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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60
RD
LIMITED BY PACKAGE VDS

50 VGS
D.U.T.
RG
ID , Drain Current (A)

+
40 -VDD

V GS
30 Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

20
Fig 10a. Switching Time Test Circuit
10 VDS
90%
0
25 50 75 100 125 150 175
TC , Case Temperature ( °C)

10%
VGS
Fig 9. Maximum Drain Current Vs.
td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

10
Thermal Response(Z thJC )

1
D = 0.50

0.20

0.10
PDM
0.1 0.05
t1
0.02 SINGLE PULSE
0.01 (THERMAL RESPONSE) t2

Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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EAS , Single Pulse Avalanche Energy (mJ)

350
15V ID
TOP 11A
300 20A
DRIVER
BOTTOM 28A
VDS L
250

RG D.U.T +
V
200
- DD
IAS A
20V
tp 0.01Ω 150

Fig 12a. Unclamped Inductive Test Circuit 100

V(BR)DSS 50
tp
0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature( ° C)

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current
I AS

Fig 12b. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

50KΩ

12V .2µF
QG .3µF

VGS +
V
D.U.T. - DS
QGS QGD
VGS
VG 3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

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Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T* • Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• ISD controlled by Duty Factor "D" VDD
-
• D.U.T. - Device Under Test
VGS

* Reverse Polarity of D.U.T for P-Channel

Driver Gate Drive

P.W.
Period D=
P.W. Period

[VGS=10V ] ***

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
[VDD]
Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% [ISD ]

*** VGS = 5.0V for Logic Level and 3V Drive Devices

Fig 14. For N-channel HEXFET® power MOSFETs

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TO-220AB Package Outline
Dimensions are shown in millimeters (inches)

10.54 (.415) 3.78 (.149) -B-

2.87 (.113) 10.29 (.405) 3.54 (.139) 4.69 (.185)
2.62 (.103) 4.20 (.165)
-A- 1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
1.15 (.045) LEAD ASSIGNMENTS
MIN 1 - GATE
1 2 3 2 - DRAIN
3 - SOURCE
4 - DRAIN
14.09 (.555)
13.47 (.530) 4.06 (.160)
3.55 (.140)

0.93 (.037) 0.55 (.022)

3X 3X
0.69 (.027) 0.46 (.018)
1.40 (.055)
3X
1.15 (.045) 0.36 (.014) M B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

TO-220AB Part Marking Information

EXAMPLE : THIS IS AN IRF1010
WITH ASSEMBLY A
LOT CODE 9B1M INTERNATIONAL PART NUMBER
RECTIFIER
IRF1010
LOGO 9246
9B 1M DATE CODE
ASSEMBLY
(YYWW)
LOT CODE
YY = YEAR
WW = WEEK

Data and specifications subject to change without notice.

This product has been designed and qualified for the automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.7/02
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/