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  • Lab Assignment 4

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    Kerkerk
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    The instructions in memory will be executed as follows: 1) The processor will fetch instructions from memory by using the program counter to retrieve the instruction and place it in the instruction register. 2) It will then decode and execute the instruction, such as loading a value into the accumulator from memory. 3) The program counter will then increment to the next instruction and this fetch, decode, execute cycle will repeat, performing operations like addition and storing results in memory.

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    The instructions in memory will be executed as follows: 1) The processor will fetch instructions from memory by using the program counter to retrieve the instruction and place it in the instruction register. 2) It will then decode and execute the instruction, such as loading a value into the accumulator from memory. 3) The program counter will then increment to the next instruction and this fetch, decode, execute cycle will repeat, performing operations like addition and storing results in memory.

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    21 views2 pages

    Lab Assignment 4

    Uploaded by

    Kerkerk
    The instructions in memory will be executed as follows: 1) The processor will fetch instructions from memory by using the program counter to retrieve the instruction and place it in the instruction register. 2) It will then decode and execute the instruction, such as loading a value into the accumulator from memory. 3) The program counter will then increment to the next instruction and this fetch, decode, execute cycle will repeat, performing operations like addition and storing results in memory.

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    © All Rights Reserved
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    Lab Assignment 4

    Given the current status of memory and PC as in Figure 1, explain how the instructions in
    memory will be executed.
    Note: All acronyms employed here are well-known acronyms. Again, all the instructions are
    written following 1-address format and none of them are of immediate addressing mode.
    [10 marks]

    Figure 1: Internal architecture of a computer


    Fetch data
    1.The processor reads an instruction from memory (register, cache, main memory)
    2. The address of 100 in the program counter (Pc) will be fetch.
    3. Place memory location into memory address register (MAR)
    4. Fetch data: from memory to memory data register (MDR)
    5. The address 100 in MAR will be fetch from MDR then pace the data in instruction register
    (IR)
    6. The memory of address 100 which is LOAD 11 also will be stored in MAR.

    Decode/ Execution
    7. The true value will be transferred and executed and he true value in LOAD 11 in IR will be
    transferred to MAR
    8. The content (memory = 3 ) will be stored in MDR and IC accumulator (address instruction :
    AC=3)

    Second cycle
    9. Program counter (PC) will increase 1, so the address 100+1=101.
    10. PC locate address 101, hold the address until next instruction.
    11. Instruction LOAD11, look at address=11, the content in memory=3
    12. Put the content in MAR (will put in AC accumulator) - 1-address instruction : AC=3
    13. Next, ADD12, at address 12, content=2.
    14.The control unit requests a memory read, and the result is placed on the data bus and copied
    into MDR and then place data in instruction register (IR).
    Decode/ Execution
    15. Add 12 to accumulator, the value will be overwrite : AC=3+2=5
    16. Next, STORE14, content of AC will be put in address 14.

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