Memory Terminology
Memory Cell – The smallest unit of information. Assumes one of two states
Memory – the long or short term change in the physical properties of matter
caused by an event.
Computers use two fundamental types of memory
1. Immediate access store or main store
required to access at the same rate as CPU
holds the temporary results due to computation
the sequential instructions making up the executing program
2. Secondary storage
Long term storage of large amounts of data and various programs
which are not currently being used.
Magnetic disks, Optical disks, Tape drives
6
Immediate access stores are on the order of 10 times the speed of
secondary stores.
Secondary stores are considerably cheaper than immediate access stores
Digital logic devices operate on binary signals so it is not surprising that we
find most memory devices store information in binary form. The most
important requirement we observe is the ability for memory to be in one of
two stable states requiring the application of energy to change or assume a
state.
Random Access Memory (RAM) - The access time of any cell is constant
and independent of the location of the cell. The CPU need not worry about
differences in timing of retrieving one location over another. Also referred to
as immediate access memory
Serial Access Memory- The access time is dependent on the physical
location of data within memory. Also known as sequential access memory.
Examples : Tape drives, disk drives, CD drives, shift registers.
Bandwidth- A measure of the speed at which data can be transferred
between memory and the host computer and is measured in bytes/second.
A typical hard drive might be able to sustain a 50 MB/second data transfer
between the drive and CPU.
Items affecting bandwidth : access time of memory, the type of data
path between memory and CPU and the interface between memory and
CPU. Thus the number of bits that can be transferred in parallel and the
speed of the bus are important factors in describing bandwidth.
Latency- The delay between beginning a memory access and the start of the
transfer. It is typically substantially longer than the time to transfer a word
from a block of memory.
- time required to rotate a disk to desired position
- time required to take control of the bus
we will call 0 and 1. Usually these are grouped in blocks called words. Each
cell has a physical address.
Capacity – The number of bits or bytes the memory can hold
Semiconductor devices are typically specified in bits
Secondary stores typically in terms of bytes
There are two somewhat different measuring conventions:
1K = 1000, 1M= 1000000
and
10 20
1K=2 = 1024, 1M = 2 = 1048576
Density – A measurement of how much data is stored per unit area or
volume. density = capacity/size
Access time (speed)– The time, measured from the start of a read cycle,
required to read data from a given memory location. We break this down
into two components:
- Time to locate the required memory cell within the memory array
- Time taken for the data to become available from the cell
We can classify access time as read cycle and write cycle access times.
We can also measure speed by specifying the cycle time – the unit of time
which must elapse between two successive read or writes.
Volatile memory – Memory which loses its stored data when the power
source is removed. Typically of the majority of semiconductor memory.
Exceptions like EPROM (Erasable Programmable Read-Only Memory) and
flash memory (often used in cell phones, digital cameras, MP3 players)
Read-Only Memory – Contents can be red but not modified. Non-Volatile
Often hold parts of the operating system. Used for system software in small
microprocessor systems like PDA's
Static Memory - Memory which retains its state until it is altered or until the
power source is removed. Often referred to as SRAM.
SEMICONDUCTOR based memory is a product of the 1960's. SRAMS can
be accessed very quickly (access times measured as a few nanoseconds)
Lets look a little more closely at how a memory element might be realized.
Consider the following circuit called a Latch
 Suppose R=1 and S=0 : Next suppose R=0 and S=1

Change S to 0
Now change R to 0:

And again the circuit remembers its previous state.

No change occurs it remembers its previous state. The latch (memory element) can remember which of its two inputs S or R
was most recently equal to 1. S and R are often referred to as the Set and Reset
inputs. R=S=1 is not a normal state. We often think of Qa and Qb as being

Q and Q .

Possible organization of bit cells in a memory chip 16 words 8 bits each

b7 b'7 b1 b'1 b0 b'0 The diagram pictured stores 128 bits, has 14 external connections for address,
data and control lines, and 2 lines for power.
W0 . . .
A static RAM (SRAM) cell is most likely composed of two cross-connected

A0 inverters creating a latch which is then connected to 2 bit lines by transistors

W1 acting as switches that can be open or closed under the control of the word
A1 ...
. . line. A word line at ground level has transistors turned off other wise the
A2
.
. .
. transistors are on.
A3 . .
. b b'
Address
decoder W15
...
T1 X Y T2

Sense/Write Sense/Write Sense/Write R/W

circuit circuit circuit CS

Data Input/Output Word Line

b7 lines
b1 b0
Bit Lines
16 x 8 organization (128 bits)

Cells are organized in the form of an array and each cell is capable of storing one
bit. The rows constitute a word and are connected via a word line. The word line is
driven by the address decoder. Cells in a column are connected to a sense/write
circuit by two bit lines. The sense/write circuits are connected to the input/output
lines of the chip and are responsible for the reading or writing to the cells of the
Example – Suppose the cell is considered to be in state 1 if X=1 and Y=0.
If the word line is kept at ground level the state is maintained.
Read operation - Word line is activated to close T1 and T2. If the cell is in state
1, b is high b' is low and the Sense/Write circuit senses this.

selected word. Two control lines R/W (Read/Write) and CS (Chip Select) , specify
the operation and select the correct chip in multichip systems. Write operation – The Sense/Write circuit first sends signals to b and b' , then the
word line is activated and the cell is forced to the appropriate value.
 Structure modification – information can be stored by modifying the shape or
Dynamic Memory – (DRAMS) Stores data in the form of an electric charge. Less dimensions of an object.
expensive because they require fewer transistors. The capacitors they utilize lose Punch cards – use of the "there/not there" principle
their charge over time. Discharging causes the memory to forget its state. Records – anolog information stored by deforming the spiral grooves on
the surface of a plastic disk.
Single-transistor CD-R/CD-RW – pits are burned into a either an organic dye or a
Word line Dynamic memory
cell coating of an alloy of silver, indium, antimony and
tellurium.

T Delay line memory – Early computers converted data into ultrasonic sound
Bit Line pulses traveling down tubes filled with mercury. When a train of pulses
representing a stored binary sequence travels from one end of the tube to the
The charge on the capacitors must be recharged every 2-16 ms in an operation other it is detected, amplified and then recirculated. Also known as spatial
called memory refreshing. memory. (Think of the example of a attaching a string between two points and
plucking it. A wave travels down the string – the memory is contained in this
MEMORY TECHNOLOGIES – pulse)
Ideally all memory would meet five requirements
1. Be fast Feedback - Data can be held in an electronic state by means of a feedback.
2. Be high density
We have already discussed this model some what. This type of memory is in
3. Be inexpensive
4. Have low power consumption wide use, can be designed to be accessed very fast and to operate using little
5. Be highly robust (not prone to errors)
power.
Unfortunately these goals seem to be at odds with one another.
Charge Storage – DRAM is such an example. Makes use of capacitors having
To address these goals there is a wide variety of memory technologies available,
one state represented by charged , the other by discharged.
each having its own advantages and disadvantages.

What technologies are/have been available for memory storage?

Magnetism – Probably the most common form of lowcost, high-capacity Memory Hierarchy:
memories. Access speeds
Fast
- Floppy and Hard drives
1 ns
- Bubble Memory (1970's early 80's)
- Feromagnetic rings called cores (60's and before) were used for
Registers Random
immediate access memories in mainframes. 5 ns access
Cache memory
These all rely on a property called ferromagnetism, in which adjacent
electrons align their spin axes parallel to one another (same direction is 50 ns Main Store
magnetized). The material can be magnetized with electron spins in one of
two states. The state can then detected by a magnetoresistive read head. Magnetic Disk Drives
Serial
90 ms CD-ROM access
Optical Memory- Optical (reflective) properties of the storage medium are
memory
modified.
Magnetic Tape Drives
- Printed text modifies the reflect properties of paper (Barcodes too) > 1s
- CD's reflect a laser off of a reflective surface
Slow
- punch cards transmit light through the holes.

A typical computer system will have a variety of storage technologies. For Semiconductor Memory
example, doesn't every computer shipped today come with Fabricated on silicon chips by the same process used to manufacture the
1. Printer/Scanner Combo (too slow to rate) microprocessor.
2. CD-RW (90 ms) Characteristics : High Density, ease of use, fast.
3. Foppy/Zip (30 ms access time)
4. Hard Drive (12 ms access time) There are two classes static and dynamic.
5. RAM (around 50 nanosecond access time)
6. High speed Cache (5 nanosecond access time)
7. CPU with internal registers (access time around a nanosecond)
A typical semiconductor memory chip: 4M CMOS RAM
CMOS stands for Complementary Metal Oxide Semiconductor –the type of CS Chip Select- When low selects this chip for memory access
technology used in manufacturing the chip.
R/W Read/Not Write - When high indicates a read cycle, low a write cycle
(from computers perspective) 0 ≡ device writing
512K×8 STATIC RAM ( 512x8 = 21923 bits = 222 bits = 22022 = 4Mbits)
to chip.
0V +5 V
OE Output Enable- When low in a read cycle allows for data to be read
Data Bus from the chip and placed on the bus.
A0 Vss Vcc D0
A1 D1 Memory interfaced with CPU
A2 D2
ADDRESS BUS
A3 D3
A4 D4
A5 D5 DATA BUS
A6 D6
Address Bus A7 D7
A8 Data is fed into or
19 lines can Data Address Data Address Data Address
A9 read from the 8 bit
address
data bus
219 locations A10
A11
219=21029 A12 Memory Memory
CPU
= 29 K A13
= 512 K Device 1 Device 2
A14
Chip Select
A15 CS R/W DS CS R/W OE CS R/W OE
A16 Output Enable
A17
OE
A18 Read/Not Write Address CS1
R/W CS2
Memory Control control R/W
logic
Inputs OE