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1 1
Compal Confidential
2 2
3 2007-4-20 3
REV:1A
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 1 of 48
A B C D E
A B C D E
Compal Confidential
Intel Merom Processor Thermal Sensor Clock Generator
Fan Control
Model Name : ICL50/51, ICK70/ICK71 page 36
ADM1032 ICS9LPRS365
uPGA-478 Package page 4 page 16
File Name : LA-3551P
(Socket P) page 4,5,6
1 1
FSB
H_A#(3..35) 667/800MHz H_D#(0..63)
DVI-D Conn. LCD Conn. CRT & TV-out
page 18 page 18 page 19
MXM II VGA/B
DMI C-Link USB conn x2 Bluetooth CMOS
page 17
USB port 0, 2 Conn Camera
PCI-Express
2
Intel ICH8-M 3.3V 48MHz USB
2
CIR
Power Circuit DC/DC AUDIO/B Conn. page 29
4
page 38,39,40,41 w/Woofer(ICK70) 4
42,43,44,45 page 35
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Thursday, April 19, 2007 Sheet 2 of 48
A B C D E
A B C D E
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
B+ AC or battery power rail for power circuit. N/A N/A N/A
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VS 1.05V switched power rail ON OFF OFF
+1.25VS 1.25V switched power rail ON OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF Board ID / SKU ID Table for AD channel
+1.8V 1.8V power rail for DDR ON ON OFF Vcc 3.3V +/- 5%
+1.8VS 1.8V switched power rail ON OFF OFF Ra/Rc/Re 100K +/- 5%
+2.5VS 2.5V switched power rail ON OFF OFF Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3VALW 3.3V always on power rail ON ON ON* 0 0 0 V 0 V 0 V
+3V 3.3V power rail for SB ON ON X 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+3V_LAN 3.3V power rail for LAN ON ON X 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+3VS 3.3V switched power rail ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+5VALW 5V always on power rail ON ON ON* 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+5VS 5V switched power rail ON OFF OFF 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+VSB VSB always on power rail ON ON ON* 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+RTCVCC RTC power ON ON ON 7 NC 2.500 V 3.300 V 3.300 V
2 2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 3 of 48
A B C D E
5 4 3 2 1
H_A#[3..35]
7 H_A#[3..35]
H_REQ#[0..4]
7 H_REQ#[0..4]
H_RS#[0..2]
7 H_RS#[0..2]
JP22A
H_A#3 J4 H1 H_ADS# 7
A[3]# ADS#
ADDR GROUP 0
H_A#4 L5 E2 H_BNR# 7
H_A#5 A[4]# BNR#
D L4 A[5]# BPRI# G5 H_BPRI# 7 D
H_A#6 K5
H_A#7 A[6]#
M3 A[7]# DEFER# H5 H_DEFER# 7
H_A#8 N2 F21
A[8]# DRDY# H_DRDY# 7
H_A#9 J1 E1
A[9]# DBSY# H_DBSY# 7
H_A#10 N3
H_A#11 A[10]#
P5 A[11]# BR0# F1 H_BR0# 7
H_A#12 P2 A[12]#
CONTROL
H_A#13 L2 D20 H_IERR#
H_A#14 A[13]# IERR#
P4 A[14]# INIT# B3 H_INIT# 21
H_A#15 P1
H_A#16 A[15]#
R1 A[16]# LOCK# H4 H_LOCK# 7
7 H_ADSTB#0 M1 ADSTB[0]#
C1 H_RESET# H_RESET# 7
H_REQ#0 RESET# H_RS#0
K3 REQ[0]# RS[0]# F3
H_REQ#1 H2 F4 H_RS#1
H_REQ#2 REQ[1]# RS[1]# H_RS#2
K2 REQ[2]# RS[2]# G3
H_REQ#3 J3 G2 H_TRDY# 7
H_REQ#4 REQ[3]# TRDY#
L1 REQ[4]#
HIT# G6 H_HIT# 7
H_A#17 Y2 E4
A[17]# HITM# H_HITM# 7
H_A#18 U5
H_A#19 A[18]#
R3 A[19]# BPM[0]# AD4
ADDR GROUP 1
H_A#20 W6 AD3
H_A#21 A[20]# BPM[1]#
XDP/ITP SIGNALS
U4 A[21]# BPM[2]# AD1
H_A#22 Y5 AC4
H_A#23 A[22]# BPM[3]#
U1 A[23]# PRDY# AC2
H_A#24 R4 AC1 XDP_BPM#5
H_A#25 A[24]# PREQ# XDP_TCK
T5 A[25]# TCK AC5
C H_A#26 T3 AA6 XDP_TDI C
H_A#27 A[26]# TDI
W2 A[27]# TDO AB3
H_A#28 W5 AB5 XDP_TMS
H_A#29 A[28]# TMS XDP_TRST#
Y4 A[29]# TRST# AB6
H_A#30 U2 C20 XDP_DBRESET# XDP_DBRESET# 22
H_A#31 A[30]# DBR#
V4 A[31]#
H_A#32 W3 +1.05VS
H_A#33 A[32]#
AA4 A[33]# THERMAL
H_A#34 AB2
H_A#35 A[34]# H_PROCHOT#
AA3 A[35]# PROCHOT# D21
V1 A24 THERMDA
7 H_ADSTB#1 ADSTB[1]# THERMDA
B25 THERMDC XDP_TDI R59 1 2 150_0402_1%
THERMDC
21 H_A20M# A6 A20M#
ICH
+3VS
C485
0.1U_0402_16V4Z
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Merom (1/3)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 4 of 48
5 4 3 2 1
5 4 3 2 1
H_D#[0..63] JP22C
H_D#[0..63] 7
+CPU_CORE A7 VCC[001] VCC[068] AB20 +CPU_CORE
JP22B A9 AB7
H_D#0 H_D#32 VCC[002] VCC[069]
E22 D[0]# D[32]# Y22 A10 VCC[003] VCC[070] AC7
D H_D#1 F24 AB24 H_D#33 A12 AC9 D
H_D#2 D[1]# D[33]# H_D#34 VCC[004] VCC[071]
E26 D[2]# D[34]# V24 A13 VCC[005] VCC[072] AC12
H_D#3 G22 V26 H_D#35 A15 AC13
D[3]# D[35]# VCC[006] VCC[073]
DATA GRP 0
H_D#4 F23 V23 H_D#36 A17 AC15
H_D#5 D[4]# D[36]# H_D#37 VCC[007] VCC[074]
G25 D[5]# D[37]# T22 A18 VCC[008] VCC[075] AC17
H_D#6 E25 U25 H_D#38 A20 AC18
H_D#7 D[6]# D[38]# H_D#39 VCC[009] VCC[076]
E23 D[7]# D[39]# U23 B7 VCC[010] VCC[077] AD7
H_D#8 K24 Y25 H_D#40 B9 AD9
DATA GRP 2
H_D#9 D[8]# D[40]# H_D#41 VCC[011] VCC[078]
G24 D[9]# D[41]# W22 B10 VCC[012] VCC[079] AD10
H_D#10 J24 Y23 H_D#42 B12 AD12
H_D#11 D[10]# D[42]# H_D#43 VCC[013] VCC[080]
J23 D[11]# D[43]# W24 B14 VCC[014] VCC[081] AD14
H_D#12 H22 W25 H_D#44 B15 AD15
H_D#13 D[12]# D[44]# H_D#45 VCC[015] VCC[082]
F26 D[13]# D[45]# AA23 B17 VCC[016] VCC[083] AD17
H_D#14 K22 AA24 H_D#46 B18 AD18
H_D#15 D[14]# D[46]# H_D#47 VCC[017] VCC[084]
H23 D[15]# D[47]# AB25 B20 VCC[018] VCC[085] AE9
7 H_DSTBN#0 J26 DSTBN[0]# DSTBN[2]# Y26 H_DSTBN#2 7 C9 VCC[019] VCC[086] AE10
7 H_DSTBP#0 H26 DSTBP[0]# DSTBP[2]# AA26 H_DSTBP#2 7 C10 VCC[020] VCC[087] AE12
7 H_DINV#0 H25 DINV[0]# DINV[2]# U22 H_DINV#2 7 C12 VCC[021] VCC[088] AE13
C13 VCC[022] VCC[089] AE15
C15 VCC[023] VCC[090] AE17
H_D#16 N22 AE24 H_D#48 C17 AE18
H_D#17 D[16]# D[48]# H_D#49 VCC[024] VCC[091]
K25 D[17]# D[49]# AD24 C18 VCC[025] VCC[092] AE20
H_D#18 P26 AA21 H_D#50 D9 AF9
H_D#19 D[18]# D[50]# H_D#51 VCC[026] VCC[093]
R23 D[19]# D[51]# AB22 D10 VCC[027] VCC[094] AF10
H_D#20 L23 AB21 H_D#52 D12 AF12
D[20]# D[52]# VCC[028] VCC[095]
DATA GRP 1
H_D#21 M24 AC26 H_D#53 D14 AF14
H_D#22 D[21]# D[53]# H_D#54 VCC[029] VCC[096]
L22 D[22]# D[54]# AD20 D15 VCC[030] VCC[097] AF15
H_D#23 M23 AE22 H_D#55 D17 AF17
H_D#24 D[23]# D[55]# H_D#56 VCC[031] VCC[098]
P25 D[24]# D[56]# AF23 D18 VCC[032] VCC[099] AF18
C H_D#25 P23 AC25 H_D#57 E7 AF20 C
+1.05VS H_D#26 D[25]# D[57]# H_D#58 VCC[033] VCC[100]
P22 AE21 E9
DATA GRP 3
H_D#27 D[26]# D[58]# H_D#59 VCC[034]
T24 D[27]# D[59]# AD21 E10 VCC[035] VCCP[01] G21 +1.05VS
H_D#28 R24 AC22 H_D#60 E12 V6
H_D#29 D[28]# D[60]# H_D#61 VCC[036] VCCP[02]
L25 D[29]# D[61]# AD23 E13 VCC[037] VCCP[03] J6
2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Merom (2/3)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 5 of 48
5 4 3 2 1
5 4 3 2 1
+CPU_CORE +CPU_CORE
3 x 330uF(9mOhm/3) 3 x 330uF(9mOhm/3)
JP22D 1 1 1 1 1
A4 VSS[001] VSS[082] P6
A8 P21 C155 + C157 + C440 + C441 + C27 +
VSS[002] VSS[083]
A11 VSS[003] VSS[084] P24
A14 R2 330U_D2E_2.5VM_R9 330U_D2E_2.5VM_R9 330U_D2E_2.5VM_R9 330U_D2E_2.5VM_R9
VSS[004] VSS[085] 2 2 2 2
330U_D2E_2.5VM_R9 2
A16 VSS[005] VSS[086] R5
A19 R22 @
VSS[006] VSS[087]
D A23 VSS[007] VSS[088] R25 D
AF2 VSS[008] VSS[089] T1 South Side Secondary North Side Secondary
B6 VSS[009] VSS[090] T4
B8 VSS[010] VSS[091] T23
B11 T26 +CPU_CORE
VSS[011] VSS[092]
B13 VSS[012] VSS[093] U3
B16 VSS[013] VSS[094] U6
B19 VSS[014] VSS[095] U21
B21 VSS[015] VSS[096] U24 1 1 1 1 1 1 1 1
B24 V2 C116 C117 C474 C465 C469 C468 C462 C85
VSS[016] VSS[097]
C5 VSS[017] VSS[098] V5
C8 V22 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[018] VSS[099] 2 2 2 2 2 2 2 2
C11 VSS[019] VSS[100] V25
C14 W1 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[020] VSS[101]
C16 VSS[021] VSS[102] W4
C19 VSS[022] VSS[103] W23 (Place these capacitors on South side,Secondary Layer)
C2 VSS[023] VSS[104] W26
C22 VSS[024] VSS[105] Y3
C25 Y6 +CPU_CORE
VSS[025] VSS[106]
D1 VSS[026] VSS[107] Y21
D4 VSS[027] VSS[108] Y24
D8 VSS[028] VSS[109] AA2
D11 VSS[029] VSS[110] AA5 1 1 1 1 1 1 1 1
D13 AA8 C461 C458 C119 C120 C104 C93 C92 C84
VSS[030] VSS[111]
D16 VSS[031] VSS[112] AA11
D19 AA14 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[032] VSS[113] 2 2 2 2 2 2 2 2
D23 VSS[033] VSS[114] AA16
D26 AA19 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[034] VSS[115]
E3 VSS[035] VSS[116] AA22
C E6 AA25 (Place these capacitors on North side,Secondary Layer) C
VSS[036] VSS[117]
E8 VSS[037] VSS[118] AB1
E11 VSS[038] VSS[119] AB4
E14 AB8 +CPU_CORE
VSS[039] VSS[120]
E16 VSS[040] VSS[121] AB11
E19 VSS[041] VSS[122] AB13
E21 VSS[042] VSS[123] AB16
E24 VSS[043] VSS[124] AB19 1 1 1 1 1 1 1 1
F5 AB23 C83 C82 C476 C81 C105 C472 C625 C624
VSS[044] VSS[125]
F8 VSS[045] VSS[126] AB26
F11 AC3 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[046] VSS[127] 2 2 2 2 2 2 2 2
F13 VSS[047] VSS[128] AC6
F16 AC8 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[048] VSS[129]
F19 VSS[049] VSS[130] AC11
F2 VSS[050] VSS[131] AC14 (Place these capacitors on South side,Primary Layer)
F22 VSS[051] VSS[132] AC16
F25 VSS[052] VSS[133] AC19
G4 AC21 +CPU_CORE
VSS[053] VSS[134]
G1 VSS[054] VSS[135] AC24
G23 VSS[055] VSS[136] AD2
G26 VSS[056] VSS[137] AD5
H3 VSS[057] VSS[138] AD8 1 1 1 1 1 1 1 1
H6 AD11 C473 C466 C459 C460 C475 C118 C627 C626
VSS[058] VSS[139]
H21 VSS[059] VSS[140] AD13
H24 AD16 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[060] VSS[141] 2 2 2 2 2 2 2 2
J2 VSS[061] VSS[142] AD19
J5 AD22 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[062] VSS[143]
J22 VSS[063] VSS[144] AD25
B
J25 VSS[064] VSS[145] AE1 (Place these capacitors on North side,Primary Layer) B
K1 VSS[065] VSS[146] AE4
K4 VSS[066] VSS[147] AE8
K23 VSS[067] VSS[148] AE11
K26 VSS[068] VSS[149] AE14 +CPU-CORE C,uF ESR, mohm ESL,nH
L3 AE16
L6
VSS[069] VSS[150]
AE19 Decoupling
VSS[070] VSS[151]
L21 VSS[071] VSS[152] AE23 SPCAP,Polymer 6X330uF 9m ohm/6 1.8nH/6
L24 VSS[072] VSS[153] AE26
M2 VSS[073] VSS[154] A2 32X22uF 3m ohm/32 0.6nH/32
M5 VSS[074] VSS[155] AF6 MLCC 0805 X5R
M22 VSS[075] VSS[156] AF8 32X10uF 3m ohm/32 0.6nH/32
M25 VSS[076] VSS[157] AF11
N1 VSS[077] VSS[158] AF13
N4 VSS[078] VSS[159] AF16
N23 VSS[079] VSS[160] AF19
N26 VSS[080] VSS[161] AF21
P3 A25 +1.05VS
VSS[081] VSS[162]
VSS[163] AF25
Merom Ball-out Rev 1a 1
CONN@ . 1 1 1 1 1 1
+ C40 C97 C113 C90 C115 C86 C87
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Merom (3/3)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 6 of 48
5 4 3 2 1
5 4 3 2 1
H_A#[3..35] 4
5 H_D#[0..63] U23A
J13 H_A#3
H_D#0 H_A#_3 H_A#4
E2 H_D#_0 H_A#_4 B11
H_D#1 G2 C11 H_A#5
H_D#2 H_D#_1 H_A#_5 H_A#6
G7 H_D#_2 H_A#_6 M11
H_D#3 M6 C15 H_A#7
H_D#4 H_D#_3 H_A#_7 H_A#8
H7 H_D#_4 H_A#_8 F16
H_D#5 H3 L13 H_A#9
H_D#6 H_D#_5 H_A#_9 H_A#10
G4 H_D#_6 H_A#_10 G17
D H_D#7 F3 C14 H_A#11 D
H_D#8 H_D#_7 H_A#_11 H_A#12
N8 H_D#_8 H_A#_12 K16
H_D#9 H2 B13 H_A#13
H_D#10 H_D#_9 H_A#_13 H_A#14
M10 H_D#_10 H_A#_14 L16
H_D#11 N12 J17 H_A#15
H_D#12 H_D#_11 H_A#_15 H_A#16
N9 H_D#_12 H_A#_16 B14
H_D#13 H5 K19 H_A#17
H_D#14 H_D#_13 H_A#_17 H_A#18
P13 H_D#_14 H_A#_18 P15
H_D#15 K9 R17 H_A#19
H_D#16 H_D#_15 H_A#_19 H_A#20
M2 H_D#_16 H_A#_20 B16
H_D#17 W10 H20 H_A#21
H_D#18 H_D#_17 H_A#_21 H_A#22
Y8 H_D#_18 H_A#_22 L19
H_D#19 V4 D17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
M3 H_D#_20 H_A#_24 M17
H_D#21 J1 N16 H_A#25
+1.05VS H_D#22 H_D#_21 H_A#_25 H_A#26
N5 H_D#_22 H_A#_26 J19
H_D#23 N3 B18 H_A#27
H_D#24 H_D#_23 H_A#_27 H_A#28
W6 H_D#_24 H_A#_28 E19
1
HOST
H_D#_34 H_ADSTB#_0 H_ADSTB#0 4
H_D#35 AC9 G20 H_ADSTB#1
H_D#_35 H_ADSTB#_1 H_ADSTB#1 4
C 100_0402_1% 0.1U_0402_16V4Z H_D#36 AC7 C8 H_BNR# C
2 H_D#_36 H_BNR# H_BNR# 4
H_D#37 AC14 E8 H_BPRI#
H_BPRI# 4
1
H_D#50 H_D#_49
AJ14 H_D#_50
H_D#51 AE9
H_D#52 H_D#_51
AE11 H_D#_52
H_D#53 AH12 K5 H_DINV#0
H_D#54 H_D#_53 H_DINV#_0 H_DINV#1 H_DINV#0 5
AJ5 H_D#_54 H_DINV#_1 L2 H_DINV#1 5
H_D#55 AH5 AD13 H_DINV#2
+1.05VS H_D#56 H_D#_55 H_DINV#_2 H_DINV#3 H_DINV#2 5
AJ6 H_D#_56 H_DINV#_3 AE13 H_DINV#3 5
H_D#57 AE7
H_D#58 H_D#_57 H_DSTBN#0
AJ7 H_D#_58 H_DSTBN#_0 M7 H_DSTBN#0 5
H_D#59 AJ2 K3 H_DSTBN#1
H_D#60 H_D#_59 H_DSTBN#_1 H_DSTBN#2 H_DSTBN#1 5
AE5 H_D#_60 H_DSTBN#_2 AD2 H_DSTBN#2 5
2
H_AVREF H_RS#_2
width:spacing=10mil:20mil (<0.5") B9 H_AVREF
1 2 H_DVREF A9 H_DVREF
1
1 R406 0_0402_5%
R404 C492 CRESTLINE_1p0
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Crestline GMCH(1/7)-GTL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 7 of 48
5 4 3 2 1
5 4 3 2 1
U23B
+1.8V
P36 RSVD1
P37 RSVD2 SM_CK_0 AV29 DDRA_CLK0 14
R35 RSVD3 SM_CK_1 BB23 DDRA_CLK1 14
N35 BA25 R431
RSVD4 SM_CK_3 DDRB_CLK0 15
AR12 AV23 1K_0402_1%
RSVD5 SM_CK_4 DDRB_CLK1 15
AR13 RSVD6
AM12 RSVD7 SM_CK#_0 AW30 DDRA_CLK0# 14
AN13 BA23 SM_RCOMP_VOH
RSVD8 SM_CK#_1 DDRA_CLK1# 14
J12 RSVD9 SM_CK#_3 AW25 DDRB_CLK0# 15
RSVD
AR37 RSVD10 SM_CK#_4 AW23 DDRB_CLK1# 15
AM36 C534 C528
RSVD11 R432
AL36 RSVD12 SM_CKE_0 BE29 DDRA_CKE0 14
D AM37 AY32 3.01K_0402_1% 2.2U_0805_10V6K D
RSVD13 SM_CKE_1 DDRA_CKE1 14
D20 BD39 0.01U_0402_16V7K
RSVD14 SM_CKE_3 DDRB_CKE0 15
SM_CKE_4 BG37 DDRB_CKE1 15
MUXING
RSVD21 1K_0402_1%
BJ20 RSVD22 SM_ODT_0 BH18 DDRA_ODT0 14
BK22 BJ15 2.2U_0805_10V6K
RSVD23 SM_ODT_1 DDRA_ODT1 14
BF19 BJ14 0.01U_0402_16V7K
RSVD24 SM_ODT_2 DDRB_ODT0 15 +1.8V
BH20 RSVD25 SM_ODT_3 BE16 DDRB_ODT1 15 +1.8V
BK18 RSVD26
BJ18 BL15 SMRCOMP R426 1 2 20_0402_1%
RSVD27 SM_RCOMP SMRCOMP# R425 1
BF23 RSVD28 SM_RCOMP# BK14 2 20_0402_1%
2
BG23 RSVD29
BC23 BK31 SM_RCOMP_VOH R334
RSVD30 SM_RCOMP_VOH SM_RCOMP_VOL 1K_0402_1%
BD24 BL31
DDR
DDRA_SMA14 RSVD31 SM_RCOMP_VOL
14 DDRA_SMA14 BJ29 RSVD32 @
15 DDRB_SMA14 DDRB_SMA14 BE24 AR49 20mil
1
RSVD33 SM_VREF_0 SM_VREF
BH39 RSVD34 SM_VREF_1 AW4 1 2 +DIMM_VREF
AW20 R337 0_0402_5%
RSVD35
2
BK20 RSVD36 1
C48 C354 R335
RSVD37 CLK_DREF_96M 1K_0402_1%
D47 RSVD38 DPLL_REF_CLK B42 CLK_DREF_96M 16
B44 C42 CLK_DREF_96M# 0.1U_0402_16V4Z @
RSVD39 DPLL_REF_CLK# CLK_DREF_96M# 16 2
C44 H48 CLK_DREF_SSC
CLK_DREF_SSC 16
1
RSVD40 DPLL_REF_SSCLK CLK_DREF_SSC#
A35 RSVD41 DPLL_REF_SSCLK# H47 CLK_DREF_SSC# 16
B37 RSVD42
C B36 K44 CLK_MCH_3GPLL C
RSVD43 PEG_CLK CLK_MCH_3GPLL 16
CLK
B34 K45 CLK_MCH_3GPLL#
RSVD44 PEG_CLK# CLK_MCH_3GPLL# 16
C34 RSVD45
2
MCH_CFG_12
AM49 R304 R233 @ 4.02K_0402_1%
CL_CLK CL_CLK0 22
AK50 1K_0402_1% MCH_CFG_13
CL_DATA CL_DATA0 22
BJ51 AT43 SYS_PWROK R212 @ 4.02K_0402_1%
NC_1 CL_PWROK MCH_CFG_16
ME
1
NC_2 CL_RST# CL_VREF R241 @ 4.02K_0402_1%
BK50 NC_3 CL_VREF AM50
BL50 NC_4
2
BL49 NC_5
Use VGATE for GMCH_PWROK BL3 C312 1 R305 MCH_CFG_19 +3VS
NC_6 392_0402_1% R243 @ 4.02K_0402_1%
BL2 NC_7
NC
1
SYS_PWROK 1 NC_9 SDVO_CTRL_CLK 2
2 E1 K36
MISC
PM@
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/12/25 Deciphered Date 2007/12/25 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Crestline GMCH (2/7)-DMI/DDR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
ICL50/ICK70 M/B LA-3551P Schematic
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, April 23, 2007 Sheet 8 of 48
5 4 3 2 1
5 4 3 2 1
DDRA_SDQ[0..63] DDRB_SDQ[0..63]
14 DDRA_SDQ[0..63] 15 DDRB_SDQ[0..63]
DDRA_SDM[0..7] DDRB_SDM[0..7]
14 DDRA_SDM[0..7] 15 DDRB_SDM[0..7]
D DDRA_SMA[0..13] DDRB_SMA[0..13] D
14 DDRA_SMA[0..13] 15 DDRB_SMA[0..13]
U23D U23E
DDRA_SDQ0 AR43 BB19 DDRB_SDQ0 AP49 AY17
SA_DQ_0 SA_BS_0 DDRA_SBS0# 14 SB_DQ_0 SB_BS_0 DDRB_SBS0# 15
DDRA_SDQ1 AW44 BK19 DDRB_SDQ1 AR51 BG18
SA_DQ_1 SA_BS_1 DDRA_SBS1# 14 SB_DQ_1 SB_BS_1 DDRB_SBS1# 15
DDRA_SDQ2 BA45 BF29 DDRB_SDQ2 AW50 BG36
SA_DQ_2 SA_BS_2 DDRA_SBS2# 14 SB_DQ_2 SB_BS_2 DDRB_SBS2# 15
DDRA_SDQ3 AY46 DDRB_SDQ3 AW51
DDRA_SDQ4 SA_DQ_3 DDRB_SDQ4 SB_DQ_3
AR41 SA_DQ_4 SA_CAS# BL17 DDRA_SCAS# 14 AN51 SB_DQ_4 SB_CAS# BE17 DDRB_SCAS# 15
DDRA_SDQ5 AR45 DDRB_SDQ5 AN50
DDRA_SDQ6 SA_DQ_5 DDRA_SDM0 DDRB_SDQ6 SB_DQ_5 DDRB_SDM0
AT42 SA_DQ_6 SA_DM_0 AT45 AV50 SB_DQ_6 SB_DM_0 AR50
DDRA_SDQ7 AW47 BD44 DDRA_SDM1 DDRB_SDQ7 AV49 BD49 DDRB_SDM1
DDRA_SDQ8 SA_DQ_7 SA_DM_1 DDRA_SDM2 DDRB_SDQ8 SB_DQ_7 SB_DM_1 DDRB_SDM2
BB45 SA_DQ_8 SA_DM_2 BD42 BA50 SB_DQ_8 SB_DM_2 BK45
DDRA_SDQ9 BF48 AW38 DDRA_SDM3 DDRB_SDQ9 BB50 BL39 DDRB_SDM3
DDRA_SDQ10 SA_DQ_9 SA_DM_3 DDRA_SDM4 DDRB_SDQ10 SB_DQ_9 SB_DM_3 DDRB_SDM4
BG47 SA_DQ_10 SA_DM_4 AW13 BA49 SB_DQ_10 SB_DM_4 BH12
DDRA_SDQ11 BJ45 BG8 DDRA_SDM5 DDRB_SDQ11 BE50 BJ7 DDRB_SDM5
DDRA_SDQ12 SA_DQ_11 SA_DM_5 DDRA_SDM6 DDRB_SDQ12 SB_DQ_11 SB_DM_5 DDRB_SDM6
BB47 SA_DQ_12 SA_DM_6 AY5 BA51 SB_DQ_12 SB_DM_6 BF3
DDRA_SDQ13 BG50 AN6 DDRA_SDM7 DDRB_SDQ13 AY49 AW2 DDRB_SDM7
DDRA_SDQ14 SA_DQ_13 SA_DM_7 DDRB_SDQ14 SB_DQ_13 SB_DM_7
BH49 SA_DQ_14 BF50 SB_DQ_14
DDRA_SDQ15 BE45 AT46 DDRA_SDQS0 DDRB_SDQ15 BF49 AT50 DDRB_SDQS0
A
SA_DQ_15 SA_DQS_0 DDRA_SDQS0 14 SB_DQ_15 SB_DQS_0 DDRB_SDQS0 15
B
DDRA_SDQ16 AW43 BE48 DDRA_SDQS1 DDRB_SDQ16 BJ50 BD50 DDRB_SDQS1
SA_DQ_16 SA_DQS_1 DDRA_SDQS1 14 SB_DQ_16 SB_DQS_1 DDRB_SDQS1 15
DDRA_SDQ17 BE44 BB43 DDRA_SDQS2 DDRB_SDQ17 BJ44 BK46 DDRB_SDQS2
SA_DQ_17 SA_DQS_2 DDRA_SDQS2 14 SB_DQ_17 SB_DQS_2 DDRB_SDQS2 15
DDRA_SDQ18 BG42 BC37 DDRA_SDQS3 DDRB_SDQ18 BJ43 BK39 DDRB_SDQS3
SA_DQ_18 SA_DQS_3 DDRA_SDQS3 14 SB_DQ_18 SB_DQS_3 DDRB_SDQS3 15
C DDRA_SDQ19 BE40 BB16 DDRA_SDQS4 DDRB_SDQ19 BL43 BJ12 DDRB_SDQS4 C
SA_DQ_19 SA_DQS_4 DDRA_SDQS4 14 SB_DQ_19 SB_DQS_4 DDRB_SDQS4 15
DDRA_SDQ20 DDRA_SDQS5 DDRB_SDQ20 DDRB_SDQS5
MEMORY
BF44 SA_DQ_20 SA_DQS_5 BH6 DDRA_SDQS5 14 BK47 SB_DQ_20 SB_DQS_5 BL7 DDRB_SDQS5 15
MEMORY
DDRA_SDQ21 BH45 BB2 DDRA_SDQS6 DDRB_SDQ21 BK49 BE2 DDRB_SDQS6
SA_DQ_21 SA_DQS_6 DDRA_SDQS6 14 SB_DQ_21 SB_DQS_6 DDRB_SDQS6 15
DDRA_SDQ22 BG40 AP3 DDRA_SDQS7 DDRB_SDQ22 BK43 AV2 DDRB_SDQS7
SA_DQ_22 SA_DQS_7 DDRA_SDQS7 14 SB_DQ_22 SB_DQS_7 DDRB_SDQS7 15
DDRA_SDQ23 BF40 AT47 DDRA_SDQS0# DDRB_SDQ23 BK42 AU50 DDRB_SDQS0#
SA_DQ_23 SA_DQS#_0 DDRA_SDQS0# 14 SB_DQ_23 SB_DQS#_0 DDRB_SDQS0# 15
DDRA_SDQ24 AR40 BD47 DDRA_SDQS1# DDRB_SDQ24 BJ41 BC50 DDRB_SDQS1#
SA_DQ_24 SA_DQS#_1 DDRA_SDQS1# 14 SB_DQ_24 SB_DQS#_1 DDRB_SDQS1# 15
DDRA_SDQ25 AW40 BC41 DDRA_SDQS2# DDRB_SDQ25 BL41 BL45 DDRB_SDQS2#
SA_DQ_25 SA_DQS#_2 DDRA_SDQS2# 14 SB_DQ_25 SB_DQS#_2 DDRB_SDQS2# 15
DDRA_SDQ26 AT39 BA37 DDRA_SDQS3# DDRB_SDQ26 BJ37 BK38 DDRB_SDQS3#
SA_DQ_26 SA_DQS#_3 DDRA_SDQS3# 14 SB_DQ_26 SB_DQS#_3 DDRB_SDQS3# 15
DDRA_SDQ27 AW36 BA16 DDRA_SDQS4# DDRB_SDQ27 BJ36 BK12 DDRB_SDQS4#
SA_DQ_27 SA_DQS#_4 DDRA_SDQS4# 14 SB_DQ_27 SB_DQS#_4 DDRB_SDQS4# 15
DDRA_SDQ28 AW41 BH7 DDRA_SDQS5# DDRB_SDQ28 BK41 BK7 DDRB_SDQS5#
SA_DQ_28 SA_DQS#_5 DDRA_SDQS5# 14 SB_DQ_28 SB_DQS#_5 DDRB_SDQS5# 15
DDRA_SDQ29 AY41 BC1 DDRA_SDQS6# DDRB_SDQ29 BJ40 BF2 DDRB_SDQS6#
SA_DQ_29 SA_DQS#_6 DDRA_SDQS6# 14 SB_DQ_29 SB_DQS#_6 DDRB_SDQS6# 15
DDRA_SDQ30 AV38 AP2 DDRA_SDQS7# DDRB_SDQ30 BL35 AV3 DDRB_SDQS7#
SA_DQ_30 SA_DQS#_7 DDRA_SDQS7# 14 SB_DQ_30 SB_DQS#_7 DDRB_SDQS7# 15
DDRA_SDQ31 AT38 DDRB_SDQ31 BK37
DDRA_SDQ32 SA_DQ_31 DDRA_SMA0 DDRB_SDQ32 SB_DQ_31 DDRB_SMA0
AV13 SA_DQ_32 SA_MA_0 BJ19 BK13 SB_DQ_32 SB_MA_0 BC18
SYSTEM
SYSTEM
DDRA_SDQ34 AW11 BK27 DDRA_SMA2 DDRB_SDQ34 BK11 BG25 DDRB_SMA2
DDRA_SDQ35 SA_DQ_34 SA_MA_2 DDRA_SMA3 DDRB_SDQ35 SB_DQ_34 SB_MA_2 DDRB_SMA3
AV11 SA_DQ_35 SA_MA_3 BH28 BC11 SB_DQ_35 SB_MA_3 AW17
DDRA_SDQ36 AU15 BL24 DDRA_SMA4 DDRB_SDQ36 BC13 BF25 DDRB_SMA4
DDRA_SDQ37 SA_DQ_36 SA_MA_4 DDRA_SMA5 DDRB_SDQ37 SB_DQ_36 SB_MA_4 DDRB_SMA5
AT11 SA_DQ_37 SA_MA_5 BK28 BE12 SB_DQ_37 SB_MA_5 BE25
DDRA_SDQ38 BA13 BJ27 DDRA_SMA6 DDRB_SDQ38 BC12 BA29 DDRB_SMA6
DDRA_SDQ39 SA_DQ_38 SA_MA_6 DDRA_SMA7 DDRB_SDQ39 SB_DQ_38 SB_MA_6 DDRB_SMA7
BA11 SA_DQ_39 SA_MA_7 BJ25 BG12 SB_DQ_39 SB_MA_7 BC28
DDRA_SDQ40 BE10 BL28 DDRA_SMA8 DDRB_SDQ40 BJ10 AY28 DDRB_SMA8
DDRA_SDQ41 SA_DQ_40 SA_MA_8 DDRA_SMA9 DDRB_SDQ41 SB_DQ_40 SB_MA_8 DDRB_SMA9
BD10 SA_DQ_41 SA_MA_9 BA28 BL9 SB_DQ_41 SB_MA_9 BD37
DDRA_SDQ42 BD8 BC19 DDRA_SMA10 DDRB_SDQ42 BK5 BG17 DDRB_SMA10
DDRA_SDQ43 SA_DQ_42 SA_MA_10 DDRA_SMA11 DDRB_SDQ43 SB_DQ_42 SB_MA_10 DDRB_SMA11
AY9 SA_DQ_43 SA_MA_11 BE28 BL5 SB_DQ_43 SB_MA_11 BE37
DDRA_SDQ44 BG10 BG30 DDRA_SMA12 DDRB_SDQ44 BK9 BA39 DDRB_SMA12
DDRA_SDQ45 SA_DQ_44 SA_MA_12 DDRA_SMA13 DDRB_SDQ45 SB_DQ_44 SB_MA_12 DDRB_SMA13
AW9 SA_DQ_45 SA_MA_13 BJ16 BK10 SB_DQ_45 SB_MA_13 BG13
DDR
DDR
DDRA_SDQ47 SA_DQ_46 DDRB_SDQ47 SB_DQ_46
BB9 SA_DQ_47 BJ6 SB_DQ_47 SB_RAS# AV16 DDRB_SRAS# 15
B DDRA_SDQ48 DDRB_SDQ48 SB_RCVEN# B
BB5 SA_DQ_48 SA_RAS# BE18 DDRA_SRAS# 14 BF4 SB_DQ_48 SB_RCVEN# AY18 PAD T14
DDRA_SDQ49 AY7 AY20 SA_RCVEN# PAD DDRB_SDQ49 BH5
SA_DQ_49 SA_RCVEN# T13 SB_DQ_49
DDRA_SDQ50 AT5 DDRB_SDQ50 BG1 BC17 @
SA_DQ_50 SB_DQ_50 SB_WE# DDRB_SWE# 15
DDRA_SDQ51 AT7 BA19 @ DDRB_SDQ51 BC2
SA_DQ_51 SA_WE# DDRA_SWE# 14 SB_DQ_51
DDRA_SDQ52 AY6 DDRB_SDQ52 BK3
DDRA_SDQ53 SA_DQ_52 DDRB_SDQ53 SB_DQ_52
BB7 SA_DQ_53 BE4 SB_DQ_53
DDRA_SDQ54 AR5 DDRB_SDQ54 BD3
DDRA_SDQ55 SA_DQ_54 DDRB_SDQ55 SB_DQ_54
AR8 SA_DQ_55 BJ2 SB_DQ_55
DDRA_SDQ56 AR9 DDRB_SDQ56 BA3
DDRA_SDQ57 SA_DQ_56 DDRB_SDQ57 SB_DQ_56
AN3 SA_DQ_57 BB3 SB_DQ_57
DDRA_SDQ58 AM8 DDRB_SDQ58 AR1
DDRA_SDQ59 SA_DQ_58 DDRB_SDQ59 SB_DQ_58
AN10 SA_DQ_59 AT3 SB_DQ_59
DDRA_SDQ60 AT9 DDRB_SDQ60 AY2
DDRA_SDQ61 SA_DQ_60 DDRB_SDQ61 SB_DQ_60
AN9 SA_DQ_61 AY3 SB_DQ_61
DDRA_SDQ62 AM9 DDRB_SDQ62 AU2
DDRA_SDQ63 SA_DQ_62 DDRB_SDQ63 SB_DQ_62
AN11 SA_DQ_63 AT2 SB_DQ_63
CRESTLINE_1p0 CRESTLINE_1p0
PM@ PM@
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Crestline GMCH (3/7)-DDRII
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 9 of 48
5 4 3 2 1
5 4 3 2 1
U23C
LVDS
AD40 PCIE_GTX_C_MRX_N11
GMCH_TXOUT0- PEG_RX#_11 PCIE_GTX_C_MRX_N12
18 GMCH_TXOUT0- G51 LVDSA_DATA#_0 PEG_RX#_12 AG46
GMCH_TXOUT1- E51 AH49 PCIE_GTX_C_MRX_N13
18 GMCH_TXOUT1- LVDSA_DATA#_1 PEG_RX#_13
GMCH_TXOUT2- F49 AG45 PCIE_GTX_C_MRX_N14
18 GMCH_TXOUT2- LVDSA_DATA#_2 PEG_RX#_14
AG41 PCIE_GTX_C_MRX_N15
GRAPHICS
PEG_RX#_15
GMCH_TXOUT0+ G50 J50 PCIE_GTX_C_MRX_P0
18 GMCH_TXOUT0+ LVDSA_DATA_0 PEG_RX_0
GMCH_TXOUT1+ E50 L50 PCIE_GTX_C_MRX_P1
18 GMCH_TXOUT1+ LVDSA_DATA_1 PEG_RX_1
GMCH_TXOUT2+ F48 M47 PCIE_GTX_C_MRX_P2
18 GMCH_TXOUT2+ LVDSA_DATA_2 PEG_RX_2
U44 PCIE_GTX_C_MRX_P3
PEG_RX_3 PCIE_GTX_C_MRX_P4
PEG_RX_4 T49
GMCH_TZOUT0- G44 T41 PCIE_GTX_C_MRX_P5
18 GMCH_TZOUT0- LVDSB_DATA#_0 PEG_RX_5
GMCH_TZOUT1- B47 W45 PCIE_GTX_C_MRX_P6
18 GMCH_TZOUT1- LVDSB_DATA#_1 PEG_RX_6
GMCH_TZOUT2- B45 W41 PCIE_GTX_C_MRX_P7
18 GMCH_TZOUT2- LVDSB_DATA#_2 PEG_RX_7
AB50 PCIE_GTX_C_MRX_P8
PEG_RX_8 PCIE_GTX_C_MRX_P9
PEG_RX_9 Y48
GMCH_TZOUT0+ E44 AC45 PCIE_GTX_C_MRX_P10
18 GMCH_TZOUT0+ LVDSB_DATA_0 PEG_RX_10
GMCH_TZOUT1+ A47 AC41 PCIE_GTX_C_MRX_P11
18 GMCH_TZOUT1+ LVDSB_DATA_1 PEG_RX_11
C GMCH_TZOUT2+ A45 AH47 PCIE_GTX_C_MRX_P12 C
18 GMCH_TZOUT2+ LVDSB_DATA_2 PEG_RX_12
PCI-EXPRESS
AG49 PCIE_GTX_C_MRX_P13
PEG_RX_13 PCIE_GTX_C_MRX_P14
PEG_RX_14 AH45
AG42 PCIE_GTX_C_MRX_P15
PEG_RX_15
GMCH_TV_COMPS E27 N45 PCIE_MTX_GRX_N0 C179 1 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N0
19 GMCH_TV_COMPS TVA_DAC PEG_TX#_0
GMCH_TV_LUMA G27 U39 PCIE_MTX_GRX_N1 C188 1 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N1
19 GMCH_TV_LUMA TVB_DAC PEG_TX#_1
GMCH_TV_CRMA K27 U47 PCIE_MTX_GRX_N2 C195 1 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N2
19 GMCH_TV_CRMA TVC_DAC PEG_TX#_2
TV
N51 PCIE_MTX_GRX_N3 C201 1 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N3
PEG_TX#_3 PCIE_MTX_GRX_N4 C212 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N4
F27 TVA_RTN PEG_TX#_4 R50 1 2
2
VGA
2 1 E29 U43 PCIE_MTX_GRX_P5 C214 1 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P5
R178 GM@ 150_0402_1% CRT_RED# PEG_TX_5 PCIE_MTX_GRX_P6 C219
PEG_TX_6 W42 1 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P6
B PCIE_MTX_GRX_P7 C232 1 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P7 B
PEG_TX_7 Y47 2
GMCH_CRT_CLK K33 Y39 PCIE_MTX_GRX_P8 C241 1 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P8
19 GMCH_CRT_CLK CRT_DDC_CLK PEG_TX_8
GMCH_CRT_DATA G35 AC38 PCIE_MTX_GRX_P9 C248 1 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P9
19 GMCH_CRT_DATA CRT_DDC_DATA PEG_TX_9
F33 AD47 PCIE_MTX_GRX_P10 C253 1 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P10
19 GMCH_CRT_HSYNC CRT_HSYNC PEG_TX_10
CRT_IREF C32 AC50 PCIE_MTX_GRX_P11 C263 1 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P11
CRT_TVO_IREF PEG_TX_11 PCIE_MTX_GRX_P12 C272
19 GMCH_CRT_VSYNC E33 CRT_VSYNC PEG_TX_12 AD43 1 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P12
AG39 PCIE_MTX_GRX_P13 C283 1 2 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P13
PEG_TX_13 PCIE_MTX_GRX_P14 C288 PM@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P14
PEG_TX_14 AE50 1 2
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Crestline GMCH (4/7)-VGA/LVDS/TV
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 10 of 48
5 4 3 2 1
5 4 3 2 1
U23G
AT35 U23F
+1.05VS VCC_1
AT34 VCC_2 VCC_AXG_NCTF_1 T17 +VGFX_CORE
AH28 VCC_3 VCC_AXG_NCTF_2 T18 +1.05VS AB33 VCC_NCTF_1
AC32 VCC_5 VCC_AXG_NCTF_3 T19 AB36 VCC_NCTF_2
AC31 VCC_4 VCC_AXG_NCTF_4 T21 AB37 VCC_NCTF_3
AK32 VCC_6 VCC_AXG_NCTF_5 T22
+1.05VS VCC: 1300mA AC33 VCC_NCTF_4 VSS_NCTF_1 T27
AJ31 T23 AC35 T37
AJ28
VCC_7 VCC_AXG_NCTF_6
T25 (220UF*1, 22UF*1, 0.22UF*1, 0.1UF*1) AC36
VCC_NCTF_5 VSS_NCTF_2
U24
VCC_8 VCC_AXG_NCTF_7 +1.05VS +1.05VS VCC_NCTF_6 VSS_NCTF_3
AH32 VCC_9 VCC_AXG_NCTF_8 U15 AD35 VCC_NCTF_7 VSS_NCTF_4 U28
VCC CORE
AH31 VCC_10 VCC_AXG_NCTF_9 U16 1 AD36 VCC_NCTF_8 VSS_NCTF_5 V31
AH29 VCC_11 VCC_AXG_NCTF_10 U17 1 1 1 1 AF33 VCC_NCTF_9 VSS_NCTF_6 V35
D AF32 U19 C501 + C264 C289 C269 C255 C524 C628 AF36 AA19 D
VCC_12 VCC_AXG_NCTF_11 VCC_NCTF_10 VSS_NCTF_7
VCC_AXG_NCTF_12 U20 AH33 VCC_NCTF_11 VSS_NCTF_8 AB17
VSS NCTF
U21 220U_D2_2VMR15 0.22U_0603_16V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z AH35 AB35
VCC_AXG_NCTF_13 @ 2 2 2 2 2
0.1U_0402_16V4Z VCC_NCTF_12 VSS_NCTF_9
VCC_AXG_NCTF_14 U23 AH36 VCC_NCTF_13 VSS_NCTF_10 AD19
R30 U26 10U_0805_10V4Z 0.22U_0603_16V7K AH37 AD37
VCC_13 VCC_AXG_NCTF_15 VCC_NCTF_14 VSS_NCTF_11
VCC_AXG_NCTF_16 V16 AJ33 VCC_NCTF_15 VSS_NCTF_12 AF17
VCC_AXG_NCTF_17 V17 AJ35 VCC_NCTF_16 VSS_NCTF_13 AF35
VCC_AXG_NCTF_18 V19 AK33 VCC_NCTF_17 VSS_NCTF_14 AK17
VCC_AXG_NCTF_19 V20 place on the shape edge AK35 VCC_NCTF_18 VSS_NCTF_15 AM17
VCC_AXG_NCTF_20 V21
+1.8V VCC_SM: 2400mA AK36 VCC_NCTF_19 VSS_NCTF_16 AM24
V23 AK37 AP26
VCC_AXG_NCTF_21
V24 (330UF*1, 22UF*2, 0.1UF*1) AD33
VCC_NCTF_20 VSS_NCTF_17
AP28
VCC_AXG_NCTF_22 VCC_NCTF_21 VSS_NCTF_18
Y15 AJ36 AR15
POWER VCC_AXG_NCTF_23 VCC_NCTF_22 VSS_NCTF_19
VCC NCTF
VCC_AXG_NCTF_24 Y16 1 AM35 VCC_NCTF_23 VSS_NCTF_20 AR19
Y17 C361 1 1 1 AL33 AR28
VCC_AXG_NCTF_25 + C356 C355 C346 VCC_NCTF_24 VSS_NCTF_21
+1.8V AU32 VCC_SM_1 VCC_AXG_NCTF_26 Y19 AL35 VCC_NCTF_25
AU33 VCC_SM_2 VCC_AXG_NCTF_27 Y20 AA33 VCC_NCTF_26
AU35 Y21 330U_D2E_2.5VM 10U_0805_10V4Z AA35
VCC_SM_3 VCC_AXG_NCTF_28 2 2 2 2 VCC_NCTF_27
AV33 VCC_SM_4 VCC_AXG_NCTF_29 Y23 AA36 VCC_NCTF_28
AW33 Y24 10U_0805_10V4Z 0.1U_0402_16V4Z AP35
VCC_SM_5 VCC_AXG_NCTF_30 VCC_NCTF_29
AW35 VCC_SM_6 VCC_AXG_NCTF_31 Y26 AP36 VCC_NCTF_30
AY35 VCC_SM_7 VCC_AXG_NCTF_32 Y28 AR35 VCC_NCTF_31
BA32 VCC_SM_8 VCC_AXG_NCTF_33 Y29 AR36 VCC_NCTF_32
BA33 VCC_SM_9 VCC_AXG_NCTF_34 AA16 Y32 VCC_NCTF_33
BA35 AA17 VCC_AXG: 7700mA Y33
BB33
BC32
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
AB16
AB19
+VGFX_CORE
(330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)
Y35
Y36
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
POWER
BC33 VCC_SM_13 VCC_AXG_NCTF_38 AC16 +1.05VS 1 2 Y37 VCC_NCTF_37 VSS_SCB1 A3
BC35 AC17 R518 GM@ 0_1206_5% 1 1 T30 B2
VCC_SM_14 VCC_AXG_NCTF_39 VCC_NCTF_38 VSS_SCB2
VCC SM
VSS SCB
C BD32 AC19 1 2 C218 C278 C302 1 C276 1 C293 T34 C1 C
VCC_SM_15 VCC_AXG_NCTF_40 R519 GM@ 0_1206_5% + + VCC_NCTF_39 VSS_SCB3
BD35 VCC_SM_16 VCC_AXG_NCTF_41 AD15 T35 VCC_NCTF_40 VSS_SCB4 BL1
BE32 VCC_SM_17 VCC_AXG_NCTF_42 AD16 1 2 U29 VCC_NCTF_41 VSS_SCB5 BL51
BE33 AD17 R520 GM@ 0_1206_5% 330U_D2E_2.5VM 10U_0805_10V4Z 1U_0402_6.3V4Z U31 A51
VCC_SM_18 VCC_AXG_NCTF_43 2 2 GM@ 2 2 VCC_NCTF_42 VSS_SCB6
VCC GFX NCTF
VCC AXM
BJ34 AL16 GM@ AK29
VCC_SM_30 VCC_AXG_NCTF_55 0.47U_0603_16V4Z 0.1U_0402_16V4Z VCC_AXM_3
BK32 VCC_SM_31 VCC_AXG_NCTF_56 AL17 VCC_AXM_4 AK24
BK33 AL19 GM@ GM@ AK23
VCC_SM_32 VCC_AXG_NCTF_57 VCC_AXM_5
BK34 VCC_SM_33 VCC_AXG_NCTF_58 AL20 +1.05VS AL24 VCC_AXM_NCTF_1 VCC_AXM_6 AJ26
BK35 VCC_SM_34 VCC_AXG_NCTF_59 AL21 AL26 VCC_AXM_NCTF_2 VCC_AXM_7 AJ23
BL33 VCC_SM_35 VCC_AXG_NCTF_60 AL23 AL28 VCC_AXM_NCTF_3
AU30 VCC_SM_36 VCC_AXG_NCTF_61 AM15
+1.05VS VCC_AXM: 540mA AM26 VCC_AXM_NCTF_4
+1.25VS_HPLL +1.25VS_DPLLA
CRT
L25 1 2 L22 1 2 U7 220U_D2_2VMR15 4.7U_0805_10V4Z 0.47U_0603_16V4Z
MBK1608121YZF_0603 MBK1608121YZF_0603 VTT_6 2
1 1 1 +3VS_DACBG A30 VCCA_DAC_BG VTT_7 U5
VCCA_MPLL: 150mA C313 VCCA_DPLLB: 80mA C230 C233 U3 4.7U_0805_10V4Z 2.2U_0805_10V6K
R315 VTT_8
(10UF*1, 0.1UF*1) (470UF*1, 0.1UF*1) B32 VSSA_DAC_BG VTT_9 U2
0.5_0603_1% 22U_0805_6.3V6M U1 VCC_AXD: 200mA
2 2 2 VTT_10 +1.25VS_AXD
VTT_11 T13 (22UF*1, 1UF*1)
VTT
0.1U_0402_16V4Z 0.1U_0402_16V4Z +1.25VS_DPLLA B49 T11
GM@ VCCA_DPLLA VTT_12
1 VTT_13 T10 +1.25VS
+1.25VS_DPLLB H49 T9 R421 0_0603_5%
C323 VCCA_DPLLB VTT_14
VTT_15 T7 1
PLL
10U_0805_10V4Z +1.25VS_HPLL AL2 T6 C324 C335
2 VCCA_HPLL VTT_16
+1.8V_TX_LVDS VTT_17 T5
1 +1.25VS_MPLL AM2 T3 22U_0805_6.3V6M
C497 VCCA_MPLL VTT_18 @ 2
VTT_19 T2
GM@ VCCA_LVDS: 10mA R3 1U_0402_6.3V4Z
VTT_20
A LVDS
1000P_0402_50V7K A41 R2
2 (0.1UF*1) VCCA_LVDS VTT_21
+3VS VTT_22 R1
+1.25VS_AXF
VCC_AXF: 350mA
1 B41 VSSA_LVDS (10UF*1, 1UF*1)
C243
VCC_AXD_1 AT23 +1.25VS
0.1U_0402_16V4Z VCCA_PEG_BG: 5mA AU28 R400 0_0603_5%
2 VCC_AXD_2
(0.1UF*1) K50 VCCA_PEG_BG VCC_AXD_3 AU24 1
AXD
AT29 C490 C489
VCC_AXD_4
K49 VSSA_PEG_BG VCC_AXD_5 AT25
A PEG
+1.25VS L41 1 2 +1.25VS_A_PEGPLL AT30 10U_0805_10V4Z
MBK1608121YZF_0603 VCC_AXD_6 2
1
2 1 C260 U51 AR29 1U_0402_6.3V4Z
C513 R254 1_0603_5% VCCA_PEG_PLL VCC_AXD_NCTF
C VCCA_PEG_PLL: 100mA C
10U_0805_10V4Z 0.1U_0402_16V4Z +1.25VS VCC_DMI: 100mA (0.1UF*1)
2 (0.1UF*1) AW18 B23
VCCA_SM_1 VCC_AXF_1 1
+1.25VS_A_SM AV19 B21 C314
VCCA_SM_2
POWER VCC_AXF_2
AXF
VCCA_SM AU19 VCCA_SM_3 VCC_AXF_3 A21
+1.25VS AU18 0.1U_0402_16V4Z
+3VS_SYNC (22UF*21, 4.7UF*1, 1UF*1) VCCA_SM_4 2 +1.8V_SM_CK
1 R314 0_0603_5% 1 AU17 VCCA_SM_5 VCC_DMI AJ50 VCC_SM_CK: 200mA (22UF*1, 0.1UF*1)
VCC_SYNC: 10mA (0.1UF*1) C336 C320 C321
+
A SM
+3VS C340 AT22 1 2 +1.8V
R239 0_0402_5% 1 4.7U_0805_10V4Z VCCA_SM_7 L45
AT21 VCCA_SM_8 VCC_SM_CK_1 BK24
2
SM CK
GM@ C234 220U_D2_2VMR15 AT19 BK23 1 1 MBK1608121YZF_0603
R219 2 10U_0805_10V4Z 1U_0402_6.3V4Z VCCA_SM_9 VCC_SM_CK_2 C532 C530
AT18 VCCA_SM_10 VCC_SM_CK_3 BJ24
0.1U_0402_16V4Z 0_0402_5% AT17 BJ23 1 2
GM@ 2 +1.25VS_A_SM_CK VCCA_SM_11 VCC_SM_CK_4 10U_0805_10V4Z R430 C359
PM@ VCCA_SM_CK AR17 VCCA_SM_NCTF_1 2 2
AR16 +1.8V_TX_LVDS: 100mA 1_0603_5% 10U_0805_10V4Z
(22UF*1, 1UF*2, 0.1UF*1) VCCA_SM_NCTF_2 +1.8V_TX_LVDS 0.1U_0402_16V4Z
+1.25VS (220UF*1, 1000PF*1)
R339 0_0603_5% 1 1 A43
VCC_TX_LVDS
A CK
C364 C358 C360 C348 BC29 L39 2 1 +1.8V
VCCA_SM_CK_1 KC FBM-L11-201209-221LMAT_0805
BB29 VCCA_SM_CK_2 VCC_HV: 100mA
10U_0805_10V4Z 1U_0402_6.3V4Z C40 +3VS 1 GM@
2 2 VCC_HV_1
VCCA_CRT_DAC: 80mA (0.1UF*1, 0.022UF*1) +3VS_CRTDAC C25 VCCA_TVA_DAC_1 VCC_HV_2 B40 C499 R405
HV
1U_0402_6.3V4Z 0.1U_0402_16V4Z B25 0_0402_5%
L14 1 VCCA_TVA_DAC_2 PM@
+3VS 2 C27 VCCA_TVB_DAC_1 2
1 MBK1608121YZF_0603 B27 VCCA_TVB_DAC_2 VCC_PEG_1 AD51 GM@
TV
GM@ 1 +3VS_A_TVDAC B28 W50 1000P_0402_50V7K
VCCA_TVC_DAC_1 VCC_PEG_2
PEG
C635 + C213 C205 R198 A28 W51
VCCA_TVC_DAC_2 VCC_PEG_3 +1.05VS_PEG
0_0402_5% VCCD_TVDAC: 60mA (0.1UF*1, 0.022UF*1) VCC_PEG_4 V49
220U_D2_2VMR15 0.1U_0402_16V4Z PM@ +1.5VS_TV +1.5VS_CRT V50 +1.05VS_PEG: 1200mA (220UF*1, 10UF*1)
2 2 VCC_PEG_5
D TV/CRT
GM@ GM@ 0.022U_0402_16V7K 1 M32 L23 2 1 +1.05VS
B GM@ C244 C209 VCCD_CRT KC FBM-L11-201209-221LMAT_0805 B
L29 VCCD_TVDAC 1
+1.5VS_QDAC VCC_RXR_DMI_1 AH50 1
DMI
0.1U_0402_16V4Z N28 AH51 C284 + C275
2 0.022U_0402_16V7K VCCD_QDAC VCC_RXR_DMI_2
+3VS_DACBG 220U_D2_2VMR15
VCCA_DAC_BG: 5mA (0.1UF*1, 0.022UF*1) AN2 VCCD_HPLL 2 2
A7 VTTLF_CAP1
VTTLF1
VTTLF
+3VS L15 1 2 VCCA_HPLL: 250mA (0.1UF*1) U48 F2 VTTLF_CAP2 10U_0805_10V4Z
MBK1608121YZF_0603 VCCD_PEG_PLL VTTLF2
+1.25VS VTTLF3 AH1 VTTLF_CAP3
GM@ 1 1 1 J41 VCCD_LVDS_1 +1.05VS_PEG
LVDS
C202 C199 C661 C662 R190 C315 +1.25VS_A_PEGPLL H42 +1.05VS_DMI: 100mA (220UF*1, 10UF*1)
0_0402_5% VCCD_LVDS_2
1
0.1U_0402_16V4Z 10U_0805_10V4Z PM@ 0.1U_0402_16V4Z C265
GM@ 2 2 GM@ GM@ 2
VCCA_PEG_PLL: 100mA
GM@ 0.1U_0402_16V4Z CRESTLINE_1p0 C517 C505 C496 1
0.022U_0402_16V7K 4.7U_0805_10V4Z (0.1UF*1) 2 C516
PM@ 0.47U_0603_16V4Z 0.47U_0603_16V4Z
+1.8V_LVDS
+3VS_A_TVDAC +1.8V R220 0_0402_5% 0.47U_0603_16V4Z 2
VCCA_TV_DAC: 40mA (0.1UF*1, 0.022UF*1 for each DAC) GM@ 1 1 10U_0805_10V4Z
+3VS L38 1 2 C231 R217
MBK1608121YZF_0603 C215 0_0402_5%
GM@ 10U_0805_10V4Z +3VS
1 1 1 1 2 2 PM@
C488 C493 C486 C491 C500 C494 C487 R393 GM@ 0.1U_0402_16V4Z
D23 R402
GM@ GM@ GM@ 0_0402_5% GM@ 1
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z PM@ +1.05VS 2 1 1 2 +3VS C250
2
10U_0805_10V4Z 2 2 2
GM@ 0.022U_0402_16V7K 0.022U_0402_16V7K 0.022U_0402_16V7K VCCD_LVDS: 150mA RB751V_SOD323 10_0603_5% 0.1U_0402_16V4Z
GM@ GM@ GM@ 2
(10UF*1, 0.1UF*1)
A +1.5VS_TV +1.5VS_CRT +1.5VS_QDAC A
VCCD_QDAC: 5mA
L13 1 2 R244 L17 1 2
(0.1UF*1, 0.022UF*1)
+1.5VS +1.5VS
MBK1608121YZF_0603 MBK1608121YZF_0603 1
1 0_0402_5% GM@ C210 C251
GM@ R249 R202
C636 + 0_0402_5% 0.1U_0402_16V4Z 0_0402_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
GM@ 2 0.022U_0402_16V7K
PM@ PM@ Issued Date 2006/12/25 Deciphered Date 2007/12/25 Title
220U_D2_2VMR15 GM@
GM@ 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Crestline GMCH (6/7)-VCC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 12 of 48
5 4 3 2 1
5 4 3 2 1
U23I
U23J
A13 VSS_1 VSS_100 AW24 C46 VSS_199 VSS_287 W11
A15 VSS_2 VSS_101 AW29 C50 VSS_200 VSS_288 W39
A17 VSS_3 VSS_102 AW32 C7 VSS_201 VSS_289 W43
A24 VSS_4 VSS_103 AW5 D13 VSS_202 VSS_290 W47
AA21 VSS_5 VSS_104 AW7 D24 VSS_203 VSS_291 W5
AA24 VSS_6 VSS_105 AY10 D3 VSS_204 VSS_292 W7
AA29 VSS_7 VSS_106 AY24 D32 VSS_205 VSS_293 Y13
AB20 VSS_8 VSS_107 AY37 D39 VSS_206 VSS_294 Y2
AB23 VSS_9 VSS_108 AY42 D45 VSS_207 VSS_295 Y41
AB26 VSS_10 VSS_109 AY43 D49 VSS_208 VSS_296 Y45
D AB28 VSS_11 VSS_110 AY45 E10 VSS_209 VSS_297 Y49 D
AB31 VSS_12 VSS_111 AY47 E16 VSS_210 VSS_298 Y5
AC10 VSS_13 VSS_112 AY50 E24 VSS_211 VSS_299 Y50
AC13 VSS_14 VSS_113 B10 E28 VSS_212 VSS_300 Y11
AC3 VSS_15 VSS_114 B20 E32 VSS_213 VSS_301 P29
AC39 VSS_16 VSS_115 B24 E47 VSS_214 VSS_302 T29
AC43 VSS_17 VSS_116 B29 F19 VSS_215 VSS_303 T31
AC47 VSS_18 VSS_117 B30 F36 VSS_216 VSS_304 T33
AD1 VSS_19 VSS_118 B35 F4 VSS_217 VSS_305 R28
AD21 VSS_20 VSS_119 B38 F40 VSS_218
AD26 VSS_21 VSS_120 B43 F50 VSS_219
AD29 VSS_22 VSS_121 B46 G1 VSS_220
AD3 VSS_23 VSS_122 B5 G13 VSS_221 VSS_306 AA32
AD41 VSS_24 VSS_123 B8 G16 VSS_222 VSS_307 AB32
AD45 VSS_25 VSS_124 BA1 G19 VSS_223 VSS_308 AD32
AD49 VSS_26 VSS_125 BA17 G24 VSS_224 VSS_309 AF28
AD5 VSS_27 VSS_126 BA18 G28 VSS_225 VSS_310 AF29
AD50 VSS_28 VSS_127 BA2 G29 VSS_226 VSS_311 AT27
AD8 VSS_29 VSS_128 BA24 G33 VSS_227 VSS_312 AV25
AE10 VSS_30 VSS_129 BB12 G42 VSS_228 VSS_313 H50
AE14 VSS_31 VSS_130 BB25 G45 VSS_229
AE6 VSS_32 VSS_131 BB40 G48 VSS_230
AF20 BB44 G8
AF23
AF24
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
BB49
BB8
H24
H28
VSS_231
VSS_232
VSS_233
AF31 VSS_36 VSS_135 BC16 H4 VSS_234
AG2 VSS_37 VSS_136 BC24 H45 VSS_235
AG38 VSS_38 VSS_137 BC25 J11 VSS_236
AG43 VSS_39 VSS_138 BC36 J16 VSS_237
C AG47 BC40 J2 C
VSS_40 VSS_139 VSS_238
AG50 VSS_41 VSS_140 BC51 J24 VSS_239
AH3 VSS_42 VSS_141 BD13 J28 VSS_240
AH40 BD2 J33
AH41
AH7
VSS_43
VSS_44
VSS_45
VSS_142
VSS_143
VSS_144
BD28
BD45
J35
J39
VSS_241
VSS_242
VSS_243
VSS
AH9 VSS_46 VSS_145 BD48
AJ11 VSS_47 VSS_146 BD5 K12 VSS_245
AJ13 VSS_48 VSS_147 BE1 K47 VSS_246
AJ21 VSS_49 VSS_148 BE19 K8 VSS_247
AJ24 VSS_50 VSS_149 BE23 L1 VSS_248
AJ29 VSS_51 VSS_150 BE30 L17 VSS_249
AJ32 VSS_52 VSS_151 BE42 L20 VSS_250
AJ43 VSS_53 VSS_152 BE51 L24 VSS_251
AJ45 VSS_54 VSS_153 BE8 L28 VSS_252
AJ49 VSS_55 VSS_154 BF12 L3 VSS_253
AK20 VSS_56 VSS_155 BF16 L33 VSS_254
AK21 VSS_57 VSS_156 BF36 L49 VSS_255
AK26 VSS_58 VSS_157 BG19 M28 VSS_256
AK28 VSS_59 VSS_158 BG2 M42 VSS_257
AK31 VSS_60 VSS_159 BG24 M46 VSS_258
AK51 VSS_61 VSS_160 BG29 M49 VSS_259
AL1 VSS_62 VSS_161 BG39 M5 VSS_260
AM11 VSS_63 VSS_162 BG48 M50 VSS_261
AM13 VSS_64 VSS_163 BG5 M9 VSS_262
AM3 VSS_65 VSS_164 BG51 N11 VSS_263
AM4 VSS_66 VSS_165 BH17 N14 VSS_264
AM41 VSS_67 VSS_166 BH30 N17 VSS_265
AM45 VSS_68 VSS_167 BH44 N29 VSS_266
B B
AN1 VSS_69 VSS_168 BH46 N32 VSS_267
AN38 VSS_70 VSS_169 BH8 N36 VSS_268
AN39 VSS_71 VSS_170 BJ11 N39 VSS_269
AN43 VSS_72 VSS_171 BJ13 N44 VSS_270
AN5 VSS_73 VSS_172 BJ38 N49 VSS_271
AN7 VSS_74 VSS_173 BJ4 N7 VSS_272
AP4 VSS_75 VSS_174 BJ42 P19 VSS_273
AP48 VSS_76 VSS_175 BJ46 P2 VSS_274
AP50 VSS_77 VSS_176 BK15 P23 VSS_275
AR11 VSS_78 VSS_177 BK17 P3 VSS_276
AR2 VSS_79 VSS_178 BK25 P50 VSS_277
AR39 VSS_80 VSS_179 BK29 R49 VSS_278
AR44 VSS_81 VSS_180 BK36 T39 VSS_279
AR47 VSS_82 VSS_181 BK40 T43 VSS_280
AR7 VSS_83 VSS_182 BK44 T47 VSS_281
AT10 VSS_84 VSS_183 BK6 U41 VSS_282
AT14 VSS_85 VSS_184 BK8 U45 VSS_283
AT41 VSS_86 VSS_185 BL11 U50 VSS_284
AT49 VSS_87 VSS_186 BL13 V2 VSS_285
AU1 VSS_88 VSS_187 BL19 V3 VSS_286
AU23 VSS_89 VSS_188 BL22
AU29 VSS_90 VSS_189 BL37
AU3 BL47 CRESTLINE_1p0
VSS_91 VSS_190
AU36 VSS_92 VSS_191 C12
AU49 VSS_93 VSS_192 C16 PM@
AU51 VSS_94 VSS_193 C19
AV39 VSS_95 VSS_194 C28
AV48 VSS_96 VSS_195 C29
A AW1 VSS_97 VSS_196 C33 A
AW12 VSS_98 VSS_197 C36
AW16 VSS_99 VSS_198 C41
CRESTLINE_1p0
PM@
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/12/25 Deciphered Date 2007/12/25 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Crestline GMCH (7/7)-GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 13 of 48
5 4 3 2 1
5 4 3 2 1
+1.8V +1.8V
JP28 +1.8V
+DIMM_VREF 1 VREF VSS 2
3 4 DDRA_SDQ4 +DIMM_VREF
VSS DQ4
1
DDRA_SDQ0 DDRA_SDQ5 +5VALW
DDRA_SDQ1
5 DQ0 DQ5 6 20mils R345
7 DQ1 VSS 8
9 10 DDRA_SDM0 +5VALW
DDRA_SDQS0# VSS DM0 1K_0402_1%
9 DDRA_SDQS0# 11 DQS0# VSS 12 1 20mils
8
DDRA_SDQS0 13 14 DDRA_SDQ6 C410 U17A To SODIMM and GMCH
2
9 DDRA_SDQS0 DQS0 DQ6 DDRA_SDQ7 +DIMM_VREF1
15 VSS DQ7 16 3 +
8
DDRA_SDQ2 0.1U_0402_16V4Z P U17B
17 DQ2 VSS 18 O 1 +DIMM_VREF
1
DDRA_SDQ3 DDRA_SDQ12 2
19 DQ3 DQ12 20 1 2 - G 5 +
D DDRA_SDQ13 R344 C376 P D
21 VSS DQ13 22 O 7
DDRA_SDQ8 23 24 220P_0402_50V7K TLV2462CDR_SO8 6 - G
4
DDRA_SDQ9 DQ8 VSS DDRA_SDM1 1K_0402_1%
25 DQ9 DM1 26 @
2 TLV2462CDR_SO8
27 28
4
DDRA_SDQS1# VSS VSS
9 DDRA_SDQS1# 29 DQS1# CK0 30 DDRA_CLK0 8 @
DDRA_SDQS1 31 32
9 DDRA_SDQS1 DQS1 CK0# DDRA_CLK0# 8
33 VSS VSS 34
DDRA_SDQ10 35 36 DDRA_SDQ14 1 2
DDRA_SDQ11 DQ10 DQ14 DDRA_SDQ15 R343 0_0402_5%
37 DQ11 DQ15 38
39 40 DDRA_SMA[0..14]
VSS VSS 8,9 DDRA_SMA[0..14]
DDRA_SDQ[0..63]
9 DDRA_SDQ[0..63]
41 VSS VSS 42
DDRA_SDQ16 43 44 DDRA_SDQ20 DDRA_SDM[0..7]
DQ16 DQ20 9 DDRA_SDM[0..7] +1.8V
DDRA_SDQ17 45 46 DDRA_SDQ21
DQ17 DQ21
47 VSS VSS 48
DDRA_SDQS2# 49 50 R346 1 2 0_0402_5%
9 DDRA_SDQS2# DQS2# NC PM_EXTTS#0 8
DDRA_SDQS2 51 52 DDRA_SDM2
9 DDRA_SDQS2 DQS2 DM2
53 VSS VSS 54 1 1 1 1 1 1 1
DDRA_SDQ18 55 56 DDRA_SDQ22 C611 C605 C608 C606 C389 C400 C388
DDRA_SDQ19 DQ18 DQ22 DDRA_SDQ23
57 DQ19 DQ23 58
59 60 2.2U_0805_10V6K 2.2U_0805_10V6K 1U_0402_6.3V4Z 1U_0402_6.3V4Z
DDRA_SDQ24 VSS VSS DDRA_SDQ28 2 2 2 2 2 2 2
61 DQ24 DQ28 62
DDRA_SDQ25 63 64 DDRA_SDQ29 2.2U_0805_10V6K 2.2U_0805_10V6K 1U_0402_6.3V4Z
DQ25 DQ29
65 VSS VSS 66
DDRA_SDM3 67 68 DDRA_SDQS3#
DM3 DQS3# DDRA_SDQS3 DDRA_SDQS3# 9
69 NC DQS3 70 DDRA_SDQS3 9
71 VSS VSS 72
DDRA_SDQ26 73 74 DDRA_SDQ30 +1.8V
DDRA_SDQ27 DQ26 DQ30 DDRA_SDQ31 +0.9VS
75 DQ27 DQ31 76
77 VSS VSS 78
DDRA_CKE0 79 80 DDRA_CKE1 DDRA_CKE0 1 4
C 8 DDRA_CKE0 CKE0 NC/CKE1 DDRA_CKE1 8 C
81 82 DDRA_SBS2# 2 3 1 1 1 1
VDD VDD RP19 56_0404_4P2R_5% C411 C414 C417 C413
83 NC NC/A15 84
DDRA_SBS2# 85 86 DDRA_SMA14
9 DDRA_SBS2# BA2 NC/A14
87 88 DDRA_SMA12 1 4 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRA_SMA12 VDD VDD DDRA_SMA11 DDRA_SMA9 2 2 2 2
89 A12 A11 90 2 3
DDRA_SMA9 91 92 DDRA_SMA7 RP20 56_0404_4P2R_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRA_SMA8 A9 A7 DDRA_SMA6
93 A8 A6 94
95 96 DDRA_SMA8 1 4
DDRA_SMA5 VDD VDD DDRA_SMA4 DDRA_SMA5
97 A5 A4 98 2 3
DDRA_SMA3 99 100 DDRA_SMA2 RP21 56_0404_4P2R_5%
DDRA_SMA1 A3 A2 DDRA_SMA0
101 A1 A0 102
103 104 DDRA_SMA3 1 4
DDRA_SMA10 VDD VDD DDRA_SBS1# DDRA_SMA1 +0.9VS
105 A10/AP BA1 106 DDRA_SBS1# 9 2 3
DDRA_SBS0# 107 108 DDRA_SRAS# RP22 56_0404_4P2R_5%
9 DDRA_SBS0# BA0 RAS# DDRA_SRAS# 9
DDRA_SWE# 109 110 DDRA_SCS0#
9 DDRA_SWE# WE# S0# DDRA_SCS0# 8
111 112 DDRA_SMA10 1 4
DDRA_SCAS# VDD VDD DDRA_ODT0 DDRA_SBS0#
9 DDRA_SCAS# 113 CAS# ODT0 114 DDRA_ODT0 8 2 3 1 1 1 1 1
DDRA_SCS1# 115 116 DDRA_SMA13 RP23 56_0404_4P2R_5% C427 C404 C407 C425 C403
8 DDRA_SCS1# NC/S1# NC/A13
117 VDD VDD 118
DDRA_ODT1 119 120 DDRA_SWE# 1 4 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
8 DDRA_ODT1 NC/ODT1 NC 2 2 2 2 2
121 122 DDRA_SCAS# 2 3
DDRA_SDQ32 VSS VSS DDRA_SDQ36 RP24 56_0404_4P2R_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z
123 DQ32 DQ36 124
DDRA_SDQ33 125 126 DDRA_SDQ37
DQ33 DQ37 DDRA_SCS1#
127 VSS VSS 128 1 4
DDRA_SDQS4# 129 130 DDRA_SDM4 DDRA_ODT1 2 3
9 DDRA_SDQS4# DDRA_SDQS4 DQS4# DM4 RP25 56_0404_4P2R_5% +0.9VS
9 DDRA_SDQS4 131 DQS4 VSS 132
133 134 DDRA_SDQ38
DDRA_SDQ34 VSS DQ38 DDRA_SDQ39
135 DQ34 DQ39 136
DDRA_SDQ35 137 138
DQ35 VSS DDRA_SDQ44 DDRA_SMA11
139 VSS DQ44 140 1 4 1 1 1 1 1
DDRA_SDQ40 141 142 DDRA_SDQ45 DDRA_SMA14 2 3 C422 C405 C409 C408 C406
DDRA_SDQ41 DQ40 DQ45 RP26 56_0404_4P2R_5%
143 DQ41 VSS 144
B DDRA_SDQS5# 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z B
145 VSS DQS5# 146 DDRA_SDQS5# 9
DDRA_SDM5 DDRA_SDQS5 DDRA_SMA6 2 2 2 2 2
147 DM5 DQS5 148 DDRA_SDQS5 9 1 4
149 150 DDRA_SMA7 2 3 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRA_SDQ42 VSS VSS DDRA_SDQ46 RP27 56_0404_4P2R_5%
151 DQ42 DQ46 152
DDRA_SDQ43 153 154 DDRA_SDQ47
DQ43 DQ47 DDRA_SMA2
155 VSS VSS 156 1 4
DDRA_SDQ48 157 158 DDRA_SDQ52 DDRA_SMA4 2 3 +0.9VS
DDRA_SDQ49 DQ48 DQ52 DDRA_SDQ53 RP28 56_0404_4P2R_5%
159 DQ49 DQ53 160
161 VSS VSS 162
163 164 DDRA_SBS1# 1 4
NC,TEST CK1 DDRA_CLK1 8
165 166 DDRA_SMA0 2 3 1 1 1
VSS CK1# DDRA_CLK1# 8
DDRA_SDQS6# 167 168 RP29 56_0404_4P2R_5% C424 C423 C426
9 DDRA_SDQS6# DDRA_SDQS6 DQS6# VSS DDRA_SDM6
9 DDRA_SDQS6 169 DQS6 DM6 170
171 172 DDRA_SCS0# 1 4 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRA_SDQ50 VSS VSS DDRA_SDQ54 DDRA_SRAS# 2 2 2
173 DQ50 DQ54 174 2 3
DDRA_SDQ51 175 176 DDRA_SDQ55 RP30 56_0404_4P2R_5% 0.1U_0402_16V4Z
DQ51 DQ55
177 VSS VSS 178
DDRA_SDQ56 179 180 DDRA_SDQ60 DDRA_SMA13 1 4
DDRA_SDQ57 DQ56 DQ60 DDRA_SDQ61 DDRA_ODT0
181 DQ57 DQ61 182 2 3
183 184 RP31 56_0404_4P2R_5%
DDRA_SDM7 VSS VSS DDRA_SDQS7#
185 DM7 DQS7# 186 DDRA_SDQS7# 9
187 188 DDRA_SDQS7 DDRA_CKE1 1 2
DDRA_SDQ58 VSS DQS7 DDRA_SDQS7 9 R347 56_0402_5%
189 DQ58 VSS 190
DDRA_SDQ59 191 192 DDRA_SDQ62
DQ59 DQ62 DDRA_SDQ63
193 VSS DQ63 194
D_CK_SDATA 195 196
15,16 D_CK_SDATA SDA VSS
D_CK_SCLK 197 198 R353 1 2 10K_0402_5%
15,16 D_CK_SCLK SCL SAO
+3VS 199 200 R354 1 2 10K_0402_5%
VDDSPD SA1
203 GND GND 204
FOX_AS0A426-M2RN-7F
CONN@
A +3VS A
1 1
DIMM0 REV H:5.2mm (BOT)
C607 C402
0.1U_0402_16V4Z
2
2.2U_0805_10V6K 2 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/12/25 Deciphered Date 2007/12/25 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRII-SODIMM0
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 14 of 48
5 4 3 2 1
A B C D E
+1.8V +1.8V
JP29
1 2 +DIMM_VREF +1.8V
+DIMM_VREF VREF VSS
3 4 DDRB_SDQ4
DDRB_SDQ0 VSS DQ4 DDRB_SDQ5
5 DQ0 DQ5 6
DDRB_SDQ1 7 8 1 1
DQ1 VSS DDRB_SDM0
9 VSS DM0 10 1 1 1 1 1 1
DDRB_SDQS0# 11 12 C373 C386 C519 + C556+ C420 C429 C385 C374
9 DDRB_SDQS0# DDRB_SDQS0 DQS0# VSS DDRB_SDQ6
9 DDRB_SDQS0 13 DQS0 DQ6 14
15 16 DDRB_SDQ7 2.2U_0805_10V6K 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRB_SDQ2 VSS DQ7 2 2
0.1U_0402_16V4Z 2 2 2 2
0.1U_0402_16V4Z 2 2
0.1U_0402_16V4Z
17 DQ2 VSS 18
DDRB_SDQ3 19 20 DDRB_SDQ12
DQ3 DQ12 DDRB_SDQ13 330U_D2E_2.5VM_R9 150U_D2_6.3VM
21 VSS DQ13 22
DDRB_SDQ8 23 24 @
1 DDRB_SDQ9 DQ8 VSS DDRB_SDM1 1
25 DQ9 DM1 26
27 VSS VSS 28
DDRB_SDQS1# 29 30
9 DDRB_SDQS1# DQS1# CK0 DDRB_CLK0 8
DDRB_SDQS1 31 32
9 DDRB_SDQS1
33
DQS1 CK0#
34
DDRB_CLK0# 8 For EMI
DDRB_SDQ10 VSS VSS DDRB_SDQ14
35 DQ10 DQ14 36
DDRB_SDQ11 37 38 DDRB_SDQ15
DQ11 DQ15 +1.8V +1.8V +1.8V +1.8V
39 VSS VSS 40
41 VSS VSS 42
DDRB_SDQ16 43 44 DDRB_SDQ20 DDRB_SMA[0..14] 1 1 1 1 1 1 1 1
DQ16 DQ20 8,9 DDRB_SMA[0..14]
DDRB_SDQ17 45 46 DDRB_SDQ21 C615 C616 C617 C618 C619 C620 C622 C621
DQ17 DQ21 0_0402_5% DDRB_SDQ[0..63]
47 VSS VSS 48 9 DDRB_SDQ[0..63]
DDRB_SDQS2# 49 50 R356 1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
9 DDRB_SDQS2# DQS2# NC PM_EXTTS#1 8 DDRB_SDM[0..7] 2 2 2 2 2 2 2 2
DDRB_SDQS2 51 52 DDRB_SDM2 9 DDRB_SDM[0..7] 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
9 DDRB_SDQS2 DQS2 DM2
53 VSS VSS 54
DDRB_SDQ18 55 56 DDRB_SDQ22
DDRB_SDQ19 DQ18 DQ22 DDRB_SDQ23
57 DQ19 DQ23 58
59 VSS VSS 60
DDRB_SDQ24 61 62 DDRB_SDQ28 +1.05VS +5VALW +1.5VS
DDRB_SDQ25 DQ24 DQ28 DDRB_SDQ29
63 DQ25 DQ29 64
65 VSS VSS 66
DDRB_SDM3 67 68 DDRB_SDQS3#
DM3 DQS3# DDRB_SDQS3 DDRB_SDQS3# 9
69 NC DQS3 70 DDRB_SDQS3 9
71 VSS VSS 72
DDRB_SDQ26 73 74 DDRB_SDQ30
DDRB_SDQ27 DQ26 DQ30 DDRB_SDQ31
75 DQ27 DQ31 76
77 VSS VSS 78
DDRB_CKE0 79 80 DDRB_CKE1 +1.8V
8 DDRB_CKE0 CKE0 NC/CKE1 DDRB_CKE1 8 +0.9VS
81 VDD VDD 82
83 NC NC/A15 84
2 DDRB_SBS2# DDRB_SMA14 2
9 DDRB_SBS2# 85 BA2 NC/A14 86
87 88 DDRB_CKE0 1 4 1 1 1 1 1 1 1
DDRB_SMA12 VDD VDD DDRB_SMA11 DDRB_SBS2# C372 C369 C370 C371 C421 C419 C428
89 A12 A11 90 2 3
DDRB_SMA9 91 92 DDRB_SMA7 RP32 56_0404_4P2R_5%
DDRB_SMA8 A9 A7 DDRB_SMA6 2.2U_0805_10V6K 2.2U_0805_10V6K 1U_0402_6.3V4Z 1U_0402_6.3V4Z
93 A8 A6 94
DDRB_SMA12 2 2
2.2U_0805_10V6K 2 2
2.2U_0805_10V6K 2 2
1U_0402_6.3V4Z 2
95 VDD VDD 96 1 4
DDRB_SMA5 97 98 DDRB_SMA4 DDRB_SMA9 2 3
DDRB_SMA3 A5 A4 DDRB_SMA2 RP33 56_0404_4P2R_5%
99 A3 A2 100
DDRB_SMA1 101 102 DDRB_SMA0
A1 A0 DDRB_SMA8
103 VDD VDD 104 1 4
DDRB_SMA10 105 106 DDRB_SBS1# DDRB_SMA5 2 3 +1.8V
A10/AP BA1 DDRB_SBS1# 9
DDRB_SBS0# 107 108 DDRB_SRAS# RP34 56_0404_4P2R_5%
9 DDRB_SBS0# BA0 RAS# DDRB_SRAS# 9
DDRB_SWE# 109 110 DDRB_SCS0#
9 DDRB_SWE# WE# S0# DDRB_SCS0# 8
111 112 DDRB_SMA3 1 4
DDRB_SCAS# VDD VDD DDRB_ODT0 DDRB_SMA1
9 DDRB_SCAS# 113 CAS# ODT0 114 DDRB_ODT0 8 2 3 1 1 1 1
DDRB_SCS1# 115 116 DDRB_SMA13 RP35 56_0404_4P2R_5% C384 C398 C375 C399
8 DDRB_SCS1# NC/S1# NC/A13
117 VDD VDD 118
DDRB_ODT1 119 120 DDRB_SMA10 1 4 0.1U_0402_16V4Z 0.1U_0402_16V4Z
8 DDRB_ODT1 NC/ODT1 NC 2 2 2 2
121 122 DDRB_SBS0# 2 3 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRB_SDQ32 VSS VSS DDRB_SDQ36 RP36 56_0404_4P2R_5%
123 DQ32 DQ36 124
DDRB_SDQ33 125 126 DDRB_SDQ37
DQ33 DQ37 DDRB_SWE#
127 VSS VSS 128 1 4
DDRB_SDQS4# 129 130 DDRB_SDM4 DDRB_SCAS# 2 3
9 DDRB_SDQS4# DDRB_SDQS4 DQS4# DM4 RP37 56_0404_4P2R_5%
9 DDRB_SDQS4 131 DQS4 VSS 132
133 134 DDRB_SDQ38
DDRB_SDQ34 VSS DQ38 DDRB_SDQ39 DDRB_SCS1#
135 DQ34 DQ39 136 1 4
DDRB_SDQ35 137 138 DDRB_ODT1 2 3 +0.9VS
DQ35 VSS DDRB_SDQ44 RP38 56_0404_4P2R_5%
139 VSS DQ44 140
DDRB_SDQ40 141 142 DDRB_SDQ45
DDRB_SDQ41 DQ40 DQ45
143 DQ41 VSS 144
145 146 DDRB_SDQS5# 1 1 1 1 1
DDRB_SDM5 VSS DQS5# DDRB_SDQS5 DDRB_SDQS5# 9 DDRB_SMA11 C382 C391 C392 C378 C393
147 DM5 DQS5 148 DDRB_SDQS5 9 1 4
3 DDRB_SMA14 3
149 VSS VSS 150 2 3
DDRB_SDQ42 151 152 DDRB_SDQ46 RP39 56_0404_4P2R_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRB_SDQ43 DQ42 DQ46 DDRB_SDQ47 2
0.1U_0402_16V4Z 2 2
0.1U_0402_16V4Z 2 2
0.1U_0402_16V4Z
153 DQ43 DQ47 154
155 156 DDRB_SMA6 1 4
DDRB_SDQ48 VSS VSS DDRB_SDQ52 DDRB_SMA7
157 DQ48 DQ52 158 2 3
DDRB_SDQ49 159 160 DDRB_SDQ53 RP40 56_0404_4P2R_5%
DQ49 DQ53
161 VSS VSS 162
163 164 DDRB_SMA2 1 4 +0.9VS
NC,TEST CK1 DDRB_CLK1 8
165 166 DDRB_SMA4 2 3
VSS CK1# DDRB_CLK1# 8
DDRB_SDQS6# 167 168 RP41 56_0404_4P2R_5%
9 DDRB_SDQS6# DDRB_SDQS6 DQS6# VSS DDRB_SDM6
9 DDRB_SDQS6 169 DQS6 DM6 170
171 172 DDRB_SBS1# 1 4 1 1 1 1 1
DDRB_SDQ50 VSS VSS DDRB_SDQ54 DDRB_SMA0 C397 C396 C383 C379 C394
173 DQ50 DQ54 174 2 3
DDRB_SDQ51 175 176 DDRB_SDQ55 RP42 56_0404_4P2R_5%
DQ51 DQ55 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
177 VSS VSS 178
DDRB_SDQ56 DDRB_SDQ60 DDRB_SCS0# 2 2
0.1U_0402_16V4Z 2 2
0.1U_0402_16V4Z 2
179 DQ56 DQ60 180 1 4
DDRB_SDQ57 181 182 DDRB_SDQ61 DDRB_SRAS# 2 3
DQ57 DQ61 RP43 56_0404_4P2R_5%
183 VSS VSS 184
DDRB_SDM7 185 186 DDRB_SDQS7#
DM7 DQS7# DDRB_SDQS7 DDRB_SDQS7# 9 DDRB_SMA13 +0.9VS
187 VSS DQS7 188 DDRB_SDQS7 9 1 4
DDRB_SDQ58 189 190 DDRB_ODT0 2 3
DDRB_SDQ59 DQ58 VSS DDRB_SDQ62 RP44 56_0404_4P2R_5%
191 DQ59 DQ62 192
193 194 DDRB_SDQ63
D_CK_SDATA VSS DQ63 DDRB_CKE1
14,16 D_CK_SDATA 195 SDA VSS 196 1 2 1 1 1
D_CK_SCLK 197 198 1 2 R355 56_0402_5% C381 C395 C380
14,16 D_CK_SCLK SCL SAO
+3VS 199 200 R3481 2 10K_0402_5% +3VS
VDDSPD SA1 R349 10K_0402_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z
201 GND GND 202
2 2
0.1U_0402_16V4Z 2
FOX_AS0A426-MARG-7F
CONN@
4
DIMM1 REV H:9.2mm (BOT) 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRII-SODIMM1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 15 of 48
A B C D E
A B C D E F G H
+CLK_VDDSRC +CLK_VDD
Clock Generator
FSLC FSLB FSLA CPU SRC PCI +1.25VS L10 2 1 +3VS L9 2 1
CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz 1 KC FBM-L11-201209-221LMAT_0805 KC FBM-L11-201209-221LMAT_0805
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
C109 C125 C47 C49 C46 C102 C103 C100 C51 C44 C45 C48 C99 C98 C101
0 1 0 200 100 33.3 10U_0805_10V4Z C79
2 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
0 1 1 166 100 33.3 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
Table : ICS9LPR365
1 1
mount to Enable ITP_CLK
CLK_REQ# Control Free-Run
+CLK_VDD U1
CR#_A(WLAN) PCIEX2 PCIEX0
CR#_B(MCH) PCIEX4 PCIEX1 2 VDDPCI NC 48
9 VDD48
CR#_G(NEW CARD) PCIEX9 16 VDDPLL3
61 VDDREF
CR#_H(MINI CARDII) PCIEX10 64 D_CK_SCLK
SCLK D_CK_SCLK 14,15
39 63 D_CK_SDATA
VDDSRC SDATA D_CK_SDATA 14,15
SRC6(VGA_CLK): Discrete VGA[Enable] UMA[Disable] 55 VDDCPU PM_STP_PCI#
PCI_STOP# 38 PM_STP_PCI# 22
37 PM_STP_CPU#
CPU_STOP# PM_STP_CPU# 22
+CLK_VDDSRC 12 VDD96_IO
+3VS 20 VDDPLL3_IO
26 VDDSRC_IO
54 CLK_CPU0 R44 1 2 0_0402_5% CLK_CPU_BCLK
CPU0 CLK_CPU_BCLK 4
1 2 CLK_PCI2 36 53 CLK_CPU0# R45 1 2 0_0402_5% CLK_CPU_BCLK#
VDDSRC_IO CPU0# CLK_CPU_BCLK# 4
R104 10K_0402_5% 49 VDDCPU_IO
CLK_PCI2=1, Trusted Mode Enable(No overclocking allowed)
R47 CLK_XTALOUT 59
4.7K_0402_5% Y1 X2 CLK_SRC7 R33
SRC7/CR#_F 44 1 2 0_0402_5% CLK_PCIE_SATA
CLK_PCIE_SATA 21
2
Q8
2N7002_SOT23 41 CLK_SRC6 R41 1 PM@ 2 0_0402_5% CLK_PCIE_VGA
SRC6 CLK_PCIE_VGA 17
CLK_ICH_48M R80 2 1 33_0402_5% CLKSEL0 10 40 CLK_SRC6# R42 1 PM@ 2 0_0402_5% CLK_PCIE_VGA#
+3VS 22 CLK_ICH_48M USB_48MHZ/FSLA SRC6# CLK_PCIE_VGA# 17
R27 UMA: disable this pair by BIOS
4.7K_0402_5% CLKSEL1 57 FSLB/TEST_MODE
2
3 CLK_SRC4 R86 3
2 0_0402_5% CLK_MCH_3GPLL
G
Q7
2N7002_SOT23 24 CLK_SRC3 R95 1 2 0_0402_5% CLK_PCIE_ICH
SRC3/CR#_C CLK_PCIE_ICH 22
+CLK_VDDSRC 45 25 CLK_SRC3# R96 1 2 0_0402_5% CLK_PCIE_ICH#
+1.05VS +1.05VS VDDSRC_IO SRC3#/CR#_D CLK_PCIE_ICH# 22
2
R363 29
@ 1K_0402_5% GNDSRC CK505_PWRGD R29 1
CK_PWRGD/PD# 56 2 0_0402_5% CK_PWRGD 22
2
58 GNDREF
R36 R362 R25 R30 1 @ 2 0_0402_5%
4 VGATE 8,22,45 4
10K_0402_5% 1K_0402_5% 10K_0402_5% ICS9LPRS365AGLFT_TSSOP64
1
CLKSEL2 1 2 1 2 @
MCH_CLKSEL2 8
1
CK505_PWRGD
1 2 1 2 CPU_BSEL2 5
1
R35 R364 D
@ 0_0402_5% 0_0402_5% 2 CLK_ENABLE# 45
Security Classification Compal Secret Data Compal Electronics, Inc.
G
Issued Date 2006/12/25 Deciphered Date 2007/12/25 Title
Q5
S
Clock Generator (CK505)
3
2N7002_SOT23 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 16 of 48
A B C D E F G H
5 4 3 2 1
PCIE_MTX_C_GRX_N[0..15]
10 PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
10 PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
10 PCIE_GTX_C_MRX_N[0..15]
D PCIE_GTX_C_MRX_P[0..15] D
10 PCIE_GTX_C_MRX_P[0..15]
JP19A JP19B
2
+MXM_B+ +2.5VS +5VS
G
160mil(4A) L44 2 1 1 3 D_EC_SMB_DA1
B+ 30,32,41 EC_SMB_DA1
KC FBM-L11-201209-221LMAT_0805
S
PM@ 2 160mil(4A) 1 1 Q46
L43 2 1 C525 C471 C520 PM@ 2N7002_SOT23
KC FBM-L11-201209-221LMAT_0805
2
PM@ 0.1U_0402_16V4Z
G
1 1 1
C526 C527 0.1U_0603_25V7K PM@ 2 2
PM@ 0.1U_0402_16V4Z 1 3 D_EC_SMB_CK1
30,32,41 EC_SMB_CK1
680P_0603_50V7K 68P_0402_50V8J PM@
S
A 2 2 A
PM@ Q47
2N7002_SOT23
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MXM Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 17 of 48
5 4 3 2 1
5 4 3 2 1
TXOUT0- 1 4 VGA_TXOUT0-
VGA_TXOUT0- 17
TXOUT0+ 2 3 VGA_TXOUT0+
LCD POWER CIRCUIT TXOUT1-
RP4
1 4
PM@ 0_0404_4P2R_5%
VGA_TXOUT1-
VGA_TXOUT0+ 17
VGA_TXOUT1- 17
TXOUT1+ 2 3 VGA_TXOUT1+
VGA_TXOUT1+ 17
RP6 PM@ 0_0404_4P2R_5%
+3V +3VS TXOUT2- VGA_TXOUT2-
1 4 VGA_TXOUT2- 17
+LCDVDD TXOUT2+ VGA_TXOUT2+
W=60mils RP8
2 3
PM@ 0_0404_4P2R_5%
VGA_TXOUT2+ 17
TXCLK- 1 4 VGA_TXCLK-
VGA_TXCLK- 17
1
1 TXCLK+ 2 3 VGA_TXCLK+
VGA_TXCLK+ 17
R11 R10 C19 RP10 PM@ 0_0404_4P2R_5%
300_0603_5% 100K_0402_5% TZOUT0- 1 4 VGA_TZOUT0-
D VGA_TZOUT0- 17 D
4.7U_0805_10V4Z TZOUT0+ 2 3 VGA_TZOUT0+
2 VGA_TZOUT0+ 17
RP12 PM@ 0_0404_4P2R_5%
1 2
2
TZOUT1- 1 4 VGA_TZOUT1-
VGA_TZOUT1- 17
3
D S
TZOUT1+ VGA_TZOUT1+
G 2 3 VGA_TZOUT1+ 17
Q2 2 2 1 2 Q1 RP14 PM@ 0_0404_4P2R_5%
2N7002_SOT23 G R9 1K_0402_5% AO3413_SOT23-3 TZOUT2- 1 4 VGA_TZOUT2-
VGA_TZOUT2- 17
S 1
D TZOUT2+ 2 3 VGA_TZOUT2+
VGA_TZOUT2+ 17
1
C16 +LCDVDD RP16 PM@ 0_0404_4P2R_5%
W=60mils TZCLK- 1 4 VGA_TZCLK-
VGA_TZCLK- 17
1
GM@ D 0.047U_0402_16V7K TZCLK+ VGA_TZCLK+
2 3 VGA_TZCLK+ 17
R14 2
10 GMCH_ENVDD 1 2 0_0402_5% 2 Q3 RP18 PM@ 0_0404_4P2R_5%
PM@ G 2N7002_SOT23 1 1
R13 1 2 0_0402_5% S C17 C10
17 ENVDD
3
1
4.7U_0805_10V4Z 0.1U_0402_16V4Z I2CC_SCL 1 4 GMCH_LCD_CLK GMCH_LCD_CLK 10
R12 2 2 I2CC_SDA GMCH_LCD_DATA
2 3 GMCH_LCD_DATA 10
100K_0402_5% RP2 GM@ 0_0404_4P2R_5%
2
TXOUT0- 2 3 GMCH_TXOUT0-
GMCH_TXOUT0- 10
TXOUT0+ 1 4 GMCH_TXOUT0+
GMCH_TXOUT0+ 10
RP3 GM@ 0_0404_4P2R_5%
TXOUT1- 2 3 GMCH_TXOUT1-
+3VS GMCH_TXOUT1- 10
TXOUT1+ 1 4 GMCH_TXOUT1+
GMCH_TXOUT1+ 10
RP5 GM@ 0_0404_4P2R_5%
TXOUT2- 2 3 GMCH_TXOUT2-
GMCH_TXOUT2- 10
1
TZOUT2+
18
16
20
18
19
17 17
15
TXOUT1+
R501 1 2 180_0402_1%
DVI-D Connector
TZOUT2- 16 15 TXOUT2+ @ DVI_TXD0- +3VS
14 14 13 13 17 VGA_DVI_TXD0- 1 4 +DVI_VCC
12 11 TXOUT2- 2 3 DVI_TXD0+ JP15
12 11 17 VGA_DVI_TXD0+
1
TZCLK- 10 9 RP45 0_0404_4P2R_5% 17 14
TZCLK+ 10 9 TXCLK- PM@ TMDS_DATA0- +5V R17 R18
8 8 7 7 18 TMDS_DATA0+
0_0603_5% 6 5 TXCLK+ R502 1 2 180_0402_1% 4.7K_0402_5% 4.7K_0402_5%
6 5
2
B R3 USB20_CMOS_N3 @ DVI_TXD1- PM@ PM@ B
G
22 USB20_N3 1 2 4 4 3 3 17 VGA_DVI_TXD1- 2 3 9 TMDS_DATA1-
R4 1 2 USB20_CMOS_P3 2 1 +3VS 1 4 DVI_TXD1+ 10
22 USB20_P3 17 VGA_DVI_TXD1+
2
0_0603_5% 2 1 RP1 0_0404_4P2R_5% TMDS_DATA1+
1 3 VGA_DVI_SCLK 17
ACES_88242-4001 PM@ 1
S
CONN@ DVI_TXD2- TMDS_DATA2- Q35
17 VGA_DVI_TXD2- 2 3 2 TMDS_DATA2+ DDC_CLOCK 6
2
DVI_TXD2+ 2N7002_SOT23
G
17 VGA_DVI_TXD2+ 1 4
RP46 0_0404_4P2R_5% 12 PM@
PM@ TMDS_DATA3-
1 2 13 TMDS_DATA3+ DDC_DATA 7 1 3 VGA_DVI_SDATA 17
R503 180_0402_1%
S
@ 4 Q36
TMDS_DATA4- 2N7002_SOT23
5 TMDS_DATA4+
+3VS PM@
20 R360
TMDS_DATA5- DVI_DET
21 TMDS_DATA5+ Hot Plug Detect 16 1 2 DVI_DET 17
1
1
@ PM@
P
NC
2
TMDS_DATA2/4 shield
@ TMDS_DATA1/3 shield 11
Optional for ATI M66M/M7x 25 Shield TMDS_DATA0/5 shield 19
26 Shield TMDS_Clock shield 22
27 Shield
2
G
R533 28 Shield
31 Shield
+3VS 1 2 INVTPWM 1 3 32 Shield
D
10K_0402_5% 8 15
Analog VSYNC GND
@ Q50
A
2N7002_SOT23 For GMCH DPST SUYIN_070939FR024S531PL
A
@ CONN@
+INVPWR_B+
+LCDVDD
L31 2 1 B+ +3VS
W=40mils KC FBM-L11-201209-221LMAT_0805
L29 2 1
KC FBM-L11-201209-221LMAT_0805 1
1
C14
1
C8 Security Classification Compal Secret Data Compal Electronics, Inc.
1 1 C18 2006/12/25 2007/12/25 Title
C432 C433 10U_0805_10V4Z 0.1U_0402_16V4Z
Issued Date Deciphered Date
0.1U_0402_16V4Z 2 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS & DVI Connector
680P_0603_50V7K 68P_0402_50V8J 2 Size Document Number Rev
2 2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 18 of 48
5 4 3 2 1
A B C D E
CRT Connector D3 D2 D1
W=40mils
@ @ @ +5VS +R_CRT_VCC +CRT_VCC
DAN217_SC59 DAN217_SC59 DAN217_SC59
D19 F1 W=40mils
1
2 1 1 2
RB411DT146_SOT23-3 1.1A_6VDC_FUSE
1
C430
3
0.1U_0402_16V4Z
2
1
+3VS 1
1
GM@ 13
1
R6 R2 1 1 1 1 1 1 1 1 1 3
R1 C13 C4 C1 C12 C6 C2 9
C7 C5 C3 14
150_0402_1% GM@ GM@ GM@ 10P_0402_50V8J 10P_0402_50V8J 10P_0402_50V8J 4
2
2 2 2 GM@ 2 GM@ 2 GM@ 2 2 2 2
10 16
2
150_0402_1% 10P_0402_50V8J 10P_0402_50V8J 22P_0402_50V8J 15 17
150_0402_1% 22P_0402_50V8J 22P_0402_50V8J 1 5
10P_0402_50V8J C436
SUYIN_070549FR015S208CR
1 2 CRT_HSYNC_2 CONN@
L32 FCM1608C-121T_0603 2
change to 47pf for ATI M66/M7x 100P_0402_50V8J
CRT_DET 22
1 2 CRT_VSYNC_2
L30 FCM1608C-121T_0603 DSUB_12
2
+CRT_VCC
1 1 1 R555
1 2 2 1 C434 100K_0402_5%
C439 0.1U_0402_16V4Z R359 10K_0402_5% C435
10P_0402_50V8J 10P_0402_50V8J DSUB_15
1
5
1
2 U18 2 2 C437 2 2
68P_0402_50V8J 1
OE#
4 1 CRT_VSYNC CRT_HSYNC 2 4 CRT_HSYNC_1
10 GMCH_CRT_VSYNC A Y
3 2 CRT_HSYNC C431 +CRT_VCC
10 GMCH_CRT_HSYNC
G
RP48 GM@ 33_0404_4P2R_5% 68P_0402_50V8J
CRT_B SN74AHCT1G125DCKR_SC70-5 2
10 GMCH_CRT_B 4 1
3
3 2 CRT_G
10 GMCH_CRT_G +CRT_VCC
RP49 GM@ 0_0404_4P2R_5%
4 1 CRT_R
10 GMCH_CRT_R
3 2 TV_COMPS 1 2
10 GMCH_TV_COMPS
RP50 GM@ 0_0404_4P2R_5% C438 0.1U_0402_16V4Z
1
4 1 TV_LUMA U19 +CRT_VCC
10 GMCH_TV_LUMA
3 2 TV_CRMA
OE#
10 GMCH_TV_CRMA
RP51 GM@ 0_0404_4P2R_5% CRT_VSYNC 2 4 CRT_VSYNC_1 Place closed to chipset
A Y
G
SN74AHCT1G125DCKR_SC70-5 +3VS
1
1 4 CRT_VSYNC pull-up 2.2k on GPU side
17 VGA_CRT_VSYNC
2 3 CRT_HSYNC
17 VGA_CRT_HSYNC
RP52 PM@ 0_0404_4P2R_5% R381 1 2 R391
CRT_B 4.7K_0402_5% R384 PM@ 0_0402_5% VGA_DDC_DATA 17
17 VGA_CRT_B 1 4
2 3 CRT_G
17 VGA_CRT_G
2
RP53 PM@ 0_0404_4P2R_5%
G
1 4 CRT_R 4.7K_0402_5% R398 GM@ 0_0402_5%
17 VGA_CRT_R
2 3 TV_COMPS DSUB_12 1 3 2 1
17 VGA_TV_COMPS GMCH_CRT_DATA 10
RP54 PM@ 0_0404_4P2R_5%
S
1 4 TV_LUMA Q20
17 VGA_TV_LUMA
2
TV_CRMA D14 D24 D25 2N7002_SOT23
G
17 VGA_TV_CRMA 2 3
RP55 PM@ 0_0404_4P2R_5% @ @ @
DAN217_SC59 DAN217_SC59 DAN217_SC59 DSUB_15 1 3 2 1
TV-OUT Conn. R399 GMCH_CRT_CLK 10
S
1
1
Place closed to chipset Q21 GM@ 0_0402_5%
3 2N7002_SOT23 3
1 2 R392 VGA_DDC_CLK 17
PM@ 0_0402_5%
3
+3VS
TV_LUMA 1 2
L42 FCM1608C-121T_0603 JP24
3
TV_CRMA 1 2 TV_CRMA_1 6
L40 FCM1608C-121T_0603 TV_COMPS_1 7
5
TV_COMPS 1 2 2
L18 FCM1608C-121T_0603 TV_LUMA_1 4
1
8
1
GM@ GM@
150_0402_1% 6P_0402_50V8K 6P_0402_50V8K
4 4
change to 47pf for ATI M66/M7x
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT & TV-OUT Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 19 of 48
A B C D E
5 4 3 2 1
+3VS
2
PCI_AD23 F13 A17 PCI_FRAME#
AD23 FRAME# PCI_FRAME# 25
R108 1 2 8.2K_0402_5% PCI_PIRQE# PCI_AD24 E11
PCI_AD25 AD24 PLT_RST# R123
E13 AD25 PLTRST# AG24 PLT_RST# 8,22,24,26,30
C R111 1 2 8.2K_0402_5% PCI_PIRQF# PCI_AD26 E12 B10 CLK_PCI_ICH 10_0402_5% C
AD26 PCICLK CLK_PCI_ICH 16
PCI_AD27 D8 G7 @
1
R112 1 AD27 PME#
2 8.2K_0402_5% PCI_PIRQG# PCI_AD28 A6 AD28
PCI_AD29 E8 1
R134 1 AD29
2 8.2K_0402_5% PCI_PIRQH# PCI_AD30 D6 AD30
C126
PCI_AD31 A3 10P_0402_50V8J
R135 1 AD31
2 8.2K_0402_5% PCI_REQ#0 @
2
R125 1 2 8.2K_0402_5% PCI_REQ#1 PCI_PIRQA# F9
Interrupt I/F F8 PCI_PIRQE#
PIRQA# PIRQE#/GPIO2 PCI_PIRQE# 25
PCI_PIRQB# B5 G11 PCI_PIRQF#
R146 1 PIRQB# PIRQF#/GPIO3
2 8.2K_0402_5% PCI_REQ#2 PCI_PIRQC# C5 PIRQC# PIRQG#/GPIO4 F12 PCI_PIRQG#
PCI_PIRQG# 25
PCI_PIRQD# A10 B3 PCI_PIRQH#
R142 1 PIRQD# PIRQH#/GPIO5
2 8.2K_0402_5% PCI_REQ#3
ICH8M REV 1.0
+3VS
5
U8
PLT_RST#
PCI_GNT#0 SPI_CS#1 Boot BIOS Loaction 2 B
P
Y 4 PLT_RST_BUF# 28
1 A
G
0 1 SPI
1
NC7SZ08P5X_NL_SC70-5
3
R316
100K_0402_5%
1 0 PCI
2
+3VS
1 1 LPC*
5
U9
2 B
P
Y 4 2 1 PLTRST_VGA# 17
1 R321 100_0402_5%
A
G
PM@
1
NC7SZ08P5X_NL_SC70-5
3
PM@ R317
100K_0402_5%
PM@
2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ICH8M(1/4)-PCI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 20 of 48
5 4 3 2 1
5 4 3 2 1
+RTCVCC
C287
18P_0402_50V8J
2 1 ICH_RTCX1 +1.05VS
10M_0402_5%
R265 X1 H_DPRSTP# 2 1
1
3 4 R251 @ 56_0402_5%
NC OUT
R263
1M_0402_5% H_DPSLP# 2 1
32.768KHZ_12.5P_MC-306 2 1 R252 @ 56_0402_5%
2
SM_INTRUDER# NC IN H_FERR# 2 1
C286 U5A R250 56_0402_5%
2
D 18P_0402_50V8J AG25 E5 LPC_AD0 D
RTCX1 FWH0/LAD0 LPC_AD0 30
2 1 ICH_RTCX2 AF24 F5 LPC_AD1
+RTCVCC RTCX2 FWH1/LAD1 LPC_AD1 30
G8 LPC_AD2
FWH2/LAD2 LPC_AD2 30
+RTCVCC 1 2 ICH_RTCRST# AF23 F6 LPC_AD3
RTCRST# FWH3/LAD3 LPC_AD3 30
R264
20K_0402_5% SM_INTRUDER# AD22 C4 LPC_FRAME#
INTRUDER# FWH4/LFRAME# LPC_FRAME# 30
1
R336
RTC
LPC
R281 ICH_INTVRMEN AF25 G9
332K_0402_1% @ LAN100_SLP INTVRMEN LDRQ0#
1 2 AD21 LAN100_SLP LDRQ1#/GPIO23 E6
close to RAM door 2 1 R271 10K_0402_5% +3VS
10K_0603_5% B24 AF13 EC_GA20
EC_GA20 30
2
LAN / GLAN
D21 AG29 H_PWRGOOD
LAN_TXD0 CPUPWRGD/GPIO49 H_PWRGOOD 5
E20 LAN_TXD1
1
CPU
1 2 GLAN_COMP D25 AH14 EC_KBRST#
+1.5VS EC_KBRST# 30
2
IHDA
AD13 HDA_SDIN3 DD0 V1
U2 IDE_DD1
2
IDE
SATA_ITX_DRX_N1 AJ4 IDE_DA[0..2] 24
HDA_RST_ICH# SATA_ITX_DRX_P1 SATA1TXN IDE_DA0
34 HDA_RST_AUDIO# 1 2 AJ3 SATA1TXP DA0 AA4
R300 33_0402_5% AA1 IDE_DA1
DA1
SATA
AF2 AB3 IDE_DA2
HDA_SDOUT_ICH SATA2RXN DA2
34 HDA_SDOUT_AUDIO 1 2 AF1 SATA2RXP
R299 33_0402_5% AE4 Y6 IDE_DCS1# IDE_DCS1# 24
SATA2TXN DCS1# IDE_DCS3#
AE3 SATA2TXP DCS3# Y5 IDE_DCS3# 24
B B
CLK_PCIE_SATA# AB7 W4 IDE_DIOR#
16 CLK_PCIE_SATA# SATA_CLKN DIOR# IDE_DIOR# 24
CLK_PCIE_SATA AC6 W3 IDE_DIOW#
16 CLK_PCIE_SATA SATA_CLKP DIOW# IDE_DIOW# 24
Y2 IDE_DDACK#
DDACK# IDE_DDACK# 24
AG1 Y3 IDE_IRQ
SATARBIAS# IDEIRQ IDE_IRQ 24
R242 1 2 24.9_0402_1% SATARBIAS AG2 Y1 IDE_DIORDY
SATARBIAS IORDY IDE_DIORDY 24
10mils width less than 500mils W5 IDE_DDREQ
DDREQ IDE_DDREQ 24
ICH8M REV 1.0
SATA_ITX_DRX_N0 1 2 SATA_ITX_C_DRX_N0
C290 3900P_0402_50V7K SATA_ITX_C_DRX_N0 24
SATA_ITX_DRX_P0 1 2 SATA_ITX_C_DRX_P0
C291 3900P_0402_50V7K SATA_ITX_C_DRX_P0 24
MAINPWON 38,39,41
SATA_ITX_DRX_N1 1 2 SATA_ITX_C_DRX_N1
C281 3900P_0402_50V7K SATA_ITX_C_DRX_N1 24 R189
1
SATA_ITX_DRX_P1 1 2 SATA_ITX_C_DRX_P1 @ 330_0402_5% C
C280 3900P_0402_50V7K SATA_ITX_C_DRX_P1 24 Q10
+1.05VS 1 2 2
B
E 2SC2411K_SOT23
close ICH8
3
@
+VCC_HDA_ICH H_THERMTRIP#
R297
1K_0402_5% XOR Chain Entrance Strap
A @ A
HDA_SDOUT_ICH
ICH_TP3 HDA_SDOUT Description
0 0 RSVD
22 ICH_TP3
0 1 Enter XOR Chain
R288 1 0 Normal Operation
Security Classification Compal Secret Data Compal Electronics, Inc.
1K_0402_5% 2006/12/25 2007/12/25 Title
Issued Date Deciphered Date
@ 1 1 Set PCIE port config bit 1 ICH8M(2/4)-LAN,IDELPC,RTC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 21 of 48
5 4 3 2 1
5 4 3 2 1
+3VS +3V
10K_0402_5%
Place closely pin B2 Place closely pin AC1
R308 1 2 SERIRQ
CLK_ICH_48M CLK_ICH_14M
1
8.2K_0402_5%
R270 1 2 PM_CLKRUN# R157 R155
1
2.2K_0402_5% 2.2K_0402_5%
8.2K_0402_5% +3VS R168 R283
R309 1 2 EC_THERM# U5C 10_0402_5% 10_0402_5%
2
16,26,28,29 ICH_SMBCLK ICH_SMBCLK AJ26 AJ12 PROJECT_ID1 @ @
@ 10K_0402_5% ICH_SMBDATA SMBCLK SATA0GP/GPIO21 PROJECT_ID0
16,26,28,29 ICH_SMBDATA AD19 AJ10
2
R498 1 PM_STP_PCI# LINKALERT# SMBDATA SATA1GP/GPIO19 R284 1 2 10K_0402_5%
SATA
2 AG21 AF11
GPIO
LINKALERT# SATA2GP/GPIO36
SMB
ICH_SMLINK0 AC17 AG11 1 1
@ 10K_0402_5% ICH_SMLINK1 SMLINK0 SATA3GP/GPIO37 C165 C298
AE19 SMLINK1
D R499 1 PM_STP_CPU# CLK_ICH_14M 10P_0402_50V8J 10P_0402_50V8J D
2 CLK14 AG9 CLK_ICH_14M 16
Clocks
EC_SWI# AF17 G5 CLK_ICH_48M @ @
30 EC_SWI# RI# CLK48 CLK_ICH_48M 16 2 2
@ 10K_0402_5%
R500 1 2 SB_SPKR PAD SUS_STAT# F4 D3 SUS_CLK PAD
T6 SUS_STAT#/LPCPD# SUSCLK T5
XDP_DBRESET# AD15
4 XDP_DBRESET# SYS_RESET#
High: CRT Plugged @ AG23 PM_SLP_S3# @
SLP_S3# PM_SLP_S3# 30
PM_BMBUSY# AG12 AF21 PM_SLP_S4#
8 PM_BMBUSY# BMBUSY#/GPIO0 SLP_S4# PM_SLP_S4# 30
AD18 PM_SLP_S5#
SLP_S5# PM_SLP_S5# 30
SMBALERT# AG22
+3V 30 EC_LID_OUT# SMBALERT#/GPIO11
S4_STATE#/GPIO26 AH27
10K_0402_5% PM_STP_PCI# SYS_PWROK
GPIO
16 PM_STP_PCI# AE20 STP_PCI#/GPIO15 1 2
SYS
R313 1 2 EC_SWI# PM_STP_CPU# AG18 AE23 SYS_PWROK R262 10K_0402_5%
16 PM_STP_CPU# STP_CPU#/GPIO25 PWROK SYS_PWROK 8,33
10K_0402_5% PM_CLKRUN# AH11 AJ14 DPRSLPVR 1 2
25,30 PM_CLKRUN# CLKRUN#/GPIO32 DPRSLPVR/GPIO16 PM_DPRSLPVR 8,45
Power MGT
R312 1 2 ICH_SMLINK0 R286 100_0402_5% LAN_RST# 1 2
ICH_PCIE_WAKE# AE17 AE21 PM_BATLOW# R548 @ 10K_0402_5%
26,28,29 ICH_PCIE_WAKE# WAKE# BATLOW#
10K_0402_5% SERIRQ AF12
25,30 SERIRQ SERIRQ
R303 1 2 ICH_SMLINK1 EC_THERM# AC13 C2 PBTN_OUT#
30 EC_THERM# THRM# PWRBTN# PBTN_OUT# 30
10K_0402_5%
No used Integrated LAN,
8,16,45 VGATE 2 1 ICH_VGATE AJ20 VRMPWRGD LAN_RST# AH20 LAN_RST# 1 2 PLT_RST# 8,20,24,26,30
R276 1 2 LINKALERT# R267 0_0402_5% R549 0_0402_5% connecting to PLT_RST#
PAD @ AJ22 AG27 SB_RSMRST#
T11 TP7 RSMRST#
10K_0402_5% +3VS R278 1 2 100K_0402_5%
R311 1 2 XDP_DBRESET# CRT_DET# AJ8 E1 CK_PWRGD
TACH1/GPIO1 CK_PWRGD CK_PWRGD 16
1 2 AJ9 @
1K_0402_5% 30,41 ACIN D15 RB751V_SOD323 TACH2/GPIO6 SYS_PWROK R453 2
AH9 TACH3/GPIO7 CLPWROK E3 1 0_0402_5%
R302 1 2 ICH_PCIE_WAKE# EC_SMI# AE16 Q14
30 EC_SMI# GPIO8
EC_SCI# AC19 AJ25 PM_SLP_M# PAD MMBT3906_NL_SOT23-3
30 EC_SCI# GPIO12 SLP_M# T9
8.2K_0402_5% AG8 @ SB_RSMRST#
C
TACH0/GPIO17 EC_RSMRST# 30
R287 2 1 PM_BATLOW# AH12 F23
E
GPIO18 CL_CLK0 CL_CLK0 8
AE11 GPIO20 CL_CLK1 AE18
1
GPIO
Controller Link
AG10
B
C SCLOCK/GPIO22 R259 C
AH25 QRT_STATE0/GPIO27 CL_DATA0 F22 CL_DATA0 8 1 2 +3V
10K_0402_5% AD16 AF19 10K_0402_5% R325 4.7K_0402_5%
R277 1 SMBALERT# QRT_STATE1/GPIO28 CL_DATA1
2 AG13 SATACLKREQ#/GPIO35
AF9 D24 CL_VREF0_ICH
2
@ 10K_0402_5% SLOAD/GPIO38 CL_VREF0 CL_VREF1_ICH D17A
AJ11 SDATAOUT0/GPIO39 CL_VREF1 AH23
R269 1 2 AD10 1
SDATAOUT1/GPIO48
CL_RST# AJ23 CL_RST#0 8 6
10K_0402_5% SB_SPKR AD9 2
34 SB_SPKR SPKR
R268 1 2 PROJECT_ID0 AJ27
MEM_LED/GPIO24
MISC
AJ13 AJ24 R516 1 2 10K_0402_5% +3V BAV99DW-7_SOT363
8 MCH_ICH_SYNC# MCH_SYNC# ME_EC_ALERT/GPIO10
10K_0402_5% AF22 R517 1 2 10K_0402_5%
R290 1 PROJECT_ID1 EC_ME_ALERT/GPIO14 R266 1
2 21 ICH_TP3 AJ21 TP3 WOL_EN/GPIO9 AG19 2 100K_0402_5% D17B
4
100K_0402_5% ICH8M REV 1.0 3
R285 1 2 PM_DPRSLPVR 5
U5D
1
@ 100K_0402_5% PCIE_PTX_C_IRX_N1 P27 V27 DMI_MTX_IRX_N0 BAV99DW-7_SOT363
29 PCIE_PTX_C_IRX_N1 PERN1 DMI0RXN DMI_MTX_IRX_N0 8
R291 1 2 ICH_VGATE PCIE_PTX_C_IRX_P1 P26 V26 DMI_MTX_IRX_P0 R329
29 PCIE_PTX_C_IRX_P1 PERP1 DMI0RXP DMI_MTX_IRX_P0 8
For Express Card 29 PCIE_ITX_C_PRX_N1 C175 2 1 0.1U_0402_16V7K PCIE_ITX_PRX_N1 N29 U29 DMI_ITX_MRX_N0 2.2K_0402_5%
PETN1 DMI0TXN DMI_ITX_MRX_N0 8
29 PCIE_ITX_C_PRX_P1 C174 2 1 0.1U_0402_16V7K PCIE_ITX_PRX_P1 N28 U28 DMI_ITX_MRX_P0
DMI_ITX_MRX_P0 8
2
PCIE_PTX_C_IRX_N2 M27 Y27 DMI_MTX_IRX_N1
28 PCIE_PTX_C_IRX_N2 PERN2 DMI1RXN DMI_MTX_IRX_N1 8
PCIE_PTX_C_IRX_P2 M26 Y26 DMI_MTX_IRX_P1
28 PCIE_PTX_C_IRX_P2 PERP2 DMI1RXP DMI_MTX_IRX_P1 8
For TV-Tuner 28 PCIE_ITX_C_PRX_N2 C172 2 1 0.1U_0402_16V7K PCIE_ITX_PRX_N2 L29 W29 DMI_ITX_MRX_N1
PETN2 DMI1TXN DMI_ITX_MRX_N1 8
28 PCIE_ITX_C_PRX_P2 C170 2 1 0.1U_0402_16V7K PCIE_ITX_PRX_P2 L28 W28 DMI_ITX_MRX_P1
PETP2 DMI1TXP DMI_ITX_MRX_P1 8
PCI-Express
PCIE_PTX_C_IRX_N3 K27 AB26 DMI_MTX_IRX_N2
26 PCIE_PTX_C_IRX_N3 PERN3 DMI2RXN DMI_MTX_IRX_N2 8
PCIE_PTX_C_IRX_P3 K26 AB25 DMI_MTX_IRX_P2
26 PCIE_PTX_C_IRX_P3 PERP3 DMI2RXP DMI_MTX_IRX_P2 8 +3VS
For PCIE LAN 26 PCIE_ITX_C_PRX_N3 C166 2 1 0.1U_0402_16V7K PCIE_ITX_PRX_N3 J29 AA29 DMI_ITX_MRX_N2
PETN3 DMI2TXN DMI_ITX_MRX_N2 8
26 PCIE_ITX_C_PRX_P3 C168 2 1 0.1U_0402_16V7K PCIE_ITX_PRX_P3 J28 AA28 DMI_ITX_MRX_P2
PETP3 DMI2TXP DMI_ITX_MRX_P2 8
PCIE_PTX_C_IRX_N4 H27 AD27 DMI_MTX_IRX_N3
B 28 PCIE_PTX_C_IRX_N4 PERN4 DMI3RXN DMI_MTX_IRX_N3 8 B
PCIE_PTX_C_IRX_P4 H26 AD26 DMI_MTX_IRX_P3 R133
28 PCIE_PTX_C_IRX_P4 PERP4 DMI3RXP DMI_MTX_IRX_P3 8
For Wireless LAN 28 PCIE_ITX_C_PRX_N4 C162 2 1 0.1U_0402_16V7K PCIE_ITX_PRX_N4 G29 AC29 DMI_ITX_MRX_N3 3.24K_0402_1%
PETN4 DMI3TXN DMI_ITX_MRX_N3 8
28 PCIE_ITX_C_PRX_P4 C158 2 1 0.1U_0402_16V7K PCIE_ITX_PRX_P4 G28 AC28 DMI_ITX_MRX_P3
PETP4 DMI3TXP DMI_ITX_MRX_P3 8
F27 T26 CLK_PCIE_ICH# CL_VREF0_ICH
PERN5 DMI_CLKN CLK_PCIE_ICH# 16
F26 T25 CLK_PCIE_ICH
PERP5 DMI_CLKP CLK_PCIE_ICH 16
E29 PETN5 1
E28 Y23 R213 24.9_0402_1% Within 500 mils C144 R127
PETP5 DMI_ZCOMP DMI_IRCOMP 453_0402_1%
DMI_IRCOMP Y24 1 2 +1.5VS
D27 0.1U_0402_16V4Z
PERN6/GLAN_RXN USB20_N0 2
D26 PERP6/GLAN_RXP USBP0N G3 USB20_N0 29
C29 G2 USB20_P0 USB Conn.
PETN6/GLAN_TXN USBP0P USB20_P0 29
C28 H5 USB20_N1
PETP6/GLAN_TXP USBP1N USB20_N1 29
H4 USB20_P1 New Card
USBP1P USB20_P1 29
SPI not used, Left NC C23 H2 USB20_N2
SPI_CLK USBP2N USB20_N2 29 +3V
B23 H1 USB20_P2 USB Conn.
SPI_CS0# USBP2P USB20_P2 29
E22 J3 USB20_N3
20 SPI_CS#1 SPI_CS1# USBP3N USB20_N3 18
SPI
J2 USB20_P3 CMOS Camera
USBP3P USB20_P3 18
D23 K5 USB20_N4
+3VS SPI_MOSI USBP4N USB20_N4 28
F21 K4 USB20_P4 USB/B R280
SPI_MISO USBP4P USB20_P4 28
K2 USB20_N5 3.24K_0402_1%
USBP5N USB20_N5 29
USB_OC#0 AJ19 K1 USB20_P5 Bluetooth
29 USB_OC#0 OC0# USBP5P USB20_P5 29
2
OC5#/GPIO29 USBP8N
D 1 2 USB_OC#5 USB_OC#6 AD12 OC6#/GPIO30 USBP8P M1 USB20_P8
USB20_P8 28 Mini Card(TV-Tuner) 453_0402_1%
R296 10K_0402_5% CP_PE# AJ18 N3 0.1U_0402_16V4Z
29 CP_PE# OC7#/GPIO31 USBP9N 2
19 CRT_DET 2 1 2 USB_OC#9 USB_OC#8 AD14 OC8# USBP9P N2
Q48G R275 10K_0402_5% USB_OC#9 AH18 OC9#
2N7002_SOT23 S 1 2 CP_PE# F2 USBRBIAS 1 2
3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ICH8M(3/4)-USB,GPIO,PCIE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
ICL50/ICK70 M/B LA-3551P Schematic
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, April 23, 2007 Sheet 22 of 48
5 4 3 2 1
5 4 3 2 1
2
C220 C222 +ICH_V5REF A16 C13 1 1 (47UF*1, 0.047UF*1, 0.022UF*1) AA2 L13
R149 D8 V5REF[1] VCC1_05[03] C131 C132 VSS[003] VSS[101]
T7 V5REF[2] VCC1_05[04] C14 AA7 VSS[004] VSS[102] L15
0.1U_0402_16V4Z D14 A25 L26
100_0402_5% RB751V_SOD323 2 2 +ICH_V5REF_SUS VCC1_05[05] 0.1U_0402_16V4Z VSS[005] VSS[103]
G4 V5REF_SUS VCC1_05[06] E14 AB1 VSS[006] VSS[104] L27
1U_0402_6.3V4Z 2 2
F14 AB24 L4
1
+ICH_V5REF VCC1_05[07] 0.1U_0402_16V4Z VSS[007] VSS[105]
AA25 VCC1_5_B[01] VCC1_05[08] G14 AC11 VSS[008] VSS[106] L5
2 AA26 VCC1_5_B[02] VCC1_05[09] L11 AC14 VSS[009] VSS[107] M12
C150 AA27 L12 AC25 M13
VCC1_5_B[03] VCC1_05[10] VSS[010] VSS[108]
AB27 VCC1_5_B[04] VCC1_05[11] L14 AC26 VSS[011] VSS[109] M14
0.1U_0402_16V4Z AB28 L16 AC27 M15
D 1 VCC1_5_B[05] VCC1_05[12] +1.5VS_DMIPLL_ICH +1.5VS_DMIPLL_R VSS[012] VSS[110] D
AB29 VCC1_5_B[06] VCC1_05[13] L17 AD17 VSS[013] VSS[111] M16
D28 VCC1_5_B[07] VCC1_05[14] L18 AD20 VSS[014] VSS[112] M17
D29 M11 L16 1 2 R180 1_0603_5% +1.5VS AD28 M23
+5VALW +5V +3V VCC1_5_B[08] VCC1_05[15] VSS[015] VSS[113]
CORE
E25 M18 MBK1608121YZF_0603 AD29 M28
VCC1_5_B[09] VCC1_05[16] VSS[016] VSS[114]
E26 VCC1_5_B[10] VCC1_05[17] P11 1
C178
(10UF*1, 0.01UF*1) AD3 VSS[017] VSS[115] M29
E27 VCC1_5_B[11] VCC1_05[18] P18 AD4 VSS[018] VSS[116] M3
2
VCCA3GP
L25 R29 22U_0805_6.3V6M AF16 N4
VCC1_5_B[23] VCCDMIPLL 2 VSS[030] VSS[128]
(220UF*1, 22UF*2, 2.2UF*1) M24 VCC1_5_B[24] AF18 VSS[031] VSS[129] N5
+1.5VS L19 2 1 M25 AE28 AF3 N6
KC FBM-L11-201209-221LMAT_0805 VCC1_5_B[25] VCC_DMI[1] VSS[032] VSS[130]
1 N23 VCC1_5_B[26] VCC_DMI[2] AE29 AF4 VSS[033] VSS[131] P12
1 1 N24 VCC1_5_B[27] +1.05VS AG5 VSS[034] VSS[132] P13
C203 + C238 C237 C236 N25 AC23 AG6 P14
VCC1_5_B[28] V_CPU_IO[1] VSS[035] VSS[133]
P24 VCC1_5_B[29] V_CPU_IO[2] AC24 1 1 AH10 VSS[036] VSS[134] P15
220U_D2_2VMR15 10U_0805_10V4Z P25 C279 C259 C258 (4.7UF*1, 0.1UF*2) AH13 P16
2 2 2 VCC1_5_B[30] VSS[037] VSS[135]
R24 VCC1_5_B[31] VCC3_3[01] AF29 AH16 VSS[038] VSS[136] P17
10U_0805_10V4Z 2.2U_0805_10V6K R25 4.7U_0805_10V4Z 0.1U_0402_16V4Z AH19 P23
VCC1_5_B[32] 2 2 VSS[039] VSS[137]
R26 VCC1_5_B[33] VCC3_3[02] AD2 AH2 VSS[040] VSS[138] P28
R27 0.1U_0402_16V4Z AF28 P29
VCC1_5_B[34] VSS[041] VSS[139]
T23 VCC1_5_B[35] VCC3_3[03] AC8 AH22 VSS[042] VSS[140] R11
C +1.5VS_SATAPLL_R +1.5VS_SATAPLL_ICH C
T24 AD8 close to AD2 AH24 R12
VCCP_CORE
VCC1_5_B[36] VCC3_3[04] VSS[043] VSS[141]
T27 VCC1_5_B[37] VCC3_3[05] AE8 AH26 VSS[044] VSS[142] R13
+1.5VS L26 1 2 T28 AF8 +3VS AH3 R14
R289 MBK1608121YZF_0603 VCC1_5_B[38] VCC3_3[06] VSS[045] VSS[143]
T29 VCC1_5_B[39] AH4 VSS[046] VSS[144] R15
1_0603_5% 1 1 U24 AA3 1 1 1 AH8 R16
C309 VCC1_5_B[40] VCC3_3[07] C256 C266 C271 VSS[047] VSS[145]
U25 VCC1_5_B[41] VCC3_3[08] U7 AJ5 VSS[048] VSS[146] R17
C328 V23 V7 B11 R18
VCC1_5_B[42] VCC3_3[09] 0.1U_0402_16V4Z 0.1U_0402_16V4Z VSS[049] VSS[147]
10U_0805_10V4Z V24 VCC1_5_B[43] VCC3_3[10] W1 B14 VSS[050] VSS[148] R28
2 1U_0402_6.3V4Z
2 2 2 2
(10UF*1, 1UF*1) V25 W6 B17 R4
IDE
VCC1_5_B[44] VCC3_3[11] 0.1U_0402_16V4Z VSS[051] VSS[149]
W25 VCC1_5_B[45] VCC3_3[12] W7 B2 VSS[052] VSS[150] T12
Y25 VCC1_5_B[46] VCC3_3[13] Y7 B20 VSS[053] VSS[151] T13
close to AF29 close to AA3 B22 VSS[054] VSS[152] T14
AJ6 VCCSATAPLL VCC3_3[14] A8 B8 VSS[055] VSS[153] T15
VCC3_3[15] B15 +3VS C24 VSS[056] VSS[154] T16
+1.5VS AE7 VCC1_5_A[01] VCC3_3[16] B18 C26 VSS[057] VSS[155] T17
AF7 B4 +VCC_HDA_ICH C27 T2
VCC1_5_A[02] VCC3_3[17] 1 1 1 VSS[058] VSS[156]
ARX
1 1 AG7 B9 C124 C122 C123 C6 U12
C227 C226 VCC1_5_A[03] VCC3_3[18] R327 VSS[059] VSS[157]
AH7 VCC1_5_A[04] VCC3_3[19] C15 +3VS D12 VSS[060] VSS[158] U13
AJ7 D13 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 0_0603_5% D15 U14
PCI
+5VALW 1U_0402_6.3V4Z VCC1_5_A[05] VCC3_3[20] 2 2 2 C342 VSS[061] VSS[159]
VCC3_3[21] D5 D18 VSS[062] VSS[160] U15
2 2 0.1U_0402_16V4Z
AC1 VCC1_5_A[06] VCC3_3[22] E10 D2 VSS[063] VSS[161] U16
1U_0402_6.3V4Z AC2 E7 0.1U_0402_16V4Z D4 U17
VCC1_5_A[07] VCC3_3[23] 2 VSS[064] VSS[162]
ATX
AC3 VCC1_5_A[08] VCC3_3[24] F11 E21 VSS[065] VSS[163] U23
3
S
AC4 VCC1_5_A[09] E24 VSS[066] VSS[164] U26
+VCCSUS_HDA_ICH
G
37 SBPWR_EN# 2 close to AE7 AC5 VCC1_5_A[10] VCCHDA AC12 E4 VSS[067] VSS[165] U27
close to AC1 E9 VSS[068] VSS[166] U3
1 Q44 D AC10 AD11 R323 +3V F15 U5
1
L6 0.1U_0402_16V4Z H29 U4
VCC1_5_A[21] VSS[085] VSS[183]
close to F1 L7 VCC1_5_A[22] VCCSUS3_3[07] P6 H3 VSS[086] VSS[184] W24
close to D1 M6 VCC1_5_A[23] VCCSUS3_3[08] P7 H6 VSS[087]
M7 VCC1_5_A[24] VCCSUS3_3[09] C1 close to P6 close to AC18 J1 VSS[088] VSS_NCTF[01] A1
+3VS VCCSUS3_3[10] N7 J25 VSS[089] VSS_NCTF[02] A2
1 W23 VCC1_5_A[25] VCCSUS3_3[11] P1 J26 VSS[090] VSS_NCTF[03] A28
C145 P2 J27 A29
TP_VCCLAN1_05_ICH_1 VCCSUS3_3[12] VSS[091] VSS_NCTF[04]
T2 PAD F17 P3 J4 AH1
VCCPUSB
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ICH8M(4/4)-POWER&GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
ICL50/ICK70 M/B LA-3551P Schematic
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, April 23, 2007 Sheet 23 of 48
5 4 3 2 1
A B C D E F G H
0.1U_0402_16V4Z 10U_0805_10V4Z
1 1 1 1 1
C197 C184 C194
+3VS
C183 C192
2 2 2 2 2 IDE_DD[0..15] C239
1 21 IDE_DD[0..15] 1
1 2 0.1U_0402_16V4Z
1000P_0402_50V7K 1U_0402_6.3V4Z 10U_0805_10V4Z IDE_DA[0..2]
21 IDE_DA[0..2]
5
U7
IDE_HRESET# 2
P
21 IDE_HRESET# B
4 IDE_RST#
PLT_RST# Y
8,20,22,26,30 PLT_RST# 1 A
G
NC7SZ08P5X_NL_SC70-5
3
JP25
1 2
3 4
IDE_RST# 5 6 IDE_DD8
IDE_DD7 7 8 IDE_DD9
IDE_DD6 9 10 IDE_DD10
IDE_DD5 11 12 IDE_DD11
IDE_DD4 13 14 IDE_DD12
IDE_DD3 15 16 IDE_DD13
IDE_DD2 17 18 IDE_DD14
IDE_DD1 19 20 IDE_DD15
IDE_DD0 21 22 IDE_DDREQ
IDE_DDREQ 21
23 24 IDE_DIOR#
IDE_DIOR# 21
IDE_DIOW# 25 26
21 IDE_DIOW#
IDE_DIORDY 27 28 IDE_DDACK#
21 IDE_DIORDY IDE_DDACK# 21
IDE_IRQ 29 30
21 IDE_IRQ
IDE_DA1 31 32 IDE_PDIAG# 1 2 R200 +5VS
IDE_DA0 33 34 IDE_DA2 100K_0402_5%
21 IDE_DCS1# IDE_DCS1# 35 36 IDE_DCS3# IDE_DCS3# 21
IDE_LED# 37 38
30 IDE_LED#
+5VS 39 40 +5VS
2 2
41 42
43 44
45 46
1 2 IDE_CSEL 47 48
R169 475_0402_1% 49 50
51 52 +5VS
OCTEK_CDR-50JD1 0.1U_0402_16V4Z
CONN@
+3VS
IDE_CSEL 1
C196
1
C182
1
C193
Grounding for Master (When use SATA HDD) 1
C245
Open or High for Slaver (Normal) IDE_LED# 2 2 2
+5VS 2 1
R185 100K_0402_5% 0.1U_0402_16V4Z
1000P_0402_50V7K 1U_0402_6.3V4Z 2
30 GND1
4 4
31 GND2
OCTEK_SAS-22CA1G
CONN@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD & ODD Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 24 of 48
A B C D E F G H
A B C D E
2
BLM18AG601SN1D_0603
1 1 1 1 1 1 1 1 1 1 1 R186
C331 C326 C294 C223 C310 C327 C228 C512 C274 C511 C242 10K_0402_5%
0.1U_0402_16V4Z
15mils
1 1
1
2 2 2 2 2 2 2 2 2 2 2 R423 R422 C522 C521
4.7U_0805_10V4Z MC_PWREN#
1 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K 56_0402_1% 56_0402_1% 0.33U_0603_10V7K 0.01U_0402_50V7K 1
1
D 2 2
MC_PWREN 2 Q9
2
U11 G 2N7002_SOT23 TPBIAS0 JP26
PCI_AD31 125 10 +3VS S TPA0+ 4
3
PCI_AD30 AD31 VCC_PCI3V TPA0- 4
126 AD30 VCC_PCI3V 20 3 3 6 6
PCI_AD29 127 27 TPB0+ 2 5
PCI_AD28 AD29 VCC_PCI3V TPB0- 2 5
1 32 1
20 PCI_AD[0..31]
PCI_AD[0..31] PCI_AD27 2
AD28
AD27 R5C833 VCC_PCI3V
VCC_PCI3V 41
1
1
PCI_AD26 3 128 FOX_UV31413-4R1-TR
PCI_CBE#[0..3] PCI_AD25 AD26 VCC_PCI3V R420 R418
20 PCI_CBE#[0..3] 5 AD25 CONN@
PCI_AD24 6 61 56_0402_1% 56_0402_1%
PCI_AD23 AD24 VCC_RIN
9 AD23
PCI_AD22 11 16 +R5C833_ROUT
2
CLK_PCI_1394 PCI_AD21 AD22 VCC_ROUT
12 AD21 VCC_ROUT 34
PCI_AD20 14 64 2 2 2 2
AD20 VCC_ROUT
1
1
PCI_AD19 15 114
R295 PCI_AD18 AD19 VCC_ROUT C295 C235 C334 C308 C518 R419
17 AD18 VCC_ROUT 120
@ 10_0402_5% PCI_AD17 18 5.1K_0402_1%
PCI_AD16 AD17 1
0.01U_0402_16V7K1 1 1
0.47U_0603_16V4Z 270P_0402_50V7K
19 AD16 VCC_3V 67
PCI_AD15 36
2
2
PCI_AD14 AD15 0.01U_0402_16V7K 0.47U_0603_16V4Z
1 37 AD14 VCC_MD3V 86
C305 PCI_AD13 38
PCI_AD12 AD13
39 AD12 AVCC_PHY3V 98 +3VS_R5C833
@ 15P_0402_50V8J PCI_AD11 40 106 Place close to R5C833
2 PCI_AD10 AD11 AVCC_PHY3V
42 AD10 AVCC_PHY3V 110
PCI_AD9 43 112
PCI_AD8 AD9 AVCC_PHY3V
44 AD8
PCI_AD7 46 113 TPBIAS0
2 PCI_AD6
PCI_AD5
47
48
AD7
AD6
TPBIAS0
109 TPA0+
Memory Card Power Switch 2
80 XDCD0#_SDCD# 1 8
R417 MDIO00 XDCD1#_MSCD# GND OUT
MDIO01 79 2 IN OUT 7
1
100K_0402_5% PCI_CBE#3 7 78 XD_CE# R229 1 2 0_0402_5% XD_R_CE# 3 6 C549 1 C554 1 C546 1
PCI_CBE#2 C/BE3# MDIO02 XDRB#_SDWP R214 1 IN OUT
@ 21 C/BE2# MDIO03 77 2 0_0402_5% SDWP#_R_XDRB# MC_PWREN# 4 EN# FLG 5 R452
PCI_CBE#1 35 76 MC_PWREN 150K_0402_5%
2
C/BE1# MDIO04
1
PCI_CBE#0 45 75 XD_WP# R230 1 2 0_0402_5% XD_R_WP# TPS2061DRG4_SO8 4.7U_0805_10V4Z 0.1U_0402_16V4Z @
C/BE0# MDIO05 R451 2 2 2
74 5IN1_LED# 30
2
MDIO06 300_0603_5% 0.1U_0402_16V4Z
MDIO07 73
20 PCI_PAR 33 88 XDWE#_SDCMD_MSBS R209 1 2 0_0402_5% SDCMD_MSBS_R_XDWE#
PAR MDIO08 XDRE#_SDCLK_MSCLK R210 0_0402_5% SDCLK_MSCLK_R_XDRE#
20 PCI_FRAME# 23 84 1 2
1 2
FRAME# MDIO09 XD_SD_MS_D0 R228 0_0402_5% XD_SD_MS_R_D0
20 PCI_TRDY# 25 TRDY# MDIO10 82 1 2 D
20 PCI_IRDY# 24 81 XD_SD_MS_D1 R223 1 2 0_0402_5% XD_SD_MS_R_D1
IRDY# MDIO11 XD_SD_MS_D2 R224 0_0402_5% XD_SD_MS_R_D2 MC_PWREN# Q30
20 PCI_STOP# 29 STOP# MDIO12 93 1 2 2
R322 100_0402_5% 26 90 XD_SD_MS_D3 R225 1 2 0_0402_5% XD_SD_MS_R_D3 G 2N7002_SOT23
20 PCI_DEVSEL# DEVSEL# MDIO13
PCI_AD16 1 2 8 91 XD_D4 R207 1 2 0_0402_5% XD_R_D4 S
3
IDSEL MDIO14 XD_D5 R208 0_0402_5% XD_R_D5
20 PCI_PERR# 30 PERR# MDIO15 89 1 2
20 PCI_SERR# 31 92 XD_D6 R206 1 2 0_0402_5% XD_R_D6
SERR# MDIO16 XD_D7 R226 0_0402_5% XD_R_D7
MDIO17 87 1 2
85 XD_CLE R227 1 2 0_0402_5% XD_R_CLE
MDIO18 XD_ALE R211 0_0402_5% XD_R_ALE
124 83 1 2
20
20
PCI_REQ#0
PCI_GNT#0 123
REQ#
GNT#
MDIO19
58 R248 1 2 10K_0402_5% +3VS
4 IN 1 Socket Push Type(New)
3 MSEN R256 1 3
XDEN 55 2 10K_0402_5%
CLK_PCI_1394 121
16 CLK_PCI_1394 PCICLK
119 94 1394_XI JP30
20,29 PCI_RST# PCIRST# XI
GBRST# 71 95 1394_XO +3V_MCVCC 33 23 +3V_MCVCC
PM_CLKRUN# GBRST# XO XD-VCC SD-VCC
22,30 PM_CLKRUN# 117 CLKRUN# MS-VCC 14
70 96 C221 1 2 0.01U_0402_16V7K XD_SD_MS_R_D0 8
PME# FIL0 R246 2 XD-D0
REXT 101 1 10K_0402_5% XD_SD_MS_R_D1 9 XD-D1 4 IN 1 CONN SD_CLK 24 SDCLK_MSCLK_R_XDRE#
100 1 2 XD_SD_MS_R_D2 26 25 XD_SD_MS_R_D0
VREF C249 0.01U_0402_16V7K XD_SD_MS_R_D3 XD-D2 SD-DAT0 XD_SD_MS_R_D1
20 PCI_PIRQE# 115 INTA# 27 XD-D3 SD-DAT1 29
116 72 XD_R_D4 28 10 XD_SD_MS_R_D2
20 PCI_PIRQG# INTB# UDIO0/SRIRQ# SERIRQ 22,30 XD-D4 SD-DAT2
60 XD_R_D5 30 11 XD_SD_MS_R_D3
R216 10K_0402_5% UDIO1 XD_R_D6 XD-D5 SD-DAT3 SDCMD_MSBS_R_XDWE#
UDIO2 56 31 XD-D6 SD-CMD 12
+3VS 2 1 69 65 R232 1 2 10K_0402_5% +3VS XD_R_D7 32 36 XDCD0#_SDCD#
HWSPND# UDIO3 R245 1 XD-D7 SD-CD-SW
29,30,33,37,40,43,44 SUSP# 2 1 66 TEST UDIO4 59 2 10K_0402_5%
R215 0_0402_5% 57 R253 1 2 100K_0402_5% SDCMD_MSBS_R_XDWE# 6 35 SDWP#_R_XDRB#
UDIO5 XD-WE SD-WP-SW
1
@ XD_R_WP# 7
XD_R_ALE XD-WP
111 AGND GND 4 5 XD-ALE
R231 107 13 XD_CD# 34 15 SDCLK_MSCLK_R_XDRE#
100K_0402_5% AGND GND SDWP#_R_XDRB# XD-CD MS-SCLK XD_SD_MS_R_D0
103 AGND GND 22 1 XD-R/B MS-DATA0 19
102 28 SDCLK_MSCLK_R_XDRE# 2 20 XD_SD_MS_R_D1
2
1394_XI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
R5C833 5IN1 & IEEE1394
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 25 of 48
A B C D E
5 4 3 2 1
+3VALW
U35 60mil
+3V_LAN +3V_LAN
+3V_LAN R23
R24
1 2 1_1206_1% 60mil LAN BCM5787M
8 D S 1 1 2 1_1206_1% +3V_LAN_R
1 7 D S 2 1 1 1 1
C24 6 3 1 1 1 1 C28 C30 C25 C26
D S
3
5 4 C29 C58 C89 C111
4.7U_0805_10V4Z D G 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 AO4468_SO8 4.7U_0805_10V4Z 0.1U_0402_16V4Z LAN_REGCTL25 1 2 2 LAN_REGCTL12 1 2 2
@ 2 2 2 2 4.7U_0805_10V4Z 4.7U_0805_10V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z Q18 +2.5V_LAN Q6 +1.2V_LAN
+VSB 2 13VLAN_GATE MMJT9435T1G_SOT223 20mil MMJT9435T1G_SOT223 60mil
2
4
2
4
R508
200K_0402_5% 1
D C634 D
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1
@ D @ C447 C52 C449 C110 C31 C448 C80 C42 C91 C112 C39 C457 C450 C41 C464
2 0.1U_0603_25V7K
28,29,37 SYSON# 2
G 10U_0805_10V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
Q40 S @ 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
3
2N7002_SOT23 0.1U_0402_16V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
+3VALW 1 2 +3V_LAN
R19 0_1206_5%
<BOM Structure> +3V_LAN
+3V_LAN
U3
2
SPROM_DOUT SPROM_DIN
G
1 SI SO 8
SPROM_CLK 2 7
EC_PME# LAN_PME# SCK GND
1 3 3 RESET# VCC 6 +3V_LAN
SPROM_CS 4 5
D
CS# WP# 1
C114
Q52 2N7002_SOT23 AT45DB011B-SU_SO8 0.1U_0402_16V4Z
@ U2 @ @
LAN_MIDI0- 2
TRD0_N 41 LAN_MIDI0- 27
28 40 LAN_MIDI0+ Use Flash if support ASF2.0
16 CLK_PCIE_LAN# PCIE_REFCLK_N TRD0_P LAN_MIDI0+ 27
42 LAN_MIDI1-
TRD1_N LAN_MIDI1- 27
29 43 LAN_MIDI1+
16 CLK_PCIE_LAN PCIE_REFCLK_P TRD1_P LAN_MIDI1+ 27 +3V_LAN +3V_LAN
48 LAN_MIDI2-
TRD2_N LAN_MIDI2- 27
11 47 LAN_MIDI2+ +3V_LAN
CLKREQ TRD2_P LAN_MIDI2+ 27
49 LAN_MIDI3- 1
TRD3_N LAN_MIDI3- 27
R526 1 2 0_0402_5% 50 LAN_MIDI3+ C136
30 LAN_LOWPWR TRD3_P LAN_MIDI3+ 27
2
R71 1 2 10K_0402_5% 3 FOR EMI 0.1U_0402_16V4Z R128 R102
C LOW PWR 2 C
4.7K_0402_5% 4.7K_0402_5%
+3VS R88 1 2 1K_0402_5% 53 2 2 1 U4
VMAIN_PRSNT LINKLED LAN_LINK# 27
+3V_LAN 2 1 LAN_PME# 1 R541 1 8
1
R514 R89 SPD100LED A0 VCC SPROM_WP
+3V_LAN 1 2 1K_0402_5% 54 VAUX_PRSNT SPD1000LED 67 0_0402_5% 2 A1 WP 7
100K_0402_5% 66 2 1 3 6 SPROM_CLK
TRAFFICLED R542 LAN_ACTIVITY# 27 A2 SCL SPROM_DOUT
4 GND SDA 5
0_0402_5%
59 65 SPROM_CLK @ AT24C64AN-10SU-2.7_SO8
30 ENERGY_DET ENERGY_DET SCLK(EECLK)
2
63 SPROM_DIN R78 1 2 4.7K_0402_5%
+LAN_GPHYPLLVDD SI SPROM_DOUT R119
35 GPHY_PLLVDD SO(EEDATA) 64
62 SPROM_CS R77 1 2 4.7K_0402_5% 4.7K_0402_5%
PCIE_ITX_C_PRX_N3 CS @
22 PCIE_ITX_C_PRX_N3 32 PCIE_RXD_N Change to SA000003510(AT24C64)
1
PCIE_ITX_C_PRX_P3 31 Unpop if use Flash
22 PCIE_ITX_C_PRX_P3 PCIE_RXD_P
14 LAN_REGCTL12
C38 PCIE_PTX_IRX_N3 REGCTL12 LAN_REGCTL25
22 PCIE_PTX_C_IRX_N3 1 2 0.1U_0402_16V7K 25 PCIE_TXD_N REGCTL25 18
37 LAN_RDAC 1 2 Unpop if use Flash
C37 RDAC
22 PCIE_PTX_C_IRX_P3 1 2 0.1U_0402_16V7K PCIE_PTX_IRX_P3 26 PCIE_TXD_P
R62 1K for BCM5906M
1.24K_0402_1%
20mil L7 20mil
23 +LAN_XTALVDD 1 2 +2.5V_LAN L33
R67 0_0402_5% LAN_RESET# XTALVDD BLM18AG601SN1D_0603 +LAN_PCIEPLLVDD
8,20,22,24,30 PLT_RST# 1 2 10 PERST VDDIO 6 +3V_LAN 1 2 +1.2V_LAN
15 1 1 1 BLM18AG601SN1D_0603
R66 1 0_0402_5% LAN_PME# VDDIO
22,28,29 ICH_PCIE_WAKE# 2 @ 12 WAKE VDDIO 19 C43 C452 C451
R511 1 2 0_0402_5% 56 0.1U_0402_16V4Z
30 EC_PME# VDDIO
61 0.1U_0402_16V4Z
VDDIO 2 2 2
LAN_SMBCLK 58 17 +2.5V_LAN 4.7U_0805_10V4Z
SMB_CLK VDDP
VDDP 68
+3V_LAN LAN_SMBDATA
R130
57 SMB_DATA 20mil L34
VDDC 5 +1.2V_LAN
4.7K_0402_5% 13 +LAN_PCIEVDD 1 2 +1.2V_LAN
VDDC
2
B BLM18AG601SN1D_0603 B
G
1 2 +3V_LAN AVDD 52
XTALO 22 0.1U_0402_16V4Z
LAN_SMBCLK XTALO +LAN_AVDDL 2 2
16,22,28,29 ICH_SMBCLK 1 3 AVDDL 39
1
44 0.1U_0402_16V4Z
D
Y2 BCM5787MKML_QFN68 1 1 BLM18AG601SN1D_0603
1 2 LAN_XTALO C95 C463
1 25MHZ_20P 1 0.1U_0402_16V4Z
2 2
C35 C34 4.7U_0805_10V4Z
27P_0402_50V8J 27P_0402_50V8J
2 2
20mil L35
+LAN_GPHYPLLVDD 1 2 +1.2V_LAN
1 1 BLM18AG601SN1D_0603
C453 C456
A A
0.1U_0402_16V4Z
2 2
4.7U_0805_10V4Z
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN BCM5787M
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 26 of 48
5 4 3 2 1
5 4 3 2 1
LAN_LINK# LAN_ACTIVITY#
LAN BCM5787M
3
@ @
PSOT24C-LF-T7_SOT23-3 PSOT24C-LF-T7_SOT23-3
D30 D31
D D
1
1 2
C94
+2.5V_LAN 220P_0402_50V7K
JP18
+3V_LAN 2 1 12 Amber LED+
2
R70 1K_0402_5%
L12 LAN_ACTIVITY# 11
26 LAN_ACTIVITY# Amber LED-
BLM18AG601SN1D_0603 SHLD2 16
RJ45_MIDI3- 8 Guide Pin
PR4-
SHLD1 15
RJ45_MIDI3+ 7
1
T4 PR4+
1 24 RJ45_MIDI1- 6
LAN_MIDI0+ TCT1 MCT1 RJ45_MIDI0+ PR2-
26 LAN_MIDI0+ 2 TD1+ MX1+ 23
26 LAN_MIDI0- LAN_MIDI0- 3 22 RJ45_MIDI0- RJ45_MIDI2- 5
TD1- MX1- PR3-
4 TCT2 MCT2 21
26 LAN_MIDI1+ LAN_MIDI1+ 5 20 RJ45_MIDI1+ RJ45_MIDI2+ 4
LAN_MIDI1- TD2+ MX2+ RJ45_MIDI1- PR3+
26 LAN_MIDI1- 6 TD2- MX2- 19
7 18 RJ45_MIDI1+ 3
LAN_MIDI2+ TCT3 MCT3 RJ45_MIDI2+ PR2+
26 LAN_MIDI2+ 8 TD3+ MX3+ 17
26 LAN_MIDI2- LAN_MIDI2- 9 16 RJ45_MIDI2- RJ45_MIDI0- 2
C
TD3- MX3- PR1- C
10 TCT4 MCT4 15 SHLD2 14
26 LAN_MIDI3+ LAN_MIDI3+ 11 14 RJ45_MIDI3+ RJ45_MIDI0+ 1
LAN_MIDI3- TD4+ MX4+ RJ45_MIDI3- PR1+
26 LAN_MIDI3- 12 TD4- MX4- 13 SHLD1 13
LAN_LINK# 10
350uH_GSL5009LF 26 LAN_LINK# Green LED-
1
R152 R148 @ @ 1 2
49.9_0402_1% 49.9_0402_1%
@ @ R101 R115 C151
2
1
1 1
C146 C134 1 1 1 1 R132 R153 RJ45_GND 1 2 LANGND 40mil
0.1U_0402_16V4Z 0.1U_0402_16V4Z C138 C121 C152 C106 75_0402_1% 75_0402_1% 1 1
@ 2 @ 2 C154
2
1000P_1206_2KV7K C108 C96
2 2 2 2 RJ45_GND 4.7U_0805_10V4Z
2 2
0.1U_0402_16V4Z 0.1U_0402_16V4Z 40mil
Pop for BCM5906 0.1U_0402_16V4Z
LAN_LINK# 1 2
C187
68P_0402_50V8J
@
For EMI
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN Magnetic & RJ45/RJ11
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 27 of 48
5 4 3 2 1
A B C D E
1 1 1 1 1 1
C139 C480 C147 C140 C133 C137 1 1 1 1 1 1
C479 C478 C477 C483 C482 C481
4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2
1 +5VS 1
JP21 JP20
ICH_PCIE_WAKE# R543 1 @ 2 0_0402_5% 1 2 +3VS ICH_PCIE_WAKE# 1 2 +3VS
22,26,29 ICH_PCIE_WAKE# 1 2 1 2
WLAN_BT_DATA 3 4 3 4
29 WLAN_BT_DATA 3 4 3 4
WLAN_BT_CLK 5 6 +1.5VS 5 6 +1.5VS
29 WLAN_BT_CLK 5 6 5 6
16 MINI1_CLKREQ# 7 7 8 8 16 MINI2_CLKREQ# 7 7 8 8
9 9 10 10 9 9 10 10
16 CLK_PCIE_MINI1# 11 11 12 12 16 CLK_PCIE_MINI2# 11 11 12 12
16 CLK_PCIE_MINI1 13 13 14 14 16 CLK_PCIE_MINI2 13 13 14 14
15 15 16 16 15 15 16 16
17 18 TV_S_CIN 17 18
17 18 WL_OFF# TV_S_YIN 17 18
19 19 20 20 WL_OFF# 30 19 19 20 20
21 22 PLT_RST_BUF# 21 22 PLT_RST_BUF#
21 22 PLT_RST_BUF# 20 21 22
23 24 R544 1 @ 2 0_0603_5% +3VS 23 24
22 PCIE_PTX_C_IRX_N4 23 24 22 PCIE_PTX_C_IRX_N2 23 24
25 26 R545 1 2 0_0603_5% +3V 25 26
22 PCIE_PTX_C_IRX_P4 25 26 22 PCIE_PTX_C_IRX_P2 25 26
27 27 28 28 27 27 28 28
29 30 ICH_SMBCLK ICH_SMBCLK 16,22,26,29 29 30 ICH_SMBCLK
29 30 ICH_SMBDATA 29 30 ICH_SMBDATA
22 PCIE_ITX_C_PRX_N4 31 31 32 32 ICH_SMBDATA 16,22,26,29 22 PCIE_ITX_C_PRX_N2 31 31 32 32
22 PCIE_ITX_C_PRX_P4 33 33 34 34 22 PCIE_ITX_C_PRX_P2 33 33 34 34
35 35 36 36 USB20_N7 22 35 35 36 36 USB20_N8 22
37 37 38 38 USB20_P7 22 37 37 38 38 USB20_P8 22
+3VS 39 39 40 40 +3VS 39 39 40 40
41 42 (MINI1_LED#) 41 42 (MINI1_LED#)
41 42 41 42
43 43 44 44 MINI1_LED# 32 43 43 44 44
45 46 AUDIO_INL 45 46
45 46 AUDIO_INR 45 46
E51TXD_P80DATA
47
49
47 48 48
50
(9~16mA) 47
49
47 48 48
50
30 E51TXD_P80DATA 49 50 30 TV_THERM# 49 50
E51RXD_P80CLK 51 52 TV_CVBSIN 51 52
30 E51RXD_P80CLK 51 52 51 52
2 G1 2
G2
G3
G3
G1
G2
G3
G3
For MINICARD Port80 Debug FOX_AS0B226-S99N-7F FOX_AS0B226-S99N-7F
53
54
55
56
53
54
55
56
CONN@ CONN@
To USB/B Connector
3 JP11
80mil +5VALW 3
1 1 +5VALW
2 2
3 3 1
4 C368
4
5 5
6 USB20_N4 4.7U_0805_10V4Z
6 USB20_N4 22 2
7 USB20_P4
7 USB20_P4 22
8 8
9 USB20_N6
9 USB20_N6 22
10 USB20_P6
10 USB20_P6 22
11 11
12 AUDIO_INR
AV-IN Connector 12
13 13 AUDIO_INL
14 TV_S_YIN
CIR 14
15 15 TV_S_CIN
16 TV_CVBSIN_L R554 1 2 KC FBMA-11-100505-900T_0402 TV_CVBSIN
16
17 17
18 18 +3VALW
19 R536 1 2 0_0402_5%
19 RCIRRX 30
20 R537 1 2 0_0402_5%
20 SYSON# 26,29,37
ACES_87213-2000
CONN@
FOR EMI
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MINI CARD (WLAN & TV-Tuner)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 28 of 48
A B C D E
A B C D E
GND
22 CP_PE#
NC1
NC2
NC3
NC4
NC5
+3VS CPPE#
1 16 CLK_PCIE_CARD# 18 REFCLK-
C357 19
16 CLK_PCIE_CARD REFCLK+
TPS2231PWPR_PWP24 20
11
1
10
12
13
24
GND
1
0.1U_0402_16V4Z 21
2 22 PCIE_PTX_C_IRX_N1 PERn0
R338 22
22 PCIE_PTX_C_IRX_P1 PERp0
5
10K_0402_5% U15 23
CLKREQ1# GND
2 24
G Vcc
B 22 PCIE_ITX_C_PRX_N1 PETn0
4 EXP_CLKREQ# 16 22 PCIE_ITX_C_PRX_P1 25
2
Y PETp0
1 A 26 GND
1
D NC7SZ32P5X_NL_SC70-5 27 29
3
RCLKEN1 2 Q15 GND GND
28 GND GND 30
G 2N7002_SOT23
+3VS +3V +1.5VS S FOX_1CH4110C_LT
3
CONN@
1 1 1
C363 C362 C365
2 2
10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z
2 2 2
+USB_VCCA
W=80mils D12
+3VALW +3VS 1 4
1 GND VCC +USB_VCCA
1 1
C173+ C164 C167
USB20_P0 2 3 USB20_N0
150U_D2_6.3VM 470P_0402_50V7K I/O I/O
1 2 2 2
C592 C600 @ PRTR5V0U2X_SOT143
470P_0402_50V7K
0.1U_0402_16V4Z 1U_0603_10V4Z JP23
3
2
S
G 1 VCC
1 2 2 Q32 USB20_N2 2 D11
3 30 BT_ON# 22 USB20_N2 D0- 3
R482 10K_0402_5% AO3413_SOT23-3 USB20_P2 3 1 4 +USB_VCCA
22 USB20_P2 D0+ GND VCC
D 4
1
GND
C597 W=40mils 5 USB20_P2 2 3 USB20_N2
USB20_N0 VCC I/O I/O
+BT_VCC 22 USB20_N0 6 D1-
0.1U_0402_16V4Z USB20_P0 7 @ PRTR5V0U2X_SOT143
22 USB20_P0 D1+
1 8 GND
1
C590 C598
R492 9
4.7U_0805_10V4Z 300_0603_5% GND1
10 GND2
2 0.1U_0402_16V4Z
SUYIN_020122MR008S505ZL
2
CONN@
+3V
1
D
2 Q34 80mil
G 2N7002_SOT23
+5VALW
1
S +USB_VCCA
3
U6
1 8 R164
GND OUT 100K_0402_5%
2 IN OUT 7
3 6
2
IN OUT R162 1
1 4 EN# FLG 5 2 10K_0402_5% USB_OC#0 22
C171
TPS2061DRG4_SO8
+BT_VCC 4.7U_0805_10V4Z R167 1 2 10K_0402_5%
2 USB_OC#2 22
1
JP12 1 C161
1 9 C169
1 GND BT_LED# 30,32
2 0.1U_0402_16V4Z
2 26,28,37 SYSON# 2
3 0.1U_0402_16V4Z
22 USB20_P5 3 2
22 USB20_N5 4 4 R527
1
4 D 4
5 5
6 +BT_VCC 1 2 2 Q49
28 WLAN_BT_DATA 6
7 G 2N7002_SOT23
28 WLAN_BT_CLK 7
8 10 10K_0402_5% S @
3
8 GND
ACES_87213-0800G @
CONN@
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/12/25 Deciphered Date 2007/12/25 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NEW CARD & USB Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 29 of 48
A B C D E
5 4 3 2 1
ECAGND
R459 10K_0402_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
@ ACES_85205-0400
@
D
+3VALW Place on MiniCard D
JP35
111
125
22
33
96
67
1 1
9
U28 2 E51RXD_P80CLK
2 E51TXD_P80DATA
3
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
3
4 4
ACES_85205-0400
1 21 INVT_PWM @
21 EC_GA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F INVT_PWM 18
2 23 BEEP#
21 EC_KBRST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 BEEP# 34
22,25 SERIRQ 3 SERIRQ# FANPWM1/GPIO12 26 ENCODER_DIR 35
21 LPC_FRAME# 4 LFRAME# ACOFF/FANPWM2/GPIO13 27 ACOFF 38,40
C555 LPC_AD3 5 2 1 ECAGND 3S/4S# 1 2
21 LPC_AD3 LAD3
@ 22P_0402_50V8J LPC_AD2 7 PWM Output C567 0.01U_0402_16V7K R521 4.7K_0402_5%
21 LPC_AD2 LAD2
2 1 R447 2 1 @ 33_0402_5% LPC_AD1 8 63 BATT_TEMP
21 LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP 41
LPC_AD0 BATT_OVP
21 LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64 BATT_OVP 40
ADP_I/AD2/GPIO3A 65 ADP_I 40
12 AD Input 66 AD_BID0
16 CLK_PCI_LPC PCICLK AD3/GPIO3B
8,20,22,24,26 PLT_RST# 13 PCIRST#/GPIO05 AD4/GPIO42 75 ENERGY_DET 26
37 ECRST# SELIO2#/AD5/GPIO43 76 POUT 45
EC_SCI# 20
22 EC_SCI# SCI#/GPIO0E
+3VALW 2 1 22,25 PM_CLKRUN# 38 CLKRUN#/GPIO1D
R441 47K_0402_5% 68 DAC_BRIG +3VS
DAC_BRIG/DA0/GPIO3C DAC_BRIG 18
2 1 70 EN_DFAN1
EN_DFAN1/DA1/GPIO3D EN_DFAN1 36
C548 0.1U_0402_16V4Z DA Output 71 IREF
IREF/DA2/GPIO3E IREF 40
KSI0 55 72 TV_THERM# 2 1
KSI0/GPIO30 DA3/GPIO3F CHGSEL 40
+3VALW KSI1 56 R497 100K_0402_5%
KSI2 KSI1/GPIO31
57 KSI2/GPIO32
KSI3 58 83 EC_MUTE
KSI3/GPIO33 PSCLK1/GPIO4A EC_MUTE 35
2
C KSI4 59 84 LAN_LOWPWR 26 C
R466 KSI5 KSI4/GPIO34 PSDAT1/GPIO4B WL_LED# +3VALW
60 KSI5/GPIO35 PSCLK2/GPIO4C 85 WL_LED# 32
10K_0402_5% KSI6 61 PS2 Interface 86
KSI6/GPIO36 PSDAT2/GPIO4D BT_LED# 29,32
KSI7 62 87 TP_CLK 65W/90W# 2 1
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK 32
KSO0 39 88 TP_DATA R528 100K_0402_5%
TP_DATA 32
1
2
1 2 TP_CLK KSO13 52 KSO13/GPIO2D
R448 4.7K_0402_5% KSO14 53 R465
KSO14/GPIO2E
1 2 TP_DATA KSO15 54 KSO15/GPIO2F CIR_RX/GPIO40 73 EC_RCIRRX Ra 100K_0402_5%
R444 4.7K_0402_5% KSO16 81 74
KSO16/GPIO48 CIR_RLC_TX/GPIO41 ENCODER_PULSE 35
KSO17 82 89 FSTCHG
FSTCHG 40
1
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 BATT_GRN_LED# AD_BID0
BATT_CHGI_LED#/GPIO52 90 BATT_GRN_LED# 32,35
91 CAPS_LED#
CAPS_LED#/GPIO53 CAPS_LED# 32
2
EC_SMB_CK1 77 GPIO 92 BATT_AMB_LED# BATT_AMB_LED# 32,35 1
17,32,41 EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54
EC_SMB_DA1 78 93 PWR_LED PWR_LED 32 R464 C565
17,32,41 EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55
+5VALW 4 EC_SMB_CK2
EC_SMB_CK2 79 SCL2/GPIO46 SM Bus SYSON/GPIO56 95 SYSON
SYSON 29,37,43 Rb
EC_SMB_DA2 80 121 VR_ON 56K_0402_5%
4 EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON 45 2
127 ACIN 0.1U_0402_16V4Z
1
B EC_SMB_CK1 AC_IN/GPIO59 ACIN 22,41 B
1 2
R460 4.7K_0402_5%
1 2 EC_SMB_DA1 PM_SLP_S3# 6 100
22 PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# 22
R458 4.7K_0402_5% PM_SLP_S5# 14 101 EC_LID_OUT#
22 PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_LID_OUT# 22
1 2 EC_SMB_CK2 EC_SMI# 15 102 EC_ON
22 EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_ON 33
R456 4.7K_0402_5% LID_SW# 16 103
32,35 LID_SW# LID_SW#/GPIO0A EC_SWI#/GPXO06 EC_SWI# 22
1 2 EC_SMB_DA2 SUSP# 17 104 EC_PWROK EC_CRY1 EC_CRY2
25,29,33,37,40,43,44 SUSP# SUSP#/GPIO0B ICH_PWROK/GPXO06 EC_PWROK 33
R454 4.7K_0402_5% PBTN_OUT# 18 GPO 105 BKOFF#
22 PBTN_OUT# PBTN_OUT#/GPIO0C BKOFF#/GPXO08 BKOFF# 18
EC_PME# 19 GPIO 106 WL_OFF# 1 1
26 EC_PME# EC_PME#/GPIO0D WL_OFF#/GPXO09 WL_OFF# 28
25 107 MEDIA_LED# MEDIA_LED# 32 C538 C540
22 EC_THERM# EC_THERM#/GPIO11 GPXO10
4
FAN_SPEED1 28 108
36 FAN_SPEED1 FAN_SPEED1/FANFB1/GPIO14 GPXO11 CALIBRATE 40
BT_ON# 29 10P_0402_50V8J 10P_0402_50V8J
OUT
IN
29 BT_ON# FANFB2/GPIO15 2 2
E51TXD_P80DATA 30
E51RXD_P80CLK EC_TX/GPIO16
31 EC_RX/GPIO17 PM_SLP_S4#/GPXID1 110 PM_SLP_S4# 22
ON/OFF 32 112 ENBKL ENBKL 10,17
33 ON/OFF ON_OFF/GPIO18 ENBKL/GPXID2
PWR_SUSP_LED EAPD
NC
NC
32 PWR_SUSP_LED 34 PWR_LED#/GPIO19 GPXID3 114 EAPD 34
NUM_LED# 36 GPI 115 SATA_LED# SATA_LED# 21
32 NUM_LED# NUMLED#/GPIO1A GPXID4
116 5IN1_LED# 25
3
GPXID5 IDE_LED#
GPXID6 117 IDE_LED# 24
GPXID7 118 ARCADE# 32
EC_CRY1 122 X2
EC_CRY2 XCLK1 32.768KHZ_12.5P_MC-306
123 XCLK0 V18R 124
1
AGND
@ C663
C640 100P_0402_50V8J
KB926QFB1_LQFP128_14X14 2 BATT_TEMP 2 1
11
24
35
94
113
69
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE KB926
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 30 of 48
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE KB925(Reserved)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Thursday, April 19, 2007 Sheet 31 of 48
5 4 3 2 1
To TP/B Conn.
+5VALW +5VALW
JP6
1
C550 1 2 0.1U_0402_16V4Z +3VALW
R442 +5VS 6
@ C551 1 TP_DATA 5
@ 2 0.1U_0402_16V4Z 30 TP_DATA 4
100K_0402_5% TP_CLK
30 TP_CLK 3
U26
2
2
8 VCC A0 1 1
7 WP A1 2 U27 1 1
6 3 C130 ACES_85201-0605
17,30,41 EC_SMB_CK1 SCL A2
5 4 1 8 C129 CONN@
17,30,41 EC_SMB_DA1 SDA GND 30 EC_SPICS#/FSEL# CE# VDD
3 6 R443 1 2 0_0402_5% 100P_0402_50V8J 100P_0402_50V8J
WP# SCK EC_SPICLK 30 2 2
AT24C16AN-10SI-2.7_SO8 7 5 R445 1 2 0_0402_5%
HOLD# SI EC_SO_SPI_SI 30
@ 4 2 R438 1 2 0_0402_5%
VSS SO EC_SI_SPI_SO 30
TP_DATA
1
MX25L8005M2C-15G_SOP8
R437 +5VS TP_CLK
@ ENE suggestion SPI Frequency over 66MHz
3
100K_0402_5%
SST: 50MHz C149
2
MXIC: 70MHz D9
0.1U_0402_16V4Z @
ST: 40MHz PSOT24C_SOT23
1
KSI[0..7]
INT_KBD Conn. KSO[0..17]
KSI[0..7] 30
KSO[0..17] 30
JP5
(Left) KSO0 26 26 G2 28
KSO1 25 27
KSO2
KSO3
24
23
25
24
G1
To BTN/B Conn.
KSO4 23
22 22
KSO5 21
KSO6 21 +3VS +5VS
20 20
KSO7 19 JP2 +5VS
KSO8 19 +5VALW
18 18 1 1
KSO9 17 2
KSO10 17 2 C21
16 16 3 3 1 2 +3VALW
KSO11 15 4 R16 100K_0402_5%
KSO12 15 4 PWR_LED# 0.1U_0402_16V4Z D6
14 14 5 5
KSO13 13 6 2
13 6 ON/OFFBTN# 33 ARCADE# 30
KSO14 12 7 WL_R_LED# ARCADE_BTN# 1
KSO15 12 7 BT_LED# 51ON#
11 11 8 8 BT_LED# 29,30 3 51ON# 33,38
KSO16 10 9 PWR_SUSP_LED#
KSO17 10 9 KSO0 DAN202UT106_SC70-3
9 9 10 10
KSI0 8 11 KSI1 +3VALW <BOM Structure>
KSI1 8 11 KSI2
7 7 12 12
KSI2 6 13 KSI3
KSI3 6 13 KSI4 C22
5 5 14 14
KSI4 4 17 15
KSI5 4 G17 15 0.1U_0402_16V4Z PWR_LED# PWR_SUSP_LED#
3 3 18 G18 16 16
KSI6 2
KSI7 2 ACES_85201-16051
1 1
(Right) CONN@
ACES_85201-26051
1
JP36 D D
CONN@ 1 30 PWR_LED 2 30 PWR_SUSP_LED 2
G G
2
+5VS S Q4 S Q37
3
KSO15 C74 100P_0402_50V8J KSO7 C66 100P_0402_50V8J 3 2N7002_SOT23 2N7002_SOT23
1 2 1 2 4 +3VALW
5 LID_SW# 30,35
KSO14 C73 1 2 100P_0402_50V8J KSO6 C65 1 2 100P_0402_50V8J KSI5
6 KSO0
KSO13 C72 100P_0402_50V8J KSO5 C64 100P_0402_50V8J 7 ARCADE_BTN#
1 2 1 2 8
9 NUM_LED# 30
KSO12 C71 1 2 100P_0402_50V8J KSO4 C63 1 2 100P_0402_50V8J @
10 CAPS_LED# 30
MEDIA_LED# 30 WL_R_LED# 1 2
11 WL_LED# 30
R529 0_0402_5%
KSI0 C75 100P_0402_50V8J KSO3 C62 100P_0402_50V8J 12
1 2 1 2 1 2 MINI1_LED# 28
ACES_85201-1205 R530 0_0402_5%
KSO11 C70 1 2 100P_0402_50V8J KSI4 C54 1 2 100P_0402_50V8J CONN@
KSO10 C69 1 2 100P_0402_50V8J KSO2 C61 1 2 100P_0402_50V8J
KSI3 C78 1 2 100P_0402_50V8J KSI6 C56 1 2 100P_0402_50V8J KSO0 ON/OFFBTN# C646 1 2 @ 100P_0402_50V8J LID_SW# C655 1 2 @ 100P_0402_50V8J
KSO8 C67 1 2 100P_0402_50V8J KSI7 C57 1 2 100P_0402_50V8J KSI1 WL_BTN# WL_R_LED# C647 1 2 @ 100P_0402_50V8J KSI5 C656 1 2 @ 100P_0402_50V8J
R357 LED2
300_0402_5%
1 2 3 1 BATT_GRN_LED#
+5VALW YG
BATT_GRN_LED# 30,35 Security Classification Compal Secret Data Compal Electronics, Inc.
R494 2006/12/25 2007/12/25 Title
4 2 BATT_AMB_LED#
Issued Date Deciphered Date
+5VALW 1 2
453_0402_1%
A
BATT_AMB_LED# 30,35
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BIOS, I/O Port & K/B Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
HT-297DQ/GQ_AMB/YG_0603 B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 32 of 48
A B C D E
Power Button
ON/OFF switch HDA MDC Conn.
+3VALW
TOP Side +3V
1 2
1 R534 @ 10K_0603_5% 1
1
2
20mil C127
1 2 R434 JP17
R535 @ 10K_0603_5% 1U_0603_10V4Z
100K_0402_5% 2
1 GND1 RES0 2 1 2
Bottom Side 21 HDA_SDOUT_MDC 3 4 R522 0_0402_5%
1
D27 IAC_SDATA_OUT RES1
5 GND2 3.3V 6 +3V
2 ON/OFF 30 21 HDA_SYNC_MDC 7 IAC_SYNC GND3 8
ON/OFFBTN# 1 21 HDA_SDIN1 1 2 HDA_SDIN1_MDC 9 10
32 ON/OFFBTN# IAC_SDATA_IN GND4
3 51ON# R117 33_0402_5% 11 12
51ON# 32,38 21 HDA_RST_MDC# IAC_RESET# IAC_BITCLK HDA_BITCLK_MDC 21
1
DAN202UT106_SC70-3
R509
GND
GND
GND
GND
GND
GND
0_0402_5%
ACES_88018-124G
13
14
15
16
17
18
2
1
2 CONN@ 1
C545 D26 C128
Connector for MDC Rev1.5
1000P_0402_50V7K RLZ20A_LL34 22P_0402_50V8J
1 2
2
For EMI
1
D
EC_ON 2 Q27
30 EC_ON
G
2
S 2N7002_SOT23
R428 3
10K_0402_5%
2 2
1
Power ON Circuit
+3VS
+3VALW +3VALW
RTC Battery
1
U14A U14B
R331 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14
14
14
180K_0402_5%
P
P
2
1 I O 2 3 I O 4 1 2 SYS_PWROK 8,22
R324 @ 0_0402_5%
1
37,42 SUSP 2
2
For South Bridge - BATT1 + +RTCBATT
7
G C300
Q13 S 1U_0805_25V4Z 2 1 +RTCBATT
3
2N7002_SOT23 1
30 EC_PWROK 1 2
R318 0_0402_5%
2
3 3
ML1220T13RE R15
+3VS 45@ 1K_0402_5%
+3VALW +3VALW
1 1
1
D5
R328
U14C U14D
14
14
P
2
SUSP# 1 2 5 6 9 8
25,29,30,37,40,43,44 SUSP# VS_ON 44
2
I O I O
2
G
RB751V_SOD323 C333
For +VCCP/+1.05VS BAS40-04_SOT23-3
+CHGRTC
7
0.1U_0402_16V4Z 1
1 C20
0.1U_0402_16V4Z
2
+3VALW
C319
+3VALW
1 2 0.1U_0402_16V4Z
Change BATT1 P/N : SP093PA0200 (Panasonic)
2005/10/20 U14E U14F
14
14
SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14
SP093MX0000 (MAXELL)
R307 PM@ 200K_0402_5%
P
SUSP# 1 2 11 10 13 12 1 2
I O I O VGA_ON 17
R552 0_0402_5%
G
+3VS 1 2
7
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power OK, Reset and RTC Circuit, TP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 33 of 48
A B C D E
A B C D E F G H
+VDDA
28.7K for Module Design (VDDA = 4.702)
1
R478 +5VAMP (output = 250 mA)
10K_0402_5% 60mil U32
+5VS L49 1 2 4 VIN VOUT 5 40mil +VDDA
KC FBM-L11-201209-221LMAT_0805
2
1 1 2 DELAY SENSE or ADJ 6 1 4.85V
1 2 L50 1 2 C581 C588 R467
C591 1U_0402_6.3V4Z KC FBM-L11-201209-221LMAT_0805 7 1 30K_0402_1% C576
ERROR CNOISE
1
10U_0805_10V4Z 10U_0805_10V4Z
R483 2 2
0.1U_0402_16V4Z 2
8 3 1
1
10K_0402_5% SD GND C587
1 SI9182DH-AD_MSOP8 1
1
2
C599 2
1 2 MONO_IN R470
1U_0402_6.3V4Z 0.1U_0402_16V4Z 10K_0402_1%
2
1
C 1 2
C604 1 R490 Q33 R485 2.4K_0402_1%
30 BEEP# 2 1 2 2
1U_0402_6.3V4Z B
560_0402_5% E 2SC2411K_SOT23
3
C609 1 R491
22 SB_SPKR 2 1 2
1U_0402_6.3V4Z
1
560_0402_5%
D29
R493 RB751V_SOD323
10K_0402_5%
2
HD Audio Codec
L51
+AVDD_HDA MBK1608121YZF_0603
20mil 0.1U_0402_16V4Z +3VS_DVDD 1 2 +3VS
L47 1 2 0.1U_0402_16V4Z 40mil 1 1 1
+VDDA
FBM-L11-160808-800LMT_0603 1 1 1 C595 C594 C593
C573 C569
C572 10U_0805_10V4Z
2 10U_0805_10V4Z 2 2 2 2
25
38
9
2 2 2 U33
0.1U_0402_16V4Z 0.1U_0402_16V4Z
DVDD
AVDD1
AVDD2
DVDD_IO
14 35 HP_LEFT
NC LINE_OUT_L HP_LEFT 35
15 36 HP_RIGHT
NC LINE_OUT_R HP_RIGHT 35
1 2 MIC2_C_L 16 39 AMP_LEFT
MIC2_L HP_OUT_L AMP_LEFT 35
C589 4.7U_0805_6.3V6K
35 INT_MIC_R
1 2 MIC2_C_R 17 41 AMP_RIGHT
MIC2_R HP_OUT_R AMP_RIGHT 35
C586 4.7U_0805_6.3V6K
LINE_L 1 2 LINE_C_L 23 45
35 LINE_L LINE1_L NC
C580 4.7U_0805_6.3V6K
LINE_R 1 2 LINE_C_R 24 46
35 LINE_R LINE1_R DMIC_CLK
C577 4.7U_0805_6.3V6K For EMI
18 CD_L NC 43
20 CD_R NC 44 1 2 1 2 C596
R507 0_0402_5% 22P_0402_50V8J
19 CD_GND
BIT_CLK 6 HDA_BITCLK_AUDIO 21
MIC1_L 1 2 MIC1_C_L 21
35 MIC1_L MIC1_L
C583 4.7U_0805_6.3V6K
MIC1_R 1 2 MIC1_C_R 22 8 HDA_SDIN0_AUDIO 1 2 HDA_SDIN0 21
35 MIC1_R MIC1_R SDATA_IN
C579 4.7U_0805_6.3V6K R486 33_0402_5%
MONO_IN 12 37
PCBEEP MONO_OUT WOOFER_MONO 35
LINE1_VREFO 29
21 HDA_RST_AUDIO# 11 RESET#
3 3
GPIO1 31
21 HDA_SYNC_AUDIO 10 SYNC 10mil
MIC1_VREFO_L 28 MIC1_VREFO_L
21 HDA_SDOUT_AUDIO 5 SDATA_OUT
MIC1_VREFO_R 32 MIC1_VREFO_R
2 GPIO0
3 GPIO3 MIC2_VREFO 30 MIC2_VREFO
R481 2 1 5.1K_0402_1% SENSE_A 13
35 HP_PLUG# SENSE A
34 27 CODEC_VREF 10mil
R484 1 SENSE B VREF
35 LINEIN_PLUG# 2 10K_0402_1% 1
R479 2 1 20K_0402_1% 47 40
35 MIC_PLUG# 30 EAPD EAPD JDREF C571
1
35 SPDIF 1 2SPDIF_R 48 SPDIFO NC 33 10U_0805_10V4Z
R480 0_0402_5% R476 2
4 26 20K_0402_1%
DVSS1 AVSS1
7 DVSS2 AVSS2 42
2
ALC268-GR_LQFP48_9X9
Sense Pin Impedance Codec Signals 1
R538
2
0_0805_5%
1
R489
2
0_0805_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD Audio Codec ALC268
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 34 of 48
A B C D E F G H
A B C D E
11
19
20
10
1
1 2 AMP_LEFT_C-1 1 2 AMP_LEFT_C U31 CONN@
34 AMP_LEFT C584 C585 1U_0402_6.3V4Z
CVDD
HVDD
PVDD
PVDD
VDD
1
1
0.47U_0603_16V4Z JP34
1 R477 R475 SPKR+ R28 SPK_R+ 1
1 2 0_0603_5% 1 1
SPKR- R26 1 2 0_0603_5% SPK_R- 2
560_0402_5% 560_0402_5% SPKR+ 2
3 22
5
INR_A ROUT+
21 SPKR- Right
2
INL_A ROUT-
HPF Fc = 604Hz R473 1 SPKL+
3 G1
2 100K_0402_5% 27 /AMP EN LOUT+ 8 4 G2
9 SPKL-
R469 1 LOUT-
+5VAMP 2 100K_0402_5% 24 HP EN
ACES_88266-02001
17 HPOUT_R CONN@
+5VAMP HP_RIGHT HP_RIGHT_C 1 HP_RIGHT_R HP_R HPOUT_L +5VAMP +5VAMP
34 HP_RIGHT 1 2 2 4 INR_H HP_L 18
C574 2.2U_0805_10V6K R471 39K_0402_5% HP_LEFT_R 6
HP_LEFT HP_LEFT_C INL_H
34 HP_LEFT 1 2 1 2
1
2
R472 15
CVSS
2
30K_0402_5% 28 R550
BEEP R350
VSS 16 100K_0402_5%
1
D
1 12 1 100K_0402_5%
2
CP+ C563
14 2 2
1 1
VOL_AMP C561 CP- GND G
23 1U_0603_10V4Z
1
PGND
3
S D Q54
1U_0603_10V4Z 25 7 S
3
BIAS PGND
1
D 2 2 G
SPDIF_PLUG#
CGND 13 <BOM Structure> 2 2
1
3
100K_0402_1% C644 S Q51 APA2057A_TSSOP28 AO3413_SOT23-3 2N7002_SOT23
S/PDIF Out JACK
3
1
MIC2_R_1 15 16 MIC_PLUG# +5VAMP
MIC2_L_1 15 16 R51 C416
17 17 18 18 9
1
+5VAMP 19 20 BATT_GRN_LED# BATT_GRN_LED# 30,32 2.2K_0402_5%
19 20 BATT_AMB_LED# 2
34 WOOFER_MONO 21 21 22 22 BATT_AMB_LED# 30,32 C612 15mil R556 SINGA_2SJ-E373-T01
23 24 PWR_LED# PWR_LED# 32 JP4 0_0402_5% 100P_0402_50V8J CONN@
2
23 24 PWR_SUSP_LED# 0.1U_0402_16V4Z INT_MIC_R
30 EC_MUTE 25 25 26 26 PWR_SUSP_LED# 32 1 1 INT_MIC_R 34
+3VALW 27 28 2 R523 0_0603_5%
LID_SW# 30,32
2
27 28 2 R524 0_0603_5%
29 30
29 30 +5VALW 1
C36 LINE-IN JACK
31 GNDGND 32 S/PDIF Jack +3VALW G1 3
4 220P_0402_50V7K JP33
ACES_88107-30001
LINE-IN Jack G2 2
8
MIC-IN Jack ACES_88266-02001 7
CONN@ C614 CONN@
Sub-Woofer
Lid Switch 0.1U_0402_16V4Z
34 LINEIN_PLUG#
LINEIN_PLUG# 5
3 INT_MIC_R 3
4
L54 FBM-11-160808-700T_0603
LINE_R 1 2 LINE_R_R 3
34 LINE_R
3
6
@ LINE_L 1 2 LINE_L_R 2
34 LINE_L
L55 FBM-11-160808-700T_0603 1
Volume Control Circuit +3VS
PSOT24C-LF-T7_SOT23-3
D32
1 1
SINGA_2SJ-E351-S03
+3VS C613 C601 CONN@
1
220P_0402_50V7K 220P_0402_50V7K
(HDA Jack)
1
C347 2 2
+3VS 2 1 R330
1
+3VS
GND
U12 1 JP32
2
NC
2 1 2 2 4 0.1U_0402_16V4Z 7
A R436 10K_0402_5% A Y
G
1
2
1 NC7SZ14P5X_NL_SC70-5 U13 MIC_PLUG# 5
34 MIC_PLUG#
3
2
B R446 10K_0402_5% CP1 D2
4 SD1# CP2 11 34 MIC1_R 1 2 FBM-11-160808-700T_0603 MIC2_R_1 3
1 1 5 10 L52 6
GND
Q1 SD2#
0.01U_0402_16V7K
0.01U_0402_16V7K
2 2 TC74LCX74FT_TSSOP14 SINGA_2SJ-E351-S01
0.1U_0402_16V4Z
2 C603 C602 CONN@
4 220P_0402_50V7K 220P_0402_50V7K 4
2 2
(HDA Jack)
ENCODER_DIR 30
ENCODER_PULSE 30
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Amplifier & Audio Jack
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 35 of 48
A B C D E
H29 H20 H3 H18 H2 H11 H10 H30 H4
H_S354D138 H_S354D138 H_S354D138 H_S354D138 H_S354D138 H_S354D138 H_S354D138 H_S354D138 H_S354D138
FAN1 Conn @ @ @ @ @ @ @ @ @
1
+5VS
C443 10U_0805_10V4Z +5VS
1 2 H15 H19 H1 H24 H28
H_S354D138 H_C315BC236D138 H_C315BC236D138 H_S354BC140D138 H_C335BC140D138
1
U20 D22
1 8 1SS355_SOD323-2 @ @ @ @ @
1
VEN GND
2 VIN GND 7
+VCC_FAN1 3 6
2
EN_DFAN1 VO GND D21 H6 H16 H17 H7
30 EN_DFAN1 4 VSET GND 5
1 2 Change to SC1BAS16000 H_C236BC168D165 H_C236BC168D165 H_C236BC168D165 H_C236BC168D165
G993P1UF_SOP8
BAS16_SOT23-3 For CPU Support Breket
C446 @ @ @ @
1
10U_0805_10V4Z
1 2
+3VS C445 H13 H14 H32 H33 H31
1000P_0402_50V7K H_C236BC131D128 H_C236BC131D128 H_C236BC131D128 H_C236BC131D128 H_C236BC131D128
1 2
For FAN and MXM
1
R365 @ @ @ @ @
1
10K_0402_5%
40mil JP16
2
+VCC_FAN1 H21 H8
1 H_C236BC131D128 H_C236BC131D128 H5 H27
30 FAN_SPEED1 2 H_C158D158N H_O197X158D197X158N
3
1
C442 ACES_85205-03001 @ @ For MDC
1
1000P_0402_50V7K CONN@ @ @
1
2
1
FD1 FD2 FD3 FD4 FD5 FD6
@ @ @ @ @ @
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
@ @ @ @ @
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
@ @ @ @ @
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FAN & Screw Hole
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 36 of 48
A B C D E
2
U22 U34 R455
8 1 8 1 100K_0402_5%
D S D S
7 D S 2 7 D S 2
2
6 3 1 1 6 3 1 1
1
D S C503 C495 R411 D S C633 C629 R506
1 1 5 D G 4 1 5 D G 4
C498 C504 470_0603_5% C631 470_0603_5% SYSON#
26,28,29 SYSON#
AO4468_SO8 10U_0805_10V4Z AO4468_SO8 10U_0805_10V4Z
1
10U_0805_10V4Z 2 2
1U_0603_10V4Z 2 2
1U_0603_10V4Z D
1
1 2 2
10U_0805_10V4Z 2
10U_0805_10V4Z SYSON Q29 1
29,30,43 SYSON 2
G 2N7002_SOT23
1
D D
S
3
1
2 SUSP 2 SBPWR_EN#
G G R440
+VSB 2 1 5VS_GATE S Q23 +VSB 2 1 3V_GATE S Q38 100K_0402_5%
3
R412 2N7002_SOT23 R505 2N7002_SOT23
200K_0402_5% 1 200K_0402_5% 1
2
1
D C506 C632
1
SUSP D
2
Q24G 0.1U_0603_25V7K SBPWR_EN# 2 0.1U_0603_25V7K
2N7002_SOT23 S 2 Q39G 2 +5VALW
3
2N7002_SOT23 S
2
R462
100K_0402_5%
1
SUSP
+3VALW TO +3VS 33,42 SUSP
1
+3VALW +3VS D
2 Q31
25,29,30,33,40,43,44 SUSP#
U10 G 2N7002_SOT23
8 1 S
3
D S
1
7 D S 2
2
6 3 1 1 R457
D S C301 C299 R306 100K_0402_5%
1 1 5 D G 4
C344 C343 470_0603_5%
AO4468_SO8 10U_0805_10V4Z
2
10U_0805_10V4Z 2 2
1U_0603_10V4Z
1 1
2 2 2
10U_0805_10V4Z 2
D
2 SUSP
G
S Q12
3
5VS_GATE 2N7002_SOT23
+5VALW
2
+1.8V to +1.8VS R379
100K_0402_5%
+1.8V +1.8VS
1
U24
8 D S 1
7 2 1 1 23 SBPWR_EN# SBPWR_EN#
D S
2
6 3 C533 C531
D S R427
1 1 5 D G 4
C553 C547 10U_0805_10V4Z 470_0603_5%
1
SI4856ADY_SO8 PM@ 2 2
1U_0603_10V4Z PM@ D
10U_0805_10V4Z PM@ PM@ 30 SBPWR_EN 2
1
PM@ 2 2
10U_0805_10V4Z G
PM@ SI4856/AO4430 Q43 S
3
1
1
D 2N7002_SOT23
2 SUSP R510
G 100K_0402_5%
+VSB 2 1 1.8VS_GATE S Q26
3
R439 2N7002_SOT23
2
510K_0402_5% 1 PM@
3 PM@ C542 3
1
D
SUSP 2 0.1U_0603_25V7K
G 2 PM@
Q28 S
3
2N7002_SOT23
PM@
1
1
D D D D D
2 SUSP 2 SUSP 2 SUSP 2 SUSP 2 SYSON#
G G G G G
S Q11 S Q19 S Q22 S Q16 S Q25
3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC Interface
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICL50/ICK70 M/B LA-3551P Schematic
Date: Monday, April 23, 2007 Sheet 37 of 48
A B C D E
A B C D
PJP1 PL1
6 ADPIN VIN
G2 FBMA-L18-453215-900LMA90T_1812
G1 5 1 2
1
560P_0402_50V7K
12P_0402_50V8J
PR1
560P_0402_50V7K
12P_0402_50V8J
4 4 10_1206_5%
1
PC1
PC2
PC3
PC4
1 PR2 1
1 2
3 1K_1206_5%
2
3
1 2
PD1
2 RLZ24B_LL34 PQ1
2 PR3 TP0610K-T1-E3_SOT23-3
VIN PD2 1K_1206_5%
B+
2
1 1 2 1 1 2 3 1
RLS4148_LL34 PR4
E&T_4510-E04C-01R 1K_1206_5%
1 2
100K_0402_5%
100K_0402_5%
1
1
PR5
PR7
PR6
1K_1206_5%
2
1 2
2
VIN
1
PD3
PR8
1
PD4 RLS4148_LL34 100K_0402_5%
RB751V-40TE17_SOD323-2 PQ2
1 1
2 1 DTC115EUA_SC70-3
1 2
BATT+
2 PR9 30,40 ACOFF 2 2
33_1206_5% VS PQ3
PQ4 DTC115EUA_SC70-3
TP0610K-T1-E3_SOT23-3
2 2
3
CHGRTCP 3 1
0.22U_1206_25V7K
1
3
1
PR10
PC5
100K_0402_5% PC6
0.1U_0603_25V7K
2
PR11
B+
2
22K_0402_5% PR12
32,33 51ON# 1 2 VL 2.2M_0402_5%
2 1
1
VS PR13
499K_0402_1%
1
1
PR14
2
RTCVREF PR15 100K_0402_1%
200_0805_5% PU2A
3.3V PU1 LM393DT_SO8
8
G920AT24U_SOT89-3 21,39,41 MAINPWON PD5
2
PR16 PR17 2 3
P
3 3
+
1 2 1 2 3 OUT IN 2 1 1 O
0.01U_0402_25V7K
+CHGRTC 40 ACON 3 2
-
1
1
560_0603_5% 560_0603_5%
4.7U_0805_6.3V6K
1
1
GND
1000P_0402_50V7K
32.8
PC8
PC9
PC7 RB715F_SOT323-3 PR18
4
1
1
1U_0805_25V4Z 191K_0402_1%
2
PC11
PC10 PR19
2
2
0.1U_0603_25V7K 499K_0402_1%
PRG++ 2
2
ACIN
PR20 PQ5 PR21
Precharge detector
1
34K_0402_1% D RHU002N06_SOT323-3 47K_0402_5%
Min. typ. Max. RTCVREF 2 1
G
2 2 1
PACIN 40,41
1
H-->L 14.589V 14.84V 15.243V S
3
PQ6
1
DTC115EUA_SC70-3
L-->H 15.562V 15.97V 16.388V @ PR22
66.5K_0402_1% 2 +5VALW
BATT ONLY
2
Precharge detector
3
Min. typ. Max.
4
H-->L 6.138V 6.214V 6.359V 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DCIN/DECTOR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B ICL50/ICK70 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, April 19, 2007 Sheet 38 of 48
A B C D
A B C D
MAX8744_B+
MAX8744_B+
B+
PL2
FBMA-L18-453215-900LMA90T_1812
1 2
2200P_0402_50V7K
2200P_0402_50V7K
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
1
1
1
PC13
PC12
PC16
8
7
6
5
5
6
7
8
PC14
PC15
1 1
D
D
D
D
D
D
D
D
2
2
PQ8
PQ7 SI4800BDY-T1-E3_SO8
SI4800BDY-T1-E3_SO8
G
S
S
S
S
S
S
1
2
3
4
4
3
2
1
PL3 PU3
10UH_SIL104R-100PF_4.4A_30% MAX8744ETJ+_TQFN32_5X5
PC17
1 2 1U_1206_25V7K
+3VALWP 33 21 1 2
EP IN
2.2_1206_5%
SI4810BDY-T1-E3_SO8
2
5
6
7
8
PQ9
2.2_1206_5%
2.61K_0402_1%
DH3 25 16 DH5
DH3 DH5
8
7
6
5
PR23
@ PR195
@ PR196
PR24 PR25
SI4810BDY-T1-E3_SO8
D
D
D
D
6.81K_0402_1%
330U_D3L_6.3VM_R25M
2 1 BST3A 26 15 BST5A 2 1
D
D
D
D
BST3 BST5
2
1 0_0603_5%
1 2
2
2
PR26
10UH_SIL104R-100PF_4.4A_30%
1
G
S
S
S
PQ10
+ 0.1U_0603_25V7K 2.61K_0402_1%
G
S
S
S
680P_0402_50V7K
PC18
PR28 0.1U_0603_25V7K 2 1
4
3
2
1
1
680P_0402_50V7K
PC162
6.49K_0402_1% LX3 24 17 LX5
1
1
2
3
4
2
2 LX3 LX5
PC161
2 1
0.22U_0603_16V7K
2
2
6.49K_0402_1%
DL3 23 18 DL5 @
DL3 DL5
2
1 2 @
PL4
PR29
2
10K_0402_1%
PC22
PC21 19
PGND
PR30
2 0.22U_0603_16V7K CSH3 29 2
1
CSH3
1
CSL3 28 12 CSH5
CSL3 CSH5
1
13 CSL5
CSL5
1
PC23 FB3 30 FB3 +5VALWP
15.4K_0402_1%
1000P_0402_50V7K
2VREF_8744
1
PC25
2
1 2 7 11 FB5 1000P_0402_50V7K
REF FB5
PR31
PC26
2
PC24 0.22U_0603_10V7K VL 4.7U_0805_6.3V6K
150U_D2_6.3VM
2 DRVA LDO5 20 1 2
1
@ PR32 0_0402_5% 1
SKIP 10 2 12VREF_8744
2
+3VALWP Ipeak = 5.5A; Imax = 4A +
PC27
32 OUTA
10K_0402_1%
PR33
PR182 0_0402_5%
PGOODA 22 1 2
PZD1 2
31 FBA
DCR = 35m ohm(max) ; Rcs = 24.96m ohm RLZ5.1B_LL34 PR34
1
VS 100K_0402_5% 27
PGOOD3 SPOK 41
1 21 2 4 SHDN
DCR = 29m ohm(typical) ; Rcs = 20.68m ohm
2
200K_0402_5%
PGOOD5 14
2
PR35
PC28 6 PR36
ON5
Ilimit = 185mV/24.96m ~ 215mV/20.68m 0.22U_0603_25V7K
3 ILM
0_0402_5%
2 12VREF_8744
1
ILIM
= 7.41A ~ 10.39A
FSEL
5
GND
ONA
1
ON3
2
+5VALWP Ipeak = 5.5A ; Imax = 4A
499K_0402_1%
2
Iocp(mean) = Ilimit -Delta I/2 =6.956A~9.936A
@ PR37
3 3
0_0402_5%
@ PR38
8
0_0402_5%
DCR = 35m ohm(max) ; Rcs = 24.96m ohm
PR39
1
2
Delta I=((Vin-Vo)*D)/(F*L)
0_0402_5%
PR179
2VREF_8744
1
PR40
0_0402_5%
21,38,41 MAINPWON 2VREF_8744 1
=((19-3.3)*(3.3/19))/(300K*10U) 2 1 1 2
=0.908A PR41
Ilimit = 185mV/24.96m ~ 215mV/20.68m
1
@ 47K_0402_5%
= 7.41A ~ 10.39A
0.047U_0402_16V7K
1
PC29
1U_0603_6.3V6M
=6.796A~9.776A
2
fESR<=fOSC/π ; fESR=1/(2*π*RESR*COUT)
ON3 = REF --->3.3V starts up delay 2ms after 5V starts up @
Delta I=((Vin-Vo)*D)/(F*L)
=((19-5)*(5/19))/(300K*10U)
1.228A
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+5VALWP/+3VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom ICL50/ICK70 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, April 19, 2007 Sheet 39 of 48
A B C D
A B C D
Iada=0~4.74A(90W)
ADP_I = 19.9*Iadapter*Rsense
CP = 85%*Iada ; CP = 4.07A
PQ29 P2 PQ30
AO4407_SO8 AO4407_SO8 P3
PR151
0.02_2512_1%
B+ PL15
CHG_B+
PQ31
AO4407_SO8
VIN 8 1 1 8 FBMA-L18-453215-900LMA90T_1812 1 8
7 2 2 7 1 4 1 2 2 7
6 3 3 6 3 6
5 5 2 3 CSIN 5
1 1
2200P_0402_25V7K
10U_1206_25V6M
10U_1206_25V6M
0.1U_0603_25V7K
CSIP
4
PQ43
1
TP0610K-T1-E3_SOT23-3
PC123
PC124
1
5600P_0402_25V7K
PC125
PC126
PR154
0.1U_0603_25V7K
PR152 3 1 DCIN 47K_0402_1%
2
P3
2
47K_0402_1% PR153 1 2
VIN
1
100K_0402_1%
PC127
PC128
200K_0402_1%
PQ44
2
1
PR184
DTC115EUA_SC70-3 PD11
2
1SS355TE-17_SOD323-2
PD17 PR155 1 2 ACOFF
2
3
2
DTA144EUA_SC70-3 PD16 2 1 21
1SS355TE-17_SOD323-2 3 SUSP#
1
2 1 2 6251VDD 100K_0402_1% SUSP# 25,29,30,33,37,43,44 PR156
2.2U_0603_6.3V6K
RB715F_SOT323-3 200K_0402_1%
PC130
PR157 1 2 VIN
3
1
10K_0402_5%
1
2 1 PU10 PC131
30 FSTCHG
1
0.1U_0603_25V7K
1
2
1 2 1 24 DCIN 2 1 PD13
VDD DCIN
100K_0402_1%
6251VDD 1 2 PC153 PQ33 1SS355TE-17_SOD323-2
0.1U_0402_16V7K DTC115EUA_SC70-3 2 1 2
PR159
2 PR158 2 23
PQ34 47K_0402_5% PQ35 ACSET ACPRN PR197 PQ36
1
DTC115EUA_SC70-3 DTC115EUA_SC70-3 20_0603_5% D RHU002N06_SOT323-3
1
0.1U_0603_25V7K
6251_EN 3 22 1 2 2 PACIN
3
EN CSON
1
2
D
PC132
2 @ PC134
@PC134 PC133 PQ38 G
30 3S/4S#
3
5
6
7
8
2 PR160 680P_0402_50V7K 0.047U_0603_16V7K SI4800BDY-T1-E3_SO8 S
3
G 150K_0402_1% CSON 1 2 4 21 1 2 CSOP
D
D
D
D
1
CELLS CSOP
S PQ37 PR161
3
2
RHU002N06_SOT323-3 PC135 6800P_0402_25V7K 20_0603_5% 2
2
3
1 2 5 ICOMP CSIN 20 2 1
G
S
S
S
PR162 20_0603_5%
PC137 PR163 10K_0402_1% PC136 0.1U_0603_25V7K
4
3
2
1
1 2 1 2 6 19 1 2 PR165
1
PR164 VCOMP CSIP PR198 PL16 0.02_2512_1%
0.01U_0402_25V7K 1
2 100_0402_1% 2.2_0603_5% 10UH_PCMB104T-100MS_6A_20% BATT+
PR166 PC138 1 2 7 18 LX_CHG 1 2 CHG 1 4
ICM PHASE
1
22K_0402_5% D 100P_0402_50V8J
4.7_1206_5%
PACIN 1 2 2 PQ39 2 3
38,41 PACIN
1
SI4800BDY-T1-E3_SO8
G RHU002N06_SOT323-3
30 ADP_I 6251VREF 8 17 DH_CHG
VREF UGATE
PR199
S PC139 PR167 PC140
3
5
6
7
8
10U_1206_25V6M
PR168 1 2 2.2_0603_5% 0.1U_0603_25V7K
10U_1206_25V6M
80.6K_0402_1% 9 16 BST_CHG 1 2 BST_CHGA 2 1
D
D
D
D
CHLIM BOOT
PQ40
ACON 2 1 0.1U_0402_16V7K
38 ACON
1 2
30 IREF
1
PC141
PC142
0.01U_0402_25V7K
PD14
6251aclim 10 15 6251VDDP RB751V-40TE17_SOD323-2
ACLIM VDDP
1
G
S
S
S
680P_0402_50V7K
PC163
2
1
PC143
4
3
2
1
2
DTC115EUA_SC70-3 100K_0402_1% 11 14 DL_CHG
VADJ LGATE
2
PR171
2
ACOFF 2 4.7_0603_5%
30,38 ACOFF
2
12 13 PC144
1
GND PGND 4.7U_0805_6.3V6K
PR173
274K_0402_1% ISL6251AHAZ-T_QSOP24
3
6251VREF
D
3 1 1 2
PQ42
1
SI2301BDS-T1-E3_SOT23-3
G
2
PR174
3 CP mode 100K_0402_1% PR183 3
Iinput=(1/0.02)((0.05*Vaclm)/2.39+0.05) 274K_0402_1%
where Vaclm=1.502V, Iinput=4.07A 6251VREF
OVP voltage :
2
1
Vaclim=2.39*((10K//152K)/((5.76K//152K)+(10K//152K)))
BATT+
LI-4S :18.0V--BATT-OVP=2.677V
@PR186
@PR186 VS
1
D
=1.502V 100K_0402_1% 6251_EN BATT-OVP=0.1487*BATT+
2 PQ45
1
G RHU002N06_SOT323-3 C LI-3S :13.50V--BATT-OVP=2.007V
2
30 CALIBRATE
1
30 CHGSEL S 2 @ PQ46
3
BATT-OVP=0.1487*BATT+
0.01U_0402_25V7K
B 2SC2411K_SOT23-3 PR175
CC=0.6~4.48A 0.01U_0402_25V7K
E 845K_0603_1%
3
1
1
PC154
PC145
IREF=0.7224*Icharge
2
2
@ @ PR187
@PR187 PR192
1
CSON 20K_0402_1% 11.5K_0402_1%
IREF=0.43V~3.24V
2
2.37K_0402_1%
UMA@ PR193
PU11A
1
PR177 LM358ADT_SO8
2
10K_0402_5% PR194
Charging Voltage + 3
P
1 2 1 20K_0402_1%
BATT Type 3S/4S# CHGSEL CV mode 0
(0x15) 30 BATT_OVP - 2
G
VS
0.01U_0402_25V7K
2
1
UMA@ PQ47
4
1
1
PC146
1
LM358ADT_SO8 200K_0402_1% 0.01U_0402_25V7K D
8
2
2
2
5 30 65W/90W# G
P
2
+
7 S
2800mAH 3S pack 13050mV HIGH LOW 12.90V
3
0
- 6
G
4 4
4
VL
1
SUYIN_200275MR007G161ZL BATT++ VS VL
1
PJP2 PL5
FBMA-L18-453215-900LMA90T_1812
2
BATT++
1 1 2 BATT+
1
PC31 PR44 PR42
2 TSA 0.1U_0603_25V7K 442K_0603_1% 150K_0402_1%
3 EC_SMC1 PR43 1 2
2
4 EC_SMD1 9.76K_0402_1%
1
5
2
6 PR45 PU2B
7
8
82.5K_0603_1% LM393DT_SO8
PC32 PC33 1 2 5
P
+ MAINPWON 21,38,39
100_0603_1%
1000P_0603_50V7K 0.01U_0603_50V7K 7
2
O
100K_0603_1%_TH11-4H104FT
TM_REF1 6 -
G
PR46
4
PH1
2
1
100_0603_1%
1U_0805_16V7K
PR48
2
1
1
PJP2 battery connector PR47
PC35
6.49K_0603_1% PC34 PR49
1 2 1000P_0402_50V7K 150K_0402_1%
+3VALWP
2 1 VL
2
2
SMART
Battery:
1
1,2.BATT+
PR50
1
1K_0603_1%
2
3.TSA PR51 2
150K_0402_1%
4.SMC
2
5.SMD
2
6,7.GND
BATT_TEMP BATT_TEMP 30
EC_SMB_CK1 17,30,32
EC_SMB_DA1 17,30,32
PR52
1M_0402_1%
1 2
VIN VIN
PR54
1
10K_0402_5% PR55
PR53 VS 10K_0402_5%
84.5K_0402_1% 1 2 ACIN
ACIN 22,30
PR56
2
8
22K_0402_5% PU4A
1 2 3 LM393DT_SO8
P
3 3
+ PACIN
O 1 PACIN 38,40
20K_0402_1%
2 -
G
1
1
PR57
PC36
4
PQ11 1000P_0402_50V7K PC37 PZD2 PR58
TP0610K-T1-E3_SOT23-3 0.1U_0603_25V7K RLZ4.3B_LL34 10K_0402_5%
2
2
B+ 3 1 +VSBP
2
PR60
1
10K_0402_5%
1
PR59 2 1
100K_0402_5% PC38 PC39 RTCVREF
0.22U_1206_25V7K 0.1U_0603_25V7K
2
PR61
2
22K_0402_5%
VL 1 2 PU4B
8
LM393DT_SO8
5
P
+
2
7
PR62 Vin Detector 6
O
-
G
100K_0402_5%
Min. typ. Max.
4
PR63
H-->L 16.976V 17.257V 17.728V
1
0_0402_5% D
1 2 2 PQ12
39 SPOK G RHU002N06_SOT323-3 L-->H 17.430V 17.901V 18.384V
S
3
1
4 4
@ PC40
0.1U_0402_16V7K
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BATTERY CONN. / OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B ICL50/ICK70 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, April 19, 2007 Sheet 41 of 48
A B C D
5 4 3 2 1
+3VALW
1
PJP3
1
JUMP_43X118
+1.8V
2
2
1
2
10U_0805_6.3V6M
PJP4
PM@ PC73
D JUMP_43X118 D
+5VALW
1
2
RTCVREF
+1.8V
2
PM@ PU7
PU6 CM8562IS_PSOP8
1 6
VIN VCNTL +3VALW 1 8
VIN PGND
2 GND NC 5
1
1
2
1U_0603_16V6K
PC74 3 7 PC75 2 7
VREF NC +2.5VSP VFB AGND
PM@ PC76
10U_0805_6.3V6M 1U_0603_6.3V6M
2
PR110 4 8
1
1K_0402_1% VOUT NC
3 VTT VCCA 6
10_0603_1%
PM@ PR111
9
2
TP
AGND
4 VTT REFEN 5
RHU002N06_SOT323-3
APL5331KAC-TRL_SO8 2 1
1K_0402_1%
0.1U_0402_16V7K
@ PR113
@PR113
9
+0.9VSP
1
2
0_0402_5% D PM@ PC77 PM@ PR112
2
1
200K_0402_1%
PQ19
PR114
PC78
PM@ PR115
SUSP 1 2 2 22U_1206_10V6M 60.4K_0402_1%
2
33,37 SUSP
0.1U_0603_25V7K
G
2
S @ PC79 PM@ PC80
3
PC81
22U_1206_10V6M 0.047U_0402_16V7K
2
1
1
2
PM@
PM@ PQ20 PM@ PR116
1
D RHU002N06_SOT323-3 0_0402_5%
2 1 2 SUSP
G
C S C
3
PJP5 PJP6
2 1 2 1
+3VALWP 2 1
+3VALW +1.8VP 2 1
+1.8V
JUMP_43X118 JUMP_43X118
PJP7 PJP8
2 1 2 1
+5VALWP 2 1
+5VALW +2.5VSP 2 1
+2.5VS
JUMP_43X118 JUMP_43X118
PJP9 PJP10
2 1 2 1
+0.9VSP 2 1
+0.9VS +1.5VSP 2 1
+1.5VS
JUMP_43X118 JUMP_43X118
B PJP11 PJP12 B
2 1 2 1
+1.25VSP 2 1
+1.25VS +VSBP 2 1
+VSB
JUMP_43X118 JUMP_43X118
PJP13 PJP14
2 1 2 1
+1.05VSP 2 1
+1.05VS +1.05VSP 2 1
+1.05VS
JUMP_43X118 JUMP_43X118
A A
+5VALW
D D
1
1
PR180
1
PC82 10_0603_5%
2.2U_0603_6.3V6K PR117 PD9
2
10_0603_5% VCCA_1.8V CHP202UPT_SOT323-3
1 2
1U_0603_10V6K
B+
PC149
VCCA_1.5V
1 2
1U_0603_10V6K
B+_1.8/1.5
1
PC83
PL9
2
FBMA-L11-322513-151LMA50T_1210 PR118
1 2 BST_1.5V-1 100K_0402_5%
2
4.7U_1206_25V6K
4.7U_1206_25V6K
2
1
1
PC85
BST_1.8V-1
8
7
6
5
PC86
PU8
PQ21
D
D
D
D
2
VDDP1 FB1
4.7U_1206_25V6K
DH_1.8V-1
1 2 1U_0603_10V6K PC88
1
+1.8VP
4.7U_1206_25V6K
PL10 1 2 ILIM_1.8V
4 25 VCCA_1.8V 1000P_0402_50V7K
ILIM1 VCCA1 PQ22
PC89
PC90
1UH_SIL104-1R0-R_11A_30% PR120 27.4K_0402_1% 1 2
Vout_1.8V 1 2 LX_1.8V 5 24 Vout_1.8V 8 1
2
LX1 VOUT1 PR121 G2 D2
7 2
DH_1.5V-1
DH_1.8V D1/S2/K D2
6 DH1 TON1 23 2 1 B+_1.8/1.5 6 D1/S2/K G1 3
1
26.1K_0402_1%
33P_0402_50V8K
330U_D2E_2.5VM
+
PC94
2 1M_0402_5% PR128
G 4
20K_0402_1%
PR127 VCCA_1.5V 11 18 ILIM_1.5V
1 2
VCCA2 ILIM2
1
10K_0402_1% PC96 37.4K_0402_1%
S
S
S
1000P_0402_50V7K
PR129
330U_D2E_2.5VM
FB_1.5V 12 17 +5VALW PC97 1
2
FB2 VDDP2 33P_0402_50V8K
2
1
2
3
2
+
PC98
13 16 DL_1.5V
PGD2 DL2
2
14 15 FB_1.5V
VSSA2 PGND2
1
2
1
PR131 PC100
0_0402_5% 1U_0603_10V6K PR130
2
Close to IC Side 1 2 SC413TSTRT_TSSOP28 10K_0402_1%
25,29,30,33,37,40,44 SUSP#
Differential routing of feedback VFB=0.5V
2
1
@ PC101
to VSSA1 and VOUT1 PIN +5VALW 0.1U_0402_16V7K
2
1
1
@ PC102
PGOOD2_1.5V 0.1U_0402_16V7K
2
VFB=0.5V
VFB=0.5V Vo=VFB*(1+PR129/PR130)=1.5V
Vo=VFB*(1+PR122/PR127)=1.805V Ipeak=4.39A+2.91A=7.3A, Imax=7.3*0.7=5.11A
Ipeak=11.73A, Imax=8.211A Ton=(3.3E-12*(PR125+37K)*(Vout/VBat))+50ns
Ton=(3.3E-12*(PR121+37K)*(Vout/VBat))+50ns =0.3201us
=3.3*10e-12*(820K+37K)*(1.8/19)+50ns=0.3179us AO4916 Rds(on)=>Typ:21 mOhm
FDS6670AS:Rds(on)=>Typ:9 mOhm Max:27 mOhm
Max:11.5 mOhm Ivalleymin=9*E-6*(37.4K/0.027*1.4)=8.904A>7.3*1.2=8.76A
Iocp=Ivalley+"Iripple%/2 Ivalleymax=11*E-6*(37.4K/0.021*1.1)=17.809A
Iripple=(vin-vout)*(Ton/L)=5.467A, 1/2 Iripple=2.734A. Iripple=(vin-vout)*(Ton/L)=2.546A, 1/2Iriiple=1.273A
A
Ivalleymin=10E-6*(PR120/Rds(ON)max*1.5) Iocp=Ivalley+"Iripple%/2 A
=9*10e-6*(27.4K/0.0115*1.5)=14.295A>11.73*1.2=14.076A OCP==>10.177A~19.082A
Ivalleymax=10E-6*(PR120/Rds(ON)typ*1.2)
=11*10e-6*(27.4K/0.009*1.2)=27.907A. Security Classification Compal Secret Data Compal Electronics, Inc.
OCP==>17.029A~30.641A Issued Date 2006/08/22 Deciphered Date 2007/08/22 Title
+1.5VSP/+1.8VP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom ICL50/ICK70 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, April 19, 2007 Sheet 43 of 48
5 4 3 2 1
5 4 3 2 1
D D
+5VALW
1
1
PR134
PR148 PC103 10_0603_5%
0_0402_5% 2.2U_0603_6.3V6K
2
1 2
2
33 VS_ON VCCA_1.05V PD10
1U_0603_10V6K
PR142 1SS355TE-17_SOD323-2
B+_1.05
PC104
@PC121
@PC121 1M_0402_5% PL12
0.1U_0402_16V7K B+_1.05 2 1 FBMA-L11-322513-151LMA50T_1210
2
1
1 2 B+
4.7U_1206_25V6K
BST_1.05V-1
SI4800BDY-T1-E3_SO8
1
4.7U_1206_25V6K
1
PC109
PC110
D 5
D 6
D 7
D 8
PC116
2
1000P_0402_50V7K
PQ26
C C
+5VALW
16
15
14
13
4 G
3 S
2 S
1 S
PR141 PC113
BST_1.05V 1 2 1 2
EN/PSV
BST
TON
NC
0_0603_5% Maximum continuous current=>6A
1
11K_0402_1%
FB_1.05V 3 10 ILIM_1.05V 1 2
2
FB ILIM
1
26.1K_0402_1%
5
6
7
8
PR146
330U_D2E_2.5VM
PGOOD2_1.05V 4 9 +5VALW PC117 1
PGD VDDP
PGND
VSSA
33P_0402_50V8K
D
D
D
D
2
<BOM Structure> +
PC118
NC
DL
TP
2
PU9 FB_1.05V
17
8
SC411MLTRT_MLPQ16_4X4 DL_1.05V 2
4 G
1
VFB=0.5V
PR147
S
S
S
PQ28 10K_0402_1%
<BOM Structure> PC120 FDS6670AS_NL_SO8
3
2
1
1U_0603_10V6K
2
+5VS +1.5VS
Close to IC Side
B B
Differential routing of feedback to VSSA2 and VOUT2 PIN
1
PR188
10K_0402_1%
1
Vo=VFB*(1+PR146/PR147)=1.05V
2
Ton=(3.3E-12*(PR142+37K)*(Vout/VBat))+50ns=0.2391us
6
PU12
5 PC156 SI4810BDY:Rds(on)=>Typ:9mOhm
VCNTL
VIN 22U_1206_10V6M
7
2
POK
VOUT 4 Max:11.5 mOhm
PR189
100K_0402_5% VOUT 3 +1.25VSP Ivalleymin=9*10E-6*(PR145/Rds(ON)max*1.5)
1
1 2 8 EN FB 2 1 =9*10E-6*(26.1K/(0.0115*1.5))=13.617A
1
25,29,30,33,37,40,43 SUSP#
GND
0.1U_0402_16V7K 2
2
Iripple=(vin-vout)*(Ton/L)=4.292A, 1/2Iripple=2.146A
1
PR191 Iocp=Ivalley+"Iripple%/2
1K_0402_1%
A <BOM Structure> OCP==>15.763A~22.222A A
2
Ipeak=2.91A, Imax=2A.
Vo=0.8*(1+PR190/PR191)=1.2608V
+5VS
CPU_B+ B+
PR64
0_1206_5% PL6
5VS12 1 FBMA-L18-453215-900LMA90T_1812
1 2
0.01U_0402_25V7K
1
2200P_0402_50V7K
100U_25V_M
@ PC42
0.1U_0603_25V7K
PR65
PC43
10_0402_5% +
1
10U_1206_25VAK
10U_1206_25VAK
10U_1206_25VAK
200K_0402_5%
PC44
PC45
PC46
PC47
PC48
2
2
1
2
2
D D
PR66
PC49
2
PC50 2.2U_0603_6.3V6K
2
PR67 1U_0603_6.3V6M
1
13K_0402_1%
5
PQ13
SI7686DP-T1-E3_SO8
PU5
1
NTC
PH2
@PH2
@ VCC 19 25
Use one 220uF or two 100uF
100K_0603_1%_TH11-4H104FT Vcc VDD PC51 4
1 2 6 8 PR69 0.22U_0603_16V7K
THRM TON 0_0603_5%
PR68 0_0402_5%
5 CPU_VID0 2 1 31 D0 BST1 30 BST1_CPU 1 2 BSTM1_CPU 1 2 PR71 +CPU_CORE
0_0603_5%
3
2
1
PR70 0_0402_5% 2 1 32 29 DH1_CPU 1 2 PL7
5 CPU_VID1 D1 DH1 0.36UH_PCMC104T-R36MN1R17_30A_20%
PR72 0_0402_5% 2 1 33 28 LX1_CPU 2 1 +CPU_CORE
5 CPU_VID2 D2 LX1
1
4.7_1206_5%
2.1K_0402_1%
PR73 0_0402_5% 2 1 34 26 DL1_CPU
5 CPU_VID3 D3 DL1
2
PR74
IRF7832PBF_SO8
IRF7832PBF_SO8
5
6
7
8
5
6
7
8
PR76
PR75 0_0402_5% 2 1 35 27
5 CPU_VID4 D4 PGND1
D
D
D
D
D
D
D
D
PQ14
PQ15
PR77 0_0402_5% 2 1 36 18
5 CPU_VID5
2
D5 GND PR79 NTC
1
10_0402_5%
PR78 0_0402_5% 1 2 37 17 CSP1_CPU 3.48K_0402_1% PH3
5 CPU_VID6 D6 CSP1
G
S
S
S
S
S
S
680P_0402_50V7K
PR80
1 2 1 2
5
VCCSENSE
PR81 2 71.5K_0402_1%
1 7 16 CSN1_CPU
4
3
2
1
4
3
2
1
TIME CSN1
PC52
10KB_0603_5%_ERTJ1VR103J
2 1 9 12 FB_CPU 1 2
2
47P_0603_50V8J PC53 CCV FB
PR82 1 2 11 10 CCI_CPU PC54 0.22U_0603_16V7K
C 499_0402_1% REF CCI C
1
PR83 0_0402_5%
1 2 3 22 LX2_CPU PR86 0_0402_5% 放在Choke附近 PR85
5 PSI# PSI LX2
PR84 0_0402_5% 1 2 0_0402_5%
+3VS 2 24 DL2_CPU
PWRGD DL2 @PR87
@ PR87 1K_0402_1% @ PC56 1000P_0402_50V7K
2
2
0_0603_5%
1 23 1 2 1 2 CPU_VCC_SENSE
CLKEN PGND2
PR88
2
1
VRHOT CSN2 @ PR95
@PR95 PR92 100_0402_5%
2
4 13 3K_0603_1%
1
BSTM2_CPU
8,16,22 VGATE
4700P_0402_25V7K
4700P_0402_25V7K
1
TP @ PR94
@PR94
3K_0603_1% PC58
16 CLK_ENABLE# MAX8770GTL+_TQFN40 470P_0603_50V8J
41
2
PC59
1 2 1 2
30 VR_ON 1 2
PR97
1
2
CPU_B+
0.22U_0603_16V7K
PR98 20K_0402_1%
1
0_0402_5% @ PR99
@PR99 +3VS 2
PC60
10K_0402_5%
1
PR100
2200P_0402_50V7K
10U_1206_25VAK
10U_1206_25VAK
10U_1206_25VAK
0.1U_0603_25V7K
PR101 100_0402_5%
VRHOT
1
56_0402_5% PQ16
1
PC62
SI7686DP-T1-E3_SO8
1
PC61
PC63
PC64
PC65
B B
2
5 VSSSENSE VSSSENSE
2
PR103
PR104 0_0603_5%
1
10K_0402_5% 1 2 4
1 2 PR105
30 POUT
10_0402_5%
2
PL8
PC66 0.36UH_PCMC104T-R36MN1R17_30A_20%
2
3
2
1
0.1U_0402_16V7K 2 1
1
Rdcr
1
放在Choke附近
4.7_1206_5%
PR106
IRF7832PBF_SO8
IRF7832PBF_SO8
5
6
7
8
5
6
7
8
2.1K_0402_1%
1
R1
D
D
D
D
D
D
D
D
2
PQ17
PQ18
PR107
680P_0402_50V7K
Valley current limit threshold : 19.5mV ~ 25.5mV R2 R3
G
S
S
S
S
S
S
PC67
2
1
4
3
2
1
4
3
2
1
PR108 PH4
2
1 2 1 2
2 CSN1_CPU
2 CSN2_CPU
2 CSP1_CPU
2 CSP2_CPU
1000P_0402_50V7K
1000P_0402_50V7K
1 2
1000P_0402_50V7K
PC71
PC72
1 2
1
放在Choke附近
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+CPU_CORE
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom ICL50/ICK70 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, April 19, 2007 Sheet 45 of 48
5 4 3 2 1
5 4 3 2 1
1
CPU_CORE high side MOS desine change In order to prevent EOL of SI7840, change to SI7686. 0.1 45 10/30/06 EVT
to SB000008L80(S TR SI7686DP-T1-E3 1N SO8).
2
For energy star SPEC request. In order to for energy star SPEC request. 0.2 40 Add PQ43 SB906100210( S TR TP0610K) 12/21/06 DVT
3
For energy star SPEC request. In order to for energy star SPEC request. 0.2 40 Add PQ44 SB301150000(S TR DTC115EUA) 12/21/06 DVT
5
For energy star SPEC request. In order to for energy star SPEC request. 0.2 40 Add PD17 SCSB715F000(S DIO RB715F) 12/21/06 DVT
6
For energy star SPEC request. In order to for energy star SPEC request. 0.2 40 Add PR184,PR185 SD034100380(S RES 1/16W 100K 0402 1%) 12/21/06 DVT
7
For energy star SPEC request. In order to for energy star SPEC request. 0.2 40 Add PC153 SE076104K80(S CER CAP 0.1U 0402 16V K X7R) 12/21/06 DVT
8
C
For energy star SPEC request. In order to for energy star SPEC request. 0.2 40 Add PQ45 SB502060000(S TR RHU002N06) 12/21/06 DVT C
9
For energy star SPEC request. In order to for energy star SPEC request. 0.2 40 Add PQ46 SB324110010(S TR 2SC411K) 12/21/06 DVT
10
For energy star SPEC request. In order to for energy star SPEC request. 0.2 40 Add PR183 SD034274380(S RES 1/16W 274K 0402 1%) 12/21/06 DVT
11
For energy star SPEC request. In order to for energy star SPEC request. 0.2 40 Add PR186 SD034100380(S RES 1/16W 100K 0402 1%) 12/21/06 DVT
12
For energy star SPEC request. In order to for energy star SPEC request. 0.2 40 Add PR187 SD034200280(S RES 1/16W 20K 0402 1%) 12/21/06 DVT
13
For energy star SPEC request. In order to for energy star SPEC request. 0.2 40 Add PC154 and PC146 SE075103K80(S CER CAP 0.01U K 25V X7R 0402)12/21/06 DVT
14
Noise issue in S3 mode and idle mode. In order to prevent noise issue in S3 mode and idle mode. 0.2 40 Add PC42 SF22004M210(S CAP 220U_25V_M) 12/21/06 DVT
20
X63470BOL01 doesn't need +2.5VSP Delete +2.5VSP from X63470BOL01. 0.2 42 Delete PU7 SA085620080 from X63470BOL01. 12/21/06 DVT
21
X63470BOL01 doesn't need +2.5VSP Delete +2.5VSP from X63470BOL01. 0.2 42 Delete PQ20 SB502060000 from X63470BOL01. 12/21/06 DVT
22
X63470BOL01 doesn't need +2.5VSP Delete +2.5VSP from X63470BOL01. 0.2 42 Delete PR111 SD014100A80 from X63470BOL01. 12/21/06 DVT
A A
23
X63470BOL01 doesn't need +2.5VSP Delete +2.5VSP from X63470BOL01. 0.2 42 Delete PR112 SD034604280 from X63470BOL01. 12/21/06 DVT
5 4 3 2 1
5 4 3 2 1
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
D D
1
X63470BOL01 doesn't need +2.5VSP Delete +2.5VSP from X63470BOL01. 0.2 42 Delete PR115 SD034200380 from X63470BOL01. 10/30/06 EVT
2
X63470BOL01 doesn't need +2.5VSP Delete +2.5VSP from X63470BOL01. 0.2 42 Delete PR116 SD028000080 from X63470BOL01. 12/21/06 DVT
3
X63470BOL01 doesn't need +2.5VSP Delete +2.5VSP from X63470BOL01. 0.2 42 Delete PC73 SE142475K80 from X63470BOL01. 12/21/06 DVT
4
X63470BOL01 doesn't need +2.5VSP Delete +2.5VSP from X63470BOL01. 0.2 42 Delete PC76 SE135105K80 from X63470BOL01. 12/21/06 DVT
5
X63470BOL01 doesn't need +2.5VSP Delete +2.5VSP from X63470BOL01. 0.2 42 Delete PC77 SE116226M80 from X63470BOL01. 12/21/06 DVT
6
X63470BOL01 doesn't need +2.5VSP Delete +2.5VSP from X63470BOL01. 0.2 42 Delete PC80 SE076473K80 from X63470BOL01. 12/21/06 DVT
7
X63470BOL01 doesn't need +2.5VSP Delete +2.5VSP from X63470BOL01. 0.2 42 Delete PC81 SE042104K80 from X63470BOL01. 12/21/06 DVT
8
C
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PQ25 SB548000310(S TR SI4800BDY). 12/27/06 DVT C
9
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PQ27 SB548100020(S TR 4810BDY) 12/27/06 DVT
10
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Change PD10 from SC1P202U010 to SC1SS355010. 12/27/06 DVT
11
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PR135 SD034100380. 12/27/06 DVT
12
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PR140,SD013000080, PR150 SD028000080. 12/27/06 DVT
13
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PR181 SD013100A80. 12/27/06 DVT
14
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PR139 SD034150280. 12/27/06 DVT
15
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PR144 SD034100280 12/27/06 DVT
B B
16
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PR137 SD034105280. 12/27/06 DVT
17
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PR138 SD028100480. 12/27/06 DVT
18
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delelte PC105,PC106 SE142475K80. 12/27/06 DVT
19
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PC107,PC151 SE080105K80. 12/27/06 DVT
20
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PC108 SE074102K80. 12/27/06 DVT
21
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PC111 SE042104K80. 12/27/06 DVT
22
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PC112 SE068330K80 12/27/06 DVT
A A
24
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PL13 SH000008Y80. 12/27/06 DVT
5 4 3 2 1
5 4 3 2 1
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
D D
1
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Delete PC114 SGA20221D30 12/27/06 DVT
2
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Change PU9 from SA00001FD80 to SA00001FB80 12/27/06 DVT
3
For SMT BOM convenient. For SMT BOM convenient. 0.3 40 Change PD14 from SC1H751H010 to SC1B751V010. 12/27/06 DVT
4
Increase _1.5VSP OCP point Increase _1.5VSP OCP point for +1.25VSP new solution.' 0.3 43 Change PR128 from SD034154280 to SD034374380. 12/27/06 DVT
5
Decrease +1.05VSP OCP point. Decrease +1.05VSP OCP point. 0.3 44 Change PR145 from SD034324280 to SD034261280 DVT
6
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Add PU12 SA000015410. 12/27/06 DVT
7
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Add PR188 SD034100280. 12/27/06 DVT
8
C
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Add PR189 SD034100380. 12/27/06 DVT C
9
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Add PR191 SD034100180. 12/27/06 DVT
10
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Add PR190 SD034576080. 12/27/06 DVT
11
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Add PC155 SE107105M80. 12/27/06 DVT
12
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Add PC156, PC160 SE116226M80 12/27/06 DVT
13
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Add PC157 SE075103K80. 12/27/06 DVT
14
Cost issue. For cost down, change +1.25VSP solution. 0.3 44 Add PC159 SE076104K80. 12/27/06 DVT
15
Increase +1.5VSP output capacitor. Increase +1.5VSP output capacitor. 0.3 43 Change PC98 from SGA20221D30 to SGA19331D00 12/27/06 DVT
B B
16
Cost issue. Cost issue. 0.3 44 Change PC118 from SGA20471D00 to SGA19331D00. 12/30/06 DVT
17
BOM issue. BOM issue. 0.3 45 Change PH3, PH4 from SL210021F20 to SL200000200 12/30/06 DVT
18
Assembly issue. Due to assemly hard, delete PC42. 0.3 45 Delete PC42 SM22004M210. 12/30/06 DVT
19
Cost issue. Cost issue. 0.4 42 Change PC73 from SE142475K80 to SE093106M80 01/04/06 DVT
20
Cost issue. Cost issue. 0.4 42 Change PC73 from SE153106K80 to SE093106M80 01/04/06 DVT
21
Add pull high resister for VAGTE. Add pull high resister for VAGTE. 0.4 45 Add PR89 SD034200180(S RES 1/16W 2K 0402 1%) 01/04/06 DVT
22
Delete PQ46 PQ46 has potemtial risk to cause system battery OVP. 0.4 40 Delete PQ46 SB324110010(S TR 2SC411K) 01/04/06 DVT
A A
23
Material shipping issue. Material shipping issue. 0.4 45 Change PC69, PC70, PC71, PC72 from SE068102J80 to SE074102K80 01/04/06 DVT
5 4 3 2 1
5 4 3 2 1
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
D D
1
Cost down Cost down 0.5 40 Change PQ38 from SB548100020 to SB548000310. 03/09/07 PVT
2
Cost down Cost down 0.5 40 Change PQ40 from SB548100020 to SB548000310. 03/09/07 PVT
3
For EMI board band issue. For EMI board band issue. 0.6 40 Add PR199 SD001470B80(S RES 1/4W 4.7 1206 +-5%) 04/01/07 Pre-MP
4
For EMI board band issue. For EMI board band issue. 0.6 40 Add PC163 SE074681K80( S CER CAP 680P 50V K X7R) 04/01/07 Pre-MP
C 8 C
10
11
12
13
14
15
B B
16
17
18
19
20
21
22
A A
23
5 4 3 2 1