Online FDP on Demystifying 5G RF ASICs (24 Aug-04 Sept, 2020)

Jointly organized by: Electronics & ICT Academies at- IIT Guwahati and MNIT Jaipur.
Course Pre-requisite: Basic Analog Circuits and Circuit Theory

Hardware Requirement: More than 4 GB RAM system

Tools: Scikit-RF, CPPSim, Python 3 or higher version

Note: Code for all the LABS will be provided on Github

Lecture
Days Topics Tentative Speakers
(4 hrs per Day)
Inaugural Ceremony(0.5 hr) Inauguration Ceremony Prof. Gaurav Trivedi (IIT
Guwahati) + MNIT Jaipur
Keynote (1hr) Topic to be decided Shri Surinder Singh (Director,
SCL Chandigarh)
Industry Perspective (1hr) Challenges of 5G Design flow Harri Valasma
Day 1
Mentor – a Siemens Business
(24 Aug 2020)
15 Mins Break
(09:30AM-3:30PM) Academic Perspective (1hr) Millimeter Wave and 5G: Opportunities and Challenges Prof. Ratnajit Bhattacharjee
(IIT Guwahati)
45 Mins Lunch Break

5G Introduction ( 1.5hr) General Introduction to the course and plan for the 2 weeks. Ashish Jindal (SSPL DRDO),
Dr. Aditya Dalakoti

Day 2 Introduction to 5G (progression of communication channels from 1G to 5G,

5G MIMO Architecture usage, timeline, market); Basics of RF Communication, MIMO in 5G, Dr. Aditya Dalakoti
(25 Aug 2020)
(10:00AM – 2.15PM with MIMO for TX and RX
a break of 15 mins from
System Simulation Basic 5G System Setup and visualization using a simulator Ashish Jindal (SSPL DRDO)
12.00PM-12.15PM)
Day 3
(26 Aug 2020) Two port Networks, Stability, Equivalent Device Models, Impedance
(10:00AM – 2.15PM with RF ASIC Concepts I Ashish Jindal (SSPL DRDO)
Matching, Biasing
a break of 15 mins from
12.00PM-12.15PM)
Day 4 RF Simulation I
(27 Aug 2020) Hands of tutorial for Doing Impedance Matching and bias-T development
(10:00AM – 2.15PM with Ashish Jindal (SSPL DRDO)
using Scikit-RF
a break of 15 mins from
12.00PM-12.15PM)
 Day 5 PDK Development, Layout Issues, Packaging Issues and package
(28 Aug 2020) RF ASIC Concepts II Puneet Mittal (VLSIExpert)
selection, Testing
(10:00AM – 4.00PM with
one break of 15 mins
from 12.00PM-12.15PM Indian Fab Facilities (1hr) CMOS Microfabrication in India – Challenges and opportunities Shri H. S Jatana (Senior Head,
and 2.15PM-3.00PM SCL Chandigarh)
Lunch Break)
Day 6
(31 Aug 2020)
Basics of PA, different classes, performance matrix, design of one topology
(10:00AM – 2.15PM with Power Amplifier Design Ashish Jindal (SSPL DRDO)
for 5G
a break of 15 mins from
12.00PM-12.15PM)
Day 7
(01 Sept 2020) Power Amplifier
(10:00AM – 2.15PM with Design and Simulations of a couple of PA topologies using a Scikit-RF Ashish Jindal (SSPL DRDO)
Simulations
a break of 15 mins from
12.00PM-12.15PM)
Day 8
(02 Sept 2020)
(10:00AM – 2.15PM with LNA Design LNA Basics, Design Topologies, Trade-Off Space for LNA Ashish Jindal (SSPL DRDO)
a break of 15 mins from
12.00PM-12.15PM)
Day 9
(03 Sept 2020) LNA Simulations Design and Simulations of a couple of LNA topologies using a Scikit-RF Ashish Jindal (SSPL DRDO)
(10:00AM – 4.00PM with
one break of 15 mins
from 12.00PM-12.15PM Invited Talk (1hr) 5G power amplifier design Dr. Mahima Arrawatia (IIT
and 2.15PM-3.00PM Guwahati)
Lunch Break)
Day 10 Invited Talk (1hr) Design of Millimeter Wave MMIC Based Frequency Multipliers Mr. Bijit Biswas, SAMEER,
(04 Sept 2020) Kolkata
(10:00AM – 4.30PM with RF Channel Architecture Different Channel Architectures and their feasibility from 5G perspective,
one break of 15 mins Dr. Aditya Dalakoti
and Simulations Simulations of channel using CppSim RF System Simulator
from 12.00PM-12.15PM
and 2.15PM-3.00PM Valedictory Sessions Prof. Gaurav Trivedi (IIT
Lunch Break) (0.5 Hrs) Guwahati) + MNIT Jaipur
Hands-on Detail

Tool Topic Work

Scikit-RF 5G System Simulation of 5G System using the tool
Subcomponents Biasing and Impedance Matching Simulations
Power Amplifier Simulation of topology suited for 5G Applications
Low Noise Amplifier Simulation of topology suited for 5G Applications
CPPSim RF Simulator System Simulations Simulation and Visualization of 5G Links

Note: As per Dr. Gaurav Trivedi’s suggestion, 2 hours’ session with the course co-ordinators and 3 hours’ session with the participants will be held
at least one week before the workshop for installation and coordination of tools.

Speakers Info.:

Keynote Speaker’s Profile:

1. Shri Surinder Singh (Director, SCL Chandigarh)

To be uploaded

Expert Profiles:
2. Mr. Harri Valasma (Mentor –a Siemens Business)

Harri Valasma, Director 5G Solutions, Mentor a Siemens Business has a long career in 3G, 4G and 5G industry. He joined the company in 2018
with Mentor’s acquisition of Sarokal Test Systems. He founded Sarokal Solutions in 2008 and Sarokal Test Systems was spun off from it in
2014. Prior to Sarokal Test Systems he worked at Mentor as Application Engineer and AE Manager for 10 years and prior to that at Nokia for 5
years. He received his Master of Science in Electrical Engineering from University of Oulu. He is the lead author on 1 US patent.

3. Shri H. S Jatana (Senior Head, SCL Chandigarh)

Shri H. S. Jatana received his engineering education from BITS Pilani. He worked at Rockwell semiconductor USA and AMS Austria for a short
duration. Presently, he is working as Group Head at SCL ISRO is leading a team of 80 scientists involved in Process development and integration,
VLSI design and EO devices and product development. His interest areas are High voltage MOS process development, SOI CMOS and BiCMOS
Process development and Radiation hardened devices and Imaging devices. He has more than 10 publications in IEEE journals and has given
numerous talks/ lectures at various top IITS / NITs.
4. Shri Bijit Biswas (SAMEER, Kolkata)

Bijit Biswas received his B. E. Tel. E. and M. E. Tel. E. degree in Electronics & Tele-communication Engineering from Jadavpur University,
Kolkata, India in the year 2002 and 2007, respectively. Presently, he is working as Scientist-C in Society for Applied Microwave Electronic
Engineering & Research (SAMEER), Kolkata, India under Ministry of Electronics and Information Technology (MeitY), Govt. of India. He is
involved in the field of design and development of microwave and millimeter wave circuits, subsystems and systems for more than thirteen
years. He has published more than 20 research articles in various international journals and conferences on millimeter wave circuits. He has
successfully completed more than twelve R&D projects at different frequencies, ranging from S-band to W-band, sponsored by Govt. of India
agencies, such as DRDO, MeitY and MoES.

His research interest includes simulation, modeling and design of millimeter wave active and passive circuits, MMIC design and packaging, and
substrate integrated waveguide circuits. He is a senior member of IEEE.

5. Prof. Ratnajit Bhattacharjee (PI, EICT Academy and Professor, EEE Department)

Ratnajit Bhattacharjee (Member, IEEE) received the B.E. degree (Hons.) in electronics and telecommunication engineering from NIT Silchar,
Assam, India, the M.Tech. degree in microwave engineering from IIT Kharagpur, Kharagpur, India, and the Ph.D. degree in engineering from
Jadavpur University, Kolkata, India. He has served as the Head of Electronics and Electrical Engineering, IIT Guwahati, Guwahati, India, from
2011 to 2014, where he is currently a Professor with the Department of Electronics and Electrical Engineering. He has coauthored more than 140
research articles. His research interests include wireless communication, wireless networks, microstrip antennas, and microwave engineering and
electromagnetics.

6. Dr. Mahima Arrawatia (IIT Guwahati)

Dr. Mahima Arrawatia is a faulty in the Department of Electronics and Electrical Engineering at IIT Guwahati. She joined the institute in July
2017. She completed her Masters and Ph.D from IIT Bombay. She has two Indian patents granted on RF energy harvesting. She has authored/co-
authored more than 15 papers in international journals and conferences. She is recipient Early Research Grant from SERB, India for working on
RF power amplifier for 5G applications. She has also received a grant for designing low power IoT transmitter/ receiver from Department of
Science and Technology, India. Her research interests are RF energy harvesting, Microstrip antenna design and low power RF circuit design.

7. Ashish Jindal (DRDO)

Ashish Jindal is Sr. Scientist at DRDO. He has more than 5 years of experience doing RF integrated circuit design. He is a president gold
medallist from Indian Institute of Technology, Ropar. He is part of multiple national conferences and their committees.

8. Dr. Aditya Dalakoti

Aditya Dalakoti is Senior Technical Specialist at Continental Advanced LiDAR Design Solutions, under Technical Centre India. He did his
B.tech in Electrical Engineering from Indian Institute of Technology, Ropar. Following this, he did his Masters and PhD in Mixed Signal Circuit
Design from University of California Santa Barbara. Following this he has been involved in the Research and Development division of
Continental in both USA and India. He has also been active honorary advisor for multiple educational organizations like TechnoReady and VLSI
Expert.

9. Puneet Mittal ( VLSI Expert)

Puneet Mittal is the Founder of VLSI Expert Private Limited. He holds a B.E. (Electrical & Electronics) from COER, M.E. (Communication
System) from BITS PILANI and MBA from Symbiosis, Pune. He comes with a rich experience of 14+ years in Embedded/Semiconductor Industry
and has worked with biggest Organizations in VLSI industry like Cadence, Synopsys, Magma, and LSI logic. In VLSI Field, Puneet’s key expertise
are Static Timing Analysis, P&R Flow, Methodology Development with leading industry tools from Synopsys, Cadence and Mentor. Proficient
in handling team, mentoring, project management and customer engagement. Puneet has been working for last 10 years to bridge the gap between
the Industry and Academia with the help of seminars, workshops, and skill development programs, guest lectures. He is also doing consultancy in
education sector from school level to university level in terms of designing curriculum, training faculties, infrastructure building, advance learning
technique using technology. He has also been instrumental in skill development in VLSI domain for almost a decade through a dedicated online
portal. He has created an online VLSI-Expert Group in the semiconductor field through which he is interacting with several students, Educational
Institutes and Universities. He is associated with several social/professional societies, which are in education sectors like Youth Career
Counselling& Employment Bureau (YCCEB) and Indo-Canadian Innovation & Skill Development Centre. He loves doing career counselling and
mentoring to Student.

Pre-requisite:

Please find the below pre-requisite online training links.

1. Analog Circuits NPTEL : https://nptel.ac.in/courses/117/101/117101106/

2. Circuit Theory NPTEL : https://nptel.ac.in/courses/108/102/108102042/