Online FDP on Demystifying 5G RF ASICs (24 Aug-04 Sept, 2020)

Jointly organized by: Electronics & ICT Academies at- IIT Guwahati and MNIT Jaipur.
Course Pre-requisite: Basic Analog Circuits and Circuit Theory

Hardware Requirement: More than 4 GB RAM system

Tools: Scikit-RF, CPPSim, Python 3 or higher version

Note: Code for all the LABS will be provided on Github

Lecture
Days Topics Tentative Speakers
(4 hrs per Day)
Inaugural Ceremony(0.5 Prof. Gaurav Trivedi (IIT
Inauguration Ceremony
hr) Guwahati) + MNIT Jaipur
Keynote (1hr) Topic to be decided Shri Surinder Singh (Director,
SCL Chandigarh)
Industry Perspective Expert From Siemen’s Mentor
Topic to be decided
Day 1 (1hr) Graphics
(24 Aug 2020) Academic Perspective Prof. Ratnajit Bhattacharjee
Topic to be decided
(1hr) (IIT Guwahati)

5G Introduction ( 1.5hr) General Introduction to the course and plan for the 2 weeks. Ashish Jindal (SSPL DRDO),
Dr. Aditya Dalakoti

Introduction to 5G (progression of communication channels from 1G to 5G,

5G MIMO Architecture usage, timeline, market); Basics of RF Communication, MIMO in 5G, MIMO Dr. Aditya Dalakoti
Day 2 for TX and RX
(25 Aug 2020)
System Simulation Basic 5G System Setup and visualization using a simulator Ashish Jindal (SSPL DRDO)

Day 3 Two port Networks, Stability, Equivalent Device Models, Impedance

RF ASIC Concepts I Ashish Jindal (SSPL DRDO)
(26 Aug 2020) Matching, Biasing
Day 4 RF Simulation I Hands of tutorial for Doing Impedance Matching and bias-T development using
Ashish Jindal (SSPL DRDO)
(27 Aug 2020) Scikit-RF
Day 5 PDK Development, Layout Issues, Packaging Issues and package selection,
RF ASIC Concepts II Puneet Mittal (VLSIExpert)
(28 Aug 2020) Testing
Day 6 Power Amplifier Design Basics of PA, different classes, performance matrix, design of one topology for
Ashish Jindal (SSPL DRDO)
(31 Aug 2020) 5G
 Power Amplifier
Design and Simulations of a couple of PA topologies using a Scikit-RF Ashish Jindal (SSPL DRDO)
Day 7 Simulations
(01 Sept 2020) Indian Fab Facilities Shri H. S Jatana (Senior Head,
Topic to be decided
(1hr) SCL Chandigarh)
Day 8 LNA Design LNA Basics, Design Topologies, Trade-Off Space for LNA Ashish Jindal (SSPL DRDO)
(02 Sept 2020)

LNA Simulations Design and Simulations of a couple of LNA topologies using a Scikit-RF Ashish Jindal (SSPL DRDO)
Day 9
(03 Sept 2020) Dr. Mahima Arrawatia (IIT
Invited Talk Topic to be decided
Guwahati)
RF Channel
Different Channel Architectures and their feasibility from 5G perspective,
Architecture and Dr. Aditya Dalakoti
Day 10 Simulations of channel using CppSim RF System Simulator
Simulations
(04 Sept 2020)
Valedictory Sessions Prof. Gaurav Trivedi (IIT
Guwahati) + MNIT Jaipur

Hands-on Detail

Tool Topic Work

Scikit-RF 5G System Simulation of 5G System using the tool
Subcomponents Biasing and Impedance Matching Simulations
Power Amplifier Simulation of topology suited for 5G Applications
Low Noise Amplifier Simulation of topology suited for 5G Applications
CPPSim RF Simulator System Simulations Simulation and Visualization of 5G Links

Note: As per Dr. Gaurav Trivedi’s suggestion, 2 hours’ session with the course co-ordinators and 3 hours’ session with the participants will be held
at least one week before the workshop for installation and coordination of tools.
Speakers Info.:

Keynote Speaker’s Profile:

1. Shri Surinder Singh (Director, SCL Chandigarh)

To be uploaded

Expert Profiles:
1. Expert Profile Siemens Mentor Graphics

To be uploaded

2. Shri H. S Jatana (Senior Head, SCL Chandigarh)

To be uploaded

3. Prof. Ratnajit Bhattacharjee (PI, EICT Academy and Professor, EEE Department)

To be uploaded

4. Dr. Mahima Arrawatia (IIT Guwahati)

Dr. Mahima Arrawatia is a faulty in the Department of Electronics and Electrical Engineering at IIT Guwahati. She joined the institute in July
2017. She completed her Masters and Ph.D from IIT Bombay. She has two Indian patents granted on RF energy harvesting. She has authored/co-
authored more than 15 papers in international journals and conferences. She is recipient Early Research Grant from SERB, India for working on
RF power amplifier for 5G applications. She has also received a grant for designing low power IoT transmitter/ receiver from Department of
Science and Technology, India. Her research interests are RF energy harvesting, Microstrip antenna design and low power RF circuit design.

5. Ashish Jindal (DRDO)

Ashish Jindal is Sr. Scientist at DRDO. He has more than 5 years of experience doing RF integrated circuit design. He is a president gold
medallist from Indian Institute of Technology, Ropar. He is part of multiple national conferences and their committees.

6. Dr. Aditya Dalakoti

Aditya Dalakoti is Senior Technical Specialist at Continental Advanced LiDAR Design Solutions, under Technical Centre India. He did his
B.tech in Electrical Engineering from Indian Institute of Technology, Ropar. Following this, he did his Masters and PhD in Mixed Signal Circuit
Design from University of California Santa Barbara. Following this he has been involved in the Research and Development division of
Continental in both USA and India. He has also been active honorary advisor for multiple educational organizations like TechnoReady and
VLSIExpert.

7. Puneet Mittal ( VLSI Expert)

Puneet Mittal is the Founder of VLSI Expert Private Limited. He holds a B.E. (Electrical & Electronics) from COER, M.E. (Communication
System) from BITS PILANI and MBA from Symbiosis, Pune. He comes with a rich experience of 14+ years in Embedded/Semiconductor Industry
and has worked with biggest Organizations in VLSI industry like Cadence, Synopsys, Magma, and LSI logic. In VLSI Field, Puneet’s key expertise
are Static Timing Analysis, P&R Flow, Methodology Development with leading industry tools from Synopsys, Cadence and Mentor. Proficient
in handling team, mentoring, project management and customer engagement. Puneet has been working for last 10 years to bridge the gap between
the Industry and Academia with the help of seminars, workshops, and skill development programs, guest lectures. He is also doing consultancy in
education sector from school level to university level in terms of designing curriculum, training faculties, infrastructure building, advance learning
technique using technology. He has also been instrumental in skill development in VLSI domain for almost a decade through a dedicated online
portal. He has created an online VLSI-Expert Group in the semiconductor field through which he is interacting with several students, Educational
Institutes and Universities. He is associated with several social/professional societies, which are in education sectors like Youth Career
Counselling& Employment Bureau (YCCEB) and Indo-Canadian Innovation & Skill Development Centre. He loves doing career counselling and
mentoring to Student.

Pre-requisite:

Please find the below pre-requisite online training links.

1. Analog Circuits NPTEL : https://nptel.ac.in/courses/117/101/117101106/

2. Circuit Theory NPTEL : https://nptel.ac.in/courses/108/102/108102042/