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Terahertz Imaging With Si MOSFET Focal-Plane Arrays: A A A B B A B
Terahertz Imaging With Si MOSFET Focal-Plane Arrays: A A A B B A B
ABSTRACT
We report on imaging at terahertz frequencies using a 3×5 Si MOSFET focal-plane array (FPA) processed by
a 0.25-μm CMOS technology. Each pixel of the FPA consists of a 645-GHz patch antenna coupled to a FET
detector and a 43-dB voltage amplifier with a 1.6-MHz bandwidth. √ We achieve a typical single-pixel responsivity
of 80 kV/W and a noise-equivalent power (NEP) of 300 pW/ Hz at 30-kHz. The performance data of these
all-CMOS devices pave the way for the realization of broad-band THz detectors and FPAs for video-rate active
imaging on the basis of established low-cost and integration-friendly CMOS technology.
Keywords: silicon detectors, distributed resistive mixing, terahertz focal plane array
1. INTRODUCTION
Over recent years, considerable attention has been devoted to the terahertz frequency range, owing to its signif-
icant potential for application across a wide variety of areas.1 Foremost amongst these are security applications
where the capability of terahertz radiation to penetrate clothing and many (non-metallic) packaging materials
opens up unique screening possibilities. Furthermore, the imaging capability is significantly enhanced by the
possibility of obtaining unique spectral fingerprints of drugs-of-abuse2 and explosives.3 Much exploratory work
has also been undertaken on non-destructive quality control in manufacturing in a wide variety of industries,4, 5
from steel producers6 to pharmaceutical companies.7
However, most of the detectors operating in the terahertz frequency range are comprised of discrete com-
ponents which are bulky and exhibit a low level of integration at high cost. Incoherent THz power detectors
which are currently used in multipixel terahertz imaging applications are Schottky diodes,8 bolometers9, 10 and
pyroelectric sensors.11 For the later two, video-rate operation is difficult or impossible to achieve because of
thermal-time-constant constraints. In this situation, it appears highly attractive to try to link THz photonics
to conventional CMOS process technologies which are employed extremely successfully in the visible and near-
infrared portion of the electromagnetic spectrum, e.g., in digital cameras. Fabrication of THz detectors in CMOS
foundries and on-chip integration of higher-level functionalities may be instrumental to pave the way of THz
photonics into cost-sensitive, but larger-volume applications. We explore here the practical potential arising
from two until-now separate, but related developments: First, the investigation, in the physics community, of
plasma-wave-induced rectification in the channel of field-effect transistors (FETs) triggered by theoretical work of
Dyakonov and Shur started in 1993.12, 13 This work has led to fascinating studies of basic transport phenomena
in FETs14, 15 but not yet to practically applicable devices. Efficient THz radiation coupling, circuit aspects and
device parasitics have not been considered sufficiently yet. Second, the application of FET transistors as direct
power detectors and mixers begun already years before the conception of the Dyakonov-Shur theory.
Further author information: (Send correspondence to A.L.)
A.L.: E-mail: lisauskas@physik.uni-frankfurt.de, Telephone: +49 69 79847211
Terahertz Technology and Applications II, edited by Kurt J. Linden, Laurence P. Sadwick, Créidhe M. M. O'Sullivan,
Proc. of SPIE Vol. 7215, 72150J · © 2009 SPIE · CCC code: 0277-786X/09/$18 · doi: 10.1117/12.809552
2. PRINCIPLE OF DETECTION
2.1 Resistive self-mixing in quasi-static approximation
Already ten years before the conception of the Dyakonov-Shur theory, FET transistors have been used as direct
power detectors and mixers. For instance, JFETs were introduced in incoherent power detection circuits working
in the 10-500-MHz range,16 and GaAs MESFET transistors were demonstrated as broadband detectors at 0.1-
3 GHz.17
These applications employ a resistive mixing scheme, where the radiation is coupled simultaneously to the
gate and, via a high-frequency shunt capacitance CGD,ext , to the drain contacts of the FET (see Fig. 1). In
this way, both the channel resistance and drain-to-source voltage are modulated in time and the source-drain
current exhibits a sin2 (ωt) dependence (ω: angular frequency of the radiation) which entails a DC component
as relevant circuit response.
A classical resistive mixer operates in the quasi-static limit of the two-dimensional electron gas’ response to
the applied voltages. At the high frequencies considered here (i.e. 0.6 THz), this approximation breaks down,
and has to be replaced by a non-quasi-static treatment along the line of the theory of Dyakonov and Shur.
Here, we investigate this generalization of mixing and explore its efficiency if the concepts of plasmonic mixing
within the transistor channel and the capacitive shunting of the classical approach are combined. We start with
the Dyakonov-Shur theory which is based on the hydrodynamic Euler equation of motion and the continuity
equation:12, 13, 18
∂v ∂v v e ∂U
+v + + = 0, (1)
∂t ∂x τ m ∂x
∂n ∂(nv)
+ = 0. (2)
∂t ∂x
Here, n(x, t) is the sheet density and v(x, t) the average drift velocity of the charge carriers at position x
along the channel of the FET. U (x, t) is the electrical potential along the channel, τ the momentum relaxation
time. Diffusion is neglected. For the transistors considered later, we obtain from the typical mobility μ of
0.0331 m2 /Vs19 and the effective transport mass (m = 0.259 m0 )20 a value of τ of 49 fs. At 6 GHz, ωτ = 0.0018,
∂ ∂U
n = 0. (3)
∂x ∂x
If the gate-to-source voltage Ugs is larger than the threshold voltage Uth (Ugs − Uth > ηkB T /e, where η is
the transistor ideality factor, kB - the Boltzmann constant, T is the temperature and e - the elementary charge),
the carrier concentration in the transistor channel is n = Cox (Ugs − Uth )/e (here, Cox is the gate capacitance
per unit area). Thus Eq. 3 reduces to ∂ 2 U/∂x2 = 0. Its solution can be given in the well-known form21 as drain
current Id depending on the drain-to-source voltage Uds :
W U2
(Ugs − Uth )Uds − ds ,
Id = μCox (4)
L 2
with W and L being the gate width and length. This solution holds until the transistor operates in the linear
(ohmic) regime, i.e., for Uds < Ugs − Uth . Now if the gate voltage is modulated with the small ac amplitude
URF sin(ωt) at the sufficiently high external gate-to-drain capacitance CGD,ext , these ac oscillations are directly
applied also to the transistor drain. For open-drain conditions (dc component of the drain current Id = 0) the
rectified voltage at the transistor drain is obtained, which is equal to:
2
URF
Udet = . (5)
4(Ugs − Uth )
Figure 1 visualizes for 6 GHz, the numerical solution of the system of Eqns. 1 and 2 for the case Ugs − Uth =
0.1 V and URF = 1 mV presenting the spatial evolution of the amplitude of the carrier density oscillations,
the amplitude of the ac voltage drop along the channel (dashed line) and the rectified DC potential. Both
density oscillations and ac amplitude of voltage drop have linear dependence on the length and the build-op of
the rectified signal takes place over almost whole channel length. These spatial dependencies remain absolutely
similar even at much lower frequencies if the gate-to-source capacitor can be considered as an ac short.
∂U μ ∂2U 2
− = 0. (6)
∂t 2 ∂x2
For URF << (Ugs − Uth ), the solution of the channel potential can be found in the form of U (x, t) =
U0 (x) + U1 (x) exp(−iωt)/2 + U1∗ (x) exp(iωt)/2 by neglecting terms with higher harmonics. Thus, in the open-
circuit conditions, the dc potential is given by:23
2 − |U (L)2 |
URF 1
U0 (L) = (Ugs − Uth )2 + . (7)
2
For sufficiently long devices or with the external gate-to-drain capacitor included, the oscillations of the
channel potential vanish at the drain and the rectified signal is identical to that obtained in the quasi-static case:
2
U2 URF
Udet = (Ugs − Uth )2 + RF − (Ugs − Uth ) ≈ . (8)
2 4(Ugs − Uth )
Polarization
“1”
Figure 3. Schematic of a single pixel comprising a patch Figure 4. Micrograph of a wire-bonded 3×5-pixel 0.65-
antenna, one pair of FET power detectors and a voltage THz CMOS FPA. The arrow indicates the direction of
amplifier. antenna polarization. The ”C” column contains pixels
with the center frequencies shifted by 50 GHz starting
from 550 GHz (starting from bottom). The pitch between
antennae is 200×150 µm2 die size is 0.85×0.9 mm2 .
Fig. 2 now explores the non-quasi-static regime at 600 GHz. Plasma waves are launched from the source
contact into the channel. Because of the overdamping (ωτ < 1), the waves decay over a distance of less than a
plasmon wavelength and before reaching the drain contact. The rectified signal does not build up continuously
along the channel any more as in the quasi-static case, but rather nonlinearly over a distance where the amplitude
of the channel-to-source voltage oscillations (dashed line) increases and the density oscillations decrease.
For the practical implementation it is useful to note, that the reduced pair of differential equations can be
represented graphically in the form of an RC transmission line with the equivalent circuit displayed in Fig. 2.
Conceptually, non-resonant plasmonic radiation detection can be understood as a distributed resistive self-mixing
effect within the FET channel.
3. DEVICE IMPLEMENTATION
Field-effect-transistor-based detectors were fabricated in a 0.25-μm BiCMOS process (SG25H1 IHP Microelec-
tronics GmbH) which features NMOS transistors with a current-gain cut-off frequency fT of 35 GHz.
Each detector pixel consists of two FET detector devices with 0.25-μm-long and 0.78-μm wide gates, an
integrated patch antenna, and a CMOS operational amplifier capable of 43 dB open-loop gain. Schematics of
the detector pixel are presented in Fig. 3. A differential circuit topology combined with a balanced antenna feed
is used since it provides virtual ground points at the symmetry axis, thereby obviating the need for 650-GHz
decoupling capacitors in the circuit. The quarter-wavelength-long microstrip transmission lines TL1 and TL2
establish a signal path between the output of the FETs and the positive input of the operational amplifier. A
high-frequency open circuit condition is presented to each of the drain terminals by these quarter-wave lines
since the input of the operational amplifier is a high-frequency virtual ground-point due to symmetry reasons.
Hence, the received 650-GHz signal is stopped from propagating to the low-frequency part of the circuit. The
gate-drain metal-insulator-metal (MIM) capacitors C1 and C2 are used to tie the ac-potential of the drain of
each detector device to its gate potential.
The half-wavelength-long on-chip patch antennas consist of 88-μm-long and 100-μm-wide sheets in the top
metalization of the process technology. The patch receivers are backed with a ground plane in the first inter-
connect metal layer, thus yielding a 8-μm-thick SiO2 patch-antenna substrate. Since the silicon substrate is
2.8
Height, mm
3.5
2.7
Source Focal plane 2.6
Multiplied source polarization array
645 GHz, 0.5 mW 2.5
Height, mm
AM
modulation
Reference
2.5
signal
B1
Function B2
generator B3
Lock-in amplifiers B4
2
2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6
Length, mm
Data acquisition
Figure 5. Experimental setup for the characterization of Figure 6. Contours of 50%-intensity reading obtained by
FET-based THz detector FPAs. scanning the FPA at the focus plane of a multiplied 0.645-
THz source. Inset: positions where the readings of B-line
transistors obtain maximum values.
shielded by this ground-plane, no substrate waves or bulk silicon dielectric losses are present. A microstrip feed
line is attached to each radiating edge of the patch in order to provide a balanced feed for the detector circuit.
Although on-wafer characterization of the implemented patch radiators has not been performed, the antenna pa-
rameters can be predicted using the 3D finite-element electromagnetic simulation package HFSS. The simulated
impedance yielded by the antenna and feed-lines at the 640-GHz resonance is 2x300 Ω. The -3-dB bandwidth of
the antenna is 45 GHz and the simulated gain, including dielectric and conductor losses, is 2.3 dB.
A 3×5-pixel imaging focal-plane array (see Fig. 4) has been implemented by placing the pixels with 200 × 150
μm2 pitch on the semiconductor die. The aperture of the array is oversampled in free space since the maximum
diffraction-limited resolution is λ0 /2 = 0.23 μm at 645-GHz, the frequency of our measurements. However, the
wavelength of the impinging radiation can be reduced by embedding the FPA in a denser dielectric, thus allowing
the aperture of the FPA to be better utilized.
integrate detector readings VD over the scanned area. We measure the total power of THz radiation PT Hz using
a calibrated large-area detector (Thomas-Keating). The detector pixel responsivity is then obtained from:
2.2
V = VD dxdy. (9)
PT Hz · AD
here AD is the detector pixel area. The factor 2.2 originates from the fact that the lock-in gives the root-mean-
square value of the sine-wave component but the THz power was modulated with a square-wave. For the AD
we take the physical value of the pitch (0.2 × 0.15 = 0.03 mm2 ) between the pixels. This is smaller than the
simulated effective area of the antenna Aef f = 0.054 mm2 , which is defined by:
λ20
Aef f = D , (10)
4π
where D is the directivity of the on-chip patch antenna and λ0 is the free-space wavelength. Since the electrical
areas of neighboring pixels overlap, the physical area of each pixel in the aperture is used together with the
calculated intensity to establish the received power per pixel.
In Fig. 6, we show contours of the intensity at the 50% level of the focal spot measured simulateously with
four ”B” column detectors. All contours have a slighlty different form. The inset of Fig. 6 indicate the positions
where the readings of B-line transistors obtain maximum values. They all lay along one line except the value
measured with the B3 pixel which is shifted to the left by 50 μm (equal to the scanning step size). The distace of
150 μm between the maximum readings of B1 and B2 pixels exactly correspond to the pitch between antennae.
Distancies between the heights of maximum readings of B2 and B3 or B3 and B4 make only 100 μm which is
somewhat shorter then the physical pitch between antennae. We attribute these disreapances in form on 50%
intensity contours and the heights og maximum readings to slight differences in forms of effective areas due to
slightly different surroundings (neighbouring antennae in ”C” column and bonding wires).
Table 1. Maximal voltage responsivity and average NEP for nine transistors of two chips measured at 30 kHz chopping
frequency
0 2 4 0 2 4
Length, mm Length, mm
5 5
0 deg. 70 deg.
11
4 4
E E
E3 E3
=0) =0)
I I
I
Figure 9. Normalized dependence of detected signal on Figure 10. Normalized focus spot images taken at differ-
radiation polarization angle. ent detector rotation angles.
5. DISCUSSION
Let us shortly discuss several possible routes concerning further improvement of the detector performance. First,
in the detection theory section, we have assumed that the RF signal is coupled to the gate and the drain without
relative phase shift. Within the quasi-static approximation16 it has already been shown that carefully chosen
phase shifts may improve the sensitivity. The analysis predicts an enhancement of the rectification efficiency by
a factor of three if a phase delay of π is introduced. A corresponding optimization for THz frequencies remains
to be done and tested.
Another source for substantial improvement in responsivity comes from the addition of a constant drain
current.23
Finally, the question arises whether the detector performance can be improved with a technology with smaller
design rules which may be used for example to build the transistors with smaller channel lengths. If we neglect
parasitic and circuit aspects as well as plasmon interference in the resonant regime (ωτ ≥ 1), and consider only
the rectification efficiency, then a first answer is that the efficiency neither becomes larger for shorter channels
nor decreases if the gate-to-drain shunting capacitance is included. It is worth to note that the rectification in
the transistors channel works with fairly long channels and at frequencies well above the cut-off frequency given
by the carrier transit time. The NEP of the detector, however, directly depends on channel resistance, so for
15
10
0
0 10 20 30 40 50 60 70 80
Length, mm
20
A5
Height, mm
15
10
0
0 10 20 30 40 50 60 70 80
Length, mm
Figure 11. Scanned image through a paper envelope containing a dextrose cube wrapped into a plastic bag and a packaged
drug pill. Upper image is obtained with the transistor in the middle of the chip (B3); lower - with the transistor in the
left top corner of the chip A5 (see Fig. 4). Dotted lines indicate the part of the image where the difference in detection
is observable.
shorter channels it will become smaller. Anyway, the parasitic aspects of the circuit play an important role at
THz frequencies. Therefore, by going to shorter channel lengths the transistor detector responsitivity can be
made higher due to lower signal loss at parasitic capacitances. The NEP of shorter detectors is also expected to
be lower due to decreased channel resistance.
6. SUMMARY
We have presented an application of a novel room-temperature CMOS power detection technique for terahertz
imaging. We attribute the detection principle to a non-quasi-static (NQS) distributed self-mixing effect in FET
transistors. We have shown that in non-resonant approximation including an external gate-to-drain capacitance
gives same value for the detected signal as using a simple quasi-static transistor theory. This strategy has been
successfully applied for the design of FET transistor circuits that are capable of broad-band detection of radiation
well above the cutoff frequency of the transistors. A 0.65-THz 3×5-pixel focal-plane array has been implemented
in a low-cost 0.25-μm CMOS process technology.√ We achieve a typical single-pixel responsivity of 80 kV/W and
a noise-equivalent power (NEP) of 300 pW/ Hz at 30 kHz. The performance data of these all-CMOS devices
pave the way for the realization of broad-band THz detectors and FPAs for video-rate active imaging on the
basis of established low-cost and integration-friendly CMOS technology.
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