Kyambogo University

Faculty of Engineering
Department of Electrical and Electronic Engineering

Microprocessor Systems – Handout #1

By: George Waligo
November 2004
Introduction
A microprocessor can be described as a programmable digital IC that processes data. In other
words, a microprocessor has set of instructions from which a program that can be used to
process any digital data made available to the microprocessor is written. Microprocessors can
be found in hundreds of varieties, from several different manufacturers.

Typical Applications
Microprocessors have an infinitely long list of applications. This is due to their versatility
and ease of use, factors shared by digital systems in general. The ease with which
microprocessor-based systems can be built and reconfigured makes microprocessors difficult to
live without in modern day-to-day life. Typical applications of these chips include:
Computer systems
Consumer electronics (audio and visual equipment)
Industrial control
Telecommunications
Geological data processing
Radar
Domestic/household equipment
Traffic control and regulation
Information displays

Preparatory Information
Strictly speaking, microprocessors are used to build computer systems, both small and large.
It is these systems that are put to use in applications such as those mentioned above. It is
therefore useful to provide a brief presentation of the structure of a typical computer
system, which of course incorporates a microprocessor. This helps in understanding the goal of
studying microprocessors.

Typical Computer System Block Diagram

Microprocessor: the central component of a computer system and it can also be referred to as
the central processing unit (CPU)

Storage: devices to store data permanently

Read Only Memory (ROM): devices to store information, typically the program

Random Access Memory (RAM): devices to temporarily store data or a program

Input/Output (I/O): devices used by the microprocessor to access peripherals located outside
the microprocessor such as ADCs and DACs

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The System Bus

The different blocks of a computer as shown in the diagram are connected to the microprocessor
using the system bus. The system bus is a set of pins and conductors or wires connected to the
relevant pins of the processor and I/O devices in order to perform data transfer. The main
parts of the system bus are the data bus, address bus and control bus.

Data bus: this is a set of pins used to carry data into or out of the processor. Instructions
are also fetched from memory and sent to the processor via the data bus
Address bus: this is a set of pins used to indicate to both I/O devices and memory the
location being accessed by the processor. This location can point to either I/O or memory. A
memory location can be likened to a location in an array or table of values with the index in
the array being the location being accessed
Control bus: this is a set of pins used to coordinate the transfer of data between the
processor and external devices. For example, it has signals to indicate in which direction
data is being transferred (into or out of the processor). When data is being transferred into
the processor, that is called a read cycle. When data is being transferred out of the
processor, that is called a write cycle. Read and write cycles are also referred to as memory
or I/O access cycles.

Motherboard designers also have special interface buses (called expansion buses) for
peripheral devices such as graphics and sound cards, modems etc. These are made by placing so-
called interface devices or chips that give specific functionality and timing to peripherals
connected to the expansion bus. Below is a list of the most common interface buses found in
computers:

• Peripheral Component Interconnect (PCI)

• Universal Serial Bus (USB)
• FireWire
• VME bus

Microprocessor Classifications
Microprocessors are usually classified according to their general-purpose-register width. In
other words, the width of the internal registers of the processor determines its
classification. We therefore talk of 4bit, 8bit, 16bit, 32bit, 64bit and 128bit processors.
Naturally, the larger the processor (width), the more powerful it is meant to be. This is
generally expected since the larger the register width, the larger the data the processor can
process, making it effectively faster.

Classification of processors according to structure and functionality

Processors are also classified according to their internal architecture and functionality. The
most common classifications are as follows:

• Microprocessor: generally a single chip CPU without memory and peripherals. Examples
include processors used in PCs, Macs and workstations

• Microcontroller: generally a single chip CPU with both memory and peripherals. Examples
include processors used in consumer electronics and automatic vehicles

• Digital signal processor (DSP): generally a high performance CPU with memory,
peripherals and a specially designed ALU suitable for computationally intensive
operations. Examples include processors used in imaging equipment and Radar
Digital signal controller (DSC): generally a DSP with a more than average number of
peripherals particularly designed to simplify machine control applications. Examples are
processors used in top of the range automatic vehicles and robots

Microprocessor Families
Processors are also sometimes referred to by their so-called families. Each processor
manufacturer is known for at least one processor family. A processor family is generally a
range of processors from one manufacturer with certain characteristics that are similar. Many
of the instructions of a given processor family are generally similar, in addition to some
architectural features. A very well known family is the 80x86 architecture from Intel. It
consists of several processors including the 8086, 80286, 80386 and the Pentium. Another well-
known family is the 680x range of processors from Motorola. This includes the 6800, 6802 and
the 6809.

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Processor Architectures
There are two main approaches used in designing microprocessors:

• Von Neumann architecture: the path for data is the same as that for processor
instructions. This is a rather simple and cheap approach to processor design and
implementation.
• Harvard architecture: the path for data is different from that for processor
instructions. This is a more complicated approach to processor design and
implementation although more powerful processors are obtained

The Instruction Set of a Microprocessor

Microprocessors and computers in general are programmable devices or systems. This means that
the sequence of operations the processor cycles through is determined by the use of programs,
which are nothing but an arrangement of instructions for the processor to follow or execute.
The collection of all the different instructions that the processor can execute is known as
the instruction set of that processor. Different processors have different instruction sets
although many processors of a given family are said to be backwards compatible. For example,
the Intel 80286 processor is backwards compatible with the earlier 8086 meaning that the
instruction set of the 80286 fully incorporates in addition to other new instructions. To get
a clearer idea on the instruction set, a few categories of instructions that are certain to be
found are listed below:

1. Arithmetic instructions (for operations such as addition, subtraction)

2. Logic instructions (for operations such as shift, or , and)
3. Input/output instructions (for accessing memory and I/O devices)

Naturally, the instruction set of a processor is usually not directly used by a programmer
using high level languages such as C or Pascal, although these languages have provisions for
this. This is due to the fact that anyone using the processor’s instruction set directly must
know the internal architecture of the processor. Few people go to this depth as programs
written in high level languages are usually sufficient for most applications. It should be
noted that the compiler does the dirty job of translating high level language programs into a
program made from the processor‘s instruction set.

For system programmers and electronics professionals specialised in areas such as embedded
systems (computerized cars, TVs, etc), direct use of a processor’s instruction set is common.
This kind of coding is referred to as assembly language programming or assembler.

Instruction Set Categories

Processor designers must choose among two fundamental types of instruction sets. These
categories lead to the following categories of computers or processors according to the type
of instruction sets:

1. Complex Instruction Set Computer (CISC)

2. Reduced Instruction Set Computer (RISC)

CISC processors have a large instruction set with instructions that can perform many complex
operations. This is advantageous to assembler programmers as coding is simplified due to a
powerful instruction set. CISC processors usually have a relatively small number of registers

RISC processors on the other hand have a smaller number of instructions that can perform
rather basic operations. In order to perform more complex operations, designers of RISC
processors rely on sophisticated compilers to make efficient use of the few available
instructions. RISC processors often have a rather large register set

Memory Organization of a Computer

The illustration below generally shows how memory is connected to the processor. As the
processor cannot have an extremely large number of pins, the address of the location to be
accessed is encoded before being placed on the address bus. The memory device must therefore
decode his address before accessing the desired location. Consequently, a processor with an
address bus size of 16bits can directly access a maximum of 64*1024 (64K) memory locations.
Similarly a processor with a 20bit address bus can directly access a maximum of 1024*1024 (1M)
memory locations. Each location can be thought of as being one n-bit register, with n being
the width of the memory location. The memory width is always a power of two

The memory capacity of the processor (in bits) can thus be found by computing the product of
the number of memory locations and the width of each location in bits.

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Capacity (bits) = 2NA x ND

With NA and ND being the number of address and data bits respectively

Capacity (bytes) = (2NA x ND) / 8

Data Bus (ND)

Micro-
processor

NA:2NA Memory
Address Decoder
Address Bus Cells
(located in the memory
device)

Microprocessor Development Tools

Developing microprocessor based systems often involves both hardware and software development.
Hardware development basically includes designing and development of memory and I/O
interfaces. Memory interfacing includes adding ROMs and RAMs to the microprocessor. I/O
interfacing includes adding keypads, displays, ADCs and DACs. Developing microprocessor
interface hardware requires the proper tools to make the job easier. Although it is possible
to simply put components together, modern designers often need the following equipment and
tools:

Starter kit or development board from the processor manufacturer or associate: this is a
complete computer board that incorporates a microprocessor similar to the one you intend to
use. Old boards were completely independent and did not need a PC to work. Modern development
boards use PCs as host platforms
Assembler or compiler specific to the processor used: this allows you to develop both assembly
language and high level language programs for the target board
Loader: this allows you to upload and run the programs you develop for the board
Debugger: this allows you to locate any possible errors in your programs

Generally, most of the above tools are provided by the manufacturer with any development kit
or board. Much of the associated software and examples can also be downloaded from the web.

Software development includes writing applications to run on the microprocessor. More often
than not, it may be necessary to develop a small or mini operating system to coordinate the
whole system. Such a mini operating system for a microprocessor is often referred to as a
kernel.

It should be noted that development of microprocessor based systems for applications other
than the usual computers lies in a field known as embedded systems.

Introductory CPU Architecture

Most general purpose microprocessors follow a Von Neumann kind of architecture. A simplified
internal block diagram of such a CPU is shown below:

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• Register set: a set of registers that can be used for several operations such as
input/output and arithmetic
• Memory data register (MDR): a special bi-directional register used to temporarily hold
data to be transferred between the microprocessor and external devices
• Memory address register (MAR): a special output only register that is used to
temporarily hold (onto the address bus) the address of the memory or I/O location
currently being accessed
• Arithmetic and logic unit (ALU): the logic unit that performs arithmetic and logic
operations. Examples of operations include addition and shifting
• X, Y registers: special registers used to provide data to and get data from the ALU
• Program counter (PC) or instruction pointer (IP): this is a register that holds the
address of the memory location holding the NEXT instruction to be fetched and executed.
In other words, the PC is a pointer to the next processor instruction to be executed
• Stack pointer (SP): this is a special register that points to the top of the stack. The
stack is a small portion of RAM that is used to temporarily hold data and addresses.
The stack is used in a special way and never as a general purpose memory block. It is a
first in first out (FIFO) data structure
• Status or flags register: this is a special register that contains specially designated
bits that indicate the current status of the processor. Some of the status information
includes the effects of the last executed instruction. For example, the programmer may
subtract two numbers and choose to take on two possible actions depending on whether
the result was negative or not. The only way the processor can indicate the effect of
the last result is by setting and clearing the affected bits in the status or flags
register. It is also possible to poll the status register to determine whether an
interrupt has occurred or not
• Accumulator: this is a register designated to receive data from the ALU. Many
manufacturers choose one of the general purpose registers to be used as the accumulator
• Control unit: a complex logic circuit that coordinates the operations of all the
devices within the CPU and the peripherals connected to the microprocessor
• Internal bus: a path for data transfer within the CPU
• Cache: a small high-speed memory block used to improve overall system performance by
keeping the most frequently accessed data and instructions. This memory block is
invisible to the programmer and is directly manipulated by the internal logic of the
CPU. Some processors allow the programmer to disable the use of this cache

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• Control bus signals/pins: some of the signals found on the control bus include the
following (note that signal/pin names vary according to the manufacturer):
• Read strobe: signals to connected peripherals that the processor is getting data from
the (data) bus into its internal registers
• Write strobe: signals to connected peripherals that the processor is placing data onto
the (data) bus
• Address latch enable: signals to peripherals that the address on the (address) bus is
valid in the current cycle and can be decoded by peripherals during the active duration
of the address latch enable signal
• Interrupt inputs: these can be used by peripherals to signal their need to be attended
to
• System clock: this is usually a 50% duty cycle signal that drives the processor
• Bus arbitration signals: these pins are used to negotiate a complete take over of the
system bus. In other words, (advanced) peripherals may need to drive the data, address
and control buses for reasons such as high speed data transfer between peripherals and
memory (DMA). Such devices are often referred to as bus masters

Points to note:
Generally speaking, as the MDR is directly connected to the data bus, the size of the
MDR is also the size of the data bus
Similar to i) above, as the MAR is directly connected to the address bus, the size of
the MAR is also the size of the address bus
The data bus is bidirectional due to the fact that data can move into or out of the
processor
The address bus is output only (unidirectional) due to the fact that the processor
never reads an address from peripherals per se, but instead specifies the address of
the location it wants to access
The control bus is definitely bidirectional as some of its pins are status pins,
meaning that the processor reads some status information on the control bus
For processors that support direct memory access (DMA), most of the pins can be placed
in the high impedance state to enable. In particular, the data and address buses must
be placed in high impedance so that the DMA controller or bus master can drive the
system bus

The Intel 8086

The 8086 is a 16bit microprocessor with a 16bit data bus, 20bit address bus and segmented
memory architecture. This means that every memory access is relative to a particular segment.
The processor uses special segment registers to (automatically) compute the physical address
of the memory location being accessed as follows:

Physical address = (segment << 4) + offset

= (segment x 16) + offset

Both the segment and offset are 16bit values which therefore lead to a 20bit physical address.
It can therefore be deduced that as the offset is a 16bit value, the segment size is 216 or
64K. The following segments are usually specified for any given 8086 program:

Code segment, in which code or program instructions are located (CS register)
Data segment, in which data is either located or to be placed (DS register)
Stack segment, in which the stack is located (SS register)
Extra segment, which can be used as the programmer wishes (ES register)

As an example, a typical 8086 address is written in the format CS:IP (code segment :
Instruction pointer). Thus an address such as F000:0100 refers to the address at an offset of
0100 (hex) in segment F000 (hex). The physical address in this case would be ((F000<<4)+0100).

In case the program being developed is very small, the code, data and stack can be located in
the same segment leading to what is known as the tiny memory model. COM programs earlier used
by MSDOS are examples of programs compiled using the tiny memory model.

The 8086 Programming Model

The attached datasheet shows the internal architecture of the 8086 relevant to the programmer.
Several general purpose registers (GPRs) are available for use. The AX register is designated
as the accumulator. It should be noted that the GPRs can be accessed either as 8bit registers
or as 16bit registers. For example, the 16bit CX register can also be accessed as CL (bits
0..7) or CH (bits 8..15). The CX register is also known as the counter register.

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8086 Instruction Set and addressing modes

The 8086 has the following category of instructions:

1. Data transfer instructions e.g. MOV DX, SP

2. Arithmetic instructions e.g. ADD AX, BX
3. Logic instructions e.g. OR CX, 5E
4. Memory access instructions e.g. MOV [3C], BX
5. I/O or port access instructions e.g. IN AX, DX
6. Program control instructions e.g. JMP quit
7. Stack manipulation instructions e.g. PUSH ES

Closely associated with the instruction set, is the notion of addressing modes. These are the
different ways that the processor can access memory and other resources. The 8086 has the
following addressing modes:

Register addressing: the data source and destination are both registers e.g.

MOV CX, SI

Immediate addressing: the data immediately follows the instruction e.g.

MOV AL, 69

Direct addressing: the offset of the memory location to be accessed is a constant e.g.

MOV AX, [69]

Indirect addressing: the offset of the memory location to be accessed is indirectly given in
the BX register e.g.

MOV [BX], DX

Base addressing: the offset of the memory location to be accessed is indirectly given in the
BP register e.g.

MOV [BP], AX

Indexed addressing: the offset of the memory location to be accessed is given in any of the
index registers (SI, DI) register e.g.

MOV [SI], AX

Port addressing: this mode is reserved for I/O port access e.g.

IN AX, DX
OUT 10, AL

The 8086 datasheet lists the complete instruction set and addressing modes. It should be noted
that for all ALU operations, the result is always placed in a register, and more often in the
accumulator (AX). Consequently, for operations that require two operands (such as addition),
one of the operands must in most cases be placed in a GPR.

Assembly Language Programming Tools

Several tools are available for assembly language programmers. These include:

1. Assembler
2. Linker
3. Loader
4. Debugger

In some cases, a compiler can also be used with assembler instructions embedded in the high
level language source code. For Borland C/C++ compilers such as Turbo C/C++ and Borland C/C++,
an assembly language instruction can be added by prefixing it with the asm keyword as follows:

asm MOV CX, DX

It is also possible to embed a block of asm statements using braces as follows:

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asm {
PUSH AX.
MOV AX, CX
SUB AX, 2
OUT DX, AX
POP AX
}

Note that the opening brace ‘{‘ must be on the same line as the asm keyword, else the compiler
will generate an error message.

The PC debug utility

For starters, a simple utility that comes with every Microsoft operating system is handy and
rather more convenient to use. This is the debug utility and it can be accessed from the
command prompt by typing <debug>. Once the debug utility is executed, it gives a dash (-)
prompt. The help or menu of debug can be accessed by typing a question mark (?). The following
information command list is displayed as a result:

-?
assemble A [address]
compare C range address
dump D [range]
enter E address [list]
fill F range list
go G [=address] [addresses]
hex H value1 value2
input I port
load L [address] [drive] [firstsector] [number]
move M range address
name N [pathname] [arglist]
output O port byte
proceed P [=address] [number]
quit Q
register R [register]
search S range list
trace T [=address] [value]
unassemble U [range]
write W [address] [drive] [firstsector] [number]
allocate expanded memory XA [#pages]
deallocate expanded memory XD [handle]
map expanded memory pages XM [Lpage] [Ppage] [handle]
display expanded memory status XS
-
Note that each debug command can be accessed by simply typing its abbreviated version. Take
the register command for example; if one enters r or R on the debug prompt (-), the utility
will display the contents of the 8086 processor (even though the utility is run on a higher
processor such as the Pentium).

More of the debug utility will be found in the lab manual. The debug utility can be exited by
entering the Q command.

Intel 8086 Microprocessor Programming

Most PCs use a derivative of the 8086 microprocessor. The 80386, 80486 and the Pentium are all
derivatives of the 16bit 8086 processor. This also means that the newer processors are
backwards compatible with the 8086. This means that all the newer Intel x86 based processors
can work as the original 8086 processor and that they include the complete instruction set of
this processor (with possibly more instructions).

The 8086 status register

The status or flags register is a 16bit register that shows the processor status after the
execution of each instruction. Some instructions affect the status register whereas others
don’t. The following is an illustration of the bits of the 8086 status register. The shaded
boxes represent unused bits that were reserved for future use.

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O D I T S Z A P C

Bit Significance
O Overflow: previous arithmetic result couldn’t fit in accumulator
D Direction: indicates ascending/descending manipulation of strings
I Interrupt: enables/disables hardware interrupts. 1 enables interrupts
T Trap: enables the single step mode of operation. 1 enables single step
S Sign: indicates the polarity of the last result. 1 indicates a –ve result
Z Zero: indicates that the previous result was zero
A Auxiliary carry: previous BCD arithmetic operation generated a carry
P Parity: 0 indicates odd parity and 1 indicates even parity
C Carry: previous arithmetic operation generated a carry

The status register bits are used by jump (decision making) instructions in order to determine
the program flow. For an example, consider the following mini flowchart:

The program prints a different result depending on whether the result in the variable z is
negative or not. The instructions that compare z with zero and jump to different locations use
the sign (S) bit in the status register. This is set or cleared after each arithmetic/logic
instruction.

z = x + y

Yes No
Is z <
0?

Print(“-ve”); Print(“+ve”);

The 8086 & 8088 pin configuration

The 8086 can be used in two hardware modes:
1. Minimum mode
2. Maximum mode

The pin configurations below show the signals in both modes. Note that each mode does not use
all the pins in the same way.

U1 U2 U3 U4
16 33 16 16 33 16
AD0 15 MN AD0 15 AD0 15 MN AD0 15
22 AD1 14 22 AD1 14 22 AD1 14 22 AD1 14
19 READY AD2 13 19 READY AD2 13 19 READY AD2 13 19 READY AD2 13
21 CLK AD3 12 21 CLK AD3 12 21 CLK AD3 12 21 CLK AD3 12
RESET AD4 11 RESET AD4 11 RESET AD4 11 RESET AD4 11
18 AD5 10 18 AD5 10 18 AD5 10 18 AD5 10
INTR AD6 9 INTR AD6 9 INTR AD6 9 INTR AD6 9
AD7 8 AD7 8 AD7 8 AD7 8
AD8 7 AD8 7 A8 7 A8 7
AD9 6 AD9 6 A9 6 A9 6
AD10 5 AD10 5 A10 5 A10 5
AD11 4 AD11 4 A11 4 A11 4
AD12 3 AD12 3 A12 3 A12 3
AD13 2 AD13 2 A13 2 A13 2
AD14 39 AD14 39 A14 39 A14 39
AD15 38 AD15 38 A15 38 A15 38
A16/S3 37 A16/S3 37 A16/S3 37 A16/S3 37
A17/S4 36 A17/S4 36 A17/S4 36 A17/S4 36
A18/S5 35 A18/S5 35 A18/S5 35 A18/S5 35
A19/S6 A19/S6 A19/S6 A19/S6
34 34 34 34
BHE/S7 BHE/S7 BHE SSO
26 26 26 26
S0 27 DEN 27 S0 27 DEN 27
S1 28 DT/R 28 S1 28 DT/R 28
31 S2 30 M/IO 31 S2 30 IO/M
30 RQ/GT0 32 31 HLDA 32 30 RQ/GT0 32 31 HLDA 32
17 RQ/GT1 RD 29 17 HOLD RD 29 17 RQ/GT1 RD 29 17 HOLD RD 29
23 NMI LOCK 25 23 NMI WR 25 23 NMI LOCK 25 23 NMI WR 25
33 TEST QS0 24 TEST ALE 24 33 TEST QS0 24 TEST ALE 24
MX QS1 INTA MX QS1 INTA

8086MAX 8086MIN 8088MAX 8088MIN

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Minimum mode
In minimum mode, the processor generates all the required signals to drive the control signals
of the system bus. In particular, pins 24 to 31 are used as control signals.

Maximum mode
In maximum mode, the processor relies on a bus control chip such as the 8288 to drive the
control signals of the system bus. Pins 24 to 31 then take on a role different from that in
minimum mode. Most of these signals are decoded by the (8288) bus controller in order to drive
the system bus in a so-called maximum performance system. Such a system can involve more than
one microprocessor and possibly several DMA-capable peripherals.

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