Kreatryx Analog Circuits PDF

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Contents
Manual for K-Notes ................................................................................. 2
Diodes ..................................................................................................... 3
Transistor Biasing .................................................................................. 11
ww
Transistor Amplifier .............................................................................. 19
w.E
Feedback Amplifiers .............................................................................. 25
Operational Amplifiers (OP-AMP) ......................................................... 29
asy
En
gin
ee rin
g.n
et
© 2015 Kreatryx. All Rights Reserved.

Manual for K-Notes
Why K-Notes?
Towards the end of preparation, a student has lost the time to revise all the chapters
from his / her class notes / standard text books. This is the reason why K-Notes is
specifically intended for Quick Revision and should not be considered as comprehensive
study material.
ww What are K-Notes?
w.E
A 40 page or less notebook for each subject which contains all concepts covered in GATE
asy
Curriculum in a concise manner to aid a student in final stages of his/her preparation. It
is highly useful for both the students as well as working professionals who are preparing
En
for GATE as it comes handy while traveling long distances.
gin
When do I start using K-Notes?
(November end onwards).

ee
It is highly recommended to use K-Notes in the last 2 months before GATE Exam
rin
How do I use K-Notes?
g.n
et
Once you finish the entire K-Notes for a particular subject, you should practice the
respective Subject Test / Mixed Question Bag containing questions from all the Chapters
to make best use of it.
© 2015 Kreatryx. All Rights Reserved.

Diodes
Representation:
A: Anode K : Cathode
ww

w.E
The voltage at which the charged particles start crossing the junction is called as cut – in voltage
or Threshold voltage.
It is represented as VAK  V .
asy

I 0
D En
When VAK  V , depletion region exists and no charge carriers cross the junction, therefore

gin
When VAK  V , number of charged particles crossing the junction increases & the current
through the diode increase, non – linearly or exponentially.

 VAK

ee
Diode in the condition is said to be forward biased.
VT

 rin
ID  IS e  1



 g.n
I = reverse saturation current
S
V = Thermal voltage =
T
KT
q
et
K = Boltzmann constant
T = Temp. in k
q = charge of one e
V = 26mv at room temperature
T
 = intrinsic factor
 When V  0 , diode is said to be in reverse biased condition & no majority carriers cross the
AK
depletion region, hence I  0
D

Characteristics of Diode
ww
w.E
Equivalent circuit of diode
 Forward Bias asy

En
gin
ee rin
g.n
 Reverse Bias
et
Diode Resistance
1) State or DC Resistance
V
R  AK
DC I
D

2) Dynamic or AC Resistance
dV V
R  D  T
AC dI I
D D
Diode Applications
Clippers
It is a transmission circuit which transmits a part of i/p voltage either above the reference

ww
voltage or below the reference voltage or b/w the two reference voltages.
Series Clippers
w.E
i) Positive Clippers
asy V  V sin t
i m
: When V  V => V  V
i R O R
En V V
m R
When V  V => V  V
i R O i
gin
ee rin
g.n
et
ii) Negative Clipper
V  V sin t : When V   V => V  V
i m i R o R
V  V When V   V => V  V
m R i R o i

 Shunt Clipper
ww
i) Positive Clipper
When V  V , D is ON
w.E i
V V
o
R
R
asy When V  V , D is OFF

i R
V V
ii) Negative Clipper En o i
gin When V  V , D is ON
i R
ee V  V
o R
When V  V , D is OFF
i R rin
V V
o i
g.n
 Two level Clipper
When V  V , D is OFF & D is ON

et
i 2 1 2
V V
0 2
When V  V & V  V , D is OFF & D is OFF
i 2 i 1 2 1
V V
o i
When V  V , D is OFF D is ON
i 1 2 l
V V
o 1

CLAMPERS
These circuits are used to shift the signal either up words or down words.
 Negative Clampers
ww
w.E
When V  0
R asy
+ve peak is shifted to 0
En
-ve peak is shifted to 2V
When V  0
m
gin
R
+ve peak is shifted to V
R
ee rin
-ve peak is shifted to -2 V  V
m R
g.n
 Positive Clampers et

When V  0
R
-ve peak is shifted to 0
+ve peak is shifted to 2V
m
When V  0
R
-Ve peak is shifted to V
R
+ve peak is shifted to 2V  V
m R
ww
Rectifier
w.E
It converts AC signal into pulsating DC.
1) Half wave rectifier
asy
During positive half wave cycle
 R
V  V sin t  L 

En
0 m R  R 
 f L
gin
R = diode resistance
f
During negative half cycle

ee rin
V 0
0 g.n
  
V
0 avg
V
 m

et
4  RL 
     100%
2  R f  RL 
V
  
V
0 RMS
 m
2
V
 Form Factor = RMS   2
V
avg
 Ripple factor = FF2  1

 PIV  V
m

Bridge full wave rectifier
When +ve half wave cycle
R
V  V t  L
o R  2R
L f
When –ve half wave cycle
ww
V  V  t  
o
R
L
R  2R
L f
  
V
w.E 
2V
m
o avg


 asy
 

8 

2 
1
R


  100% En


1  2
R
L
f 

 gin
  
V
o RMS

V
 m
2 ee rin


FF 
2 2
PIV  V g.n
m
Zener Diode et
 A heavily doped a si diode which has sharp breakdown characteristics is called Zener Diode.
 When Zener Diode is forward biased, it acts as a normal PN junction diode.
 For an ideal zener diode, voltage across diode remains constant in breakdown region.
 If I is not given, then consider I 0

z(min) z(min)

Voltage Regulator
Regulators maintains constant output voltage irrespective of input voltage variation.
ww
w.E
asy
En
Zener must operate in breakdown region so V  V
i z
I I I
z L gin
V
I  z
L R
L
ee rin
I
max
I I
z max  L
g.n
I
I
min
I
z max 
I
z min L
I
max 
I
L
et
I I I
z min min L
10

Transistor Biasing
Bipolar Junction Transistor
 Current conduction due to both e- & holes

 It is a current controlled current source.
NPN Transistor
ww
w.E
asy
PNP Transistor
En
gin
ee rin
Region of Operation
g.n
i)
Junctions
J  RB
E
Region of operations
cut – off
et Applications
Switch
J  RB
C
ii) J  FB active amplifier
E
J  RB
C
iii) J  FB saturation Switch
E
J  FB
C
iv) J  RB reverse active Attenuation
E
J  FB
C
11

Current gain (α) (common base)
I I I
C nc o
I : injected majority carrier current in collector
nc
I
  nc
I
E
I  I I 1
I  B o ; I  B 
ww
C  1 E 
1   1 o
I
w.E
Current gain β (common emitter)
I  I  1    I
c B
 
o
asy

1
; 
1   
En

gin
These relations are valid for active region of operations.

Characteristics of BJT
Common Base characteristics

ee rin
g.n
input  V , I
BE E
output  V , I
CB C
et
Input characteristics
V vs I when V  cons tant
BE E CB
12

Output characteristics
ww
w.E
asy
 Common emitter characteristics
En
gin 
e
 e
inputs V , I
BE B
outputs V , I
CE C
rin
g.n
et
Input characteristics
13

Output characteristics
ww
w.E
Transistor Biasing
1) Fixed Bias method asy

V I R V 0
cc B B BE En
B
V V
I  cc
R
BE gin
B
Assuming active region of operation
I  I
ee rin
c
V V
CE
B
I R
CC C C g.n

Verification
If V V V  Active Re gion
et
CE  sat  CE CC
If not ; then saturation region
 For saturation region , V  V

CE CE  sat 
V V
CC CE  sat 
I 
C R
C
I
 In saturation region , I  C
B 
min
14

2) Feedback Resistor Bias Method
By KVL
cc 
c B c B B
V  I I R I R V I R 0
BE E E
 
V  I I R I R V  I I R 0
cc c B c B B BE C B B  
ww
Assuming active region
c
w.E
I  I
B
I 
B
V V
cc BE

R  1    R  R
B C E  asy
; I  I
c B

V  V  I  I R R   En
CE CC C B C E
gin
3) Voltage divider bias or self-bias ee rin
By thevenin’s theorem across R
R
2
g.n
V
R
TH
V 2
CC R  R
R R
 2 1
1 2 et
TH R  R
1 2
Apply KVL
V V I R
TH BE B TH
 I I R
B C E  
Assuming active region I  I
C B
V V
I  TH BE
B R  1    R
TH E
V V I R I R
CE CC C C E E
15

FET Biasing
JFET
ww
w.E
 When V
GS
asy
is negative, depletion layer is created between two P – region and that pinches the
channel between drain & source. En

gin
 The voltage at which drain current is reduce to zero is called as pinch off voltage.
 
2
ee
 Transfer – characteristics of JFET is inverted parabola
rin
V
I I
D DSS



1
V
GS 

GS  OFF  
g.n
When V

GS
 0, I  I
D DSS
et
When V V , I 0
GS GS  OFF  D
Pinch of voltage, V  V
p GS  OFF 
 For a N – channel JFET, pinch off voltage is always positive
V 0 & V 0
p GS
16

JFET Parameters
1) Drain Resistance
V
r  DS
d I
DS
It is very high, of the order of M .
ww
2) Trans conductance
I dI
g 
w.E
m V
D 
GS
dV
D
GS
I I

 1
V
GS


2
asy
D DSS 

V 
GS  OFF  
En
dI
D g 
2I
DSS

1 
V
GS
gin 

dV
GS
m V
GS  OFF 
3) Amplification factor


V
ee

GS  OFF  
rin
V
DS  g r
g.n

V
GS
md
et
MOSFET (Metal Oxide Semi-conductor FET)
17

Enhancement Type MOSFET
 No physical channel between source & drain

 To induce a channel Gate – source voltage is applied.
Depletion MOSFET
 Physical channel present between source & drain.
ww
Types of MOSFET
w.E
asy
En
gin
Operating characteristics ee rin
1. For n – channel MOSFET
cut  off region

g.n
 I  0 for V  V
D GS

T
V2 
et
 I  C
D
W
n ox L  GS 
V  V V  DS 
T DS 2 
 (linear region)
 
V
GS
 V and V
T DS
 V V
GS T 
2
 I  C

W VGS  VT  (saturation region)
D n ox L 2
V
GS
 V and V
T DS
 V V
GS T 
18

2. For p – channel MOSFET
 I  0 for V V (cut – off region)

D GS T
 V2 
 I  C
D
W
n ox L  GS T DS 
V  V V  DS 
2 
(linear region)
 
V  V and V V V
GS T DS GS T

ww  
I  C
D
W VGS  VT
n ox L
2
(saturation region)
V
GSw.E
 V and V
T DS
2
V
GS
V
T
Transistor Amplifier
asy
Small signal analysis for BJT
En
 h – parameter model of BJT
gin
ee rin
g.n
V  hI h V
1 i1 r 2
et
I  h I h V
2 f1 o 2
I
 current gain, A   2
I I
1
h R
A  f L
I 1h R
o L
V
 Input Impedance, Z  1 h h A R
i I i r I L
I
19

AR
 Voltage gain, A  I L
V Z
i
1
 Output impedance, Z 
o  hh 
h  f r 
 o h R 
 i s 
Common Emitter (CE) Amplifier
ww
w.E
asy
En
gin
ee rin
g.n
Small signal model
et
V h e
Voltage gain A  o  f R R
v V he c L  
i i
20

High frequency Analysis of BST
ww
w.E
r
bb' asy
= base spreading resistance.
r
b'e
= input resistance.
= feedback resistance. En
r
b'c
r = output resistance.
ce
gin
C
C
b' e
b'c
= diffraction capacitance.
= Transition capacitance.
ee rin
g = Transconductance.
m
g.n
Hybrid π - parameters et
 Ic Q KT
1) g  ; V  ,
m V T q
T
I = dc bias point collector current.

CQ
h
2) r  fe
b'e g
m
21

High Frequency Model
ww
r
w.E
b'c
= open circuited.
asy
En
gin
ee rin
g.n
Low Frequency Model et
22

Voltage gain as frequency
ww
w.E
asy
En
gin
ee rin
g.n

Low Frequency Range
External capacitor C and C are short circuited.

E C
et
 Internal capacitor C and C are open circuited.
b'c b'e
 Circuit becomes like.
= acts as high pass filter.
23

High frequency range
 External capacitors C ,C and C are short circuited.

b c E
 C is open circuited.
b'c
 Equivalent circuit behaves as a low pass filter with cut-off frequency fL.
Mid – band range

ww
All internal and external capacitance are neglected, so gain is independent of frequency.
FET Small Signal parameters
w.E I
Trans conductance, g  D
m V
GS
In non – saturation region
asy
I
g  D  C
W
.V En
m V
In saturation region
GS
n ox L DS
gin
g
ms
 C
W

V V
n ox L GS T ee rin
Small Signal equivalent circuit g.n
et
24

For low frequency
ww
w.E
For high frequency
asy
En
gin
Feedback Amplifiers
ee rin
Ideal Amplifier
Z 
in g.n
Z 0
o
Positive feedback : V  V  V
i s f
et
Negative Feedback : V  V  V
i s f
V A
For negative feedback, o 
V 1  A
s
V A
For positive feedback, o 
V 1  A
s
 Positive feedback is used for unstable system like oscillators.
25

Effects of Negative Feedback
i) Sensitivity
A
Without feedback =
A
A
With feedback = f
A
f
ww
A
A
f
f  1 A
1  A  A
w.E
ii) Input Impedance
Without feedback = Z
i asy
With feedback = Z
if En
Z
if
 Z 1  A 
i gin
iii) Output impedance
Without feedback = Z
ee rin
o
With feedback = Z
of g.n

Z
of
Z
o
1  A 
Negative feedback also leads to increase in band width
et
.
Topologies of Negative feedback
Output Input
Voltage Series
Voltage Shunt
Current Series
Current Shunt
26

1) Voltage Series Topologies
V  V
f o
It is called as series shunt feedback or voltage - voltage feedback.

In this case, input impedance increases & output impedance decreases.
ww
2) Voltage shunt topologies
f
w.E
I  V
o
asy
 = Trans conductance
En
gin
It is called as shunt-shunt or voltage current feedback.
3) Current series Topologies
V  I
f o
ee rin
 = resistance g.n
et
It is called as shunt – shunt or voltage current feedback.
4) Current shunt Topologies
I  I
f o
It is also called as shunt – series or current – current feedback.
27

Circuit Topologies
1) Voltage series
ww
w.E
2) Voltage shunt asy
En
gin
ee rin
g.n
et
3) Current – series
28

4) Current – shunt
ww
w.E
Operational Amplifiers (OP-AMP)
+  Non – inverting terminal
asy
-  inverting terminal
En
Parameters of OP–AMP
gin
1) Input offset voltage
ee rin
Voltage applied between input terminals of OP – AMP to null or zero the output.
2) Input offset current

g.n
et
Difference between current into inverting and non – inverting terminals of OP – AMP.
3) Input Bias Current
Average of current entering the input terminals of OP – AMP.
4) Common mode Rejection Ratio (CMRR)
Defined as ratio of differential voltage gain A to common mode gain A

d cm 
. 
A
CMRR  d
A
cm
29

5) Slew Rate
Maximum rate of change of output voltage per unit time under large signal conditions.
dV
SR  o V s
dt max
Concept of Virtual ground
ww
In an OP – AMP with negative feedback, the potential at non – inserting terminals is same as the
potential at inverting terminal.
w.E
Applications of OP –AMP
1) Inverting Amplifier
asy
R
V  f V
o R in En
1
gin
2) Inverting Summer ee rin
V V V
V  R  a  b  c
 g.n
o f R
 a
R
b
R
c



et
3) Non – inverting Amplifier
 R 
V  1  f V 
o  R in 
 1 
30

4) Non – inverting summer
If R  R  R  R
a b c
V R2
V  a
 
V R2
 b
 
V R2
 c
 
1 R R R R2 R R2
2
 Va  Vb  Vc 
ww
V 
1 3
w.E
o 
 R  V  V  V 
V  1  f   a
R 
1 
3
b c

 
asy
5) Differential Amplifier En
By Super position gin
V
ob 


R
 1  f
R
1
 R


3 V
R  R  b
 2 3
ee rin
V 
R
f V g.n
oa R
1
V V V
o oa ob
a
et
6) Integrator
1 t
o RC o in
V  V dc
31

7) Differentiator
dV
V  RC in
o dt
ww
w.E
8) Voltage to current converter
V
I  in
L R
asy
En
gin
ee rin
9) Current to voltage Converter g.n
V
out
 R I
p IN
et
32

10) Butter – worth Low Pass Filter
 R  V
V  1  f  in
o  R  1  j2fRC 
 1 
V A
o  f
V  f 
ww
in 1  j
 H
f 
w.E
 R 
A  1  f R  ; f 
f  1
1
H 2RC
asy
11) Butter – worth High Pass Filter
En
V  R   j2fRc  gin
V
o  1  f
in 
 R
1
 
  1  j2fRC 
 ee rin
   
 j f f  
 A  
f
L 
 f 
g.n
1  j 
 f 

 L   et
R
A 1 f
f R
1
1
f 
L 2RC
33

12) Active Half – wave rectifier
In this circuit, diode voltage drop between

V
input & output is not V but rather D ,
D A
where A = open loop gain of OP – AMP.
V  V
in o
ww
w.E
asy
En
gin
13) Active Full – wave Rectifier
ee rin
g.n
et
 
This circuit provides full wave rectification with a gain of  R R 
 1
R
V  V
m R m
1
34

14) Active Clipper
V  V , Diode conducts and V  V

IN R o
And when V  V Diode is OFF

IN R
V  V
o IN
ww
w.E
asy
En
gin
15) Active Clamper ee rin
V V V
o IN p g.n
V = peak value of V
p IN
et
35

16) Comparators
ww
w.E
asy
En
gin
ee rin
g.n
et
36

17) Schmitt Trigger
Inverting Schmitt Trigger
ww
w.E
asy


sat
En
When output is  V , then V
ref
 V
When output is V , then V  V

sat
When  
R
2
sat
gin
ref sat

R R
1 2
ee
Upper triggering point utp   V rin
sat
Lower triggering point Ltp   V
sat g.n
 Hystersis voltage = UTP  LTP  2V
sat
et
R1
UTP  V  V
sat R1  R 2 R
R1
LTP   V  V
sat R1  R 2 R
37

Non – Inverting Schmitt Trigger
ww
w.E
asy
En
gin
ee rin

R
R sat
R
Upper trigger Point UTP   2 V , Lower triggering point LTP   2 V
R sat g.n R
,  2
R

1
Hysteric voltage = UTP  LTP  2V
sat
1
et 1
18) Relaxation Oscillator
38

ww
w.E  R
2


R R
 1 2


 asy
1  
T  2RCln   En
1
1 
1
gin
f
T

1  
2RCln 
1 
 ee rin
555 Timer
g.n
Pin Diagram
et
39

 Bistable multi vibrator acts as a FF.

 Monostable Multi vibrator produces pulse output.
 Bistable Multi vibrator acts as free running oscillator.
A stable Multi vibrator
ww
w.E
asy
En
gin

T  0.69 R  R c 
ee rin
c 1 2
T  0.69R c
d 2
g.n
c d 1
T  T  T  0.69 R  2R C
2  et
1 1
f 

T 0.69 R  2R C
1 2 
40

ww
w.E
asy
En
gin
eer
ing
.ne
t

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Manual for K-Notes

ww What are K-Notes?

(November end onwards).

© 2015 Kreatryx. All Rights Reserved.

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 Forward Bias asy

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asy When V  V , D is OFF

ii) Negative Clipper En o i

When V  V , D is OFF & D is ON

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1) Half wave rectifier

During negative half cycle

 Ripple factor = FF2  1

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Bridge full wave rectifier

When +ve half wave cycle

When –ve half wave cycle

 If I is not given, then consider I 0

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Regulators maintains constant output voltage irrespective of input voltage variation.

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 Current conduction due to both e- & holes

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Current gain (α) (common base)

Common Base characteristics

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1) Fixed Bias method asy

 For saturation region , V  V

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2) Feedback Resistor Bias Method

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channel between drain & source. En

 For a N – channel JFET, pinch off voltage is always positive

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It is very high, of the order of M .

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Enhancement Type MOSFET

 No physical channel between source & drain

 Physical channel present between source & drain.

cut  off region

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2. For p – channel MOSFET

 I  0 for V V (cut – off region)

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Common Emitter (CE) Amplifier

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High frequency Analysis of BST

I = dc bias point collector current.

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High Frequency Model

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Voltage gain as frequency