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CHAPTER 6
6.1 INTRODUCTION
The fuzzy logic process has been explained by the following steps.
Initially, a crisp set of input data have been converted into a fuzzy set by
using fuzzy linguistic variables, fuzzy linguistic terms and membership
functions. This process is known as fuzzification. Secondly an inference is
framed by using a set of rules. Finally the process of defuzzification has been
carried out with the output of the fuzzification and converted to a crisp data
using the membership functions.
triangul trapezoidal
singleton
Fuzzy set operations evaluate the fuzzy rules and the combines the
results of the individual rules. The operations on fuzzy sets are different than
the operations on non-fuzzy sets. The mostly used operations for OR & AND
operators are max and min, respectively. After evaluating the result of each
rule, these results should be combined to obtain a final result. This process is
called inference.
6.1.4 Fuzzification
Intuition
Inference
Rank ordering
Angular fuzzy set
Neural network
Genetic algorithm
Inductive reasoning
6.1.4.1 Intuition
6.1.4.2 Inference
6.1.5 Defuzzification
After the inference, the obtained overall result is a fuzzy value. This
result should be converted into defuzzified to obtain a final crisp output.
Defuzzification is performed according to the membership function of the
output variable. The different defuzzification methods are:
*
cz
~
c
~
z
Where
z* is the defuzzified value, and it is shown in the Figure 6.2
graphically.
Z* Z
Figure 6.2 Max membership principle defuzzification
c z .zdz
z* ~
c z dz
~
Where
denotes an algebraic integration.
102
Z* Z
Figure 6.3 Centroid method
cz
~
Where
represents the algebraic sum and
0.5
0
a b z
a b
z*
2
0.5
0
a z* b z
Figure 6.5 Mean max membership method
S1 D2
+
L1 C1 VC1
D -
+ +
S2 D1 V0
C VS
- -
2
T C0G W/m
S4 D4
FLC +
L2
C2 VC2
%D -
S3 D3
PWM
AND S1, S3
(50Hz), 00
phase delay
Generally the converters must operate into a closed loop for giving
the desired output voltage irrespective of the source and the load disturbances.
All these problems are efficiently dealt with Fuzzy Logic Controller (FLC).
The two inputs will be fuzzified by using normalized fuzzy sets with
four triangular membership functions (MFs – input-1):Very Low (VL), Low
(L), Normal (N) and High (H), (MFs – input-2): Low (L), Normal (N), High
(H) and Very High (VH) as shown in Figure 6.7 (a) & (b).
After the fuzzification of the crisp inputs, the resulting fuzzy sets
have to be compared to the rule-base. The rule base is a set of " And method-
‘prod’ & Or method-‘probor" rules constructed according to the Table 6.1.
106
VL L N H
1
Deg.
of MF
0
400 600 800 10000
Irradiation in W/m2
L N H VH
1
Deg.
of MF
0
20 25 30 35
Temperature in 0C
VL L N H
1
Deg.
of MF
0
0.7173 0.7217 0.7277 0.7336
Duty Cycle
The last step in the FLC process is the defuzzification, which takes
the implied fuzzy set and transforms it back to a real continuous number or a
crisp output. The continuous pulse with desired duty cycle can be generated
by comparing the crisp set values with the high frequency triangular wave by
pulse width modulation (PWM) technique.
G
VL L N H
T
L H N L VL
N H N L VL
H N L VL VL
VH H H N L
108
G W/m2
Decision %D
Fuzzifier DeFuzzifier PWM
Making
T 0C
Rule
s
S1, S3 AND
(50Hz), 00
phase delay
S2, S4 AND
(50Hz), 1800
phase delay
Figure 6.8 Proposed fuzzy logic controller scheme for boost inverter
converters to match with the grid parameters like voltage, phase angle and
frequency. The main advantage of this control method is to keep the output
voltage constant barring various irradiations and temperatures.
Figure 6.10(a) Output of the solar pv array and input of the boost
inverter (VS)
the output voltage is 300 and also the magnitude of the output voltage is not
220Vrms, which can not satisfy the grid parameters.
Figure 6.11(a) Inductor current of the boost inverter (IL1 & IL2); 10A/div,
0.05s/div
Figure 6.11 (a) shows that the inductor current IL1 is less than 8A
and initial transient current is 10A with very minimum current ripple.
Therefore the inductor averaged current is controlled significantly. The
maximum instantaneous voltages of capacitors VC1 and VC2 is 300V which
are phase shifted by 1800 with each other as shown in Figure 6.12.
Table 6.2 Output voltages, output voltage THD and load current THD
of the Boost Inverter under various loads
Table 6.3 Output voltages and THD of the Boost Inverter under various
solar temperatures and irradiations
Input Output
Solar cell Irradiance Duty
Sl. voltage voltage
Temp.(T) (G) in cycle % THD
No. 0 2 (Vin) in (V0) in
in C W/m (D)
volts volts
1. 25 1000 0.7212 104.5 230 4.58
2. 25 800 0.7237 102.8 230 4.49
3. 30 1000 0.7255 105.9 230 4.48
4. 30 800 0.7255 104.3 230 4.46
5. 35 1000 0.7173 107.3 232 4.48
6. 35 800 0.7197 105.6 231 4.51
7. 20 600 0.7288 99.31 228 4.33
8. 20 400 0.7336 96.24 228 4.33
Table 6.2 and table 6.3 shows the output voltage variations in
variable loads and calculation of duty cycle for various temperatures,
irradiation of the solar PV array corresponding output voltages and THD of
the boost inverter are presented.