ADVANCED COMPUTER ARCHITECTURE

ASSIGNMENT- 1
 
 
 

Submitted To :  

Mrs. Rajni Sharma 

 

Submitted By:  

Geetu  

13201012017   

B.TECH. - CSE-2 , Sem : 7    

 
 
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MULTI - FUNCTIONAL ARITHMETIC PIPELINE   

Uni - functional :   

An arithmetic pipeline divides an arithmetic problem into various subproblems for 

execution in various pipeline segments. They are mostly used in high-speed 
computers. They are used to implement floating-point operations, multiplication of 
fixed-point numbers, and similar computations encountered in scientific problems.  

The process or flowchart arithmetic pipeline for floating point addition is shown in 
the ​ ​diagram. 
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2.  

For example:   

Floating point addition using arithmetic pipeline: The following  

sub-operations are performed in this case:  
● Compare the exponents.  
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● Align the mantissa.  

● Add or subtract the mantissa.  
● Normalize the result  

First of all, the two exponents are compared and the larger of two exponents is 
chosen as the result exponent. The difference in the exponents then decides how 
many times we must shift the smaller exponent to the right. Then after shifting of 
exponent, both the mantissa get aligned. Finally, the addition of both numbers takes 
place followed by normalization of the result in the last segment.  

Example:  
Let us consider two numbers,  
X=0.3214*10^3 and Y=0.4500*10^2  

Explanation:  
First  of  all  the  two  exponents  are  subtracted  to  give  3-2=1.  Thus  3  becomes 
the  exponent  of  result  and  the  smaller  exponent  is shifted 1 time to the right 
to give Y=0.0450*10^3  
Finally, the two numbers are added to produce  
Z=0.3664*10^3  

As the result is already normalized the result remains the same  

Multi - functional :   

A​ pipeline unit with a fixed and dedicated function, such as the floating-point adder 
is ​ ​called uni functional. The Cray-1 has 12 uni functional pipeline units for ​ ​various 
scalar, vector, fixed-point, and floating-point operations. A multi ​ ​functional pipeline 
may perform different subsets of stages in the pipeline. The TI ​A​SC. has four 
multifunction pipeline processors,   
each of which is reconfigurable for a variety of arithmetic logic operations at different 
time​ ​s.  

Texas Instruments’ Advanced Scientific Computer (TI-ASC) was the first vector 
processor that was installed with multifunction pipelines in its arithmetic processors. 
The ASC arithmetic pipeline consists of eight stages, as illustrated in figure. All the 
interconnection routes among the eight stages are shown. This pipeline can perform 
either fixed-point or floating-point arithmetic functions and many logical-shifting 
operations over scaler and vector operands of length 16, 32, or 64 bits. 
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3. 
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4.  

SUPERSCALAR PIPELINE  
A​ more aggressive approach is to equip the processor with multiple processing units to  
handle several instructions in parallel in each processing stage. With this arrangement,  
several instructions start execution in the same clock cycle and the process is said to 
use ​ ​multiple issue. Such processors are capable of achieving an instruction execution  
throughput of more than one instruction per cycle. They are known as ‘Superscalar  
Pipeline’.  

In the above diagram, there is a processor with two execution units; one for integer 
and ​ ​one for floating point operations. The instruction fetch unit is capable of reading 
the ​ ​instructions at a time and storing them in the instruction queue. In each cycle, the  
dispatch unit retrieves and decodes up to two instructions from the front of the queue. 
If ​ ​there is one integer, one floating point instruction and no hazards, both the 
instructions ​ ​are dispatched in the same clock cycle. 
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5.  

Advantages of Superscalar Architecture :  

• In a Superscalar Processor, the detrimental effect on performance of various 

hazards becomes even more pronounced.  

• The compiler can avoid many hazards through judicious selection and ordering of 

instructions.  

• The compiler should strive to interleave floating point and integer instructions. This 

would enable the dispatch unit to keep both the integer and floating point units 

busy most of the time.  

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• In general, high performance is achieved if the compiler is able to arrange program 

instructions to take maximum advantage of the available hardware units.  

 
Disadvantages of Superscalar Architecture:  
· Dependency checking is an overhead.   
· The dependency checking cost increases with an increase in the number ​ ​of 
instructions executed in parallel.  
· Pipeline stalls are common when an executing instruction is dependent on ​ ​the 
result of an unprocessed instruction. 
 
 
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