Name of Department:- Computer Science and Engineering

Logic Design
1. Subject Code: TCS 301 Course Title:

2. Contact Hours: L: 3 T: - P: -
3. Semester: III

4. Pre-requisite: Basics of Mathematics, Basic knowledge of computer programming and

components of computer system

5. Course Outcomes: After completion of the course students will be able to

1. Illustrate the Binary, Octal, Hexadecimal number system and Gate level minimization
using K-Map and Quine-McClusky Method.
2. Analyze and Design Binary/decimal adder, Binary substractor, Binary multiplier and
Multiplexer/Demultiplexer, comaprator, encoder, decoder.
3. Categorize Flip Flops (RS, JK, D and T).
4. Classify SISO, SIPO,PISO,PIPO and Design Asynchronous and Synchronous Counters.
5. Design and Evaluate Synchronous and Asynchronous Sequential circuits.
6. Investigate digital design problems of the society.

6. Details of Syllabus

Contact
UNIT CONTENTS
Hrs
Review of Number System: Digital Signals and Waveforms, Binary, Octal,
Hexadecimal; Complements, Signed Binary Numbers, Arithmetic Operation,
Binary Codes, Error Detection and Correction.
Unit - I
Boolean Algebra and Gate Level Minimization: Basic Definition, Boolean 10
Logic, postulates, Theorems and Properties. Digital Logic Gates, K-Map
Method for Minimization upto 6-Variables, Quine-Mc Clusky Method for
Minimization, NAND and NOR Gate Implementation.
Combinational Logic Circuit: Combinational circuits, Analysis Procedure,
Design Procedure, Binary Adder &  Subtractor, Decimal Adder, Binary
Unit - II
Multiplier, Magnitude Comparator, Multiplexer, Demultiplexer, Decoder,
9
Encoder, Parity Generator & Checker, Programmable Array Logic,
Programmable Logic Array, Code Convertors (BCD, Gray and Seven
Segment Code etc.).
Unit – III Sequential Logic Circuits: Triggering, Latches, Flip Flops: RS, JK, D and T
(Characteristics Table, Equation and Excitation Table), Flip Flop Conversion, 9
Race Around Condition, JK Master Slave Flip Flop.
Register: Types of Register, Serial In-Serial Out, Serial In-Parallel Out,
Parallel In- Parallel Out, Parallel In- Serial Out, Universal Shift Register,
Unit – IV
Application of Shift Registers.
10
Counter: Asynchronous Counter, Decoding Gates, Synchronous Counters,
Changing the Counter Modulus, Decade Counter, Presettable Counter,
Designing of Asynchronous and Synchronous Counters
Unit – V Design of Synchronous and Asynchronous Sequential Circuit: 8
Design of Synchronous Sequential circuit: Model Selection, State Transition
Diagram, State Synthesis Table, Design Equations and Circuit Diagram,
 Implementation using Read Only Memory, State Reduction Table and ASM
Chart.
Design of Asynchronous Sequential Circuit: Analysis of Asynchronous
Sequential Circuit, Problems with Asynchronous Sequential Circuit, Circuit
Designing, Case study - ORCAD
Total 46

Text Book:
1. Donald P Leach, Albert Paul Malvino& Goutam Saha, “Digital Principle and Application,”
7th Edition, Tata McGraw Hill, 2010
2. Mano M. Morris and Ciletti M.D., “Digital Design,” Pearson Education 4th Edition.

Reference Books:
1. Charles H. Roth,“Fundamentals of Logic Design,Jr.,” 5th Edition, Thomson, 2004
2. Ronald J. Tocci, Neal S. Widmer, Gregory L. Moss,“Digital Systems Principles and
Applications,” 10th Edition, Pearson Education, 2007