Phase frequency detector[edit]

A phase frequency detector (PFD) is an asynchronous circuit originally made of four flip-flops (i.e.,
the phase-frequency detectors found in both the RCA CD4046 and the motorola
MC4344 ICs introduced in the 1970s). The logic determines which of the two signals has a zero-
crossing earlier or more often. When used in a PLL application, lock can be achieved even when it is
off frequency.
The PFD improves the pull-in range and lock time over simpler phase detector designs such as
multipliers or XOR gates. Those designs work well when the two input phases are already close
(near lock or in lock), but perform poorly when the phase difference is too large. When the phase
difference is too large (which will happen when the instantaneous frequency difference is large), then
the sign of the loop gain can reverse and start driving the VCO away from lock for short intervals.
The design of the PFD avoids that problem. The PFD has the advantage of producing an output
even when the two signals being compared differ not only in phase but in frequency. A phase
frequency detector prevents a "false lock" condition in PLL applications, in which the PLL
synchronizes with the wrong phase of the input signal or with the wrong frequency (e.g., a harmonic
of the input signal).[3]
A bang-bang charge pump phase detector supplies current pulses with fixed total charge, either
positive or negative, to the capacitor acting as an integrator. A phase detector for a bang-bang
charge pump must always have a dead band where the phases of inputs are close enough that the
detector fires either both or neither of the charge pumps, for no total effect. Bang-bang phase
detectors are simple, but are associated with significant minimum peak-to-peak jitter, because of drift
within the dead band.
In 1976 it was shown that by using a three-state phase detector configuration (using only two flip-
flops) instead of the original RCA/Motorola twelve-state configurations, this problem could be
elegantly overcome.[citation needed] For other types of phase-frequency detectors other, though possibly
less-elegant, solutions exist to the dead zone phenomenon.[3] Other solutions are necessary since
the three-state phase-frequency detector does not work for certain applications involving randomized
signal degradation, which can be found on the inputs to some signal regeneration systems
(e.g., clock recovery designs).[4]
A proportional phase detector employs a charge pump that supplies charge amounts in proportion to
the phase error detected. Some have dead bands and some do not. Specifically, some designs
produce both "up" and "down" control pulses even when the phase difference is zero. These pulses
are small, nominally the same duration, and cause the charge pump to produce equal-charge
positive and negative current pulses when the phase is perfectly matched. Phase detectors with this
kind of control system don't exhibit a dead band and typically have lower minimum peak-to-peak
jitter when used in PLLs.
In PLL applications it is frequently required to know when the loop is out of lock. The more complex
digital phase-frequency detectors usually have an output that allows a reliable indication of an out of
lock condition.

References[edit]
1. ^ Paul Horowitz and Winfield Hill, The Art of Electronics 2nd Ed. Cambridge University Press,
Cambridge, 1989 ISBN 0-521-37095-7 pg. 644
2. ^ Jump up to:a b Crawford 1994, pp. 9, 19
3. ^ Jump up to:a b Crawford 1994, pp. 17-23, 153, and several other pages
4. ^ Wolaver 1991, p. 211
• Crawford, James A. (1994), Frequency Synthesizer Design Handbook, Artech
House, ISBN 0-89006-440-7
• Wolaver, Dan H. (1991), Phase-Locked Loop Circuit Design, Prentice Hall, ISBN 0-13-
662743-9
• Devon Fernandez and Sanjeev Manandhar (8 December 2003). "Digital Phase Locked
Loop" (PDF). Retrieved 2006-04-25.
• Zilic, Zeljko (2001-08-17). "Phase- and Delay-Locked Loop Clock Control in Digital
Systems". TechOnLine. Archived from the original on 2006-05-15. Retrieved 2006-04-
25.
• Mike Curtin and Paul O'Brien (July–August 1999). "Phase Locked Loops for High-
Frequency Receivers and Transmitters-3". Analog Dialogue. Analog Devices.
Retrieved 2006-04-25.