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D98IN837A
Rev. 9
May 2005 1/13
L4978
VCC
5
THERMAL VOLTAGES
SHUTDOWN MONITOR
CBOOT
CHARGE
2 INTERNAL INTERNAL
SS_INH INHIBIT SOFTSTART
REFERENCE SUPPLY 5.1V
3.3V
7
COMP 6
BOOT
8 E/A
FB PWM
R
Q CBOOT
3.3V S CHARGE
DRIVE AT LIGHT
LOADS
OSCILLATOR
3 1 4
OSC GND OUT D97IN594
N.C. 1 16 N.C.
GND 2 15 N.C.
GND 1 8 FB SS_INH 3 14 FB
SS_INH 2 7 COMP OSC 4 13 COMP
OSC 3 6 BOOT OUT 5 12 BOOT
OUT 4 5 VCC OUT 6 11 VCC
D97IN595 N.C. 7 10 N.C.
N.C. 8 9 N.C.
D97IN596
DIP-8 SO16W
1 2 GND Ground
2 3 SS_INH A logic signal (active low) disables the device (sleep mode operation).
A capacitor connected between this pin and ground determines the soft start time.
When this pin is grounded disables the device (driven by open collector/drain).
3 4 OSC An external resistor connected between the unregulated input voltage and this pin
and a capacitor connected from this pin to ground fix the switching frequency. (Line
feed forward is automatically obtained)
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6 12 BOOT A capacitor connected between this pin and OUT allows to drive the internal DMOS
Transistors
8 14 FB Stepdown feedback input. Connecting directly to this pin results in an output voltage
of 3.3V. An external resistive divider is required for higher output voltages.
(*) Pins 1, 7, 8, 9, 10, 15 and 16 are not internally, electrically connected to the die.
V6-V5 V12-V11 14 V
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D98IN834B
L4978
C1=220µF/63V EKE
C2=2.7nF VO(V) R3(KΩ) R4(KΩ)
C5=100nF 3.3 0
C6=100nF
C7=220nF/63V 5.1 2.7 4.7
C8=330µF/35V CG Sanyo 12 12 4.7
L1=126µH KoolMu 77120 - 55 Turns - 0.5mm
R1=20K 15 16 4.7
R2=9.1K 18 20 4.7
D1=STPS3L60U
24 30 4.7
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3.372
2
Tamb=25˚C 3.371
0% DC
1 3.370
0 5 10 15 20 25 30 35 40 45 50 Vcc(V) 0 5 10 15 20 25 30 35 40 45 50 VCC(V)
3 3.368
0Hz
3.366
VCC=35V
2 0% DC 3.364
3.362
1 3.360
-50 -30 -10 10 30 50 70 90 110 Tj(˚C) 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 IO(A)
Figure 8. Stand by drain current vs. input Figure 11. Switching frquency vs. R1 and C2
voltage. .
Ibias D97IN732 fsw D97IN784
(µA) (KHz)
150 Vss=GND
500 Tamb=25˚C
140 Tj=25˚C
0.8
2nF
130 200
1.2
nF
120 100
2.2
nF
110
50 3.3n
100 Tj=125˚C F
90 4.7n
F
20
5.6n
80 F
10
70
60 5
0 5 10 15 20 25 30 35 40 45 50 VCC(V) 0 20 40 60 80 R1(KΩ)
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Figure 12. Switching Frequency vs. input Figure 15. Efficiency vs output voltage.
voltage.. .
[%]
fsw D97IN735
98
(KHz)
fsw=100kHz
96
107.5
94
105.0 fsw=200kHz
92
102.5 Tj=25˚C
90
100.0
88
97.5
86
95.0 84
Vcc=35V
92.5 82 Io=2A
90.0 80
0 5 10 15 20 25 30
0 5 10 15 20 25 30 35 40 45 50 VCC(V) Vo [V]
Figure 13. Switching frequency vs. junction Figure 16. Efficiency vs. output current.
temperature. .
[%]
fsw D97IN785
95
(KHz) Vcc=8V
Vcc=12V
90
105
85
Vcc=24V
80
100
75
Vcc=48V
70
95
fsw=100kHz
65 Vo=5.1V
90 60
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2
-50 0 50 100 Tj(˚C) Io [A]
Figure 14. Dropout voltage between pin 5 and Figure 17. Efficiency vs. output current.
4. .
∆V D98IN836 [%]
(V) 95
0.7 Vcc=8V
Tj=125˚C 90
0.6
85
Vcc=12V
0.5 5˚C
=2
Tj 80
0.4
Vcc=24V
75
0.3 Tj=-25˚C
70
0.2
Vo=3.36V
65 fsw=100kHz
0.1 Vcc=48V
0.0 60
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 IO(A) Io [A]
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Figure 18. Efficiency vs. output current. Figure 21. Power dissipation vs. Vcc.
. .
Pdiss [mW]
D97IN740
η 1000
(%) VCC=8V
Vo=5.1V
90 fsw=100kHz
VCC=12V
800
Io=2A
85 VCC=24V
600
80 Io=1A
VCC=48V
Io=1.5A
75 400
70 fsw=200KHz Io=0.5A
VO=5.1V 200
65
0
60 0 10 20 30 40 50 60
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A)
Vcc [V]
Figure 19. Efficiency vs. output current. Figure 22. Device Power dissipation vs. Vo
. .
Pdiss [mW]
η D97IN741
1400
(%)
Vcc=35V
VCC=8V fsw=100kHz
90 1200
Io=2A
85 VCC=12V 1000
80 Io=1.5A
VCC=24V
800
75
600
Io=1A
70
VCC=48V 400
Io=0.5A
65 fsw=200KHz
VO=3.36V 200
60
0
55 0 10 20 30
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A) Vo [V]
Figure 20. Efficiency vs. Vcc. Figure 23. Pulse by pulse limiting current vs.
. junction temperature..
n [%] Ilim D97IN747
90 (A)
Vo=5.1V fsw=100kHz
fsw=100KHz
2.9 VCC=35V
85
Vo=5.1V fsw=200kHz 2.8
Vo=3.36V fsw=100kHz
2.7
80
75 2.5
Io=2A
2.4
70
0 10 20 30 40 50 60 2.3
Vcc [V] -50 -25 0 25 50 75 100 125 Tj(˚C)
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Figure 24. Load transient. Figure 27. Soft start capacitor selection Vs
. inductor and Vccmax.
L D97IN746
(µH)
fsw=200KHz 56nF
300 47nF
200 33nF
22nF
100
0
15 20 25 30 35 40 45 50 VCCmax(V)
Figure 25. Line transient. Figure 28. Open loop frequency and phase of
. error amplifier .
VCC D97IN786 GAIN D97IN787
(dB) Phase
(V)
30
50
GAIN
20
0 0
10
VO -50 45
1
(mV)
IO = 1A
fsw = 100KHz
100
-100 90
2 0 Phase
-150 135
-100
1ms/DIV
-200
10 102 103 104 105 106 107 108 f(Hz)
330nF
300
200 220nF
100
100nF
0
15 20 25 30 35 40 45 50 VCCmax(V)
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3 Package Informations
Figure 29. DIP-8 Mechanical Data & Package Dimensions
mm inch
DIM. OUTLINE AND
MIN. TYP. MAX. MIN. TYP. MAX.
MECHANICAL DATA
A 3.32 0.131
a1 0.51 0.020
D 10.92 0.430
e 2.54 0.100
e3 7.62 0.300
e4 7.62 0.300
F 6.6 0.260
I 5.08 0.200
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mm inch
DIM. OUTLINE AND
MIN. TYP. MAX. MIN. TYP. MAX.
MECHANICAL DATA
A 2.35 2.65 0.093 0.104
e 1.27 0.050
k 0˚ (min.), 8˚ (max.)
(1) “D” dimension does not include mold flash, protusions or gate SO16 (Wide)
burrs. Mold flash, protusions or gate burrs shall not exceed
0.15mm per side.
0016021 C
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