MEMS Fabrication I :

Process Flows and Bulk

Micromachining
Dr. Thara Srinivasan
Lecture 2
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U. Srinivasan © Picture credit: Alien Technology

Lecture Outline
• Reading
• Reader is in! (at South side Copy Central)
• Kovacs, “Bulk Micromachining of Silicon,” pp. 1536-43.
• Williams, “Etch Rates for Micromachining Processing,” pp.
256-60.
• Senturia, Chapter 3, “Microfabrication.”

• Today’s Lecture
• Tools Needed for MEMS Fabrication
• Photolithography Review
• Crystal Structure of Silicon
• Bulk Silicon Etching Techniques
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 IC Processing
Cross-section Masks Cross-section Masks

N-type Metal Oxide Semiconductor

(NMOS) process flow
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Jaeger

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CMOS Processing
• Processing steps
• Oxidation
• Photolithography
• Etching
• Chemical Vapor Jaeger
Deposition Complementary Metal-Oxide-Semiconductor
• Diffusion
• Ion Implantation
• Evaporation and deposit
Sputtering
• Epitaxy
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etch pattern

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 MEMS Devices

Polysilicon level 1
Plate
Polysilicon level 2
Polysilicon level 2
Staple
Polysilicon level 1

Silicon substrate
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Hinge staple
Silicon substrate Prof. Kris Pister
Support arm
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MEMS Devices

Microoptomechanical
switches, Lucent
Caliper

Thermally isolated RMS

converter Reay et al.
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Analog Devices
Integrated
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accelerometer Microturbine, Schmidt group MIT

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 MEMS Processing
• Unique to MEMS fabrication
• Sacrificial etching
• Mechanical properties critical
• Thicker films and deep etching
• Etching into substrate
• Double-sided lithography
• 3-D assembly
• Wafer-bonding
• Molding
• Integration with electronics, fluidics sacrificial layer
structural layer
• Unique to MEMS packaging and testing
• Delicate mechanical structures
• Packaging: before or after dicing? Package
• Sealing in gas environments
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• Interconnect - electrical, mechanical, fluidic Dice

• Testing – electrical, mechanical, fluidic Release
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Photolithography:
Masks and Photoresist
• Photolithography steps
• Photoresist spinnning, 1-10 µm spin coating
• Optical exposure through a photomask
• Developing to dissolve exposed resist
• Bake to drive off solvents
• Remove using solvents (acetone) or O2 plasma

• Photomasks
• Layout generated from CAD file
• Mask reticle: chrome or emulsion on fused silica
• 1-3 $k
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light-field dark-field

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 Photoresist Application
• Spin-casting photoresist
• Polymer resin, sensitizer, carrier
solvent
• Positive and negative photoresist

• Thickness depends on
• Concentration
• Viscosity
• Spin speed
• Spin time
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www.brewerscience.com
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Photolithography Tools

• Contact or proximity • Projection

• Resolution: Contact - 1-2 µm,
Proximity - 5 µm
• Depth of focus poor
• Double-sided lithography
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• Reduce 5-10×, stepper mode
• Resolution - 0.5 (λ/NA) ~ ≤ 1 µm
• Depth of focus ~ Few µms

• Make alignment marks on both sides of wafer

• Use IR imaging to see through to back side
• Store image of front side marks; align to back
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 Materials for MEMS

• Substrates
• Silicon
• Glass
• Quartz

• Thin Films
• Polysilicon
• Silicon Dioxide,
Silicon Nitride
• Metals Silicon crystal structure
• Polymers λ = 5.43 Å
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Wolf and Tauber

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Silicon Crystallography
[001] z z z
(110)

<100> y y y
[010]

[100] x (100) (110) (111)

x x
• Miller Indices (h k l)
• Planes
• Reciprocal of plane intercepts with axes
• Intercepts of normal to plane with plane
• (unique), {family}
• Directions
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• Move one endpoint to origin {111}

• [unique], <family>
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 Silicon Crystallography
0 1/2 0

3/4 1/4

1/2 0 1/2

1/4 3/4

0 1/2 0

• Angles between planes, ∠

• ∠ between [abc] and [xyz] given by:
ax+by+cz = |(a,b,c)|*|(x,y,z)|*cos(Θ)
θ (100),(111) = Cos −1 ((1 + 0 + 0) /(1)( 3 ))
• {100} and {110} – 45°
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• {100} and {111} – 54.74°

• {110} and {111} – 35.26, 90 and 144.74°
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Silicon Crystal Origami

{111} {110} {111}
(111) (101) (111)

{100}
(100)
[101][101]

{111} {110} {111}

(111) (101) (111)

Judy {100}
(001)

• Silicon fold-up cube

[011][011]

{110} {111} {110} {111} {110}

• Adapted from Profs. Kris (011) (111) (101) (111) (011)

Pister and Jack Judy

[110] [110]
{110}

{110}
{110}

[001]

{110}

{100} {100} {100}

(110)

(110)
(110)

(110)

• Print onto transparency

[001]

(010) (100) (010)

• Assemble inside out [100]

{110}
[100]

{111} {110} {111} {110}

• Visualize crystal plane
(011) (111) (101) (111) (011)
[010] [010]

orientations, intersections,
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{100}
and directions (001)

Judy, UCLA
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 Silicon Wafers
• Location of primary
and secondary flats
shows
• Crystal orientation
• Doping, n- or p-type
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Maluf

Mechanical Properties of Silicon

• Crystalline silicon is a hard and brittle material that
deforms elastically until it reaches its yield strength,
at which point it breaks.
• Tensile yield strength = 7 GPa (~1500 lb suspended from 1
mm²)
• Young’s Modulus near that of stainless steel
• {100} = 130 GPa; {110} = 169 GPa; {111} = 188 GPa
• Mechanical properties uniform, no intrinsic stress
• Mechanical integrity up to 500°C
• Good thermal conductor, low thermal expansion coefficient
• High piezoresistivity
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 What is Bulk
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Micromachining?

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Bulk Etching of Silicon

• Etching modes
• Isotropic vs. anisotropic
• Reaction-limited
• Etch rate dependent on temperature
• Diffusion-limited
• Etch rate dependent on mixing
• Also dependent on layout and
geometry, “loading” Maluf

• Choosing a method adsorption desorption

• Desired shapes surface
reaction
• Etch depth and uniformity
• Surface roughness
•
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Process compatibility
• Safety, cost, availability, slowest step controls
environmental impact
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rate of reaction

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 Wet Etch Variations, Crystalline Si
• Etch rate variation due to wet etch set-up
• Loss of reactive species through consumption
• Evaporation of liquids
• Poor mixing (etch product blocks diffusion of reactants)
• Contamination
• Applied potential
• Illumination

• Etch rate variation due to material being etched

• Impurities/dopants

• Etch rate variation due to layout

• Distribution of exposed area ~ loading
• Structure geometry
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Anisotropic Etching of Silicon

• Etching of Si with KOH
Si + 2OH- → Si(OH)2 2+ + 4e-
4H2O + 4e- → 4(OH) - + 2H2

• Crystal orientation relative etch

rates
• {110}:{100}:{111} = 600:400:1

• {111} plane has three of its bonds

below the surface
• {111} may form protective oxide
quickly
• {111} smoother than other crystal
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planes
<100>
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Maluf

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 KOH Etch Conditions
• 1 KOH : 2 H2O (wt.), stirred bath @ 80°C
• Si (100) → 1.4 µm/min
• Etch masks
• Si3N4 → 0
• SiO2 → 1-10 nm/min
• Photoresist, Al ~ fast
• “Micromasking” by H2 bubbles leads to roughness
• Stirring displaces bubbles
• Oxidizer, surfactant additives
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Maluf

Undercutting

• Convex
corners
bounded by
{111} planes
are attacked

Maluf
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Ristic
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 Undercutting

• Convex
corners
bounded by
{111} planes
are attacked
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Corner Compensation
• Protect corners with “compensation”
areas in layout
• Mesa array for self-assembly test
structures, Smith and coworkers (1995)
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Hadley Alien Technology

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Chang

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 Corner Compensation
• Self-assembly microparts, Alien Technology
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Other Anisotropic Etchants

• TMAH, Tetramethyl ammonium hydroxide, 10-40 wt.% (90°C)
• Etch rate (100) = 0.5-1.5 µm/min
• Al safe, IC compatible
• Etch ratio (100)/(111) = 10-35
• Etch masks: SiO2 , Si3N4 ~ 0.05-0.25 nm/min
• Boron doped etch stop, up to 40× slower

• EDP (115°C)
• Carcinogenic, corrosive
• Etch rate (100) = 0.75 µm/min
• Al may be etched
• R(100) > R(110) > R(111)
• Etch ratio (100)/(111) = 35
• Etch masks: SiO2 ~ 0.2 nm/min, Si3N4 ~ 0.1 nm/min
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• Boron doped etch stop, 50× slower

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 Boron-Doped Etch Stop
• Control etch depth precisely with
boron doping (p++)
• [B] > 1020 cm-3 reduces KOH etch
rate by 20-100×
• Gaseous or solid boron diffusion
• At high dopant level, injected
electrons recombine with holes in
valence band and are unavailable for
reactions to give OH-

• Results
• Beams, suspended films
• 1-20 µm layers possible
• p++ not compatible with CMOS
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• Buried p++ compatible

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Micronozzle

Maluf
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 Microneedles

Ken Wise group,

University of Michigan
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Microneedles
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Wise group,
University of Michigan
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EE C245 Microneedles

Wise group,
University of Michigan
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Electrochemical Etch Stop

• Electrochemical etch stop
• n-type epitaxial layer grown on p-type wafer forms p-n diode
• p>n → electrical conduction
• p<n → reverse bias current
• Passivation potential – potential at which thin SiO2 layer
forms, different for p- and n-Si

• Set-up
• p-n diode in reverse bias
• p-substrate floating → etched
• n-layer above passivation
potential → not etched
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Maluf

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 Electrochemical Etch Stop
• Electrochemical etching on preprocessed CMOS wafers
• N-type Si well with circuits suspended from SiO2 support beam
• Thermally and electrically isolated
• TMAH etchant, Al bond pads safe
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Reay et al. (1994)

Kovacs group, Stanford U.
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Pressure Sensors
• Bulk micromachined pressure n-type
sensors epilayer, Deposit
p-type insulator
• Piezoresistivity – change in substrate
electrical resistance due to
mechanical stress
Diffuse
• In response to pressure load on piezoresistors
thin Si film, piezoresistive
elements change resistance
• Membrane deflection < 1 µm Deposit &
pattern metal
(100) Si Bondpad P-type diffused Electrochemical
Metal
diaphragm piezoresistor etch of backside
conductors
R2 RR
n-type cavity
11 epitaxial
RR3
3 layer
(111)
(111)

Anodic
bonding
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Backside Anodically
port bonded of glass
Etched Pyrex Maluf
cavity substrate

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 Pressure Sensors

• Only 150 × 400 × 900 µm3

Catheter-tip
pressure sensor,
Lucas NovaSensor
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Isotropic Etching of Silicon

pure HF
reaction-limited • HNA: hydrofluoric acid (HF),
nitric acid (HNO3) and acetic
(CH3COOH) or water
• HNO3 oxidizes Si to SiO2
• HF converts SiO2 to soluble
H2SiF6
• Acetic prevents dissociation of
HNO3

• Etch masks
• SiO2 etched at 30-80 nm/min
• Nonetching Au or Si3N4

pure HNO3
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diffusion-limited
Robbins

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 Isotropic Etching Examples

Tjerkstra, 1997
• 5% (49%) HF : 80% (69%) HNO3 : 15% H2O (by volume)
• Half-circular channels for chromatography
• Etch rate 0.8-1 µm/min
• Surface roughness 3 nm

• Pro and Con

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• Easy to mold from rounded channels

• Etch rate and profile are highly agitation sensitive

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Dry Etching of Silicon

• Dry etching
• Plasma phase sheath
• Vapor phase

• Parameters
• Gas and species generated ~
ions, radicals, photons
• RF frequency, 13.56 MHz
• RF power, 10’s to – 1000’s W
• Pressure, mTorr – >100 Torr
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e - + CF4 → CF3+ + F + 2e-

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 Plasma Etching of Silicon
• Plasma phase etching processes (physical)
• Sputtering
• Physical, nonselective, faceted
• Plasma etching
• Chemical, selective, isotropic
• Reactive ion etching (RIE)
• Physical and chemical, fairly selective,
directional
• Inductively-coupled RIE
• Physical and chemical, fairly selective,
directional

• Crystalline silicon
• Etch gases ~ fluorine, chlorine-
based
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• Reactive species ~ F, Cl, Cl2

• Products ~ SiF4, SiCl4

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High-Aspect-Ratio Plasma Etching

• Deep reactive ion etching (DRIE) with
inhibitor film
• Inductively-coupled plasma
• Bosch method for anisotropic etching,
1.5 - 4 µm/min

• Etch cycle (5-15 s)

SF6 (SFx+) etches Si
• Deposition cycle (5-15 s)
C4F8 deposits fluorocarbon protective
polymer (-CF2-)n

• Etch mask selectivity: SiO2 ~ 200:1,

photoresist ~ 100:1
• Sidewall roughness: scalloping < 50 nm
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• Sidewall angle: 90 ± 2°
Maluf
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 DRIE Issues
• Etch rate is diffusion-limited and drops
for narrow trenches
• Adjust mask layout to eliminate large
disparities
• Adjust process parameters (etch rate
slows to < 1 µm/min)

• Etch depth precision

• Etch stop ~ buried layer of SiO2
• Lateral undercut at Si/SiO2 interface ~
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“footing”

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Maluf

DRIE Examples

Comb-drive Actuator
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Keller, MEMS Precision

Instruments
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 Electrospray Nozzle
Advanced BioAnalytical Services
G. A. Schultz et al., 2000.
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Vapor Phase Etching of Silicon

• Vapor-phase etchant XeF2
2XeF2(v) + Si(s) → 2Xe(v) + SiF4(v)
• Set-up
• Xe sublimes at room T
• Closed chamber, 1-4 Torr
• Pulsed to control exothermic heat of
reaction
• Etch rates: 1-3 µm/min (up to 40),
isotropic
• Etch masks: photoresist, SiO2, Si3N4, Al,
metals
• Issues
• Etched surfaces have granular structure,
10 µm roughness
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• Hazard: XeF2 reacts with H2O in air to

form Xe and HF
Xactix
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 Etching with Xenon Difluoride
• Post processed CMOS inductor
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Pister group

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Laser-Driven Etching
• Laser-Assisted Chemical Etching
• Laser creates Cl radicals from Cl2; Si
converts to SiCl4.
• Etch rate: 100,000 µm3/s; 3 min to
etch 500×500×125 µm3 trench
• Surface roughness: 30 nm RMS
• Serial process: patterned directly
from CAD file

Laser-assisted etching
of a 500×500 µm2
terraced silicon well.
Each step is 6 µm
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deep.
Revise, Inc.
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