INTRODUCTION TO MEMS

Prof. S. Mohan
Dept. of Instrumentation
Indian Institute of Science, Bangalore
E-mail: smohan@isu.iisc.ernet.in

VTU MEMS WORKSHOP

Belgaum
13 March 2006
MEMS
MEMS
 Microelectronic mechanical Systems (MEMS) refer to batch
fabricated sensing and actuation Systems.

 Integration of mechanical and electronic components on the same

chip at micro and nanoscales.

 Interdisciplinary activity involving various disciplines:

Mechanical, Electrical, Electronics, Communications, Sensors,
Instrumentation, Physics, Chemistry, Biology.

 Applications are in automotive, Chemical, Medicine, Aerospace,

Defence etc.
MEMS DEVICES
 Automotive & Aerospace Industry

 Space & Defence

 Bio MEMS

 Food Processing

 Instruments
TPMS Overview
The sensor must be located in the tire if it is to perform real-time
interior air pressure monitoring (see Figure 1).

Figure 1. Tire pressure monitoring requires a distributed system:

one remote sensing module inside each tire and a receiver module
that brings the information to the driver information interface.
MEMS TECHNOLOGY INVOLVES
• Design

• Materials R&D
• Processing
• Packaging
• Testing & Calibration
• Fault analysis
• Device application
Packed pressure sensor

 The packed pressure

sensor .
 The cap that is used as a
cover and as a pressure
port is seen. 
 The electrical connections
are covered with epoxy
for electrical isolation.
SUBSTRATES
SUBSTRATES FOR MEMS FABRICATION

Silicon
Glass
Ceramic
Polymers
Compound Semiconductors (III & IV)
Titanium
Tungsten
Silicon is the primary material of choice
Why Silicon?

Silicon is widely used in the fabrication of electronic integrated circuits.

- Economically manufactured in single crystal substrates.

- Crystalline nature provide significant electrical and mechanical advantages.

- Electrical conductivity could be modulated using impurity doping.

- Established processing technologies

- Batch fabrication (economical)

- Resources developed for IC fabrication can be used

 
  
        
WAFER PROCESSING

 
  
        
SMART MATERIALS :

These are the materials whose properties are not fixed and be changed
as desired during operation.

They posses adoptive capabilities to external stimuli such as

temperature, load or environment with “inherent intelligence”.

Their capabilities can be tailored by a proper choice of material

composition, processing methods and by controlling defects and
microstructure.
 MATERIALS

Chyrals
Electroactive Polymers
Shape Memory Alloys
Piezo Resistive Materials
Piezo Electric Materials
Thermoelectric Materials
Ferroelectric Materials
Magnetic Materials
Shape Memory Alloys
 Shape memory alloys are quite fascinating materials characterised by
shape memory effect and super elasticity which ordinary metals and alloys
do not have.

 The material remembers its original shape after being strained and
deformed.

 They return to the original shape when heated above a critical transition
temperature.

 Shape memory effect and superelasticity are based on the diffusionless

phase transformation called as MARTENSITIC TRANSFORMATION
SHAPE MEMORY ALLOYS (SMA):

The wires of NiTi embedded in composite materials have been used to modify the vibrational
characteristics.

They alter the rigidity or state of stress in the structure, thereby shifting the natural frequency
of the composite material.

Thus the structure would be unlikely to resonate with any external vibrations, a process known
a to be powerful enough to bring down a bridge.

Such a bridge contains a number of sensors to monitor cracks in cement, corrosion in the steel,
reinforcing rods and shape memory actuators in addition to the normal concrete and steel rods.

They also predict when the bridge is going to fall.

DISADVANTAGE : The response is slow as the actuation is mainly temperature dependent.

PEIZO RESISTIVITY
 Electrical changes in response to mechanical stress.

 Metal strain gauges to measure strain from which other parameters

as force, weight and pressure are estimated.

 Smith (1954) found that Si and Ge have higher piezoresistive

effect than metals.

 First pressure sensors based on diffused (impurity doped) resistors

in thin Silicon diaphragms were demonstrated in 1969.

 Majority of commercially available pressure sensors are Silicon

piezo resistors.
PIEZOELECTRICITY
 Certain classes of crystals (exiQuartz) produce electric field when
subjected to external force.

 Development of Quartz transmitter and receiver for Sonar

applications.

 Clock oscillators in computer and as ringers in cellular phones.

 Attractive for MEMS as they can be used as sensors as well as

actuators and can be deposited as thin films on Silicon substrates.
THERMOELECTRICITY
SEEBECK, PELTIER AND THOMSON EFFECTS
SEEBECK EFFECT :- Used in thermocouples

PELTIER EFFECT :- Used to make thermoelectric coolers and refrigerators.

A current flow occurs a junction of two dissimilar materials

causes a heat flux thus cooling one side and heating the other.

Devices are made of n type and p type bistelluride elements,

and are used to cool performance microprocessors, laser
diodes an infra red sensors.
Difficult to implement as micromachined thin structures.
MAGANETORESTICTIVE MATERIALS:

Similar to Piezoelectric materials they respond to magnetic fields rather

than electric fields.

The magnetic domains in the material rotate until they line up with an
external field.

This way the domains can expand the material

APPLICATIONS: Low frequency Low power sonar transducers,

motors and hydraulic actuators.
THIN FILM DEPOSITION
Thin Films
Thin films could be prepared:
 either with properties same as that of their
bulk counter parts
or
 with properties alltogether different from
bulk materials by
Proper selection of process and process
parameters
•To fabricate ICs and MEMS many different kinds of bulk materials and thin films are used.
•Thin films in ICs and MEMS are classified into following groups:

T h in F ilm s

T h e rm a l s ilic o n D ie le c tric film s P o l y c r y s t a l li n e S i M e ta l F i l m s

d io x id e (P o ly -S i)

D e p o s ite d s ilic o n d io x id e D e p o s ite d s ilic o n n itrie d T h in film s o f s m a rt

(S iO 2 ) (S i3 N 4 ) m a t e r i a ls
Deposition of uniform layers

Silicon
Metals
Alloys
Semiconductors
Insulators
Polymers
Smart Materials
Techniques

Evaporation
Sputtering
Epitaxy
Oxidation
Chemical Vapour Deposition

Ion implantation

Spin on
Spray pyrolysis

Electro deposition

Electroless deposition
EVAPORATION
 It is the formation of metal films for interconnections,
ohmic contacts rectifying metal-semiconductor
contacts, etc. Films can be deposited by vacuum
evaporation, sputtering, chemical vapor deposition, and
plating.
 
 Vacuum evaporation can be used to deposit single
element conductors, resistors and dielectrics.
Commonly used heating sources – electron beam
bombardment and resistance heating. Rotating
substrate holders may be used to achieve more uniform
deposition and step coverage.
 SPUTTERING
 Sputtering processes remove surface atoms or
molecular fragments from a solid cathode (target),
by bombarding it with positive ions from an inert gas
(argon) discharge, and deposit them on the nearby
substrate to form a thin film.
 
 In “reactive sputtering”, the chemical composition of
the deposited film can be modified by adding
reactive gases such as oxygen, nitrogen, or hydrogen
to the argon gas during sputtering.
Sputtering: Process Description

Target

Substrate
ION IMPLANTATION – IMPURITY DOPING
LITHOGRAPHY
Lithography Technologies

Optical lithography
E-Beam Lithography
X-Ray Lithography
Imprinting Lithography
Focused Ion Beam Lithography
Stereo lithography…
 Clean wafers

Deposit barrier layer

SiO2, Si3N4

Cote with photo resist

Basic Soft bake

process Align masks

flow Expose pattern

Develop photo resist

Hard bake

Etch windows in barrier layer

Remove photo resist

POSITIVE PHOTORESIST
 Is an organic resin material containing a “Sensitizer”
 It is spin coated on the wafer (t~0.5 to 10µ)
 Special types of resists can be spun upto 100µ thickness
 Large thickness of resist pose problems in exposing and defining features below
25µ as the sensitizer prevents the dissolution of unexposed resist during
developing process.

On exposure to UV or blue light (200 to 450 nm) it breaks down the sensitiser
(causing exposed regions to dissolve in developing solution)

NEGATIVE RESIST

Exposed areas remain and unexposed areas dissolve in developer.

Mask - Patterned opaque chromium layer
- Pattern layout is generated using a computer aided design
(CAD) tool
and transferred into the thin chromium layer
at mask making facility.
Double Sided Lithography

Often Lithographic patterns on both sides of a wafer need to be aligned

with respect to each other with a high degree of accuracy.

Ex:- Pressure Sensor

Front side : Piezoresistive elements
Back side : Cavity

Misalignment > 5µ alters the sensitivity of the output.

Double sided alignment or Front to back side alignment is used for

this purpose.
Alignment Procedure

Alignment masks on the mechanically clamped masks are viewed

by a set up dual objectives and an image is electronically stored.

 Wafer is then loaded with the back side alignment marks facing
the microscope objectives and positioned so that these marks are
aligned to the electronically stored image.

After Alignment
Exposure of the mask on to the front side of the wafer is completed in
Proximity or constant mode (error < 2µ)
Double sided alignment scheme for the Karl Suss MA-150 production mode system:
(a) The image of mask alignment marks is electronically stored;
(b) The alighment marks on the backside of the wafer are brought in focus;
(c) The position of the wafer is adjusted by translation and rotation to align the marks to the stored image.
The right-hand-side illustrates the view on the computer screen as the targets are brought into alignment.
E-Beam Lithography Systems:
Block diagram showing the major components of a typical electron beam
lithography system.
A commercial electron beam lithography tool.
(courtesy of JEOL Ltd.)
Movable microstructures in Si fabricated by EBL and RIE
 The applications:
 Nanoelectronics
- Nano MOSFET, single electron transistor, microwave device
 Nano devices based on carbon nano tubes
 Nano magnetic device for high density information storage.
 Making master tools for nanoimprinting
 Nano surface modification for molecule self assembly
 Making nano electrode – connect nano world to micro and macro
world.
 Nano guitar:
 Smallest guitar, about the size of a human blood cell. 10
micrometers long -- with six strings each about 50 nanometers, or
100 atoms, wide. Made by Cornell University researchers from
crystalline silicon, it demonstrates a new technology for a new
generation of electromechanical devices.

http://www.news.cornell.edu/s
cience/July97/guitar.ltb.html
ETCHING
Etching

Process of removing layers of materials like Si, SiO 2,

Al from the wafer by chemical, electrolytic or plasma
(ion bombardment) means
Why etching ?

For pattern transfer from the resist or metal

mask on to substrate which is the last step in
lithographic process
Characteristics of Etching
 Etch Rate
 Selectivity
 Uniformity
 Anisotropy
 Surface Quality
 Reproducibility
Wet Etching

 Simplest and well established etch technology

 Selectivity is infinite with typical techniques
 Mask is required to selectively etch the material
 Gives good result for proper combination of
etchant and mask material
 Two types – Isotropic and Anisotropic
 Dry Etching

 Material removal occurs in gas phase

 Essentially plasma based process
 Etches anisotropically at relatively low temperature & dry
environment. This helps realisation of sub micron devices
possible
 Solves all the problems associated with wet etching except
selectivity
 Adhesion is not critical
Dry Etching….
 Vertical etch rate is faster than the horizontal etch
rate  vertical profile is attainable  Exact
replica of mask pattern
 Undercutting can be controlled by varying plasma
chemistry, gas pressure & electrode potentials

So go for dry etching in MEMS fabrication

 Reactive Ion Etching
 Ion assisted etching

 Includes chemical part followed by a physical

part

 Etching independent of crystal orientation

 A popular sub class is Deep Reactive Ion

Etching (DRIE)
Reactive Ion Etching ….
 Substrate is etched by a combination of
chemical and physical interactions between
etching gas and substrate

 Uses RF glow discharges

 Etch rate and sidewall slope can be

controlled by adjustment of physical and
chemical parameters in the etch unit
Reactive Ion Etching System
Deep Reactive Ion Etching
 Variant of RIE, key to MEMS technology
 Provides deep trenches in Si, maintaining
 Excellent profile control

 High selectivity to masking material

 Low non uniformity across the wafer (<5% )

 Etches deep to give high aspect ratio (~10:1)

Si structures
DRIE …..
 Etching rate ~ 3m/min easily achievable
 Selectivity to photo masking materials ~
70:1 (twice as much for SiO2)
DRIE Setup - schematic
Applications
 Sensors and actuators

 Micro fluidic systems

 Micro optic components

 Micro moulds
Complex 3D Structures made by Dynamic MSL

Microturbine made of 100 layers of

4.5µm thickness

Microsprings made of 1000

layers of 5µm thickness
Typical FIB system
Spiral Shaped SiO2 deposited by FIB

3-D microstructure
FIB milled readout Pt deposited using FIB
gap of accelerometer assisted deposition
Micro-tool Fabrication using FIB

Arrows indicate the direction of beam

What is LIGA

Li thographie lithography

G alvanoformung electrodeposition

A bformung molding
PACKAGING
Packaging??
 Packaging of Microelectronics circuits is the
science and art of establishing interconnections
and an appropriate operating environment for
predominantly electrical (and in the case of
MEMS–-- Electro-Mechanical) circuits to process
and/or store information.
MEMS Packaging Issues

The detailed function of MEMS chip is critical to package

design
 Accelerometer do not require direct coupling to
outside media.
 Pressure Sensors do require such direct coupling.

Each MEMS system is unique in packaging requirement.

This causes the development of packaging standards
impossible.
 Package designs remain proprietary to companies.
 It become intrinsically commercial and industrial.
 Packaging details are treated as trade secrets.
 Material available is descriptive and minute details
are kept
 extremely private by the manufactures.
 Why is packaging important?
• Every IC and the vast majority of MEMS devices have to be
packaged
• Packaging determines the performance of the system
- number, length and shape of interconnections determine CPU
clock or RF frequency of the system
- length and electrical parameters of interconnections influence
transduction parameters of sensors
- Package material and design determine the maximum thermal
heat dissipation of the device
Why is packaging important?----contd--

• Packaging determines the size of the system

- Two levels of packaging hierarchy form the
bulk of miniaturized devices’ size and weight
• Packaging influences the reliability of device and
system
• Packaging influences (and in most cases determines)
the cost of devices and systems
Why is packaging necessary?
MEMS/Microsystems Packaging:
(common functions as in microelectronic packaging)
 provision of signal, voltage, and ground connections
 facilitation of thermal energy dissipation
 provision of stress-minimized mechanical support.
 protection of the components from potentially harmful
physical, chemical and other environmental influences
Additional functions for MEMS packaging:

• Provisionof a distortion less interface between sensors or actuators

and the non-electrical process environment.
• Interface should be of no influence on the measured value (sensors)
• Interface should cause as few energy losses as possible (actuators)
• Protection of micro components against any environmental stresses,
often caused by the very same events the device is designed for to
detect or to generate.
Fluidic, optical, mechanical, thermal interfaces urgently needed!
Comparison of IC packaging & MEMS packaging

 IC packaging:
Basically 4 levels of packaging
1.Chip & module level
2.Card level
3.Assembly of card to board
4.Assembly of various boards to make a system

 MEMS packaging: mainly 3 levels

1Die level 2.device level 3.system level
Simplified Process Flow For MEMS Packaging:
Die Level Packaging

 First the wafer dicing is done and the individual die are
separated
 Then post processing (removing sacrificial layer) and
packaging is done on each dice separately in ceramic cavity
package.
 This is very expensive and tedious but it protect
microstructure from strong vibration and unclean
environment during dicing.