Traffic Light Controller

In this lab we are going to design a traffic light controller with a Finite State Machine
(FSM).

Finite state machines (FSMs) are extremely important in embedded systems. There are
two types of state machines: Moore and Mealy. Moore machines strictly rely on the
current state to determine the output value. In contrast, Mealy machines rely on the
current state and the current input values to determine the current output value.

For example, consider a finite state machine with input X and output Z. The output should
be equal to 1 if and only if the value of X for the last three clock cycles was equal to a
logic 1. An example of a Moore FSM state diagram that implements such a machine is
shown below. Note that the value of the output Z is located within the circle, indicating
that it is associated with the state.

In contrast, a Mealy state machine that implements similar functionality is shown in the
figure below. However, note that there is a difference in the timing. In this case, the
output Z is equal to 1 if the value of X on the last three clock cycles including the current
clock cycle is equal to 1. As a result, the output value is specified on the arcs indicating
the state transitions instead of within the circle of the state itself.
Often, a Mealy machine will require fewer states than a Moore machine, but the output
will be more likely to experience varying behavior if the input values are unstable.

In both of the above figures, the names of the states are specified by letters alone.
However, when actually implemented in hardware, the current state is specified by the
values in the flip-flops. When the minimum number of flip-flops (i.e. state variables) is
used, the number of flip-flops required is at least log2S. For S states. Thus, both of the
above state machines require at least 2 state variables.

An alternative approach to state encoding involves one-hot encoding. In this case, each
state is specified by a particular flip-flop being equal to a logic 1 while all the other flip-
flops that encode state are equal to 0. Thus, in the case of the Mealy machine above,
one-hot encoding could use the following assignment:
S2 S1 S0
A: 1 0 0
B: 0 1 0
C: 0 0 1
When one-hot encoding is used, the number of flip-flops required is generally greater,
but the next-state equations may be more efficient.
 Lab Assignment:
For this lab, you are required to design a traffic light controller with an FSM. Here
are some requirements.
1. Draw a state diagram for your traffic light controller design.
a. It must be a really working traffic lights system. This means there should be
no traffic flow conflict. Your system should be as efficient as possible.
b. Make sure cars in every direction can go straight, turn left or turn right when
traffic allows and when it is their turn in the light cycles.
c. The road will be a 4-direction one: i.e. north, south, east, and west.
d. For each direction, there will be four lights, i.e. the left turn light, green,
yellow, and red. When going straight is allowed, the green light will be on for
15 time units, then the green light will turn off, and the yellow light will be on
for 5 time units. Then, the yellow light will turn to red until it is that direction’s
turn to go straight again—starting the next round of green. A counter may be
needed. The left light will be on when turning left is possible. How you do
this/when you allow a left turn, depends on your design.
2. Write Verilog code to realize your design.
3. Design a testbench for you traffic light controller. Make sure all the scenarios
have been tested.
4. Create a wrapper file to run your program on the board.
Use 4 LEDs for each direction. The first light is for the turn left direction, the
second for the green light, the third for yellow, and the fourth is for red. When in
the “green state”, the second LED light should be on, and the third and fourth
LEDs should be off. When the third LED turns on, the second LED should be
off. For the left turn light (the first LED), the exact timing depends on your
design. It should be on when turning left is possible and you want to allow a
safe left turn.
Demo:
• Explain your design and show how you complete your design in Verilog
• Show the testbench simulation results and prove your design is working.
• Run your program on the board and explain your design.
Requirement for lab report:
 Write up for your lab
 Introduce your own traffic light controller design with FSM diagram
 Screen shots of all your outputs both waveforms and implemented data on Basys
3 board, and explanation for your code.
 Answer for the post lab question.
 One video of your demo.

Post lab Questions:

1. What’s the difference between a Mealy State Machine and a Moore State
Machine?
2. List at least 3 real life examples that could be designed using a Mealy State
Machine and 3 for Moore State Machine.
3. What’s your choice for this lab? Why?