Professional Documents
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BAD40_HC
DIS/UMA Schematics Document
Sandy&Ivy Bridge
D D
Intel PCH
C C
UMA:UMA installed
UMA_Muxless:BOTH UMA or Muxless installed
UMA_PX_Muxless:UMA or PX or Muxless installed
<Variant Name>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Cover Page
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 1 of 108
5 4 3 2 1
5 4 3 2 1
SYSTEM DC/DC
BAD40 HC Block Diagram INPUTS
TPS5146
OUTPUTS
48
5V_S5 0D85V_S0
##OnMainBoard
(Discrete/UMA/co-lay) Project Code: 91.4SA01.001 CPU DC/DC
VT1317SFCX 42~43
Buttom Docking Project Name: BAD40_HC INPUTS OUTPUTS
D
VRAM PCB No: 11245 DCBATOUT VCC_CORE
D
VGA/HDMI(DVI)/DP 2GB/1GB SYSTEM DC/DC
88,89,90,91 PCB Version: 1 RT8237AGQW 45
HP OUT/SPDIF/MIC IN/LINE IN/ PCB Name: BAD40 HC MB INPUTS OUTPUTS
USB2.0/USB3.0/DC JACK/ DDR3 DCBATOUT 1D05V_VTT
900MHz Intel CPU
LAN/SERIAL PORT/PARALLEL PORT SYSTEM DC/DC
DDRIII 1333 Channel A DDRIII Slot 0 RT8239CGQW 41
14
IVY Bridge 1333 INPUTS OUTPUTS
Nvidia N13PGS PCIe x 16 5V_AUX_S5
3D3V_AUX_S5
DDRIII 1333 Channel B DDRIII Slot 1 DCBATOUT 5V_S5
27MHz 15
3D3V_S5
(Discrete only) 1333
SYSTEM DC/DC
RT8207LGQW 46
83.84,85,86,87
4,5,6,7,8,9,10,11,12,13
PCIE x 1 Express Card
75 INPUTS OUTPUTS
Discreet/UMA/PX Co-lay 1D5V_S3
EDP SWITCH DCBATOUT 0D75V_S0
49 DDR_VREF_S3
FDIx4x2 PCIE x 1
(UMA only) G sensor Mini-Card
DMIx4 79 USB x 1 802.11a/b/g 65 25MHz SYSTEM DC/DC
HDMI SWITCH VT1317SFCX 44
51
EDP SMBus INPUTS OUTPUTS
C QM77 PCIE x 1 BCM 57760 RJ45 DCBATOUT VCC_GFXCORE_PWR C
HDMI
Intel 31 SWITCH CONN 59
LCD SWITCH 32.768 KHz VGA
49 LVDS(Dual Channel) PCH RT8208AGQW 92
PCIE x 1 intel 82579 INPUTS OUTPUTS
RGB CRT Panther Point 105 25MHz
SWITCH SWITCH DCBATOUT VGA_CORE
CRT 50
10 USB2.0 ports TI CHARGER
Display Port 4 USB3.0 ports CardReader SD/MMC+/MS/ BQ24745RHDR 40
USB x 1
ETHERNET (10/100/1000Mb) MS Pro/xD INPUTS OUTPUTS
PCIE RTS5209 32
High Definition Audio
DCBATOUT BT+
USB CHARGER SATA 3G ports (4) 25MHz
Right Side: 26
USB x 1 USB x 1 107 SATA 6G ports (2) SYSTEM DC/DC
RT8015AGQW 47
PCIE ports (8) Mini-Card
PCIE x 1,USB x 2 INPUTS OUTPUTS
LPC I/F 66 USB x1 SIM
Bluetooth USB2.0 x 4 WWAN 66
63 ACPI 1.1 3D3V_S5 1D8V_S0
SPI
B B
SATA3.0 HDD
LPC Bus
56
Switches
INPUTS OUTPUTS
Internal Analog MIC Azalia Flash ROM LPC debug port SATA3.0 mSATA 1D5V_S3 1D5V_VGA_S0
60 71 66
CODEC 8MB+4MB 3D3V_S0 3D3V_VGA_S0
HP1
SATA2.0 OOD
CX20584 KBC 56
PCB LAYER
MIC IN SMBus
29
NUVOTON L1:Top L5:Power
NPCE885 27 L2:GND L6:Signal
L3:Signal L7:GND
L4:Signal L8:Bottom
2CH SPEAKER
Thermal
Touch Int. T7718 Fan
PAD KB 28
69 69 2528
A A
HR PX
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Block Diagram
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 2 of 108
5 4 3 2 1
A B C D E
PCH Strapping Huron River Schematic Checklist Rev.0_7 Processor Strapping Huron River Schematic Checklist Rev.0_7
Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is Default
SPKR Reboot option at power-up 1 unless specified otherwise) Value
Default Mode: Internal weak Pull-down.
No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-kΩ CFG[2] PCI-Express Static 1: Normal Operation.
- 10-kΩ weak pull-up resistor. Lane Reversal Lane Numbers Reversed 15 -> 0, 14 -> 1, ... 1
0:
INIT3_3V# Weak internal pull-up. Leave as "No Connect".
Disabled - No Physical Display Port attached to
GNT3#/GPIO55 GNT[3:0]# functionality is not available on Mobile. CFG[4] 1: Embedded DisplayPort.
4 GNT2#/GPIO53 Mobile: Used as GPIO only
Enabled - An external Display Port device is
0 4
GNT1#/GPIO51 Pull-up resistors are not required on these signals. 0: connectd to the EMBEDDED display Port
If pull-ups are used, they should be tied to the Vcc3_3power rail.
CFG[6:5] PCI-Express 11 : x16 - Device 1 functions 1 and 2 disabled
Enable Danbury: Connect to Vcc3_3 with 8.2-k? weak pull-up resistor. Port Bifurcation 10 : x8, x8 - Device 1 function 1 enabled ;
SPI_MOSI function 2 disabled
Straps 11
Disable Danbury:Left floating, no pull-down required. 01 : Reserved - (Device 1 function 1 disabled ;
function 2 enabled)
00 : x8, x4, x4 - Device 1 functions 1 and 2
Enable Danbury: Connect to +NVRAM_VCCQ with 8.2-kohm enabled
weak pull-up resistor [CRB has it pulled up
NV_ALE with 1-kohm no-stuff resistor] CFG[7] PEG DEFER TRAINING 1: PEG Train immediately following xxRESETB de assertion
1
0: PEG Wait for BIOS for training
Disable Danbury:Leave floating (internal pull-down)
NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.
Low (0) - Flash Descriptor Security will be overridden. Also,
when this signals is sampled on the rising edge of PWROK
then it will also disable Intel ME and its features. Voltage Rails
HAD_DOCK_EN# High (1) - Security measure defined in the Flash Descriptor will be enabled. POWER PLANE VOLTAGE DESCRIPTION
Platform design should provide appropriate pull-up or pull-down depending on ACTIVE IN
/GPIO[33]
3 the desired settings. If a jumper option is used to tie this signal to GND as 5V_S0
3D3V_S0
5V
3.3V 3
required by the functional strap, the signal should be pulled low through a weak 1D8V_S0 1.8V
pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently. 1D5V_S0 1.5V
1D05V_VTT 1.05V
Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal 0D85V_S0 0.95 - 0.85V
pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for 0D75V_S0 0.75V
strapping functions. VCC_CORE 0.35V to 1.5V
VCC_GFXCORE 0.4 to 1.25V S0
1D8V_VGA_S0 1.8V
3D3V_VGA_S0 3.3V CPU Core Rail
HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#. 1V_VGA_S0 1V Graphics Core Rail
HDA_SYNC Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no 5V_USBX_S3 5V
GPIO15 1D5V_S3 1.5V S3
confidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher DDR_VREF_S3 0.75V
suite with confidentiality
Note : This is an un-muxed signal.
BT+ 6V-14.1V AC Brick Mode only
This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low. DCBATOUT 6V-14.1V
Sampled at rising edge of RSMRST#. 5V_S5 5V All S states
CRB has a 1-kohm pull-up on this signal to +3.3VA rail. 5V_AUX_S5 5V
3D3V_S5 3.3V
3D3V_AUX_S5 3.3V
GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down
GPIO8 using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of 3D3V_LAN_S5 3.3V WOL_EN Legacy WOL
RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is
enabled.
2 Default = Do not connect (floating) 3D3V_AUX_KBC 3.3V DSW, Sx ON for supporting Deep Sleep states 2
High(1) = Enables the internal VccVRM to have a clean supply for
GPIO27 analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter Powered by Li Coin Cell in G3
circuits for analog rails. 3D3V_AUX_S5 3.3V G3, Sx and +V3ALW in Sx
USB Table
Pair Device
SMBus ADDRESSES
PCIE Routing 0 USB. port 1
1 USB. port 2 I 2 C / SMBus Addresses
HURON RIVER ORB
2 USB. port 3 Device Ref Des Address Hex Bus
LANE1 N/A
3 Dock
EC SMBus 1 BAT_SCL/BAT_SDA
LANE2 Mini Card2(WWAN) SATA Table 4 X Battery BAT_SCL/BAT_SDA
CHARGER BAT_SCL/BAT_SDA
1D05V_VTT
CPU1A 1 OF 9
J22 PEG_IRCOMP_R R401 1 2
IVY-BRIDGE PEG_ICOMPI 24D9R2F-L-GP
19 DMI_TXN[3:0] PEG_ICOMPO J21
Note: DMI_TXN0 B27 H22
DMI_RX#0 PEG_RCOMPO
D Intel DMI supports both Lane DMI_TXN1
DMI_TXN2
B25
A25
DMI_RX#1 D
Reversal and polarity inversion DMI_RX#2 PEG_RXN[0..15] 83
DMI_TXN3 B24 K33 PEG_RXN15
but only at PCH side. This is DMI_RX#3 PEG_RX#0 PEG_RXN14
19 DMI_TXP[3:0] PEG_RX#1 M35
enabled via a soft strap. DMI_TXP0 B28 L34 PEG_RXN13
DMI_TXP1 DMI_RX0 PEG_RX#2 PEG_RXN12
B26 DMI_RX1 PEG_RX#3 J35
DMI
DMI_TXP2 A24 J32 PEG_RXN11
DMI_TXP3 DMI_RX2 PEG_RX#4 PEG_RXN10
B23 DMI_RX3 PEG_RX#5 H34
H31 PEG_RXN9
19 DMI_RXN[3:0] DMI_RXN0 PEG_RX#6 PEG_RXN8
G21 DMI_TX#0 PEG_RX#7 G33
DMI_RXN1 E22 G30 PEG_RXN7
DMI_RXN2 DMI_TX#1 PEG_RX#8 PEG_RXN6
F21 DMI_TX#2 PEG_RX#9 F35
DMI_RXN3 D21 E34 PEG_RXN5
DMI_TX#3 PEG_RX#10 PEG_RXN4
19 DMI_RXP[3:0] PEG_RX#11 E32
DMI_RXP0 G22 D33 PEG_RXN3
DMI_RXP1 DMI_TX0 PEG_RX#12 PEG_RXN2
D22 DMI_TX1 PEG_RX#13 D31
Intel(R) FDI
Intel FDI supports both Lane FDI0_TX#3 PEG_RX6
FDI_TXN4 B21 F33 PEG_RXP8
Reversal and polarity inversion FDI_TXN5 C20
FDI1_TX#0 PEG_RX7
F30 PEG_RXP7
but only at PCH side. This is FDI_TXN6 FDI1_TX#1 PEG_RX8 PEG_RXP6
D18 FDI1_TX#2 PEG_RX9 E35
C enabled via a soft strap. FDI_TXN7 E17 FDI1_TX#3 PEG_RX10 E33
F32
PEG_RXP5
PEG_RXP4 C
PEG_RX11 PEG_RXP3
19 FDI_TXP[7:0] PEG_RX12 D34
FDI_TXP0 A22 E31 PEG_RXP2
FDI_TXP1 FDI0_TX0 PEG_RX13 PEG_RXP1
G19 FDI0_TX1 PEG_RX14 C33
FDI_TXP2 E20 B32 PEG_RXP0
FDI_TXP3 FDI0_TX2 PEG_RX15 PEG_TXN[0..15] 83
G18 FDI0_TX3
FDI_TXP4 B20 M29 PEG_C_TXN15 C401 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXN15
FDI_TXP5 FDI1_TX0 PEG_TX#0 PEG_C_TXN14 C402 SCD22U10V2KX-1GP PEG_TXN14
C19 FDI1_TX1 PEG_TX#1 M32 1DIS_PX_Muxless
2
FDI_TXP6 D19 M31 PEG_C_TXN13 C403 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXN13
FDI_TXP7 FDI1_TX2 PEG_TX#2 PEG_C_TXN12 C404 SCD22U10V2KX-1GP PEG_TXN12
F17 FDI1_TX3 PEG_TX#3 L32 1DIS_PX_Muxless
2
L29 PEG_C_TXN11 C405 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXN11
PEG_TX#4 PEG_C_TXN10 C406 SCD22U10V2KX-1GP PEG_TXN10
19 FDI_FSYNC0 J18 FDI0_FSYNC PEG_TX#5 K31 1DIS_PX_Muxless
2
Note: J17 K28 PEG_C_TXN9 C407 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXN9
19 FDI_FSYNC1 FDI1_FSYNC PEG_TX#6
Lane reversal does not apply to J30 PEG_C_TXN8 C408 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXN8
PEG_TX#7 PEG_C_TXN7 C409 SCD22U10V2KX-1GP PEG_TXN7
19 FDI_INT H20 J28 1DIS_PX_Muxless
2
FDI sideband signals. FDI_INT PEG_TX#8
H29 PEG_C_TXN6 C410 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXN6
PEG_TX#9 PEG_C_TXN5 C411 SCD22U10V2KX-1GP PEG_TXN5
19 FDI_LSYNC0 J19 FDI0_LSYNC PEG_TX#10 G27 1DIS_PX_Muxless
2
H17 E29 PEG_C_TXN4 C412 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXN4
19 FDI_LSYNC1 FDI1_LSYNC PEG_TX#11
F27 PEG_C_TXN3 C413 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXN3
PEG_TX#12 PEG_C_TXN2 C414 SCD22U10V2KX-1GP PEG_TXN2
PEG_TX#13 D28 1DIS_PX_Muxless
2
F26 PEG_C_TXN1 C415 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXN1
PEG_TX#14 PEG_C_TXN0 C416 SCD22U10V2KX-1GP PEG_TXN0
PEG_TX#15 E25 1DIS_PX_Muxless
2
1D05V_VTT 1 R402 2 24D9R2F-L-GP DP_COMP A18 EDP_COMPIO PEG_TXP[0..15] 83
A17 M28 PEG_C_TXP15 C417 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXP15
EDP_ICOMPO PEG_TX0
1 R403 2 10KR2J-3-GP eDP_HPD B16 EDP_HPD PEG_TX1 M33 PEG_C_TXP14 C418 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXP14
M30 PEG_C_TXP13 C419 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXP13
PEG_TX2 PEG_C_TXP12 C420 SCD22U10V2KX-1GP PEG_TXP12
PEG_TX3 L31 1DIS_PX_Muxless
2
C15 L28 PEG_C_TXP11 C421 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXP11
103 eDP_AUXP_CPU EDP_AUX PEG_TX4
D15 K30 PEG_C_TXP10 C422 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXP10
B Signal Routing Guideline:
103 eDP_AUXN_CPU EDP_AUX#
eDP PEG_TX5
PEG_TX6 K27 PEG_C_TXP9 C423 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXP9 B
EDP_ICOMPO keep W/S=12/15 mils and routing J29 PEG_C_TXP8 C424 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXP8
PEG_TX7 PEG_C_TXP7 C425 SCD22U10V2KX-1GP PEG_TXP7
C17 J27 1DIS_PX_Muxless
2
length less than 500 mils. 103 eDP_TXP0_CPU
F16
EDP_TX0 PEG_TX8
H28 PEG_C_TXP6 C426 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXP6
EDP_COMPIO keep W/S=4/15 mils and routing 103 eDP_TXP1_CPU EDP_TX1 PEG_TX9 PEG_C_TXP5 C427 SCD22U10V2KX-1GP PEG_TXP5
C16 EDP_TX2 PEG_TX10 G28 1DIS_PX_Muxless
2
length less than 500 mils. G15 E28 PEG_C_TXP4 C428 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXP4
EDP_TX3 PEG_TX11 PEG_C_TXP3 C429 SCD22U10V2KX-1GP PEG_TXP3
PEG_TX12 F28 1DIS_PX_Muxless
2
C18 D27 PEG_C_TXP2 C430 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXP2
103 eDP_TXN0_CPU EDP_TX#0 PEG_TX13 PEG_C_TXP1 C431 SCD22U10V2KX-1GP PEG_TXP1
103 eDP_TXN1_CPU E16 EDP_TX#1 PEG_TX14 E26 1DIS_PX_Muxless
2
D16 D25 PEG_C_TXP0 C432 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXP0
EDP_TX#2 PEG_TX15
NOTE. F15 EDP_TX#3
Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.
62.10055.321
5
6
7
8
Q401
4
3
2
1
Title
2
84.2N702.J31
CPU (PCIE/DMI/FDI)
2ND = 84.07002.I31 Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 4 of 108
5 4 3 2 1
SSID = CPU CPU1B 2 OF 9
Disabling Guidelines:
If motherboard only supports external graphics:
IVY-BRIDGE Connect DPLL_REF_SSCLK on Processor to GND through
1K +/- 5% resistor.
BCLK A28 CLK_EXP_P 20 Connect DPLL_REF_SSCLK# on Processor to VCCP
MISC
CLOCKS
22 H_SNB_IVB# C26 PROC_SELECT# BCLK# A27 CLK_EXP_N 20 through 1K +/- 5% resistorpower (~15 mW) may be
wasted.
D AN34 RN502
D
1D05V_VTT SKTOCC# CLK_DP_P_R CLK_DP_P_R 1
DPLL_REF_CLK A16 CLK_DP_P_R 20 4
A15 CLK_DP_N_R CLK_DP_N_R 20 CLK_DP_N_R 2 3 1D05V_VTT
H_PROCHOT# DPLL_REF_CLK#
1 2
SRN1KJ-7-GP
1
THERMAL
1 R502 2
AN33 R8 4K99R2F-L-GP SM_DRAMRST# 37
22,27 H_PECI PECI SM_DRAMRST#
DDR3
MISC
R513
CRB : 47pf 1 2 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R506 1 2 140R2F-GP
27,42 H_PROCHOT# PROCHOT# SM_RCOMP0
CEKLT:43pf 56R2J-4-GP
SM_RCOMP1 A5 SM_RCOMP_1 R507 1
SM_RCOMP_2 R508 1
2 25D5R2F-GP
SM_RCOMP2 A4 2 200R2F-L-GP
TCK AR26
PWR MANAGEMENT
1D05V_VTT
AL35 XDP_DBRESET#
DBR#
19,37 PM_DRAM_PW RGD 1 DY 2 V8 SM_DRAMPWROK
R505 0R2J-2-GP
BPM#0 AT28
AR29
B 37 VDDPW RGOOD BPM#1
BPM#2 AR30 B
BUF_CPU_RST# AR33 AT30
RESET# BPM#3
BPM#4 AP32
BPM#5 AR31
BPM#6 AT31
BPM#7 AR32
3D3V_S0
RN503
SRN1K5J-1-GP
XDP_DBRESET# 1 8
2 7
3 6 62.10055.321
HR PX
7,31,32,36,65,66,71,75,82,83,97,105 PLT_RST# 4 5 BUF_CPU_RST#
Wistron Corporation
H_CPUPW RGD BUF_CPU_RST# 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1
1
A EC501
SC120P50V2JN-1GP EC502
Taipei Hsien 221, Taiwan, R.O.C.
A
SC5P50V2CN-2GP Title
CPU (THERMAL/CLOCK/PM )
2
2
DY Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 5 of 108
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1C 3 OF 9 CPU1D 4 OF 9
IVY-BRIDGE IVY-BRIDGE
SA_CK0 AB6 M_A_DIM0_CLK_DDR0 14 SB_CK0 AE2 M_B_DIM0_CLK_DDR0 15
M_A_DQ[63:0] AA6 M_B_DQ[63:0] AD2
14 M_A_DQ[63:0] SA_CLK#0 M_A_DIM0_CLK_DDR#0 14 15 M_B_DQ[63:0] SB_CLK#0 M_B_DIM0_CLK_DDR#0 15
M_A_DQ0 C5 V9 M_B_DQ0 C9 R9
M_A_DQ1 SA_DQ0 SA_CKE0 M_A_DIM0_CKE0 14 M_B_DQ1 SB_DQ0 SB_CKE0 M_B_DIM0_CKE0 15
D D5 SA_DQ1 A7 SB_DQ1 D
M_A_DQ2 D3 M_B_DQ2 D10
M_A_DQ3 SA_DQ2 M_B_DQ3 SB_DQ2
D2 SA_DQ3 C8 SB_DQ3
M_A_DQ4 D6 AA5 M_B_DQ4 A9 AE1
M_A_DQ5 SA_DQ4 SA_CK1 M_A_DIM0_CLK_DDR1 14 M_B_DQ5 SB_DQ4 SB_CK1 M_B_DIM0_CLK_DDR1 15
C6 SA_DQ5 SA_CLK#1 AB5 M_A_DIM0_CLK_DDR#1 14 A8 SB_DQ5 SB_CLK#1 AD1 M_B_DIM0_CLK_DDR#1 15
M_A_DQ6 C2 V10 M_B_DQ6 D9 R10
M_A_DQ7 SA_DQ6 SA_CKE1 M_A_DIM0_CKE1 14 M_B_DQ7 SB_DQ6 SB_CKE1 M_B_DIM0_CKE1 15
C3 SA_DQ7 D8 SB_DQ7
M_A_DQ8 F10 M_B_DQ8 G4
M_A_DQ9 SA_DQ8 M_B_DQ9 SB_DQ8
F8 SA_DQ9 F4 SB_DQ9
M_A_DQ10 G10 AB4 M_B_DQ10 F1 AB2
M_A_DQ11 SA_DQ10 SA_CK2 M_B_DQ11 SB_DQ10 SB_CK2
G9 SA_DQ11 SA_CLK#2 AA4 G1 SB_DQ11 SB_CLK#2 AA2
M_A_DQ12 F9 W9 M_B_DQ12 G5 T9
M_A_DQ13 SA_DQ12 SA_CKE2 M_B_DQ13 SB_DQ12 SB_CKE2
F7 SA_DQ13 F5 SB_DQ13
M_A_DQ14 G8 M_B_DQ14 F2
M_A_DQ15 SA_DQ14 M_B_DQ15 SB_DQ14
G7 SA_DQ15 G2 SB_DQ15
M_A_DQ16 K4 AB3 M_B_DQ16 J7 AA1
M_A_DQ17 SA_DQ16 SA_CK3 M_B_DQ17 SB_DQ16 SB_CK3
K5 SA_DQ17 SA_CLK#3 AA3 J8 SB_DQ17 SB_CLK#3 AB1
M_A_DQ18 K1 W10 M_B_DQ18 K10 T10
M_A_DQ19 SA_DQ18 SA_CKE3 M_B_DQ19 SB_DQ18 SB_CKE3
J1 SA_DQ19 K9 SB_DQ19
M_A_DQ20 J5 M_B_DQ20 J9
M_A_DQ21 SA_DQ20 M_B_DQ21 SB_DQ20
J4 SA_DQ21 J10 SB_DQ21
M_A_DQ22 J2 AK3 M_B_DQ22 K8 AD3
M_A_DQ23 SA_DQ22 SA_CS#0 M_A_DIM0_CS#0 14 M_B_DQ23 SB_DQ22 SB_CS#0 M_B_DIM0_CS#0 15
K2 SA_DQ23 SA_CS#1 AL3 M_A_DIM0_CS#1 14 K7 SB_DQ23 SB_CS#1 AE3 M_B_DIM0_CS#1 15
M_A_DQ24 M8 AG1 M_B_DQ24 M5 AD6
M_A_DQ25 SA_DQ24 SA_CS#2 M_B_DQ25 SB_DQ24 SB_CS#2
N10 SA_DQ25 SA_CS#3 AH1 N4 SB_DQ25 SB_CS#3 AE6
M_A_DQ26 N8 M_B_DQ26 N2
M_A_DQ27 SA_DQ26 M_B_DQ27 SB_DQ26
N7 SA_DQ27 N1 SB_DQ27
M_A_DQ28 M10 M_B_DQ28 M4
M_A_DQ29 SA_DQ28 M_B_DQ29 SB_DQ28
M9 SA_DQ29 SA_ODT0 AH3 M_A_DIM0_ODT0 14 N5 SB_DQ29 SB_ODT0 AE4 M_B_DIM0_ODT0 15
62.10055.321 62.10055.321
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (DDR)
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 6 of 108
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1E 5 OF 9
IVY-BRIDGE
TPAD14-OP-GP AH27
TP701 TPAD14-OP-GP VCC_DIE_SENSE
1AK28 CFG0 VSS_DIE_SENSE AH26
TP702 1AK29
CFG2
TPAD14-OP-GP CFG1
AL26 CFG2
CFG2 CFG4 TP703 1AL27
CFG4 CFG3
D AK26 CFG4 RSVD#L7 L7 D
1
DIS_PX_Muxless EDP CFG5 AL29 AG7
CFG6 CFG5 RSVD#AG7
AL30 CFG6 RSVD#AE7 AE7
R703 CFG7 AM31 AK2
R702 1KR2J-1-GP CFG7 RSVD#AK2
AM32 CFG8
CFG
1KR2J-1-GP AM30 W8
2
CFG9 RSVD#W8
AM28 CFG10
AM26 CFG11
AN28 CFG12 RSVD#AT26 AT26
AN31 CFG13 RSVD#AM33 AM33
AN26 CFG14 RSVD#AJ27 AJ27
AM27 CFG15
AK31 CFG16
AN29 CFG17
RSVD#T8 T8
PEG Static Lane Reversal RSVD#J16 J16
AJ31 VAXG_VAL_SENSE RSVD#H16 H16
1: Normal Operation; Lane # AH31 VSSAXG_VAL_SENSE RSVD#G16 G16
CFG2 definition matches socket pin map definition AJ33 VCC_VAL_SENSE
AH33 VSS_VAL_SENSE
0:Lane Reversed
AJ26 RSVD#AJ26 RSVD_NCTF#AR35 AR35
RESERVED
RSVD_NCTF#AT34 AT34
RSVD_NCTF#AT33 AT33
RSVD_NCTF#AP35 AP35
RSVD_NCTF#AR34 AR34
C C
F25 RSVD#F25
PCIE Port Bifurcation Straps F24 RSVD#F24
F23 RSVD#F23
D24 RSVD#D24 RSVD_NCTF#B34 B34
CFG[6:5] 11: x16 - Device 1 functions 1 and 2 disabled G25 RSVD#G25 RSVD_NCTF#A33 A33
G24 RSVD#G24 RSVD_NCTF#A34 A34
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled E23 B35
RSVD#E23 RSVD_NCTF#B35
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) D23 RSVD#D23 RSVD_NCTF#C35 C35
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled C30 RSVD#C30
A31 RSVD#A31
B30 RSVD#B30
B29 RSVD#B29
D30 RSVD#D30 RSVD#AJ32 AJ32
B31 RSVD#B31 RSVD#AK32 AK32
SA A30 RSVD#A30
CFG5 CFG6 CFG7 C29 RSVD#C29
1
BCLK_ITP AN35
1
62.10055.321
A HR PX A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (RESERVED)
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 7 of 108
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1F POWER 6 OF 9
VCCIO Output Decoupling Recommendation:
IVY-BRIDGE
2 x 330 uF (3 x 330 uF for 2012 capable designs)
PROCESSOR CORE POWER 5 x 22 uF & 5 x 0805 no-stuff at Bottom
VCC_CORE 7 x 22 uF & 2 x 0805 no-stuff at Top
VCC_CORE 53A 1D05V_VTT
0308 -1
AG35
change to 78.2261T.5BL for acousit noice AG34
VCC1
AH13
VCC2 VCCIO1
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AG33 VCC3 VCCIO2 AH10
C805
C806
C807
C809
C810
C838
C839
C840
C841
AG32 VCC4 VCCIO3 AG10
1
C801
C802
C803
C804
C811
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC10U6D3V3MX-GP
D AG31 VCC5 VCCIO4 AC10 D
1
1
AG30 VCC6 VCCIO5 Y10
AG29 U10
2
VCC7 VCCIO6
AG28 P10
2
2
VCC8 VCCIO7
AG27 VCC9 VCCIO8 L10
AG26 VCC10 VCCIO9 J14
AF35 VCC11 VCCIO10 J13
AF34 VCC12 VCCIO11 J12
AF33 VCC13 VCCIO12 J11
AF32 VCC14 VCCIO13 H14
AF31 VCC15 VCCIO14 H12
AF30 VCC16 VCCIO15 H11
AF29 VCC17 VCCIO16 G14
C820
C819
C818
C817
C815
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
AF28 VCC18 VCCIO17 G13 No-stuff sites outside the socket may be removed.
1
2
VCC21 VCCIO20
AD34 VCC22 VCCIO21 F12
AD33 VCC23 VCCIO22 F11
AD32 VCC24 VCCIO23 E14
1D05V_VTT
0308 -1 AD31
AD30
VCC25 VCCIO24 E12
VCC26
AD29 VCC27 VCCIO25 E11
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AD28 VCC28 VCCIO26 D14
C816
C821
C822
C823
C824
C825
C826
C827
C812
C813
C814
C829
C830
C842
C843
C844
C845
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
AD27 VCC29 VCCIO27 D13
1
1
AD26 VCC30 VCCIO28 D12
AC35 VCC31 VCCIO29 D11 DY
AC34 C14
2
2
VCC32 VCCIO30
AC33 VCC33 VCCIO31 C13
AC32 VCC34 VCCIO32 C12
DY DY AC31 VCC35 VCCIO33 C11
C AC30 VCC36 VCCIO34 B14 C
0308 -1 AC29 VCC37 VCCIO35 B12
AC28 A14
change to 78.2261T.5BL for acousit noice AC27
VCC38 VCCIO36
A13
VCC39 VCCIO37
AC26 VCC40 VCCIO38 A12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C836
C835
C834
C833
C832
C831
C828
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
AA34 VCC42
1
VCC45
AA30 VCC46
AA29 VCC47
DY DY AA28 VCC48
AA27 VCC49
AA26 1D05V_VTT
VCC50
CORE SUPPLY
Y35
0312 -1 Y34
VCC51
VCC52
close to CPU
Y33 VCC53
Y32 H_CPU_SVIDDAT R804 1 2 130R2F-1-GP
VCC54
Y31 VCC55
Y30 VCC56
Y29 VR_SVID_ALERT# R805 1 2 75R2F-2-GP
VCC57
Y28 VCC58
Y27 VCC59
C855
C860
C854
C857
C859
C856
C858
C861
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
Y26 VCC60
1
V35 1D05V_VTT
VCC61
SVID
H_CPU_SVIDALRT# R803 2 43R2J-GP
V34
V33
VCC62 VIDALERT# AJ29
AJ30
1 VR_SVID_ALERT# 42 0412 -1M
2
1
V28 VCC68
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
V27 C877 C878 C879 C880
VCC69
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
V26
2
VCC70
C846
C847
C862
C865
C866
C863
C864
C867
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
U35 VCC71
1
U34 VCC72
U33 VCC73
U32
2
VCC74
U31 VCC75
U30 VCC76
DY DY DY DY U29 VCC77
U28 VCC78
U27 VCC79
U26 VCC80 VCC_CORE
C868
C869
C870
C871
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
R35 VCC81
1
R34 VCC82
R33 VCC83 R801,R802 close to CPU
1
R32
2
VCC84 R801
R31 VCC85
R30 100R2F-L1-GP-U
VCC86
R29 VCC87
SENSE LINES
R28
2
VCC88
R27 VCC89 VCC_SENSE AJ35 VCCSENSE 42
R26 VCC90 VSS_SENSE AJ34 VSSSENSE 42
P35 VCC91
1
P34 VCC92 1215 SC
P33 R802
VCC93
P32 VCC94 VCCIO_SENSE B10 VCCIO_SENSE 1 TP801 TPAD14-OP-GP 100R2F-L1-GP-U
A10 VSSIO_SENSE 1 TP802 TPAD14-OP-GP
SC22U6D3V5MX-2GP
C876
C872
C874
C875
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
P30
2
VCC96
1
P29 VCC97
A P28 VCC98 <Variant Name> A
P27
2
VCC99
P26 VCC100
DY Wistron Corporation
DY DY DY DY 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
VCC Output Decoupling Recommendation: Taipei Hsien 221, Taiwan, R.O.C.
4 x 470 uF at Bottom Socket Edge Title
8 x 22 uF at Top Socket Cavity
8 x 22 uF at Top Socket Edge CPU (VCC_CORE)
8 x 22 uF at Bottom Socket Cavity Size Document Number Rev
0308 -1 Custom
62.10055.321 BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 8 of 108
5 4 3 2 1
5 4 3 2 1
1
2 x 22 uF at Bottom Socket Cavity
R906
4 x 22 uF at Bottom Socket Edge
VCC_GFXCORE
CPU1G
POWER 7 OF 9
100R2F-L1-GP-U
UMA_PX_Muxless
2
VCC_AXG_SENSE
1201 SC VSS_AXG_SENSE
PROCESSOR VAXG: 38A
SENSE
LINES
AT24 IVY-BRIDGE AK35 VCC_AXG_SENSE 42
VAXG1 VAXG_SENSE
1
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AT23 AK34 VSS_AXG_SENSE 42
VAXG2 VSSAXG_SENSE
C901
C902
C903
C904
C905
C906
AT21 R907
VAXG3
1
AT20 Refer to the latest Huron River Mainstream PDG 100R2F-L1-GP-U
D VAXG4 D
AT18 (Doc# 436735) for more details on S3 power
VAXG5
AT17 UMA_PX_Muxless
2
VAXG6 reduction implementation.
UMA_PX_Muxless
UMA_PX_Muxless DY DY AR24
VAXG7
AR23
VAXG8
AR21 +V_SM_VREF_CNT should have 10 mil trace width
VAXG9
AR20
VAXG10
1201 SC AR18
AR17
VAXG11 SM_VREF
AL1
+V_SM_VREF_CNT 37
VREF
VAXG12
AP24
VAXG13 SNB 上上,1010 back IVB
UMA_PX_Muxless UMA_PX_Muxless AP23
VAXG14 M_VREF_DQ_DIMM0_C
AP21
VAXG15 M_VREF_DQ_DIMM1_C
AP20 VAXG16 SA_DIMM_VREFDQ B4 M_VREF_DQ_DIMM0_C 37
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AP18 VAXG17 SB_DIMM_VREFDQ D1 M_VREF_DQ_DIMM1_C 37
C907
C908
C918
C919
C920
C921
AP17 VAXG18
1
3
4
AN24 VAXG19
AN23 VAXG20 Chief River 1D5V_S0 RN902
DY AN21
2
2
VAXG21 SRN1KJ-7-GP
UMA_PX_Muxless
DY UMA_PX_Muxless
UMA_PX_Muxless
UMA_PX_Muxless AN20
VAXG22
2
1
VAXG24
GRAPHICS
AM24 VAXG25 VDDQ1 AF7
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AM23 AF4
VAXG26 VDDQ2
C909
C910
C911
C912
C913
C914
1201 SC AM21 VAXG27 VDDQ3 AF1
1
AM20 VAXG28 VDDQ4 AC7
AM18 VAXG29 VDDQ5 AC4 DY DY
AM17 AC1
2
VAXG30 VDDQ6
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY DY AL24 VAXG31 VDDQ7 Y7
C923
C925
C926
C927
C928
C929
C930
AL23 VAXG32 VDDQ8 Y4
1
1
AL21 VAXG33 VDDQ9 Y1
AL20 VAXG34 VDDQ10 U7
UMA_PX_Muxless
UMA_PX_Muxless UMA_PX_Muxless
UMA_PX_Muxless AL18 U4
2
2
VAXG35 VDDQ11
AL17 VAXG36 VDDQ12 U1 VDDQ Output Decoupling Recommendation:
AK24 VAXG37 VDDQ13 P7 1 x 330 uF
AK23 P4
C
AK21
VAXG38 VDDQ14
P1 0D85V_S0 6 x 10 uF C
VAXG39 VDDQ15
AK20 VAXG40
1201 SC AK18 VAXG41 PROCESSOR VCCSA: 6A
AK17 VAXG42
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
UMA_PX_Muxless AJ24 VAXG43
C916
C915
AJ23 VAXG44
1
SC22U6D3V5MX-2GP
AJ21 VAXG45
C932
SC22U6D3V5MX-2GP
DY AJ20
VAXG46 DY VCCSA Output Decoupling Recommendation:
1
1
C931
AJ18 1 x 330 uF
2
VAXG47
AJ17 M27
SA RAIL
AH24
VAXG48 VCCSA1
M26
2 x 10 uF at Bottom Socket Cavity
2
1
R902 R902 need be close to pin H23.
UMA_PX_Muxless 100R2F-L1-GP-U
1.8V RAIL
2
VCCSA_SENSE H23 VCCSA_SENSE VCCSA_SENSE 48
1D8V_S0
PROCESSOR VCCPLL: 1.8A
B6
MISC
VCCPLL1
SC1U10V2KX-1GP
A6 C22 VCCSA_VID0
VCCPLL2 VCCSA_VID0
C922
A2 C24 VCCSA_VID1
VCCPLL3 VCCSA_VID1
1
A19 H_SNB_IVB#_PWRCTRL
graphics and if GFX VR is not stuffed. VCCIO_SEL
Can be left floating (Gfx VR keeps VAXG rail from floating) SB 1020
2
B B
if the VR is stuffed change to DY 3D3V_S5
for co-lay DY R908 R912
DY
10KR2J-3-GP
10KR2J-3-GP
62.10055.321
1
R911
1
VCCSA_VID0 VCCSA_VID0 48
100KR2J-1-GP
DY VCCSA_VID1 VCCSA_VID1 48
VCCPLL Output Decoupling Recommendation:
2
1 x 330 uF
2
R913 R914
2 x 1 uF
10KR2J-3-GP
10KR2J-3-GP
1 x 10 uF H_SNB_IVB#_PWRCTRL
1
VCC_GFXCORE
PIn A19
1.05V H
2
R901
R903 R904 R905
0R3J-0-U-GP 0R3J-0-U-GP 0R3J-0-U-GP 0R3J-0-U-GP 1V L
DIS DIS DIS DIS
1
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (VCC_GFXCORE)
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 9 of 108
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1H 8 OF 9 CPU1I 9 OF 9
62.10055.321 62.10055.321
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (VSS)
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 10 of 108
5 4 3 2 1
5 4 3 2 1
D D
reserve
C C
B B
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
XDP
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 11 of 108
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 12 of 108
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 13 of 108
5 4 3 2 1
5 4 3 2 1
DM1
SSID = MEMORY M_A_A0 98
A0 NP1
NP1
M_A_A1 97 NP2
M_A_A2 A1 NP2
M_A_A[15:0] 6 96
M_A_A3 A2
95 110 M_A_RAS# 6
M_A_A4 A3 RAS#
92 113 M_A_WE# 6
M_A_A5 A4 WE#
91 115 M_A_CAS# 6
M_A_A6 A5 CAS#
M_A_A7
90
A6 Note:
86 114 M_A_DIM0_CS#0 6
M_A_A8 A7 CS0# If SA0 DIM0 = 0, SA1_DIM0 = 0
89 121 M_A_DIM0_CS#1 6
M_A_A9 A8 CS1#
85 SO-DIMMA SPD Address is 0xA0
M_A_A10 A9
107 73 M_A_DIM0_CKE0 6
A10/AP CKE0
M_A_A11 84
A11 CKE1
74 M_A_DIM0_CKE1 6 SO-DIMMA TS Address is 0x30
M_A_A12 83
M_A_A13 A12
119 101 M_A_DIM0_CLK_DDR0 6
A13 CK0
D M_A_A14 80
A14 CK0#
103 M_A_DIM0_CLK_DDR#0 6 If SA0 DIM0 = 1, SA1_DIM0 = 0 D
M_A_A15 78
79
A15
102 SO-DIMMA SPD Address is 0xA2
6 M_A_BS2 A16/BA2 CK1 M_A_DIM0_CLK_DDR1 6
CK1#
104 M_A_DIM0_CLK_DDR#1 6 SO-DIMMA TS Address is 0x32
109
6 M_A_BS0 BA0
108 11
6 M_A_BS1 BA1 DM0
6 M_A_DQ[63:0] 28
M_A_DQ0 DM1
5 46
M_A_DQ1 DQ0 DM2
7 63
M_A_DQ2 DQ1 DM3
15 136
M_A_DQ3 DQ2 DM4
17 153
M_A_DQ4 DQ3 DM5
4 DQ4 DM6 170
M_A_DQ5 6 187
M_A_DQ6 DQ5 DM7
16 DQ6
M_A_DQ7 18 200
DQ7 SDA PCH_SMBDATA 15,20,66,79
M_A_DQ8 21 202
M_A_DQ9 23
DQ8
DQ9
SCL PCH_SMBCLK 15,20,66,79
3D3V_S0
Thermal EVENT
M_A_DQ10 33 198 TS#_DIMM0_1 15
M_A_DQ11 DQ10 EVENT# 3D3V_S0
35 DQ11
M_A_DQ12 22 199
M_A_DQ13 DQ12 VDDSPD TS#_DIMM0_1
24 DQ13 1R1403 2
M_A_DQ14 34 197 10KR2J-3-GP
DQ14 SA0
1
M_A_DQ15 36 201 C1401
M_A_DQ16 DQ15 SA1
39 DQ16
SCD1U10V2KX-5GP
M_A_DQ17 41 77
2
M_A_DQ18 DQ17 NC#1
51 DQ18 NC#2 122
M_A_DQ19 53 125 1D5V_S3
DDR_VREF_S3 M_A_DQ20 DQ19 NC#/TEST
40 DQ20
M_A_DQ21 42 75
M_A_DQ22 DQ21 VDD1
50 DQ22 VDD2 76
M_A_DQ23 52 81
M_VREF_DQ_DIMM0 M_A_DQ24 DQ23 VDD3
57 DQ24 VDD4 82
0308 -1 1228 SC M_A_DQ25 59 87
M_A_DQ26 DQ25 VDD5
67 DQ26 VDD6 88
C M_A_DQ27 C
69 DQ27 VDD7 93
1 R1404 2 2 1 M_A_DQ28 56 94
0R0603-PAD R1405 DDR_WR_VREF01_B4 37 M_A_DQ29 DQ28 VDD8
58 DQ29 VDD9 99
0R3J-0-U-GP M_A_DQ30 1D5V_S3
M1 M_A_DQ31
68 DQ30 VDD10 100 SODIMM A DECOUPLING
70 105
DY be at least 20 mils wide DQ31 VDD11
1
SCD1U10V2KX-5GP
DQ34 VDD14
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
M_A_DQ35 143 117
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DQ35 VDD15
C1403
C1404
C1405
C1406
C1407
C1408
C1409
C1410
M_A_DQ36 130 118
DQ36 VDD16
1
M_A_DQ37 132 123
M_A_DQ38 DQ37 VDD17
140 124
M_A_DQ39 142
DQ38 VDD18 DY DY DY
2
M_A_DQ40 DQ39
147 2
M_A_DQ41 DQ40 VSS
149 DQ41 VSS 3
M_A_DQ42 157 8
M_A_DQ43 159
DQ42 VSS
9
DY
M_A_DQ44 DQ43 VSS
146 13
M_A_DQ45 DQ44 VSS
148 DQ45 VSS 14
M_A_DQ46 158 19
DQ46 VSS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Place these caps M_A_DQ47 160 20
0D75V_S0 DQ47 VSS
C1416
C1417
M_A_DQ48 163 25
DQ48 VSS
1
close to VTT1 and M_A_DQ49 165 26
M_A_DQ50 DQ49 VSS
VTT2. 1125 SC for RF 175 DQ50 VSS 31
M_A_DQ51 177 32
2
M_A_DQ52 DQ51 VSS
164 37
DQ52 VSS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C1420
C1421
M_A_DQ54 174 43
DQ54 VSS
1
SCD1U10V2KX-5GP
M_A_DQ57 183 49
2
H =4mm DDR3-204P-122-GP HR PX
62.10017.Z51
2nd = 62.10017.V51
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DDR3-SODIMM1
Size Document Number Rev
Custom
BAD40_HC 11
Date: Thursday, April 12, 2012 Sheet 14 of 108
5 4 3 2 1
5 4 3 2 1
M_B_A0 98 NP1
M_B_A1 A0 NP1
97 A1 NP2 NP2
M_B_A[15:0] 6 M_B_A2 96
M_B_A3 A2
95 A3 RAS# 110 M_B_RAS# 6
M_B_A4 92 113 M_B_WE# 6
M_B_A5 A4 WE#
91 A5 CAS# 115 M_B_CAS# 6
M_B_A6 90
M_B_A7 A6
86 A7 CS0# 114 M_B_DIM0_CS#0 6
M_B_A8 89 121 M_B_DIM0_CS#1 6
M_B_A9 A8 CS1#
85 A9
M_B_A10 107 73 M_B_DIM0_CKE0 6
M_B_A11 A10/AP CKE0
84 A11 CKE1 74 M_B_DIM0_CKE1 6
M_B_A12 83
M_B_A13 A12
119 101 M_B_DIM0_CLK_DDR0 6
M_B_A14 A13 CK0
M_B_A15
80
A14 CK0#
103 M_B_DIM0_CLK_DDR#0 6 Note:
D 78 D
A15 SO-DIMMB SPD Address is 0xA4
79 102 M_B_DIM0_CLK_DDR1 6
6 M_B_BS2 A16/BA2 CK1
CK1#
104 M_B_DIM0_CLK_DDR#1 6 SO-DIMMB TS Address is 0x34
109
6 M_B_BS0 BA0
108 11
6 M_B_BS1 BA1 DM0
6 M_B_DQ[63:0] 28
M_B_DQ0 DM1
M_B_DQ1
5
DQ0 DM2
46 SO-DIMMB is placed farther from
7 63
M_B_DQ2 DQ1 DM3 the Processor than SO-DIMMA
15 136
M_B_DQ3 DQ2 DM4
17 153
M_B_DQ4 DQ3 DM5
4 170
M_B_DQ5 DQ4 DM6
6 187
M_B_DQ6 DQ5 DM7
16
M_B_DQ7 DQ6
18 200 PCH_SMBDATA 14,20,66,79
M_B_DQ8 DQ7 SDA
21 202 PCH_SMBCLK 14,20,66,79
M_B_DQ9 DQ8 SCL
23
M_B_DQ10 DQ9 3D3V_S0
33 DQ10 EVENT# 198 TS#_DIMM0_1 14
M_B_DQ11 35
M_B_DQ12 DQ11
22 199
M_B_DQ13 DQ12 VDDSPD
24
DQ13
1
M_B_DQ14 34 197
DQ14 SA0
SCD1U10V2KX-5GP
M_B_DQ15 36 201 SA1_DIM1 2 1 C1501
M_B_DQ16 DQ15 SA1 R1501
39
2
M_B_DQ17 DQ16 10KR2J-3-GP
41 77
M_B_DQ18 DQ17 NC#77
51 DQ18 NC#122 122
M_B_DQ19 53 125 1D5V_S3
M_B_DQ20 DQ19 NC#125/TEST
40 DQ20
M_B_DQ21 42 75
M_B_DQ22 DQ21 VDD
50 DQ22 VDD 76
M_B_DQ23 52 81
M_B_DQ24 DQ23 VDD
57 DQ24 VDD 82
M_B_DQ25 59 87
M_B_DQ26 DQ25 VDD
67 DQ26 VDD 88
M_B_DQ27 69 93
M_B_DQ28 DQ27 VDD
56 DQ28 VDD 94
M_B_DQ29 58 99
M_B_DQ30 DQ29 VDD
68 DQ30 VDD 100
M_B_DQ31 70 105
M_B_DQ32 DQ31 VDD
129 DQ32 VDD 106
C M_B_DQ33 131 111 C
M_VREF_DQ_DIMM1 M_B_DQ34 DQ33 VDD
141 DQ34 VDD 112
DDR_VREF_S3 M_B_DQ35
0308 -1 1228 SC 143 DQ35 VDD 117
1D5V_S3
M_B_DQ36 130 118 SODIMM B DECOUPLING
M_B_DQ37 DQ36 VDD
132 DQ37 VDD 123
1 R1502 2 2 1 M_B_DQ38 140 124
R1503 DDR_WR_VREF01_D1 37 M_B_DQ39 DQ38 VDD
142 DQ39
0R0603-PAD 0R3J-0-U-GP M_B_DQ40 147 2
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DQ40 VSS
1
C1503
C1504
C1505
C1506
C1507
C1508
C1509
C1510
M_B_DQ41 149 3
M1 DY DQ41 VSS
1
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
M_B_DQ45 DQ44 VSS
148 DQ45 VSS 14
M_B_DQ46 158 19
M_B_DQ47 DQ46 VSS
160 20
M_B_DQ48 DQ47 VSS
163 DQ48 VSS 25
M_B_DQ49 165 26
M_B_DQ50 DQ49 VSS
175 DQ50 VSS 31
M_B_DQ51 177 32
M_B_DQ52 DQ51 VSS
164 37
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DQ52 VSS
C1513
C1514
M_B_DQ53 166 38
DQ53 VSS
1
M_B_DQ54 174 43 Layout Note:
M_B_DQ55 DQ54 VSS
Place these caps M_B_DQ56
176 DQ55 VSS 44
Place these Caps near
181 48
2
0D75V_S0 close to VTT1 and M_B_DQ57 DQ56 VSS
M_B_DQ58
183 DQ57 VSS 49 SO-DIMMB.
VTT2. M_B_DQ59
191 DQ58 VSS 54
1125 SC for RF 193 DQ59 VSS 55
M_B_DQ60 180 60
M_B_DQ61 DQ60 VSS
182 DQ61 VSS 61
C1519
C1520
C1521
M_B_DQ62
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DDR3-240P-28-GP
H = 8mm
62.10017.R91
1st = 62.10024.G01
2nd = 62.10024.D41
A A
HR PX
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DDR3-SODIMM2
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 15 of 108
5 4 3 2 1
5 4 3 2 1
D D
C (Blanking) C
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DDR3-SODIMM2
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 16 of 108
5 4 3 2 1
5 4 3 2 1
D D
3D3V_S0
4
3
RN1701 SDVO_STALLP AM40
SRN2K2J-1-GP This signal is on the LVDS interface. 94 LVDS_DDC_CLK_R T40 RN1706 DDI Port B Detect:(SDVO_CTRL_ DATA)
L_DDC_CLK
This signal needs to be left NC if eDP is 94 LVDS_DDC_DATA_R K47 L_DDC_DATA SDVO_INTN AP39 SRN2K2J-1-GP 1: Port B detected
SDVO_INTP AP40 UMA_PX_Muxless
RN1702 used for the local flat panel display L_CTRL_CLK T45 0: Port B not detected
SRN100KJ-6-GP L_CTRL_DATA L_CTRL_CLK
P39
1
2
L_BKLT_EN L_CTRL_DATA
1 4
2 3 LVDS_VDD_EN LVDS_IBG AF37 P38
LVD_IBG SDVO_CTRLCLK PCH_HDMI_CLK 51
RN
0313 -1 JE40 modify AF36 M39
LVD_VBG SDVO_CTRLDATA PCH_HDMI_DATA 51
1
UMA_PX_Muxless 1RN1704 4 LVDS_VREFH AE48
R1701
2K37R2F-GP
2 3 LVDS_VREFL AE47
LVD_VREFH
LVD_VREFL DDPB_AUXN
DDPB_AUXP
AT49
AT47
HDMI
UMA_PX_Muxless 0R4P2R-PAD AT40
DDPB_HPD PCH_DP1_HPD 51
Place near PCH 94 LVDSA_CLK# UMA_PX_Muxless AK39
2
LVDSA_CLK#
LVDS
94 LVDSA_CLK AK40 AV42 DDBP_DATA2# DDBP_DATA2# 51
LVDSA_CLK DDPB_0N DDBP_DATA2 3D3V_S0
DDPB_0P AV40 DDBP_DATA2 51
94 LVDSA_DATA0# AN48 AV45 DDBP_DATA1# DDBP_DATA1# 51
C LVDSA_DATA#0 DDPB_1N DDBP_DATA1 C
94 LVDSA_DATA1# AM47 LVDSA_DATA#1 DDPB_1P AV46 DDBP_DATA1 51
2
AJ48 AU47 DDBP_DATA0 DDBP_DATA0 51
LVDSA_DATA#3 DDPB_2P DDBP_DATA3# R1704 R1703
DDPB_3N AV47 DDBP_DATA3# 51
94 LVDSA_DATA0 AN47 AV49 DDBP_DATA3 DDBP_DATA3 51 2K2R2F-GP 2K2R2F-GP
LVDSA_DATA0 DDPB_3P
94 LVDSA_DATA1 AM49 LVDSA_DATA1 DY
94 LVDSA_DATA2 AK49
1
LVDSA_DATA2 DDPC_CTRLCLK
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
P42 DDPC_CTRLDATA
DDPC_CTRLDATA
AF40 LVDSB_CLK#
AF39 AP47 DDCP_AUX#
3D3V_S0 LVDSB_CLK DDPC_AUXN DDCP_AUX# 52
AP49 DDCP_AUX
DDPC_AUXP DDCP_AUX 52
AH45 LVDSB_DATA#0 DDPC_HPD AT38 PCH_DP_HPD 52
AH47 LVDSB_DATA#1
AF49 AY47 DDCP_DATA0# DDCP_DATA0# 52
LVDSB_DATA#2 DDPC_0N DDCP_DATA0
AF45 LVDSB_DATA#3 DDPC_0P AY49 DDCP_DATA0 52
AY43 DDCP_DATA1# DDCP_DATA1# 52
DDPC_1N DDCP_DATA1
AH43 AY45
LVDSB_DATA0 DDPC_1P DDCP_DATA1 52
DP
4
3
UMA_PX_Muxless
1
2
CRT
95 CRT_DDC_CLK T39 CRT_DDC_CLK DDPD_AUXP AT43
95 CRT_DDC_DATA M40 CRT_DDC_DATA DDPD_HPD BH41
DDPD_0N BB43
95 CRT_HSYNC M47 CRT_HSYNC DDPD_0P BB45
95 CRT_VSYNC M49 CRT_VSYNC DDPD_1N BF44
DDPD_1P BE44
DDPD_2N BF42
DAC_IREF_R T43 BE42
DAC_IREF DDPD_2P
Close to PCH side T42 CRT_IRTN DDPD_3N BJ42
1
DDPD_3P BG42
R1702
CRT_BLUE 1KR2D-1-GP PANTHER-GP-NF
CRT_GREEN
CRT_RED
71.PANTH.00U
2
5
6
7
8
RN1705
SRN150F-1-GP
UMA_PX_Muxless
4
3
2
1
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH (LVDS/CRT/DDI)
Size Document Number Rev
A3
BAD40_HC 11
Date: Thursday, April 12, 2012 Sheet 17 of 108
5 4 3 2 1
5 4 3 2 1
1
R1823 BJ16 AT10
TP4 RSVD5
10KR2J-3-GP
RN1801 BG16 BC8
SRN8K2J-2-GP-U TP5 RSVD6
GSENSOR_INT1
DY AH38
TP6
1 10 3D3V_S0 AH37 AU2
INT_PIRQB# INT_PIRQD# TP7 RSVD7
2 9 AK43 AT4
2
D INT_PIRQF# INT_PIRQE# TP8 RSVD8 D
3 8 AK45
TP9 RSVD9
AT3
INT_PIRQA# 4 7 INT_PIRQC# DGPU_PWR_EN# C18 AT1
INT_PIRQG# TP10 RSVD10
3D3V_S0 5 6 N30 AY3
TP11 RSVD11
1
R1824 H3 AT5
TP12 RSVD12
10KR2J-3-GP
AH12 AV3
TP13 RSVD13
AM4 AV1
TP14 RSVD14
AM5 BB1
TP15 RSVD15
R1822 Y13 BA3
2
TP16 RSVD16
K24 BB5
DGPU_HOLD_RST# TP17 RSVD17
1 2 L24 BB3
TP18 RSVD18
AB46 BB7
TP19 RSVD19
10KR2J-3-GP AB45 TP20 RSVD20 BE8
RSVD
RSVD21 BD4
RSVD22 BF6
0826 SB
B21 TP21 RSVD23 AV5
M20 TP22 RSVD24 AV10
AY16
TP23
BG46 TP24 RSVD25 AT8
SB 0920
RSVD26 AY5
BA2
RSVD27
82 USB30_RXN1 BE28 USB3RN1
82 USB30_RXN2 BC30 USB3RN2 RSVD28 AT12
82 USB30_RXN3 BE32 USB3RN3 RSVD29 BF3
104 USB30_RXN4 BJ32
BC28
USB3RN4 USB Ext. port 1 (HS)
82 USB30_RXP1 USB3RP1
82 USB30_RXP2 BE30 USB3RP2 External debug port use on Huron river platform
82 USB30_RXP3 BF32 USB3RP3
104 USB30_RXP4 BG32 C24 USB_PN0 82
A16 swap override Strap/Top-Block
82
82
USB30_TXN1
USB30_TXN2
SCD1U10V2KX-4GP 1
SCD1U10V2KX-4GP 1
2C1801
2C1802
USB30_TXN1_C
USB30_TXN2_C
AV26
BB26
USB3RP4
USB3TN1
USB3TN2
USBP0N
USBP0P
USBP1N
A24
C25
USB_PP0
USB_PN1
82
82
USB Table
Swap Override jumper 82 USB30_TXN3 SCD1U10V2KX-4GP 1 2C1803 USB30_TXN3_C AU28 B25 USB_PP1 82
SCD1U10V2KX-4GP 1 USB3TN3 USBP1P
104 USB30_TXN4 2C1804 USB30_TXN4_C AY30 USB3TN4 USBP2N C26 USB_PN2 82 Pair Device
C SCD1U10V2KX-4GP 1 C
82 USB30_TXP1 2C1805 USB30_TXP1_C AU26 USB3TP1 USBP2P A26 USB_PP2 82
PCI_GNT#3 Low = A16 swap 82 USB30_TXP2 SCD1U10V2KX-4GP 1 2C1806 USB30_TXP2_C AY26 K28 USB_PN3 104 0 USB port 2 on S/B
SCD1U10V2KX-4GP 1 USB3TP2 USBP3N
override/Top-Block 82 USB30_TXP3 2C1807 USB30_TXP3_C AV28 USB3TP3 USBP3P H28 USB_PP3 104
Swap Override enabled 104 USB30_TXP4 SCD1U10V2KX-4GP 1 2C1808 USB30_TXP4_C AW30 E28 1216 SC 1 USB port 3 on S/B
USB3TP4 USBP4N
High = Default USBP4P D28
3D3V_S0 USBP5N C28 USB_PN5 69 2 USB port 4 on S/B(usb charger)
USBP5P A28 USB_PP5 69
USBP6N
C29 3 DOCK
BOOT BIOS Strap 2 USBP6P
B29 0915 SB
INT_PIRQA# K40 N28 4 BLUETOOTH(from port3)
GNT1#/GPIO51 SATA1GP/GPIO19 BOOT BIOS Location R1814 INT_PIRQB# PIRQA# USBP7N
K38 PIRQB# USBP7P M28
PCI
8K2R2J-3-GP INT_PIRQC# H38 L30 USB_PN8 66 5 Fingerprint(from port2)(NO USE)
INT_PIRQD# PIRQC# USBP8N
0 0 LPC G38
PIRQD# USBP8P
K30 USB_PP8 66
G30 6 X
1
USBP9N
0 1 Reserved 83 DGPU_HOLD_RST# C46 REQ1#/GPIO50 USBP9P E30 1208 SC
USB
94,95,103 DGPU_SELECT# C44 REQ2#/GPIO52 USBP10N C30 USB_PN10 66 7 X
1 0 Reserved 93 DGPU_PWR_EN# E40
REQ3#/GPIO54 USBP10P
A30 USB_PP10 66
USBP11N
L32 USB_PN11 65 8 Mini Card2 (WWAN)
1 1 SPI(Default) 94 DGPU_PWM_SELECT# D47 GNT1#/GPIO51 USBP11P K32 USB_PP11 65
DGPU_PWM_SELECT# E42 G32 USB_PN12 49 9 USB port1(SATA Combo),on M/B
GNT2#/GPIO53 USBP12N
F46 E32 USB_PP12 49
GNT3#/GPIO55 USBP12P USB_PN13_C
USBP13N
C32 10 3G Card
A32 USB_PP13_C
INT_PIRQE# USBP13P
G42 PIRQE#/GPIO2 11 Mini Card1 (WLAN)
56 SATA_ODD_DA# 1 R1813 2 INT_PIRQF# G40
0R0402-PAD INT_PIRQG# PIRQF#/GPIO3 USB_RBIAS
C42
PIRQG#/GPIO4 USBRBIAS#
C33 1 2 12 CAMERA
1 2 GSENSOR_INT1_R
D44 R1811
79 GSENSOR_INT1 PIRQH#/GPIO5
R1821 22D6R2F-L1-GP 13 New Card or USB HUB(New/Smart)
0R0402-PAD B33
USBRBIAS 3D3V_S5
0131 SD K10
PME#
5,27,31,32,36,65,66,71,75,82,83,97,105 PLT_RST# C6 PLTRST# OC0#/GPIO59 A14
2
K20
OC1#/GPIO40 R1820
B17
B
R1804 OC2#/GPIO41 B
71 CLK_PCI_LPC 1 2 22R2J-2-GP CLK_PCI_LPC_R H49 C16 10KR2J-3-GP
R1805 CLKOUT_PCI0 OC3#/GPIO42
20 CLK_PCI_FB 1 2 22R2J-2-GP CLK_PCI_FB_R H43 CLKOUT_PCI1 OC4#/GPIO43 L16
27,82 CLK_PCI_KBC R1806 1 2 22R2J-2-GP CLK_PCI_KBC_R J48 A16
1
CLKOUT_PCI2 OC5#/GPIO9
K42 D14
CLKOUT_PCI3 OC6#/GPIO10
H40 C14
CLKOUT_PCI4 OC7#/GPIO14
PANTHER-GP-NF
71.PANTH.00U
SC10P50V2JN-4GP
USB_PN13_C 4 3 USB_PN13 75 EC1802
1
1
EC1803
DY DY
SC33P50V2JN-3GP
USB_PP13_C 1 2 USB_PP13 75 EC1801 DY
SC22P50V2JN-4GP
2
2
TR1801
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH (PCI/USB/NVRAM)
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 18 of 108
5 4 3 2 1
5 4 3 2 1
DMI
FDI
FDI_RXP5 BG12 FDI_TXP5 4
4 DMI_TXP0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_TXP6 4
4 DMI_TXP1 AY20 DMI1TXP FDI_RXP7 BH9 FDI_TXP7 4
4 DMI_TXP2 AY18 DMI2TXP
4 DMI_TXP3 AU18 DMI3TXP
FDI_INT AW16 FDI_INT 4
1D05V_VTT BJ24 AV12
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 4 For platforms not supporting Deep S4/S5
R1901 2 49D9R2F-GP DMI_COMP_R
1 BG25 DMI_IRCOMP FDI_FSYNC1 BC10 FDI_FSYNC1 4 1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)
R1902 1 2 750R2F-GP RBIAS_CPY BH21 DMI2RBIAS FDI_LSYNC0 AV14 FDI_LSYNC0 4 2.DPWROK and RSMRST# will rise at the same time (connected on board)
R1926 FDI_LSYNC1 BB10 FDI_LSYNC1 4 3.SLP_SUS# and SUSACK# are left as ‘no connect’
10KR2J-3-GP 4.SUSWARN# used as SUSPWRDNACK/GPIO30
1 DY 2 SYS_PW ROK
0628 Modify: A18 DSW ODVREN R1910
C PW ROK Change R1904 to 100K 0402 from 10K and default stuff. DSWVRMEN 0R0402-PAD C
1 2
R1904 1 2 PM_RSMRST#
PANTHER-GP-NF
R1919 3D3V_S0
71.PANTH.00U 8K2R2J-3-GP
PM_CLKRUN# 1 2
3D3V_S5
RN1901
SRN10KJ-6-GP
8 1 BATLOW #
7 2 PM_RI#
6 3 AC_PRESENT
5 4 SUS_PW R_ACK 3D3V_AUX_S5
R1909
100KR2J-1-GP
R1922 2 1 10KR2J-3-GP PM_SLP_LAN#
PCIE_WAKE# 2 1
Non_iAMT_SBA CRB : 1K
2
3V_5V_POK_# 5 2 3V_5V_POK 41
This signal has an internal pull-up resistor 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
6 1 Q1901 Taipei Hsien 221, Taiwan, R.O.C.
R1908 2N7002KDW -GP
100KR2J-1-GP
PM_RSMRST# 84.2N702.A3F Title
2 1 PM_RSMRST# CRB : PL 10K 2nd = 84.2N702.F3F
PCH (DM I/FDI/PM)
ANNIE : PL 100K Size
A3
Document Number Rev
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 19 of 108
5 4 3 2 1
5 4 3 2 1
3D3V_S0 3D3V_S5
SSID = PCH
1
SMB_CLK 4 1 RN2003
R2004 SMB_DATA 3 2 SRN2K2J-1-GP
10KR2J-3-GP
SML0_DATA 3 2 RN2004
PCH1B 2 OF 10 SML0_CLK 4 1 SRN2K2J-1-GP
2
PEG_CLKREQ#_R
BG34 SML1_CLK 2 3 RN2005
PERN1
1
BJ34 E12 EC_SW I# 27 SML1_DATA 1 4 SRN2K2J-1-GP
PERP1 SMBALERT#/GPIO11 R2005
AV32 PETN1
AU32 H14 SMB_CLK 10KR2J-3-GP PCH_GPIO74 1 4 RN2006
PETP1 SMBCLK SMB_CLK 31,75
DY PCIE_REQ0# 2 3 SRN10KJ-5-GP
D BE34 C9 SMB_DATA D
66 PCIE_RXN2 SMB_DATA 31,75
2
PERN2 SMBDATA
66 PCIE_RXP2 BF34 PERP2
C2003 2 SCD1U10V2KX-5GP PCIE_TXN2_C R2009
66 PCIE_TXN2 C2004
1
1 2 SCD1U10V2KX-5GP PCIE_TXP2_C
BB32
AY32
PETN2 3GLAN DRAMRST_CNTRL_PCH 1 2
66 PCIE_TXP2 PETP2
SMBUS
A12 1KR2J-1-GP
SML0ALERT#/GPIO60 DRAMRST_CNTRL_PCH 37 3D3V_S0 SRN2K2J-1-GP
BG36
32 PCIE_RXN3
32 PCIE_RXP3 BJ36
PERN3
PERP3 SML0CLK C8 SML0_CLK
SML0_CLK 105
RN2007 CRB : 1K
C2013 2 SCD1U10V2KX-5GP PCIE_TXN3_C
32 PCIE_TXN3 C2014
1
1 2 SCD1U10V2KX-5GP PCIE_TXP3_C
AV34
AU34
PETN3 Card Reader G12 SML0_DATA
1
2
4
3 CEKLT: 10K
32 PCIE_TXP3 PETP3 SML0DATA SML0_DATA 105
PCI-E*
BG37 PERN5
BH37 M16 SML1_DATA SMB_DATA 6 1
PERP5 SML1DATA/GPIO75 SML1_DATA 27 PCH_SMBDATA 14,15,66,79
1201 sc AY36
BB36
PETN5 USB 3.0 5 2
PETP5 Q2001
BJ38 2N7002KDW -GP 4 3
31,105 PCIE_RXN6 PERN6
31,105 PCIE_RXP6 BG38 PERP6 84.2N702.A3F
Controller
C2011 2 SCD1U10V2KX-5GP PCIE_TXN6_C CL_CLK 2nd = 84.2N702.F3F
31,105 PCIE_TXN6 C2012
1
1 2 SCD1U10V2KX-5GP PCIE_TXP6_C
AU36
AV36
PETN6 Intel/BCM LAN CL_CLK1 M7 CL_CLK 65
31,105 PCIE_TXP6 PETP6
PCH_SMBCLK 14,15,66,79
Link
BG40 T11 CL_DATA
75 PCIE_RXN7 PERN7 CL_DATA1 CL_DATA 65
BJ40 SMB_CLK
75 PCIE_RXP7 PERP7
C2025 2 SCD1U10V2KX-5GP PCIE_TXN7_C
75 PCIE_TXN7 C2026
1
1 2 SCD1U10V2KX-5GP PCIE_TXP7_C
AY40
BB40
PETN7 NEW CARD P10 CL_RST#
75 PCIE_TXP7 PETP7 CL_RST1# CL_RST# 65
BE38 SB 0916
PERN8
C 0921 SB BC38
AW38
PERP8
0308 -1
C
PETN8
AY38 PETP8 0R0402-PAD XTAL25_IN 2 1
PEG_A_CLKRQ#/GPIO47 M10 PEG_CLKREQ#_R 2 R2003 1 PEG_CLKREQ# 83
2
Y40 DIS_PX_Muxless C2008
CLKOUT_PCIE0N
2
Y39 0R4P2R-PAD R2006 SC12P50V2JN-3GP
CLKOUT_PCIE0P CLKOUT_PEG_A_N 1M1R2J-GP X2001
CLKOUT_PEG_A_N AB37 2 3 CLK_PCIE_VGA# 83
PCIE_REQ0# CLKOUT_PEG_A_P C2007
CLOCKS
J2 PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P AB38 1 4 CLK_PCIE_VGA 83 XTAL-25MHZ-149-GP
RN2016 SC15P50V2JN-2-GP
3GLAN CLK
1
DIS_PX_Muxless XTAL25_OUT 2 1
RN
66 CLK_PCIE_W W AN# AB49 CLKOUT_PCIE1N CLKOUT_DMI_N AV22 CLK_EXP_N 5
66 CLK_PCIE_W W AN AB47 CLKOUT_PCIE1P CLKOUT_DMI_P AU22 CLK_EXP_P 5 82.30020.D11
66 PCIE_CLK_W W AN_REQ# M1 0R4P2R-PAD
PCIECLKRQ1#/GPIO18 CLKOUT_DP_N
CLKOUT_DP_N AM12 2 3 CLK_DP_N_R 5 2nd = 82.30020.I01
SRN33J-5-GP-U AM13 CLKOUT_DP_P 1 4 CLK_DP_P_R 5
CLKOUT_DP_P 3D3V_S0 3D3V_S0
RN2017 2 3 CLK_PCH_SRC2_N AA48 RN2020
Card Reader32
32
CLK_PCIE_CARD#
CLK_PCIE_CARD 1 4 CLK_PCH_SRC2_P AA47
CLKOUT_PCIE2N
CLKOUT_PCIE2P EDP UMA_DISCRETE#
RN
BF18 CLK_BUF_EXP_N 0312 -1 UMA: 1 1
CLKIN_DMI_N
1
32 PCIE_CLK_CARD_REQ# V10 BE18 CLK_BUF_EXP_P
PCIECLKRQ2#/GPIO20 CLKIN_DMI_P R2012 R2013 DIS :0 1
10KR2J-3-GP
10KR2J-3-GP
DIS_UMA SG(PX) : 0 0
65 CLK_PCIE_W LAN# Y37 BJ30 CLK_BUF_CPYCLK_N 2 3 UMA_Muxless Optimus(Muxless) : 1 0
CLKOUT_PCIE3N CLKIN_GND1_N CLK_BUF_CPYCLK_P
Y36 BG30 1 4
WLAN CLK 65 CLK_PCIE_W LAN
2
CLKOUT_PCIE3P CLKIN_GND1_P
UMA_DIS# 22
65 PCIE_CLK_W LAN_REQ# A8 RN2008 DGPU_PRSNT#
PCIECLKRQ3#/GPIO25 CLK_BUF_DOT96_N SRN10KJ-5-GP
CLKIN_DOT_96N G24
1
E24 CLK_BUF_DOT96_P
CLKIN_DOT_96P R2010 R2011
Y43 CLKOUT_PCIE4N
10KR2J-3-GP
10KR2J-3-GP
Y45 PX_Muxless
B USB3.0 CLK(reserve) 0312 -1 CLKOUT_PCIE4P
CLKIN_SATA_N AK7 CLK_BUF_CKSSCD_N DIS_PX B
PCIE_REQ4# L12 AK5 CLK_BUF_CKSSCD_P
2
PCIECLKRQ4#/GPIO26 CLKIN_SATA_P
LAN CLK 0R4P2R-PAD RN2001
2 3 CLK_PCH_SRC5_N V45 K45 CLK_BUF_REF14 3D3V_S5 SRN10KJ-6-GP
31,105 CLK_PCIE_LAN# CLKOUT_PCIE5N REFCLK14IN
31,105 CLK_PCIE_LAN 1 4 CLK_PCH_SRC5_P V46 1 8 PCIE_CLK_W LAN_REQ#
CLKOUT_PCIE5P
RN2015 2 7 PCIE_CLK_LAN_REQ#
31,105 PCIE_CLK_LAN_REQ# L14 PCIECLKRQ5#/GPIO44 CLKIN_PCILOOPBACK H45 CLK_PCI_FB 18 3 6 PCIE_REQ7#
RN
4 5 PCIE_REQ4#
CLKOUT_PCIE7N CLKOUTFLEX0/GPIO64
V37 CLKOUT_PCIE7P
F47 TPM_TCM_TYPE1
1 TP2001 1215 SC
PCIE_REQ7# CLKOUTFLEX1/GPIO65 TPAD14-OP-GP
K12 PCIECLKRQ7#/GPIO46
CLKOUTFLEX2/GPIO66 H47 1212 SC
AK14 CLKOUT_ITPXDP_N
3D3V_S0 RN2018 AK13 K49 DGPU_PRSNT#
SRN10KJ-5-GP CLKOUT_ITPXDP_P CLKOUTFLEX3/GPIO67
1 4 PCIE_CLK_CARD_REQ# SB 0920 For RF
2 3 PCIE_CLK_W W AN_REQ# PANTHER-GP-NF
A 71.PANTH.00U <Variant Name> A
NEW CARD_PW R_EN CLK_PCIE_CARD# CLK_PCIE_CARD
PCIECLKRQ1# and PCIECLKRQ2#
Wistron Corporation
1
1
Support S0 power only FC2001 EC2001 EC2002 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
Taipei Hsien 221, Taiwan, R.O.C.
2
2
DY Title
PCH (PCI-E/SMBUS/CLOCK/CL)
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 20 of 108
5 4 3 2 1
5 4 3 2 1
1
R2106
RTC_X1 1 2 D
1 2 R2127 R2175
1 2 RTC_X2 S RTC_RST#_S
1 2 100KR2J-1-GP
R2101 10MR2J-L-GP 20KR2F-L-GP
2
20KR2F-L-GP Q2102 2K2R2J-2-GP
2N7002K-2-GP
2
84.2N702.J31
1
C2104 2ND = 84.07002.I31
X2101 1 OF 10 LPC_AD[0..3]
D SC1U16V3KX-5GP PCH1A LPC_AD[0..3] 27,71,82 D
2
1 4 RTC_X1 A20 C38 LPC_AD0
1
G2101 RTCX1 FWH0/LAD0 LPC_AD1
FWH1/LAD1 A38
LPC
GAP-OPEN RTC_X2 C20 B37 LPC_AD2
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
RTCX2 FWH2/LAD2
1
1
C2101 C2102 C37 LPC_AD3
RTC_RST# FWH3/LAD3
2 3 D20 RTCRST#
D36
RTC Reset LPC_FRAME# 27,71,82
2
2 FWH4/LFRAME#
1M1R2J-GP SRTC_RST# G22
R2104 SRTCRST#
X-32D768KHZ-65-GP LDRQ0# E36
RTC
2 1 SM_INTRUDER# K22 K36
INTRUDER# LDRQ1#/GPIO23
1 2 PCH_INTVRMEN C17 V5 INT_SERIRQ 27,82
82.30001.A41 INTVRMEN SERIRQ
1
C2103 RTC_AUX_S5
2nd = 82.30001.841 R2122 SC1U16V3KX-5GP R2105
DY 33R2J-2-GP 330KR2F-L-GP AM3 SATA_RXN0 56
2
HDA_SYNC HDA_BITCLK SATA0RXN
2 1 N34 AM1
29 HDA_CODEC_SYNC HDA_SDOUT HDA_BCLK SATA0RXP SATA_RXP0 56
HDD1
SATA 6G
29 HDA_CODEC_SDOUT 2 1 SATA0TXN AP7 SATA_TXN0 56
R2123 HDA_SYNC L34 AP5 SATA_TXP0 56
33R2J-2-GP HDA_SYNC SATA0TXP
SRN33J-5-GP-U AD5
SATA2RXP
EC2102 High - Enable internal VRs G34 HDA_SDIN1 SATA2TXN AH5
SC22P50V2JN-4GP Low - Enable external VRs AH4
2
C SATA2TXP C
C34 HDA_SDIN2
IHDA
SATA3RXN AB8
A34 HDA_SDIN3 SATA3RXP AB10
SATA3TXN AF3
SATA3TXP AF1
Flash Descriptor Security Overide 27 ME_UNLOCK 1 R2107 2 HDA_SDOUT A36 HDA_SDO
1KR2J-1-GP
SATA
SATA4RXN Y7 SATA_RXN4 56
Low = Default Y5
+3VS_+1.5VS_HDA_IO
HDA_SDOUT High = Enable SMARTCARD_DET C36
HDA_DOCK_EN#/GPIO33
SATA4RXP
SATA4TXN AD3
SATA_RXP4
SATA_TXN4
56
56 ODD
SATA4TXP AD1 SATA_TXP4 56
N32 HDA_DOCK_RST#/GPIO13
Y3
DY 1 R2102 2 HDA_SDOUT SATA5RXN
Y1
1KR2J-1-GP SATA5RXP
AB3
1208 SC
PCH_JTAG_TCK_BUF J3 JTAG_TCK
SATA5TXN
SATA5TXP AB1 ESATA
H7 Y11 1D05V_VTT
JTAG_TMS SATAICOMPO
JTAG
No Reboot Strap K5 Y10 SATA_COMP R2112 1 2 37D4R2F-GP
JE40 modify JTAG_TDI SATAICOMPI
Low = Default H1 1D05V_VTT
JTAG_TDO
HDA_SPKR High = No Reboot SATA3RCOMPO AB12
This signal has a weak internal pull down. 60 SPI_CS1#_R 1 R2115 2 PCH_SPI_CS1# T1 SPI_CS1#
SPI
On Die PLL VR is supplied by 1.5V when SATALED# P3 SATA_LED# 68
sampled high, 1.8 V when sampled low. DUAL ROM
60 SPI_SI_R V4 V14 SATA_DET#0
Needs to be pulled High for Huron River platform. SPI_MOSI SATA0GP/GPIO21
co-operate with R2310 60 SPI_SO_R U3 SPI_MISO SATA1GP/GPIO19 P1
2
EC2101
PANTHER-GP-NF 3D3V_S0
SC4D7P50V2CN-1GP
3D3V_S0 SRN10KJ-6-GP
Low = 1.8V (Default) 71.PANTH.00U 1 8
22 PSW _CLR# SATA_LED#
HDA_SYNC High = 1.5V 2 7
INT_SERIRQ 3 6
1
SATA_DET#0 4 5
DY R2126
1KR2J-1-GP
H->Smart Card
2
SMARTCARD_DET
L->Non Smart Card
1
R2125
5V_S0 1KR2J-1-GP
R2124
G 33R2J-2-GP 2
A <Variant Name> A
D HDA_SYNC_R 1 2HDA_SYNC
HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used to
HDA_CODEC_SYNC S
sample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on this Wistron Corporation
Q2101 signal on the board. Signal may have leakage paths via powered off devices (Audio 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2N7002K-2-GP Taipei Hsien 221, Taiwan, R.O.C.
84.2N702.J31 Codec) and hence contend with the external pull-up. A blocking FET is
recommended in such a case to isolate HDA_SYNC from the Audio Codec device PCH_JTAG_TCK_BUF 1 R2121 2 Title
2ND = 84.07002.I31 4K7R2J-2-GP
until after the Strap sampling is complete. PCH (SPI/RTC/LPC/SATA/IHDA)
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 21 of 108
5 4 3 2 1
5 4 3 2 1
3D3V_S0
RN2203
SSID = PCH
1 4 H_RCIN#
2 3 H_A20GATE Note:
For PCH debug with XDP, need to NO STUFF R2218
SRN10KJ-5-GP PCH1F 6 OF 10
GPIO27 has a weak[20K] internal pull up.
To enable on-die PLL Voltage regurator, S_GPIO T7 C40 SATA_ODD_PW RGT 56
BMBUSY#/GPIO0 TACH4/GPIO68
should not place external pull down. EC_VPS_SMI#
27 EC_VPS_SMI# A42 B41 UMA_DIS# 20
TACH1/GPIO1 TACH5/GPIO69
3D3V_S5 DGPU_HPD_INTR# H36 C41 VRAM_SIZE1 1D8V_S0
TACH2/GPIO6 TACH6/GPIO70
D 0908 SB E38 A40 VRAM_SIZE2
D
27 EC_SCI#
1
1
TACH3/GPIO7 TACH7/GPIO71
R2220 ICC_EN# C10
10KR2J-3-GP GPIO8 R2221
DY 56 SATA_ODD_PRSNT#
LAN_DIS# 2K2R2J-2-GP
105 LAN_DIS# C4 LAN_PHY_PWR_CTRL/GPIO12
2
2
PCH_GPIO15 G2 P4 H_A20GATE 27
PCH_GPIO24 3D3V_S0 GPIO15 A20GATE NV_CLE
R2202 1 2 H_SNB_IVB# 5
AU16 H_PECI_R R2203 R2222
PECI DY1 2 H_PECI 5,27
1
GPIO
92,93 DGPU_PW ROK D40 TACH0/GPIO17 PROCPWRGD AY11 H_CPUPW RGD 5,36
CPU/MISC
2
2
DMI_OVRVLTG TS_VSS3
V8
PassWord Clear SATA2GP/GPIO36
TS_VSS4 AK10 390R2F-2GP
C G2201 FDI_OVRVLTG M5 C
GAP-OPEN SATA3GP/GPIO37
LVDS eDP
1124 SC MFG_MODE N2 P37
1
SLOAD/GPIO38 NC_1 FDI_OVRVLTG
del R2206 M3 FDI TERMINATION VOLTAGE OVERRIDE
49 EDP#_LVDS
1
SDATAOUT0/GPIO39
EDP#_LVDS H L
1208 SC for Del e-SATA TPAD14-OP-GP TP2204 1 TPM_TCM_TYPE2 V13 BG2 R2208
SDATAOUT1/GPIO48 VSS_NCTF_15#BG2 10KR2J-3-GP
TPAD14-OP-GP TP2211 1PCH_TEMP_ALERT# V3 BG48 GPIO37 LOW - Tx, Rx terminated to same voltage
SATA5GP/GPIO49/TEMP_ALERT# VSS_NCTF_16#BG48
(FDI_OVRVLTG) (DC Coupling Model DEFAULT)
2
3D3V_S0 TPAD14-OP-GPTP2210 1 USB3_PW R_ON D6 BH3
3D3V_S0 GPIO57 VSS_NCTF_17#BH3
RN2201 BH47
SRN10KJ-5-GP VSS_NCTF_18#BH47
1
NCTF
1
10KR2J-3-GP A44 BJ44
VSS_NCTF_2#A44 VSS_NCTF_20#BJ44 R2210 DMI TERMINATION VOLTAGE OVERRIDE
A45 BJ45 10KR2J-3-GP
2
VSS_NCTF_3#A45 VSS_NCTF_21#BJ45
RN2202 eSATA_DET# TPAD14-OP-GPTP2208 1 PCH_NCTF_3 A46 BJ46
2
MFG_MODE VSS_NCTF_4#A46 VSS_NCTF_22#BJ46 GPIO36 LOW - Tx, Rx terminated to same voltage
1 8
1
2 7 A5
VSS_NCTF_5#A5 VSS_NCTF_23#BJ5
BJ5 (DMI_OVRVLTG) (DC Coupling Model DEFAULT)
S_GPIO 3 6 R2209
PCH_TEMP_ALERT# 4 5 10KR2J-3-GP A6 BJ6
A4,A44,A45,A46,A5,A6,B3,B47,
BJ45,BJ46,BJ5,BJ6,C2,C48,D1,
VSS_NCTF_6#A6 VSS_NCTF_24#BJ6
BD1,BD49,BE1,BE49,BF1,BF49,
BG2,BG48,BH3,BH47,BJ4,BJ44,
SRN10KJ-6-GP
DY
B3 C2
2
D49,E1,E49,F1,F49
RN2204 BD1 D1 0908 SB
USB3_PW R_ON VSS_NCTF_9#BD1 VSS_NCTF_27#D1
8 1
1
TPAD14-OP-GPTP2207 1 PCH_NCTF_2 BF1 F1
10KR2J-3-GP
VSS_NCTF_13#BF1 VSS_NCTF_31#F1
PCH_GPIO15 1 R2201 2 TPAD14-OP-GPTP2209 1 PCH_NCTF_4 BF49 F49 R2223
1KR2J-1-GP VSS_NCTF_14#BF49 VSS_NCTF_32#F49 Integrated Clock Chip Enable
2
PANTHER-GP-NF ICC_EN#
VRAM Frequency VRAM Size ICC_EN# HIGH (R2211 DY)- DISABLED [DEFAULT]
2
Pull high: 800MHZ 71.PANTH.00U R2211
3D3V_S0 Pull low :900MHZ 3D3V_S0 1KR2J-1-GP LOW (R2211)- ENABLED
DY GPIO8 has a weak[20K] internal pull up.
1
Integrated Clock Enable functionality is achieved
1
10KR2J-3-GP
2
UMA_VRAM800MHZ
A <Core Design> A
VRAM_SIZE1 PLL ON DIE VR ENABLE
PCH_GPIO22 VRAM_SIZE2
NOTE:This signal has a weak internal pull-up 20K Wistron Corporation
1
10KR2J-3-GP
Title
2
1
(1uFx3) AD21 C2313 C2314 C2315
CRT
VCCCORE3 UMA_PX_Muxless
SCD01U16V2KX-3GP
SCD1U10V2KX-5GP
SC10U6D3V5KX-1GP
D (10uFx1_0603) C2301 C2302 C2303 C2304 AD23 U47 DY D
VCCCORE4 VSSADAC
SC10U6D3V5KX-1GP
AF21
2
VCC CORE
VCCCORE5
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AF23
2
VCCCORE6 3D3V_S0
AG21 VCCCORE7 UMA_PX_Muxless UMA_PX_Muxless
AG23 VCCCORE8 +3VS_VCCA_LVDS
0.001A
AG24 VCCCORE9 VCCALVDS AK36 1 R2304 2
AG26 0R0603-PAD U2301 for ANNIE flicker issue
VCCCORE10
AG27 VCCCORE11 VSSALVDS AK37 1 2
AG29 DIS UMA_PX_Muxless R2315 for don't flicker solution
VCCCORE12 R2303
AJ23 VCCCORE13 1D8V_S0
LVDS
AJ26 AM37 0R2J-2-GP
VCCCORE14 VCCTX_LVDS1
AJ27 VCCCORE15 +1.8VS_VCCTX_LVDS
0.06A
AJ29 VCCCORE16 VCCTX_LVDS2 AM38 1 R2305 2 3.3V CRT LDO
AJ31 0R0805-PAD
VCCCORE17
2
AP36 UMA_PX_Muxless
UMA_PX_Muxless
VCCTX_LVDS3 UMA_PX_Muxless
2
1D05V_VTT R2309 C2316 C2317 C2318 (0.01uF x2) 1230 SC
SC1U25V3KX-1-GP
AP37 DIS 0R2J-2-GP DY (22uF x1)
VCCTX_LVDS4
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
AN19
1
VCCIO28 5V_S0 3D3V_DAC_S0
1
U2301
JE40 modify BJ22
1D05V_VTT VCCAPLLEXP
1 IN OUT 5
SC1U6D3V2KX-GP
2.925A(Total current of VCCIO) V33 C2311 2
VCC3_3_6 GND
SC1U10V2KX-1GP
HVCMOS
AN16 VCCIO15 3 EN NC#4 4
3D3V_S0
1
DY AN17 VCCIO16
(0.1uFx1)
1
1
C2306 C2307 C2308 C2309 V34 AME8818BEEV330Z-GP C2312 C2327
VCC3_3_7
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
74.08818.B3F
2
1
SC10U6D3V3MX-GP
AN21
2nd = 74.70233.03F
2
2
C VCCIO17 C2319 C
AN26 SCD1U10V2KX-5GP
2
VCCIO18
AN27 VCCIO19 VCCVRM3 AT16
0104 SC add 2nd source
AP21 1D05V_VTT
VCCIO20 VCCVRM
(1uF x4) AP23 AT20 JE40 modify
VCCIO21 VCCDMI1
(1uF x1)
1
DMI
AP24 VCCIO22
VCCIO
C2320 L2303
0.266A (Totally VCC3_3 current) AP26 AB36 SC1U6D3V2KX-GP IND-10UH-218-GP
2
VCCIO23 VCCCLKDMI
68.10050.10Y
AT24 2nd = 68.10090.10B 1D05V_VTT
3D3V_S0 VCCIO24
0.02A
+1.05VS_VCC_DMI_CCI 1 2
AN33 VCCIO25
1
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
(0.1uF x1) C2321 C2325 (1uFx1)
1
2
2
DFT / SPI
VCCDFTERM3 AJ16
0308 -1 VCCVRM 1D8V_S0
VCCVRM AP16 VCCVRM2 0.19A JE40 modify
VCCDFTERM4 AJ17
1D5V_S0 1 2
1
B R2316 0R0603-PAD C2326 C2322 B
BG6 VCCAFDIPLL SCD1U10V2KX-5GP SCD1U10V2KX-5GP
1 2 0806 check VCCAFDIPLL
1D8V_S0
2
R2317 DY 0R3J-0-U-GP 1D05V_VTT AP17 VCCIO27
V1
FDI
VCCSPI
1D05V_VTT AU20 VCCDMI2 0.02A
0.042A (Totally current of VCCDMI) JE40 modify
3D3V_S5
(1uFx1)
1
PANTHER-GP-NF
C2323
SC1U6D3V2KX-GP
71.PANTH.00U
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH (POWER1)
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 23 of 108
5 4 3 2 1
5 4 3 2 1
1
0.002A VCCIO30 P26
C2423
3D3V_S5 T16 VCCDSW3_3
P28 SC1U6D3V2KX-GP
2
VCCIO31
(10uFx1) (0.1uFx1)
(1uFx1) V12 DCPSUSBYP VCCIO32 T27
3D3V_S5 5V_S5
D
VCCIO33 T29 D
T38 3D3V_S5 83.R0304.D8F
3D3V_S0
A
VCC3_3_5
0.097A (Totally current of VCCSUS3_3)
1
C2402 TP19 TPAD14-OP-GP T23 D2401
SC1U10V2KX-1GP VCCSUS3_3_7
1VCCAPLLDMI2 BH23 VCCAPLLDMI2
(0.1uFx1) CH751H-40-1-GP
1
T24 C2424
2
VCCSUS3_3_8 SCD1U10V2KX-5GP
1D05V_VTT (10uFx1) AL29
K
VCCIO14
V23 1 2
2
VCCSUS3_3_9
USB
R2408
AL24 V24 3D3V_S5 10R2J-2-GP (0.1uFx1)
DCPSUS3 VCCSUS3_3_10
1
P24 C2426
VCCSUS3_3_6 SCD1U10V2KX-5GP
(0.1uFx1)
2
1
AA19 VCCASW1
T26 1D05V_VTT C2425
VCCIO34 SCD1U10V2KX-5GP
AA21
2
VCCASW2
+5VA_PCH_VCC5REFSUS
0.001A
AA24 VCCASW3 V5REF_SUS M26
A
VCCASW5
1.01A (Total current of VCCASW) VCCSUS3_3_1 AN24 3D3V_S5
D2402
AA29 VCCASW6 DY
CH751H-40-1-GP
AA31 VCCASW7
1
C2403 C2404 C2406 C2407 C2408 0.001A
K
DY AC26 P34 +5VS_PCH_VCC5REF 1 2
VCCASW8 V5REF R2407
2 (1uFx1)
2
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C AC27 10R2J-2-GP C
VCCASW9
1
N20 3D3V_S5
VCCSUS3_3_2 C2427
PCI/GPIO/LPC
AC29 VCCASW10
N22 JE40 modify SC1U10V2KX-1GP
2
VCCSUS3_3_3
AC31 VCCASW11
(1uFx1)
1
VCCSUS3_3_4 P20
AD29 C2428 JE40 modify 07/16
VCCASW12 SC1U6D3V2KX-GP
P22
2
VCCSUS3_3_5
(22uFx2_0603) AD31 VCCASW13
1D05V_VTT
0.08A (1uFx1) (1uFx3)
3D3V_S0
(220uFx1) W21 VCCASW14 VCC3_3_1 AA16
R2414
1 2 +1.05VS_VCCA_A_DPL W23 W16 909R2F-GP
IND-10UH-218-GP VCCASW15 VCC3_3_8
(0.1uFx2) 3D3V_S5 1 2 1D5V_S5
1
1
L2402 W24 T34 DY
C2409 VCCASW16 VCC3_3_4 C2430 C2431
68.10050.10Y
1
2nd = 68.10090.10B SC1U6D3V2KX-GP W26 SCD1U10V2KX-5GP SCD1U10V2KX-5GP
2
2
VCCASW17 R2402
W29 3D3V_S0 750R2F-GP
VCCASW18
0.08A (1uFx1) DY
(220uFx1) W31 AJ2
2
+1.05VS_VCCA_B_DPL VCCASW19 VCC3_3_2
1 2 (0.1uFx1)
1
IND-10UH-218-GP W33 VCCASW20
1
2
2nd = 68.10090.10B SC1U6D3V2KX-GP +VCCRTCEXT N16 U2401 1D5V_S5
2
DCPRTC 1D05V_VTT
0.16A (Totally current of VCCVRM VCCIO12 AH13
1
1 VIN VOUT 5
C2411 (0.1uFx1) VCCVRM Y49 AH14 2
B SCD1U10V2KX-5GP VCCVRM4 VCCIO13 GND B
(1uFx1) 3 4
2
EN NC#4
1
C2416 C2405
AF14 C2432
VCCIO6
SC1U10V3ZY-6GP
+1.05VS_VCCA_A_DPL BD47 SC1U6D3V2KX-GP C2436 G9090-150T11U-GP
2
VCCADPLLA
SC10U6D3V5KX-1GP
SATA
AK1 VCCAPLLSATA 1 TPAD14-OP-GP
SC1U10V3ZY-6GP
+1.05VS_VCCA_B_DPL VCCAPLLSATA TP27
BF47 74.09090.A3F
2
1D05V_VTT VCCADPLLB
JE40 modify 07/16 C2412 AF11 VCCVRM
SC1U6D3V2KX-GP JE40 modify VCCVRM1
AF17 VCCIO7
1D05V_VTT 1 2 (1uFx1) AF33 VCCDIFFCLKN1
AF34 VCCDIFFCLKN2 VCCIO2 AC16
(1uFx1) 0.055A AG34 VCCDIFFCLKN3
AC17 1D05V_VTT
VCCIO3
1
C2413 0.095A
C2414 1D05V_VTT SC1U6D3V2KX-GP JE40 modify AG33 AD17 JE40 modify
SC1U6D3V2KX-GP VCCSSC VCCIO4
1 2 (1uFx1) (1uFx1)
2
1
+3VS_+1.5VS_HDA_IO
2 1 +VCCSST V16 C2435
1D05V_M DCPSST 1D05V_M SC1U6D3V2KX-GP
(0.1uFx1)
2
C2415 1 2 3D3V_S5
1 R2416 2 SCD1U10V2KX-5GP T17 DCPSUS1 VCCASW22 T21 R2409 DY 0R3J-0-U-GP
DY 0R2J-2-GP 1D05V_M_DCPSUS V19 DCPSUS2
1
MISC
1 2 1D5V_S0
C2421 V21 R2415 DY 0R3J-0-U-GP
VCCASW23
DY SC1U6D3V2KX-GP
2
1D05V_VTT
CPU
A <Variant Name> A
1
HDA
1
RTC_AUX_S5
PANTHER-GP-NF C2433 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
6uA SCD1U10V2KX-5GP Taipei Hsien 221, Taiwan, R.O.C.
2
(0.1uFx2) 71.PANTH.00U Title
1
(1uFx1)
C2420 PCH (POWER2)
SC1U6D3V2KX-GP Size Document Number Rev
2
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 24 of 108
5
DY 4 3 2 1
5 4 3 2 1
PANTHER-GP-NF Title
71.PANTH.00U
PCH (VSS)
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 25 of 108
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Clock(colay)
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 26 of 108
5 4 3 2 1
5 4 3 1108 SC
3D3V_AUX_S5
2 1
3D3V_S5
3D3V_AUX_KBC
SSID = KBC
4
3
3D3V_AUX_KBC
0302 -1 PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE RN2717
SRN4K7J-8-GP
SA 100.0K 10.0K 3.0V
1
3D3V_S0 R2724
SB 0923 SB 100.0K 20.0K 2.75V
1
2
64K9R2F-1-GP Q2703
SB 0923 SC 100.0K 33.0K 2.48V
0628 Modify: SML1_CLK_C 6 1 SML1_CLK 20
2
Move R2771 to closed 3D3V_AUX_KBC power 0207 SD SD 100.0K 47.0K 2.24V
1
rail base on layout placement. PCB_VER_AD 5 2
C2702 C2713 -1 100.0K 64.9K 2.0V
1
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP SC2200P50V2KX-2GP 2N7002KDW-GP 4 3
2
SC2200P50V2KX-2GP
C2704
C2705
C2706
C2707
C2708
C2709
C2710
R2726 -2 100.0K 76.8 1.87V 84.2N702.A3F
1
1
100KR2F-L1-GP
C2701 -3 100.0K 100.0K 1.65V
SC2D2U10V3KX-1GP
D DY SML1_DATA 20
D
2
2
C2711
115
102
SC220P50V2KX-3GP SML1_DATA_C
19
46
76
88
4
U2701A 1 OF 2 1 2 5V_CHARGER
DY 1227 SC
VCC
VCC
VCC
VCC
VCC
AVCC
VDD
40 AD_IA Del USB_CHARGER_STATUS#
1
104 7 PLT_RST# 5,18,31,32,36,65,66,71,75,82,83,97,105
C2714 VREF LRESET#
1DY 2 SCD1U10V2KX-5GP 2 CLK_PCI_KBC 18,82 R2706
LCLK
97 3 LPC_FRAME# 21,71,82 10KR2J-3-GP
PCB_VER_AD GPIO90/AD0 LFRAME# LPC_AD3
H:MIC UNMUTE/L:MIC MUTE 98
GPIO91/AD1 LAD3
1 SB 0915 for KBC885 3D3V_AUX_KBC 3D3V_AUX_S5
ADT_TYPE 99 128 LPC_AD2 LPC_AD[0..3] 21,71,82
2
GPIO92/AD2 LAD2 LPC_AD1 R2772
21 RTCRST_ON SC 1103 100
GPIO93/AD3 LAD1
127
3D3V_AUX_KBC 3D3V_AUX_S5
126 LPC_AD0 ILIM_SEL 0131 SD 0R0805-PAD
LAD0
39 BAT_SEL_A/B# 101 125 INT_SERIRQ 21,82 1 2
GPIO94/DA0 SERIRQ
TPAD14-OP-GP TP2703 1AOAC_EN 105 8 PM_CLKRUN# 19,82 DY 1 2 VBKUP
GPIO95/DA1 GPIO11/CLKRUN# R2756
51 HDMI_DVI_IN 106 9 PANEL_BLEN 94
GPIO96/DA2 GPIO65/SMI#
2
29 ECSCI#_KBC 0R0402-PAD
ECSCI#/GPIO54 R2704
0131 SD GPIO10/LPCPD#
124 BD_HDMI_IN 104
19 SUS_PWR_ACK 79 123 ECSWI#_KBC DY 330KR2J-L1-GP
GPIO2 GPIO67/PWUREQ#
104 BD_AC_IN# 2 KBC_GPIO3 95 1 121 H_A20GATE 22 3D3V_AUX_S5 1 2
R2703 0R0402-PAD GPIO3/AD6 GPIO85/GA20 U2701B 2 OF 2
41 5V_CHARGER_EN 96 122 H_RCIN# 22 KCOL[0..16] 69
1
MODEL_ID GPIO4/AD5 KBRST#/GPIO86 R2760
108
EC_GPIO6 GPIO5/AD4 KCOL0 0R2J-2-GP
1128 SC 93
PSL_IN2#_GPIO6 1228 SC 28 FAN_TACH1 31
GPIO56/TA1 KBSOUT0/JENK#
53
70 LID_CLOSE# 94 27 BLON_OUT 49 19,97 PM_PWRBTN# 117 52 KCOL1 82 KBC_PWRBTN# 2 1 EC_GPIO6
RTC_AUX_S5_KBC GPIO7/AD7 GPIO52/PSDAT3/RDY# USB_CHARGER_STATUS# GPIO20/TA2 KBSOUT1/TCK KCOL2
TPAD14-OP-GP TP2704 1 114 25 1 TP2706 TPAD14-OP-GP 82 INSTANT_VIEW_BTN# 63 51
GPIO16 GPIO50/PSCLK3/TDO NCT5605Y_WAKE# GPIO14/TB1 KBSOUT2/TMS KCOL3 R2757
38 AD_OFF 6 11 19,29,36,37,47,75,82 PM_SLP_S3# 64 50
GPIO24 GPIO27/PSDAT2 GPIO01/TB2 KBSOUT3/TDI KCOL4 470R2J-2-GP
86 DGPUHOT 109
GPIO30 GPIO26/PSCLK2
10 ILIM_SEL 82 1227 SC KBSOUT4/JEN0#
49
1
36,97,107 S5_ENABLE 14 71 TPDATA 69 68 CHARGE_LED 32 48 KCOL5 C2717
GPIO34/CIRRXL GPIO35/PSDAT1 GPIO15/A_PWM KBSOUT5/TDO
SC220P50V2KX-3GP
1128 SC 29 KBC_BEEP KCOL6 G2701
51 HDMI_IN
39 BAT_A_IN#
15
80
GPIO36 GPIO37/PSCLK1
72 TPCLK 69 <------ TP
82 USB_CHARGER_CTL1
118
62
GPIO21/B_PWM KBSOUT6/RDY#
47
43 KCOL7 GAP-OPEN
DY
2
BD_CRT_IN 17 GPIO41 GPIO13/C_PWM KBSOUT7 KCOL8
1220 SC TPAD14-OP-GP TP2705 1
GPIO42/TCK 82 USB_CHARGER_CTL2 65
GPIO32/D_PWM KBSOUT8
42
20 70 81 41 KCOL9
19 RSMRST#_KBC BAT_SCL 39,40,104 <------ BATTERY / CHARGER 28 FAN1_PWM
2
GPIO43/TMS GPIO17/SCL1 GPIO66/G_PWM KBSOUT9/SDP_VIS# KCOL10
19,46 PM_SLP_S4# 21 69 BAT_SDA 39,40,104 82 MUTE_LED 66 40
GPIO44/TDI GPIO22/SDA1 SML1_CLK_C GPIO33/H_PWM KBSOUT10/P80_CLK KCOL11
21 ME_UNLOCK 23 67 SML1_CLK_C 39,51,79,86 <------PCH / EDP 68 STDBY_LED 22 39
GPIO46/CIRRXM/TRST# GPIO73/SCL2 SML1_DATA_C GPIO45/E_PWM KBSOUT11/P80_DAT KCOL12
39 BAT_B_IN# 26 68 SML1_DATA_C 39,51,79,86 68,82 PWRLED 16 38
GPIO51 GPIO74/SDA2 SMB2_CLK GPIO40/F_PWM KBSOUT12/GPIO64 KCOL13
40 AC_IN# 73 119 37
EC_ENABLE PSL_IN1_GPIO70 GPIO23/SCL3 SMB2_DAT KBSOUT13/GPIO63 KCOL14
TPAD14-OP-GP TP2716 1 74 120 36 KCOL17 69
VBKUP PSL_OUT_GPIO71 GPIO31/SDA3 PROCHOT_EC ECRST# 85 KBSOUT14/GPIO62 KCOL15
75 24 35
VBKUP GPIO47/SCL4 VCC_POR# KBSOUT15/GPIO61/XOR_OUT KCOL16
86 dGPU_ALARM 82 28 BD_DVI_IN 104 34
GPIO75 GPIO53/SDA4 GPIO60/KBSOUT16 KCOL17 TP2701 TPAD14-OP-GP
19,36,45 PM_SLP_LAN# 83 33 1
GPO76/SHBM GPIO57/KBSOUT17
19,42 S0_PWR_GOOD 84 65 E51_RxD 113 KROW[0..7] 69
GPIO77 GPIO87/CIRRXM/SIN_CR KROW0
60 SPI_WP2# 91 65 E51_TxD 111 54
GPIO81 GPIO83/SOUT_CR/TRIST# KBSIN0 KROW1 3D3V_AUX_S5
82 USB_PWR_EN# 110 55
GPO82/IOX_LDSH/TEST# KBSIN1 KROW2
19 AC_PRESENT 112 90 SPICS# 60 29 AMP_MUTE#
30 56
EC_GPIO97 GPIO84/IOX_SCLK/XORTR# F_CS0# GPIO55/CLKOUT/IOX_DIN_DIO KBSIN2 KROW3
107 92 77 57
C 0604 Modify: GPIO97 F_SCK
F_SDI/F_SDIO1
86
SPICLK
SPIDI
60
60
19 PCH_SUSCLK_KBC GPIO00/EXTCLK KBSIN3
KBSIN4
58 KROW4
C
2
RN2704 pull-Low 10K Resistor to DY 87 59 KROW5
F_SDIO/F_SDIO0 SPIDO 60 KBSIN5
KBC_VCORF 44 5,22 H_PECI R2721 1 2 43R2J-GP PECI13 60 KROW6 R2708
on BLUETOOTH_EN. VCORF PECI KBSIN6 KROW7
1D05V_VTT 12 61 330KR2J-L1-GP
1
VTT KBSIN7
AGND
C2712
GND
GND
GND
GND
GND
GND
1
1
SC1U10V3ZY-6GP NPCE795PA0DX-GP-U 2 1EC_GPIO97
104 BD_PWNBTN#
2
3D3V_S0 C2716
1
SCD1U16V2KX-3GP
RN2708 0914 SB R2761 C2724
1st = 71.00885.A0G
18
45
78
89
116
5
103
2
SRN10KJ-6-GP NPCE795PA0DX-GP-U 470R2J-2-GP
3D3V_AUX_S5 3D3V_S5 3D3V_AUX_KBC DY
SC220P50V2KX-3GP
1 8 NOTE: DY
2
EC_VPS_SMI# 22 R2758
2 7 1st = 71.00885.A0G Locate resistors R2719 and R2722 close 71.00795.00G 20 EC_SWI# 1 2ECSWI#_KBC
3 6 PowerSmartBTN# 0R2J-2-GP
4 5 to the NPCE791L. 1 8 BAT_SDA
FAN_TACH1 28
2 7 BAT_SCL 22 EC_SCI# 1 2ECSCI#_KBC
3 6 SMB2_CLK R2759 0R0402-PAD
1 2 E51_RxD 4 5 SMB2_DAT
R2789 DY 10KR2J-3-GP RN2701 SRN4K7J-10-GP
2 1 CHG_ON#
SB LID_CLOSE# can not pull high, because push pull NOTE: 1 2 BD_IN# R2790 10KR2J-3-GP 1
R2791 10KR2J-3-GP 2 1 LID_CLOSE#
3D3V_AUX_KBC suggest RN2708 Pin5 change FAN_TACH1 Connect GND and AGND planes via either R2782 10KR2J-3-GP
0R resistor or one point layout connection. DY DY 3
0915 SB 1 4INSTANT_VIEW_BTN# 2
RN2707 2 3NCT5605Y_WAKE#
SRN100KJ-6-GP SPIDI 3D3V_AUX_S5 RN2710 SRN10KJ-5-GP
1 4 STOP_CHG# D2701
1
VCC
1
SRN10KJ-5-GP PURE_HW_SHUTDOWN# 2
E
C2715 RESET# BLUETOOTH_EN
10KR2F-2-GP 1 4 1 DY 2
SC1U6D3V2KX-GP
28,36 PURE_HW_SHUTDOWN# 2 3 PURE_HW_SHUTDOWN#_R B
2
G690L293T73UF-GP R2774
DY DY 10KR2J-3-GP
C
DY 0604 Modify: Q2701
Add Pull down 100k ohm at F_SDI for Power consumption concern. MMBT3906-4-GP 0604 Modify:
84.T3906.A11
Prevent BIOS data loss RN2704 pull-Low 10K Resistor to DY
R2770 RN2715
2nd = 84.03906.F11 on BLUETOOTH_EN.
1KR2J-1-GP SRN100KJ-6-GP 3D3V_S0
1 2 AD_OFF 1 4
B RSMRST#_KBC2 3
RN2703 3D3V_AUX_KBC
B
SRN10KJ-5-GP
RN2712 1 4 AMP_MUTE#
SRN100KJ-6-GP 2 3 WIRELESS_SW# ADT_TYPE A/D(PIN99) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE R2707
EC_GPIO47 High Active
1
BD_DVI_IN 1 4 100KR2F-L1-GP
BD_HDMI_IN 2 3 65W N/A 100.0K 3.3V R2710
RN2704 65W UMA 10KR2F-2-GP
PROCHOT_EC G SRN10KJ-5-GP 90W 100.0K N/A 0V
1 4MUTE_BTN#
2
D H_PROCHOT# 5,42 RN2713 2 3BACKUP_BTN# 30W 10.0K 100.0K 0.3V ADT_TYPE
1
SRN100KJ-6-GP 0915 SB
R2732 S HDMI_DVI_IN 1 4 40W 20.0K 100.0K 0.55V DISCRETE#
100KR2J-1-GP
BD_DP_IN 2 3
1
Q2702 RTC_AUX_S5 for KBC885 120W 33.0K 100.0K 0.82V R2701
2N7002K-2-GP 0131 SD 100KR2F-L1-GP R2739
65W_90W#
2
2
R2785 DISCRETE#
0R0402-PAD
High: UMA / Low: Discrete
1
AFTP19 1 VPS_EN_KBC
R2725
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
20KR2F-L-GP
U2703 U2704
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2719
C2721
NCT5606Y-0 (Addr: 0x30)
5
4
3
2
1
5
4
3
2
1
1
NCT5605Y-GP-U 3D3V_AUX_KBC NCT5605Y-GP-U 3D3V_AUX_KBC
C2718
C2720
2
SCLK
SCLK
SDAT
SDAT
LED2/GP12
LED1/GP11
LED0/GP10
LED2/GP12
LED1/GP11
LED0/GP10
MODEL_ID
2
2
2
1
R2784 R2781
10KR2F-2-GP 10KR2F-2-GP R2728
6 20 68 DC_BATFULL 6 20 100KR2F-L1-GP
82 WLAN_TEST_LED LED3/GP13 3VDD LED3/GP13 3VDD
7 19 3D3V_AUX_KBC_RST# 7 19 3D3V_AUX_KBC_RST#_R
1
1
VSS RST# 3D3V_AUX_KBC_INT# VSS RST# 3D3V_AUX_KBC_INT#_R
8 18 1 2 3D3V_AUX_KBC 82 WIRELESS_SW# 8 18 1 2 3D3V_AUX_KBC
2
82 PowerSmartBTN# GP20 INT# GP20 INT#
A 82 MUTE_BTN# 1 2 9
GP21 A0/GP17
17 R2780 10KR2F-2-GP
CHG_ON# 40 40 STOP_CHG# 9 17 R2783 10KR2F-2-GP
A
1
GP21 A0/GP17
1
29 CODEC_EAPD_MUTE# R2702 10 16 DISCRETE# 10 16
0R0402-PAD GP22 A1/GP16 C2722 GP22 A1/GP16 C2723
BEEP/GP14
BEEP/GP14
SC1U6D3V2KX-GP SC1U6D3V2KX-GP
2
2
A2/GP15
A2/GP15
0131 SD
GP23
GP24
GP25
GP23
GP24
GP25
HR PX
NUMLOCK_LED 82 3G_EN 66
BLUETOOTH_EN 65
11
12
13
14
15
11
12
13
14
15
5 4 3 2 1
5 4 3 2 1
1
C2809 C2808
SC4D7U10V3KX-GP
SCD1U10V2KX-5GP
D D2802 D
3D3V_S0
2
3D3V_S0
R5 SB 3D3V_S0
83.R5003.J8F CH551H-30GP-GP
2nd = 83.R5003.H8H
1
C2801 C2802
A
1
SC10U6D3V5KX-1GP
SCD1U10V2KX-5GP
1
DY R2813 R2807 SB 0909 for ME
2
18K7R2D-GP 0R2J-2-GP R2805
1 2 DY 10KR2J-3-GP C2815
DY
2
D2801 SCD1U10V2KX-5GP
2
ALERT#
FAN_TACH1_C FAN1
27 FAN_TACH1 A K 1 2
6
ACES-CON4-41-GP
DY
CH551H-30GP-GP 27 FAN1_PW M 4
3
83.R5003.J8F FAN_TACH1_C 2
2nd = 83.R5003.H8H
5V_S0 1
Layout notice :
Q2801 Both DXN and DXP routing 10 mil
MMBT3904-3-GP trace width and 10 mil spacing.
5
84.03904.T11
2nd = 84.03904.L06 3D3V_S0
C P2800_DXP C
U2801 check? SB
1
1
C
1
DY C2806 C2807 1 8 TMDS_SCL_A 51
VDD SCL
SC2200P50V2KX-2GP
R2808 B SC470P50V3JN-2GP 2 7 TMDS_SDA_A 51
2
D+ SDA
NTC-100K-8-GP
3 6 ALERT# 20.F2040.004
2
THERM_SYS_SHDN# D- ALERT#
4 5
2
1.H/W T8 Shutdown
R7 SB
3D3V_S0
SB 1011
1
B 3D3V_AUX_S5 B
R2809
2KR2F-3-GP
R2811
3
D2803 0R2J-2-GP
2
BAT54PT-GP 1 2 THERM_SYS_SHDN#
83.00054.T81 DY
2ND = 83.BAT54.D81 DY 0308 -1
3rd = 83.BAT54.S81
S
2
1 R2810 2 0R0402-PAD3D3V_S0
27,36 PURE_HW _SHUTDOW N# D
1
G IMVP_PW
1 RGD_C 2 IMVP_PW RGD 36,42
R2812 C2811 R2814
1
10KR2J-3-GP
DY Q2802 0R2J-2-GP
SCD1U10V2KX-5GP
DY 2N7002K-2-GP DY
84.2N702.J31
2
2ND = 84.07002.I31
SC 1107
HR PX
A
Wistron Corporation A
Title
3D3V_S0 D2902
1 KBC_BEEP 27
R2903
1
AUDIO_PC_BEEP 1 2 AUDIO_BEEP 3
10KR2J-3-GP
DY R2906 SCD1U10V2KX-5GP 2 HDA_SPKR 21
2
0R0805-PAD C2902
D2901 1 2 R2933 BAT54CGP-GP
2
27 AMP_MUTE# 2 10KR2J-3-GP 83.R2003.H81
3 CX20584_MUTE# 1 R2901 2 GPIO/SPK_MUTE# R2907 2nd = 83.R2003.Q81
1
0R0402-PAD 0R0805-PAD
19,27,36,37,47,75,82 PM_SLP_S3# 1 1 2
D EXT_MUTE# D
83.00056.Q11 1 R2905 2 AUD_AGND
1
2ND = 83.00056.K11 0R0402-PAD DY DY DY
1
DY EC2901 DY EC2902
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
EC2903 EC2904
C2935
C2936
C2937
2
1
2
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
3D3V_S0
1
R2947
10KR2J-3-GP U2901
Q2901
CODEC_SYNC 10 48 DOCK_SPDIF 104
2
SCD1U10V2KX-5GP
MB_MICIN_R 58
2
5V_S0 C2924 42
1
C2921 PORTF_R R2921
18
RPWR_5.0
SCD1U10V2KX-5GP
C2907 C2912 DY 1205 SC 15 38 1 2 MB_MICIN_L
10KR2J-3-GP
SC10U6D3V3MX-GP
SCD1U10V2KX-5GP
2
LPWR_5.0 B_BIAS
C2906 2 1CLASS_D_REF
20 37 C_BIAS 3KR2F-GP
SC10U6D3V3MX-GP
2
2
C2925 SCD1U10V2KX-5GP CLASS_D_REF C_BIAS MB_MICIN_R
1 2
2
44 SENSE_A 3KR2F-GP
SENSEA SENSE_B
49 43 R2923
GND SENSEB
AUD_AGND 32 FILT_1.65V
FILT_1.65
1
1
C2920
C2919
SCD1U10V2KX-5GP
1
1
SC10U10V5ZY-1GP
R2918 C2918
SC1U6D3V2KX-GP
C2927
C2928
2
2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
2
AUD_AGND
C2929 C2930
B B
3D3V_S0 3D3V_S0
3D3V_S0
1
DY
R2935
33KR2F-GP
1
1
R2932
2
R2928 5K1R2F-2-GP
5K1R2F-2-GP
SYNC_CTL
2
2
C2938
R2937
1
SC33P50V2JN-3GP
G SENSE_PORT_C 39K2R2F-L-GP
21 HDA_CODEC_SYNC D
R2939 1 2 39K2R2F-L-GP AUD_HP1_JD# 58
S CODEC_SYNC
SENSE_PORT_A
Q2904 DY
A
1 R2944 2 A
0R0402-PAD
UMA 3G
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Audio Codec
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 29 of 108
5 4 3 2 1
5 4 3 2 1
AUDIO OP AMPLIFIER
D D
C C
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Audio AMP
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 30 of 108
5 4 3 2 1
5 4 3 2 1
1
C3104 C3105 3D3V_LAN_S5 U3101
BCM C3101 C3102 1 R3104 2
SCD1U10V2KX-4GP
L3104 1 2 GBK160808T-601Y-GP 0R3J-0-U-GP
1
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
BCM BCM BCM BCM 42
VDDO BCM BCM
25 BIASVDD_G BCM C3107
BIASVDDH SCD1U10V2KX-4GP
2
D L3105 D
12 XTALVDD_G 1 2 GBK160808T-601Y-GP
1
XTALVDDH
BCM
1D2V_LAN_S5 15 BCM C3109
VDDC SCD1U10V2KX-4GP
1206 SC del for layout 41
2
VDDC
L3106
1D2V_LAN_S5 GBK160808T-601Y-GP
68.00248.011
2nd = 68.00217.241 30 LAN_AVDD L3109 1 2 GBK160808T-601Y-GP
1
AVDDH LAN_AVDD
AVDDH
36 BCM
SCD1U10V2KX-4GP
1 2 AVDDL_G C3110 C3111
BCM57761 BCM SCD1U10V2KX-4GP
2
1
1
BCM
L3103 C3116 C3117 AVDDL_G 27 6mm x 6mm
GBK160808T-601Y-GP SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP AVDDL_G AVDDL
33
2
2
AVDDL_G AVDDL
68.00248.011 39
AVDDL 48-Pin QFN
2nd = 68.00217.241
BCM BCM BCM
1 2 GPHY_PLLVDD 37 LAN_MDI3N_BCM 106
TRD3_N
38 LAN_MDI3P_BCM 106
1
1 GPHY_PLLVDD TRD3_P
24
L3110 C3119 C3108 GPHY_PLLVDDL
35 LAN_MDI2N_BCM 106
GBK160808T-601Y-GP SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP TRD2_N
34 LAN_MDI2P_BCM 106
2
TRD2_P
68.00248.011
2nd = 68.00217.241 TRD1_N
31 LAN_MDI1N_BCM 106
BCM BCM BCM TRD1_P
32 LAN_MDI1P_BCM 106
1 2 PCIE_PLLVDD PCIE_PLLVDD 18
PCIE_PLLVDDL
21 29 LAN_MDI0N_BCM 106
1
PCIE_PLLVDDL TRD0_N
28 LAN_MDI0P_BCM 106 1
C3120 C3121 TRD0_P
C SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP 10M/100M/1G_LED#_BCM_C 10M/100M/1G_LED#_BCM C
45 3 10M/100M/1G_LED#_BCM 106
2
SO#_LINKLED# SPD100LED#
48
SPD100LED# ROM_CLK BAW56-5-GP
46 2
SCLK_SPD1000LED# D3101
BCM BCM BCM TRAFFICLED#
47 LAN_ACT_LED#_BCM 106
BCM
83.00056.Q11
1201 SC 3 2nd = 83.00056.K11 3D3V_LAN_S5
GPIO0
BCM
BCM BCM 3D3V_LAN_S5
C3123 1 2 SCD1U10V2KX-5GP PCIE_RXP6_BCM 17 4 R3140 1 2 0R2J-2-GP
20,105 PCIE_RXP6 SMB_CLK 20,75
1
C3124 SCD1U10V2KX-5GP PCIE_TXD_P SMB_CLK/TEST_1 R3141
20,105 PCIE_RXN6 1 2 PCIE_RXN6_BCM 16 5 1 2 0R2J-2-GP SMB_DATA 20,75
PCIE_TXP6_BCM PCIE_TXD_N SMB_DATA/TEST_2 R3106
20,105 PCIE_TXP6
1 4 22 BCM
1
PCIE_TXN6_BCM PCIE_RXD_P 1KR2J-1-GP
20,105 PCIE_TXN6 2 BCM 3 23
PCIE_RXD_N
19,65,75 PCIE_WAKE# 1 R3102 DY
RN3102 SRN0J-6-GP WAKE# 1KR2J-1-GP
5,18,27,32,36,65,66,71,75,82,83,97,105 PLT_RST# 6
2
CLK_PCIE_BCM_LAN PERST# EECLK
20,105 CLK_PCIE_LAN 1 4 20
PCIE_REFCLK_P CS#_EECLK
43 BCM
20,105 CLK_PCIE_LAN# 2 BCM 3 CLK_PCIE_BCM_LAN# 19
2
PCIE_REFCLK_N EEDATA U3102
44
RN3101 SRN0J-6-GP SI#_EEDATA 3D3V_LAN_S5
10M/100M/1G_LED#_BCM_C 1 8 EEDATA
ROM_CLK SI SO
1222 SC 2
SCK GND
7
3 6
EECLK RESET# VCC
4 5
CS# WP#
3D3V_LAN_S0
1D2V_LAN_S5 AT45DB011D-SH-T-GP
C3118
1
BCM BCM
SCD1U10V2KX-4GP
B 10KR2J-3-GP 2 B
1 R3136 40
0R2J-2-GP 2 VMAIN_PRSNT
1 R3105 2 11 1D2V_LAN_S5_SR IND-4D7UH-192-GP 1 2 L3107
2
LOW_PWR SR_LX 1D2V_LAN_S5
SR_VFB
8 BCM
0302 -1 BCM BCM
1
BCM C3132 C3130
X10502
SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
LAN_XO_R 2 1 14 3D3V_LAN_S5
XTALO
EECLK
1 2LAN_XI 200R2F-L-GP R3138 13
2EEDATA
2
2
XTALI
SR_VDDP
10 BCM BCM
LAN_RDAC 26 9
XTAL-25MHZ-149-GP
1
2
SC18P50V2JN-1-GP 82.30020.D11 SC18P50V2JN-1-GP
1
1
49 R3103 R3107
2nd = 82.30020.I01
2
2
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
BCM BCM BCM BCM DY
1
BCM BCM
2
-1 by Chaomin
1201 SC
20,105 PCIE_CLK_LAN_REQ# 1 2 PCIE_CLK_BCM_LAN_REQ# 7
CLK_REQ#
R3108
0R3J-0-U-GP Package Body
BCM
A
BCM A
<Variant Name>
1st = 71.57761.M02
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BCM57780
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 31 of 108
5 4 3 2 1
5 4 3 2 1
TP3201 TPAD14-OP-GP
EEDI 1
RTS5139 clcok setting
D D
Clock Mode 0(R3216) Mode 1(R3215)
External 48Mhz X X
3D3V_S0
5,18,27,31,36,65,66,71,75,82,83,97,105 PLT_RST#
X'tal 12Mhz sutff stuff
EESK R3217 1
2DY or 48Mhz
20 PCIE_CLK_CARD_REQ#
EEDI 10KR2J-3-GP
MS_INS# 74
SD_CD# 74
XD_D7/SD_W P 74
3D3V_S0
XD_D6/MS_CLK 74
1 R3210 2 CR_RREF
1
C3213 6K2R2F-GP
SCD1U16V2ZY-2GP
48
47
46
45
44
43
42
41
40
39
38
37
U3201
CLK_REQ#
PERST#
MS_INS#
SD_CD#
SP15
SP14
EEDO
3V3_IN
EECS
EESK
GPIO/EEDI
RREF
20 PCIE_TXP3 1 HSIP SP13 36 XD_D5 74
20 PCIE_TXN3 2 HSIN SP12 35 XD_D4/MS_D3 74 DY
C
20 CLK_PCIE_CARD 3 REFCLKP SP11 34 XD_D3 74 2 R3216 1 DV33_18 C
4 33 10KR2J-3-GP
20 CLK_PCIE_CARD# REFCLKN SP10 XD_D2/MS_D2 74
AV12 5 AV12 SP9 32 XD_D1/MS_D0 74
1 2 PCIE_RXDP3 6 31
20 PCIE_RXP3 HSOP SP8 XD_D0 74
C3204 1 2 SCD1U16V2ZY-2GP PCIE_RXDN3 7 71.05209.00G 30
20 PCIE_RXN3 HSON SP7 XD_W P#/MS_D1 74
C3206 SCD1U16V2ZY-2GP 8 29
GND SP6 XD_ALE 74
DV12 9 DV12 SP5 28 XD_CLE/MS_BS 74
3D3V_CARD_S0 10 Output 950mA 27 DV12_S
CARD1_3V3 DV12_S
3D3V_S0 11 3V3_IN
1.2A GND 26
TP11 1 CARD2_3V3 12 Output 550mA 25
CARD2_3V3 SD_D2 SD_D2 74
TPAD14-OP-GP
SD_CMD
DV33_18
1
XD_CD#
SD_CLK
C3210 C3208
SD_D1
SD_D0
SD_D3
AV12 DV12 SC4D7U10V3KX-GP SCD1U16V2ZY-2GP
GND
SP1
SP2
SP3
SP4
2
RTS5209-GR-GP
13
14
15
16
17
18
19
20
21
22
23
24
1
C3211 C3215
SC4D7U10V3KX-GP SCD1U16V2ZY-2GP Closed to chip pin
DV33_18
2
SD_D3 74
74 XD_CD# SD_CMD 74
SD_CLK 74
SD_D0 74
SD_D1 74
XD_W E# 74
1
B C3212 B
XD_CE# 74
DY
SC8P250V2CC-GP
XD_RE# 74
XD_RDY 74
2
1
1
C3202 C3214
SC4D7U10V3KX-GP DY SC1U6D3V2KX-GP
2
SCD1U10V2KX-5GP
SC4D7U10V3KX-GP SC4D7U10V3KX-GP
SCD1U16V2ZY-2GP
DY
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
RTS5209(CARD READER)
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 32 of 108
5 4 3 2 1
A B C D E
4 4
3
(Blanking) 3
2 2
<Variant Name>
1
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 33 of 108
A B C D E
5 4 3 2 1
D D
C C
B B
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 34 of 108
5 4 3 2 1
5 4 3 2 1
D D
reserve
C C
B B
A A
HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
5 4 3 2 1
5 4 3 2 1
Power Sequence
1
C3612
1 DY
SCD01U50V2KX-1GP
R3614
2
D D
19,27,29,37,47,75,82 PM_SLP_S3# 3
CRB : 1K
2
D3603
BAS16-6-GP
83.00016.K11
2ND = 83.00016.M11
D
Q3606
U3607 2N7002K-2-GP
AO4468-GP
84.2N702.J31
84.04468.037
3D3V_S0 3D3V_S5 2ND = 84.07002.I31
1107 SC del R3626 2nd = 84.08882.037
RUN_ENABLE 1 S D 8
S
2 S D 7
3 S D 6
U3609 4 G D 5
G5938TL1U-GP 1108 SC 19,27,29,37,47,75,82 PM_SLP_S3#
19,27,29,37,47,75,82 PM_SLP_S3# 5V_S5
74.05938.09P
3D3V_S0
5V_S0 6 1
EN VCC U3605
5 2
DC2 GND AO4468-GP
4 3
DC1 HV
C 84.04468.037 C
1D5V_S0 1D5V_S3
2nd = 84.08882.037
1 S D 8
2 S D 7
3 S D 6
4 G D 5
1
C3611 DY
SCD01U50V2KX-1GP
2
5V_S5 5V_S5 1D05V_M
1
E
1
R3633 R3634 C3613 R3637 R3638
1
1
MMBT2222AH-GP 100KR2J-1-GP SC10U6D3V5KX-1GP
1 R3601 2 H_PWRGD_R B iAMT_SBA C3614
2
5,22 H_CPUPWRGD Q3601 1D05V_LAN
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
1KR2J-1-GP SC10U6D3V5KX-1GP
DY iAMT_SBA iAMT_SBA
2
1
U3608 1D05V_LAN
iAMT_SBA iAMT_SBAiAMT_SBA
C
SCD1U10V2KX-5GP
2
7,105 PLT_RST# 2 1 1 S D 8 84.03006.A37
4K7R2J-2-GP 84.M2222.011 2 S D 7 1 S D 8
R3635
1
2nd = 84.02222.V11 3 S D 6
R3636 2 S D 7
R3632 1 2 PM_5V_S5_RR D 5 3 S D 6
2K2R2J-2-GP G 1D05V_LAN_MOS D 5
iAMT_SBA 1 2
G
iAMT_SBA
RUNPWROK_BJT_1
4
330KR2J-L1-GP
RUNPWROK_BJT
2
4
2 330KR2J-L1-GP
PM_SLP_A#_BJT
PM_5V_S5_R
3 PURE_HW_SHUTDOWN# 27,28
D
41 3V/5V_EN 1 D3601
BAS16-6-GP iAMT_SBA U3613
iAMT_SBA
200KR2J-L1-GP
83.00016.K11 2N7002K-2-GP
1
B B
DY 84.2N702.J31
2 1 S5_ENABLE 27,97,107 2nd = 84.07002.I31
G
2
S
2KR2F-3-GP R3603
U3612
1 6 U3614 0412 -1M del for layout
1 6
19,27 PM_SLP_A# 2 5
37,45,46,47 RUNPWROK 2 5
3 4
3 4
2N7002KDW-GP
2N7002KDW-GP
84.2N702.A3F
84.2N702.A3F
3D3V_S5
iAMT_SBA 3D3V_S5 Q3602 3D3V_M 45 1D05V_LAN_PWRGD
DMP2305U-7-GP iAMT_SBA 3D3V_S5
1
change U3612, U3614, U3615 to 84.2N702.A3F S D
R3649
0822 SB
iAMT 4K7R2J-2-GP
U3601
G
3D3V_S5
iAMT_SBA 1
2
B
5
PM_SLP_LAN#_BJT_R 1D05V_M_C VCC
AiAMT_SBA
2
4 PM_MPWROK 19
Y
3
R3642 R3643 GND
84.M2222.011
1
C
3D3V_S5 3D3V_M
1D05V_M 2 1 1D05V_M_R B Q3603
2
MMBT2222AH-GP
U3615
83.R0304.D8F
1 2
E
PM_SLP_LAN#_BJT 1KR2F-L-GP R3658 0R5J-5-GP
1 6
1
iAMT
Q3604
1
R3650 HR PX
1 6
10KR2J-3-GP
PM_SLP_A#_BJT 2 5 1D05V_M_BJT
iAMT_SBA Wistron Corporation
2
R3717
0R2J-2-GP
SB 1010 BACK IVB properties
Close to DIMM 1
DY 2
1
DDR_VREF_S3
1 DY 2 14 DDR_WR_VREF01_B4 D
R3703
22R2J-2-GP G DRAMRST_CNTRL_PCH 20
D D
S +V_SM_VREF_CNT 9 DY
2
2N7002K-2-GP
2
D 84.2N702.J31
R3705
2ND = 84.07002.I31
D
G 100KR2J-1-GP
Q3701
Q3708 2N7002K-2-GP
1
2N7002K-2-GP R3726
84.2N702.J31 0R2J-2-GP
2ND = 84.07002.I31
84.2N702.J31 2ND = 84.07002.I31
1 2
Q3704 PM_SLP_S3# 19,27,29,36,47,75,82 DY
S
36 PS_S3CNTRL G
D 0D75V_EN
36 PS_S3CNTRL Q3709
S S M_VREF_DQ_DIMM1_C 9
2N7002K-2-GP 15 DDR_WR_VREF01_D1 D
84.2N702.J31 G DRAMRST_CNTRL_PCH 20
2ND = 84.07002.I31 Close to CPU
S3 Power Reduction Circuit SM_DRAMPWROK 2N7002K-2-GP DY
1D5V_S3 84.2N702.J31
1D05V_VTT_PWRGD 45,48 2ND = 84.07002.I31
1
R3706
R3709 1KR2J-1-GP
5V_S5 0R2J-2-GP
2
1D5V_S0 3D3V_S0 1 2
DY
1
Q3705
1
C R3714 2N7002K-2-GP C
S3 Power Reduction Circuit
1
100KR2J-1-GP 84.2N702.J31 R3710
2
DY 4K7R2J-2-GP
2
1.5V_RUN_CPU_EN# G D SM_DRAMRST#_D
1 2 DDR3_DRAMRST# 14,15
2
1
1
D 0D75V_EN_L 2 R3711 1 0D75V_EN 46 G R3718
C
2
Q3706 19,27,29,36,47,75,82 PM_SLP_S3# 2 1
0R2J-2-GP
2ND = 84.07002.I31
E
2
1
MMBT3904-3-GP C3705 84.2N702.J31
R3722
DY SCD1U10V2KX-5GP 2N7002K-2-GP
DRAMRST_CNTRL_PCH 20
84.03904.T11
DY 4K7R2J-2-GP 2nd = 84.03904.L06 DY C3703
2
2 1DRAMRST_CNTRL_PCH
1
DY SCD047U16V2KX-1-GP
DY
Close to CPU
SB S3 Power Reduction Circuit SM_DRAMPWROK 3D3V_S5
1
3D3V_S5 1D5V_S0
1
R3723
1
R3713 R3721 CEKLT V1.0: PCH to 1K,CUP to 200R 10KR2J-3-GP
1
2
B
200R2F-L-GP VCC 5
2
1D05V_VTT_C
5,19 PM_DRAM_PWRGD 1 5 2 AiAMT_SBA
2
IN B VCC 1D05V_VTT_PWRGD
iAMT_SBA Y 4
2
42,48 ALL_PWR_OK 1 2 2 3
R3701 0R2J-2-GP IN A GND
iAMT_SBA
1
74VHC1G09DFT2G-GP 1D05V_VTT
45,48 1D05V_VTT_PWRGD
SCD1U10V2KX-5GP
73.01G09.AAH SB 0926 D
C
R3724
R3720
DY 0R2J-2-GP 2 1 ADP_1D05_R
B Q3710 S
MMBT2222AH-GP
DY
1
E
1KR2F-L-GP 2N7002K-2-GP
1
C3706 84.2N702.J31
iAMT_SBA iAMT_SBA 2nd = 84.07002.I31
For U3701 not OD AND gate
SC1U10V3ZY-6GP
2
R3719 to 64.15015.6DL
iAMT_SBA
R3720 to 64.75005.6DL
R3702 to DY DY
A A
HR PX
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ADAPTER
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 37 of 108
5 4 3 2 1
5 4 3 2 1
D D
AD_JK_IN
PD3805 AD_JK
1
DCIN1 3
NP1 2
1
2
1Pin=3A PDS1040-13-GP-U PC3801 20100716 V1.5 PC3802
1
SCD1U50V3KX-GP
2
3 PD3801 PD3802
SC1U50V5ZY-1-GP
1
4
2
5
NP2 P6SBMJ27AGP-GP P6SBMJ27AGP-GP
A
C ACES-CON5-20-GP C
20.F1878.005 DY
2nd = 20.F1763.005
AD+
AD_JK
PU3802
1 S D 8
2 S D 7
3 S D 6
PW R_AD+_2 4 G D 5
P1403EV8-GP
2
84.P1403.B37
PR3807 PC3805
1
200KR2F-L-GP SC1U50V5ZY-1-GP
PQ3802
2
B R2 B
E
PW R_ADJK_EN B R1
C
1
PDTA124EU-1-GP
PQ3801 84.00124.K1K PR3808
3 100KR2J-1-GP
1 R1
27 AD_OFF
2
2
R2
LTC024EUB-FS8-GP
AD_DOCK
PD3803 AD_JK
1
A 3 <Variant Name> A
2
1
PR3809 PDS1040-13-GP-U
10KR2J-3-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2
Title
DCIN JACK
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 38 of 108
5 4 3 2 1
5 4 3 2 1
1
PC3901 PC3902
SCD1U50V3KX-GP SC2200P50V2KX-2GP PC3903 PC3904
2
SCD1U50V3KX-GP SC2200P50V2KX-2GP
2
BAT1
2nd BAT 2nd BAT
D 1125 SC for SMBUS 9 ALP-CON8-2-GP D
1 10
PN3902 8
PN3901 BATA+ 2 SRN33J-7-GP BATB+ 7
1 8 BI 3 1 8 6 2nd BAT
27 BAT_A_IN# 2 7 BAT_A_IN#_1 4 27 BAT_B_IN# 2 7 BAT_B_IN#_1 BII 5
3 6 BATA_SCL_1 5 3 6 BATB_SCL_1 4
27,40,104 BAT_SCL 27,51,79,86 SML1_CLK_C
4 5 BATA_SDA_1 6 4 5 BATB_SDA_1 3
27,40,104 BAT_SDA 27,51,79,86 SML1_DATA_C
7 2
SRN22J-3-GP-U 8
10 1
2nd BAT 9
ALP-CON8-8-GP-U
1
BAT2
1
PR3912
K
K
0R0603-PAD PR3913
PD3901 PD3902 0R0603-PAD 20.81095.008
MMPZ5232BGP-GP 20.81352.008 MMPZ5232BGP-GP 2nd = 20.81573.008
2
83.5R603.R3F 2nd = 20.81353.008 83.5R603.R3F
A
A
3rd = 20.81358.008
2nd BAT
C C
G1
S1
G2
S2
BT+ BT+
PT3901 PT3902
1
3D3V_AUX_S5 1 2 2 1 3D3V_AUX_S5
1
PR3909 PR3904 PQ3902
10KR2J-3-GP
10KR2J-3-GP
PR3915 PR3914
8
100KR2J-1-GP
100KR2J-1-GP
D1
D1
D2
D2
PU3901
2
S2 D2 D2 S2
8 EXTLD
1
MINV PC3910
2
SC10U25V6KX-1GP
PR3908 PC3909 PC3912
2
10KR2J-3-GP
SC4D7U25V5KX-GP
MAX1773AEUP-GP SC1U10V3ZY-6GP
2
2
MAX1773_PDS 40
2
M1773_EXTLD
PR3906 PR3907
MAX1773_VDD
1 2 1 2
2
MAX1773_VDD GAP-CLOSE-PW R
PD3903 1 2
1
CH521G-30GP-GP PR3905
1
10KR2J-3-GP
A
A PR3903 DCBATOUT A
HR PX
100KR2J-1-GP
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BATT_CONN
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 39 of 108
5 4 3 2 1
5 4 3 2 1
AD+_TO_SYS DCBATOUT
SSID = Charger PU4001
PR4004
AD+ 8 D S 1
7 D S 2 1 2
1
6 D S 3
5 D G 4 PR4021 D01R3721F-GP-U
DY 100KR2J-1-GP
P1403EV8-GP
A8( ANNIE/ASTRO)
1
84.P1403.B37
1
PR4014,PR4016 PR4023
10KR2F-2-GP
AD+_G_2 1
PR4003
2 MAX1773_PDS 39
PG4002
1
0R0402-PAD PG4001 GAP-CLOSE-PWR-3-GP
PR4022 GAP-CLOSE-PWR-3-GP PR4009
2
AD+ total power R1 R2 10KR2F-2-GP 0R2J-2-GP
DC_IN_D
2
D DY DY 1 0308 -1 for acoustic noise D
2
65w 12.4K 100K PQ4001
AD+_G_1
SCD1U50V3KX-GP
1 2
3 4
80w 41.2k 100K PC4003
PWR_CHG_ACOK 2 5 SCD1U25V2KX-GP DCBATOUT
SC1U25V3KX-1-GP
PC4002
DCBATOUT
PC4008
90w 60.4k 100K 1 6
1
AD+ 2nd = 84.2N702.F3F DY
1
2N7002KDW-GP
SCD1U25V2ZY-1GP
120w 118k 100K PT4004 PT4005
SC10U25V5KX-GP
SC10U25V5KX-GP
SE47U25VM-13-GP
SE47U25VM-13-GP
84.2N702.A3F
PWR_CHG_ACN
1108 SC
PWR_CHG_ACP
PC4005
PC4007
PC4006
2
1
1
1 PR4015 2 PWR_CHG_VCC PC4004 PWR_CHG_REGN
20R5F-1GP SCD1U50V3KX-GP
2
CHG_AGND CHG_AGND
2
5
6
7
8
PR4006 1 PR4016 2 PC4001 PD4003
D
D
D
D
316KR2F-GP 20R5F-1GP SCD47U25V3KX-3-GP CHG_AGND SD103AWS-1-GP PU4004
2
0308 -1 1 2 K A 1 2 FDMC8884-GP-U
CHG_AGND PR4008 PC4009 2nd = 79.47612.3FL 2nd = 79.47612.3FL
2
SCD047U25V2KX-GP
PU4003 0R3J-0-U-GP SC1U25V3KX-1-GP
PC4017
3rd = 77.54761.01L 3rd = 77.54761.01L
ACN
ACP
1
3D3V_AUX_S5
G
S
S
S
PWR_CHG_IOUT 20
1
VCC
4
3
2
1
PR4007 PR4031
2
R1 60K4R2F-GP 10KR2F-2-GPPWR_CHG_ACDET6 17 PWR_CHG_BTST
ACDET BTST
1
Charger Current=1.4~3.6A
1
PR4010 PC4010
2
49K9R2F-L-GP SCD01U50V2KX-1GP STOP_CHG 16
REGN
0203 SD
2
1
PR4002 3
2
2
CHG_AGND PWR_CHG_CMPIN PHASE SC3300P50V2KX-1GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
D01R3721F-GP-U
1
IND-5D6UH-51-GP
TC4002
ST15U25VDM-1-GP
PWR_CHG_BAT_SCL 9 15 PWR_CHG_LODRV
DY
SCD1U50V3KX-GP
2
2
SCL LODRV
PG4003
PG4004
CHG_AGND ER4001
PC4022
1
1
SE47U25VM-13-GP
PT4001
2D2R3-1-U-GP PC4018
5
6
7
8
SC10U25V5KX-GP
PWR_CHG_BAT_SDA 8
SDA
D
D
D
D
3D3V_AUX_S5 PR4025 PU4005
2
SCD1U25V2KX-GP
10R2F-L-GP FDMC8884-GP-U
13 PWR_CHG_SRP 1 2
SRP
1
1
PC4019
PWR_CHG_ILIM 10
1
PR4020 ILIM PWR_CHG_SRN EC4001
12 1 2
SRN DY
G
S
S
S
100KR2J-1-GP PR4024 SC680P50V2KX-2GP
2
PWR_CHG_AD_OFF 11 7D5R2F-GP
4
3
2
1
NC#11
2
2nd = 79.47612.3FL
74.24727.A73 CHG_AGND 3rd = 77.54761.01L
D
1
10KR2F-2-ML-GP
PR4005
PQ4007 5 7 PWR_CHG_IOUT 1 2 AD_IA 27
2N7002A-7-GP ACOK# IOUT PR4013 PWR_CHG_CSOP_1
DY
GND
GND
SCD1U25V2KX-GP
0R0402-PAD
G PWR_CHG_REGN
CHG_ON# 27
8K45R2F-2-GP
BQ24727RGRR-1-GP
PR4028
2
21
14
1
1
SC220P50V2JN-3GP
PC4016
PR4026
S
PC4011
100KR2J-1-GP
2 1
DY
2
1
2
1
BATT_SENSE 39
CHG_AGND PG4013
DY
SCD1U25V2KX-GP
GAP-CLOSE-PWR-3-GP
2
0308 -1 for Power
1
PC4012
CHG_AGND
B 3D3V_AUX_S5 B
2
3D3V_AUX_S5
3D3V_AUX_S5 CHG_AGND
1
CHG_AGND
PR4029
1
100KR2J-1-GP
2
PR4030
PR4032 PR4033 100KR2J-1-GP
2
3K3R2F-2-GP 3K3R2F-2-GP 2
1
2 1 PWR_CHG_BAT_SCL PWR_CHG_ACOK
27,39,104 BAT_SCL 27 AC_IN#
PG4008 GAP-CLOSE-PWR-3-GP
2 1 PWR_CHG_BAT_SDA
27,39,104 BAT_SDA
PG4010 GAP-CLOSE-PWR-3-GP
D PQ4006 27 STOP_CHG#
2N7002A-7-GP
G AC_IN#
D
PQ4008
2N7002A-7-GP
S
G STOP_CHG
S
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CHARGER BQ24707A
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 40 of 108
5 4 3 2 1
5 4 3 2 1
1205 SC for Power
0315 -1
del close gap for Layout PQ4101 PR4104 PR4104 change to 41.2k
4 3 1 2PWR_5V_ENTRIP1
PR4105 PR4106 41K2R2F-GP
1
27 5V_CHARGER_EN 1 2 PWR_5V_EN 5 2 PWR_3D3V_EN 2 1 3V/5V_EN 36 PC4126
10KR2J-3-GP 10KR2J-3-GP DY
SC18P50V2JN-1-GP
PWR_3D3V_ENTRIP2 1 PR4107 2 6 1
2
1
SC18P50V2JN-1-GP
1222 SC del GAP for layout
1
PC4109
110KR2F-GP PC4108
2N7002KDW-GP SCD33U6D3V2KX-1-GP
DY
2
84.2N702.A3F
2
2nd = 84.2N702.F3F
D DY D
DCBATOUT DCBATOUT
K
PD4101
1
MMPZ5228B-GP
3D3V_S5 3D3V_PWR PR4145 83.3R903.D3F
60K4R2F-GP
PG4156
1 A
1 2
2
PR4147
PQ4103 30K1R2F-L-GP
GAP-CLOSE-PWR
PG4157
4 3 PWR_5V3D3V_ENLDO
1 2
2
5 2 DCBATOUT_UVP_2
GAP-CLOSE-PWR
PG4159
DCBATOUT_UVP_1 6 1
1 2 1125 SC for RF
2N7002KDW-GP
1
GAP-CLOSE-PWR
PG4164
84.2N702.A3F PR4148 1212 SC change to 84.03664.037 for Power
1
1 2 FC4101 PR4146 2nd = 84.2N702.F3F 69K8R2F-GP
604KR2F-GP
DCBATOUT
SCD1U25V3KX-GP
GAP-CLOSE-PWR 1125 SC for RF 0308 -1
PG4165
2
C C
1 2 change to 47U
DCBATOUT for acoustic noise
GAP-CLOSE-PWR
PG4166
1 2 5V_AUX_S5 Vz=3.9V DCBATOUT PC4110
PG4186
UVP Function
SCD01U50V2KX-1GP
DCBATOUT PC4145 PC4146 PC4144 PT4111 PT4110
SE47U25VM-13-GP
GAP-CLOSE-PWR 1 2 PWR_5V3D3V_VREG5
DCBATOUT<7.5V 3/5V disable
SCD1U50V3KX-GP
ST15U25VDM-1-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SB 0923 GAP-CLOSE-PWR-3-GP
2
1
PC4143 PU4115 PU4116
4
SC4D7U10V5KX-4GP PR4150
1
4
G1
D1
D1
D1
100KR2F-L1-GP FDMS3664S-GP
G1
D1
D1
D1
PC4148
Q1
D
1
8
7
6
5
Q1
2
2
D
D
D
D
PU4114 PU4103
PHASE
SC10U25V5KX-GP
SCD1U50V3KX-GP
SC68P50V2JN-1GP
9 S1/D2
2nd = 79.47612.3FL
Q2 S2
PHASE
2
QM3002M3-GP PWR_5V3D3V_ENLDO
12 9 S1/D2
Iomax=30A
Q2 S2
ENLDO
G2
S2
S2
14 LDO5 3rd = 77.54761.01L
G2
S2
S2
4 OCP>40A
G
5
S
S
S
5
S G 11 PC4120
1
2
3
PC4119 VIN
1114 SC For EMI 2 1PWR_3D3V_VOOT2_1 1 PR4110 2 PWR_3D3V_BOOT2 7 19 PWR_5V_BOOT2 1 PR4111 2 PWR_5V_VOOT2_1
1 2 0308 -1
0R3J-0-U-GP BOOT2 BOOT1 0R3J-0-U-GP
3D3V_PWR
1107 SC SCD1U25V3KX-GP PWR_3D3V_UGATE2 8 18 PWR_5V_UGATE2 SCD1U25V3KX-GP 1114 SC for EMI 5V_CHARGER for acoustic noise
PL4102 UGATE2 UGATE1
2 1 PWR_3D3V_PHASE2 9 17 PWR_5V_PHASE2 1 2
IND-1D5UH-52-GP PHASE2 PHASE1 PL4103
B B
PG4123
D
1
1
GAP-CLOSE-PWR-3-GP
PG4122 16 PWR_5V_LGATE2 IND-D56UH-27-GP
LGATE1
1
PT4102
ST220U6D3VDM-20GP
GAP-CLOSE-PWR-3-GP
PWR_3D3V_LGATE2 10
LGATE2
8
7
6
5
SCD1U10V2KX-4GP
2
1
PC4121
D
D
D
D
1PWR_5V_VOUT
PU4145 PWR_3D3V_FB2 5 1 PWR_5V_FB2 0118 SD for Power PC4122
2
FB2 FB1
ST220U6D3VDM-21-GP
ST220U6D3VDM-21-GP
ST220U6D3VDM-21-GP
ST220U6D3VDM-21-GP
SCD1U10V2KX-4GP
PWR_3D3V_VOUT 2
2
BYP1
4 1 2 PWR_5V3D3V_VREG3 15
G
LDO3
S
S
S
GAP-CLOSE-PWR-3-GP PWR_5V3D3V_ENM/SECFB
S G 13
1
2
3
SECFB
3V_5V_POK 6 15KR2F-GP
PGOOD
SC4D7U6D3V5KX-3GP
PWR_5V_ENTRIP1
Iomax=6A 2
2
2
ENTRIP1
1
1
6K65R2F-GP
GND
1
PR4116 PR4130
56KR2F-GP DY
1 2 5V_AUX_S5 PR4118
2
3D3V_S5 2
2
1 PR4123 2 3D3V_AUX_S5
1
DY 0R0402-PAD
74.08239.B73 <Variant Name>
1
A
PR4114 A
PR4119 100KR2J-1-GP
10KR2F-2-GP 0308 -1
Wistron Corporation
2
Title
RT8329 5V/3D3V
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 41 of 108
5 4 3 2 1
5 4 3 2 1
3D3V_PW R 5V_S5
1D05V_VTT 3D3V_S0
1
D PR4204 PR4205 D
1R2F-GP 1R2F-GP
1 PR4207
1 PR4208
1 PR4209
1 PR4210
2
2
PC4211
PC4201
SCD1U25V3KX-GP
SCD1U25V3KX-GP
1
1
1D05V_LAN
2
130R2F-1-GP
10KR2F-2-GP
10KR2F-2-GP
54D9R2F-L1-GP
1214 SC GND_1316 GND_1316 PU4201
1
DYPR4215
100R2F-L1-GP-U
DYPR4216
100R2F-L1-GP-U
PW R_VCORE_VDD5 12 VDD5 DCMDRP1 18
19
PW R_VCORE_DCMDRP1
PW R_VCORE_DCMDRP2
PW R_VCORE_VDD3 DCMDRP2
43 VDD3
42 14 PW R_VCORE_SENSE1- PR4217 1 2 0R0402-PAD
VSSSENSE 8
2
PC4214
30 1
SCD022U16V2KX-3GP
SCD022U16V2KX-3GP
C TEMP_SENSE2 0R0402-PAD C
43 PW R_VCORE_DB0 37 DB10
1
36 40 PR4252 100KR2F-L1-GP
43 PW R_VCORE_DB1 DB11 SPHASE1_0 PW R_VCORE_SPHASE_0 43
1
1
PR4221 PR4222 35 39
6K98R2-GP 8K87R2F-2-GP 43 PW R_VCORE_DB2 DB12 SPHASE1_1 PW R_VCORE_SPHASE_1 43 PR4255 PR4256
44 DB0_GFX 33 DB20 SPHASE1_2 38
32 34 61K9R2F-GP NTC-220K-5-GP
2
44 DB2_GFX DB22
5 H_CPU_SVIDCLK 8
2
PW R_VCORE_IDES1_N VCLK
43 PW R_VCORE_IDES1_N 24 IDES1_N VDIO 4 H_CPU_SVIDDAT 8
PW R_VCORE_IDES1_P 23 DY1 2 S0_PW R_GOOD 19,27
NTCG104QH224HT
43 PW R_VCORE_IDES1_P IDES1_P PR42571 PR4258 20R2J-2-GP
44 IDES_N_GFX 27 IDES2_N VR_ENABLE 6 ALL_PW R_OK 37,48
28 10 0R0402-PAD
44 IDES_P_GFX IDES2_P VR_TT# H_PROCHOT# 5,27
GND_1316 8
PW R_VCORE_R_OSC VR1_READY PW R_VCORE_VR2_DELAY IMVP_PW RGD 28,36
1 2 41 R_OSC VR2_READY 9
130KR2F-GP PR4225 1 2 PW R_VCORE_R_REF1 22 2010/06/23 Follow the standard schematics
44K2R2D-GP PR4226 1 PW R_VCORE_R_REF2 R_REF1
2 26 R_REF2 ALERT# 7 VR_SVID_ALERT# 8
44K2R2D-GP PR4229
PR4233
1 2 PW R_VCORE_R_SEL0 2 17
23K7R2F-GP PR4231 PW R_VCORE_R_SEL1 R_SEL0 NC#17
1 2 1 R_SEL1 NC#20 20 1 2PW R_VCORE_TEMP_SENSE1_R 1 2H_PROCHOT#
39K2R2F-L-GP PR4232 1 2 PW R_VCORE_R_SEL2 48
39K2R2F-L-GP PR4234 PW R_VCORE_R_SEL3 R_SEL2 5K76R2F-2-GP PR4251 100KR2F-L1-GP
PC4218
PC4219
1 2 47
SCD047U25V2KX-GP
SCD047U25V2KX-GP
R_SEL3
1
32K4R2F-1-GP PR4235 1 2 PW R_VCORE_R_SEL4 46 49
27K4R2F-GP PR4236 PW R_VCORE_R_SEL5 R_SEL4 GND PR4239
1 2 45 11
43K2R2F-L-GP
R_SEL5 GND
1
39K2R2F-L-GP PR4237 PW R_VCORE_R_SEL6 NTC-220K-5-GP
PR4238
1 2 44 R_SEL6 GND 3
3K74R2F-GP PR4201
2
VT1316MAFQX-041-GP
GND_1316 NTCG104QH224HT
1 2
PG4203 74.01316.F33
B GAP-CLOSE-PW R B
GND_1316
GND_1316
1D05V_LAN
1D05V_LAN
PW R_VCORE_DB1 DB1_GFX
1
PW R_VCORE_DCMDRP1 PW R_VCORE_DCMDRP2
1
A PR4249 PC4228 A
1K54R2F-GP <Variant Name>
SC2200P50V2KX-2GP PR4250 PC4229
2
3K83R2F-GP SC2200P50V2KX-2GP
2
Wistron Corporation
2
Title
7K32R2F-GP 11K3R2F-2-GP
PC4208
PC4204
PC4205
PC4209
PC4206
PC4210
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1
1
1 2PW R_VCORE_IDES1_N_2 PC4203
PC4202 SC1KP50V2KX-1GP SC4700P50V2KX-1GP PC4207
2
SCD1U10V2KX-5GP
DY
2
5V_CHARGER
PW R_VCORE0_IDES_P_1
D D
1
PR4206
3K09R2F-1-GP PR4211
10R2J-2-GP 2010/07/06 Power request
2
PWR_VCORE_IDES0_P_1
G4
G5
G6
C6
C5
C4
E4
E5
E6
J4
J5
J6
PU4202
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
PR4213 PR4214
PW R_VCORE0_IDES_N A5 H1 PW R_VCORE_VX0
PW R_VCORE0_IDES_P IDES_N VX#H1
1 2 1 2 A4 IDES_P VX#H2 H2
VX#H3 H3
7K32R2F-GP H4
11K3R2F-2-GP
42 PW R_VCORE_DB0 A6 DB0
VX#H4
VX#H5 H5 2120mils or Copper Shape
42 PW R_VCORE_DB1 A1 DB1 VX#H6 H6
1 2 42 PW R_VCORE_DB2 B1 DB2 VX#D1 D1
PC4212 SC1KP50V2KX-1GP D2
VX#D2
42 PW R_VCORE_SPHASE_0 B6 D3
DY SPHASE VX#D3
D4
VX#D4
VX#D5 D5
A3 AVDD VX#D6 D6
B3 AGND VX#F6 F6
PU4202_AVDD
B4 AGND VX#F5 F5
B5 AGND VX#F4 F4
VX#F3 F3
VX#F2 F2
AGND
AGND
F1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VX#F1
C C
VT1317SFCX-001-GP
A2
B2
E3
E2
E1
C1
C2
C3
J3
J2
J1
G3
G2
G1
1
PC4215
SCD1U25V3KX-GP VCC_CORE
2
PG4201
PR4230 PR4227 1 2
1 2 1 2
GAP-CLOSE-PW R
4
7K32R2F-GP 11K3R2F-2-GP
1 GND_1317S_1 PL4201
PC4217 IND-200NH-2-GP
PW R_VCORE_IDES1_N 1 2PW R_VCORE_IDES1_N_1 SC4700P50V2KX-1GP
42 PW R_VCORE_IDES1_N 5V_CHARGER
PC4216 SC1KP50V2KX-1GP
400mils or Copper Shape
2
PW R_VCORE_IDES1_P
42 PW R_VCORE_IDES1_P DY
3
SB
PC4220
PC4221
PC4222
PC4223
PC4224
PC4225
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1
1
PW R_VCORE1_IDES_P_1
PC4226
SCD1U10V2KX-5GP
2
1
B PR4241 B
3K09R2F-1-GP
2
G4
G5
G6
C6
C5
C4
E4
E5
E6
J4
J5
J6
PU4203 53A=2120mils or Copper Shape
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
PR4247 PR4248
PW R_VCORE1_IDES_N A5 H1 PW R_VCORE_VX1
PW R_VCORE1_IDES_P IDES_N VX#H1
1 2 1 2 A4 IDES_P VX#H2 H2
7K32R2F-GP 11K3R2F-2-GP H3
VX#H3
VX#H4 H4
42 PW R_VCORE_DB0 A6 DB0 VX#H5 H5
42 PW R_VCORE_DB1 A1 DB1 VX#H6 H6
1 2 42 PW R_VCORE_DB2 B1 DB2 VX#D1 D1
PC4227 SC1KP50V2KX-1GP D2
VX#D2
B6 D3
42 PW R_VCORE_SPHASE_1 DY SPHASE VX#D3
D4
5V_CHARGER VX#D4
VX#D5 D5
A3 AVDD VX#D6 D6
B3 AGND VX#F6 F6
B4 AGND VX#F5 F5
1
B5 AGND VX#F4 F4
PR4242 F3
10R2J-2-GP VX#F3
A VX#F2 F2 <Variant Name> A
AGND
AGND
F1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VX#F1
2
PU4203_AVDD PC4230
SCD1U25V3KX-GP Wistron Corporation
A2
B2
E3
E2
E1
C1
C2
C3
J3
J2
J1
G3
G2
G1
Title
1 2
PG4202 VT1316+1317_CPU_CORE(2/3)
GAP-CLOSE-PW R Size Document Number Rev
GND_1317S_2 A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 43 of 108
5 4 3 2 1
5 4 3 2 1
D D
PR4402 PR4403
42 IDES_N_GFX 1 2 1 2
3K16R2F-GP 11K5R2F-GP
PC4414
320mils or Copper Shape
1
5V_CHARGER VCC_GFXCORE
PC4413 1 2 IDES_N_GFX_1 SC4700P50V2KX-1GP
2
SC2700P50V2KX-1-GP
PC4415
PC4416
PC4417
PC4418
PC4419
PC4420
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
5V_CHARGER
1
PW R_GFX_IDES_P_1 PC4421
SCD1U10V2KX-5GP
2
1
1
PR4404
3K09R2F-1-GP PR4401
C 10R2J-2-GP C
0 . 1 2 U H ~ 0 . 1 5 U H
PC4422 1 2 IDES_P_GFX_1
2
G4
G5
G6
C6
C5
C4
SC2700P50V2KX-1-GP
E4
E5
E6
J4
J5
J6
PU4401
PL4401 2120mils or Copper Shape
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
PR4406 PR4405
PW R_AXG_IDES_N A5 H1 PW R_AXG_VX 1 2
PW R_AXG_IDES_P A4 IDES_N VX#H1 IND-D1UH-26-GP
42 IDES_P_GFX 1 2 1 2 IDES_P VX#H2 H2
PC4423
PC4401
PC4424
PC4426
H3 0412 -1M Del PC4425
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
3K16R2F-GP VX#H3
H4
11K5R2F-GP VX#H4 for layout
1
42 DB0_GFX A6 DB0 VX#H5 H5
42 DB1_GFX A1 DB1 VX#H6 H6
42 DB2_GFX B1 D1
2
DB2 VX#D1
VX#D2 D2
42 SPHASE_GFX B6 SPHASE VX#D3 D3
VX#D4 D4
VX#D5 D5
A3 AVDD VX#D6 D6
B3 AGND VX#F6 F6
B4 AGND VX#F5 F5
B5 AGND VX#F4 F4
F3
1PWR_AXG_AVDD
VX#F3
F2
VX#F2 2120mils or Copper Shape
AGND
AGND
F1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VX#F1
VT1317SFCX-001-GP
A2
B2
E3
E2
E1
C1
C2
C3
J3
J2
J1
G3
G2
G1
PC4402
PC4403
PC4404
PC4405
PC4406
PC4407
PC4408
PC4409
PC4410
PC4411
PC4412
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1
1
B B
PC4427
SCD1U25V3KX-GP DY
2
2
1 2
PG4401
GAP-CLOSE-PW R
GND_1317S_3
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VT1316+1317_CPU_CORE(3/3)
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 44 of 108
5 4 3 2 1
5 4 3 2 1
DCBATOUT PWR_DCBATOUT_1D05V
PG4501
1 2 1122 delete gap
GAP-CLOSE-PWR
PG4502
1 2
GAP-CLOSE-PWR
PG4503
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PWR_DCBATOUT_1D05V
PC4504 PC4506
1
3D3V_S5 1 PR4516 2
10KR2J-3-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
2
2
PWR_1D05V_PGOOD
Non_iAMT_SBA
1 2
37,48 1D05V_VTT_PWRGD PR4517
0R2J-2-GP
5
6
7
8
D
D
D
D
iAMT_SBA PU4502
1 2
36 1D05V_LAN_PWRGD PR4515 FDMC7696-GP
0R2J-2-GP
G
4 Iomax=15A
S
S
S
1108 SC for Power Mag. 0.56uH 10*10*4 OCP>20A
3
2
1
PU4501 PC4503 DCR=1.6~1.8mohm
SCD1U25V3KX-GP Idc=25A, Isat=40A
C PR4504 1 11 PR4505 1D05V_LAN C
PWR_1D05V_IMAX PGOOD GND PWR_1D05V_BOOT 1
Non_iAMT_SBA 1 2 2 10 2 PWR_1D05V_BOOT_R 1 2
115KR2F-GP PWR_1D05V_EN CS BOOT PWR_1D05V_UGATE 0R3J-0-U-GP
36,37,46,47 RUNPWROK 1 2 3
EN UGATE
9 1125 SC for RF
PR4502 PWR_1D05V_VFB 4 8 PWR_1D05V_PHASE 1 2
0R2J-2-GP PWR_1D05V_CCM FB PHASE PL4501
5 7 5V_CHARGER
RF VCC PWR_1D05V_LGATE IND-D68UH-51-GP-U
6
1
1
PC4505 LGATE
SC1KP50V2KX-1GP
1
1 2 PR4503 PC4511 PC4508
19,27,36 PM_SLP_LAN#
1
SCD01U50V2KX-1GP
PR4514 470KR2F-GP RT8237AGQW-GP-U PR4506 PC4509
DY
2
SC18P50V2JN-1-GP
0R2J-2-GP 10R2F-L-GP
2
5
6
7
8
SCD1U25V3KX-GP
iAMT_SBA
2
2
D
D
D
D
PU4503 PT4502
2
VTT_SENSE_L
SE330U2VDM-L-GP
FDMC7672S-GP
2
1
G
S
S
S
PR4507
10K5R2F-GP
4
3
2
1
Vout=0.702*(1+R1/R2) -1. 4/11
2
1215 SC del for layout
PWR_1D05V_VFB
1
PR4508
20KR2F-L-GP
2
VSS_SENSE_L
1
PR4509
10R2F-L-GP
2
B B
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC to DC_1D05V(RT8237)
Size Document Number Rev
A2
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 45 of 108
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_1p5v0p75v
DCBATOUT PWR_DCBATOUT_1D5V
PG4601
1 2
GAP-CLOSE-PWR
PG4602 RT8207L for 1D5V
1 2
GAP-CLOSE-PWR
PG4603
D 1 2 D
GAP-CLOSE-PWR
PG4604
1 2
GAP-CLOSE-PWR
PG4605
1 2
GAP-CLOSE-PWR
PR4604
PWR_1D5V_VCC5 2 1 PWR_DCBATOUT_1D5V
5V_S5
5D1R2F-GP
1
PC4606
SC1U10V2KX-1GP PC4611 PC4614
1
2
1
1
PC4602
SC10U25V5KX-GP
SC10U25V5KX-GP
SC1KP50V2KX-1GP
2
PR4603
1 2 PWR_1D5V_EN 13KR2F-GP
2
19,27 PM_SLP_S4# PR4612 0R0402-PAD
PWR_1D5V_VDDP 1 PR4605 2 5V_S5
2
1
PC4612 0R0603-PAD
1
C DY SCD1U10V2KX-5GP C
5
6
7
8
C694
2
D
D
D
D
SC1U10V2KX-1GP PU4602
2
PWR_1D5V_CS
3D3V_S5 FDMC7696-GP
1
G
4
S
S
S
PR4602 16
14
15
10KR2F-2-GP PU4601 0103 SC change to 74.08207.D73
3
2
1
PC4609
CS
VDDP
VDD
PR4606
Close to pin23
2
PWR_1D5V_BOOT1 PWR_1D5V_PHASE_L
13
BOOT
22 2
0R3J-0-U-GP
1 2 Iomax=15A
36,37,45,47 RUNPWROK PGOOD
PR4616
PWR_1D5V_TON PWR_1D5V_UGATE
SCD1U25V3KX-GP OCP>20A
DCBATOUT 1 2 12 21
620KR2F-GP TON UGATE
PWR_1D5V_EN 11 1D5V_S3
S5
PWR_0D75V_EN 10 20 PWR_1D5V_PHASE 1 2
S3 PHASE
PG4606
1D5V_S3 1 2 PWR_1D5V_VTTIN 23 IND-D68UH-51-GP-U
VLDOIN
1
1
PG4607 SC10U6D3V5MX-3GP 7 PC4613
NC#7
SC1U16V3KX-5GP
1 2 PT4602
DY
2
SE330U2VDM-L-GP
2
2
GAP-CLOSE-PWR 1 18
VTTGND PGND
5
6
7
8
PG4608 17
NC#17
D
D
D
D
1D5V_S3 1 2 PWR_1D5V_VDDQ 4 PU4603
MODE PWR_1D5V_VDDQ
8 FDMC7672S-GP
VDDQ
GAP-CLOSE-PWR
24 9 PWR_1D5V_FB
Close to pin23 DDR_VREF_PWR VTT FB
1
PR4608
G
S
S
S
2 VTTSNS
VTTREF
4
3
2
1
DEM SC18P50V2JN-1-GP
R1
GND
GND
2
2
RT8207LZQW-GP
25
30KR2F-GP
2
1 PR4607 2 DDR_VREF_S3
0R0402-PAD
Vout=0.75*(1+R1/R2)
Iomax: 1.2A
PG4609
0D75V_S0 1 2 DDR_VREF_PWR
GAP-CLOSE-PWR
PG4610 37 0D75V_EN 1 PR4615 2 PWR_0D75V_EN
0R0402-PAD
1 2
A A
GAP-CLOSE-PWR
DY
1
SC10U6D3V5MX-3GP
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
RT8207L_+1.5V_SUS
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 46 of 108
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_1p8v
PR4707
1
3D3V_PW R DY 2
10KR2F-2-GP
D D
36,37,45,46 RUNPW ROK
RT8015B for 1D8V_S0
3D3V_S5 PU4701
APW 7153BQBI-TRG-GP
PG4701
1D8V_PW R
PL4701
1 2 PW R_1D8V_PVDD 6 5 1D8V_S0
PVDD PGND PG4703
GAP-CLOSE-PW R 7 4 PW R_1D8V_PHASE 1 2 1 2
PG4702 VDD LX#4
1 2 8 3 GAP-CLOSE-PW R
POK LX#3 COIL-1UH-34-GP-U PG4704
1
1
GAP-CLOSE-PW R PW R_1D8V_FB 9 2 PR4705 PC4705 1 2
FB GND
SC100P50V2JN-3GP
20KR2F-L-GP
2
1
1
PWR_1D8V_SHDNRT
PC4701 PC4702 PR4701 PW R_1D8V_COMP 10 1 PC4706 PC4707 GAP-CLOSE-PW R
GND
COMP SHDN/RT PG4705
DY 1MR2F-GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1 2
SC10U10V5ZY-1GP
2
2
PC4704
11
1
1
PW R_1D8V_FB GAP-CLOSE-PW R
PG4706
PW R_1D8V_SHDNRT_L PC4703
DY 1 2
SC100P50V2JN-3GP
2
2
SC100P50V2JN-3GP
1
GAP-CLOSE-PW R
PR4706
D
1
16KR2F-GP
PQ4701 PR4703 PR4704
20KR2F-L-GP 820KR2F-GP
2N7002K-2-GP Vo=0.8*(1+(R1/R2))
2
C C
2nd = 84.07002.I31
2
84.2N702.J31
G
19,27,29,36,37,75,82 PM_SLP_S3#
1
PR4702
DY 1MR2F-GP
2
B B
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC CONVERTER_1D8V(RT8015A)
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 47 of 108
5 4 3 2 1
5 4 3 2 1
D D
3D3V_S5
5V_S5
2
PR4809
100KR2J-1-GP
1
1
PC4814
1
SC1U10V2KX-1GP
PR4806 1 PR4808 2 ALL_PW R_OK 37,42
2
1R2F-GP 0R0402-PAD
PR4812
1 DY2
1KR2F-3-GP
2
PW R_VCCSA_VID1 1 PR4804 2 VCCSA_VID1 9
PWR_VCCSA_PGOOD
PC4816 0R0402-PAD
SC2D2U10V3KX-1GP
PW R_VCCSA_VID0 1 PR4805 2 VCCSA_VID0 9
0R0402-PAD
2
PW R_VCCSA_EN 1 PR4801 2
0R0402-PAD 1D05V_VTT_PW RGD 37,45
1
PWR_VCCSA_V5DRV
DY
2
PC4804
SC1U6D3V2KX-GP
18
17
16
15
14
13
C U4801 C
VID1
VID0
PGOOD
EN
V5DRV
V5FILT
TPS51461RGER-GP PR4807 PC4805 Design Current =6 A
0R3J-0-U-GP SCD1U25V3KX-GP
19
6.6A<OCP< 7.8A
5V_S5 PGND PW R_VCCSA_BST 1 PW R_VCCSA_BST_R
PG4801 20 PGND BST 12 2 1 2
21 PGND SW#11 11
1 2 PW R_VCCSA_VIN 22 10
VIN SW#10 0D85V_PW R 0D85V_S0
23 VIN SW#9 9 PL4801 PG4804
GAP-CLOSE-PW R 24 8
PG4802 VIN SW#8
1
PC4808
PC4809
1 2
COMP
MODE
SLEW
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
VOUT
SCD1U25V3KX-GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
VREF
IND-D47UH-22-GP GAP-CLOSE-PW R
GND PG4803
2
GAP-CLOSE-PW R
1
74.51461.043 PC4811 PC4810 PC4807 PC4801 PC4812 1 2
68.R4710.10M
DY DY
DY
1
2
3
4
5
6
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U25V3KX-GP
GAP-CLOSE-PW R
PR4811 PG4806
2
PW R_VCCSA_VOUT
PWR_VCCSA_VREF
PWR_VCCSA_COMP
1 2 0D85V_S0 1 2
PW R_VCCSA_SLEW 100R2F-L1-GP-U
GAP-CLOSE-PW R
PG4805
1 PR4813 2 VCCSA_SENSE 9
0R0402-PAD 1 2
1 2
1
PR4802 GAP-CLOSE-PW R
B PG4807 B
4K99R2F-L-GP
1 2
2
GAP-CLOSE-PW R
PWR_VCCSA_COMP_1
L L 0.9V
L H 0.8V
H L 0.725V
1
PC4817
H H 0.675V SC3300P50V3KX-1GP
2
2
PC4802
SCD22U10V2KX-1GP
1
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC CONVERTER_VCCSA(TPS51461 )
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 48 of 108
5 4 3 2 1
INVERTER POWER
SSID = VIDEO 1122 SC del EDP&LVDS colay
F4901 DCBATOUT
POLYSW -1D1A24V-GP-U
DCBATOUT_LCD
69.50007.A31
2nd = 69.50007.A41
2 1
2
SC4D7U25V5KX-GP
SC1KP50V2KX-1GP
SCD1U50V3KX-GP
C4906 C4904 C4905
LVDS CONNECTOR
1
DCBATOUT_LCD
LCD1
41
NP1
1
2
3
4 1206 SC del for layout
5
6
7
8 DBC_EN_C 103
9 BLON_OUT_C
10 LCD_BRIGHTNESS 2 33R2J-2-GP
1 LBKLT_CTL 94
11 3D3V_CAMERA_S0R4902
12 USB_PN12 18
13 USB_PP12 18
14 For Camera GND
15 LVDSA_CLK_R 94
16 LVDSA_CLK_R# 94
17
18 LVDSA_DATA2_R 94
19 LVDSA_DATA2_R# 94
20
21 LVDSA_DATA1_R 94
22 LVDSA_DATA1_R# 94
23
24 LVDSA_DATA0_R 94 Camera Power
25 LVDSA_DATA0_R# 94
26 F4902
27 DP_DATA1_R 103 FUSE-1D1A6V-4GP-U 1121 SC
3D3V_S0 3D3V_CAMERA_S0
28 DP_DATA1_R# 103 69.50007.691
29 2ND = 69.50007.771
30 DP_AUX 103 1 2
31 DP_AUX# 103
32
1
33 DP_DATA0_R 103
34 DP_DATA0_R# 103 C4903
3D3V_S0 3D3V_S0
SC10U6D3V5MX-3GP
35 EDP#_LVDS_R
2
36 LVDS_DDC_DATA 94
37 LVDS_DDC_CLK 94
38 3D3V_S0
39 LCDVDD
40
1
NP2
1
42 R4919 R4933
C4901 C4902 10KR2J-L-GP 10KR2J-L-GP
PS-CON40-GP SCD1U10V2KX-L1-GP SC1U6D3V2KX-L-1-GP 3D3V_S0 0131 SD
2
2
1 2 DY LVDSA_DATA2#_DP_AUX# EDP#_LVDS_D
1 2 EDP#_LVDS 22
1 2 DY LVDSA_DATA2_DP_AUX R4929
R4916 100KR2J-1-GP Q4904 0R0402-PAD
MMBT3904-4-GP
C
84.T3904.C11
100KR2J-1-GP EDP#_LVDS_R 1 2EDP#_LVDS_B B 2ND = 84.03904.L06
R4917 1 2 DY LVDSA_DATA2#_DP_AUX# R4923
R4918 1 2 DY LVDSA_DATA2_DP_AUX 150KR2J-L1-GP
E
100KR2J-1-GP
SSID = VIDEO
LCD POWER for ANNIE R4904
10KR2J-3-GP
2 1
LCDVDD DY 3D3V_S0
3D3V_S0
2
3
GND
4 R4906DY
VOUT VIN#4
DY 10KR2J-3-GP
1
1
SC4D7U6D3V3KX-GP
C4907
1
2
SCD1U16V2KX-3GP
SC4D7U6D3V3KX-GP
DY 74.09724.09F
2
2
2
<Variant Name>
27 BLON_OUT 1 2 BLON_OUT_C
R4903
1KR2J-1-GP
Wistron Corporation
2
SC100P50V2JN-3GP
Title
LCD Connector
1
9 4
A
VCC_CRT NC#4
NC#11 11 83.R5003.J8F
1 D5001
CRT_DDCDATA_CON 12 2nd = 83.R5003.H8H CH551H-30GP-GP
DDCDATA_ID1
SCD01U16V2KX-3GP
D C5012 CRT_DDCCLK_CON 15 D
DDCCLK_ID3 CRT_IN#_R F5001
5
2
K
CRT_R GND 5V_CRT_S0_R
1 CRT_RED GND 6 2 1
CRT_G 2 7
CRT_B CRT_GREEN GND FUSE-1D1A6V-4GP-U
3 CRT_BLUE GND 8
5
6
7
8
GND 10 2nd = 69.50007.771 3D3V_S0
95 CRT_VSYNC_CON_MB 14 VSYNC GND 16 69.50007.691
95 CRT_HSYNC_CON_MB 13 HSYNC GND 17
RN5003
SRN10KJ-6-GP
D-SUB-15-113-GP-U
4
3
2
1
4 3 CRT_DDCDATA_CON
95 DDCDATA_MB
20.20492.015 CRT_IN#_R
5 2
5V_S0
6 1
R5001 2
470R2J-2-GP D5002
95 DDCCLK_MB
AFTP5001 1 2 1 CRT_IN#_R 3 DY BAV99PT-GP-U
C 83.00099.K11 CRT_DDCCLK_CON C
1 Q5001
1
2N7002KDW-GP
SC100P50V2JN-3GP
C5007 84.2N702.A3F
2nd = 84.2N702.F3F
2
L5001
95 CRT_RED_R_MB 1 2 CRT_R CRT_DDCDATA_CON
FCB1608CF-GP
1
C5008 CRT_HSYNC_CON_MB
SC100P50V2JN-3GP
SC18P50V2JN-1-GP
B L5002 B
1
95 CRT_GREEN_R_MB 1 2 CRT_G C5009 CRT_VSYNC_CON_MB
SC18P50V2JN-1-GP
FCB1608CF-GP
1
CRT_DDCCLK_CON
C5010
DY DY
2
L5003
1
95 CRT_BLUE_R_MB 1 2 CRT_B
2
FCB1608CF-GP C5011
DY SC100P50V2JN-3GP
DY
2
4
3
2
1
1
C5001 C5002 C5003
RN5001 C5004 C5005 C5006
DY DY DY
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SRN150F-1-GP
2
2
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
5
6
7
8
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CRT Connector
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 50 of 108
5 4 3 2 1
5 4 3 2 1
3D3V_S0
1 TMDS_TX2+_MB
1
VBIAS_PS8122
2 TMDS_TX3+ TMDS_TX1+_MB R5126 3D3V_S0
3 TMDS_TX2-_MB TMDS_TX3- TMDS_TX1-_MB 4K7R2J-2-GP
4 TMDS_TX1+_MB I2C_8122
5
2
6 TMDS_TX1-_MB I2C_ADDR
1
TMDS_TX0+_MB
36
35
34
33
32
31
30
29
28
27
26
25
7 PinMode_8122
1
8 U5101
9 TMDS_TX0-_MB 5V_HDMI_S0 5V_S0 R5123 R5136
IN1P
VBIAS
OUT2D1P
OUT2D2P
OUT2D3P
IN1N
CEXT
OUT2D1N
GND
OUT2D2N
VCC
OUT2D3N
10 TMDS_TXC+_MB 0R2J-2-GP 10KR2J-3-GP
11 R5154
PinMode_8122
2
12 TMDS_TXC-_MB TP5101 1 2 2 1 TMDS_SCL_A_8122
2
13 HDMI_CEC 1 TPAD14-OP-GP 0R2J-2-GP
14 F5101 TMDS_TX0+ 37 24 TMDS_TX2+_MB PinMode_8122
TMDS_SCL FUSE-1D1A6V-4GP-U SB TMDS_TX0- IN2P OUT2D4P TMDS_TX2-_MB
D 15 0926 38
IN2N OUT2D4N
23 D
16 TMDS_SDA 69.50007.691 C5106 39 22
3D3V_S0 VCC GND
17 2nd = 69.50007.771 TMDS_TX1+ 40 21 TMDS_SCL 4 3
IN3P SCL2_AUX2P 3D3V_S0 R5133
18 1 2 TMDS_TX1- 41 20 TMDS_SDA R5137
HDMI_IN_C IN3N SDA2_AUX2N HDMI_IN HDMI_IN
19 1 2 HDMI_IN 27 42 19 1 2HDMI_IN_R 5 2 HDMI_DVI_IN_R
2 1 HDMI_DVI_IN
R5120 1KR2J-1-GP TMDS_TX2+ GND HPD2 I2C_ADDR
20 43 18
1
SC1U10V3ZY-6GP TMDS_TX2- IN4P MODE/I2C_ADDR 0R2J-2-GP
22 44 17 TMDS_TXC+_DOCK 104 6 1
TMDS_SCL_C TMDS_SCL_B IN4N OUT1D1P R5127 0R2J-2-GP
1 4 45
SCL_SRC OUT1D1N
16 TMDS_TXC-_DOCK 104 PinMode_8122
SKT-HDMI23-8-GP TMDS_SDA_C 2 3 TMDS_SDA_B 46 15 4K7R2J-2-GP PinMode_8122
3D3V_S0
1
2
R5101 SRN0J-6-GP REXT OUT1D2N I2C_CTL 2N7002KDW-GP
OE#/SCL_CTL
49
SDA1_AUX1N
SW/SDA_CTL
SCL1_AUX1P
1
GND
I2C_CTL_EN
100KR2J-1-GP RN5107 R5122 84.2N702.A3F
2nd = 22.10296.351
1
OUT1D4N
OUT1D3N
OUT1D4P
OUT1D3P
499R2F-2-GP 2nd = 84.2N702.F3F
2
R5128
HPD1
3rd = 22.10296.341 PinMode_8122
GND
1KR2J-1-GP
VCC
PinMode_8122
2
1
2
3
4
5
6
7
8
9
10
11
12
PS8122QFAN48G-GP
I2C_CTL
TMDS_SDA_A_8122
TMDS_TX1+_DOCK 104
TMDS_SCL_A_8122
TMDS_TX1-_DOCK 104
SCD22U10V2KX-1GP
1 2 C5102 SCD1U10V2KX-5GP TMDS_TX2+ I2C_CTL_EN LOW or NC LOW or NC HIGH HIGH
UMA
1
17 DDBP_DATA2 TMDS_TX3-
1 2 C5104 SCD1U10V2KX-5GP
17 DDBP_DATA3#
1
UMA
2 C5109 SCD1U10V2KX-5GP TMDS_TX3+ MODE /
17 DDBP_DATA3 UMA LOW HIGH LOW HIGH
UMA I2C_ADDR
2
UMA I2C I2C
PinMode PinMode addresses addresses
TMDS_TX3-
HDMI/DVI DP 9E/9F BE/BF
1 2 C5124 SCD1U10V2KX-5GP SB 0909
84 GPU_DDCP_DATA3# TMDS_TX3+
C 1 2 C5123 SCD1U10V2KX-5GP C
84 GPU_DDCP_DATA3 TMDS_TX2-
1 2 C5121 SCD1U10V2KX-5GP
DIS_PX_Muxless
84 GPU_DDCP_DATA2# TMDS_TX2+
1 2 C5122 SCD1U10V2KX-5GP PinMode_8122
84 GPU_DDCP_DATA2
1
DIS_PX_Muxless
2 C5118 SCD1U10V2KX-5GP TMDS_TX1- 1 2 TMDS_SDA_A_8122
84 GPU_DDCP_DATA1#
1
DIS_PX_Muxless
2 C5117 SCD1U10V2KX-5GP TMDS_TX1+
27,29,95,104,106 BD_IN#
R5129 0R2J-2-GP
84 GPU_DDCP_DATA1
1
DIS_PX_Muxless
2 C5119 SCD1U10V2KX-5GP TMDS_TX0-
84 GPU_DDCP_DATA0#
1
DIS_PX_Muxless
2 C5120 SCD1U10V2KX-5GP TMDS_TX0+
84 GPU_DDCP_DATA0 DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
H L 1108 SC 3D3V_S0
3D3V_S0
SW 3D3V_S0
1115 SC
0907 SB
OUT2 OUT1
4
3
0308 -1
RN5113
SRN4K7J-8-GP
2
I2C_8122
R5139 3D3V_S0 2 R5150 1 TMDS_SDA_A_8122
0R0402-PAD 2nd = 84.2N702.F3F 0R2J-2-GP
1
2
1213 SC 84.2N702.A3F
1
1
2N7002KDW-GP
Q5102 R5106
MMBT3904-3-GP 0R2J-2-GP 6 1 TMDS_SDA_A
C
0308 -1 VBIAS_PS8122
4 3
E
R5141 1KR2J-1-GP
2 1 R5104 Q5101
0R2J-2-GP R5135 PCH_DP1_HPD 17
0R0402-PAD 27,39,79,86 SML1_CLK_C
UMA TMDS_SCL_A
2 1 TMDS_SCL_A 28
1
1
B B
1212 SC
D5102
3D3V_VGA_S0 3D3V_S0 BAW56-5-GP
83.00056.Q11
2nd = 83.00056.K11
5V_S0
3D3V_VGA_S0 1
2
2
R5144 R5143 3
0R2J-2-GP 0R2J-2-GP
4
3
RN5104 PX UMA 2
SRN2K2J-1-GP
1
1
4
3
PX
RN5101
1
2
1
2
2 3 HDMI_CLK_1 4 3 TMDS_SCL_C
84 GPU_DDCP_SCL HDMI_DATA_1 TMDS_SDA_C
84 GPU_DDCP_SDA 1 4
5 2
TMDS_SCL
6 1 TMDS_SDA
17 PCH_HDMI_CLK 1 4
17 PCH_HDMI_DATA 2 3
UMA Q5106
RN5112 2N7002KDW-GP
SRN0J-6-GP 84.2N702.A3F
2nd = 84.2N702.F3F
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DP
3D3V_VGA_S0 3D3V_S0
2
D D
R5203 R5201
0R2J-2-GP 0R2J-2-GP
1
DY Dock
3D3V_S0_D
3
1 2 BD_DP_IN_C 1 84.03904.L06
27,104 BD_DP_IN
2nd = 84.03904.X11
2
R5205 1KR2J-1-GP
Q5201
Dock PMBS3904-1-GP DP_HPD_D
1
R5204
10KR2J-3-GP
2
C Dock C
Dock_UMA
17 PCH_DP_HPD 1 2
R5202 0R2J-2-GP
84 GPU_DP_HPD 1 2
R5206 0R2J-2-GP
Dock_PX
17 DDCP_AUX# Dock_UMA
1 2 C5209 SCD1U10V2KX-5GP DOCK_DP_AUX# 104
17 DDCP_AUX Dock_UMA
1 2 C5210 SCD1U10V2KX-5GP DOCK_DP_AUX 104
Dock_UMA
1 2 C5207 SCD1U10V2KX-5GP DOCK_DP_DATA0# 104
17 DDCP_DATA0# C5205 SCD1U10V2KX-5GP
B 17 DDCP_DATA0 Dock_UMA
1 2 DOCK_DP_DATA0 104 B
Dock_UMA
1 2 C5202 SCD1U10V2KX-5GP DOCK_DP_DATA1# 104
17 DDCP_DATA1# C5206 SCD1U10V2KX-5GP
17 DDCP_DATA1 Dock_UMA
1 2 DOCK_DP_DATA1 104
Dock_UMA
1 2 C5208 SCD1U10V2KX-5GP DOCK_DP_DATA2# 104
17 DDCP_DATA2# C5201 SCD1U10V2KX-5GP
17 DDCP_DATA2 Dock_UMA
1 2 DOCK_DP_DATA2 104
Dock_UMA
1 2 C5203 SCD1U10V2KX-5GP DOCK_DP_DATA3# 104
17 DDCP_DATA3# C5204 SCD1U10V2KX-5GP
17 DDCP_DATA3 Dock_UMA
1 2 DOCK_DP_DATA3 104
A HR PX A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Display Port
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 52 of 108
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
S-VIDEO
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 53 of 108
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 54 of 108
5 4 3 2 1
5 4 3 2 1
SSID = User.Interface
D
ITP Connector D
C C
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ITP
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 55 of 108
5 4 3 2 1
SSID = SATA SATA HDD Connector
HDD1
22 21
1 NP1
AFTP31 1 HDD_UNLOAD 2
3
4
5
6
5V_S0 7
SC10U10V5ZY-1GP
SCD1U10V2KX-5GP
8
1
C5605 C5606 9
10
11
2
12
13
14
SCD01U16V2KX-3GP2 1 C5604 SATA_RXP0_C 15
21 SATA_RXP0 SCD01U16V2KX-3GP2 1 C5603 SATA_RXN0_C 16
21 SATA_RXN0 17
SCD01U16V2KX-3GP2 1 C5602 SATA_TXN0_C 18
21 SATA_TXN0 SCD01U16V2KX-3GP2 1 C5601 SATA_TXP0_C 19
21 SATA_TXP0 20 NP2
24 23
FOX-CON20-1-GP-U
20.F1546.020
2nd = 20.F1473.020
1
22 SATA_ODD_PRSNT# P1
1
P2 TC5601
0R5J-5-GP 2 1 R5603 ODD_PW R_5V U5601 TC5602
ODD P3 ZPO
SC10U10V5ZY-1GP
5V_S0
2
R5602 1 2 SATA_ODD_DA#_C P4
Current limit
SC10U10V5ZY-1GP
18 SATA_ODD_DA#
2
0R2J-2-GP DY P5
P6
NP2
Active High
10 MIN =>2.01A
SKT-SATA7P-6P-62-GP
62.10065.361
2nd = 62.10065.981 ZPO
3D3V_S0
1
R5605
10KR2J-3-GP
3D3V_S0
RN5601
2
1 4 SATA_ODD_PW RGT
SATA_ODD_DA# SATA_ODD_DA#_C
ODD_PWRGT#
2 3
SRN10KJ-5-GP
ZPO
<Variant Name>
6
Q5601
2N7002KDW -GP
ZPO Wistron Corporation
84.2N702.A3F
2nd = 84.2N702.F3F 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1
Title
HDD/ODD
SATA_ODD_PW RGT SATA_ODD_DA# Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 56 of 108
5 4 3 2 1
D D
reserved
C C
B B
<Variant Name>
Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.
Title
E-SATA/USB CHARGER
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 57 of 108
5 4 3 2 1
5 4 3 2 1
SSID = AUDIO
Speaker
Connector
SPK1
5
D D
1
29 AUD_SPK_L-
2
29 AUD_SPK_L+
29 AUD_SPK_R- 3
4
29 AUD_SPK_R+
6
LINE OUT
ACES-CON4-17-GP-U1 LOUT1
1
L5803 1 2 HP_L_C 2
20.F1621.004 29 MB_HP_L SBK160808T-601Y-N-GP 6
L5802 1 2 HP_R_C 3
29 MB_HP_R
Metal
2nd = 20.F1937.004 SBK160808T-601Y-N-GP 4
29 AUD_HP1_JD# 5
NP1
NP2
1
GAP-CLOSE AUDIO-JK272-GP
2 1 EC5812
104 DOCK_LINEOUT_JD# MLVS0402M04-GP-U
G5802 22.10088.K41
1 TP5813 TPAD14-OP-GP
2
AUD_AGND
C
MIC IN C
MICIN1
1
L5804 1 2 MIC_IN_L_C 2
29 MB_MICIN_L SBK160808T-601Y-N-GP 6
L5805 1 2 MIC_IN_R_C 3
29 MB_MICIN_R
Metal
SBK160808T-601Y-N-GP 4
5
29 EXT_MIC_JD#
NP1
NP2
1
GAP-CLOSE AUDIO-JK272-GP
2 1 EC5811
104 DOCK_MIC_JD# MLVS0402M04-GP-U EC5815
G5801 22.10088.K41 2 1
1 TP5812 TPAD14-OP-GP
SCD1U10V2KX-5GP
2
R5810 2 DY 1
EC5816 0R2J-2-GP
2 1
AUD_AGND
SCD1U10V2KX-5GP
R5811 2 DY 1
EC5817 DY 0R2J-2-GP
2 1
SCD1U10V2KX-5GP R5812 2 DY 1
Internal EC5818 DY
2 1
EC5813
0R2J-2-GP
SCD1U10V2KX-5GP 2 1 SCD1U10V2KX-5GP
B
Microphone EC5814 2 1 SCD1U10V2KX-5GP
B
AUD_AGND
DMIC1 AUD_AGND
5
0308 -1 for EMI
3D3V_S0 1 1128 SC
2
29 DMIC_12
3
29 DMIC_CLK AUD_SPK_L- AUD_SPK_L+ AUD_SPK_R- AUD_SPK_R+ MB_MICIN_L MB_MICIN_R DMIC_12 DMIC_CLK MB_HP_L MB_HP_R
4
6
1
1
EC5801 EC5802 EC5803 EC5804
SC680P50V2KX-2GP
SC680P50V2KX-2GP
SC680P50V2KX-2GP
SC680P50V2KX-2GP
SC22P50V2JN-4GP
TVL-0402-01-CB1-GP
TVL-0402-01-CB1-GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
2
2
20.F1621.004
2
2nd = 20.F1937.004
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Audio Jack
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 58 of 108
5 4 3 2 1
5 4 3 2 1
SB 0922
110M/100M/1G_LED#_SYS
LAN_ACT_LED#_SYS
RJ45
CONN_PWR2
CONN_PWR
10
B2
SSID = LOM 106 10M/100M/1G_LED#_SYS
GREEN
CONN_PWR B1
RJ45_1 1
RJ45_2 2
RJ45_3 3
DY DY DY DY RJ45_4 4
1
EC5901 EC5902 EC5903 EC5904 RJ45_5 5
RJ45_6 6
RJ45_7 7
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
2
2
RJ45_8 8
D D
106 LAN_ACT_LED#_SYS A2
ORANGE
CONN_PWR2 A1
9
RJ45-8P-65-GP
22.10177.J21
2nd = 22.10177.J51
XF5901
XRF_TDC1 1 24 MCT1
1
C5902 6 19 RJ45_6 5
106 MDI1-_SYS 5V_S5
U5901
SCD1U10V2KX-5GP
5V_S5 5
2
1CT:1CT RJ45_4
106 MDI2+_SYS 8 17
XRF_TDC3 7 18 MCT3
2
9 16 RJ45_5
106 MDI2-_SYS
2 TVLST2304AD0-GP
6
1
6
SCD1U10V2KX-5GP
C C
106 MDI0+_SYS
106 MDI0-_SYS 12 13 RJ45_2
1
106 MDI0-_SYS
XFORM-24P-19-GP
2
106 MDI1-_SYS
68.IH601.301
U5902
U5903 5
2nd = 68.89240.30D 5V_S5
5V_S5 5
2
2
TVLST2304AD0-GP
6
TVLST2304AD0-GP
6
2nd = 83.09904.AAE
2nd = 83.09904.AAE
106 MDI2+_SYS
106 MDI3+_SYS
106 MDI2-_SYS
106 MDI3-_SYS
MCT3
MCT4
MCT1
MCT2
MCT1
MCT2
MCT3
MCT4
1
1
75R3J-L-GP
75R3J-L-GP
75R3J-L-GP
75R3J-L-GP
1
GDT1 GDT2 GDT3 GDT4
B88069X9231T203-GP
B88069X9231T203-GP
B88069X9231T203-GP
B88069X9231T203-GP
MCT_R
1
2
C5905
SC1KP2KV6KX-GP
2
DY DY DY DY
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LAN CONNECTOR
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 59 of 108
5 4 3 2 1
5 4 3 2 1
SPI FLASH ROM (8M byte) for PCH SPI ROM Equal length need to less than 500mil
SPI ROM Equal length need to less than 500mil
SSID = Flash.ROM
1212 SC
3D3V_S5 1216 SC
3D3V_S5
1
1
R6011
R6016
4K7R2J-2-GP R6017
1
64MB:72.25640.D01,72.25Q64.B01
C6002 C6003
D
SYSTEM D
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
32MB:72.25Q32.A01, 72.25320.C01
4K7R2J-2-GP
4K7R2J-2-GP
2
2
SPI ROM
SPI_HOLD_0#
3D3V_S5
21 SPI_CS0#_R 1 8
SPI_SO_0 CE# VDD
21 SPI_SO_R 1 2 2 7
R6001 SPI_WP#_0 SO HOLD# SPI_CLK_R_0
3 6 1 2 SPI_CLK_R 21
33R2J-2-GP WP# SCK SPI_SI_R_0
4
VSS SI
5 1 R6012 2 SPI_SI_R 21
R6013
33R2J-2-GP
U6001 33R2J-2-GP
SST25VF032B-80-4I-S2AF-GP
72.25032.D01
1
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
R6008
R6009
R6010
3D3V_S5
2
2
1230 SC
DUAL ROM DUAL ROM 1 8
DUAL ROM
21 SPI_CS1#_R CE# VDD
21 SPI_SO_R 1 2 SPI_SO_1 2 7 SPI_HOLD_1#
R6007 SPI_WP#_1 SO HOLD# SPI_CLK_R_1 1 SPI_CLK_R_C
3 WP# SCK 6 2 1 4 SPI_CLK_R 21
33R2J-2-GP 4 5 SPI_SI_R_1 1 2 SPI_SI_R_C 2 3 SPI_SI_R 21
VSS SI R6014
C DUAL ROM R6015 RN6001 SRN0J-6-GP C
U6003 33R2J-2-GP
SST25VF032B-80-4I-S2AF-GP 33R2J-2-GP DUAL ROM
72.25032.D01 DUAL ROM
DUAL ROM
DUAL ROM
3D3V_AUX_S5
SSID = RBATT
2
D6001 83.00016.K11
BAS16-6-GP 2nd = 83.00016.M11
DY
3
+RTC_PWR_R
2
R6002 20.F1639.002
RTC_AUX_S5
DY 1KR2J-1-GP 2nd = 20.F1804.002
2
1
3 RTC1
3
B 1 RTC_PWR 1 2 +RTC_PWR 1 B
R6006
510R2J-1-GP 2
Q6001 4
CH715FGP-GP-U
ACES-CON2-20-GP
Width=20mils
83.R0304.D81
2nd = 83.R2004.G81
3D3V_AUX_S5
EC BIOS Flash ROM
256KB
SPICLK_1 SPI_DO SPIDI
3D3V_AUX_S5
1
1
2
2
1
DY 10KR2J-3-GP
10KR2J-3-GP
ER6004
A A
for ENE FAE suggest,SPICS# is push-pull pin, 0R0603-PAD DY DY DY
1
SCD22U16V3KX-2-GP
27 SPICS# 1 8 SPI_3D3V_VCC 1 2
CE# VCC HR PX
150R2F-1-GP1 ER6001
2ER6001 SPI_DI 2 7 SPI_HOLD#
27 SPIDI SO HOLD#
27 SPI_WP2# SPI_WP2# 3 6 SPICLK_1 150R2F-1-GP1 2 ER6003 SPICLK 27
WP# SCK SPI_DO 150R2F-1-GP1 ER6002
4 5 2ER6002
GND SIO SPIDO 27
Wistron Corporation
2
Flash/RTC
1
SSID = USB
D D
C C
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
USB Power SW
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 61 of 108
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SSID = User.Interface
Bluetooth Module conn.
D D
reserved 1216 C
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Bluetooth
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 63 of 108
5 4 3 2 1
5 4 3 2 1
D D
Finger printer
C C
F/P
1 8
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
RESERVED
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 64 of 108
5 4 3 2 1
5 4 3 2 1
1
D 5 6 D
C6502 C6503 C6504 20 PCIE_CLK_W LAN_REQ# 7 8
9 10
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
2
2
DY 20 CLK_PCIE_W LAN# 11 12
20 CLK_PCIE_W LAN 13 14
15 16
27 E51_RXD 17 18
27 E51_TXD 19 20 MINI_EN
21 22 PLT_RST# 5,18,27,31,32,36,66,71,75,82,83,97,105
20 PCIE_RXN4 23 24
20 PCIE_RXP4 25 26 0112 SD
27 28
1D5V_S0 29 30
20 PCIE_TXN4 31 32 DEBUG_DET#
20 PCIE_TXP4 33 34
35 36 USB_PN11 18
1
37 38 USB_PP11 18
C6505 C6506 C6507 3D3V_MINI1_S0 39 40
41 42
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
2
DY 43 44 W LAN_LED# 1 TP6501
20 CL_CLK 0R2J-2-GP 1 R6504 2 CL_CLK_R 45 46
2
20 CL_DATA 0R2J-2-GP 1 R6505 2 CL_DATA_R 47 48 TPAD14-OP-GP
0R2J-2-GP 1 R6506 2 CL_RST#_R 49 50 R6512
20 CL_RST#
1 2 +5V_MINI_DEBUG 51 52
DY 10KR2J-3-GP
5V_S5 iAMT
DY NP2
R6503 0R3J-0-U-GP 54
iAMT
1
3D3V_S0
C 0412 -1M ADD EMI solution SKT-MINI52P-57-GP C
iAMT
VARISTOR-5D5V-19-GP
3D3V_MINI1_S0 3D3V_MINI1_S0
1
2nd = 84.2N702.F3F 2 1 2 1
84.2N702.A3F R6523 0R5J-5-GP R6525 0R5J-5-GP
2N7002KDW -GP
Q6501
1 6
0112 SD
2 5
27 W IRELESS_EN
2
3 4 5V_S5
R6528
0R2J-2-GP DMP2130L-7-GP
B B
iAMT 84.02130.031
Q6503 2ND = 84.03413.A31
1
MINI_EN
SBA_Non_iAMT S
3D3V_MINI1_S0 3D3V_MINI1_S0 +5V_MINI_DEBUG D
D
0112 SD
G
G
1
iAMT R6532
1
100KR2F-L1-GP
R6531 R6530
10KR2J-3-GP 10KR2J-3-GP
iAMT
2
DEBUG_DET#
2
2nd = 84.2N702.F3F
84.2N702.A3F
2N7002KDW -GP
Q6502
1 6 84.2N702.J31
2nd = 84.07002.I31
2 5
27 BLUETOOTH_EN
3 4 2N7002K-2-GP
2
SBA_Non_iAMT R6529 G
0R2J-2-GP iAMT
BLUETOOTH_EN_R D
A BLUETOOTH_EN_R <Variant Name> A
1
S +5V_MINI_DEBUG
Q6504
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
MINICARD(WLAN)/ITP CONN
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 65 of 108
5 4 3 2 1
5 4 3 2 1
1
D 2 3.3VAUX D
C6601 C6602 C6608 23 PCIE_RXN2_R
SCD1U16V2KX-3GP PERN0 PCIE_RXP2_R
SC2200P50V2KX-2GP
SCD1U16V2KX-3GP
28 25
2
2
+1.5V PERP0
DY 48 +1.5V
31 PCIE_TXN2_R
PETN0 PCIE_TXP2_R
3D3V_MINI2_S0 24 +3.3VAUX PETP0 33
39 +3.3VAUX
41 +3.3VAUX USB_D- 36 USB_PN8 18
52 +3.3VAUX USB_D+ 38 USB_PP8 18
3G
30 PCH_SMBCLK_MINI2 1 R6609 2
SMB_CLK PCH_SMBCLK 14,15,20,79
3 32 PCH_SMBDATA_MIN2 1 R6611 2 0R2J-2-GP
COEX1 SMB_DATA PCH_SMBDATA 14,15,20,79
5 0R2J-2-GP
COEX2
3G
UIM_PWR 8 1
UIM_DATA UIM_PWR WAKE#
10 UIM_DATA CLKREQ# 7 PCIE_CLK_WWAN_REQ# 20
1125 SC for RF UIM_CLK 12 20 MINI2_EN
UIM_RESET UIM_CLK W_DISABLE#
14 UIM_RESET PERST# 22 PLT_RST# 5,18,27,31,32,36,65,71,75,82,83,97,105
UIM_VPP 16
1D5V_S0 UIM_VPP
19 RESERVED#19/UIM_C4 GND 4
17 RESERVED#17/UIM_C8 GND 9
45 RESERVED#45 GND 15
1
51 26 mSATA
2
DY GND 27 mSATA
TP26 13G_LED# 3G_LED# 42 29 PCIE_RXN2_R SRN0J-6-GP 4 1
LED_WWAN# GND PCIE_RXN2 20
TPAD14-OP-GP 44 34 PCIE_RXP2_R 3 2
LED_WLAN# GND PCIE_RXP2 20
46 LED_WPAN# GND 35
1
FC6601 DY 37 RN6602
3G
R6606 GND PCIE_TXN2_R SRN0J-6-GP
53 40 4 1
DY 53 GND PCIE_TXN2 20
SCD1U25V3KX-GP
10KR2J-3-GP 54 43 PCIE_TXP2_R 3 2 PCIE_TXP2 20
2
54 GND
NP1 NP1 GND 50
NP2 3G
1
NP2 C6613
3D3V_S0 1 2SCD01U16V2KX-3GP SATA_TXN1 21
C6614 1 2SCD01U16V2KX-3GP SATA_TXP1 21
SKT-MINI52P-142-GP mSATA
mSATA
3G
3G
SIM1
UIM_PWR 1 NP1
VCC NP1
NP2 NP2
1
UIM_VPP 6
C6610 VPP
3G SC1U25V5KX-1GP RESERVED#4 4 USB_PP10 18
8 USB_PN10 18
2
UIM_RESET RESERVED#8
2 RST
UIM_CLK 3 3D3V_MINI2_S0
UIM_DATA CLK
7 I/O GND 5
TPAD14-OP-GP
TP6601
T P6601 1 CD 9 10
CD GND
GND 11
1
R6612 3G
CARD-PUSH-9P-3-GP-U 2nd = 84.2N702.F3F 10KR2J-3-GP
84.2N702.A3F <Variant Name>
2N7002KDW-GP
20.I0131.001
2
Q6601
A 2nd = 20.I0137.001 1 6
Wistron Corporation A
3 4
R6614 Title
DY 0R2J-2-GP 3G 3G
Size Document Number Rev
1
D D
reserved
C C
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
mSATA
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 67 of 108
5 4 3 2 1
5 4 3 2 1
STDBY_LED#_R 4 - + 2
1
LTC043ZUB-FS8-GP DC_BATFULL#_R 3 - + 1 5V_CHARGER
DY EC6801 DY EC6802 DY EC6803 DY EC6804
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
84.00043.011
2
2nd = 84.05143.011 CHARGE_LED#_R 4 - + 2
LED-BO-23-GP
Power STDBY_LED
Caps Lock LED 0202 SD
Q6802 CLED1
3 STDBY_LED#_Q Q6810
1 R1 3 CAP_LED# 1 R6808 2 CAP_LED#_R 2 1
27 STDBY_LED 5V_S0
2 1 R1 220R2F-GP
R2 27 CAP_LED
2 3
LTC043ZUB-FS8-GP R2
LTC043ZUB-FS8-GP
84.00043.011
front light
LED-B-161-GP
C 2nd = 84.05143.011 84.00043.011 C
2nd = 84.05143.011
Battery LED2(DC_BATFULL)
Q6805
SATA HDD LED
3 DC_BATFULL#_Q
1 R1
27 DC_BATFULL
R2
2 21 SATA_LED# Top light
LTC043ZUB-FS8-GP 0130 SD change PN
3D3V_S0 LTC043ZUB-FS8-GP
R2
84.00043.011 2 HLED1
2nd = 84.05143.011 1 R1
ZENER DIODI
Q6808
3 CHARGE_LED#_Q
1 R1
27 CHARGE_LED
2
R2
B B
LTC043ZUB-FS8-GP
84.00043.011
2nd = 84.05143.011
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SSID = KBC
SB 0919 change PN for Layout TOUCH PAD 1.0 pitch
D
Internal KeyBoard D
Connector
20.K0449.026
2nd = 20.K0615.026
KB1
PTWO-CON26-5-GP-U 3D3V_S0
27
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
28
2
1
KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
RN6901
SRN10KJ-5-GP
KROW[0..7] 27 3D3V_S0
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
TPAD1
3
4
C 7 C
KCOL[0..16] 27
1
KCOL17 27 RN6902
27 TPDATA 1 4 TP_DATA 2
MB PIN DEFINE 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 27 TPCLK 2 3 TP_CLK 3
KB PIN DEFINE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 4
SRN33J-5-GP-U TP_RIGHT 5
TP_LEFT 6
0315 -1 For EMI
26 K/B 1
TP_RIGHT
8
ACES-CON6-28-GP
TP_LEFT
20.K0422.006
2nd = 20.K0382.006
1
EC6901 EC6902
SC10P50V2JN-4GP
SC10P50V2JN-4GP
Finger Printer 0.5 pitch
2
DY DY
B SB 0915 3D3V_DAC_S0
B
SC1U6D3V2KX-GP
C6901
FP1
7
2
1
0909 SB
0112 SD add RB1
2nd source
2
3 5
18 USB_PP5 4
18 USB_PN5 5 TP_RIGHT 1
6
2
8 3
TP_LEFT 4
ACES-CON6-21-GP
20.K0473.006 6
<Variant Name>
2nd = 20.K0392.006
A
ACES-CON4-39-GP A
Wistron Corporation
20.K0422.004 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
D D
3D3V_AUX_KBC
1
C7001 LID1
SCD1U10V2KX-5GP APX9132HAI-TRG-GP
2
1 VDD
C C
R7001 3
100R2J-2-GP GND
1 2 LID_CLOSE#_1 2
27 LID_CLOSE# VOUT
1 C7002
DY
2
SCD047U16V2KX-1-GP
74.09132.C7B
2nd = 74.05712.0BB
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Hall Sensor
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 70 of 108
5 4 3 2 1
5 4 3 2 1
D D
1
21,27,82 LPC_AD0 2
21,27,82 LPC_AD1 3
21,27,82 LPC_AD2 4
21,27,82 LPC_AD3 5
C 6 C
21,27,82 LPC_FRAME#
5,18,27,31,32,36,65,66,75,82,83,97,105 PLT_RST# 7
8
18 CLK_PCI_LPC 9
10
11
12
DB1
MLX-CON10-7-GP
20.D0183.110
DY
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Dubug connector
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 71 of 108
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 72 of 108
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 73 of 108
5 4 3 2 1
5 4 3 2 1
SP7 XD_CLE/MS_BS P9
32 XD_WP#/MS_D1 MS_BS
MS_INS# P16 P26
XD_D6/MS_CLK MS_INS SD_WP_COM/SDIO_GND
32 XD_D0 SP8(NO MS_D4) P20 MS_SCLK SD_CD_COM/SDIO_GND P27
SD_GND P7
SP9 XD_D1/MS_D0 P12 P15
32 XD_D1/MS_D0 MS_DATA0 SD_GND
1
C7401 XD_WP#/MS_D1 P11 MS_DATA1
SC8P250V2CC-GP
SP10 XD_D2/MS_D2
32 XD_D2/MS_D2 DY XD_D4/MS_D3
P14
P18
MS_DATA2 MS_GND P6
P24
2
MS_DATA3 MS_GND
B 32 XD_D6/MS_CLK SP14 B
CARD-PUSH-46P-2-GP
32 XD_D7/SD_WP SP15
20.I0135.001
2nd = 20.I0129.001
<Variant Name>
SD_D0 SD_D1 SD_D2 SD_D3 SD_CD# XD_D7/SD_WP SD_CMD
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
Wistron Corporation
1
1
EC7401
EC7402
EC7403
EC7404
EC7405
EC7406
EC7407
Title
階
DIP階 For Expresscard socket
SSID = ExpressCard 21.H0195.001
+1.5V_CARD Max. 650mA, Average 500mA.
EXPC1 +3.3V_CARD Max. 1300mA, Average 1000mA
D 1 2 +3.3V_CARDAUX Max. 275mA D
CARDBUS2P-SKT-5-GP
NewCard
CARDBUS26P-35-GP
28
NP2
26
20 PCIE_TXP7 25
20 PCIE_TXN7 24
23
20 PCIE_RXP7 22
20 PCIE_RXN7 21
20
20 CLK_PCIE_NEW 19
3D3V_NEW _S0 18
20 CLK_PCIE_NEW # CPPE# 17
20 PCIE_CLK_NEW _REQ# 16
15
14
3D3V_NEW _LAN_S5 SB 0922 PERST# 13
12
19,31,65 PCIE_W AKE# 1DY 2 PCIE_W AKE#_NEW 11
R7501 0R2J-2-GP 10
1D5V_NEW _S0
RN7502 9
1 DY 4 SMB_DATA_NEW 8
20,31 SMB_DATA
20,31 SMB_CLK 2 3 SMB_CLK_NEW 7
C SRN33J-5-GP-U 1 CONN_TP16 C
TPAD14-OP-GP
TP83
T P83 1 CONN_TP25
TPAD14-OP-GP TP82
T P82 CPUTSB# 4
3
18 USB_PP13 2
18 USB_PN13
1
NP1
27
EXPC2
NewCard
U7501
62.10024.F51
A <Variant Name> A
C7501
1
C7502 C7507
C7503 C7506 C7505
Wistron Corporation
SCD1U16V2ZY-2GP
SC1U10V3ZY-6GP SCD1U16V2ZY-2GP
2
2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
New Card
Size Document Number Rev
A3
BAD40_HC 1
NewCard Date: Thursday, April 12, 2012 Sheet 75 of 108
NewCard 5 4 NewCard 3 2 1
5 4 3 2 1
D D
C C
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 76 of 108
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 77 of 108
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 78 of 108
5 4 3 2 1
5 4 3 2 1
Note
SSID = User.Interface - no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
- design PCB pad based on our sensor LGA pad size (add 0.1mm)
D
Free Fall Sensor - solder stencil opening to 90% of the PCB pad size
- mount the sensor near the center of mass of the NB as possible as you can
D
R7909 DY 1107 SC
2 1 SML1_CLK_G
27,39,51,86 SML1_CLK_C
0R2J-2-GP
R7910 DY
2 1 SML1_DATA_G 3D3V_S0
27,39,51,86 SML1_DATA_C
0R2J-2-GP
1108 SC
1 2 SML1_CLK_G 3D3V_S0
14,15,20,66 PCH_SMBCLK
R7911 C7901
1
0R0402-PAD C7902
SCD22U10V2KX-1GP
SCD1U10V2KX-5GP
SML1_DATA_G
14
15
16
14,15,20,66 PCH_SMBDATA 1 2
R7912 R7901 U7901
2
0R0402-PAD 10KR2J-3-GP
VDD
ADC2
ADC1
DY
C 0315 -1 C
1
0131 SD D7902 13 ADC3 VDD_IO 1
12 GND NC#2 2
18 GSENSOR_INT1 A K 11 3
SDA/SDI/SDO
INT1 NC#3 SML1_CLK_G
10 RES SCL/SPC 4
9 5
SDO/SA0
INT2 GND
CH520S-30GP-GP-U
CS
LIS3DHTR-GP
8
7
6
3D3V_S0 3D3V_S0
0308 -1
2
G_SA0
3D3V_S0 SML1_DATA_G
G_CS
R7908 R7905
0R0402-PAD 10KR2J-3-GP
2
DY R7904
1
1
R7907 R7906
10KR2J-3-GP 10KR2J-3-GP
DY DY
1
GSENSOR_INT2 1 AFTP30
SDO="H"; address="3Ah"
*SDO="L"; address="38h" <Variant Name>
A
*CS="H"; mode="I2C" Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
CS="L"; mode="SPI" Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
(Blanking)
C C
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 80 of 108
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Reserved
Size Document Number Rev
A4
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 81 of 108
5 4 3 2 1
5 4 3 2 1
0201 SD
HRS-CON30-5-GP
BTNCN1 32
15 30
1 5V_S0 29
28
2 27
3 5V_S5 3D3V_S0 26
4 BACKUP_BTN# 27 5V_S5 25
5 INSTANT_VIEW _BTN# 27 24
D 6 MUTE_BTN# 27 23 D
7 KBC_PW RBTN# 27 22
8 PowerSmartBTN# 27 21
9 NUMLOCK_LED 27 5V_CHARGER 20
10 PW RLED 27,68 19
11 PowerSmartLED 27 18
12 MUTE_LED 27 5V_S0 17
13 BACKUP_LED 27 18 USB_PP0 16
14 18 USB_PN0 15
16 14
18 USB_PP1 13
ETY-CON14-2-GP-U1 12
18 USB_PN1
1116 SC 27 USB_PW R_EN# 11
18 USB_PP2 10
20.K0474.014 18 USB_PN2 9
27 USB_CHARGER_PORT_EN# 8
1223 SC for Acer 7
0112 SD add 2nd source 1227 SC 2727W LAN_TEST_LED
W IRELESS_SW #
6
27 3G_LED 5
3D3V_S5 1222 SC 4
27 ILIM_SEL
19,27,29,36,37,47,75 PM_SLP_S3# 3
27 USB_CHARGER_CTL2 2
1
R8201 27 USB_CHARGER_CTL1 1
3D3V_S0
10KR2J-3-GP DY 31
USBCN1
2
TPMCN1 1122 SC 20.K0596.030
1 2 INT_SERIRQ 21,27
C 3D3V_S5 C
3 4 LPCPD# 1 R8202 20R2J-2-GP SUS_STAT# 19
5 6 LPC_AD0 21,27,71
7 8 LPC_AD1 21,27,71
9 10 LPC_FRAME# 21,27,71
11 12 CLK_PCI_KBC 18,27
5,18,27,31,32,36,65,66,71,75,83,97,105 PLT_RST# 13 14 LPC_AD2 21,27,71
19,27 PM_CLKRUN# 15 16 LPC_AD3 21,27,71
FOX-CONN16D-GP
20.F2190.016
2nd = 20.F0881.016
ACES-CON20-29-GP
22
20
U8201DY 18 USB30_TXP2 19
18 USB30_RXN3 1 L1#1L1#8 8 USB30_RXN3 18 18 USB30_TXN2 18
18 USB30_RXP3 2 L2#2L2#7 7 USB30_RXP3 18 17
G1 GNDGND G2 18 USB30_TXN1 16
18 USB30_TXN3 3 L3#3L3#6 6 USB30_TXN3 18 18 USB30_TXP1 15
18 USB30_TXP3 4 L4#4L4#5 5 USB30_TXP3 18 14
18 USB30_RXP1 13
18 USB30_RXN1 12
RCLAMP0524P-GP 11
18 USB30_RXP2 10
1117 SC swap for Layout 18 USB30_RXN2 9
8
B DY
U8202 18 USB30_TXP3 7
B
1
RCLAMP0524P-GP 21
USBCN2
U8203DY
18 USB30_RXN2 1 8 USB30_RXN2 18
20.K0637.020
L1#1L1#8
18 USB30_RXP2 2 L2#2L2#7 7 USB30_RXP2 18
G1 GNDGND G2
18 USB30_RXN1 3 L3#3L3#6 6 USB30_RXN1 18
18 USB30_RXP1 4 L4#4L4#5 5 USB30_RXP1 18
RCLAMP0524P-GP
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
IO Board Connector
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 82 of 108
5 4 3 2 1
5 4 3 2 1
1D05V_VGA_S0
3D3V_VGA_S0
DIS_PX_Muxless
DIS_PX_MuxlessDIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
1
3D3V_VGA_S0
1U Under GPU
SC10U6D3V5KX-1GP
C8374 C8373 C8334 C8361 C8362 C8363
1
10KR2J-3-GP
SC10U6D3V5KX-1GP
SC4D7U6D3V3KX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
2
R8302 DIS_PX_Muxless VGA1A 1 OF 17
DIS_PX_Muxless 4.7U NEAR TO GPU
1/17 PCI_EXPRESS
2N7002K-2-GP
2
D D
G AJ11
PEX_WAKE#
AG19
10U mid TO GPU
VGA_RST# PEX_IOVDD_1
20 PEG_CLKREQ# D AJ12 AG21
PEX_RST# PEX_IOVDD_2
AG22
PEG_CLKREQ#_1 PEX_IOVDD_3
S AK12 AG24
PEX_CLKREQ# PEX_IOVDD_4
AH21
PEX_IOVDD_5
Q8301 20 CLK_PCIE_VGA AL13 AH25
PEX_REFCLK PEX_IOVDD_6
84.2N702.J31 20 CLK_PCIE_VGA# AK13
PEX_REFCLK# 1U Under GPU
2nd = 84.07002.I31 PEG_RXP0 C8301 SCD22U10V2KX-1GP PEG_C_RXP0 AK14
1 2
PEG_RXN0 C8302 SCD22U10V2KX-1GP PEG_C_RXN0 AJ14 PEX_TX0
1 2
PEX_TX0# 1D05V_VGA_S0
DIS_PX_Muxless PEG_TXP0 4.7U NEAR TO GPU
DIS_PX_Muxless PEG_TXN0
AN12
PEX_RX0
AM12 AG13
1117 SC
dGPU reset PEG_RXP1 C8303 SCD22U10V2KX-1GP
1 2 PEG_C_RXP1 AH14
PEX_RX0# PEX_IOVDDQ_1
PEX_IOVDDQ_2
AG15
AG16
PEG_RXN1 C8304 SCD22U10V2KX-1GP
1 2 PEG_C_RXN1 AG14 PEX_TX1 PEX_IOVDDQ_3
AG18 DIS_PX_Muxless
DIS_PX_MuxlessDIS_PX_Muxless
10U mid TO GPU
PEX_TX1# PEX_IOVDDQ_4
DIS_PX_Muxless AG25 DIS_PX_Muxless DIS_PX_Muxless DIS_PX_Muxless
1
PEG_TXP1 PEX_IOVDDQ_5
Vendor ask to change property DIS_PX_Muxless AN14
PEX_RX1 PEX_IOVDDQ_6
AH15
SC10U6D3V5KX-1GP
PEG_TXN1 AM14 AH18 C8371 C8372 C8333 C8360 C8364 C8365 C8375 C8376
PEX_RX1# PEX_IOVDDQ_7
SC22U6D3V5MX-2GP
SC10U6D3V5KX-1GP
SC4D7U6D3V3KX-GP
SC1U10V2KX-1GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
AH26
2
PEG_RXP2 C8305 SCD22U10V2KX-1GP PEG_C_RXP2 AK15 PEX_IOVDDQ_8
DY 1 2
PEX_TX2 PEX_IOVDDQ_9
AH27 DIS_PX_Muxless
R8361 1 2 VGA_RST# PEG_RXN2 C8306 SCD22U10V2KX-1GP
1 2 PEG_C_RXN2 AJ15 AJ27
18 DGPU_HOLD_RST# PEX_TX2# PEX_IOVDDQ_10
100R2J-2-GP DIS_PX_Muxless AK27 DIS_PX_Muxless
R8307 1 PEG_TXP2 PEX_IOVDDQ_11
5,18,27,31,32,36,65,66,71,75,82,97,105 PLT_RST# 2 DIS_PX_Muxless AP14 AL27
1
100R2J-2-GP PEG_TXN2 PEX_RX2 PEX_IOVDDQ_12
DY AP15
PEX_RX2# PEX_IOVDDQ_13
AM28
R8303 AN28
100KR2J-1-GP PEG_RXP3 C8307 SCD22U10V2KX-1GP PEG_C_RXP3 AL16 PEX_IOVDDQ_14
DIS_PX_Muxless 1 2
PEX_TX3
PEG_RXN3 C8308 SCD22U10V2KX-1GP
1 2 PEG_C_RXN3 AK16
3D3V_VGA_S0 PEX_TX3#
U8301 DIS_PX_Muxless
2
1 DIS_PX_Muxless PEG_TXP3 AN15
18 DGPU_HOLD_RST# B PEX_RX3
5 PEG_TXN3 AM15
PLT_RST# VCC PEX_RX3#
2
A VGA_RST# PEG_RXP4 C8309 SCD22U10V2KX-1GP PEG_C_RXP4 AK17
4 1 2
Y PEG_RXN4 C8310 SCD22U10V2KX-1GP PEG_C_RXN4 AJ17 PEX_TX4
3 1 2
GND PEX_TX4#
74LVC1G08GW-1-GP
DIS_PX_Muxless PEG_TXP4
DIS_PX_Muxless AN17
PEG_TXN4 PEX_RX4
73.01G08.L04 AM17
PEX_RX4# 3.3V +/- 5%
DIS_PX_Muxless
PEG_RXP5 C8311 SCD22U10V2KX-1GP PEG_C_RXP5 AH17
PEG_RXN5
1 2
C8312 SCD22U10V2KX-1GP
1 2 PEG_C_RXN5 AG17 PEX_TX5 120mA
PEX_TX5#
C DIS_PX_Muxless PEG_TXP5 PEX_PLL_HVDD
AH12 3D3V_VGA_S0 (See NV DG) C
DIS_PX_Muxless PEG_TXN5
AP17
PEX_RX5
AP18 AG12
PEX_RX5# PEX_SVDD_3V3
PEG_RXP6 C8313 SCD22U10V2KX-1GP
1 2 PEG_C_RXP6 AK18
PEG_RXN6 C8314 SCD22U10V2KX-1GP PEG_C_RXN6 AJ18 PEX_TX6
1 2
1
PEX_TX6#
DIS_PX_Muxless PEG_TXP6 C8367 C8366
DIS_PX_Muxless AN18
PEX_RX6 DIS_PX_Muxless
SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP
PEG_TXN6 AM18 DIS_PX_Muxless
2
PEX_RX6#
PEG_RXP7 C8315 SCD22U10V2KX-1GP
1 2 PEG_C_RXP7 AL19
PEG_RXN7 C8316 SCD22U10V2KX-1GP PEG_C_RXN7 AK19 PEX_TX7
1 2
PEX_TX7#
DIS_PX_Muxless PEG_TXP7
DIS_PX_Muxless PEG_TXN7
AN20
PEX_RX7
AM20
PEX_RX7#
PEG_RXP8 C8317 SCD22U10V2KX-1GP
1 2 PEG_C_RXP8 AK20
PEX_TX8
Near GPU.
PEG_RXN8 C8318 SCD22U10V2KX-1GP
1 2 PEG_C_RXN8 AJ20
PEX_TX8#
DIS_PX_Muxless PEG_TXP8 VDD_SENSE
L4 VGACORE_VDD_SENSE 92
DIS_PX_Muxless PEG_TXN8
AP20
PEX_RX8
AP21
PEX_RX8#
L5 VGACORE_GND_SENSE 92
PEG_RXP9 C8319 SCD22U10V2KX-1GP PEG_C_RXP9 AH20 GND_SENSE
1 2
PEG_RXN9 C8320 SCD22U10V2KX-1GP PEG_C_RXN9 AG20 PEX_TX9
1 2
PEX_TX9#
DIS_PX_Muxless PEG_TXP9
DIS_PX_Muxless AN21
PEG_TXN9 PEX_RX9
AM21
PEX_RX9#
PEG_RXP10 C8321 SCD22U10V2KX-1GP
1 2 PEG_C_RXP10 AK21
PEG_RXN10 C8322 SCD22U10V2KX-1GP
PEG_C_RXN10 AJ21 PEX_TX10
1 2
PEX_TX10#
DIS_PX_Muxless P8
PEG_TXP10 NC_3V3AUX
DIS_PX_Muxless PEG_TXN10
AN23
PEX_RX10
AM23
PEX_RX10#
PEG_RXP11 C8323 SCD22U10V2KX-1GP
1 2 PEG_C_RXP11 AL22
PEG_RXN11 PEG_C_RXN11 AK22
C8324 SCD22U10V2KX-1GP PEX_TX11
1 2
PEX_TX11#
DIS_PX_Muxless PEG_TXP11
DIS_PX_Muxless PEG_TXN11
AP23
PEX_RX11 1.05V +/- 3%
AP24
PEX_RX11#
4 PEG_TXP[0..15]
PEG_RXP12 C8325 SCD22U10V2KX-1GP
1 2 PEG_C_RXP12 AK23 PEX_TSTCLK_OUT
AJ26
AK26
120mA
PEX_TX12 PEX_TSTCLK_OUT#
4 PEG_TXN[0..15] PEG_RXN12 C8326 SCD22U10V2KX-1GP
1 2 PEG_C_RXN12 AJ23
PEX_TX12# (See NV DG)
B DIS_PX_Muxless PEG_TXP12
B
DIS_PX_Muxless AN24
PEX_RX12
PEG_TXN12 AM24
PEX_RX12# DIS_PX_Muxless1D05V_VGA_S0
L8302
PEG_RXP13 C8327 SCD22U10V2KX-1GP
1 2 PEG_C_RXP13 AH23
PEX_TX13
SC4D7U6D3V3KX-GP
PEG_RXN13 C8328 SCD22U10V2KX-1GP
1 2 PEG_C_RXN13 AG23 AG26 VCC1R05VIDEO_PEX_PLLVDD 2 1
PEX_TX13# PEX_PLLVDD
SCD1U10V2KX-5GP
SC1U10V2KX-1GP
PEG_RXP[0..15] 4 DIS_PX_Muxless PEG_TXP13 BLM11A121S-GP
DIS_PX_Muxless AN26
1
PEG_TXN13 PEX_RX13 CHIP BEAD BLM18AG121SN1D
PEG_RXN[0..15] 4 AM26
1
PEX_RX13# C8368
PEG_RXP14 C8329 SCD22U10V2KX-1GP
1 2 PEG_C_RXP14 AK24 R8308 C8369 C8370
2
PEG_RXN14 C8330 SCD22U10V2KX-1GP
PEG_C_RXN14 AJ24 PEX_TX14
1 2 AK11 TESTMODE
1 2 10KR2J-3-GP
2
PEX_TX14# TESTMODE
DIS_PX_Muxless PEG_TXP14
DIS_PX_Muxless AP26 DIS_PX_Muxless DIS_PX_Muxless
PEG_TXN14 PEX_RX14
AP27
PEX_RX14# DIS_PX_Muxless DIS_PX_Muxless
PEG_RXP15 C8331 SCD22U10V2KX-1GP
1 2 PEG_C_RXP15 AL25
PEG_RXN15 C8332 SCD22U10V2KX-1GP
PEG_C_RXN15 AK25 PEX_TX15
1 2
PEX_TX15# R8305
DIS_PX_Muxless PEG_TXP15
DIS_PX_Muxless AN27 AP29 PEX_TERMP
1 2 2K49R2F-GP
PEG_TXN15 PEX_RX15 PEX_TERMP
AM27
PEX_RX15#
DIS_PX_Muxless Near GPU.
N13P-GS-A1-GP
71.0N13P.00U DIS_PX_Muxless
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU_PCIE/STRAPPING(1/5)
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 83 of 108
5 4 3 2 1
5 4 3 2 1
VGA1K 11 OF 17
6/17 IFPC
220mA IFPA_TXC#
AN6 GPU_LVDSA_TXC# 94 AF7
IFPC_PLLVDD I2CW_SDA IFPC_AUX_I2CW_SDA#
AG2 GPU_DDCP_SDA 51
SCD1U10V2KX-5GP
AM6 GPU_LVDSA_TXC 94 I2CW_SCL AG3 GPU_DDCP_SCL 51
IFPA_TXC IFPC_AUX_I2CW_SCL
(See NV DG) 1 2 IFPAB_RSET AJ8
1
IFPAB_RSET
1D05V_VGA_S0
DY R8401 DIS_PX C8411 GPU_DDCP_DATA3#
120ohm@100MHz DCR=0.05 1KR2F-3-GP IFPA_TXD0#
AN3
AP3
GPU_LVDSA_TX0# 94
GPU_LVDSA_TX0 94
TXC
TXC
IFPC_L3#
AG4
AG5 GPU_DDCP_DATA3
GPU_DDCP_DATA3# 51
GPU_DDCP_DATA3 51
2
L8401 IFPA_TXD0 IFPC_L3
1 2 IFPAB_PLLVDD AH8 AH4 GPU_DDCP_DATA0#
D BLM18PG121SN1D-GP IFPAB_PLLVDD
IFPA_TXD1#
AM5 GPU_LVDSA_TX1# 94
Under GPU. IFPC
HDMI TXD0
TXD0
IFPC_L2#
IFPC_L2
AH3 GPU_DDCP_DATA0
GPU_DDCP_DATA0# 51
GPU_DDCP_DATA0 51 D
1 1 1 7
SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP
DIS_PX IFPA_TXD1
AN5 GPU_LVDSA_TX1 94
GPU_DDCP_DATA1#
TXD1 AJ2 GPU_DDCP_DATA1# 51
IFPC_L1# GPU_DDCP_DATA1
TXD1 AJ3 GPU_DDCP_DATA1 51
1
C8403 IFPC_L1
AK6 GPU_LVDSA_TX2# 94
C8408 IFPA_TXD2# IFPC_IOVDD_PWR GPU_DDCP_DATA2#
DIS_PX IFPA_TXD2
AL6 GPU_LVDSA_TX2 94 TXD2 IFPC_L0#
AJ1 GPU_DDCP_DATA2# 51
1125 SC del L8402 TXD2 AK1 GPU_DDCP_DATA2 GPU_DDCP_DATA2 51
2
IFPC_L0
DIS_PX
AH6
IFPA_TXD3#
AJ6
3.3V +/- 5% IFPA_TXD3
S C
AF6 P2
220mA
Near GPU
LVDS IFPB_TXC#
AH9
IFPC_IOVDD GPIO15 GPU_DP1_HPD 51
1
IFPB_TXC C8431
3D3V_VGA_S0 180ohm@100MHz ESR=0.15 DCR=0.09 AG8 DIS_PX
d e l
IFPA_IOVDD
AP5
DIS_PX_Muxless
SCD1U10V2KX-5GP
2
IFPAB_IOVDD IFPB_TXD4#
1 2 AG9 AP6
L8404 BLM18PG181SN1D-GP IFPB_IOVDD IFPB_TXD4
SC4D7U6D3V3KX-GP
SC1U6D3V2KX-GP
1
IFPB_TXD5#
AM7
1
IFPB_TXD5
C 8 4 0 2
C8404 C8405 C8432 R8408
Under GPU.
SCD1U10V2KX-5GP
IFPB_TXD6#
DIS_PX DIS_PX AN8 7/17 IFPD
2
IFPB_TXD6
GPU_eDP_AUX
IFPB_TXD7 IFPCDE_PLLVDD_PWR
GPU_eDP_AUX#
1 R8403 2IFPD_RSET AN2
1KR2F-3-GP IFPD_RSET
DVI/HDMI DP
DIS_PX
Near GPU Under GPU
f o r
AG7 I2CX_SDA AK2
IFPD_PLLVDD IFPD_AUX_I2CX_SDA# GPU_eDP_AUX# 103
N4 I2CX_SCL AK3
GPIO14 IFPD_AUX_I2CX_SCL GPU_eDP_AUX 103
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
IFPAB
1
1
1
N13P-GS-A1-GP TXC AK5 R8418
C8406 C8412 IFPD_L3# R8419
DIS_PX TXC IFPD_L3
AK4 100KR2J-1-GP
71.0N13P.00U DIS_PX_Muxless DIS_PX 100KR2J-1-GP
2
L a y o u t
C AL4 C
eDP
2
TXD0 IFPD_L2#
IFPD TXD0 AL3
2
IFPD_L2
TXD1 IFPD_L1#
AM4
GPU_eDP_DATA1# 103 DIS_PX DIS_PX
TXD1 AM3
IFPD_L1 GPU_eDP_DATA1 103
IFPC_IOVDD_PWR Under GPU. TXD2 IFPD_L0#
AM2
GPU_eDP_DATA0# 103
TXD2 AM1
IFPD_L0 GPU_eDP_DATA0 103
3D3V_VGA_S0
AG6 M6
IFPD_IOVDD GPIO17
GPU_eDP_HPD_C
N13P-GS-A1-GP
1
C8430
VGA1M 13 OF 17 DIS_PX PX_EDP R8412
Under GPU. 71.0N13P.00U DIS_PX_Muxless
SCD1U10V2KX-5GP
8/17 IFPEF 10KR2J-3-GP
2
Q8401
2
ALL PINS NC FOR GF117
3 4
IFPCDE_PLLVDD_PWR 2 5 3D3V_VGA_S0_6
DVI-DL DVI-SL/HDMI DP 103 GPU_eDP_HPD
PX_EDP1 6 2 1 3D3V_VGA_S0
1117 SC R8413 10KR2J-3-GP
I2CY_SDA I2CY_SDA AB4 GPU_DDEP_AUX# PX_EDP
del for layout I2CY_SCL I2CY_SCL
IFPE_AUX_I2CY_SDA#
AB3 GPU_DDEP_AUX
GPU_DDEP_AUX# 52 2N7002KDW-GP
IFPE_AUX_I2CY_SCL GPU_DDEP_AUX 52
AB8 84.2N702.A3F
IFPEF_PLLVDD
AC5 GPU_DDEP_DATA3# GPU_DDEP_DATA3# 52
TXC TXC IFPE_L3#
1 R8404 2IFPEF_REST AD6 TXC TXC AC4 GPU_DDEP_DATA3
GPU_DDEP_DATA3 52
IFPEF_RSET IFPE_L3
SCD1U10V2KX-5GP
1KR2F-3-GP
DIS_PX AC3 GPU_DDEP_DATA2#
GPU_DDEP_DATA2# 52
1
IFPC_IOVDD_PWR
L8403 L8405
1 2 1 2
GPU_DDEP_AUX#
GPU_DDEP_AUX
ACMS160808A221-RDC05-GP ACMS160808A331-RDC08-GP
C8410
AC7 DIS_PX DIS_PX
SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP
IFPE_IOVDD
C8418
AF2
SCD1U10V2KX-5GP
I2CZ_SDA IFPF_AUX_I2CZ_SDA#
I2CZ_SCL AF3
1
IFPF_AUX_I2CZ_SCL
AC8
IFPF_IOVDD C8427 C8417
TXC AF1 SC4D7U6D3V3KX-GP DIS_PX
2
IFPF_L3#
TXC AG1 DIS_PX
1
IFPF_L3
1
Under GPU.
2
AE4
TXD5
TXD5
TXD2
TXD2
IFPF_L0#
IFPF_L0
AE3 Near GPU. Near GPU.
HPD_F P3
GPIO19
N13P-GS-A1-GP
71.0N13P.00U
A DIS_PX_Muxless A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU Memory(2/5)
Size Document Number Rev
A2
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 84 of 108
5 4 3 2 1
5 4 3 2 1
EDP 10A
VGA1B 2 OF 17 VGA1C 3 OF 17 DC tolerance +/- 75mV
4 OF 17 1D5V_VGA_S0
VGA1D
2/17 FBA 3/17 FBB
14/17 FBVDDQ
AC tolerance +/- 50mV < 100MHz
88,89 MDA[63..0]
AA27
FBVDDQ_1
AA30
MDA0 90,91 MDB[63..0] MDB0 FBVDDQ_2
L28 E1 G9 AB27
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V3KX-2GP
SC1U6D3V3KX-2GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
MDA1 FBA_D0 FB_CLAMP MDB1 FBB_D0 FBVDDQ_3
M29 E9 AB33
MDA2 FBA_D1 MDB2 FBB_D1 FBVDDQ_4
L29
FBA_D2 SC 1025 G8
FBB_D2 FBVDDQ_5
AC27
1
MDA3 M28 MDB3 F9 AD27
MDA4 FBA_D3 MDB4 FBB_D3 FBVDDQ_6 C8504 C8505 C8506 C8507 C8512 C8508 C8509 C8510 C8511
N31 F11 AE27
MDA5 FBA_D4 FB_PLLVDD_16mil MDB5 FBB_D4 FBVDDQ_7
P29 K27 G11 AF27
2
MDA6 FBA_D5 FB_DLL_AVDD MDB6 FBB_D5 FBVDDQ_8
R29 F12 AG27
MDA7 FBA_D6 MDB7 FBB_D6 FBVDDQ_9
P28 G12 B13
SCD1U10V2KX-5GP
MDA8 FBA_D7 MDB8 FBB_D7 FBVDDQ_10
J28 G6 B16
MDA9 FBA_D8 MDB9 FBB_D8 FBVDDQ_11
H29 F5 B19
FBA_D9 FBB_D9 FBVDDQ_12
1
D MDA10 MDB10 D
J29 E6 E13
MDA11 FBA_D10 C8522 MDB11 FBB_D10 FBVDDQ_13
H28 F6 E16
MDA12 FBA_D11 MDB12 FBB_D11 FBVDDQ_14
G29 DIS_PX_Muxless F4 E19
2
MDA13 FBA_D12 MDB13 FBB_D12 FBVDDQ_15 DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxlesss
DIS_PX_Muxless
E31 G4 H10
MDA14 E32
FBA_D13 MDB14 E2
FBB_D13 FBVDDQ_16
H11
DIS_PX_Muxless
DIS_PX_Muxless
MDA15 FBA_D14 MDB15 FBB_D14 FBVDDQ_17
F30 F3 H12
MDA16 C34
FBA_D15
FBA_D16 Place close to Ball MDB16 C2
FBB_D15
FBB_D16
FBVDDQ_18
FBVDDQ_19
H13 Under GPU.
MDA17 D32 MDB17 D4 H14
MDA18 FBA_D17 MDB18 FBB_D17 FBVDDQ_20
B33 D3 H15
MDA19 FBA_D18 MDB19 FBB_D18 FBVDDQ_21
C33 C1 H16
MDA20 FBA_D19 MDB20 FBB_D19 FBVDDQ_22
F33 B3 H18
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
MDA21 FBA_D20 MDB21 FBB_D20 FBVDDQ_23
MDA22
F32
FBA_D21 MDB22
C4
FBB_D21 FBVDDQ_24
H19 DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
H33 B5 H20
FBA_D22 FBB_D22 FBVDDQ_25
1
MDA23 H32 MDB23 C5 H21
MDA24 FBA_D23 MDB24 FBB_D23 FBVDDQ_26 C8517 C8518 C8519 C8524 C8525 C8526 C8527
P34 A11 H22
MDA25 FBA_D24 MDB25 FBB_D24 FBVDDQ_27
P32 C11 H23
2
FBA_D25 FBB_D25 FBVDDQ_28
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
MDA26 P31 MDB26 D11 H24
MDA27 FBA_D26 MDB27 FBB_D26 FBVDDQ_29
P33 B11 H8
MDA28 FBA_D27 MDB28 FBB_D27 FBVDDQ_30
L31 D8 H9
MDA29 FBA_D28 MDB29 FBB_D28 FBVDDQ_31
L34 A8 L27
MDA30 FBA_D29 MDB30 FBB_D29 FBVDDQ_32
L32 C8 M27
MDA31 FBA_D30 MDB31 FBB_D30 FBVDDQ_33
L33 B8 N27
MDA32 FBA_D31 MDB32 FBB_D31 FBVDDQ_34
AG28 F24 P27
MDA33 FBA_D32 MDB33 FBB_D32 FBVDDQ_35 DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
AF29 U30 G23 D13 R27
MDA34 FBA_D33 FBA_CMD0 -FBA_CS0 88 MDB34 FBB_D33 FBB_CMD0 -FBB_CS0 90 FBVDDQ_36
AG29 T31 E24 E14 T27
MDA35 FBA_D34 FBA_CMD1 MDB35 FBB_D34 FBB_CMD1 FBVDDQ_37
AF28 U29 G24 F14 T30
MDA36 FBA_D35 FBA_CMD2 FBA_ODT0 88 MDB36 FBB_D35 FBB_CMD2 FBB_ODT0 90 FBVDDQ_38
AD30 R34 D21 A12 T33
MDA37 FBA_D36 FBA_CMD3 FBA_CKE0 88 MDB37 FBB_D36 FBB_CMD3 FBB_CKE0 90 FBVDDQ_39
AD29 R33 E21 B12 V27
MDA38 FBA_D37 FBA_CMD4 MDB38 FBB_D37 FBB_CMD4 FBVDDQ_40
AC29 U32 G21 C14 W27
MDA39 FBA_D38 FBA_CMD5 FBA_RST 88,89 MDB39 FBB_D38 FBB_CMD5 FBB_RST 90,91 FBVDDQ_41
AD28 U33 F21 B14 W30
MDA40 FBA_D39 FBA_CMD6 FBA_A9 88,89 MDB40 FBB_D39 FBB_CMD6 FBB_A9 90,91 FBVDDQ_42
AJ29 U28 G27 G15 W33
MDA41 FBA_D40 FBA_CMD7 FBA_A7 88,89 MDB41 FBB_D40 FBB_CMD7 FBB_A7 90,91 FBVDDQ_43
AK29 V28 D27 F15 Y27
MDA42 FBA_D41 FBA_CMD8 FBA_A2 88,89 MDB42 FBB_D41 FBB_CMD8 FBB_A2 90,91 FBVDDQ_44
AJ30 V29 G26 E15
MDA43 FBA_D42 FBA_CMD9 FBA_A0 88,89 MDB43 FBB_D42 FBB_CMD9 FBB_A0 90,91
AK28 V30 E27 D15
MDA44 FBA_D43 FBA_CMD10 FBA_A4 88,89 MDB44 FBB_D43 FBB_CMD10 FBB_A4 90,91
AM29 U34 E29 A14 F1
MDA45 FBA_D44 FBA_CMD11 FBA_A1 88,89 MDB45 FBB_D44 FBB_CMD11 FBB_A1 90,91 FB_VDDQ_SENSE
AM31 U31 F29 D14 1D5V_VGA_S0
MDA46 FBA_D45 FBA_CMD12 FBA_BA0 88,89 MDB46 FBB_D45 FBB_CMD12 FBB_BA0 90,91
AN29 V34 E30 A15
MDA47 FBA_D46 FBA_CMD13 -FBA_WE 88,89 MDB47 FBB_D46 FBB_CMD13 -FBB_WE 90,91
AM30
FBA_D47 FBA_CMD14
V33 D30
FBB_D47 FBB_CMD14
B15 DIS_PX_Muxless F2
FB_GND_SENSE
MDA48 AN31 Y32 MDB48 A32 C17
MDA49 FBA_D48 FBA_CMD15 -FBA_CAS 88,89 MDB49 FBB_D48 FBB_CMD15 -FBB_CAS 90,91 R8501
AN32 AA31 C31 D18
MDA50 FBA_D49 FBA_CMD16 -FBA_CS1 89 MDB50 FBB_D49 FBB_CMD16 -FBB_CS1 91 FB_CAL_PD_VDDQ
AP30 AA29 C32 E18 2 1 J27
MDA51 FBA_D50 FBA_CMD17 MDB51 FBB_D50 FBB_CMD17 40D2R2F-GP FB_CAL_PD_VDDQ
AP32 AA28 B32 F18
MDA52 FBA_D51 FBA_CMD18 FBA_ODT1 89 MDB52 FBB_D51 FBB_CMD18 FBB_ODT1 91
AM33 AC34 D29 A20
MDA53 FBA_D52 FBA_CMD19 FBA_CKE1 89 MDB53 FBB_D52 FBB_CMD19 FBB_CKE1 91 FB_CAL_PU_GND
AL31 AC33 A29 B20 H27
MDA54 FBA_D53 FBA_CMD20 FBA_A13 88,89 MDB54 FBB_D53 FBB_CMD20 FBB_A13 90,91 FB_CAL_PU_GND
AK33 AA32 C29 C18
MDA55 FBA_D54 FBA_CMD21 FBA_A8 88,89 MDB55 FBB_D54 FBB_CMD21 FBB_A8 90,91
AK32 AA33 B29 B18
MDA56 FBA_D55 FBA_CMD22 FBA_A6 88,89 MDB56 FBB_D55 FBB_CMD22 FBB_A6 90,91 FB_CAL_TERM_GND
AD34 Y28 B21 G18 H25
MDA57 FBA_D56 FBA_CMD23 FBA_A11 88,89 MDB57 FBB_D56 FBB_CMD23 FBB_A11 90,91 FB_CAL_TERM_GND
AD32 Y29 C23 G17
MDA58 FBA_D57 FBA_CMD24 FBA_A5 88,89 MDB58 FBB_D57 FBB_CMD24 FBB_A5 90,91
AC30 W31 A21 F17
MDA59 FBA_D58 FBA_CMD25 FBA_A3 88,89 MDB59 FBB_D58 FBB_CMD25 FBB_A3 90,91 N13P-GS-A1-GP
C AD33 Y30 C21 D16 C
MDA60 FBA_D59 FBA_CMD26 FBA_BA2 88,89 MDB60 FBB_D59 FBB_CMD26 FBB_BA2 90,91
AF31 AA34 B24 A18
MDA61 FBA_D60 FBA_CMD27 FBA_BA1 88,89 MDB61 FBB_D60 FBB_CMD27 FBB_BA1 90,91
AG34
FBA_D61 FBA_CMD28
Y31 C24
FBB_D61 FBB_CMD28
D17
71.0N13P.00U DIS_PX_Muxless
1
MDA62 FBA_A12 88,89 MDB62 FBB_A12 90,91
AG32 Y34 B26 A17
40D2R2F-GP
60D4R2F-GP
MDA63 FBA_D62 FBA_CMD29 FBA_A10 88,89 MDB63 FBB_D62 FBB_CMD29 FBB_A10 90,91 R8502
AG33 Y33 C26 B17
FBA_D63 FBA_CMD30 -FBA_RAS 88,89 FBB_D63 FBB_CMD30 -FBB_RAS 90,91
FBA_CMD31
V31
FBB_CMD31
E17 DIS_PX_Muxless DIS_PX_Muxless
R8503
P30 R32 90 DQMB0 E11 C12
2
88 DQMA0 FBA_DQM0 FBA_CMD_RFU0 FBB_DQM0 FBB_CMD_RFU0
F31 AC32 90 DQMB1 E3 C20
88 DQMA1 FBA_DQM1 FBA_CMD_RFU1 FBB_DQM1 FBB_CMD_RFU1
F34 1D5V_VGA_S0 90 DQMB2 A3
88 DQMA2 FBA_DQM2 FBB_DQM2
M32 90 DQMB3 C9 1D5V_VGA_S0
88 DQMA3 FBA_DQM3 FBB_DQM3
AD31 91 DQMB4 F23
89 DQMA4 FBA_DQM4 FBB_DQM4
AL29 91 DQMB5 F27
89 DQMA5 FBA_DQM5 FBB_DQM5
89 DQMA6
AM32
FBA_DQM6 DIS_PX_Muxless 91 DQMB6 C30
FBB_DQM6 DIS_PX_Muxless
AF34 R28 FBA_DEBUG0 1 R8518 2
DIS_PX_Muxless 91 DQMB7 A24 G14 FBB_DEBUG0 R8520 1
DIS_PX_Muxless2
89 DQMA7 FBA_DQM7 FBA_DEBUG0 FBB_DQM7 FBB_DEBUG0
AC28 FBA_DEBUG1 1 R8519 2 60D4R2F-GP G20 FBB_DEBUG1 R8521 1 2 60D4R2F-GP
FBA_DEBUG1 60D4R2F-GP FBB_DEBUG1 60D4R2F-GP
88 QSAP_0 M31 90 QSBP_0 D10
FBA_DQS_WP0 FBB_DQS_WP0
88 QSAP_1 G31 90 QSBP_1 D5
FBA_DQS_WP1 FBB_DQS_WP1
88 QSAP_2 E33 R30 90 QSBP_2 C3 D12
FBA_DQS_WP2 FBA_CLK0 CLKA0 88 FBB_DQS_WP2 FBB_CLK0 CLKB0 90
88 QSAP_3 M33 R31 90 QSBP_3 B9 E12
FBA_DQS_WP3 FBA_CLK0# CLKA0# 88 FBB_DQS_WP3 FBB_CLK0# CLKB0# 90
89 QSAP_4 AE31 AB31 91 QSBP_4 E23 E20
FBA_DQS_WP4 FBA_CLK1 CLKA1 89 FBB_DQS_WP4 FBB_CLK1 CLKB1 91
89 QSAP_5 AK30 AC31 91 QSBP_5 E28 F20
FBA_DQS_WP5 FBA_CLK1# CLKA1# 89 FBB_DQS_WP5 FBB_CLK1# CLKB1# 91
89 QSAP_6 AN33 91 QSBP_6 B30
FBA_DQS_WP6 FBB_DQS_WP6
89 QSAP_7 AF33 91 QSBP_7 A23
FBA_DQS_WP7 FBB_DQS_WP7
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
N13P-GS-A1-GP N13P-GS-A1-GP
SC1U6D3V2KX-GP
1
1
B
71.0N13P.00U DIS_PX_Muxless C8513 C8514 C8515 C8516 71.0N13P.00U DIS_PX_Muxless C8523
B
DIS_PX_Muxless
2
2
DIS_PX_Muxless DIS_PX_Muxless DIS_PX_Muxless
DIS_PX_Muxless
Place close to Ball
CLKA1 CLKA0
R8504 R8505
1
DIS_PX_Muxless 162R2F-GP DIS_PX_Muxless 162R2F-GP
FBB_CKE0 R8506 R8507
CKE0 DIS_PX_Muxless 162R2F-GP DIS_PX_Muxless 162R2F-GP
2
FBB_CKE1
CLKA1# CLKA0# Group A CKE1
2
FBB_RST Reset CLKB1# CLKB0#
CKE0 FBA_CKE0
A FBB_ODT0 A
ODT0
CKE1 FBA_CKE1
FBCLK Termination place on VRAM side Reset FBA_RST
FBB_ODT1 ODT1 FBCLK Termination place on VRAM side
ODT0 FBA_ODT0
ODT1 FBA_ODT1
1
1
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
<Variant Name>
DIS_PX_Muxless
DIS_PX_Muxless R8508 R8509 R8510 R8511 R8512 R8513 R8514 R8515 R8516 R8517
Wistron Corporation
2
Title
DIS_PX_Muxless DIS_PX_Muxless
DIS_PX_MuxlessDIS_PX_Muxless DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
GPU_DP/LVDS/CRT/GPIO(3/5)
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 85 of 108
5 4 3 2 1
5 4 3 2 1
3.3V +/- 5%
120mA 1.05V +/- 3%
300ohm@100MHz ESR=0.25ohm (See NV DG) 150mA
3D3V_VGA_S0 (See NV DG)
220ohm@100MHz ESR=0.05 1D05V_VGA_S0 PLLVDD_PWR
L8602
3D3V_VGA_S0_DACA_VDD_16MIL 1 2 L8601
ACMS160808A221-RDC05-GP
SCD1U10V2KX-5GP
DIS_PX 1 2
HCB1608KF-300T50-GP
DIS_PX_Muxless
1
3D3V_VGA_S0
SCD1U10V2KX-5GP
SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP
C8604 C8601 C8602 C8603 C8607
30ohm@100MHz DCR=0.02
1
2
SCD1U10V2KX-5GP
2
4
3
DIS_PX DIS_PX DIS_PX DIS_PX
RN8606 VGA1O 15 OF 17
SRN4K7J-8-GP DIS_PX_Muxless 11/17 XTAL_PLL
DIS_PX 1D05V_VGA_S0 SP_PLLVDD_PWR
Near GPU.
180ohm@100MHz ESR=0.15 DCR=0.09 AD8
Under GPU. Near GPU.
1
2
PLLVDD
AE8
D VGA1N 14 OF 17 SP_PLLVDD D
DIS_PX_Muxless
4/17 DACA 1 2 AD7 NC DIS_PX_Muxless
GF108/GKx GF117 GF117 GF108/GKx
L8604
BLM18PG181SN1D-GP C8605 C8606
VID_PLLVDD
GF108/GKx GF117
25Kohm 5Kohm 10Kohm 30Kohm
1
AG10 R4
DACA_VDD NC NC I2CA_SCL
R5
VGA_CRT_DDCCLK 95
DIS_PX_Muxless C8613 64.24925.6DL 64.49915.6DL 64.10025.6DL 64.30025.6DL
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
NC I2CA_SDA VGA_CRT_DDCDATA 95
DACA_VREF AP9 TSEN_VREF
2
DACA_VREF
SC10U6D3V3MX-GP
TPAD14-OP-GPTP8609 1 VIDEO_CLK_XTAL_SS H1 J4 N12P_XTAL_OUTBUFF
DACA_RSET XTAL_SSIN XTAL_OUTBUFF
AP8 NC NC AM9 VGA_CRT_HSYNC 95
DACA_RSET DACA_HSYNC
AN9 DIS_PX_Muxless
DIS_PX_Muxless
NC DACA_VSYNC VGA_CRT_VSYNC 95
H3
XTAL_IN XTAL_OUT
H2 NVIDIA TABLE
1
AK9 VGA_CRT_RED 95 N13P-GS-A1-GP
NC DACA_RED
1
1
DIS_PX R8605
Hynix 2G Hynix 1G Samsung 1G Samsung 2G
1
DIS_PX NC DACA_GREEN
AL10 VGA_CRT_GREEN 95 71.0N13P.00U DIS_PX_Muxless10KR2J-3-GP
C8609 R8603 R8604
0110 0010 0011 0111
SCD1U10V2KX-4GP
2
DACA_BLUE R8606
2
2
N13P-GS-A1-GP
27MHZ_IN 1 1MR2J-1-GP
2 27MHZ_OUT 128M*16*8 64M*16*8 64M*16*8 128M*16*8
RN8602 DY
2
VGA_CRT_BLUE
VGA_CRT_GREEN
1
2
8
7
DIS_PX_Muxless
R8607
900MHZ 900MHZ 900MHZ 900MHZ
DIS_PX_Muxless 71.0N13P.00U VGA_CRT_RED 3 6 390R2J-1-GP DIS_PX_Muxless
4 5 DIS_PX_Muxless
34.8Kohm 15Kohm 20Kohm 45Kohm
1
SRN150J-1-GP 1 2 27MHZ_OUT_R
X8601
ROM_SI
DIS_PX
1
XTAL-27MHZ-62-GP-U
DIS_PX_Muxless C8610
SC15P50V2JN-2-GP
82.30034.501
2nd = 82.30034.521
C8611
SC15P50V2JN-2-GP
64.34825.6DL 64.15025.6DL 64.20025.6DL 64.45325.6DL
2
DIS_PX_Muxless
3D3V_VGA_S0
1115 SC
Q8601
1108 SC 2N7002KDW-GP
3D3V_VGA_S0 84.2N702.A3F
2nd = 84.2N702.F3F 0308 -1
SMBC_THERM_NV 1 6 SML1_CLK_C 27,39,51,79
4
3
2 5
RN8605
SRN4K7J-8-GP 3 4 SMBD_THERM_NV
C 27,39,51,79 SML1_DATA_C C
DIS_PX_Muxless
DIS_PX_Muxless
3D3V_VGA_S0
1
2
SMBC_THERM_NV
SMBD_THERM_NV
Strap3
3D3V_VGA_S0
1220 SC
4
3
1
1
10KR2J-3-GP
R8611 RN8607
10KR2J-3-GP SRN4K7J-8-GP
2R8651
2R8652
2K2R2J-2-GP
10KR2J-3-GP
DIS_PX_Muxless
2
1
2
VGA1Q 17 OF 17
10/19 MISC1 DIS_PX_Muxless
T4 SMBC_THERM_NV
I2CS_SCL SMBD_THERM_NV
T3
I2CS_SDA
DIS_PX_Muxless
DIS_PX_Muxless
R2 GPU_LVDS_CLK 94
I2CC_SCL
R3 GPU_LVDS_DATA 94
TP8601 I2CC_SDA
TPAD14-OP-GP Q8603
R7
TP8610 I2CB_SCL
1THERMDN K4 R6 27 dGPU_ALARM 1 R8622 2dGPU_ALARM_R G
TPAD14-OP-GP THERMDN I2CB_SDA 0R0402-PAD
DY TP8611 1THERMDP K3 DIS_PX D GPIO9_ALERT#
1
2N7002K-2-GP
84.2N702.J31
2ND = 84.07002.I31
B
DIS_PX B
N13P-GS-A1-GP
71.0N13P.00U
DIS_PX_Muxless
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
VGA1P 16 OF 17
2
12/17 MISC2
1
R8638
DY 10KR2J-3-GP R8637 R8649
1
DIS_PX_Muxless N13P_GL
1
R8628
L2 10KR2J-3-GP DIS_PX_Muxless
BUFRST#
2
STRAP_REF0_GND J1 L3 N13P_CEC
MULTI_STRAP_REF0_GND CEC
Strap0
1
3D3V_VGA_S0
R8612 DIS_PX_Muxless
40K2R2F-GP
N13P-GS-A1-GP
2
DIS_PX_Muxless
1
R8630 N13P-GL
45K3R2F-L-GP DY
N13P_GL_GS R8632 R8634
34K8R2F-1-GP 10KR2F-2-GP
2
STRAP0
STRAP1
STRAP2
1
R8633 R8636
A R8631 4K99R2F-L-GP 15KR2F-GP A
DY 2KR2J-1-GP N13P-GS N13P_GS
2
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU_POWER(4/5)
Size Document Number Rev
A1
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 86 of 108
5 4 3 2 1
5 4 3 2 1
VGA1I 9 OF 17
EDP 50A A2
GND_1
15/17 GND_1/2
GND_71
AM25 VGA1H 8 OF 17
AA17 AN1
GND_5 GND_72 16/17 GND_2/2
(TDP 37W) AA18
AA20
AA22
GND_6
GND_7
GND_73
GND_74
AN10
AN13
AN16
N19
N2
GND_141 GND_170 T28
T32
GND_8 GND_75 GND_142 GND_171
VGA_CORE AB12 GND_9 GND_76 AN19 N21 GND_143 GND_172 T5
AB14 GND_10 GND_77 AN22 N23 GND_144 GND_173 T7
AB16 GND_11 GND_78 AN25 N28 GND_145 GND_174 U12
AB19 GND_12 GND_79 AN30 N30 GND_146 GND_175 U14
VGA1F 6 OF 17 AB2 AN34 N32 U16
Under GPU 13/17 NVVDD AB21
GND_13 GND_80
AN4 N33
GND_147 GND_176
U19
GND_14 GND_81 GND_148 GND_177
A33 GND_2 GND_82 AN7 N5 GND_149 GND_178 U21
AA12 VDD_1 AB23 GND_15 GND_83 AP2 N7 GND_150 GND_179 U23
AA14 VDD_2 AB28 GND_16 GND_84 AP33 P13 GND_151 GND_180 V12
D AA16 VDD_3 AB30 GND_17 GND_85 B1 P15 GND_152 GND_181 V14 D
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless AA19 VDD_4 AB32 GND_18 GND_86 B10 P17 GND_153 GND_182 V16
1
1
AA21 VDD_5 AB5 GND_19 GND_87 B22 P18 GND_154 GND_183 V19
C8704 C8703 C8702 C8701 AA23 AB7 B25 P20 V21
VDD_6 GND_20 GND_88 GND_155 GND_184
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
AB13 AC13 B28 P22 V23
2
2
VDD_7 GND_21 GND_89 GND_156 GND_185
AB15 VDD_8 AC15 GND_22 GND_90 B31 R12 GND_157 GND_186 W13
AB17 VDD_9 AC17 GND_23 GND_91 B34 R14 GND_158 GND_187 W15
AB18 VDD_10 AC18 GND_24 GND_92 B4 R16 GND_159 GND_188 W17
AB20 VDD_11 AA13 GND_3 GND_93 B7 R19 GND_160 GND_189 W18
AB22 VDD_12 AC20 GND_25 GND_94 C10 R21 GND_161 GND_190 W20
AC12 VDD_13 AC22 GND_26 GND_95 C13 R23 GND_162 GND_191 W22
AC14 VDD_14 AE2 GND_27 GND_96 C19 T13 GND_163 GND_192 W28
AC16 VDD_15 AE28 GND_28 GND_97 C22 T15 GND_164 GND_193 Y12
AC19 AE30 C25 T17 Y14
Under GPU AC21
VDD_16
AE32
GND_29 GND_98
C28 T18
GND_165 GND_194
Y16
VDD_17 GND_30 GND_99 GND_166 GND_195
AC23 AE33 C7 T2 Y19
VDD_18 GND_31 GND_100 GND_167 GND_196
M12 AE5 D2 T20 Y21
VDD_19 GND_32 GND_101 GND_168 GND_197
M14 AE7 D31 T22 Y23
VDD_20 GND_33 GND_102 GND_169 GND_198
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless M16
VDD_21
AH10
GND_34 GND_103
D33
1
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
CHANNELS
XVDD_1 U1
U2
XVDD_2
XVDD_3 U3
XVDD_4 U4
U5
XVDD_5
U6
XVDD_6
XVDD_7 U7
XVDD_8 U8
VGA1G 7 OF 17 3D3V_VGA_S0 V1
XVDD_9
17/17 NC/VDD33 XVDD_10 V2
V3
XVDD_11
AC6 NC#AC6 VDD33_1 J8 XVDD_12 V4
AJ28 NC#AJ28 VDD33_2 K8 XVDD_13 V5
AJ4
NC#AJ4 VDD33_3
L8 DIS_PX_Muxless DIS_PX_Muxless
DIS_PX_Muxless XVDD_14
V6
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AJ5
NC#AJ5 VDD33_4
M8 DIS_PX_Muxless XVDD_15
V7
AL11 NC#AL11 XVDD_16 V8
1
C15 NC#C15
D19 C8710 C8735 C8739 C8740
NC#D19
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP
D20 W2
2
NC#D20 XVDD_17
D23 NC#D23 XVDD_18 W3
D26 W4
NC#D26 XVDD_19
H31 W5
NC#H31 XVDD_20
T8 NC#T8 XVDD_21 W7
V32 NC#V32 XVDD_22 W8
AA1
XVDD_31
XVDD_32 AA2 Wistron Corporation
AA3 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
XVDD_33 Taipei Hsien 221, Taiwan, R.O.C.
XVDD_34 AA4
XVDD_35 AA5
AA6 Title
XVDD_36
DIS_PX_Muxless XVDD_37
AA7
GPU_DPPWR/GND(5/5)
XVDD_38 AA8
71.0N13P.00U Size Document Number Rev
N13P-GS-A1-GP Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 87 of 108
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
1D5V_VGA_S0
VRAM2
VRAM1 MDA[63..0] 85,89
MDA[63..0] 85,89 K8 E3 MDA2
MDA21 VDD DQL0 MDA4
K8 VDD DQL0 E3 K2 VDD DQL1 F7
K2 F7 MDA17 N1 F2 MDA1
VDD DQL1 MDA23 VDD DQL2 MDA5
N1 VDD DQL2 F2 R9 VDD DQL3 F8
R9 F8 MDA19 B2 H3 MDA0
VDD DQL3 MDA20 VDD DQL4 MDA6
D B2 VDD DQL4 H3 D9 VDD DQL5 H8 D
D9 H8 MDA18 G7 G2 MDA3
VDD DQL5 MDA22 VDD DQL6 MDA7
G7 VDD DQL6 G2 R1 VDD DQL7 H7
R1 H7 MDA16 N9
VDD DQL7 VDD MDA11
N9 VDD DQU0 D7
D7 MDA29 A8 C3 MDA14
DQU0 MDA26 VDDQ DQU1 MDA8
A8 VDDQ DQU1 C3 A1 VDDQ DQU2 C8
A1 C8 MDA30 C1 C2 MDA15
VDDQ DQU2 MDA24 VDDQ DQU3 MDA9
C1 VDDQ DQU3 C2 C9 VDDQ DQU4 A7
C9 A7 MDA28 D2 A2 MDA13
VDDQ DQU4 MDA27 VDDQ DQU5 MDA10
D2 VDDQ DQU5 A2 E9 VDDQ DQU6 B8
E9 B8 MDA31 F1 A3 MDA12
VDDQ DQU6 MDA25 VDDQ DQU7
F1 VDDQ DQU7 A3 H9 VDDQ
H9 VDDQ H2 VDDQ DQSU C7 QSAP_1 85
H2 VDDQ DQSU C7 QSAP_3 85 DQSU# B7 QSAN_1 85
B7 QSAN_3 85 VRAM2_VREF H1
VRAM1_VREF DQSU# VREFDQ
H1 VREFDQ M8 VREFCA DQSL F3 QSAP_0 85
M8 F3 VRAM_ZQ2 L8 G3
VREFCA DQSL QSAP_2 85 ZQ DQSL# QSAN_0 85
VRAM_ZQ1 L8 G3 QSAN_2 85
ZQ DQSL#
2
ODT K1 FBA_ODT0 85
2
1
A2 CS# A3 RESET#
85,89 FBA_A3 N2 T2 FBA_RST 85,89 85,89 FBA_A4 P8
1
A3 RESET# A4
85,89 FBA_A4 P8 A4 85,89 FBA_A5 P2 A5
85,89 FBA_A5 P2 A5 85,89 FBA_A6 R8 A6 NC#T7 T7
85,89 FBA_A6 R8 A6 NC#T7 T7 85,89 FBA_A7 R2 A7 NC#L9 L9
85,89 FBA_A7 R2 A7 NC#L9 L9 85,89 FBA_A8 T8 A8 NC#L1 L1
85,89 FBA_A8 T8 A8 NC#L1 L1 85,89 FBA_A9 R3 A9 NC#J9 J9
85,89 FBA_A9 R3 A9 NC#J9 J9 85,89 FBA_A10 L7 A10/AP NC#J1 J1
C 85,89 FBA_A10 L7 A10/AP NC#J1 J1 85,89 FBA_A11 R7 A11 C
85,89 FBA_A11 R7 A11 85,89 FBA_A12 N7 A12/BC#
85,89 FBA_A12 N7 A12/BC# 85,89 FBA_A13 T3 A13 VSS J8
85,89 FBA_A13 T3 A13 VSS J8 M7 A15 VSS M1
M7 A15 VSS M1 VSS M9
VSS M9 VSS J2
VSS J2 85,89 FBA_BA0 M2 BA0 VSS P9
85,89 FBA_BA0 M2 BA0 VSS P9 85,89 FBA_BA1 N8 BA1 VSS G8
85,89 FBA_BA1 N8 G8 85,89 FBA_BA2 M3 B3 1D5V_VGA_S0
BA1 VSS 1D5V_VGA_S0 BA2 VSS
85,89 FBA_BA2 M3 BA2 VSS B3 VSS T1
VSS T1 VSS A9
1
VSS A9 85 CLKA0 J7 CK VSS T9
1
85 CLKA0 J7 T9 85 CLKA0# K7 E1 R8806
CK VSS R8803 CK# VSS 1K33R2F-GP
85 CLKA0# K7 CK# VSS E1 VSS P1 DIS_PX_Muxless
P1 DIS_PX_Muxless 1K33R2F-GP K9
VSS 85 FBA_CKE0 CKE
K9 G1
2
85 FBA_CKE0 CKE VSSQ
G1 F9
2
VSSQ VSSQ VRAM2_VREF
VSSQ F9 85 DQMA1 D3 DMU VSSQ E8
D3 E8 VRAM1_VREF E7 E2
85 DQMA3 DMU VSSQ 85 DQMA0 DML VSSQ
1
85 DQMA2 E7 DML VSSQ E2 1 VSSQ D8
1
D8 D1 R8805 C8807
VSSQ VSSQ
SCD01U16V2KX-3GP
D1 R8804 C8802 L3 B9 1K33R2F-GP DIS_PX_Muxless
VSSQ 85,89 -FBA_WE W E# VSSQ
SCD01U16V2KX-3GP
L3 B9 1K33R2F-GP DIS_PX_Muxless K3 B1 DIS_PX_Muxless
85,89 -FBA_WE 85,89 -FBA_CAS
2
W E# VSSQ CAS# VSSQ
85,89 -FBA_CAS K3 B1 DIS_PX_Muxless 85,89 -FBA_RAS J3 G9
2
CAS# VSSQ RAS# VSSQ
85,89 -FBA_RAS J3 G9
2
RAS# VSSQ
H5TQ1G63BFR-12C-GP
H5TQ1G63BFR-12C-GP
DIS_PX_Muxless
DIS_PX_Muxless
B VRAM = Hy2GX8,Sam1GX8,,Hy1GX8,Sam512X4,Sam2Gx8 B
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
1D5V_VGA_S0
SC1U10V2KX-1GP
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless DIS_PX
SC10U6D3V3MX-GP
1D5V_VGA_S0
1
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
GPU-VRAM1,2 (1/4)
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 88 of 108
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
1D5V_VGA_S0
VRAM3
MDA[63..0] 85,88 VRAM4
K8 E3 MDA63 MDA[63..0] 85,88
VDD DQL0 MDA59 MDA41
K2 VDD DQL1 F7 K8 VDD DQL0 E3
N1 F2 MDA60 K2 F7 MDA44
VDD DQL2 MDA58 VDD DQL1 MDA42
R9 VDD DQL3 F8 N1 VDD DQL2 F2
B2 H3 MDA61 R9 F8 MDA47
VDD DQL4 MDA56 VDD DQL3 MDA40
D9 VDD DQL5 H8 B2 VDD DQL4 H3
G7 G2 MDA62 D9 H8 MDA46
VDD DQL6 MDA57 VDD DQL5 MDA43
R1 VDD DQL7 H7 G7 VDD DQL6 G2
N9 R1 H7 MDA45
VDD MDA52 VDD DQL7
D DQU0 D7 N9 VDD D
A8 C3 MDA51 D7 MDA35
VDDQ DQU1 MDA55 DQU0 MDA37
A1 VDDQ DQU2 C8 A8 VDDQ DQU1 C3
C1 C2 MDA49 A1 C8 MDA34
VDDQ DQU3 MDA53 VDDQ DQU2 MDA36
C9 VDDQ DQU4 A7 C1 VDDQ DQU3 C2
D2 A2 MDA50 C9 A7 MDA33
VDDQ DQU5 MDA54 VDDQ DQU4 MDA38
E9 VDDQ DQU6 B8 D2 VDDQ DQU5 A2
F1 A3 MDA48 E9 B8 MDA32
VDDQ DQU7 VDDQ DQU6 MDA39
H9 VDDQ F1 VDDQ DQU7 A3
H2 VDDQ DQSU C7 QSAP_6 85 H9 VDDQ
DQSU# B7 QSAN_6 85 H2 VDDQ DQSU C7 QSAP_4 85
VRAM3_VREF H1 B7 QSAN_4 85
VREFDQ VRAM4_VREF DQSU#
M8 VREFCA DQSL F3 QSAP_7 85 H1 VREFDQ
VRAM_ZQ3 L8 G3 QSAN_7 85 M8 F3 QSAP_5 85
ZQ DQSL# VRAM_ZQ4 VREFCA DQSL
L8 ZQ DQSL# G3 QSAN_5 85
ODT K1 FBA_ODT1 85
2
2
R8901 85,88 FBA_A1 P7 85,88 FBA_A0 N3
A1 R8904 A0
243R2F-2-GP 85,88 FBA_A2 P3 A2 CS# L2 -FBA_CS1 85 85,88 FBA_A1 P7 A1
DIS_PX_Muxless 85,88 FBA_A3 N2 A3 RESET# T2 FBA_RST 85,88 243R2F-2-GP 85,88 FBA_A2 P3 A2 CS# L2 -FBA_CS1 85
85,88 FBA_A4 P8 DIS_PX_Muxless 85,88 FBA_A3 N2 T2 FBA_RST 85,88
1
A4 A3 RESET#
85,88 FBA_A5 P2 85,88 FBA_A4 P8
1
A5 A4
85,88 FBA_A6 R8 A6 NC#T7 T7 85,88 FBA_A5 P2 A5
85,88 FBA_A7 R2 A7 NC#L9 L9 85,88 FBA_A6 R8 A6 NC#T7 T7
85,88 FBA_A8 T8 A8 NC#L1 L1 85,88 FBA_A7 R2 A7 NC#L9 L9
85,88 FBA_A9 R3 A9 NC#J9 J9 85,88 FBA_A8 T8 A8 NC#L1 L1
85,88 FBA_A10 L7 A10/AP NC#J1 J1 85,88 FBA_A9 R3 A9 NC#J9 J9
85,88 FBA_A11 R7 A11 85,88 FBA_A10 L7 A10/AP NC#J1 J1
85,88 FBA_A12 N7 A12/BC# 85,88 FBA_A11 R7 A11
C 85,88 FBA_A13 T3 A13 VSS J8 85,88 FBA_A12 N7 A12/BC# C
M7 A15 VSS M1 85,88 FBA_A13 T3 A13 VSS J8
VSS M9 M7 A15 VSS M1
VSS J2 VSS M9
85,88 FBA_BA0 M2 BA0 VSS P9 VSS J2
85,88 FBA_BA1 N8 G8 1D5V_VGA_S0 85,88 FBA_BA0 M2 P9 1D5V_VGA_S0
BA1 VSS BA0 VSS
85,88 FBA_BA2 M3 BA2 VSS B3 85,88 FBA_BA1 N8 BA1 VSS G8
VSS T1 85,88 FBA_BA2 M3 BA2 VSS B3
1
A9 T1
VSS R8902 VSS R8906
85 CLKA1 J7 T9 A9
CK VSS 1K33R2F-GP VSS 1K33R2F-GP
85 CLKA1# K7 CK# VSS E1 DIS_PX_Muxless 85 CLKA1 J7 CK VSS T9 DIS_PX_Muxless
P1 85 CLKA1# K7 E1
VSS CK# VSS
85 FBA_CKE1 K9 P1
2
CKE VSS
G1 85 FBA_CKE1 K9
VSSQ VRAM3_VREF CKE VRAM4_VREF
F9 G1
VSSQ VSSQ
85 DQMA6 D3 E8 F9
DMU VSSQ VSSQ
1
85 DQMA7 E7 E2 85 DQMA4 D3 E8
DML VSSQ DMU VSSQ
1
D8 R8903 C8902 85 DQMA5 E7 E2 R8905 C8917
VSSQ DML VSSQ
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
D1 DIS_PX_Muxless 1K33R2F-GP DIS_PX_Muxless D8 DIS_PX_Muxless 1K33R2F-GP DIS_PX_Muxless
VSSQ VSSQ
L3 B9 D1
2
85,88 -FBA_WE WE# VSSQ VSSQ
85,88 -FBA_CAS K3 B1 85,88 -FBA_WE L3 B9
2
CAS# VSSQ WE# VSSQ
85,88 -FBA_RAS J3 G9 85,88 -FBA_CAS K3 B1
RAS# VSSQ CAS# VSSQ
85,88 -FBA_RAS J3 G9
RAS# VSSQ
H5TQ1G63BFR-12C-GP
H5TQ1G63BFR-12C-GP
DIS_PX_Muxless
DIS_PX_Muxless
B
1D5V_VGA_S0
VRAM = Hy2GX8,Sam1GX8,,Hy1GX8,Sam512X4,Sam2Gx8 FB CMD mapping Mode D-N12x VRAM = Hy2GX8,Sam1GX8,,Hy1GX8,Sam512X4,Sam2Gx8
B
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
SC1U10V2KX-1GP
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless DIS_PX
1D5V_VGA_S0
1D5V_VGA_S0
CLOSE TO THE MEMORY
SC10U6D3V3MX-GP
1
1
C8909 DIS_PX_Muxless
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
<Core Design>
A
DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX CLOSE TO THE MEMORY A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU-VRAM3,4 (2/4)
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 89 of 108
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
VRAM6
1D5V_VGA_S0
VRAM5 MDB[63..0] 85,91
MDB[63..0] 85,91 K8 E3 MDB29
MDB6 VDD DQL0 MDB25
K8 VDD DQL0 E3 K2 VDD DQL1 F7
K2 F7 MDB3 N1 F2 MDB30
VDD DQL1 MDB4 VDD DQL2 MDB27
N1 VDD DQL2 F2 R9 VDD DQL3 F8
R9 F8 MDB2 B2 H3 MDB28
VDD DQL3 MDB7 VDD DQL4 MDB26
B2 VDD DQL4 H3 D9 VDD DQL5 H8
D9 H8 MDB0 G7 G2 MDB31
VDD DQL5 MDB5 VDD DQL6 MDB24
G7 VDD DQL6 G2 R1 VDD DQL7 H7
D R1 H7 MDB1 N9 D
VDD DQL7 VDD MDB9
N9 VDD DQU0 D7
D7 MDB20 A8 C3 MDB12
DQU0 MDB22 VDDQ DQU1 MDB8
A8 VDDQ DQU1 C3 A1 VDDQ DQU2 C8
A1 C8 MDB16 C1 C2 MDB14
VDDQ DQU2 MDB23 VDDQ DQU3 MDB10
C1 VDDQ DQU3 C2 C9 VDDQ DQU4 A7
C9 A7 MDB18 D2 A2 MDB13
VDDQ DQU4 MDB21 VDDQ DQU5 MDB11
D2 VDDQ DQU5 A2 E9 VDDQ DQU6 B8
E9 B8 MDB19 F1 A3 MDB15
VDDQ DQU6 MDB17 VDDQ DQU7
F1 VDDQ DQU7 A3 H9 VDDQ
H9 VDDQ H2 VDDQ DQSU C7 QSBP_1 85
H2 VDDQ DQSU C7 QSBP_2 85 DQSU# B7 QSBN_1 85
B7 QSBN_2 85 VRAM6_VREF H1
VRAM5_VREF DQSU# VREFDQ
H1 VREFDQ M8 VREFCA DQSL F3 QSBP_3 85
M8 F3 QSBP_0 85 VRAM_ZQ6 L8 G3 QSBN_3 85
VRAM_ZQ5 VREFCA DQSL ZQ DQSL#
L8 ZQ DQSL# G3 QSBN_0 85
ODT K1 FBB_ODT0 85
2
2
ODT K1 FBB_ODT0 85 85,91 FBB_A0 N3 A0
R9001 85,91 FBB_A0 N3 R9002 85,91 FBB_A1 P7
A0 A1
DIS_PX_Muxless 243R2F-2-GP 85,91 FBB_A1 P7 A1 DIS_PX_Muxless 243R2F-2-GP 85,91 FBB_A2 P3 A2 CS# L2 -FBB_CS0 85
85,91 FBB_A2 P3 A2 CS# L2 -FBB_CS0 85 85,91 FBB_A3 N2 A3 RESET# T2 FBB_RST 85,91
85,91 FBB_A3 N2 T2 FBB_RST 85,91 85,91 FBB_A4 P8
1
1
A3 RESET# A4
85,91 FBB_A4 P8 A4 85,91 FBB_A5 P2 A5
85,91 FBB_A5 P2 A5 85,91 FBB_A6 R8 A6 NC#T7 T7
85,91 FBB_A6 R8 A6 NC#T7 T7 85,91 FBB_A7 R2 A7 NC#L9 L9
85,91 FBB_A7 R2 A7 NC#L9 L9 85,91 FBB_A8 T8 A8 NC#L1 L1
85,91 FBB_A8 T8 A8 NC#L1 L1 85,91 FBB_A9 R3 A9 NC#J9 J9
85,91 FBB_A9 R3 A9 NC#J9 J9 85,91 FBB_A10 L7 A10/AP NC#J1 J1
85,91 FBB_A10 L7 A10/AP NC#J1 J1 85,91 FBB_A11 R7 A11
85,91 FBB_A11 R7 A11 85,91 FBB_A12 N7 A12/BC#
C N7 T3 J8 C
85,91 FBB_A12 A12/BC# 85,91 FBB_A13 A13 VSS
85,91 FBB_A13 T3 A13 VSS J8 M7 A15 VSS M1
M7 A15 VSS M1 VSS M9
VSS M9 VSS J2
VSS J2 85,91 FBB_BA0 M2 BA0 VSS P9
85,91 FBB_BA0 M2 BA0 VSS P9 85,91 FBB_BA1 N8 BA1 VSS G8
85,91 FBB_BA1 N8 G8 1D5V_VGA_S0 85,91 FBB_BA2 M3 B3
BA1 VSS BA2 VSS
85,91 FBB_BA2 M3 B3 T1
BA2 VSS VSS
VSS T1 VSS A9
1
A9 85 CLKB0 J7 T9 1D5V_VGA_S0
VSS R9003 CK VSS
85 CLKB0 J7 T9 85 CLKB0# K7 E1
CK VSS 1K33R2F-GP CK# VSS
85 CLKB0# K7 E1 P1
CK# VSS VSS
1
P1 85 FBB_CKE0 K9
VSS CKE R9006
85 FBB_CKE0 K9 G1
2
CKE VSSQ 1K33R2F-GP
VSSQ
G1
VSSQ
F9 DIS_PX_Muxless
F9 VRAM5_VREF 85 DQMB1 D3 E8
VSSQ DMU VSSQ
85 DQMB2 D3 E8 DIS_PX_Muxless 85 DQMB3 E7 E2
2
DMU VSSQ DML VSSQ
1
85 DQMB0 E7 DML VSSQ E2 VSSQ D8
1
D8 R9004 C9002 D1 VRAM6_VREF
VSSQ VSSQ
SCD01U16V2KX-3GP
D1 1K33R2F-GP L3 B9
VSSQ 85,91 -FBB_WE WE# VSSQ
1
85,91 -FBB_WE L3 B9 85,91 -FBB_CAS K3 B1
2
WE# VSSQ CAS# VSSQ
1
K3 B1 J3 G9 R9005 C9017
85,91 -FBB_CAS 85,91 -FBB_RAS
2
CAS# VSSQ RAS# VSSQ
SCD01U16V2KX-3GP
J3 G9 1K33R2F-GP DIS_PX_Muxless
85,91 -FBB_RAS RAS# VSSQ
DIS_PX_Muxless
2
DIS_PX_Muxless DIS_PX_Muxless H5TQ1G63BFR-12C-GP
2
H5TQ1G63BFR-12C-GP
DIS_PX_Muxless
DIS_PX_Muxless
B
VRAM = Hy2GX8,Sam1GX8,Hynix1GX8,Sam2GX8 B
VRAM = Hy2GX8,Sam1GX8,Hynix1GX8,Sam2GX8
VRAM SAMSUNG 1Gb VR.1GB0B.006
VRAM HYNIX 1Gb 72.51G63.C0U/VR.1GB0G.005
VRAM HYNIX 2Gb VR.2GB0G.001
1D5V_VGA_S0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_VGA_S0
1
1
SC1U10V2KX-1GP
SC10U6D3V3MX-GP
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless DIS_PX
1
1D5V_VGA_S0
C9009 DIS_PX_Muxless
CLOSE TO THE MEMORY
2
A
CLOSE TO THE MEMORY A
<Variant Name>
1
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
GPU-VRAM5,6 (3/4)
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 90 of 108
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
VRAM7
1D5V_VGA_S0
MDB[63..0] 85,90 VRAM8
K8 E3 MDB32 MDB[63..0] 85,90
VDD DQL0 MDB37 MDB56
K2 VDD DQL1 F7 K8 VDD DQL0 E3
N1 F2 MDB33 K2 F7 MDB60
VDD DQL2 MDB38 VDD DQL1 MDB57
R9 VDD DQL3 F8 N1 VDD DQL2 F2
B2 H3 MDB34 R9 F8 MDB62
VDD DQL4 MDB39 VDD DQL3 MDB59
D9 VDD DQL5 H8 B2 VDD DQL4 H3
G7 G2 MDB35 D9 H8 MDB61
VDD DQL6 MDB36 VDD DQL5 MDB58
R1 VDD DQL7 H7 G7 VDD DQL6 G2
N9 R1 H7 MDB63
VDD MDB52 VDD DQL7
D DQU0 D7 N9 VDD D
A8 C3 MDB49 D7 MDB46
VDDQ DQU1 MDB55 DQU0 MDB42
A1 VDDQ DQU2 C8 A8 VDDQ DQU1 C3
C1 C2 MDB51 A1 C8 MDB47
VDDQ DQU3 MDB54 VDDQ DQU2 MDB40
C9 VDDQ DQU4 A7 C1 VDDQ DQU3 C2
D2 A2 MDB50 C9 A7 MDB44
VDDQ DQU5 MDB53 VDDQ DQU4 MDB43
E9 VDDQ DQU6 B8 D2 VDDQ DQU5 A2
F1 A3 MDB48 E9 B8 MDB45
VDDQ DQU7 VDDQ DQU6 MDB41
H9 VDDQ F1 VDDQ DQU7 A3
H2 VDDQ DQSU C7 QSBP_6 85 H9 VDDQ
DQSU# B7 QSBN_6 85 H2 VDDQ DQSU C7 QSBP_5 85
VRAM7_VREF H1 B7 QSBN_5 85
VREFDQ VRAM8_VREF DQSU#
M8 VREFCA DQSL F3 QSBP_4 85 H1 VREFDQ
VRAM_ZQ7 L8 G3 QSBN_4 85 M8 F3 QSBP_7 85
ZQ DQSL# VRAM_ZQ8 VREFCA DQSL
L8 ZQ DQSL# G3 QSBN_7 85
2
ODT K1 FBB_ODT1 85
2
R9101 85,90 FBB_A0 N3 K1
A0 ODT FBB_ODT1 85
DIS_PX_Muxless 243R2F-2-GP 85,90 FBB_A1 P7 R9104 85,90 FBB_A0 N3
A1 A0
85,90 FBB_A2 P3 A2 CS# L2 -FBB_CS1 85 243R2F-2-GP 85,90 FBB_A1 P7 A1
85,90 FBB_A3 N2 T2 FBB_RST 85,90 85,90 FBB_A2
DIS_PX_Muxless P3 L2 -FBB_CS1 85
1
A3 RESET# A2 CS#
85,90 FBB_A4 P8 85,90 FBB_A3 N2 T2 FBB_RST 85,90
1
A4 A3 RESET#
85,90 FBB_A5 P2 A5 85,90 FBB_A4 P8 A4
85,90 FBB_A6 R8 A6 NC#T7 T7 85,90 FBB_A5 P2 A5
85,90 FBB_A7 R2 A7 NC#L9 L9 85,90 FBB_A6 R8 A6 NC#T7 T7
85,90 FBB_A8 T8 A8 NC#L1 L1 85,90 FBB_A7 R2 A7 NC#L9 L9
85,90 FBB_A9 R3 A9 NC#J9 J9 85,90 FBB_A8 T8 A8 NC#L1 L1
85,90 FBB_A10 L7 A10/AP NC#J1 J1 85,90 FBB_A9 R3 A9 NC#J9 J9
85,90 FBB_A11 R7 A11 85,90 FBB_A10 L7 A10/AP NC#J1 J1
85,90 FBB_A12 N7 A12/BC# 85,90 FBB_A11 R7 A11
C 85,90 FBB_A13 T3 A13 VSS J8 85,90 FBB_A12 N7 A12/BC# C
M7 A15 VSS M1 85,90 FBB_A13 T3 A13 VSS J8
VSS M9 M7 A15 VSS M1
VSS J2 VSS M9
85,90 FBB_BA0 M2 BA0 VSS P9 VSS J2
85,90 FBB_BA1 N8 BA1 VSS G8 85,90 FBB_BA0 M2 BA0 VSS P9
85,90 FBB_BA2 M3 BA2 VSS B3 85,90 FBB_BA1 N8 BA1 VSS G8
T1 1D5V_VGA_S0 85,90 FBB_BA2 M3 B3 1D5V_VGA_S0
VSS BA2 VSS
VSS A9 VSS T1
85 CLKB1 J7 CK VSS T9 VSS A9
1
85 CLKB1# K7 CK# VSS E1 85 CLKB1 J7 CK VSS T9
P1 R9102 85 CLKB1# K7 E1 R9105
VSS 1K33R2F-GP CK# VSS 1K33R2F-GP
85 FBB_CKE1 K9 CKE DIS_PX_Muxless VSS P1 DIS_PX_Muxless
VSSQ G1 85 FBB_CKE1 K9 CKE
F9 G1
2
VSSQ VSSQ
85 DQMB6 D3 DMU VSSQ E8 VSSQ F9
85 DQMB4 E7 E2 VRAM7_VREF 85 DQMB5 D3 E8 VRAM8_VREF
DML VSSQ DMU VSSQ
VSSQ D8 1 85 DQMB7 E7 DML VSSQ E2
1
VSSQ D1 VSSQ D8
1
L3 B9 R9103 C9118 D1 R9106 C9117
85,90 -FBB_W E WE# VSSQ VSSQ
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
K3 B1 DIS_PX_Muxless 1K33R2F-GP DIS_PX_Muxless L3 B9 1K33R2F-GP DIS_PX_Muxless
85,90 -FBB_CAS CAS# VSSQ 85,90 -FBB_W E WE# VSSQ
85,90 -FBB_RAS J3 G9 85,90 -FBB_CAS K3 B1 DIS_PX_Muxless
2
RAS# VSSQ CAS# VSSQ
85,90 -FBB_RAS J3 G9
2
2
RAS# VSSQ
H5TQ1G63BFR-12C-GP
H5TQ1G63BFR-12C-GP
DIS_PX_Muxless
DIS_PX_Muxless
B 1D5V_VGA_S0 VRAM = Hy2GX8,Sam1GX8,Hynix1GX8,Sam2GX8 VRAM = Hy2GX8,Sam1GX8,Hynix1GX8,Sam2GX8 B
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1
C9109
DIS_PX_Muxless SC10U6D3V3MX-GP
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless DIS_PX DIS_PX
2
1D5V_VGA_S0
CLOSE TO THE MEMORY
1
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
<Variant Name>
A DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU-VRAM7,8 (4/4)
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 91 of 108
5 4 3 2 1
5 4 3 2 1
5V_CHARGER 3D3V_VGA_S0 VGA boot voltage setting 1107 SC 5V_CHARGER 5V_VGACORE 5V_CHARGER 5V_VGACORE_1
PG9205
1 2 PG9211
1
1 2
PR9201 GAP-CLOSE-PWR
1
10R2F-L-GP PR9243 PR9240 PR9241 PR9242 PG9206 GAP-CLOSE-PWR
5V_CHARGER
DIS_PX_Muxless PG9210
1 2
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1114 SC 5V_CHARGER DY 1 2
2
GAP-CLOSE-PWR
1
1208 SC for Power PG9207 GAP-CLOSE-PWR
2
DIS_PX_Muxless PR9204 PR9203 DY 1 2 PG9209
1
36R3F-GP 5K11R2F-L1-GP
DIS_PX_Muxless 1 2
SCD1U10V2KX-4GP
PR9202 H_VID2 PR9212 PR9214 PR9216 GAP-CLOSE-PWR
150R2F-1-GP PC9201 H_VID3 16K9R2D-GP 3K09R2F-1-GP 11K3R2D-GP PG9208 GAP-CLOSE-PWR
DY
2
H_VID4 DIS_PX_Muxless DIS_PX_Muxless DIS_PX_Muxless 1 2
H_VID5 PG9212
2
GAP-CLOSE-PWR 1 2
PG9214
1
D D
GND_1313M PU9201 1 2 GAP-CLOSE-PWR
D
2
VID2
3 H_VID3 86
1313M_DB_0 VID3
19 2 H_VID4 86
S
1313M_DB_1 DB0 VID4
20 1 H_VID5 86 1108 SC
S
2
DY 0R2J-2-GP VGACORE_VSS_SENSE_N 1 PR9219 2 VGACORE_GND_SENSE 83
1121 SC PR9245 VT1312MFQX-GP DY 0R0402-PAD
0R2J-2-GP
PC9251
DIS_PX_Muxless 1 2 DIS_PX_Muxless
SC1200P50V2KX-1GP
DIS_PX_Muxless GND_1313M
1
1
PR9211 100KR2D-1-GP
DIS_PX_Muxless PR9232 DGPU_PWROK 22,93
1
7K87R2F-GP 1D05V_VTT
2
1
GND_1313M PR9210 DIS_PX_Muxless
1 PR9207 2 15KR2D-GP PC9202
DIS_PX_Muxless DIS_PX_Muxless
2
2
1 2 1220 SC DIS_PX_Muxless 0R0402-PAD 100R2F-L1-GP-U
2
GAP-CLOSE-PWR
DIS_PX_Muxless
86 DGPUHOT# 1 PR9246 2
GND_1313M 0R2J-2-GP VGACORE_VSS_SENSE_N 5V_VGACORE_1
DY 1128 SC 1 PR9221 2
GND_1313M 100R2F-L1-GP-U
Change NETNAME
DIS_PX_Muxless
2011.07.22 wayler
SCD1U10V2KX-5GP
3D3V_VGA_S0
PC9211
PC9212
PC9213
PC9214
PC9215
PC9216
EC9201
1108 SC
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1
1
PR9208 PR9209
1K91R2F-1-GP 1K91R2F-1-GP VGA_CORE
DIS_PX_Muxless DIS_PX_Muxless DY
2
PR9222 PR9223
2
1313M_IDES_N 1 2 1 2
G4
G5
G6
C6
C5
C4
E4
E5
E6
DIS_PX_Muxless DIS_PX_Muxless
J4
J5
J6
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1
PC9220
PC9224
PC9225
PC9226
PC9227
PC9233
PC9234
PC9235
PC9236
PC9237
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
1
1K1R2F-GP PWR_AXG_IDES_1_N A5 H1 PWR_VGA_VX_R
PWR_AXG_IDES_1_P IDES_N VX#H1
A4 H2
1313M_IDES_P IDES_P VX#H2
H3
2
2
VX#H3
H4
1313M_DB_0 VX#H4 IND-200NH-2-GP
A6 H5
1313M_DB_1 DB0 VX#H5
A1 H6 4 3
1313M_DB_2 DB1 VX#H6
B1 D1
PWR_AXG_IDES_P_1 DB2 VX#D1
D2
1313M_SPHASE_0 VX#D2
B6 D3
SPHASE VX#D3
D4 1 2
VX#D4
DIS_PX_Muxless D5
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
5V_VGACORE_1 PWR_AVDD_0 VX#D5 PL9201
A3 D6
AVDD VX#D6
1
PC9228
PC9229
PC9230
PC9231
PC9232
PC9238
PC9239
PC9240
PC9241
PC9242
B3 F6
1
PC9205 AGND VX#F6
B4 F5
AGND VX#F5 DIS_PX_Muxless
1
SC6800P25V2KX-1GP B5 F4
PR9224
2
B
PR9225 PR9226 AGND VX#F4 B
F3
2
10R2J-2-GP VX#F3
1 2 1 2 DIS_PX_Muxless VX#F2
F2
AGND
AGND
F1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2K8R2F-GP VX#F1
2
6K81R2F-1-GP
VT1317SFCX-001-GP
A2
B2
E3
E2
E1
C1
C2
C3
J3
J2
J1
G3
G2
G1
1
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PG9201 DY DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PC9218
PC9253
PC9221
PC9222
PC9223
PC9217
EC9202
EC9203
PC9243
PC9244
PC9245
PC9246
PC9247
PC9248
PC9249
PC9250
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1
1
1
GAP-CLOSE-PWR
GND_1317S_GPU_1 DY
PR9227 PR9228
2
2
2
1 2 1 2
G4
G5
G6
C6
C5
C4
E4
E5
E6
J4
J5
J6
1
VX#H3
H4
1313M_DB_0 VX#H4
A6 H5
1313M_DB_1 DB0 VX#H5
A1 H6
1313M_DB_2 DB1 VX#H6
B1 D1
DB2 VX#D1
D2
PWR_AXG_IDES_P_2 1313M_SPHASE_1 VX#D2
B6 D3
SPHASE VX#D3
DIS_PX_Muxless VX#D4
D4
D5
5V_VGACORE PWR_AVDD_1 VX#D5
A3 D6
1
AVDD VX#D6
B3 F6
PC9208 AGND VX#F6
B4 F5
AGND VX#F5
1
A SC6800P25V2KX-1GP B5 F4 A
2
F1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
6K81R2F-1-GP 2K8R2F-GP
VT1317SFCX-001-GP
Wistron Corporation
A2
B2
E3
E2
E1
C1
C2
C3
J3
J2
J1
G3
G2
G1
1
Title
DIS_PX_Muxless VT1313M VGA_CORE
PG9202
1 2 Size Document Number Rev
GAP-CLOSE-PWR BAD40_HC 1
GND_1317S_GPU_2 Date: Thursday, April 12, 2012 Sheet 92 of 108
5 4 3 2 1
5 4 3 2 1
R9301
0R2J-2-GP
1 2 84.00460.037
DY
3D3V_VGA_S0 1D5V_S3 1D5V_VGA_S0
D
2nd = 84.08062.037 D
S DIS_PX_Muxless U9301 1D05V_LAN 1D05V_VGA_S0
3D3V_S0
D 8 D S 1 U9302
SC10U6D3V3MX-GP
Q9302 7 D S 2 QM3006S-GP
G
DMP2130L-7-GP TC9303 6 D S 3 TC9302 84.03006.A37
1
SCD1U16V2KX-3GP
R9302 84.02130.031 ST100U6D3VBM-5GP 5 D G 4 C9302 ST100U6D3VBM-5GP 8 D S 1
1
100KR2J-1-GP
DIS_PX_Muxless 2ND = 84.03413.A31 77.C1071.081 C9301 77.C1071.081 TC9301 7 D S 2
SIR460DP-T1-GE3-GP ST220U2VBM-3GP 6 D S 3
2
DY DIS_PX_Muxless DIS_PX_MuxlessDIS_PX_Muxless DIS_PX 5 D
2
2
3.3V_ALW _1 G
DIS_PX_Muxless
2nd = 77.C1071.18L 77.C2271.26L
4
2nd = 77.C1071.18L 3rd = 77.81071.06L 2nd = 77.C2271.38L
1
RUNON_R_1
4
Q9301 R9304 3rd = 77.81071.06L
2N7002KDW -GP 100R2J-2-GP
84.2N702.A3F DIS_PX_Muxless RUNON_R_1
2nd = 84.2N702.F3F
2
DIS_PX_Muxless DIS_PX_Muxless
1
1
3.3V_RUN_VGA_1 C9303
SC6800P25V2KX-1GP
2
R9308 DY
10KR2F-2-GP
3D3V_S0 1 2
C DIS_PX_Muxless C
DGPU_PWR_EN
SCD22U25V3KX-GP 1 C9308
2
18 DGPU_PW R_EN# G DIS_PX_Muxless
DIS_PX_Muxless D
S
RUNON_R_1
Q9305
2N7002K-2-GP
84.2N702.J31 U9304 1125 SC Del R9309
22,92 DGPU_PW ROK G5938TL1U-GP
2ND = 84.07002.I31 74.05938.09P 5V_S5
1D05V_VGA_S0
1D5V_VGA_S0 6 1
EN VCC
5 2
DC2 GND
4 3
DC1 HV
DIS_PX_Muxless
B B
1D8V_S0 to 1D8V_VGA_S0
1125 SC Del Q9306
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C9401 C9403 C9402 RN9408
3D3V_S0 17 LVDSA_DATA0 1 4 LVDSA_DATA0_R 49
SC2200P50V2KX-2GP
17 LVDSA_DATA0# 2 3 LVDSA_DATA0_R# 49
2
LVDS_PX LVDS_PX
LVDS_PX SRN0J-6-GP
U9401
LVDS_UMA
49
50
51
52
53
54
55
56
57
ST3DV520EQTR-1-GP
RN9409
GND
VDD
GND
GND
VDD
GND
NC#51
NC#52
SEL2
17 LVDSA_DATA1 1 4 LVDSA_DATA1_R 49
1 17 LVDSA_DATA1# 2 3 LVDSA_DATA1_R# 49
GND
84 GPU_LVDSA_TX0 48 2 LVDSA_DATA0_R 49
D A0 A D
84 GPU_LVDSA_TX0# 47 3 LVDSA_DATA0_R# 49 SRN0J-6-GP
B0 B
17 LVDSA_DATA0 46 4 3D3V_S0
A1 VDD
17 LVDSA_DATA0# 45
B1 NC#5
5 LVDS_UMA
44 6
GND GND
84 GPU_LVDSA_TX1 43 7 LVDSA_DATA1_R 49
C0 C
84 GPU_LVDSA_TX1# 42 8 LVDSA_DATA1_R# 49
D0 D
17 LVDSA_DATA1 41 9
C1 GND RN9410
17 LVDSA_DATA1# 40 10 3D3V_S0
D1 VDD
39 11 LVDSA_DATA2_R 49 17 LVDSA_DATA2 1 8 LVDSA_DATA2_R 49
GND E
3D3V_S0 38 12 LVDSA_DATA2_R# 49 17 LVDSA_DATA2# 2 7 LVDSA_DATA2_R# 49
VDD F
84 GPU_LVDSA_TX2 37 13 17 LVDSA_CLK 3 6 LVDSA_CLK_R 49
E0 GND
84 GPU_LVDSA_TX2# 36 F0 G 14 LVDSA_CLK_R 49 17 LVDSA_CLK# 4 5 LVDSA_CLK_R# 49
17 LVDSA_DATA2 35 E1 LVDS_PX H 15 LVDSA_CLK_R# 49
17 LVDSA_DATA2# 34 16 SRN0J-7-GP
F1 GND
33 GND SEL1 17 DGPU_SELECT# 18,95,103 LVDS_UMA
84 GPU_LVDSA_TXC 32 G0 VDD 18 3D3V_S0
84 GPU_LVDSA_TXC# 31 H0 DDC1 19 LVDS_DDC_DATA 49
17 LVDSA_CLK 30 20 LVDS_DDC_CLK 49
G1 DDC2
DDC2_1
DDC1_1
DDC2_0
DDC1_0
17 LVDSA_CLK# 29 H1
GND
GND
GND
VDD
28
27
26
25
24
23
22
21
3D3V_S0
1110 SC
17 LVDS_DDC_CLK_R
C 17 LVDS_DDC_DATA_R C
86 GPU_LVDS_CLK 3D3V_S0
86 GPU_LVDS_DATA
1
1
R9401 R9402
2
2
RN9407
SEL1 Control A~H 17 LVDS_DDC_CLK_R 3 2 LVDS_DDC_CLK 49
17 LVDS_DDC_DATA_R 4 1 LVDS_DDC_DATA 49
SEL2 Control DDC1,DDC2 SRN0J-6-GP
LVDS_UMA
1
0308 -1 2
GND VCC
5
17 L_BKLT_EN
1
B1 S
6
1 2 3 4 LBKLT_CTL 1 6 R9408
86 VGA_LBKLT_CTL B0 A 17 LVDS_VDD_EN B1 S
1
SC100P50V2JN-3GP
0R0402-PAD 2 5 100KR2J-1-GP
GND VCC R9411 NC7SB3157P6X-1GP
17 L_BKLT_CTRL LVDS_PX 1 B1 S 6
1
2
73.03157.C0H DY
NC7SB3157P6X-1GP
2
2
73.03157.C0H
18,95,103 DGPU_SELECT#
18,95,103 DGPU_SELECT#
18 DGPU_PWM_SELECT# 1 R9414 2 dGPU_SELECT#_PWM
0R2J-2-GP
DY
0308 -1
RN9412
5 4
17 L_BKLT_EN 6 3 PANEL_BLEN 27
7 2 LCDVDD_EN 49
17 LVDS_VDD_EN
A 17 L_BKLT_CTRL 8 1 LBKLT_CTL 49 A
SRN0J-7-GP
<Variant Name>
UMA
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LVDS_Switch
Size Document Number Rev
Custom
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 94 of 108
5 4 3 2 1
5 4 3 2 1
3D3V_S0
D D
SCD1U10V2KX-5GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
3D3V_S0
1
C9501
C9503
C9504
C9505
18,94,103 DGPU_SELECT#
PX
PX
C9502
C9507
C5613
C9506
PX PX
28
29
30
31
32
33
SCD1U10V2KX-5GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
U9501
1
SEL2
GND
VDD
GND
VDD
GND
27,29,51,104,106 BD_IN#
2
27 1 CRT_RED_R
86 VGA_CRT_RED 0B1 A0 CRT_GREEN_R
33
32
31
30
29
28
17 CRT_RED 26 0B2 A1 2
25 3 U9502
86 VGA_CRT_GREEN 1B1 GND
24 4
SEL2
GND
VDD
GND
VDD
GND
17 CRT_GREEN 1B2 VDD 3D3V_S0
3D3V_S0 23 5 CRT_BLUE_R
VDD A2 CRT_HSYNC_CON
86 VGA_CRT_BLUE 22 2B1 A3 6
21 PX 7 CRT_VSYNC_CON CRT_RED_R 1 27
17 CRT_BLUE 2B2 A4 A0 0B1 CRT_RED_R_DOCK 104
86 VGA_CRT_HSYNC 20 8 DGPU_SELECT# 18,94,103 CRT_GREEN_R 2 26
3B1 SEL1 A1 0B2 CRT_RED_R_MB 50
17 CRT_HSYNC 19 9 DDCDATA 3 25
3B2 A5 GND 1B1 CRT_GREEN_R_DOCK 104
86 VGA_CRT_VSYNC 18 10 DDCCLK 3D3V_S0 4 24
4B1 A6 VDD 1B2 CRT_GREEN_R_MB 50
17 CRT_VSYNC 17 11 CRT_BLUE_R 5 23 3D3V_S0
4B2 GND CRT_HSYNC_CON A2 VDD
6 A3 2B1 22 CRT_BLUE_R_DOCK 104
CRT_VSYNC_CON 7 21
VDD
A4 2B2 CRT_BLUE_R_MB 50
6B2
6B1
5B2
5B1
27,29,51,104,106 BD_IN# 8 20 CRT_HSYNC_CON_DOCK_C
DDCDATA SEL1 3B1 CRT_HSYNC_CON_MB_C
9 A5 3B2 19
PI3V712-AZLEX-GP DDCCLK 10 18 CRT_VSYNC_CON_DOCK_C
16
15
14
13
12
A6 4B1 CRT_VSYNC_CON_MB_C
73.03712.B03 11 GND 4B2 17
2nd = 73.07000.003
VDD
5B1
5B2
6B1
6B2
C C
73.03712.B03
2nd = 73.07000.003
3D3V_S0 PI3V712-AZLEX-GP
12
13
14
15
16
17 CRT_DDC_CLK
86 VGA_CRT_DDCCLK
SEL->L(An=nB1),H(An=nB2)
17 CRT_DDC_DATA
86 VGA_CRT_DDCDATA
SEL1 Control A0~A4 3D3V_S0
5V_S0
SB 0915
U9503A
14
1
RN9506
2 3 CRT_VSYNC_CON R9504
17 CRT_VSYNC
1 4 CRT_HSYNC_CON CRT_HSYNC_CON_DOCK_C 2 3 CRT_HSYNC_CON_DOCK_R 1 2
17 CRT_HSYNC CRT_HSYNC_CON_DOCK 104
4D99R2F-GP
SRN0J-6-GP
UMA TC74VHCT125AFTQK2M-GP
7
Dock
RN9502
1 8 5V_S0
2 7 CRT_RED_R
B 17 CRT_RED CRT_GREEN_R B
17 CRT_GREEN 3 6
4 5 CRT_BLUE_R
17 CRT_BLUE
U9503B
14
SRN0J-7-GP
2 3 DDCCLK
17 CRT_DDC_CLK
1 4 DDCDATA
17 CRT_DDC_DATA
SRN0J-6-GP
UMA 5V_S0
U9503C
14
10
R9505
CRT_VSYNC_CON_DOCK_C 9 8 CRT_VSYNC_CON_DOCK_R 1 2 CRT_VSYNC_CON_DOCK 104
4D99R2F-GP
TC74VHCT125AFTQK2M-GP
Dock
7
5V_S0
A <Variant Name> A
U9503D
14
13
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
CRT_VSYNC_CON_MB_C 12 11 CRT_VSYNC_CON_MB_R 1 R9507 2 Taipei Hsien 221, Taiwan, R.O.C.
CRT_VSYNC_CON_MB 50
10R2J-2-GP
Title
TC74VHCT125AFTQK2M-GP
CRT_Switch
7
SSID = SDIO
D D
C C
B B
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
TOUCH PANEL
Size Document Number Rev
A2
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 96 of 108
5 4 3 2 1
5 4 3 2 1
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
3D3V_S0
HT65B95X975R29-S-GP
3D3V_AUX_S5 1 AFTP7
D H2 D
H1 H3 H4 H5 H11 H12 H13 AFTP8
3D3V_S5 1
1
EC9701 EC9702 DY EC9703 EC9704 EC9705 EC9707 DY EC9708 EC9709 EC9710 DY EC9711 EC9712 EC9713 EC9714 EC9715 EC9716 5V_S5 1 AFTP9
3G
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
3G 3G 1 AFTP10
SC68P50V2JN-1GP
1
2
19,27 PM_PWRBTN#
-1. 4/11 H_CPUPWRGD
1 AFTP12
27,36,107 S5_ENABLE
5,18,27,31,32,36,65,66,71,75,82,83,105 PLT_RST# 1 AFTP13
放 放 Dimm Door打
Test Point放 打打打打打打
1125 SC for RF
0306 -1 for ME AD_JK_IN AD_DOCK 1229 SC BATA+
5V_CHARGER 1125 SC for RF 1128 SC for EMI 1223 SC
H6 H7 H8
STF237R128H42-1-GP
STF237R128H42-1-GP
STF237R128H42-1-GP
1
1
EC9717 EC9718 EC9719 EC9775 EC9720 DY EC9721 DY EC9722
1
DY EC9723 EC9724 EC9725 EC9726 EC9727 EC9728 EC9729 EC9730 EC9736 FC9750
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
DY DY
2
2
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1
2
DY DY
5V_CHARGER
1125 SC for RF 0207 SD 0207 SD
1
1
EC9741
1
1
EC9731 EC9732 EC9733 EC9734 EC9735 EC9738 EC9739 EC9740 DY EC9758 EC9759 EC9760 DY
VGA
1
DY DY DY DY DY DY DY EC9761 EC9762 EC9763 EC9767 EC9764 EC9765 EC9766 EC9770 EC9776
SCD1U10V2KX-5GP
2
DY DY DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
2
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
2
H18
2nd = 34.4CQ02.101 HOLE256R115-GP
PX_DIS PX_DIS
1
1223 SC 1227 SC
0312 -1 for ME
3D3V_PWR 3D3V_S5 3D3V_S0
1128 SC for EMI VCC_GFXCORE
1114 SC for EMI 0207 SD
0207 SD
PWR_DCBATOUT_1D05V
1125 SC for RF H14
0207 SD
1
1
STF217R50H294-1-GP FC9756 FC9760 EC9744 EC9745 EC9746 EC9747 EC9748 EC9749 EC9750 EC9751 EC9752 EC9753 EC9773 EC9774 EC9754 EC9755 EC9756 EC9757
DY DY DY DY DY DY 3G DY DY DY DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
2
1
SCD1U25V3KX-GP
AUD_AGND AUD_AGND
SC2200P50V2KX-2GP
2
3G_mSATA
B
0609 EC release B
0207 SD DCBATOUT
0315 -1 for Layout 0207 SD
5V_HDMI_S0 1D8V_PWR
1223 SC
DCBATOUT DCBATOUT
1
1
EC9768 EC9769 FC9736 FC9737 FC9751 FC9752 FC9753 FC9754 FC9755
DY 3G 3G DY DY
1
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
EC9772 FC9759
FC9758
SC2200P50V2KX-2GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
2
2
1
SCD1U10V2KX-5GP
2
2
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
2
AUD_AGND AUD_AGND
1
EC9777
1
ST15U25VDM-1-GP
PT9702
FC9702 FC9712 FC9711
1
1
FC9718 FC9717 FC9716 FC9738 FC9727 FC9728 FC9729 FC9730 FC9731 FC9732 FC9733 FC9734 FC9735
SCD1U10V2KX-5GP
2
SCD1U25V3KX-GP
3G 3G 3G 3G 3G 3G 3G 3G 3G 3G 3G 3G
SC2200P50V2KX-2GP
SC68P50V2JN-1GP
2
2
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
2
2
1125 SC for RF
A A
1D5V_S0
1114 SC for EMI
3D3V_MINI1_S0 1125 SC for RF
0207 SD 3D3V_S0 3D3V_MINI2_S0 5V_S0 0207 SD 1D5V_VGA_S0
0207 SD 0207 SD 0207 SD
<Variant Name>
1
1
DY FC9721 FC9722 FC9726 FC9725
DY FC9747 FC9748 FC9723 FC9739 FC9741 FC9740 FC9742 FC9743 EC9771 FC9745 FC9744 FC9746
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U10V2KX-5GP
2
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
Taipei Hsien 221, Taiwan, R.O.C.
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
2
2
Title
Power Sequence
PU4601 PU4501 U4801
D 1D5V_S3 D
1D05V_VTT ALL_POWER_OK
0D75V_EN
0D75V_S0
PLT_RST#
U? U? U?
U?
ALL_POWER_OK EC S0_PWR_GOOD PCH PM_DRAM_PWRGD AND GATE VDDPWRGOOD CPU H_CPU_SVIDCLK
C C
ALL_POWER_OK
H_CPUPWRGD
U?
VCC_GFXCORE
CPU_CORE
SYS_PWROK
VCC_CORE
H_CPU_SVIDCLK U?
S0_PWR_GOOD
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Change History
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 98 of 108
5 4 3 2 1
5 4 3 2 1
Intel-Power Up Sequence
(AC mode) red word: KBC GPIO
(DC mode) red word: KBC GPIO
+RTC_VCC
+RTC_VCC T1
T1
PCH_RTCRST#
PCH_RTCRST#
+PWR_SRC
+PWR_SRC T2
T2
+3.3V_RTC_LDO
+3.3V_RTC_LDO
T3 KBC GPIO36 control
D Press Power button D
S5_ENABLE KBC_PWRBTN_EC# KBC_PWRBTN_EC# GPIO3
T4
+5V_ALW EC_ENABLE# (GPIO51) keep low
T5 T3
+KBC_PWR
+3.3V_ALW T4 KBC GPIO36 control
T6
S5_ENABLE
+5VALW_PCH_VCC5REFSUS T5
+5V_ALW
T6 +5V_ALW & +3.3V_ALW need meet 0.7V difference
+15V_ALW T7
T8 TPS51125 to KBC GPIO46 +3.3V_ALW
T7 +5V_ALW & +3.3V_ALW need meet 0.7V difference
3V_5V_POK
PCH to KBC GPI94 +5VALW_PCH_VCC5REFSUS
SUS_PWR_DN_ACK T9
KBC GPIO43 to PCH +15V_ALW T8
T10 T9 TPS51125 to KBC GPIO46
PCH_RSMRST#(EC Delay 40ms) >10ms
T11 PCH to KBC GPIO00 3V_5V_POK
T10 KBC GPO84 to PCH
PCH_SUSCLK_KBC
PM_PWRBTN#
AC_PRESENT_EC T12 <200ms PCH to KBC GPI94
SUS_PWR_DN_ACK T11
KBC GPIO43 to PCH
PCH_RSMRST# T12 >10ms
T13 PCH to KBC GPIO01
Press Power button
PCH_SUSCLK_KBC
AC KBC_PWRBTN_EC# KBC_PWRBTN_EC# GPIO3
3V_5V_POK
T13 KBC GPO84 to PCH DC PCH_RSMRST#
AC PM_PWRBTN# T14
PM_SLP_S4#
AC PM_PWRBTN# T15
T14 PM_SLP_S3# >30us
T16 KBC GPO16 to LAN
PM_LAN_ENABLE
PM_SLP_S4# T17
T15
+3.3V_LAN
PM_SLP_S3# >30us
C
T16 KBC GPO16 to LAN C
+1.5V_SUS T18
PM_LAN_ENABLE
T17
+V_DDR_REF(0.9V) T19
+3.3V_LAN +5V_RUN & +3.3V_RUN need meet 0.7V difference
+5V_RUN T20
+1.5V_SUS T18
+3.3V_RUN T21
+V_DDR_REF(0.9V) T19 T22
+5V_RUN & +3.3V_RUN need meet 0.7V difference
+5VS_PCH_VCC5REF
+5V_RUN T20
+1.5V_RUN T23 H_PWRGD
+3.3V_RUN T21 T25 >1ms
T22
+1.8V_RUN T24
+5VS_PCH_VCC5REF KBC GPIO71 to RT8208B
GFX_CORE_EN(Discrete only) T26
+1.5V_RUN T23 H_PWRGD
T25 >1ms T27
+VGA_CORE(Discrete only)
+1.8V_RUN T24 T28 KBC GPIO30 to APL5930
KBC GPIO71 to RT8208B 1.0V_RUN_VGA_EN(Discrete only)
GFX_CORE_EN(Discrete only)------Delay 5ms T26
T29
T27 +1.0V_RUN_VGA(Discrete only)
+VGA_CORE(Discrete only) T30 KBC GPIO66 to APL5930
T28 KBC GPIO30 to APL5930 1.8V_VGA_RUN_EN(Discrete only)
1.0V_RUN_VGA_EN(Discrete only)------Delay 4ms
T31
T29 +1.8V_RUN_VGA(Discrete only)
+1.0V_RUN_VGA(Discrete only) T32 KBC GPI95
T30 KBC GPIO66 to APL5930 +3.3V_RUN_VGA_EN(Discrete only)-->DY reserved
1.8V_VGA_RUN_EN(Discrete only)------Delay 5ms T33
T31 +3.3V_RUN_VGA(Discrete only) -->Reserved for sequence
+1.8V_RUN_VGA(Discrete only)
T32 KBC GPI95
+3.3V_RUN_VGA_EN(Discrete only)-->DY reserved RUNPWROK T34
T33
T35
+3.3V_RUN_VGA(Discrete only) -->Reserved for sequence +1.05V_VTT
T36 TPS51218 to KBC GPI34
1.5CPU_1.05VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)
RUNPWROK T34
T37
T35 +0.75V_DDR_VTT
+1.05V_VTT
B
T36 TPS51218 to KBC GPI34 H_VTTPWRGD T38 B
H_VTTPWRGD T38
+1.05V_VTT
T39
CPU to TPS51611
GFX_VR_EN(UMA only)
+1.05V_VTT UMA GFX CORE Power
T39 T40
CPU to TPS51611 +CPU_GFX_CORE(UMA only)
GFX_VR_EN(UMA only)
T40 UMA GFX CORE Power
+CPU_GFX_CORE(UMA only)
1.5CPU_1.05VTT_PWRGD
T41 ( >99ms )
KBC GPO53 to ISL62883
IMVP_VR_ON
1.5CPU_1.05VTT_PWRGD T42
T41 ( >99ms ) CPU CORE Power
KBC GPO53 to ISL62883 +VCC_CORE <3ms
IMVP_VR_ON
T42 CLK_CPU_BCLK
CPU CORE Power CLKIN_BCLK(from CK505) stable
+VCC_CORE <3ms
43 >1ms ISL62883 to CLOCKGEN
CLK_CPU_BCLK
CLKIN_BCLK(from CK505) stable CK_PWRGD
ISL62884 to KBC GPO14
T44 >1ms
43 >1ms ISL62883 to CLOCKGEN IMVP_PWRGD T45
CK_PWRGD 1.5CPU_1.05VTT_PWRGD Delay 10ms
ISL62884 to KBC GPO14 T46 >5ms
T44 >1ms
IMVP_PWRGD T45 KBC GPIO47 to PCH
1.5CPU_1.05VTT_PWRGD Delay 10ms PM_PWROK 3ms< T47 <20ms
T46 >5ms
T48 >1ms
KBC GPIO47 to PCH +1.5V_RUN_CPU T49 >100ns
PM_PWROK 3ms< T47 <20ms PM_DRAM_PWRGD (for S3 Reduction)
T48 >1ms
+1.5V_RUN_CPU T49 >100ns
H_VTTPWRGD
A
PM_DRAM_PWRGD (for S3 Reduction) T50 >1ms A
PM_PWROK
H_VTTPWRGD T51 >1ms
T50 >1ms
+VCC_CORE
PM_PWROK 0.05ms< T52 <650ms
T51 >1ms
H_PWRGD
T53 KBC LRESET#
+VCC_CORE
0.05ms< T52 <650ms PLT_RST# >1ms
T54 KBC GPIO45
H_PWRGD HR PX
T53 KBC LRESET# PLTRST_DELAY#
T55
PLT_RST# >1ms Wistron Corporation
T54 KBC GPIO45 H_CPURST#
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PLTRST_DELAY# Taipei Hsien 221, Taiwan, R.O.C.
T55 Title
H_CPURST# Power Sequence
Size Document Number Rev
A1
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 99 of 108
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0 AO4468
1V_VGA_S0 RT9025
RT8208B VGA_CORE For Discrete
D D
DCBATOUT UP6165BQKF-1
Adapter
UP6183PQAG 1D5V_S0
For Discrete
1D5V_DDR_S0
C 3D3V_AUX_S5
3D3V_S5 C
5V_AUX_S5 5V_S5
B
3D3V_DAC_S0 B
1D8V_S0 LCDVDD
Power Shape
HR PX
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
5 4 3 2 1
A B C D E
PCH SMBus Block Diagram 3D3V_S5 3D3V_S0 KBC SMBus Block Diagram
5V_S0
‧ ‧
3D3V_S0 ‧
SRN2K2J-1-GP SRN2K2J-1-GP
‧
DIMM 1 SRN10KJ-5-GP
1 SMBCLK SMB_CLK
‧ ‧PCH_SMBCLK 1
SMBDATA SMB_DATA
‧ ‧ PCH_SMBDATA
SCL
SDA
TouchPad Conn.
3D3V_S5
PSDAT1 TPDATA
‧ TPDATA TPDATA
‧
SML1CLK SML1_CLK
SRN4K7J-8-GP
SML1DATA SML1_DATA To KBC & eDP DIMM 2
3D3V_S5 ‧PCH_SMBCLK SCL SRN100J-3-GP Battery Conn.
SML0CLK SML0_CLK
‧ PCH_SMBDATA SDA
GPIO17/SCL1 BAT_SCL BATA_SCL_1 CLK_SMB
SDA PCH
SDVO_CTRLCLK PCH_HDMI_CLK Level DDC_CLK_HDMI
‧
SDVO_CTRLDATA PCH_HDMI_DATA
Shift DDC_DATA_HDMI Minicard LCDVDD_eDP
UMA
‧PCH_SMBCLK
WLAN ‧
SRN2K2J-1-GP
3D3V_S0
‧ PCH_SMBDATA
SMB_CLK
SMB_DATA
eDP
‧ LCD_SMBCLK SCL
SMBus address:XX
‧ ‧ LCD_SMBDATA SDA
UMA
3D3V_VGA_S0
CRT_DDC_CLK CRT_DDC_CLK
CRT_DDC_DATA CRT_DDC_DATA
‧
SRN2K2J-1-GP
3
DIS
SRN0J-6-GP 3
DDC2CLK VGA_CRT_DDCCLK
DDC2DATA VGA_CRT_DDCDATA
VGA ‧ ‧
3D3V_S0
SRN2K2J-1-GP SRN10KJ-6-GP
UMA
‧
SRN0J-6-GP UMA
CRT_DDCCLK_CON
CRT_DDCDATA_CON
CRT CONN
5V_S0
3D3V_VGA_S0 UMA
2N7002DW-1-GP
‧
‧
4
5V_S0 4
SRN1K5J-GP
SRN2K2J-1-GP
DIS
DDC2CLK GPU_HDMI_CLK DDC_CLK_HDMI
<Variant Name>
TSCBTD3305CPWR
DDC2DATA GPU_HDMI_DATA DDC_DATA_HDMI
HDMI CONN Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SRN0J-6-GP
Title
SPKR_PORT_D_L-
DXN P2800_DXN
UMA Place near CPU
Codec
Thermal PWM CORE
92HD79B1
P2800 HP1_PORT_B_L HP
MMBT3904-3-GP HP1_PORT_B_R
OTZ THERM_SYS_SHDN#
2N7002
D
PURE_HW_SHUTDOWN#
EN 3V/5V 2
NPCE795P S
G
IMVP_PWRGD PGOD
VR
Put under CPU(T8 HW shutdown)
GPIO94 GPIO56
GPIO4 VGA_THRM TDR
PAGE28
HP0_PORT_A_L MIC
P2800_VGA_DXP HP0_PORT_A_R
DXP THRMDA
VREFOUT_A_OR_F IN
FAN_TACH1
SC2200P50V2KX-2GP SC2200P50V2KX-2GP
VGA DXN
P2800_VGA_DXN
THRMDC
VGA
Thermal
FAN1_DAC
PH
OTZ
VSET VOUT
VIN
FAN CONTROL
P2793 PORTC_L
PAGE28 PORTC_R
Analog
VREFOUT_C MIC
4 <Variant Name> 4
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
3D3V_S0
SCD1U10V2KX-5GP
SC1000P50V3JN-GP-U
SCD1U10V2KX-5GP
SC1000P50V3JN-GP-U
4 eDP_TXP0_CPU 1 8 DP_TXP0_SW
4 eDP_TXN0_CPU 2 7 DP_TXN0_SW
1
4 eDP_TXP1_CPU 3 6 DP_TXP1_SW
DP_TXN1_SW
C10308
C10309
C10307
C10310
4 eDP_TXN1_CPU 4 5
2
RNH302
UMA_EDPSRN0J-7-GP From GPU
29
20
16
12
9
3
U10302 PX_EDP PX_EDP PX_EDP
D PX_EDP D
VDD
VDD
VDD
VDD
VDD
VDD
4 eDP_AUXN_CPU 2 3 DP_AUX_SW #
4 eDP_AUXP_CPU 1 4 DP_AUX_SW 84 GPU_eDP_DATA0 31 1 DP_TXP0_SW C103011 2 SCD1U10V2KX-4GP DP_DATA0_R 49
D0+A D0+ DP_TXN0_SW C103021
84 GPU_eDP_DATA0# 30 D0-A D0- 2 2 SCD1U10V2KX-4GP DP_DATA0_R# 49
RNH303 SRN0J-6-GP EDP
1208 SC UMA_EDP 84 GPU_eDP_DATA1 27 4 DP_TXP1_SW C103031 EDP2 SCD1U10V2KX-4GP DP_DATA1_R 49
D1+A D1+ DP_TXN1_SW C103041
84 GPU_eDP_DATA1# 26 D1-A D1- 5 2 SCD1U10V2KX-4GP DP_DATA1_R# 49
4 eDP_HPD_R 2 1 DBC_EN_C 49 EDP
0R2J-2-GP R10301 84 GPU_eDP_AUX 19 6 DP_AUX_SW C103051 EDP2 SCD1U10V2KX-4GP DP_AUX 49
AUX+A AUX+ DP_AUX_SW # C103061
UMA_EDP 84 GPU_eDP_AUX# 18 AUX-A AUX- 7 2 SCD1U10V2KX-4GP DP_AUX# 49
EDP
84 GPU_eDP_HPD 17 HPD_A HPD 8 EDP DBC_EN_C 49
4 eDP_TXP0_CPU 25 D0+B
4 eDP_TXN0_CPU 24 D0-B SEL 10
AUX_SEL 32
23 11 DGPU_SELECT# 18,94,95
4 eDP_TXP1_CPU D1+B HPD_SEL
4 eDP_TXN1_CPU 22 D1-B
4 eDP_AUXP_CPU 15 AUX+B
4 eDP_AUXN_CPU 14 AUX-B
GND
GND
GND
1117 SC del eDP SMBUS 4 eDP_HPD_R 13 HPD_B
PI3VEDP212ZLE-1-GP
21
28
33
C C
L--->Port A
PX_EDP H--->Port B
B B
<Variant Name>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Switch GFX DP
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 103 of 108
5 4 3 2 1
5 4 3 2 1
AD_DOCK
DOCK1
145
160 153
147
D
27,29,51,95,106 BD_IN# 2 1 D
161
4 3 USB30_TXP4 18
18 USB_PP3 6 5 USB30_TXN4 18
18 USB_PN3 8 7
NP1
10 9 USB30_RXP4 18
12 11 USB30_RXN4 18
14 13
16 15
18 17
20 19
22 21
24 23 TMDS_TX2+_DOCK 51
51 TMDS_TX1+_DOCK 26 25 TMDS_TX2-_DOCK 51
51 TMDS_TX1-_DOCK 28 27
30 29 TMDS_TX0+_DOCK 51
51 TMDS_TXC+_DOCK 32 31 TMDS_TX0-_DOCK 51
51 TMDS_TXC-_DOCK 34 33
36 35
51 DOCK_SDA 38 37 DOCK_SCL 51 0131 SD
5V_HDMI_S0 40 39
42 41
27 BD_AC_IN# 44 43 95 CRT_RED_R_DOCK 1 R10401 2 0R0603-PAD R_DOCK_R
27 BD_HDMI_IN 46 45 1220 SC
27 BD_PW NBTN# 48 47 95 CRT_GREEN_R_DOCK 1 R10402 2 0R0603-PAD R_DOCK_G
50 49
95 CRT_BLUE_R_DOCK 1 R10403 2 0R0603-PAD R_DOCK_B
1
C 159 154 ECH401 ECH402 ECH403 C
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
162
2
52 51
27 BD_DVI_IN 54 53 BAT_SDA 27,39,40
27 BD_PW R_LED 56 55 BAT_SCL 27,39,40
27 BD_USB_CHARGER_EN# 58 57
27 BD_USB_Power_EN 60 59
62 61 DOCK_DP_DATA0 52
52 DOCK_DP_DATA1 64 63 DOCK_DP_DATA0# 52
52 DOCK_DP_DATA1# 66 65
68 67 DOCK_DP_DATA3 52 DY DY DY
52 DOCK_DP_DATA2 70 69 DOCK_DP_DATA3# 52
52 DOCK_DP_DATA2# 72 71
74 73 BD_DP_IN 27,52
52 DOCK_DP_AUX 76 75
52 DOCK_DP_AUX# 78 77
80 79 DY
82 81
R_DOCK_R 84 83 0R2J-2-GP
1 2 R10404 0R2J-2-GP
1 2 R10405
CRT_HSYNC_CON_DOCK 95
86 85 CRT_VSYNC_CON_DOCK 95
R_DOCK_G 88 87 DDCDATA_DOCK 95 Dock
90 89 DDCCLK_DOCK 95
R_DOCK_B 92 91
94 93
150 EC10401
Wistron Corporation
SC100P50V2JN-3GP
JAE-CONN144D-1-GP-U
BOTTOM DOCKING
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 104 of 108
5 4 3 2 1
5 4 3 2 1
1201 SC
R10510 U10501
0R2J-2-GP
20,31 PCIE_CLK_LAN_REQ# 1 PCIE_CLK_INTEL_LAN_REQ#
2iAMT 48 13
CLK_REQ# MDI_PLUS0 LAN_MDI0P_INTEL 106
5,18,27,31,32,36,65,66,71,75,82,83,97 PLT_RST# 36 PE_RST# MDI_MINUS0 14 LAN_MDI0N_INTEL 106
RNH502 SRN0J-6-GP
20,31 CLK_PCIE_LAN 1 4 CLK_PCIE_INTEL_LAN 44 17
CLK_PCIE_INTEL_LAN# PE_CLKP MDI_PLUS1 LAN_MDI1P_INTEL 106
20,31 CLK_PCIE_LAN# 2 iAMT 3 45 18
PCIE
PE_CLKN MDI_MINUS1 LAN_MDI1N_INTEL 106
MDI
20,31 PCIE_RXP6 C105161 2 SCD1U10V2KX-5GP PCIE_RXP6_INTEL 38 20
PETP MDI_PLUS2 LAN_MDI2P_INTEL 106
D 20,31 PCIE_RXN6 1 2 SCD1U10V2KX-5GP PCIE_RXN6_INTEL 39 PETN MDI_MINUS2 21 LAN_MDI2N_INTEL 106 D
LAN_DIS# C10505
iAMTRNH503 PCIE_TXP6_INTEL 3D3V_M
20,31 PCIE_TXP6 1 4 41 23
iAMT PERP MDI_PLUS3 LAN_MDI3P_INTEL 106
1
SCD1U10V2KX-5GP
SCD22U10V2KX-1GP
SC22U6D3V5MX-2GP
20 SML0_CLK 2 3 SML0_CLK_R 28 SMB_CLK RSVD_NC#6 6 RSVD_NC 1 TPAD14-OP-GP
SMBUS
1
20 SML0_DATA 1 4 SML0_DATA_R 31 SMB_DATA
R10502 iAMT
1 4K7R2F-GP 1 2
SRN0J-6-GP RSVD_VCC3P3
2 1 R10503 2 iAMT
2
RSVD_VCC3P3 4K7R2F-GP
iAMT VDD3P3_IN 5
22 LAN_DIS# 3 LAN_DISABLE#
4 C10514 C10512 C10510 C10502 C10521
VDD3P3_OUT
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
iAMT
1
SC1U10V2KX-1GP
15 VDD3P3 iAMT iAMT
VDD3P3 1D05V_LAN
106 LAN_ACT_LED#_INTEL 26 LED0 VDD3P3 19
106 10M/100M/1G_LED#_INTEL 27 29
2
LED1 VDD3P3
LED
25 LED2
47 C10503 C10504 C10520
VDD1P0
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC22U6D3V5MX-2GP
VDD1P0 46 iAMT iAMT iAMT iAMT iAMT
1
TPAD14-OP-GP
TPH501
T PH501 1 LAN_JTAG_TDI 32 37 1D05V_LAN
3D3V_M TPAD14-OP-GP
TPH502
T PH502 LAN_JTAG_TDO JTAG_TDI VDD1P0
1 34 JTAG_TDO
JTAG
R105072 DY 10KR2J-3-GP
1 LAN_JTAG_TMS 33 43 C10506 C10517
2
JTAG_TMS VDD1P0
1
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R105082 10KR2J-3-GP
1 LAN_JTAG_TCK 35 JTAG_TCK
DY VDD1P0 11
1D05V_LAN
2
LANXOUT_C 9 40
LANXIN_C XTAL_OUT VDD1P0
10 XTAL_IN VDD1P0 22 iAMT iAMT iAMT
C C
VDD1P0 16 DY 1D05V_LAN
VDD1P0 8 iAMT
2 1 TEST_EN 30 TEST_EN
1KR2J-1-GP R10501 IND-4D7UH-192-GP R10504
1 2 RBIAS 12 7 CTRL_1P0 L105011 2 CTRL_1P0_L 1 2
3KR2F-GP iAMT R10509 RBIAS CTRL_1P0
iAMT
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1
1
49 C10501 C10515
68.4R750.20C 0R3J-0-U-GP
iAMT VSS_EPAD
DY
82579LM-GP DY
2
SC 0930 delet 1st
DY DY
SB 0916
R10505
C10518
0R2J-2-GP
LANXOUT_C 1 2 LANXOUT_R 1 2
SC18P50V2JN-1-GP
iAMT
2
B B
X10501 iAMT
XTAL-25MHZ-149-GP
1
<Variant Name>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
5 4 3 2 1
5 4 3 2 1
1201 SC
LAN switch
1206 SC swap for layout
SRN0J-6-GP
RNH601
105 LAN_MDI0P_INTEL 4 1 LAN_MDI0P 3D3V_S5
3 2 LAN_MDI0N
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
D 105 LAN_MDI0N_INTEL D
iAMT
1
SRN0J-6-GP
DY
2
C10608
C10607
C10604
C10602
C10601
C10603
SRN0J-6-GP
14
21
30
39
1
4
8
5
RNH603 U10601
4 1 LAN_MDI2P
VDD
VDD
VDD
VDD
VDD
VDD
VDD
LP
105 LAN_MDI2P_INTEL
105 LAN_MDI2N_INTEL 3 2 LAN_MDI2N
iAMT
LAN_MDI0P 2 38 MDI0+_SYS 59
LAN_MDI3P LAN_MDI0N A A0
105 LAN_MDI3P_INTEL 4 1 3 B B0 37 MDI0-_SYS 59
3 iAMT 2 LAN_MDI3N LAN_MDI1P 6 34
105 LAN_MDI3N_INTEL C C0 MDI1+_SYS 59
LAN_MDI1N 7 33 MDI1-_SYS 59
RNH604 LAN_MDI2P D D0
9 E E0 29 MDI2+_SYS 59
SRN0J-6-GP LAN_MDI2N 10 28 MDI2-_SYS 59
LAN_MDI3P F F0
11 G G0 25 MDI3+_SYS 59
SRN0J-6-GP LAN_MDI3N 12 24 MDI3-_SYS 59
RNH605 H H0
R10601
31 LAN_MDI0P_BCM 3 2 LAN_MDI0P 36 MDI0+_DOCK 104
LAN_MDI0N DOCK_IN_LAN A1
31 LAN_MDI0N_BCM 4 BCM 1 3D3V_S5 1 2 13 SEL B1 35 MDI0-_DOCK 104
10KR2J-3-GP 32 MDI1+_DOCK 104
C1
D1 31 MDI1-_DOCK 104
C
31 LAN_MDI1P_BCM 3 2 LAN_MDI1P LAN_ACT_LED# 15 27 MDI2+_DOCK 104
C
LAN_MDI1N 10M/100M/1G_LED# LED1 E1
31 LAN_MDI1N_BCM 4 BCM 1 16 26 MDI2-_DOCK 104
D
LED2 F1
42 LED3 G1 23 MDI3+_DOCK 104
RNH606 Q10601 22 MDI3-_DOCK 104
SRN0J-6-GP H1
LED1_0
LED2_0
LED3_0
LED1_1
LED2_1
LED3_1
2N7002K-2-GP
GND
SRN0J-6-GP 2nd = 84.07002.I31
RNH607 84.2N702.J31 STMUX1800EQTR-GP
31 LAN_MDI2P_BCM 3 2 LAN_MDI2P
17
18
41
19
20
40
43
31 LAN_MDI2N_BCM 4 BCM 1 LAN_MDI2N 73.01800.A03
S
27,29,51,95,104 BD_IN# 2nd = 73.03720.003
31 LAN_MDI3P_BCM 3 2 LAN_MDI3P
31 LAN_MDI3N_BCM 4 BCM 1 LAN_MDI3N
RNH608 59 LAN_ACT_LED#_SYS
SRN0J-6-GP 59 10M/100M/1G_LED#_SYS
RNH609
SRN0J-6-GP 104 LAN_ACT_LED#_DOCK
104 10M/100M/1G_LED#_DOCK
3 2 LAN_ACT_LED#
105 LAN_ACT_LED#_INTEL 10M/100M/1G_LED#
105 10M/100M/1G_LED#_INTEL 4 1
iAMT
RNH610
SRN0J-6-GP
B LAN_ACT_LED# B
31 LAN_ACT_LED#_BCM 3 2
4 1 10M/100M/1G_LED# Function SEL
31 10M/100M/1G_LED#_BCM
BCM to X0 L SYSTEM
to X1 H DOCK
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LAN SWITCH
Size Document Number Rev
A3
BAD40_HC 1
Date: Thursday, April 12, 2012 Sheet 106 of 108
5 4 3 2 1
5 4 3 2 1
Q10701
AO4468-GP
5V_S5 84.04468.037 5V_CHARGER
2nd = 84.08882.037
1 S D 8
C10702 2 S D 7
S D
RUN_ENABLE2
1 DY2 3
G D
6
D 4 5 D
SCD1U25V3KX-GP
1
C10703 DY
SCD01U50V2KX-1GP
RUN_ENABLE2
5V_CHARGER
U10702
27,36,97 S5_ENABLE G5938TL1U-GP
1108 SC
74.05938.09P
C C
5V_S5
6 EN VCC 1
5 DC2 GND 2
4 DC1 HV 3
B B
Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
C
reserve C
B B
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title