WistronPower Sequence INTEL PCH

5 4 3 2 1
D D
DJ1 Calpella UMA Schematics Document

Arrandale
C
Intel PCH C
2010-04-23
REV : X01
B B
DY : Nopop Component
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size Document Number

Cover Page Rev
A3
DJ1 Calpella UMA X01
Date: Monday, April 26, 2010 Sheet 1 of 90
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
CPU DC/DC
DJ1 UMA Block Diagram INPUTS
ISL62882
OUTPUTS
47,48
+PWR_SRC +VCC_CORE 39
Project code : 91.4EK01.001
SYSTEM DC/DC
PCB P/N : 48.4EK19.0SB TPS51218 49
INPUTS OUTPUTS
D
Revision : 10212-SB +PWR_SRC +1.05V_VTT
D
Clock Generator
SLG8SP585 SYSTEM DC/DC
RT8205BGQW 46
7 Intel CPU INPUTS OUTPUTS
DDRIII 800/1066 Channel A DDRIII Slot 0 +5V_ALW2
+PWR_SRC +3.3V_RTC_LDO
18
800/1066 +5V_ALW
Arrandale +3.3V_ALW
+15V_ALW
DDRIII 800/1066 Channel B DDRIII Slot 1 SYSTEM DC/DC

19
800/1066 RT8207GQW 50
INPUTS OUTPUTS
+1.5V_SUS
8,9,10,11,12,13,14 +PWR_SRC +0.75V_DDR_VTT
+V_DDR_REF
10/100 NIC RJ45
ATHEROS CONN SYSTEM DC/DC
PCIE x 1 AR8152/AR8151 TPS51611 53
C C
DMIx4 FDIx4x2(UMA) INPUTS OUTPUTS
I/O Board
Connector
CRT RGB CRT
Left Side: +PWR_SRC +CPU_GFX_CORE
55 PCIE x 1
USB x 1
MAXIM CHARGER
LCD LVDS(Dual Channel) BQ24745
54 USB 2.0 x 2 INPUTS OUTPUTS
Intel Mini-Card +DC_IN +PWR_SRC
76 802.11a/b/g +PBATT
PCIE 26
PCH SYSTEM DC/DC
APL5930 51
CardReader
INPUTS OUTPUTS
SD/MMC/MS/ 14 USB 2.0/1.1 ports
Realtek USB2.0 +3.3V_ALW +1.8V_RUN
MS Pro/xD High Definition Audio
71 RTS5138 USB 2.0 x 1
SATA ports (6) USB 2.0 CAMERA 54
32
PCIE ports (8) SYSTEM DC/DC
Switches 42
LPC I/F
B
USB 2.0 x 1
INPUTS
26 OUTPUTS B
ACPI 1.1 Bluetooth 73 +1.5V_SUS +1.5V_RUN
PCI/PCI BRIDGE +5V_ALW +5V_RUN
Azalia AZALIA +3.3V_ALW +3.3V_RUN
CODEC USB 2.0 x 2 Right Side:

Internal Analog MIC
92HD79B1 LPC Bus USB x 2 63
PCB LAYER
20,21,22,23,24,25,26,27,28
L1: Top
30 L2: VCC
L3: Signal
KBC L4: Signal
HP1 SPI L5 GND
NUVOTON
SATA
SATA
L6: Bottom
SPI
NPCE781BA0DX 37
MIC IN
A <Core Design> A
2CH SPEAKER
Flash ROM Flash ROM Touch Int. Thermal
HDD ODD
4MB 62 256kB 62 PAD KB EMC2102 Wistron Corporation
59 59 39 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
68 68 25 Taipei Hsien 221, Taiwan, R.O.C.
Title
Block Diagram
Size Document Number Rev
Fan A3 X01
58 DJ1 Calpella UMA
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
+PWR_SRC TPS51116
Adapter
1000mA 16825mA
ISL62882 TPS51218 TPS51611
AO4407A +V_DDR_REF +0.75V_DDR_VTT +1.5V_SUS
Charger 48000mA 24800mA 22000mA
BQ24745 +VCC_CORE +1.05V_VTT +CPU_GFX_CORE
Battery +PBATT
AO4468
3500mA
+1.5V_RUN
C C
TPS51125
11145mA
82mA 10330mA
+3.3V_RTC_LDO
+3.3V_ALW
+15V_ALW +5V_ALW2 +5V_ALW
AO4468
G547F2P81U-GP AO4468 G547F2P81U-GP AO3403 APL5930
6661mA
2000mA 6330mA 2000mA 300mA 1761mA
+3.3V_RUN
+5V_USB1 +5V_RUN +5V_USB2 +3.3V_LAN +1.8V_RUN
B B
SI3456DDV RTS5159
2000mA 300mA
+LCDVDD +3.3V_RUN_CARD
Power Shape
Regulator LDO Switch

A <Core Design> A
Wistron Corporation
Title

Power Block Diagram Rev
A3
Date: Friday, April 16, 2010 Sheet 3 of 90
5 4 3 2 1
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A B C D E
PCH SMBus Block Diagram

KBC SMBus Block Diagram
+5V_RUN
+3.3V_ALW +3.3V_RUN

 
SRN10KJ-5-GP
+3.3V_RUN
1
SRN2K2J-1-GP

SRN2K2J-1-GP
TouchPad Conn. 1
PSDAT1 TPDATA
 TPDATA TPDATA
DIMM 1 PSCLK1 TPCLK
 TPCLK TPCLK
SMBCLK PCH_SMB_CLK
 PCH_SMBCLK SCL
SMBDATA PCH_SMB_DATA
  PCH_SMBDATA SDA
+KBC_PWR

18
SMBus Address:A0
DMN66D0LDW-7-GP
DIMM 2 SRN4K7J-8-GP
PCH_SMBCLK SCL
 PCH_SMBDATA SDA 19 SRN100J-3-GP Battery Conn.

SCL1 BAT_SCL PBAT_SMBCLK1 CLK_SMB
SMBus Address:A4 SDA1 BAT_SDA PBAT_SMBDAT1 DAT_SMB SMBus address:16
Clock
Generator BQ24745
PCH_SMBCLK
 PCH_SMBDATA
SCLK
SDATA
KBC SCL
SDA SMBus address:12

7
SMBus address:D2
NPCE781BA0DX
2 +3.3V_RUN 2
PCH +3.3V_ALW Minicard 

+3.3V_ALW
 PCH_SMBCLK
WLAN
SMB_CLK
+3.3V_RUN
SRN4K7J-8-GP
 PCH_SMBDATA SRN4K7J-8-GP 
SMB_DATA 76
Thermal
SRN2K2J-1-GP
 THERM_SCL SCL
SMBus address:7A
 THERM_SDA SDA
SML0CLK SML0_CLK

SML0DATA SML0_DATA

XDP GPIO61/SCL2 KBC_SCL1
DMN66D0LDW-7-GP
GPIO62/SDA2 KBC_SDA1
+3.3V_RUN
 PCH
SML1DATA/GPIO75
SRN2K2J-1-GP SML1CLK/GPIO58
L_DDC_CLK LDDC_CLK

L_DDC_DATA LDDC_DATA

LCD CONN 23
3 3
+3.3V_RUN +5V_CRT_RUN
 
+3.3V_RUN
SRN2K2J-1-GP SRN2K2J-1-GP

CRT_DDC_CLK GMCH_DDCCLK
  DDC_CLK_CON
CRT_DDC_DATA GMCH_DDCDATA
  DDC_DATA_CON CRT CONN
DMN66D0LDW-7-GP
23
4 4
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
SMBUS Block Diagram

A2 DJ1 Calpella UMA X01
A B C D E
www.vinafix.vn
A B C D E
Thermal Block Diagram Audio Block Diagram

1 1
SPKR_PORT_D_L-
SPKR_PORT_D_R+ SPEAKER
Codec
DP1 EMC2102_DP1
ALC269Q_VB5
SC470P50V3JN-2GP
MMBT3904-3-GP HP1_PORT_B_L HP
HP1_PORT_B_R
2
DN1 EMC2102_DN1
OUT 2
Place near CPU

Thermal and PCH.
EMC2102
DP2 EMC2102_DP1
MMBT3904-3-GP
HP0_PORT_A_L MIC
HP0_PORT_A_R
DN2 EMC2102_DN1 VREFOUT_A_OR_F IN

System Sensor(UMA only)
3 3
DP3 EMC2102_DP3
MMBT3904-3-GP
SC470P50V3JN-2GP
DN3 EMC2102_DN3
Put under CPU. PORTC_L
PORTC_R
Analog
VREFOUT_C MIC
4 4
<Core Design>
Wistron Corporation
Title
Size
Thermal/Audio Block Diagram
Document Number Rev
Custom
A B C D E
www.vinafix.vn
A B C D E
PCH Strapping Processor Strapping

Calpella Schematic Checklist Rev.0_7 Calpella Schematic Checklist Rev.0_7
Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is Default
SPKR Reboot option at power-up 1 unless specified otherwise) Value
Default Mode: Internal weak Pull-down.
CFG[4] Embedded 1: Disabled - No Physical Display Port attached to 1
No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with Embedded DisplayPort.
8.2-k- 10-k weak pull-up resistor. DisplayPort
4 Presence 0: Enabled - An external Display Port device is
4
INIT3_3V# Weak internal pull-down. Do not pull high. connected to the Embedded Display Port.
GNT3#/ Default Mode: Internal pull-up. CFG[3] PCI-Express Static 1: Normal Operation. 1
GPIO55 Low (0) = Top Block Swap Mode (Connect to ground with 4.7-k weak Lane Reversal 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
pull-down resistor).
CFG[0] PCI-Express 1: Single PCI-Express Graphics 1
INTVRMEN High (1) = Integrated VRM is enabled Configuration 0: Bifurcation enabled
Low (0) = Integrated VRM is disabled Select
GNT0#, Default (SPI): Left both GNT0# and GNT1# floating. No pull up
GNT1#/GPIO51 required. CFG[7] Reserved - Clarksfield (only for early samples pre-ES1) - 0
Temporarily used Connect to GND with 3.01K Ohm/5% resistor
Boot from PCI: Connect GNT1# to ground with 1-k
pull-down resistor. Leave GNT0# Floating. for early Note: Only temporary for early CFD samples
Clarksfield (rPGA/BGA) [For details please refer to the WW33
Boot from LPC: Connect both GNT0# and GNT1# to ground with samples. MoW and sighting report].
1-k pull-down resistor. For a common motherboard design (for AUB and CFD),
GNT2#/ Default - Internal pull-up. the pull-down resistor should be used. Does not
GPIO53 Low (0)= Configures DMI for ESI compatible operation (for servers impact AUB functionality.
only. Not for mobile/desktops).
GPIO33 Default: Do not pull low.

Disable ME in Manufacturing Mode: Connect to ground with 1-k
pull-down resistor.
3 3
SPI_MOSI Enable iTPM: Connect to Vcc3_3 with 8.2-k weak pull- up resistor.
Disable iTPM: Left floating, no pull-down required.
NV_ALE Enable Danbury: Connect to Vcc3_3 with 8.2-k weak pull-up
resistor.
Disable Danbury: Connect to ground with 4.7-k weak pull-down
resistor.
NC_CLE Weak internal pull-up. Do not pull low.
HAD_DOCK_EN# Low (0): Flash Descriptor Security will be overridden.
/GPIO[33] High (1) : Flash Descriptor Security will be in effect.
HDA_SDO Weak internal pull-down. Do not pull high.
HDA_SYNC Weak internal pull-down. Do not pull high.
GPIO15 Weak internal pull-down. Do not pull high.
GPIO8 Weak internal pull-up. Do not pull low.
GPIO27 Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
2 2
PCIE Routing USB Table

USB
Pair Device
LANE2 MiniCard WLAN 0 USB0 (I/O Board)
1 X
LANE3 LAN 2 USB2
3 USB3
4 X
5 WLAN (I/O Board)
6 X
7 X
8 X
1 <Core Design>
1
9 BLUETOOTH
10 CARD READER Wistron Corporation
11 CAMERA Taipei Hsien 221, Taiwan, R.O.C.
12 X Title
13 X
Table of Content Rev
A3
A B C D E
www.vinafix.vn
5 4 3 2 1
SSID = CLOCK
+3.3V_RUN
+3.3V_RUN_SL585 +1.05V_VTT
D
+1.05V_RUN_SL585_IO D
1 R708 2
0R0603-PAD-1-GP 1 R709 2
0R0603-PAD-1-GP
1
1
C701 C702 C703 C704 C705 C707 C708
1
C709 C710 C711 C712
DY DY
SC1U10V2KX-1GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
2
SC1U10V2KX-1GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
+3.3V_RUN_SL585 +1.05V_RUN_SL585_IO
+3.3V_RUN
R701
1 2 CPU_STOP#
2K2R2J-2-GP
C C
24
17
29
15
18
1
5
U701
VDD_CPU
VDD_SRC
VDD_REF
VDD_DOT
VDD_27
VDD_SRC_IO
VDD_CPU_IO
2 3 CLK_MCH_DREFCLK1# 4 6
23 DREFCLK# 0R4P2R-PAD 1 CLK_MCH_DREFCLK1 DOT_96# 27MHZ
4 3 DOT_96 27MHZ_SS 7
23 DREFCLK RN701
23 CLKIN_DMI# 2 3 CLK_IN_DMI# 14 SRC_2#
RN
23 CLKIN_DMI 0R4P2R-PAD 1 4 CLK_IN_DMI 13 16 CPU_STOP#

RN702 SRC_2 CPU_STOP# CK_PW RGD
CKPWRGD/PD# 25
23 CLK_PCIE_SATA# 2 3 CLK_PCIE_SATA1# 11 30 FSC 2 1 CLK_PCH_14M 23
SRC_1/SATA# REF_0/CPU_SEL
RN
RN
23 CLK_PCIE_SATA 0R4P2R-PAD 1 4 CLK_PCIE_SATA1 10

RN703 SRC_1/SATA R703
DY
1
23 CLK_CPU_BCLK# 1 4 CLK_CPU_BCLK1# 22 28 CLK_XTAL_IN 33R2J-2-GP
CPU_0# XTAL_IN
RN
23 CLK_CPU_BCLK 0R4P2R-PAD 2 3 CLK_CPU_BCLK1 23 27 CLK_XTAL_OUT EC701

RN704 CPU_0 XTAL_OUT SC4D7P50V2CN-1GP
2
19 CPU_1# SDA 31
20 CPU_1 SCL 32
VSS_SATA
VSS_CPU
VSS_SRC
VSS_DOT
VSS_REF
VSS_27 PCH_SMBDATA
PCH_SMBDATA 18,19,23,76
PCH_SMBCLK
GND
PCH_SMBCLK 18,19,23,76
B SLG8SP585VTR-GP B
33
26
21
12
FSC 0 1
+1.05V_VTT
133MHz
X701 SPEED 100MHz
CLK_XTAL_IN 1 2 CLK_XTAL_OUT (Default)
2
1
C714 X-14D31818M-37GP R704 +3.3V_RUN_SL585

SC12P50V2JN-3GP C715
82.30005.901 SC12P50V2JN-3GP DY 4K7R2J-2-GP
2
A <Core Design> A
1
R705
FSC 10KR2J-3-GP
G Wistron Corporation
1
VR_CLKEN# 47
. .
2
CK_PW RGD D Taipei Hsien 221, Taiwan, R.O.C.

.
.
.
R707
10KR2J-3-GP S Title
Q701 Clock Generator SLG8SP585

1

2N7002E-1-GP
Date: Thursday, April 22, 2010 Sheet 7 of 90
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5 4 3 2 1
SSID = CPU
Main:62.10053.601
2nd :62.10040.611
D 3rd :62.10055.321 PEG_IRCOMP_R R8011 2 49D9R2F-GP
D
CPU1A 1 OF 9 EXP_RBIAS R8021 2 750R2F-GP
PEG_ICOMPI B26
PEG_ICOMPO A26
22 DMI_PTX_CRXN0 A24 B27
AUBURNDALE
DMI_RX0# PEG_RCOMPO
22 DMI_PTX_CRXN1 C23 A25
DMI_RX1# PEG_RBIAS
22 DMI_PTX_CRXN2 B22
DMI_RX2#
22 DMI_PTX_CRXN3 A21 DMI_RX3# PEG_RX0# K35
J34
PEG_RX1#
22 DMI_PTX_CRXP0 B24 J33
DMI_RX0 PEG_RX2#
22 DMI_PTX_CRXP1 D23 G35
DMI_RX1 PEG_RX3#
DMI
22 DMI_PTX_CRXP2 B23 G32
DMI_RX2 PEG_RX4#
22 DMI_PTX_CRXP3 A22 F34
DMI_RX3 PEG_RX5#
F31
PEG_RX6#
22 DMI_CTX_PRXN0 D24 D35
DMI_TX0# PEG_RX7#
22 DMI_CTX_PRXN1 G24 DMI_TX1# PEG_RX8# E33
22 DMI_CTX_PRXN2 F23 C33
DMI_TX2# PEG_RX9#
22 DMI_CTX_PRXN3 H23 DMI_TX3# PEG_RX10# D32
B32
PEG_RX11#
22 DMI_CTX_PRXP0 D25 DMI_TX0 PEG_RX12# C31
22 DMI_CTX_PRXP1 F24 B28
DMI_TX1 PEG_RX13#
22 DMI_CTX_PRXP2 E23 DMI_TX2 PEG_RX14# B30
22 DMI_CTX_PRXP3 G23 A31
DMI_TX3 PEG_RX15#
J35
PEG_RX0
H34
PEG_RX1
C 22 FDI_TXN0 E22
PEG_RX2
H33
F35
C
FDI_TX0# PEG_RX3
22 FDI_TXN1 D21 G33
FDI_TX1# PEG_RX4
22 FDI_TXN2 D19 E34
FDI_TX2# PEG_RX5
22 FDI_TXN3 D18 FDI_TX3# PEG_RX6 F32
Intel(R) FDI
22 FDI_TXN4 G21 FDI_TX4# PEG_RX7 D34
22 FDI_TXN5 E19 FDI_TX5# PEG_RX8 F33
22 FDI_TXN6 F21 B33
FDI_TX6# PEG_RX9
22 FDI_TXN7 G18 D31
FDI_TX7# PEG_RX10
A32
PEG_RX11
PEG_RX12 C30
22 FDI_TXP0 D22 A28
FDI_TX0 PEG_RX13
PCI EXPRESS -- GRAPHICS

22 FDI_TXP1 C21 B29
FDI_TX1 PEG_RX14
22 FDI_TXP2 D20 A30
FDI_TX2 PEG_RX15
22 FDI_TXP3 C18
FDI_TX3
22 FDI_TXP4 G22 L33
FDI_TX4 PEG_TX0#
22 FDI_TXP5 E20 M35
FDI_TX5 PEG_TX1#
22 FDI_TXP6 F20 M33
FDI_TX6 PEG_TX2#
22 FDI_TXP7 G19 M30
FDI_TX7 PEG_TX3#
L31
PEG_TX4#
22 FDI_FSYNC0 F17 K32
FDI_FSYNC0 PEG_TX5#
22 FDI_FSYNC1 E17 FDI_FSYNC1 PEG_TX6# M29
PEG_TX7# J31
22 FDI_INT C17 FDI_INT PEG_TX8# K29
H30
PEG_TX9#
22 FDI_LSYNC0 F18 H29
FDI_LSYNC0 PEG_TX10#
22 FDI_LSYNC1 D17 FDI_LSYNC1 PEG_TX11# F29
E28
PEG_TX12#
PEG_TX13# D29
D27
B PEG_TX14#
PEG_TX15#
C26 B
PEG_TX0 L34
M34
PEG_TX1
PEG_TX2 M32
PEG_TX3 L30
PEG_TX4 M31
K31
PEG_TX5
M28
PEG_TX6
H31
PEG_TX7
PEG_TX8 K28
PEG_TX9 G30
G29
PEG_TX10
F28
PEG_TX11
PEG_TX12 E27
PEG_TX13 D28
C27
PEG_TX14
PEG_TX15 C25
A <Core Design>
A
Wistron Corporation
Title
CPU (PCIE/DMI/FDI)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
Processor Compensation Signals
SSID = CPU DDR_RST_GATE 25
RN
+1.05V_VTT CPU1B 2 OF 9 C915
Processor Pullups
1
1 2 H_COMP3 AT23 SCD047U16V2ZY-1GP
R901 20R2F-GP COMP3 BCLK_CPU_P_R
BCLK A16 1 4 RN901 BCLK_CPU_P 25
R902 1 2 49D9R2F-GP H_CATERR# 1 2 H_COMP2 AT24 B16 BCLK_CPU_N_R 2 3 0R4P2R-PAD +1.5V_SUS
BCLK_CPU_N 25
AUBURNDALE
2
R903 20R2F-GP COMP2 BCLK#
MISC
CLOCKS
1 2 H_COMP1 G16 AR30 BCLK_ITP_P
1
COMP1 BCLK_ITP
RN
R933 1 2 68R2-GP H_PROCHOT# R905 49D9R2F-GP AT30 BCLK_ITP_N
H_COMP0 BCLK_ITP# R934
1 2 AT26 COMP0 Q901
R906 49D9R2F-GP E16 PEG_CLK_R 1 4 RN903 1KR2J-1-GP
PEG_CLK CLK_EXP_P 23
R904 1 2 68R2-GP H_CPURST# PEG_CLK#_R 3 0R4P2R-PAD
DY D16 2 CLK_EXP_N 23 G
. .
PEG_CLK#
D TPAD14-GP TP901 1 SKTOCC#_R AH24 D
2
SKTOCC#
A18 D DDR3_DRAMRST# 18,19
.
.
.
DPLL_REF_SSCLK
DPLL_REF_SSCLK# A17
H_CATERR# AK14 S
CATERR#
1
THERMAL
C903
SM_DRAMRST# +1.05V_VTT 2N7002E-1-GP SCD1U10V2KX-5GP
F6
2
SM_DRAMRST# RN905
25 H_PECI AT15 PECI
AL1 SM_RCOMP_0 4 1 1 2
SM_RCOMP0
AM1 SM_RCOMP_1 3 2 R935 DY 0R2J-2-GP
SM_RCOMP1
RN
AN1 SM_RCOMP_2
SM_RCOMP2 SRN10KJ-5-GP
47 H_PROCHOT# AN26
PROCHOT# PM_EXTTS#0_C
AN15 1 4 PM_EXTTS#0 18
PM_EXT_TS0# PM_EXTTS#1_C
AP15 2 3 PM_EXTTS#1 19
PM_EXT_TS1# 0R4P2R-PAD
DDR3
MISC
25,37,42 H_THERMTRIP# AK15 RN906
THERMTRIP#
SM_DRAMRST# 1 2
AT28 XDP_PRDY#
PRDY# XDP_PREQ# R988
AP27
PREQ# 100KR2J-1-GP
PM_EXTTS#0_C 53
AN28 XDP_TCLK
H_CPURST# TCK XDP_TMS
AP26 RESET_OBS# TMS AP28
PWR MANAGEMENT
AT27 XDP_TRST#
TRST#
JTAG & BPM

AL15 AT29 XDP_TDI_R
22 H_PM_SYNC PM_SYNC TDI
AR27 XDP_TDO_R DDR3 Compensation Signals
TDO XDP_TDI_M
AR29
TDI_M XDP_TDO_M SM_RCOMP_0 R907 1
AN14 AP29 2 100R2F-L1-GP-U
VCCPWRGOOD_1 TDO_M
C AN25 H_DBR#_R 1 R909 2 XDP_DBRESET# SM_RCOMP_1 R910 1 2 24D9R2F-L-GP
C
VCCPW RGOOD DBR#
25,42 H_PW RGD 1 R908 2 AN27
0R0402-PAD VCCPWRGOOD_0 0R0402-PAD SM_RCOMP_2 R911 1 2 130R2F-1-GP
AJ22 XDP_OBS0
BPM0#
22 PM_DRAM_PW RGD 1 R912 2 VDDPW RGOOD_R AK13 SM_DRAMPWROK BPM1# AK22 XDP_OBS1
0R0402-PAD AK24 XDP_OBS2
BPM2# XDP_OBS3
AJ24
BPM3# XDP_OBS4
49 H_VTTPW RGD AM15 AJ25
VTTPWRGOOD BPM4# XDP_OBS5
AH22
BPM5# XDP_OBS6
BPM6# AK23
H_PW RGD_XDP AM26 AH23 XDP_OBS7
TAPPWRGOOD BPM7# +1.05V_VTT
R913
1 2 PLT_RST#_R AL14 XDP_TMS 1 2
21,37,70,76 PLT_RST# RSTIN# R914 DY 51R2J-2-GP
1
XDP_TDI_R
1K6R2F-GP R915 R916
1
DY 2
51R2J-2-GP
750R2F-GP XDP_PREQ#
+3.3V_RUN R917
1
DY 2
51R2J-2-GP
2
R919 R920 XDP_TCLK

1119 R918
1
DY 2
51R2J-2-GP
S3 circuit 1.1k 0.75k
No Stuff
Normal 1.27k 3k
U927
1
B
VCC 5 R977
+1.5V_RUN 2
B XDP1
37,42,49 VTT_PW RGD A
Y
4 VTT_PW RGD_R3 1 2 VDDPW RGOOD_R B
XDP_TDI_R XDP_TDI XDP_TRST#
NP1 3 1
DY 2
1
GND 1K6R2F-GP R921 0R2J-2-GP

61
1
R919 1 2
1K1R2F-GP 62 74LVC1G08GW -1-GP XDP_TDO_M 1 2 XDP_TDO R923
DY XDP_PREQ# 3 4 R922 DY 0R2J-2-GP 51R2J-2-GP
1
XDP_PRDY# 5 6 R978
2
7 8 R924
2
VDDPW RGOOD_R XDP_OBS0
XDP_OBS1
9
11
10
12
37 VDDPW RGOOD_KBC 1
DY 2 0R0402-PAD
1
13 14 1K6R2F-GP
2
R937 XDP_OBS2 XDP_TDI_M
750R2F-GP XDP_OBS3
15
17
16
18
1
R925 DY 2
0R2J-2-GP
19 20
21 22 XDP_TDO_R 1 R926 2
2
23 24 +1.05V_VTT
25 26 0R0402-PAD
XDP_OBS4 27 28 Scan Chain Stuff --> R921, R924, R926 JTAG MAPPING
XDP_OBS5 29
DY 30
31 32 (Default) No Stuff --> R922, R925
XDP_OBS6 33 34 C901 1 CPU Only Stuff --> R921, R922
+1.05V_VTT XDP_OBS7 SCD1U16V2KX-3GP
35 36
DY No Stuff --> R924, R926, R925
1
37 38
2
H_PW RGD H_CPUPW RGD_XDP BCLK_ITP_P R928 GMCH Only Stuff --> R926, R925
1
R927 1 DY 2
2 1KR2J-1-GP PM_PW RBTN#_XDP
39
41
40
42 BCLK_ITP_N 51R2J-2-GP
22 PM_PW RBTN#_R R929 DY 0R2J-2-GP 43 44 No Stuff --> R921, R922, R924
H_PW RGD_XDP PCIE_CLK_XDP_P XDP_RST#_R H_CPURST#
1
DY 2 45 46 1
DY 2
2
R930 0R2J-2-GP 47 48 R931 1KR2J-1-GP XDP_DBRESET# 22

49 50
A <Core Design>
A
1
C902 51 52 XDP_TDO
23 SML0_DATA
SCD1U16V2KX-3GP XDP_TRST#
DY 23 SML0_CLK 53 54
XDP_TDI
55 56
Wistron Corporation
2
XDP_TCLK 57 58 XDP_TMS
59 60 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
63 Taipei Hsien 221, Taiwan, R.O.C.
64
XDP_RST#_R Title
NP2 1
R932 DY0R2J-2-GP
2 PLT_RST# 21,37,70,76
CPU (THERMAL/CLOCK/PM )
PAD-60P-GP Size Document Number Rev
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = CPU CPU1D 4 OF 9
CPU1C 3 OF 9
AUBURNDALE
AUBURNDALE
W8 M_CLK_DDR2 19
M_B_DQ[63..0] SB_CK0
19 M_B_DQ[63..0] SB_CK0# W9 M_CLK_DDR#2 19
AA6 M_CLK_DDR0 18 M_B_DQ0 B5 M3 M_CKE2 19
SA_CK0 M_B_DQ1 SB_DQ0 SB_CKE0
SA_CK0# AA7 M_CLK_DDR#0 18 A5 SB_DQ1
M_A_DQ[63..0] P7 M_B_DQ2 C3
18 M_A_DQ[63..0] SA_CKE0 M_CKE0 18 SB_DQ2
M_A_DQ0 A10 M_B_DQ3 B3 V7 M_CLK_DDR3 19
M_A_DQ1 SA_DQ0 M_B_DQ4 SB_DQ3 SB_CK1
D C10 SA_DQ1 E4 SB_DQ4 SB_CK1# V6 M_CLK_DDR#3 19 D
M_A_DQ2 C7 M_B_DQ5 A6 M2 M_CKE3 19
M_A_DQ3 SA_DQ2 M_B_DQ6 SB_DQ5 SB_CKE1
A7 SA_DQ3 SA_CK1 Y6 M_CLK_DDR1 18 A4 SB_DQ6
M_A_DQ4 B10 Y5 M_CLK_DDR#1 18 M_B_DQ7 C4
M_A_DQ5 SA_DQ4 SA_CK1# M_B_DQ8 SB_DQ7
D10 SA_DQ5 SA_CKE1 P6 M_CKE1 18 D1 SB_DQ8
M_A_DQ6 E10 M_B_DQ9 D2
M_A_DQ7 SA_DQ6 M_B_DQ10 SB_DQ9
A8 SA_DQ7 F2 SB_DQ10 SB_CS0# AB8 M_CS#2 19
M_A_DQ8 D8 M_B_DQ11 F1 AD6 M_CS#3 19
M_A_DQ9 SA_DQ8 M_B_DQ12 SB_DQ11 SB_CS1#
F10 SA_DQ9 SA_CS0# AE2 M_CS#0 18 C2 SB_DQ12
M_A_DQ10 E6 AE8 M_CS#1 18 M_B_DQ13 F5
M_A_DQ11 SA_DQ10 SA_CS1# M_B_DQ14 SB_DQ13
F7 SA_DQ11 F3 SB_DQ14
M_A_DQ12 E9 M_B_DQ15 G4 AC7 M_ODT2 19
M_A_DQ13 SA_DQ12 M_B_DQ16 SB_DQ15 SB_ODT0
B7 H6 AD1 M_ODT3 19
M_A_DQ14 SA_DQ13 M_B_DQ17 SB_DQ16 SB_ODT1
E7 AD8 M_ODT0 18 G2
M_A_DQ15 SA_DQ14 SA_ODT0 M_B_DQ18 SB_DQ17
C6 AF9 M_ODT1 18 J6
M_A_DQ16 SA_DQ15 SA_ODT1 M_B_DQ19 SB_DQ18
H10 J3
G8 SA_DQ17 G1 SB_DQ20
M_A_DQ18 K7 M_B_DQ21 G5 D4 M_B_DM0
M_A_DQ19 SA_DQ18 M_B_DQ22 SB_DQ21 SB_DM0 M_B_DM1
J8 SA_DQ19 J2 SB_DQ22 SB_DM1 E1
M_A_DQ20 G7 M_B_DQ23 J1 H3 M_B_DM2
M_A_DQ21 SA_DQ20 M_B_DQ24 SB_DQ23 SB_DM2 M_B_DM3
G10 SA_DQ21 J5 SB_DQ24 SB_DM3 K1
M_A_DQ22 J7 B9 M_A_DM0 M_B_DQ25 K2 AH1 M_B_DM4
M_A_DQ23 SA_DQ22 SA_DM0 M_A_DM1 M_B_DQ26 SB_DQ25 SB_DM4 M_B_DM5
J10 SA_DQ23 SA_DM1 D7 L3 SB_DQ26 SB_DM5 AL2 M_B_DM[7..0] 19
M_A_DQ24 L7 H7 M_A_DM2 M_B_DQ27 M1 AR4 M_B_DM6
M_A_DQ25 SA_DQ24 SA_DM2 M_A_DM3 M_B_DQ28 SB_DQ27 SB_DM6 M_B_DM7
M6 SA_DQ25 SA_DM3 M7 K5 SB_DQ28 SB_DM7 AT8 M_B_DQS#[7..0] 19
M_A_DQ26 M8 AG6 M_A_DM4 M_B_DQ29 K4
M_A_DQ27 SA_DQ26 SA_DM4 M_A_DM5 M_B_DQ30 SB_DQ29
L9 AM7 M_A_DM[7..0] 18 M4
L6 AN10 N5 M_B_DQS[7..0] 19
K8 AN13 M_A_DQS#[7..0] 18 AF3
C M_A_DQ30 SA_DQ29 SA_DM7 M_B_DQ33 SB_DQ32 C
N8 AG1 M_B_A[15..0] 19
M_A_DQ31 SA_DQ30 M_B_DQ34 SB_DQ33 M_B_DQS#0
P9 AJ3 D5
M_A_DQ32 SA_DQ31 M_B_DQ35 SB_DQ34 SB_DQS0# M_B_DQS#1
AH5 SA_DQ32 M_A_DQS[7..0] 18 AK1 SB_DQ35 SB_DQS1# F4
M_A_DQ33 AF5 M_B_DQ36 AG4 J4 M_B_DQS#2
M_A_DQ34 SA_DQ33 M_A_DQS#0 M_B_DQ37 SB_DQ36 SB_DQS2# M_B_DQS#3
AK6 SA_DQ34 SA_DQS0# C9 M_A_A[15..0] 18 AG3 SB_DQ37 SB_DQS3# L4
M_A_DQ35 AK7 F8 M_A_DQS#1 M_B_DQ38 AJ4 AH2 M_B_DQS#4
M_A_DQ36 SA_DQ35 SA_DQS1# M_A_DQS#2 M_B_DQ39 SB_DQ38 SB_DQS4# M_B_DQS#5
AF6 SA_DQ36 SA_DQS2# J9 AH4 SB_DQ39 SB_DQS5# AL4
M_A_DQ37 AG5 N9 M_A_DQS#3 M_B_DQ40 AK3 AR5 M_B_DQS#6
M_A_DQ38 SA_DQ37 SA_DQS3# M_A_DQS#4 M_B_DQ41 SB_DQ40 SB_DQS6# M_B_DQS#7
AJ7 AH7 AK4 AR8
SA_DQ38 SA_DQS4# SB_DQ41 SB_DQS7#
DDR SYSTEM MEMORY A
M_A_DQ39 AJ6 AK9 M_A_DQS#5 M_B_DQ42 AM6

SA_DQ39 SA_DQS5# SB_DQ42
DDR SYSTEM MEMORY - B

M_A_DQ40 AJ10 AP11 M_A_DQS#6 M_B_DQ43 AN2
M_A_DQ41 SA_DQ40 SA_DQS6# M_A_DQS#7 M_B_DQ44 SB_DQ43
AJ9 AT13 AK5
M_A_DQ42 SA_DQ41 SA_DQS7# M_B_DQ45 SB_DQ44
AL10 SA_DQ42 AK2 SB_DQ45
M_A_DQ43 AK12 M_B_DQ46 AM4
AK8 SA_DQ44 AM3 SB_DQ47
M_A_DQ45 AL7 M_B_DQ48 AP3 C5 M_B_DQS0
M_A_DQ46 SA_DQ45 M_A_DQS0 M_B_DQ49 SB_DQ48 SB_DQS0 M_B_DQS1
AK11 C8 AN5 E3
M_A_DQ47 SA_DQ46 SA_DQS0 M_A_DQS1 M_B_DQ50 SB_DQ49 SB_DQS1 M_B_DQS2
AL8 SA_DQ47 SA_DQS1 F9 AT4 SB_DQ50 SB_DQS2 H4
M_A_DQ48 AN8 H9 M_A_DQS2 M_B_DQ51 AN6 M5 M_B_DQS3
AM10 M9 AN4 AG2
AR11 AH8 AN3 AL5
AL11 SA_DQ51 SA_DQS5 AK10 AT5 SB_DQ54 SB_DQS6 AP5
M_A_DQ52 AM9 AN11 M_A_DQS6 M_B_DQ55 AT6 AR7 M_B_DQS7
M_A_DQ53 SA_DQ52 SA_DQS6 M_A_DQS7 M_B_DQ56 SB_DQ55 SB_DQS7
AN9 SA_DQ53 SA_DQS7 AR13 AN7 SB_DQ56
M_A_DQ54 AT11 M_B_DQ57 AP6
AP12 AP8
AM12 SA_DQ56 AT9 SB_DQ59
M_A_DQ57 AN12 M_B_DQ60 AT7
M_A_DQ58 SA_DQ57 M_A_A0 M_B_DQ61 SB_DQ60
AM13 SA_DQ58 SA_MA0 Y3 AP9 SB_DQ61
B M_A_DQ59 M_A_A1 M_B_DQ62 B
AT14 W1 AR10
M_A_DQ60 SA_DQ59 SA_MA1 M_A_A2 M_B_DQ63 SB_DQ62 M_B_A0
AT12 AA8 AT10 U5
M_A_DQ61 SA_DQ60 SA_MA2 M_A_A3 SB_DQ63 SB_MA0 M_B_A1
AL13 AA3 V2
M_A_DQ62 SA_DQ61 SA_MA3 M_A_A4 SB_MA1 M_B_A2
AR14 V1 T5
M_A_DQ63 SA_DQ62 SA_MA4 M_A_A5 SB_MA2 M_B_A3
AP14 AA9 V3
SA_DQ63 SA_MA5 M_A_A6 SB_MA3 M_B_A4
SA_MA6 V8 SB_MA4 R1
T1 M_A_A7 19 M_B_BS0 AB1 T8 M_B_A5
SA_MA7 M_A_A8 SB_BS0 SB_MA5 M_B_A6
SA_MA8 Y9 19 M_B_BS1 W5 SB_BS1 SB_MA6 R2
18 M_A_BS0 AC3 U6 M_A_A9 19 M_B_BS2 R7 R6 M_B_A7
SA_BS0 SA_MA9 M_A_A10 SB_BS2 SB_MA7 M_B_A8
18 M_A_BS1 AB2 AD4 R4
SA_BS1 SA_MA10 M_A_A11 SB_MA8 M_B_A9
18 M_A_BS2 U7 SA_BS2 SA_MA11 T2 SB_MA9 R5
U3 M_A_A12 19 M_B_CAS# AC5 AB5 M_B_A10
SA_MA12 M_A_A13 SB_CAS# SB_MA10 M_B_A11
SA_MA13 AG8 19 M_B_RAS# Y7 SB_RAS# SB_MA11 P3
T3 M_A_A14 19 M_B_W E# AC6 R3 M_B_A12
SA_MA14 M_A_A15 SB_WE# SB_MA12 M_B_A13
18 M_A_CAS# AE1 V9 AF7
SA_CAS# SA_MA15 SB_MA13 M_B_A14
18 M_A_RAS# AB3 P5
SA_RAS# SB_MA14 M_B_A15
18 M_A_W E# AE9 SA_WE# SB_MA15 N1
A <Core Design> A
Wistron Corporation
Title
CPU (DDR)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = CPU
CPU1E 5 OF 9
AJ13
AUBURNDALE
RSVD#AJ13
D RSVD#AJ12 AJ12 D
AP25 RSVD#AP25
AL25 RSVD#AL25 RSVD#AH25 AH25
AL24 RSVD#AL24 RSVD#AK26 AK26
AL22 RSVD#AL22
AJ33 RSVD#AJ33 RSVD#AL26 AL26
AG9 RSVD#AG9 RSVD_NCTF#AR2 AR2
M27 RSVD#M27
CFG0 L28 AJ26
TP1116 SA_DIMM_VREF# RSVD#L28 RSVD#AJ26
PCI-Express Configuration Select 1 J17 SA_DIMM_VREF# RSVD#AJ27 AJ27
1
TP1117 1 SB_DIMM_VREF# H17

R1101 SB_DIMM_VREF#
G25 RSVD#G25
3KR2F-GP 1:Single PEG
DY CFG0
G17
E31
RSVD#G17
0:Bifurcation enabled E30
RSVD#E31
2
RSVD#E30
RSVD#AL28 AL28
CFG0 AM30 AL29
CFG0 RSVD#AL29
AM28 CFG1 RSVD#AP30 AP30
AP31 CFG2 RSVD#AP32 AP32
CFG3 AL32 AL27
CFG3 CFG4 CFG3 RSVD#AL27
AL30 CFG4 RSVD#AT31 AT31
CFG3 - PCI-Express Static Lane Reversal AM31 CFG5 RSVD#AT32 AT32
1
AN29 CFG6 RSVD#AP33 AP33

R1102 CFG7 AM32 AR33
3KR2J-2-GP CFG7 RSVD#AR33
DY 1 :Normal Operation AK32 CFG8
CFG3 AK31
RESERVED
C
0 :Lane Numbers Reversed AK28
CFG9
C
2
CFG10
15 -> 0, 14 -> 1, ... AJ28 CFG11
AN30 CFG12 RSVD#AR32 AR32
AN32 CFG13
AJ32 CFG14
AJ29 CFG15 RSVD_TP#E15 E15
AJ30 CFG16 RSVD_TP#F15 F15
AK30 CFG17 KEY A2
H16 RSVD_TP#H16 RSVD#D15 D15
RSVD#C15 C15
RSVD#AJ15 AJ15
RSVD#AH15 AH15
CFG4
CFG4 - Display Port Presence B19 RSVD#B19
1
A19 RSVD#A19
R1103
3KR2F-GP 1:Disabled; No Physical Display Port
DY CFG4
A20
B20
RSVD#A20
attached to Embedded Display Port RSVD#B20
AA5
2
RSVD_TP#AA5
0:Enabled; An external Display Port U9 RSVD#U9 RSVD_TP#AA4 AA4
device is connected to the Embedded T9 RSVD#T9 RSVD_TP#R8 R8
AD3
Display Port AC9
RSVD_TP#AD3
AD2
RSVD#AC9 RSVD_TP#AD2
AB9 RSVD#AB9 RSVD_TP#AA2 AA2
RSVD_TP#AA1 AA1
RSVD_TP#R9 R9
RSVD_TP#AG7 AG7
RSVD_TP#AE3 AE3
CFG7 V4
RSVD_TP#V4
CFG7(Reserved) - Temporarily used for early RSVD_TP#V5 V5
1
N2
R1104 Clarksfield samples. RSVD_TP#N2
B
3KR2F-GP
J29 RSVD#J29 RSVD_TP#AD5 AD5 VSS (AP34) can be left NC is B
DY CFG7 Clarksfield (only for early samples pre-ES1) -
J28 RSVD#J28 RSVD_TP#AD7 AD7
W3 CRB implementation; EDS/DG
RSVD_TP#W3
Connect to GND with 3.01K Ohm/5% resistor. W2 recommendation to GND.
2
RSVD_TP#W2
RSVD_TP#N3 N3
RSVD_TP#AE5 AE5
Note: Only temporary for early CFD sample RSVD_TP#AD9 AD9
(rPGA/BGA) [For details please refer to the
WW33 MoW and sighting report]. VSS AP34
For a common M/B design (for AUB and CFD),
the pull-down resistor shouble be used. Does
not impact AUB functionality.
A A
<Core Design>
Wistron Corporation
Title

CPU (RESERVED) Rev

5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = CPU CPU1F 6 OF 9
AUBURNDALE
+VCC_CORE
+1.05V_VTT
PROCESSOR CORE POWER
AG35 AH14
VCC VTT0
AG34 AH12
VCC VTT0
1
AG33 AH11 C1216 C1201 C1202 C1217 C1218 C1203 C1219 C1204 C1205
+VCC_CORE 48A AG32
VCC
VCC
VTT0
VTT0 AH10
DY DY DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U6D3V5KX-1GP
AG31 J14
2
VCC VTT0
D AG30 VCC VTT0 J13 D
AG29 VCC VTT0 H14
C1206 C1207 C1208 C1209 C1220 C1210 AG28 H12
VCC VTT0
1
1
AG27 G14
VCC VTT0
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AG26 G13
VCC VTT0
AF35 G12
DY DY DY
2
2
VCC VTT0
AF34 G11
VCC VTT0
AF33 VCC VTT0 F14
AF32 VCC VTT0 F13
AF31 F12 +1.05V_VTT
VCC VTT0
AF30 VCC VTT0 F11
AF29
VCC VTT0
E14
C1222
The decoupling capacitors, filter
AF28 VCC VTT0 E12
recommendations and sense resistors on the
1
AF27 D14 C1211 C1221
VCC VTT0
SC10U6D3V5MX-3GP
AF26 D13 CPU/PCH Rails are specific to the CRB
VCC VTT0 DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1.1V RAIL POWER
C1212 C1213 C1214 C1215 C1223 C1224 AD35 D12
2
VCC VTT0
1
1 AD34 VCC VTT0 D11 Implementation. Customers need to follow the

SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AD33 C14 recommendations in the Calpella Platform
VCC VTT0
AD32 C13
DY DY
2
VCC VTT0 Design Guide.

AD31 C12
VCC VTT0
AD30 C11
VCC VTT0
AD29 B14
VCC VTT0
AD28 VCC VTT0 B12
AD27 VCC VTT0 A14
AD26 A13
VCC VTT0
AC35 VCC VTT0 A12
AC34 A11
VCC VTT0
AC33
C1225 C1226 C1227 C1229 C1230 C1231 C1232 VCC +1.05V_VTT
AC32 VCC
1
AC31 VCC
SC10U6D3V5KX-1GP
SC10U6D3V5MX-3GP
SC10U6D3V5KX-1GP
SC10U6D3V5MX-3GP
SC10U6D3V5KX-1GP
SC10U6D3V5MX-3GP
SC10U6D3V5KX-1GP
AC30 AF10
DY AC29
VCC VTT0
AE10
2
VCC VTT0 C1234

AC28 VCC VTT0 AC10
1
CPU CORE SUPPLY
C AC27 AB10 C1233 C
VCC VTT0
SC10U6D3V5MX-3GP
AC26 Y10
VCC VTT0
SC10U6D3V5KX-1GP
AA35 W10
DY
2
VCC VTT0
AA34 VCC VTT0 U10
AA33 T10
VCC VTT0
AA32 VCC VTT0 J12
AA31 J11
VCC VTT0
AA30 VCC VTT0 J16
C1235 C1236 C1237 C1238 C1240 C1241 C1242 AA29 J15
VCC VTT0
1
AA28 VCC
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5MX-3GP
SC10U6D3V5KX-1GP
AA27
VCC
AA26
DY DY
2
VCC
Y35
Y34
VCC Please note that the VTT Rail
VCC
Y33
Y32
VCC Values are Auburndale
VCC
C1243 Y31
VCC VTT=1.05V; Clarksfield
1
Y30
VCC
VTT=1.1V
SC10U6D3V5KX-1GP
Y29 VCC
Y28
2
VCC
2010/04/19 Y27
VCC
Y26
X01 VCC
V35 AN33 PSI# 47
VCC PSI#
V34
VCC
V33 H_VID[6..0] 47
VCC H_VID0
V32 VCC VID0 AK35
V31 AK33 H_VID1
VCC VID1 H_VID2
V30 POWER AK34
VCC VID2 H_VID3
V29 AL35
VCC VID3
V28
VCC CPU VIDS VID4
AL33 H_VID4
V27 AM33 H_VID5
VCC VID5 H_VID6
V26 VCC VID6 AM35
U35 VCC PROC_DPRSLPVR AM34 PM_DPRSLPVR 47
B U34 B
VCC
U33 VCC
U32
VCC H_VTTVID1 TP1201TPAD14-GP
U31 G15 1
VCC VTT_SELECT
U30
VCC
U29
VCC H_VTTVID1 = Low, 1.1V
U28
VCC H_VTTVID1 = High, 1.05V
U27 VCC
U26 +VCC_CORE
VCC
R35
VCC
R34 VCC
1
R33
VCC R1201
R32 VCC ISENSE AN35 IMVP_IMON 47
R31 100R2F-L1-GP-U
VCC
R30
VCC
R29
2
VCC
SENSE LINES
R28 AJ34 VCC_SENSE 47

VCC VCC_SENSE
R27 AJ35 VSS_SENSE 47
VCC VSS_SENSE
R26
VCC
1
P35 VCC
P34 B15 VTT_SENSE 49 R1204
VCC VTT_SENSE TP_VSS_SENSE_VTT 1 100R2F-L1-GP-U
P33 VCC VSS_SENSE_VTT A15
P32 TP1202TPAD14-GP
VCC
P31
2
VCC
P30 VCC
P29
VCC
P28
VCC
P27
VCC
P26
VCC
A A
<Core Design>
Wistron Corporation
Title
CPU (VCC_CORE)
www.vinafix.vn
5 4 3 2 1
5 4 3 2 1
SSID = CPU +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN
1
DYC1376 DYC1377 DYC1378 DYC1379
SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP
2
+1.5V_SUS +1.5V_SUS +1.5V_SUS +1.5V_SUS
+CPU_GFX_CORE
22A CPU1G 7 OF 9
425302_425302_Calpella_S3PowerReduction_WhitePape
AT21
AUBURNDALE
VAXG1
D
C1325 C1328 C1323 C1326 C1324 C1309 C1312
AT19 VAXG2 VAXG_SENSE AR22 VCC_AXG_SENSE 53 Revision 0.7 D
SENSE
LINES
AT18 AT22
1
VAXG3 VSSAXG_SENSE VSS_AXG_SENSE 53
AT16 VAXG4
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
2010/04/19 AR21 VAXG5
AR19
2
X01 VAXG6
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
AR18 VAXG7
SC10U6D3V5MX-3GP
AR16 VAXG8 GFX_VID0 AM22 GFX_VID0 53
AP21 VAXG9 GFX_VID1 AP22 GFX_VID1 53
GRAPHICS VIDs
AP19 VAXG10 GFX_VID2 AN22 GFX_VID2 53
AP18 AP23
VAXG11 GFX_VID3 GFX_VID3 53
AP16 VAXG12 GFX_VID4 AM23 GFX_VID4 53
AN21 VAXG13 GFX_VID5 AP24 GFX_VID5 53
GRAPHICS
AN19 AN24 GFX_VID6 53
VAXG14 GFX_VID6
AN18
VAXG15 R1305
AN16 2 1 4K7R2J-2-GP
VAXG16
AM21 AR25 GFX_VR_EN 53
VAXG17 GFX_VR_EN
AM19 VAXG18 GFX_DPRSLPVR AT25 GFX_DPRSLPVR 53
AM18 AM24 GFX_IMON_C 1 DY 2 GFX_IMON 53
VAXG19 GFX_IMON R1304 0R2J-2-GP
AM16 VAXG20
AL21
VAXG21
AL19 VAXG22 +1.5V_RUN
Please note that the VTT Rail AL18
AL16
VAXG23
3A
VAXG24
Values are: Auburndale VTT=1.05V AK21
AK19
VAXG25 VDDQ
AJ1
AF1
VAXG26 VDDQ
1
C1301 C1302 C1303 C1304 C1305 C1306 C1307
- 1.5V RAILS
Clarksfield VTT=1.1V AK18
VAXG27 VDDQ
AE7
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
AK16 AE4 TC1301
VAXG28 VDDQ SE330U2D5VDM-2GP
AJ21 AC1
2
VAXG29 VDDQ
AJ19 AB7
C VAXG30 VDDQ C
AJ18 AB4
VAXG31 VDDQ
AJ16 Y1
VAXG32 VDDQ
AH21 VAXG33 VDDQ W7
AH19 W4
VAXG34 VDDQ
AH18 VAXG35 VDDQ U1
AH16 VAXG36 VDDQ T7
VDDQ T4
POWER
VDDQ P1
N7
+1.05V_VTT VDDQ
VDDQ N4
DDR3
VDDQ L1
J24 H1
VTT1 VDDQ
FDI
J23 VTT1
C1308 H25
VTT1
1
SC10U6D3V5KX-1GP
P10
2
VTT1 +1.05V_VTT
VTT1 N10
L10
VTT1
K10
VTT1 C1310 C1311
1
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
+1.05V_VTT
18A
2
1.1V
J22
VTT1
K26 J20
VTT1 VTT1
J27 VTT1 VTT1 J18
+1.05V_VTT
PEG & DMI

C1313 C1315 J26 H21
1
C1314 VTT1 VTT1

J25 VTT1 VTT1 H20
B B
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
H27 H19
VTT1 VTT1 C1316
G28
SC10U10V5KX-2GP
DY
2
VTT1
1
SC10U6D3V5KX-1GP
G27
VTT1 C1317
G26
F26
VTT1 DY SC10U6D3V5MX-3GP
2
VTT1
E26 VTT1 VTT1 L26
1.8V
E25 L27
VTT1 VTT1
VTT1 M26 1.35A +1.8V_RUN
1
C1318 C1319 C1320 C1321
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC4D7U6D3V5KX-3GP
C1322
SC2D2U6D3V3KX-GP
SC10U6D3V5MX-3GP
2
A <Core Design> A
Wistron Corporation
Title

CPU (VCC_GFXCORE) Rev
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = CPU
CPU1H 8 OF 9 CPU1I 9 OF 9
AT20 AE34
VSS VSS
AT17 AE33
AUBURNDALE
AUBURNDALE
VSS VSS
AR31 AE32 K27
VSS VSS VSS
AR28 VSS VSS AE31 K9 VSS
D AR23 VSS VSS AE28 J32 VSS D
AR20 VSS VSS AE27 J30 VSS
AR12 VSS VSS AD10 H35 VSS
AR9 VSS VSS AC8 H32 VSS
AP20 VSS VSS AB35 H24 VSS
AP17 AB34 H22
VSS VSS VSS
AP7 AB31 H13
VSS VSS VSS
AP4 AB30 H11
VSS VSS VSS
AP2 AB29 H8
VSS VSS VSS
AN34 AB28 H5
VSS VSS VSS
AN31 VSS VSS AB27 H2 VSS
AN23 AB26 G34
VSS VSS VSS
AN20 VSS VSS AB6 G31 VSS
AN17 AA10 G20
VSS VSS VSS
AM29 VSS VSS Y8 G9 VSS
AM27 Y4 G6
VSS VSS VSS
AM25 VSS VSS Y2 G3 VSS
AM20 W35 F30
VSS VSS VSS
AM17 VSS VSS W34 F27 VSS
AM14 W33 F25
VSS VSS VSS
AM11 W32 F22
VSS VSS VSS
AM8 W31 F19
VSS VSS VSS
AM5 W30 F16
C VSS VSS VSS C
AM2 W29 E35
VSS VSS VSS
AL34 W28 E32
AL31
AL23
VSS
VSS
VSS
VSS VSS
VSS
VSS
W27
W26
E29
E24
VSS
VSS
VSS
VSS
AL20 VSS VSS W6 E21 VSS
AL17 VSS VSS V10 E18 VSS
AL12 VSS VSS U8 E13 VSS
AL9 VSS VSS U4 E11 VSS
AL6 U2 E8
VSS VSS VSS
AL3 VSS VSS T35 E5 VSS
AK29 VSS VSS T34 E2 VSS VSS_NCTF#AR34 AR34
AK27 T33 D33 B34
VSS VSS VSS VSS_NCTF#B34
AK25 VSS VSS T32 D30 VSS VSS_NCTF#B2 B2
AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35
AK20 T31 D26
A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,
VSS VSS VSS
AK17 VSS VSS T30 D9 VSS
AJ31 T29 D6 B1 TP_MCP_VSS_NCTF1 1 TP1403
VSS VSS VSS VSS_NCTF#B1 TP_MCP_VSS_NCTF2 TP1404
AJ23 T28 D3 A35 1
VSS VSS VSS VSS_NCTF#A35 TP_MCP_VSS_NCTF3 TP1406
AJ20 VSS VSS T27 C34 VSS VSS_NCTF#AT1 AT1 1
AJ17 T26 C32 AT35 TP_MCP_VSS_NCTF4 1 TP1405
VSS VSS VSS VSS_NCTF#AT35
AJ14 T6 C29 AT33
VSS VSS VSS RSVD_NCTF#AT33
AJ11 R10 C28 AT34
VSS VSS VSS RSVD_NCTF#AT34
AJ8 VSS VSS P8 C24 VSS RSVD_NCTF#AP35 AP35
AJ5 VSS VSS P4 C22 VSS RSVD_NCTF#AR35 AR35
AJ2 VSS VSS P2 C20 VSS RSVD_NCTF#AT3 AT3
AH35 N35 C19 AR1
VSS VSS VSS RSVD_NCTF#AR1
AH34 N34 C16 AP1
VSS VSS VSS RSVD_NCTF#AP1
AH33 VSS VSS N33 B31 VSS RSVD_NCTF#AT2 AT2
AH32 VSS VSS N32 B25 VSS RSVD_NCTF#C1 C1
AH31 N31 B21 A3
NCTF TEST PIN:

B VSS VSS VSS RSVD_NCTF#A3 B
AH30 N30 B18 C35
VSS VSS VSS RSVD_NCTF#C35
AH29 N29 B17 B35
VSS VSS VSS RSVD_NCTF#B35
AH28 N28 B13 A34
VSS VSS VSS RSVD_NCTF#A34
AH27 N27 B11 A33
VSS VSS VSS RSVD_NCTF#A33
AH26 N26 B8
VSS VSS VSS
AH20 VSS VSS N6 B6 VSS
AH17 VSS VSS M10 B4 VSS
AH13 VSS VSS L35 A29 VSS
AH6 L29 A23
VSS VSS VSS
AG10 VSS VSS L5
AF8 VSS VSS L2
AF4 K34
VSS VSS
AF2 K33
VSS VSS
AE35 K30
VSS VSS
A <Core Design> A
Wistron Corporation
Title
CPU (VSS)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = MEMORY M_A_DM[7..0] 10
M_A_DQS#[7..0] 10
M_A_DQS[7..0] 10
DM1
M_A_A[15..0] 10
M_A_A0 98 NP1 Note:
M_A_A1 A0 NP1
97 NP2
M_A_A2 A1 NP2 If SA0 DIM0 = 0, SA1_DIM0 = 0
96
M_A_A3 A2 SA0_DIM0
95 110 M_A_RAS# 10 SO-DIMMA SPD Address is 0xA0
M_A_A4 A3 RAS#
92 113 M_A_WE# 10
A4 WE#
M_A_A5 91
A5 CAS#
115 M_A_CAS# 10 SA1_DIM0 SO-DIMMA TS Address is 0x30
M_A_A6 90
M_A_A7 A6
86 114 M_CS#0 10
A7 CS0#
3
4
M_A_A8 89
A8 CS1#
121 M_CS#1 10 If SA0 DIM0 = 1, SA1_DIM0 = 0
D M_A_A9 85 RN1801 D
M_A_A10 107
A9
73 SRN10KJ-5-GP
SO-DIMMA SPD Address is 0xA2
A10/AP CKE0 M_CKE0 10
M_A_A11 84 74 M_CKE1 10 SO-DIMMA TS Address is 0x32
M_A_A12 A11 CKE1
83
M_A_A13 A12
119 101 M_CLK_DDR0 10
2
1
M_A_A14 A13 CK0
80 103 M_CLK_DDR#0 10
M_A_A15 A14 CK0#
78
A15
10 M_A_BS2 79 102 M_CLK_DDR1 10
A16/BA2 CK1
104 M_CLK_DDR#1 10
CK1#
109
10 M_A_BS0 BA0 M_A_DM0
108 11
10 M_A_BS1 BA1 DM0 M_A_DM1
10 M_A_DQ[63..0] 28
M_A_DQ0 DM1 M_A_DM2
5 46
M_A_DQ1 DQ0 DM2 M_A_DM3
7 63
15 136
17 153
4 170
6 187
M_A_DQ6 DQ5 DM7
16
M_A_DQ7 DQ6 SODIMM0_1_SMB_DATA_R R1804
18 200 1 2 0R0402-PAD PCH_SMBDATA 7,19,23,76
M_A_DQ8 DQ7 SDA SODIMM0_1_SMB_CLK_R R1805
21 202 1 2 0R0402-PAD PCH_SMBCLK 7,19,23,76
M_A_DQ9 DQ8 SCL
23
M_A_DQ10 DQ9 +3.3V_RUN
33 198 PM_EXTTS#0 9
M_A_DQ11 DQ10 EVENT#
35
M_A_DQ12 DQ11
22 199
M_A_DQ13 DQ12 VDDSPD
24
M_A_DQ14 DQ13 SA0_DIM0
34 197
DQ14 SA0
1
M_A_DQ15 36 201 SA1_DIM0
M_A_DQ16 DQ15 SA1 C1801 C1802
39
M_A_DQ17 41
DQ16
77 SCD1U10V2KX-5GP DY SC2D2U10V3KX-1GP
2
M_A_DQ18 DQ17 NC#1
51 122
M_A_DQ19 DQ18 NC#2 +1.5V_SUS
53 125
M_A_DQ20 DQ19 NC#/TEST
40
M_A_DQ21 DQ20
42 75
M_A_DQ22 DQ21 VDD1
50 76
M_A_DQ23 DQ22 VDD2
52 81
M_A_DQ24 DQ23 VDD3
M_A_DQ25
57
DQ24 VDD4
82 SODIMM A DECOUPLING
59 87
M_A_DQ26 DQ25 VDD5 +1.5V_SUS
67 88
M_A_DQ27 DQ26 VDD6
69 93
M_A_DQ28 DQ27 VDD7
56 94
M_A_DQ29 DQ28 VDD8
C 58 99 C
M_A_DQ30 DQ29 VDD9
68 100
M_A_DQ31 DQ30 VDD10
70 105
M_A_DQ32 DQ31 VDD11 TC1801 C1803 C1804 C1805 C1806 C1807 C1808 C1809 C1810
129 106
DQ32 VDD12
1
SE330U2D5VDM-2GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U6D3V5KX-1GP
SC10U10V5ZY-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
M_A_DQ33 131 111
M_A_DQ34 DQ33 VDD13
M_A_DQ35
141
DQ34 VDD14
112 DY DY DY DY DY DY
143 117
2
+V_DDR_REF M_A_DQ36 DQ35 VDD15
130 118
M_A_DQ37 DQ36 VDD16
132 123
M_A_DQ38 DQ37 VDD17
140 124
M_A_DQ39 DQ38 VDD18
142
DQ39
1
C1818 M_A_DQ40 147 2

C1817 SC2D2U10V3KX-1GP C1826 M_A_DQ41 DQ40 VSS
149 3
SCD1U10V2KX-5GP DY SCD1U10V2KX-5GP M_A_DQ42 157
DQ41 VSS
8
2
M_A_DQ43 DQ42 VSS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
159 9
M_A_DQ44 DQ43 VSS
146 13
DQ44 VSS
1
C1813
C1814
C1815
C1816
M_A_DQ45 148 14 Layout Note:
M_A_DQ46 DQ45 VSS
158 19
M_A_DQ47 DQ46 VSS Place these Caps near
160 20
2
M_A_DQ48 DQ47 VSS
163 25 SO-DIMMA.
M_A_DQ49 DQ48 VSS
165 26
M_A_DQ50 DQ49 VSS
175 31
M_A_DQ51 DQ50 VSS
177 32
M_A_DQ52 DQ51 VSS
164 37
M_A_DQ53 DQ52 VSS
166 38
M_A_DQ54 DQ53 VSS
174 43
M_A_DQ55 DQ54 VSS
176 44
M_A_DQ56 DQ55 VSS
181 48
M_A_DQ57 DQ56 VSS
183 49
M_A_DQ58 DQ57 VSS
191 54
M_A_DQ59 DQ58 VSS
193 55
M_A_DQ60 DQ59 VSS
180 60
M_A_DQ61 DQ60 VSS
182 61
M_A_DQ62 DQ61 VSS
192 65
M_A_DQ63 DQ62 VSS
194 66
DQ63 VSS
71
M_A_DQS#0 VSS
10 72
M_A_DQS#1 DQS0# VSS
27 127
M_A_DQS#2 DQS1# VSS
45 128
M_A_DQS#3 DQS2# VSS
62 133
M_A_DQS#4 DQS3# VSS
135 134
B M_A_DQS#5 DQS4# VSS B
152 138
M_A_DQS#6 DQS5# VSS
169 139
M_A_DQS#7 DQS6# VSS
186 144
DQS7# VSS
145
M_A_DQS0 VSS
12 150
M_A_DQS1 DQS0 VSS
29 151
M_A_DQS2 DQS1 VSS
47 155
M_A_DQS3 DQS2 VSS
64 156
M_A_DQS4 DQS3 VSS
137 161
M_A_DQS5 DQS4 VSS
154 162
M_A_DQS6 DQS5 VSS
171 167
M_A_DQS7 DQS6 VSS
+0.75V_DDR_VTT Place these caps 188
DQS7 VSS
168
172
close to VTT1 and VSS
116 173
10 M_ODT0 ODT0 VSS
VTT2. 120 178
10 M_ODT1 ODT1 VSS
179
VSS
+V_DDR_REF 126 184
VREF_CA VSS
1 185
VREF_DQ VSS
C1820
C1821
C1822
C1823
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
189
VSS
1
30 190
9,19 DDR3_DRAMRST# RESET# VSS
DY DY VSS
195
196
2
VSS
+0.75V_DDR_VTT 203 205
VTT1 VSS
204 206
VTT2 VSS
H =5.2mm DDR3-204P-46-GP
62.10017.P11
A A
<Core Design>
Wistron Corporation
Title
DDR3-SODIMM1
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = MEMORY DM2
M_B_A0 98 NP1 M_B_DM[7..0] 10

M_B_A1 A0 NP1 +3.3V_RUN
97 NP2
M_B_A2 A1 NP2
96 M_B_DQS#[7..0] 10
M_B_A3 A2 SA0_DIM1
95 110 M_B_RAS# 10
A3 RAS#
3
4
M_B_A4 92 113 M_B_WE# 10
M_B_A5 A4 WE# RN1901
91 115 M_B_CAS# 10 M_B_DQS[7..0] 10
M_B_A6 A5 CAS#
90 SRN10KJ-5-GP
M_B_A7 A6
86 114 M_CS#2 10 M_B_A[15..0] 10
M_B_A8 A7 CS0#
89 121 M_CS#3 10
M_B_A9 A8 CS1#
85
2
1
M_B_A10 A9
107 73 M_CKE2 10
M_B_A11 A10/AP CKE0
84 74 M_CKE3 10
M_B_A12 A11 CKE1 SA1_DIM1
83
M_B_A13 A12
119 101 M_CLK_DDR2 10
M_B_A14 A13 CK0
80 103 M_CLK_DDR#2 10
M_B_A15 A14 CK0#
78
A15
D 79 102 M_CLK_DDR3 10 D
10 M_B_BS2 A16/BA2 CK1
104 M_CLK_DDR#3 10
CK1#
10 M_B_BS0 109
BA0 M_B_DM0
108 11
10 M_B_BS1 BA1 DM0 M_B_DM1
10 M_B_DQ[63..0] 28
M_B_DQ0 DM1 M_B_DM2
5 46
M_B_DQ1 DQ0 DM2 M_B_DM3
7 63
15 136
17 153
4 170
6 187
M_B_DQ6 DQ5 DM7
16
M_B_DQ7 DQ6 SODIMM1_1_SMB_DATA_R R1904
18 200 1 2 0R0402-PAD PCH_SMBDATA 7,18,23,76
M_B_DQ8 DQ7 SDA SODIMM1_1_SMB_CLK_R R1905
21 202 1 2 0R0402-PAD PCH_SMBCLK 7,18,23,76
M_B_DQ9 DQ8 SCL
23
M_B_DQ10 DQ9 +3.3V_RUN
33 198 PM_EXTTS#1 9
M_B_DQ11 DQ10 EVENT#
35
M_B_DQ12 DQ11
22 199
M_B_DQ13 DQ12 VDDSPD
24
DQ13
1
M_B_DQ14 34 197 SA0_DIM1
M_B_DQ15 DQ14 SA0 SA1_DIM1 C1901 C1902
M_B_DQ16
36
DQ15 SA1
201
SCD1U10V2KX-5GP
DY SC2D2U10V3KX-1GP
39
2
M_B_DQ17 DQ16
41 77
M_B_DQ18 DQ17 NC#1
51 122
M_B_DQ19 DQ18 NC#2 +1.5V_SUS
53 125
M_B_DQ20 DQ19 NC#/TEST
40
M_B_DQ21 DQ20
42 75
M_B_DQ22 DQ21 VDD1
50 76
M_B_DQ23 DQ22 VDD2
52 81
M_B_DQ24 DQ23 VDD3
57 82
M_B_DQ25 DQ24 VDD4
59 87
M_B_DQ26 DQ25 VDD5
67 88
M_B_DQ27 DQ26 VDD6
69 93
M_B_DQ28 DQ27 VDD7
56 94
+V_DDR_REF M_B_DQ29 DQ28 VDD8
58 99
M_B_DQ30 DQ29 VDD9
68 100
M_B_DQ31 DQ30 VDD10
70 105
M_B_DQ32 DQ31 VDD11
129 106
DQ32 VDD12
1
C1924 M_B_DQ33 131 111

C1923 SC2D2U10V3KX-1GP C1925 M_B_DQ34 DQ33 VDD13
141 112
SCD1U10V2KX-5GP SCD1U10V2KX-5GP M_B_DQ35 DQ34 VDD14
143 117
DY
2
M_B_DQ36 DQ35 VDD15

C 130 118 C
M_B_DQ37 DQ36 VDD16
132 123
M_B_DQ38 DQ37 VDD17
140 124
M_B_DQ39 DQ38 VDD18
142
M_B_DQ40 DQ39
147 2
M_B_DQ41 DQ40 VSS
M_B_DQ42
149
DQ41 VSS
3 SODIMM B DECOUPLING
157 8
M_B_DQ43 DQ42 VSS +1.5V_SUS
159 9
M_B_DQ44 DQ43 VSS
146 13
M_B_DQ45 DQ44 VSS
148 14
M_B_DQ46 DQ45 VSS
158 19
M_B_DQ47 DQ46 VSS
160 20
M_B_DQ48 DQ47 VSS
163 25
M_B_DQ49 DQ48 VSS C1905 C1906 C1907 C1908 C1909 C1910 C1911 C1912
165 26
DQ49 VSS
1
SC10U10V5ZY-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
M_B_DQ50 175 31
M_B_DQ51 DQ50 VSS
M_B_DQ52
177
DQ51 VSS
32
DY DY DY
164 37
2
M_B_DQ53 DQ52 VSS
166 38
M_B_DQ54 DQ53 VSS
174 43
M_B_DQ55 DQ54 VSS
176 44
M_B_DQ56 DQ55 VSS
181 48
M_B_DQ57 DQ56 VSS
183 49
M_B_DQ58 DQ57 VSS
191 54
M_B_DQ59 DQ58 VSS
193 55
M_B_DQ60 DQ59 VSS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
180 60
M_B_DQ61 DQ60 VSS
182 61
DQ61 VSS
1
C1915
C1916
C1917
C1918
M_B_DQ62 192 65 Layout Note:
M_B_DQ63 DQ62 VSS
194 66
DQ63 VSS Place these Caps near
71
2
M_B_DQS#0 VSS
10 72 SO-DIMMB.
M_B_DQS#1 DQS0# VSS
27 127
M_B_DQS#2 DQS1# VSS
45 128
M_B_DQS#3 DQS2# VSS
62 133
M_B_DQS#4 DQS3# VSS
135 134
M_B_DQS#5 DQS4# VSS
152 138
M_B_DQS#6 DQS5# VSS
169 139
M_B_DQS#7 DQS6# VSS
186 144
DQS7# VSS
145
M_B_DQS0 VSS
12 150
M_B_DQS1 DQS0 VSS
29 151
M_B_DQS2 DQS1 VSS
47 155
B M_B_DQS3 DQS2 VSS B
64 156
M_B_DQS4 DQS3 VSS
137 161
M_B_DQS5 DQS4 VSS
154 162
M_B_DQS6 DQS5 VSS
171 167
M_B_DQS7 DQS6 VSS
188 168
DQS7 VSS
172
VSS
116 173
10 M_ODT2 ODT0 VSS
120 178
10 M_ODT3 ODT1 VSS
179
VSS
+V_DDR_REF 126 184
VREF_CA VSS
1 185
VREF_DQ VSS
189
+0.75V_DDR_VTT VSS
30 190
9,18 DDR3_DRAMRST# RESET# VSS
195
VSS
196
VSS
203 205
VTT1 VSS
204 206
VTT2 VSS
Place these caps
C1919
C1920
C1921
C1922
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
H = 9.2mmDDR3-204P-43-GP
1
close to VTT1 and

VTT2. DY DY
62.10017.N71
2
Note:
SO-DIMMB SPD Address is 0xA4 SO-DIMMB is placed farther from
SO-DIMMB TS Address is 0x34 the Processor than SO-DIMMA
A A
<Core Design>
Wistron Corporation
Title
DDR3-SODIMM2
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = PCH
D D
U2001D 4 OF 10
37 PCH_VGA_BLEN T48 L_BKLTEN SDVO_TVCLKINN BJ46
54 PCH_LCDVDD_EN T47 L_VDD_EN SDVO_TVCLKINP BG46
54 PCH_LBKLT_CTL Y48 BJ48

L_BKLTCTL SDVO_STALLN
SDVO_STALLP BG48
54 LDDC_CLK_PCH LDDC_CLK_PCH AB48
LDDC_DATA_PCH L_DDC_CLK
54 LDDC_DATA_PCH Y45 BF45
L_DDC_DATA SDVO_INTN
BH45
LCTRL_CLK SDVO_INTP
AB46
LCTRL_DATA L_CTRL_CLK
V48
L_CTRL_DATA
LIBG AP39 T51
TPAD14-GP TP2001 LVD_IBG SDVO_CTRLCLK
1LVDS_VBG AP41 T53
1
LVD_VBG SDVO_CTRLDATA
R2003 R2002 AT43 LVD_VREFH
1 PCH_LCDVDD_EN Place near PCH 2K37R2F-GP
2
DY AT42
LVD_VREFL DDPB_AUXN
BG44
BJ44
100KR2J-1-GP DDPB_AUXP
AU38
2
DDPB_HPD
LVDS
54 PCH_LVDSA_TXC# AV53 LVDSA_CLK#
54 PCH_LVDSA_TXC AV51 BD42
LVDSA_CLK DDPB_0N
BC42
DDPB_0P
54 PCH_LVDSA_TX0# BB47 BJ42
LVDSA_DATA#0 DDPB_1N
BA52 BG42
Digital Display Interface

54 PCH_LVDSA_TX1# LVDSA_DATA#1 DDPB_1P
C AY48 BB40 C
Impedance:85 ohm 54 PCH_LVDSA_TX2#
AV47
LVDSA_DATA#2 DDPB_2N
BA40
+3.3V_RUN LVDSA_DATA#3 DDPB_2P
DDPB_3N AW38
54 PCH_LVDSA_TX0 BB48 BA38
LVDSA_DATA0 DDPB_3P
54 PCH_LVDSA_TX1 BA50 LVDSA_DATA1
54 PCH_LVDSA_TX2 AY49 LVDSA_DATA2
AV48 LVDSA_DATA3 DDPC_CTRLCLK Y49
AB49
4
3
2
1
DDPC_CTRLDATA
RN2002 AP48 LVDSB_CLK#
SRN2K2J-4-GP AP47 LVDSB_CLK DDPC_AUXN BE44
BD44
DDPC_AUXP
AY53 LVDSB_DATA#0 DDPC_HPD AV40
AT49
5
6
7
8
LCTRL_DATA LVDSB_DATA#1
AU52 LVDSB_DATA#2 DDPC_0N BE40
LDDC_CLK_PCH AT53 BD40
LCTRL_CLK LVDSB_DATA#3 DDPC_0P
BF41
LDDC_DATA_PCH DDPC_1N
AY51 LVDSB_DATA0 DDPC_1P BH41
AT48 BD38
LVDSB_DATA1 DDPC_2N
AU50 BC38
LVDSB_DATA2 DDPC_2P
AT51 BB36
LVDSB_DATA3 DDPC_3N
DDPC_3P BA36
Close to ball <600mil
55 PCH_CRT_BLUE AA52 U50
CRT_BLUE DDPD_CTRLCLK
55 PCH_CRT_GREEN AB53 U52
CRT_GREEN DDPD_CTRLDATA
55 PCH_CRT_RED AD53 CRT_RED
Need Level Shift BC46
B DDPD_AUXN B
V51 BD46
5
6
7
8
55 PCH_CRT_DDCCLK CRT_DDC_CLK DDPD_AUXP

V53 AT38
RN2005 55 PCH_CRT_DDCDATA CRT_DDC_DATA DDPD_HPD
SRN150F-1-GP BJ40
DDPD_0N
55 PCH_CRT_HSYNC Y53 BG40
CRT_HSYNC DDPD_0P
CRT SMBUS 55 PCH_CRT_VSYNC Y51 CRT_VSYNC DDPD_1N BJ38
BG38
4
3
2
1
DDPD_1P
Close PCH 1
2.5V Tolerance
2 CRT_IREF AD48
CRT DDPD_2N BF37
BH37
R2001 1KR2J-1-GP DAC_IREF DDPD_2P
AB51 BE36
CRT_IRTN DDPD_3N
DDPD_3P BD36
+3.3V_RUN
IBEXPEAK-M-GP-NF
1
2
RN2003
SRN2K2J-1-GP
4
3
PCH_CRT_DDCCLK
PCH_CRT_DDCDATA
A <Core Design> A
Wistron Corporation
Title
PCH (LVDS/CRT/DDI)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
RN2101
PCI_DEVSEL#
PCI_IRDY#
1
2
10
9 PCI_REQ2#
+3.3V_RUN SSID = PCH H40
U2001E
AD0
5 OF 10
NV_CE#0 AY9
PCI_SERR# 3 8 INT_PIRQD# N34 BD1
INT_PIRQC# PCI_STOP# AD1 NV_CE#1
4 7 C44 AD2 NV_CE#2 AP15
+3.3V_RUN 5 6 INT_PIRQA# A38 BD8
AD3 NV_CE#3
C36 AD4
SRN8K2J-2-GP-U J34 AV9
AD5 NV_DQS0
A40 AD6 NV_DQS1 BG8
D45
AD7
E36 AD8 NV_DQ0/NV_IO0 AP7
RN2102 H48 AP6
PCI_PERR# AD9 NV_DQ1/NV_IO1
1 10 +3.3V_RUN E40 AD10 NV_DQ2/NV_IO2 AT6
D PCI_REQ0# 2 9 INT_PIRQB# C40 AT9 D
PCI_REQ3# PCI_PLOCK# AD11 NV_DQ3/NV_IO3
3 8 M48 AD12 NV_DQ4/NV_IO4 BB1
PCI_FRAME# 4 7 PCI_REQ1# M45 AV6
PCI_TRDY# AD13 NV_DQ5/NV_IO5
+3.3V_RUN 5 6 F53 AD14 NV_DQ6/NV_IO6 BB3
M40 AD15 NV_DQ7/NV_IO7 BA4
SRN8K2J-2-GP-U
NVRAM
M43 AD16 NV_DQ8/NV_IO8 BE4
J36 AD17 NV_DQ9/NV_IO9 BB6
+3.3V_RUN K48 BD6
+3.3V_RUN AD18 NV_DQ10/NV_IO10
F40 AD19 NV_DQ11/NV_IO11 BB7
RN2103 C42 BC8 Danbury Technology:
INT_PIRQF# AD20 NV_DQ12/NV_IO12
1 8 K46 AD21 NV_DQ13/NV_IO13 BJ8 Disabled when Low.
2 7 INT_PIRQH# U2101 M51 BJ6 Enable when High.
INT_PIRQG# AD22 NV_DQ14/NV_IO14
3 6 1 J52 BG6 TP2100
INT_PIRQE# B AD23 NV_DQ15/NV_IO15
4 5 5 K51 TP2101
VCC PCI_PLTRST# AD24 NV_ALE
2 L34 BD3 1
SRN10KJ-7GP 9,37,70,76 PLT_RST# 4
DY A
F42
AD25 NV_ALE
AY6 NV_CLE 1
Y AD26 NV_CLE
GND 3 J40 AD27 TP2102
G46
74LVC1G08GW -1-GP AD28 NV_RCOMP
F44 AD29 NV_RCOMP AU2 1
M47
AD30
PCI
1 2 H36 AD31 NV_RB# AV7
R2104 0R0402-PAD
1
J50 C/BE0# NV_WR#0_RE# AY8
C2101
DY SC220P50V2KX-3GP
G42
H47
C/BE1# NV_WR#1_RE#
AY5
2
C/BE2#
G34
C/BE3# NV_WE#_CK0
AV11 USB
BF5
INT_PIRQA# NV_WE#_CK1
G38
PIRQA# Pair Device
INT_PIRQB# H51
C INT_PIRQC# PIRQB# C
B37
PIRQC# USBP0N
H18 USB_PN0 76 0 USB0 (I/O Board)
INT_PIRQD# A44 J18 USB_PP0 76
PIRQD# USBP0P
USBP1N A18 1 X
PCI_REQ0# F51 C18
PCI_REQ1# REQ0# USBP1P
A46 REQ1#/GPIO50 USBP2N N20 USB_PN2 63 2 USB2
PCI_REQ2# B45 P20 USB_PP2 63
PCI_REQ3# REQ2#/GPIO52 USBP2P
M53 REQ3#/GPIO54 USBP3N J20 USB_PN3 63 3 USB3
BOOT BIOS Strap USBP3P L20 USB_PP3 63
TPAD14-GP TP2116 1 PCI_GNT0# F48 F20 4 X
PCI_GNT#1 PCI_GNT#0 BOOT BIOS Location TPAD14-GP TP2117 PCI_GNT1# GNT0# USBP4N
1 K45 GNT1#/GPIO51 USBP4P G20
TPAD14-GP TP2103 1 PCI_GNT2# F36 A20 USB_PN5 76 5 WLAN (I/O Board)
PCI_GNT3# GNT2#/GPIO53 USBP5N
0 0 LPC H53
GNT3#/GPIO55 USBP5P
C20 USB_PP5 76
USBP6N M22 6 X
0 1 Reserved INT_PIRQE# B41 N22
INT_PIRQF# PIRQE#/GPIO2 USBP6P
K53 PIRQF#/GPIO3 USBP7N B21 7 X
1 0 PCI INT_PIRQG# A36 D21
INT_PIRQH# PIRQG#/GPIO4 USBP7P
A48
PIRQH#/GPIO5 USBP8N
H22 8 X
1 1 SPI(Default) USBP8P J22
USB
TPAD14-GP TP2108 1 PCIRST# K6 E22 USB_PN9 73 9 BLUETOOTH
PCIRST# USBP9N
F22 USB_PP9 73
PCI_SERR# USBP9P
E44
SERR# USBP10N
A22 USB_PN10 32 10 CARD READER
PCI_PERR# E50 C22 USB_PP10 32
PERR# USBP10P
USBP11N G24 USB_PN11 54 11 CAMERA
USBP11P H24 USB_PP11 54
PCI_IRDY# A42 L24 12 X
IRDY# USBP12N
H44 M24
PCI_DEVSEL# PAR USBP12P
F46 DEVSEL# USBP13N A24 13 X
PCI_FRAME# C46 C24
FRAME# USBP13P
B PCI_PLOCK# B
D49
PLOCK# USB_RBIAS_PN
B25 1 2
PCI_STOP# USBRBIAS# R2106
D41
PCI_TRDY# STOP# 22D6R2F-L1-GP
C48 D25
TRDY# USBRBIAS
TPAD14-GP TP2115 1 PCH_PME# M7 PME# USB_OC#0_1
OC0#/GPIO59 N16 USB_OC#0_1 63
PCI_PLTRST# D5 J16 USB_OC#2_3 USB_OC#2_3 63
PLTRST# OC1#/GPIO40 USB_OC#4_5
OC2#/GPIO41 F16
R2110 2 122R2J-2-GP PCLK_FW H_R N52 L16 USB_OC#6_7
70
23
PCLK_FW H
CLK_PCI_FB
DY 2 1 CLK_PCI_FB_R P53
CLKOUT_PCI0 OC3#/GPIO42
E14 USB_OC#8_9
37 PCLK_KBC R2108 22R2J-2-GP 2 1 PCLK_KBC_R P46 CLKOUT_PCI2 OC5#/GPIO9 G16 USB_OC#10_11
R2111 22R2J-2-GP P51 F12 USB_OC#12_13
CLKOUT_PCI3 OC6#/GPIO10 SMC_W AKE_SCI#_R
P48 T15
IBEXPEAK-M-GP-NF
A16 swap override Strap/Top-Block

Swap Override jumper
PCI_GNT#3 Low = A16 swap

override/Top-Block
Swap Override enabled
High = Default
A RN2104 <Core Design> A

USB_OC#10_11 1 10 +3.3V_ALW
USB_OC#12_13 2 9 USB_OC#4_5
USB_OC#8_9 3 8 USB_OC#6_7
R2109 USB_OC#0_1 4 7 USB_OC#2_3 Wistron Corporation
PCI_GNT3# SMC_W AKE_SCI#_R 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1 DY 2 +3.3V_ALW 5 6
4K7R2J-2-GP SRN10KJ-L3-GP
Title
PCH (PCI/USB/NVRAM)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = PCH
U2001C 3 OF 10
FDI_RXN0 BA18 FDI_TXN0 8
BC24 BH17 +3.3V_ALW
8 DMI_CTX_PRXN0 DMI0RXN FDI_RXN1 FDI_TXN1 8
8 DMI_CTX_PRXN1 BJ22 BD16 FDI_TXN2 8
DMI1RXN FDI_RXN2
8 DMI_CTX_PRXN2 AW20 BJ16 FDI_TXN3 8 RN2201
DMI2RXN FDI_RXN3 PM_RI#
8 DMI_CTX_PRXN3 BJ20 BA16 FDI_TXN4 8 1 8
DMI3RXN FDI_RXN4 SUS_PW R_ACK
FDI_RXN5 BE14 FDI_TXN5 8 2 7
8 DMI_CTX_PRXP0 BD24 BA14 FDI_TXN6 8 PM_BATLOW #_R 3 6
DMI0RXP FDI_RXN6 AC_PRESENT_EC
8 DMI_CTX_PRXP1 BG22 DMI1RXP FDI_RXN7 BC12 FDI_TXN7 8 4 5
D 8 DMI_CTX_PRXP2 BA20 DMI2RXP D
8 DMI_CTX_PRXP3 BG20 BB18 FDI_TXP0 8 SRN10KJ-6-GP
DMI3RXP FDI_RXP0
FDI_RXP1 BF17 FDI_TXP1 8
8 DMI_PTX_CRXN0 BE22 DMI0TXN FDI_RXP2 BC16 FDI_TXP2 8
8 DMI_PTX_CRXN1 BF21 DMI1TXN FDI_RXP3 BG16 FDI_TXP3 8
8 DMI_PTX_CRXN2 BD20 AW16 FDI_TXP4 8 PCIE_W AKE# R2202 1 2 1KR2J-1-GP
DMI2TXN FDI_RXP4
8 DMI_PTX_CRXN3 BE18 DMI3TXN FDI_RXP5 BD14 FDI_TXP5 8
FDI_RXP6 BB14 FDI_TXP6 8
8 DMI_PTX_CRXP0 BD22 DMI0TXP FDI_RXP7 BD12 FDI_TXP7 8
8 DMI_PTX_CRXP1 BH21
DMI1TXP
8 DMI_PTX_CRXP2 BC20 DMI2TXP
8 DMI_PTX_CRXP3 BD18 DMI3TXP FDI_INT BJ14 FDI_INT 8
R2203
DMI
FDI
BF13 FDI_FSYNC0 8 PCH_RSMRST# 1 2
+1.05V_VTT FDI_FSYNC0
BH25
R2204 DMI_ZCOMP 10KR2J-3-GP
BH13 FDI_FSYNC1 8
DMI_IRCOMP_R FDI_FSYNC1
1 2 BF25 DMI_IRCOMP
BJ12 FDI_LSYNC0 8
49D9R2F-GP FDI_LSYNC0
+3.3V_RUN BG14
FDI_LSYNC1 FDI_LSYNC1 8
1
R2205
10KR2J-3-GP
9 XDP_DBRESET# 2 T6 J12 PCIE_W AKE# 76

SYS_RESET# WAKE#
C C
M6 Y1 PM_CLKRUN#
SYS_PWROK CLKRUN#/GPIO32 PM_CLKRUN# 37
System Power Management

37 PM_PW ROK R2207 1 2 0R0402-PAD PM_PW RGD B17 PWROK
R2208 1 2 10KR2J-3-GP
K5 P8 PM_SUS_STAT# 1
MEPWROK SUS_STAT#/GPIO61 TP2201TPAD14-GP
R2209 1 2 10KR2J-3-GP LAN_RST#1 A10 F3 PCH_SUSCLK R2219 1 2 0R2J-2-GP PCH_SUSCLK_2102 39

LAN_RST# SUSCLK/GPIO62
R2220 1 2 10R2J-2-GP PCH_SUSCLK_KBC 37
9 PM_DRAM_PW RGD PM_DRAM_PW RGD D9 E4 PCH_SLP_S5# 1
DRAMPWROK SLP_S5#/GPIO63 TP2202
TPAD14-GP
37 PCH_RSMRST# R2210 1 2 0R0402-PAD
PM_RSMRST#_R C16 H7 PM_SLP_S4#_R R2211 1 2 0R0402-PAD PM_SLP_S4# 37,50
RSMRST# SLP_S4#
37 SUS_PW R_DN_ACK R2218 1 2 0R0402-PAD

SUS_PW R_ACK M1 P12 PM_SLP_S3#_R R2212 1 2 0R0402-PAD PM_SLP_S3# 37,42,50,51
SUS_PWR_DN_ACK/GPIO30 SLP_S3#
9 PM_PW RBTN#_R
37 PM_PW RBTN# 1 2 PM_PW RBTN#_R P5 K8 SIO_SLP_M#_R 1

R2213 0R0402-PAD PWRBTN# SLP_M# TP2203TPAD14-GP
37 AC_PRESENT_EC R2216 1 AC_PRESENT

2 0R0402-PAD P7 N2 PM_SLP_DSW # 1
ACPRESENT/GPIO31 TP23 TP2204TPAD14-GP
PM_BATLOW #_R A6 BJ10 H_PM_SYNC

B BATLOW#/GPIO72 PMSYNCH H_PM_SYNC 9 B
PM_RI# F14 F6 PM_SLP_LAN# 1

RI# SLP_LAN#/GPIO29 TP2205TPAD14-GP
IBEXPEAK-M-GP-NF
+3.3V_RUN
PM_CLKRUN# 1 2
1
Option to " Disable " clkrun. R2215 R2214

A
10KR2J-3-GP
DY 10KR2J-3-GP
<Core Design> A
Pulling it down will keep the clks running.
Wistron Corporation
2

Title
PCH (DM I/FDI/PM)

5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = PCH
+3.3V_ALW +3.3V_ALW
R2301
U2001B 2 OF 10 10KR2J-3-GP
1
2
3
4
1
2
BG30 B9 PCH_GPIO11 2 1 +3.3V_ALW RN2301 RN2302
PERN1 SMBALERT#/GPIO11
BJ30 SRN2K2J-2-GP SRN2K2J-1-GP
PERP1 PCH_SMB_CLK
BF29 PETN1 SMBCLK H14
BH29 PETP1
C8 PCH_SMB_DATA
8
7
6
5
4
3
SMBDATA
D 76 PCIE_RXN2 AW30 PERN2 R2302 D
76 PCIE_RXP2 BA30 PERP2
C2305 SCD1U10V2KX-5GP 1 2 PCIE_C_TXN2 BC30 J14 TPM_ID1 2 1 SML0_CLK KBC_SCL1 PCH_SMB_CLK
76 PCIE_TXN2 C2306 SCD1U10V2KX-5GP 1 2 PCIE_C_TXP2 BD30
PETN2 WLAN SML0ALERT#/GPIO60 +3.3V_ALW
76 PCIE_TXP2 PETP2 SML0_CLK 10KR2J-3-GP SML0_DATA KBC_SDA1 PCH_SMB_DATA
SML0CLK C6 SML0_CLK 9
AU30
SMBus
76 PCIE_RXN3 PERN3
AT30 G8 SML0_DATA
76 PCIE_RXP3 PERP3 SML0DATA SML0_DATA 9
C2303 SCD1U10V2KX-5GP 1 2 PCIE_C_TXN3 AU32
76 PCIE_TXN3 C2304 SCD1U10V2KX-5GP 1 2 PCIE_C_TXP3 AV32
PETN3 LAN R2303
76 PCIE_TXP3 PETP3 LPD_SPI_INTR#
M14 2 1 +3.3V_ALW
SML1ALERT#/GPIO74
BA32 PERN4
BB32 E10 KBC_SCL1 10KR2J-3-GP
PERP4 SML1CLK/GPIO58 KBC_SCL1 37
BD32
PETN4 KBC_SDA1 +3.3V_RUN
BE32 G12 KBC_SDA1 37
PETP4 SML1DATA/GPIO75
PCI-E*
BF33
PERN5 CL_CLK RN2303
BH33 PERP5 CL_CLK1 T13 1
Controller
BG32 TP2301TPAD14-GP 2 3
PETN5 CL_DATA 1
BJ32 PETP5 CL_DATA1 T11 1 4
TP2302TPAD14-GP
Link
BA34 T9 CL_RST# 1 SRN2K2J-1-GP
PERN6 CL_RST1# TP2303TPAD14-GP
AW34
PERP6
BC34 PETN6
BD34 R2304
PETP6 PEG_CLKREQ#
PEG_A_CLKRQ#/GPIO47 H1 2 1 +3.3V_ALW Q2301
AT34
PERN7 10KR2J-3-GP PCH_SMB_DATA
AU34 6 1 PCH_SMBDATA 7,18,19,76
PERP7
AU36 AD43
PETN7 CLKOUT_PEG_A_N
AV36 AD45 5 2
C PETP7 CLKOUT_PEG_A_P C
BG34 AN4 CLK_EXP_N CLK_EXP_N 9 4 3
PERN8 CLKOUT_DMI_N
PEG
BJ34 AN2 CLK_EXP_P CLK_EXP_P 9
PERP8 CLKOUT_DMI_P DMN66D0LDW -7-GP
PCIECLKRQ{0,3,4,5,6,7}# should have a 10K pull-up to +3.3V_ALW. BG36
PETN8
PCIECLKRQ{1,2} should have a 10K pull-up to +3.3_RUN BJ36 PETP8
CLKOUT_DP_N/CLKOUT_BCLK1_N AT1 PCH_SMBCLK 7,18,19,76
CLKOUT_DP_P/CLKOUT_BCLK1_P AT3
AK48 PCH_SMB_CLK
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P
From CLK BUFFER

AW24 CLKIN_DMI# CLKIN_DMI# 7
PCIE_CLK_RQ0# CLKIN_DMI_N CLKIN_DMI
P9 PCIECLKRQ0#/GPIO73 CLKIN_DMI_P BA24 CLKIN_DMI 7
AM43 AP3 CLK_CPU_BCLK# CLK_CPU_BCLK# 7

CLKOUT_PCIE1N CLKIN_BCLK_N CLK_CPU_BCLK
AM45 CLKOUT_PCIE1P CLKIN_BCLK_P AP1 CLK_CPU_BCLK 7
PCIE_CLK_RQ1# U4
PCIECLKRQ1#/GPIO18
RN
F18 DREFCLK# DREFCLK# 7

CLKIN_DOT_96N DREFCLK
E18 DREFCLK 7
RN2309 CLK_PCIE_MINI1R# CLKIN_DOT_96P
76 CLK_PCIE_MINI1# 1 4 AM47
0R4P2R-PAD CLK_PCIE_MINI1R CLKOUT_PCIE2N
76 CLK_PCIE_MINI1 2 3 AM48
CLKOUT_PCIE2P CLK_PCIE_SATA#
CLKIN_SATA_N/CKSSCD_N AH13 CLK_PCIE_SATA# 7
76 MINI1_CLK_REQ# MINI1_CLK_REQ# N4 AH12 CLK_PCIE_SATA CLK_PCIE_SATA 7
PCIECLKRQ2#/GPIO20 CLKIN_SATA_P/CKSSCD_P
RN
RN2304 1 4 CLK_PCIE_LAN1# AH42 P41 CLK_PCH_14M

76 CLK_PCIE_LAN# CLKOUT_PCIE3N REFCLK14IN CLK_PCH_14M 7
76 CLK_PCIE_LAN 0R4P2R-PAD 2 3 CLK_PCIE_LAN1 AH41 CLKOUT_PCIE3P
2 1 PCIE_CLK_RQ3# A8 J42 CLK_PCI_FB CLK_PCI_FB 21
B R2305 10KR2J-3-GP PCIECLKRQ3#/GPIO25 CLKIN_PCILOOPBACK B
AM51 AH51 XTAL25_IN 1 2

CLKOUT_PCIE4N XTAL25_IN XTAL25_OUT R2309 0R2J-2-GP
AM53 AH53 1
CLKOUT_PCIE4P XTAL25_OUT TP2305TPAD14-GP
PCIE_CLKRQ4# M9 AF38 XCLK_RCOMP R2306 1 2 90D9R2F-1-GP +1.05V_VTT
PCIECLKRQ4#/GPIO26 XCLK_RCOMP
AJ50 T45 CLK_PCH_GPIO64 1 TP2304TPAD14-GP

CLKOUT_PCIE5N CLKOUTFLEX0/GPIO64
AJ52
CLKOUT_PCIE5P
PCIE_CLK_RQ5# H6 P43
Clock Flex
PCIECLKRQ5#/GPIO44 CLKOUTFLEX1/GPIO65
AK53 T42
CLKOUT_PEG_B_N CLKOUTFLEX2/GPIO66
AK51
CLKOUT_PEG_B_P
PEG_B_CLKRQ# P13 N50 CLK48_GPIO R2307 2 1 33R2J-2-GP CLK_48M_CARD 32
PEG_B_CLKRQ#/GPIO56 CLKOUTFLEX3/GPIO67
IBEXPEAK-M-GP-NF
+3.3V_ALW
A
+3.3V_RUN <Core Design> A
RN2307
8 1 PCIE_CLK_RQ0#
7 2 PEG_B_CLKRQ# 1 4 PCIE_CLK_RQ1#
6 3 PCIE_CLKRQ4# 2 3 MINI1_CLK_REQ# Wistron Corporation
5 4 PCIE_CLK_RQ5# 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SRN10KJ-7GP RN2308
SRN10KJ-5-GP Title
PCH (PCI-E/SMBUS/CLOCK/CL)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
R2401
PCH_RTCX1 +RTC_CELL
SSID = PCH
1 2 PCH_RTCX2 RN2401
1 4
10MR2J-L-GP 2 3 INTVRMEN- Integrated SUS
2
1.1V VRM Enable
1
X2401 SRN20KJ-GP-U G2401
C2404 GAP-OPEN
High - Enable internal VRs
1 4 SC1U10V3KX-3GP
1
SC15P50V2JN-2-GP
1
1
LPC_LAD[0..3]
C2402
D U2001A 1 OF 10
LPC_LAD[0..3] 37,70 D
2 3 C2403
SC15P50V2JN-2-GP PCH_RTCX1 B13 D33 LPC_LAD0
2
2
PCH_RTCX2 RTCX1 FWH0/LAD0 LPC_LAD1
D13 RTCX2 FWH1/LAD1 B33
C32 LPC_LAD2
FWH2/LAD2 LPC_LAD3
FWH3/LAD3 A32
X-32D768KHZ-40GPU PCH_RTCRST# C14 RTCRST#
82.30001.841 SRTCRST# FWH4/LFRAME# C34 LPC_LFRAME# 37,70
SC1U10V3KX-3GP
D17 SRTCRST#
A34
RTC
LPC
LDRQ0#
1
1 2 SM_INTRUDER# A16 F34
C2401 R2406 1MR2J-1-GP INTRUDER# LDRQ1#/GPIO23
+RTC_CELL 1 2 PCH_INTVRMEN A14 AB9 INT_SERIRQ 37
2
R2404 330KR2F-L-GP INTVRMEN SERIRQ
RN2402
1 8 ACZ_BIT_CLK A30
30 PCH_AZ_CODEC_RST# HDA_BCLK
30 PCH_AZ_CODEC_BITCLK 2 7 AK7 SATA_RXN0_C 59
ACZ_SYNC_R SATA0RXN
3 6 D29 AK6
30 PCH_AZ_CODEC_SYNC
30 PCH_SDOUT_CODEC
4 5
HDA_SYNC SATA0RXP
SATA0TXN
AK11 SATA_TXN0_C C2405 1 2 SCD01U16V2KX-3GP
SATA_RXP0_C 59
SATA_TXN0 59
HDD
ACZ_SPKR P1 AK9 SATA_TXP0_C C2406 1 2 SCD01U16V2KX-3GP SATA_TXP0 59
30 ACZ_SPKR SPKR SATA0TXP
SRN33J-7-GP
ACZ_RST#_R C30 HDA_RST#
AH6 SATA_RXN1_C 59
SATA1RXN
AH5
30 PCH_SDIN_CODEC G30
HDA_SDIN0
SATA1RXP
SATA1TXN
AH9 SATA_TXN1_C C2407 1 2 SCD01U16V2KX-3GP
SATA_RXP1_C 59
SATA_TXN1 59
ODD
AH8 SATA_TXP1_C C2408 1 2 SCD01U16V2KX-3GP SATA_TXP1 59
SATA1TXP
F30
HDA_SDIN1
AF11
C SATA2RXN C
E32 AF9
IHDA
HDA_SDIN2 SATA2RXP
AF7
SATA2TXN
F32 HDA_SDIN3 SATA2TXP AF6
SATA3RXN AH3
ACZ_SDATAOUT_R B29 AH1
HDA_SDO SATA3RXP
SATA3TXN AF3
SATA3TXP AF1
H32
SATA
37 ME_UNLOCK# HDA_DOCK_EN#/GPIO33
SATA4RXN AD9
J30 HDA_DOCK_RST#/GPIO13 SATA4RXP AD8
AD6
SATA4TXN
+3.3V_RUN NO REBOOT STRAP SATA4TXP AD5
No Reboot Strap R23 TPAD14-GP TP2404 1 PCH_JTAG_TCK M3 AD3

JTAG_TCK SATA5RXN
AD1
SATA5RXP
2 ACZ_SPKR Low = Default TPAD14-GP TP2405 PCH_JTAG_TMS
1
R2410 DY 1KR2J-1-GP HDA_SPKR High = No Reboot
1 K3
JTAG_TMS SATA5TXN
AB3
AB1
TPAD14-GP TP2406 PCH_JTAG_TDI SATA5TXP
1 K1
JTAG_TDI +1.05V_VTT
JTAG
TPAD14-GP TP2407 1 PCH_JTAG_TDO J2 AF16
JTAG_TDO SATAICOMPO R2412
TPAD14-GP TP2408 1 PCH_JTAG_RST# J4 AF15 SATAICOMP 1 2
TRST# SATAICOMPI
37D4R2F-GP +3.3V_RUN
SRN15J-2-GP
62 PCH_SPI_CLK PCH_SPI_CLK 2 3 SPI_CLK_R BA2 SPI_CLK
2
2
62 PCH_SPI_CS0# PCH_SPI_CS0# 1 4
+3.3V_RUN SPI_CS#0_R AV3 R2416 R2417
B SPI_CS0# 10KR2J-3-GP 10KR2J-3-GP B
RN2403 AY3 T3 SATA_LED# 66
SPI_CS1# SATALED#
1
1
1 2 INT_SERIRQ 62 PCH_SPI_DO PCH_SPI_DO R2415 1 2 15R2J-GP SPI_MOSI_R AY1 Y9 SATA_DET#0_R
R2411 10KR2J-3-GP SPI_MOSI SATA0GP/GPIO21
SPI
62 PCH_SPI_DI PCH_SPI_DI AV1 V1 SATA_DET#1_R
SPI_MISO SATA1GP/GPIO19
IBEXPEAK-M-GP-NF
A <Core Design> A
Wistron Corporation
Title
PCH (SPI/RTC/LPC/SATA/IHDA)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
+3.3V_RUN
1
SSID = PCH
R2503
10KR2J-3-GP
U2001F 6 OF 10
2
S_GPIO Y3 AH45
S_GPIO BMBUSY#/GPIO0 CLKOUT_PCIE6N
AH46
SIO_EXT_SCI# CLKOUT_PCIE6P
37 SIO_EXT_SCI# C38 TACH1/GPIO1
PCH_GPIO6 D37 TACH2/GPIO6
D
CLKOUT_PCIE7N AF48 D
MISC
SIO_EXT_W AKE# J32 AF47
37 SIO_EXT_W AKE# TACH3/GPIO7 CLKOUT_PCIE7P
SIO_EXT_SMI# F10
37 SIO_EXT_SMI#
1
GPIO8
C2501 PCH_GPIO12
SC47P50V2JN-3GP DY K9 LAN_PHY_PWR_CTRL/GPIO12 A20GATE U2 SIO_A20GATE 37
2
HOST_ALTERT#1 T7
+3.3V_RUN GPIO15
DGPU_HOLD_RST# AA2 AM3 BCLK_CPU_N 9
SATA4GP/GPIO16 CLKOUT_BCLK0_N/CLKOUT_PCIE8N
PCH_GPIO17 F38 AM1 BCLK_CPU_P 9
TACH0/GPIO17 CLKOUT_BCLK0_P/CLKOUT_PCIE8P
PCH_GPIO22 Y7 BG10
SCLOCK/GPIO22 PECI H_PECI 9
GPIO
1
PCH_GPIO24 H10 T1 SIO_RCIN# 37
C2502 GPIO24 RCIN# +1.05V_VTT
SC47P50V2JN-3GP DY TPAD14-GP TP2507 1 PCH_GPIO27 AB12 BE10 H_PW RGD 9,42
2
GPIO27 PROCPWRGD
CPU
R2510 PCH_GPIO28 V13 BD10
GPIO28 THRMTRIP# RN2505
1 2 PCH_GPIO22
10KR2J-3-GP STP_PCI# M11 3 2
STP_PCI#/GPIO34 PCH_THERMTRIP_R 4 1 H_THERMTRIP# 9,37,42
CLK_SATA_OE# V6
SATACLKREQ#/GPIO35
2
RN2506 PCH_GPIO36 SRN56J-4-GP

AB7
SATA2GP/GPIO36 TP1
BA22 Placed Within 2" from PCH
1 4 SIO_EXT_SCI#
2 3 PCH_GPIO17 R2508 PCH_GPIO37 AB13 AW22
10KR2J-3-GP SATA3GP/GPIO37 TP2
C SRN10KJ-5-GP PCH_GPIO38 V3 BB22 C
1
SLOAD/GPIO38 TP3
PCH_GPIO39 P3 AY45
SDATAOUT0/GPIO39 TP4
PCH_GPIO45 H3 AY46
+3.3V_ALW PCIECLKRQ6#/GPIO45 TP5
DDR_RST_GATE F1 AV43
9 DDR_RST_GATE PCIECLKRQ7#/GPIO46 TP6
1
PCH_GPIO48 AB6 AV45

R2525 SDATAOUT1/GPIO48 TP7
10KR2J-3-GP 1 2 PCH_TEMP_ALERT#_C AA4 AF13
37 PCH_TEMP_ALERT# R2518 0R0402-PAD SATA5GP/GPIO49 TP8
PCH_GPIO57 F8 M18
2
GPIO57 TP9
PCH_GPIO28 N18
+3.3V_ALW TP10
A4 AJ24
VSS_NCTF_1 TP11
A49
NCTF
VSS_NCTF_2
RSVD
TPAD14-GP TP2510 1 PCH_NCTF_1 A5 AK41
VSS_NCTF_3 TP12
A50
VSS_NCTF_4
A52 AK42
PCH_GPIO57 VSS_NCTF_5 TP13
1 2 A53 VSS_NCTF_6
R2524 10KR2J-3-GP B2 M32
VSS_NCTF_7 TP14
B4 VSS_NCTF_8
HOST_ALTERT#1 1 2 B52 N32
R2513 1KR2J-1-GP VSS_NCTF_9 TP15
B53
VSS_NCTF_10
BE1 VSS_NCTF_11 TP16 M30
PCH_GPIO45 1 4 BE53
DDR_RST_GATE VSS_NCTF_12
2 3 BF1 VSS_NCTF_13 TP17 N30
B RN2509 B
BF53
SRN10KJ-5-GP VSS_NCTF_14
BH1 H12
VSS_NCTF_15 TP18
BH2
VSS_NCTF_16
BH52 AA23
PCH_GPIO24 VSS_NCTF_17 TP19
2 1 BH53
R2514 DY 100KR2J-1-GP BJ1
VSS_NCTF_18
AB45
VSS_NCTF_19 NC_1
BJ2 VSS_NCTF_20
PCH_GPIO12 1 4 BJ4 AB38
SIO_EXT_SMI# VSS_NCTF_21 NC_2
2 3 BJ49 VSS_NCTF_22
RN2501 TPAD14-GP TP2511 1 PCH_NCTF_2 BJ5 AB42
SRN10KJ-5-GP VSS_NCTF_23 NC_3
BJ50 VSS_NCTF_24
TPAD14-GP TP2512 1 PCH_NCTF_3 BJ52 AB41
VSS_NCTF_25 NC_4
BJ53 VSS_NCTF_26
D1 T39
VSS_NCTF_27 NC_5
D2
VSS_NCTF_28
D53
+3.3V_RUN VSS_NCTF_29 INIT3_3V# TP2506TPAD14-GP
E1 VSS_NCTF_30 INIT3_3V# P6 1
TPAD14-GP TP2509 1 PCH_NCTF_4 E53
RN2503 VSS_NCTF_31
C10
SIO_EXT_W AKE# TP24
4 1
PCH_GPIO6 3 2 IBEXPEAK-M-GP-NF
SRN10KJ-5-GP
RN2507
DGPU_HOLD_RST# 4 1
PCH_TEMP_ALERT#_C 3 2
SRN10KJ-5-GP
A <Core Design> A
PCH_GPIO37 1 2 +3.3V_RUN
PCH_GPIO48 R2519 1 210KR2J-3-GP
R2515 10KR2J-3-GP Wistron Corporation
RN2502 Taipei Hsien 221, Taiwan, R.O.C.
PCH_GPIO38 4 1 RN2504
PCH_GPIO36 3 2 STP_PCI# 4 1 Title
SRN10KJ-5-GP PCH_GPIO39
SRN100KJ-6-GP
3 2
PCH (GPIO/CPU)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = PCH
+3.3V_RUN
+1.05V_VTT
U2001G POWER 7 OF 10
1.524A AB24 AE50 +VCCA_DAC_1_2 1 2
1
VCCCORE VCCADAC C2603 C2605 C2606 L2602 HCB1608KF-181-GP
AB26 VCCCORE
SCD01U16V2KX-3GP
SCD1U10V2KX-5GP
SC10U6D3V5MX-3GP
C2601 C2602 AB28 AE52
SC10U6D3V5KX-1GP SC1U6D3V2KX-GP VCCCORE VCCADAC +3.3V_CRT_LDO
DY AD26
2
VCCCORE
CRT
D AD28 AF53 D
2
VCCCORE VSSA_DAC
AF26 VCCCORE
VCC CORE
AF28 AF51 1 2
AF30
VCCCORE VSSA_DAC L2603 DY
HCB1608KF-181-GP
VCCCORE
AF31 VCCCORE
AH26 VCCCORE
AH28 +3VS_VCCA_LVD +3.3V_RUN
VCCCORE R2603
AH30 VCCCORE
AH31 VCCCORE VCCALVDS AH38 2 1
AJ30 C2616 0R0603-PAD-1-GP
VCCCORE
AJ31 VCCCORE VSSA_LVDS AH39 1
DY
2
+1.8V_RUN
R2611
SCD1U10V2KX-5GP
AP43 +1.8VS_VCCTX_LVDS 1 2
+1.05V_VTT VCCTX_LVDS
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
AP45
VCCTX_LVDS
1
AT46 C2618 C2619 0R0805-PAD-2-GP 2010/04/21
LVDS
VCCTX_LVDS C2617
AK24 VCCIO VCCTX_LVDS AT45
DY SC10U6D3V5MX-3GP X01
2
TPAD14-GP TP2601 1 +1.05VS_VCCAPLL_EXP BJ24
VCCAPLLEXP +3.3V_RUN
VCC3_3 AB34
AN20
AN22
VCCIO VCC3_3 AB35 357mA
HVCMOS
1
VCCIO C2607
AN23 VCCIO VCC3_3 AD35
AN24 SCD1U10V2KX-5GP
VCCIO
AN26
2
+1.05V_VTT VCCIO
AN28
VCCIO
BJ26
C 3.208A BJ28
AT26
VCCIO
VCCIO
C
VCCIO
1
1
C2608 C2609 C2610 C2611 C2612 AT28 VCCIO
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY DY AU26
VCCIO
SC1U10V3KX-3GP
SC1U10V3KX-3GP +1.8V_RUN
SC10U6D3V5KX-1GP
AU28
2
2
VCCIO
AV26
AV28
AW26
VCCIO
VCCIO VCCVRM AT24 35mA
VCCIO
AW28
VCCIO +1.05V_VTT
DMI
BA26 VCCIO VCCDMI AT16
BA28 +1.05VS_VCC_DMI
BB26
BB28
VCCIO
VCCIO VCCDMI
AU16
R2601
1 2 61mA
0R0402-PAD
+3.3V_RUN
1
VCCIO C2613
BC26
VCCIO
PCI E*
BC28 SC1U10V3KX-3GP
VCCIO
BD26
2
+3.3V_RUN VCCIO
BD28
VCCIO
BE26 VCCIO VCCPNAND AM16
BE28 AK16
BG26
VCCIO VCCPNAND
AK20 156mA
1
C2614 VCCIO VCCPNAND

BG28 AK19
VCCIO VCCPNAND
1
SCD1U10V2KX-5GP BH27 AK15 C2615
VCCIO VCCPNAND SCD1U10V2KX-5GP
AK13
2
VCCPNAND
AN30 AM12
2
VCCIO VCCPNAND
NAND / SPI
AN31 AM13
VCCIO VCCPNAND
AM15
VCCPNAND
357mA AN35 VCC3_3 +3.3V_RUN
B B
1
VCCAFDI_VRM AT22
VCCVRM[1] R2605
+1.05V_VTT TPAD14-GP TP2602 1 VCCAFDIPLL BJ18
VCCFDIPLL VCCME3_3
AM8
AM9
85mA 0R0402-PAD
VCCME3_3
FDI
AM23 AP11
2
VCCIO VCCME3_3 PCH_VCCME3_3
VCCME3_3 AP9
1
C2622
SCD1U10V2KX-5GP
IBEXPEAK-M-GP-NF
3.3V CRT LDO
2
+5V_RUN +3.3V_CRT_LDO
U2601
3 4
VIN VOUT
2
1
GND DY 5
EN NC#5
1
C2620
+1.8V_RUN C2621 DY RT9198-33PBG-GP DY SC1U6D3V2KX-GP
SC1U10V2KX-1GP
2
VCCAFDI_VRM 1 2 Second 74.09091.H3F
R2606 0R0402-PAD
A <Core Design> A
Wistron Corporation
Title
PCH (POWER1)
Date: W ednesday, April 21, 2010 Sheet 26 of 90
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = PCH
U2001J POWER 10 OF 10 +1.05V_VTT
TPAD14-GP TP2515 1VCCACLK AP51 VCCACLK VCCIO V24

V26
1
VCCIO C2706
AP53 Y24
VCCACLK VCCIO
VCCIO Y26 DY SC1U10V2KX-1GP
2
AF23 VCCLAN VCCSUS3_3 V28
U28 +3.3V_ALW
VCCSUS3_3
AF24 VCCLAN VCCSUS3_3 U26
D
VCCSUS3_3 U24 D
P28
1
DCPSUSBYP VCCSUS3_3 C2703
Y20 DCPSUSBYP VCCSUS3_3 P26
SCD1U10V2KX-5GP
N28 SCD1U10V2KX-5GP
1
VCCSUS3_3
C2707
N26
2
VCCSUS3_3
AD38 VCCME VCCSUS3_3 M28
M26
2
VCCSUS3_3
AD39 L28
USB
VCCME VCCSUS3_3
VCCSUS3_3 L26
AD41 J28
+1.05V_VTT VCCME VCCSUS3_3
VCCSUS3_3 J26
AF43 H28
1.998A AF41
VCCME VCCSUS3_3
VCCSUS3_3
H26
G28
1
VCCME VCCSUS3_3
SC1U6D3V2KX-GP
C2704 C2705 C2708 G26
SC10U6D3V5KX-1GP VCCSUS3_3
DY AF42
VCCME VCCSUS3_3
F28
F26
SC10U6D3V5MX-3GP
2
2
VCCSUS3_3 +3.3V_ALW +3.3V_ALW
V39 E28
VCCME VCCSUS3_3
E26
Clock and Miscellaneous

VCCSUS3_3
V41 C28
VCCME VCCSUS3_3
VCCSUS3_3 C26
2
V42 B27 C2709 +3.3V_RUN
VCCME VCCSUS3_3 SCD1U10V2KX-5GP D2701
VCCSUS3_3 A28
Y39 A26 CH751H-40PT-GP
2
1
VCCME VCCSUS3_3
SC1U6D3V2KX-GP
C2710
+1.05V_VTT Y41 U23 +1.05V_VTT
1
VCCME VCCSUS3_3
2
DY
2
1 2 +1.05VS_VCCA_A_DPL Y42 V23 +5V_ALW D2702
L2702 0R0805-PAD VCCME VCCIO
CH751H-40PT-GP
1
C F24 +5VALW _PCH_VCC5REFSUS 1 2 C

C2734 DY C2711 SCD1U10V2KX-5GP V5REF_SUS R2701 100R2F-L1-GP-U
1
1
SC10U6D3V5MX-3GP SC1U6D3V2KX-GP +VCCRTCEXT V9
2
DCPRTC C2712 +5V_RUN

1
+1.8V_RUN
C2713
SC1U10V2KX-1GP
2
K49 +5VS_PCH_VCC5REF 1 2
V5REF R2702 100R2F-L1-GP-U
AU24
PCI/GPIO/LPC
2
+1.05VS_VCCA_B_DPL VCCVRM
1 2
1
L2703 0R0805-PAD J38
VCC3_3
1
BB51 C2715
C2735 DY C2714 72mA +1.05VS_VCCA_A_DPL BB53
VCCADPLLA
L38 SC1U10V2KX-1GP
2
SC10U6D3V5MX-3GP VCCADPLLA VCC3_3 +3.3V_RUN
SC1U6D3V2KX-GP
2
M36
73mA +1.05VS_VCCA_B_DPL BD51
BD53
VCCADPLLB
VCC3_3
N36
1
VCCADPLLB VCC3_3 C2716
AH23 P36 SCD1U10V2KX-5GP
VCCIO VCC3_3
AJ35 C2717
2
VCCIO
AH35 U35
VCCIO VCC3_3 +3.3V_RUN
1 2
+1.05V_VTT AF34
VCCIO SCD1U10V2KX-5GP
VCC3_3 AD13
AH34
1
C2718 C2719 C2720 VCCIO

SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP AF32
VCCIO VCCSATAPLL TP2514 TPAD14-GP
AK3 1
2
VCCSATAPLL
V12 DCPSST VCCSATAPLL AK1
SCD1U10V2KX-5GP
+VCCSST
B +1.05V_VTT B
SCD1U10V2KX-5GP
1
C2723
+1.05VALW _INT_VCCSUS Y22

DCPSUS
AH22
VCCIO
1
C2724
2
1
+1.8V_RUN C2725
P18 AT20 SC1U6D3V2KX-GP
2
VCCSUS3_3 VCCVRM
2
U19
SATA
+3.3V_ALW VCCSUS3_3
SCD1U10V2KX-5GP
PCI/GPIO/LPC
AH19
163mA U20
VCCSUS3_3
VCCIO
AD20
1
VCCIO
C2726
U22 VCCSUS3_3
VCCIO AF22
+3.3V_RUN
2
SCD1U10V2KX-5GP
AD19
VCCIO
V15 AF20
VCC3_3 VCCIO
VCCIO AF19
1
C2727
V16 AH20
VCC3_3 VCCIO
Y16 AB19
2
VCC3_3 VCCIO
VCCIO AB20
+1.05V_VTT AB22
VCCIO +1.05V_VTT
AD22
1mA AT18
V_CPU_IO
VCCIO
SCD1U10V2KX-5GP SCD1U10V2KX-5GP
SCD1U10V2KX-5GP SCD1U10V2KX-5GP
AA34
CPU
VCCME
1
C2728 C2729 C2730 Y34

SC4D7U10V5KX-4GP VCCME
AU18 Y35
V_CPU_IO VCCME
AA35
2
VCCME
A <Core Design> A
+RTC_CELL 6mA
RTC
A12 L30 R2707 1 2 0R0402-PAD +3.3V_ALW

VCCRTC VCCSUSHDA
HDA
2mA Wistron Corporation

1
IBEXPEAK-M-GP-NF C2731 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

1
C2732 C2733 SC1U10V2KX-1GP Taipei Hsien 221, Taiwan, R.O.C.

2
Title
2
+3VS_+1.5VS_HDA_IO PCH (POWER2)

5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = PCH U2001I 9 OF 10

AY7 H49
VSS VSS
B11 VSS VSS H5
B15 VSS VSS J24
B19 VSS VSS K11
B23 K43
VSS VSS
B31 VSS VSS K47
B35 K7
VSS VSS
B39 VSS VSS L14
B43 VSS VSS L18
B47 VSS VSS L2
D B7 VSS VSS L22 D
U2001H 8 OF 10 BG12 L32
VSS VSS
AB16 VSS BB12 VSS VSS L36
BB16 VSS VSS L40
AA19 VSS VSS AK30 BB20 VSS VSS L52
AA20 VSS VSS AK31 BB24 VSS VSS M12
AM19 VSS VSS AK34 BB34 VSS VSS M20
AA24 VSS VSS AK35 BB38 VSS VSS N38
AA26 AK38 BB42 M34
VSS VSS VSS VSS
AA31 AK49 BC10 M46
VSS VSS VSS VSS
AA32 AK5 BC14 M49
VSS VSS VSS VSS
AB11 AK8 BC18 M5
VSS VSS VSS VSS
AB15 AL2 BC2 M8
VSS VSS VSS VSS
AB23 VSS VSS AL52 BC22 VSS VSS N24
AB30 AM11 BC32 P11
VSS VSS VSS VSS
AB31 VSS VSS BB44 BC36 VSS VSS AD15
AB32 AD24 BC40 P22
VSS VSS VSS VSS
AB39 VSS VSS AM20 BC44 VSS VSS P30
AB43 AM22 BC52 P32
VSS VSS VSS VSS
AB47 VSS VSS AM24 BH9 VSS VSS P34
AB5 AM26 BD48 P42
VSS VSS VSS VSS
AB8 VSS VSS AM28 BD49 VSS VSS P45
AC2 BA42 BD5 P47
VSS VSS VSS VSS
AC52 AM30 BE12 R2
VSS VSS VSS VSS
AD11 AM31 BE16 R52
VSS VSS VSS VSS
AD12 AM32 BE20 T12
C VSS VSS VSS VSS C
AD16 AM34 BE24 T41
VSS VSS VSS VSS
AD23 AM35 BE30 T46
VSS VSS VSS VSS
AD30 VSS VSS AM38 BE34 VSS VSS T49
AD31 AM39 BE38 T5
VSS VSS VSS VSS
AD32 VSS VSS AM42 BE42 VSS VSS T8
AD34 VSS VSS AU20 BE46 VSS VSS U30
AU22 VSS VSS AM46 BE48 VSS VSS U31
AD42 VSS VSS AV22 BE50 VSS VSS U32
AD46 AM49 BE6 U34
VSS VSS VSS VSS
AD49 VSS VSS AM7 BE8 VSS VSS P38
AD7 VSS VSS AA50 BF3 VSS VSS V11
AE2 BB10 BF49 P16
VSS VSS VSS VSS
AE4 VSS VSS AN32 BF51 VSS VSS V19
AF12 AN50 BG18 V20
VSS VSS VSS VSS
Y13 VSS VSS AN52 BG24 VSS VSS V22
AH49 AP12 BG4 V30
VSS VSS VSS VSS
AU4 AP42 BG50 V31
VSS VSS VSS VSS
AF35 VSS VSS AP46 BH11 VSS VSS V32
AP13 AP49 BH15 V34
VSS VSS VSS VSS
AN34 AP5 BH19 V35
VSS VSS VSS VSS
AF45 AP8 BH23 V38
VSS VSS VSS VSS
AF46 VSS VSS AR2 BH31 VSS VSS V43
AF49 VSS VSS AR52 BH35 VSS VSS V45
AF5 VSS VSS AT11 BH39 VSS VSS V46
AF8 BA12 BH43 V47
VSS VSS VSS VSS
AG2 AH48 BH47 V49
VSS VSS VSS VSS
AG52 VSS VSS AT32 BH7 VSS VSS V5
AH11 VSS VSS AT36 C12 VSS VSS V7
AH15 VSS VSS AT41 C50 VSS VSS V8
B B
AH16 AT47 D51 W2
VSS VSS VSS VSS
AH24 AT7 E12 W52
VSS VSS VSS VSS
AH32 AV12 E16 Y11
VSS VSS VSS VSS
AV18 AV16 E20 Y12
VSS VSS VSS VSS
AH43 AV20 E24 Y15
VSS VSS VSS VSS
AH47 VSS VSS AV24 E30 VSS VSS Y19
AH7 VSS VSS AV30 E34 VSS VSS Y23
AJ19 VSS VSS AV34 E38 VSS VSS Y28
AJ20 AV42 E46 Y31
VSS VSS VSS VSS
AJ28 AV8 F49 Y46
VSS VSS VSS VSS
AJ32 AW14 F5 P49
VSS VSS VSS VSS
AJ34 AW18 G10 Y5
VSS VSS VSS VSS
AT5 VSS VSS AW2 G14 VSS VSS Y6
AJ4 BF9 G18 Y8
VSS VSS VSS VSS
AK12 AW32 G2 P24
VSS VSS VSS VSS
AM41 VSS VSS AW36 G22 VSS VSS T43
AN19 VSS VSS AW40 G32 VSS VSS AD51
AK26 VSS VSS AW52 G36 VSS VSS AT8
AK22 AY11 G40 AD47
VSS VSS VSS VSS
AK23 AY43 G44 Y47
VSS VSS VSS VSS
AK28 VSS VSS AY47 G52 VSS VSS AT12
AF39 AM6
IBEXPEAK-M-GP-NF VSS VSS
H16 AT13
VSS VSS
H20 AM5
VSS VSS
A H30 AK45 <Core Design> A
VSS VSS
H34 VSS VSS AK39
H38 VSS VSS AV14
H42
VSS Wistron Corporation
IBEXPEAK-M-GP-NF Title
PCH (VSS)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
+AVDD
+5V_RUN
D +3.3V_RUN D
+3.3V_RUN Close to codec
1 R3002 2
SC1U10V3KX-3GP
SCD1U10V2KX-5GP
Close to codec +5V_RUN
AUD_DVDDCORE 0R0603-PAD-1-GP
+PVDD
C3006
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
C3003
1
C3002
C3005
SC10U6D3V5MX-3GP 1 R3003 2
C3001
C3004
SCD1U10V2KX-5GP
2
2
U3001
SC1U10V3KX-3GP
SC10U6D3V5MX-3GP
0R0603-PAD-1-GP
1
C3009
C3010
1 DVDD_CORE AVDD 27
C3008
38 1 R3004 2
AVDD AUD_AGND
9 84mA
2
DVDD 0R0603-PAD-1-GP
25mA 39
PVDD
3 DVDD_IO PVDD 45
13 AUD_SENSE_A
PCH_AZ_CODEC_BITCLK SENSE_A AUD_SENSE_B AUD_AGND
6 14
PCH_AZ_CODEC_BITCLK 24 PCH_AZ_CODEC_BITCLK HDA_BITCLK SENSE_B
R3001 1 2 33R2J-2-GP PCH_SDIN_CODEC_C0 8
24 PCH_SDIN_CODEC HDA_SDI AUD_EXT_MIC_L
28 AUD_EXT_MIC_L 60
PCH_SDOUT_CODEC HP0_PORT_A_L AUD_EXT_MIC_R
5 HDA_SDO HP0_PORT_A_R 29 AUD_EXT_MIC_R 60
24 PCH_SDOUT_CODEC
1
23 AUD_VREFOUT_B AUD_VREFOUT_B 60
C3007 PCH_AZ_CODEC_SYNC VREFOUT_A_OR_F
10
DY SC4D7P50V2CN-1GP 24 PCH_AZ_CODEC_SYNC HDA_SYNC
31 AUD_HP1_JACK_L R3005 1 2 60D4R2F-GP
2
PCH_AZ_CODEC_RST# HP1_PORT_B_L AUD_HP1_JACK_R R3006 AUD_HP1_JACK_L2 60

11 32 1 2 60D4R2F-GP
24 PCH_AZ_CODEC_RST# HDA_RST# HP1_PORT_B_R AUD_HP1_JACK_R2 60
19 AUD_INT_MIC_R_L C3011 1 2 SC1U10V3KX-3GP
PORT_C_L INT_MIC_L_R 60
20
PORT_C_R AUD_VREFOUT_C R3007
VREFOUT_C 24 1 2 2K2R2J-2-GP
2 DMIC_CLK/GPIO1
+3.3V_RUN 4 40 AUD_SPK_L+ R3009 From SB
DMIC0/GPIO2 SPKR_PORT_D_L+ AUD_SPK_L- AUD_SPK_L+ 60 C3012 120KR2F-L-GP
SPKR_PORT_D_L- 41 AUD_SPK_L- 60
46 2 1 SCD1U10V2KX-5GP SB_SPKR_R 1 2
DMIC1/GPIO0/SPDIF_OUT_1 ACZ_SPKR 24
C 43 AUD_SPK_R- C
SPKR_PORT_D_R-
1
AUD_SPK_R+ AUD_SPK_R- 60 KBC_BEEP_R 1

48 44 2 1 2 KBC_BEEP 37
R3008 SPDIF_OUT_0 SPKR_PORT_D_R+ AUD_SPK_R+ 60 SCD1U10V2KX-5GP R3010
10KR2J-3-GP AMP_MUTE# 47 15 C3013 499KR2F-1-GP From EC
37 AMP_MUTE# EAPD PORT_E_L
PORT_E_R 16
2
PUMP_CAPN 17
AMP_MUTE# PORT_F_L AUD_PC_BEEP
35 CAP- PORT_F_R 18
1
C3022 12
SC2D2U10V3KX-1GP 36
PC_BEEP AUD_PC_BEEP
2
CAP+
PUMP_CAPP
MONO_OUT 25 Trace width>15 mils
7
DVSS
33 22 AUD_CAP2
AVSS CAP2
30
AVSS AUD_VREFFLT
26 AVSS VREFFILT 21
42 34 AUD_V_B
PVSS V-
49 37 AUD_VREG
GND VREG
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC4D7U6D3V3KX-GP
SC1U6D3V2KX-GP
C3016
C3015
92HD79B1A5NLGXTAX-GP
1
C3017
C3018
AUD_AGND
2
AUD_AGND AUD_AGND AUD_AGND AUD_AGND
B
Close to codec B
Azalia I/F
PCH_SDOUT_CODEC
EMI
1
R3015
47R2J-2-GP
DY +AVDD R3016 +AVDD
20KR2F-L-GP 2 R3014 1 0R0603-PAD-1-GP
2
1 2
AUD_HP1_JD# 60
1
1
SB_AZ_CODEC_SDOUT1
A R3018 R3019 A
2K49R2F-GP 2K49R2F-GP
2 R3017 1 0R0603-PAD-1-GP
<Core Design>
2
AUD_SENSE_A AUD_SENSE_B
1
2 R3020 1 0R0603-PAD-1-GP
Wistron Corporation
1
R3021
C3019 R3022 20KR2F-L-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC1000P50V3JN-GP-U 39K2R2F-L-GP Taipei Hsien 221, Taiwan, R.O.C.
2
2 1
2
1
C3020 EXT_MIC_JD# 60 Title

DY SCD1U10V2KX-5GP AUD_AGND
AUD_AGND
Audio Codec 92HD79B1
2
AUD_AGND Size Document Number Rev

Close to Pin13 Custom X01
Close to Pin14 Arsenal DJ1 Discrete
Date: Thursday, April 22, 2010
Sheet 30 of 90
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = SDIO
D D
XD_D7
XD_D7 71
XD_D6/MS_BS XD_D6/MS_BS 71
XD_D5/SD_D2/MS_D5
XD_D5/SD_D2/MS_D5 71
XD_D4/SD_D3/MS_D1 XD_D4/SD_D3/MS_D1 71
XD_D3/SD_D4/MS_D4 XD_D3/SD_D4/MS_D4 71
23 CLK_48M_CARD
C3206 R3203
2 R2_CLK_48M_CARD
DY1 2
DY 1
C3207
C SC10P50V2JN-4GP 10R2F-L-GP C
Place these close RTS5138 1
DY2
SC100P50V2JN-3GP
R3201
24
23
22
21
20
19
1 2 U3201
XD_D7
SP14
SP13
SP12
SP11
CLK_IN
6K2R2F-GP
RREF 1 18 XD_D2/SD_CMD XD_D2/SD_CMD 71
+3.3V_RUN +3.3V_PHY USB_PN10_1 RREF SP10 CR_GPIO0
2 DM GPIO0 17 1 TP3201 TPAD14-GP
300mA USB_PP10_1 3 16 XD_D1/SD_D5/MS_D0 XD_D1/SD_D5/MS_D0 71
DP SP9 XD_D0/SD_CLK/MS_D2
2 R3202 1 4 3V3_IN SP8 15 XD_D0/SD_CLK/MS_D2 71
0R0603-PAD-1-GP 5 14 XD_WP/SD_D6/MS_D6 XD_WP/SD_D6/MS_D6 71
CARD_3V3 SP7
SC4D7U6D3V3KX-GP
V18 6 13 XD_WE#/SD_CD# XD_WE#/SD_CD# 71

V18 SP6
2
XD_CD#
C3203
C3204
SCD1U10V2KX-5GP
DY
SP1
SP2
SP3
SP4
SP5
25
1
GND
SC1U6D3V2KX-GP
C3208
RTS5138-GR-GP
7
8
9
10
11
12
1
+3.3V_RUN_CARD
2
250mA
1
C3205
SCD1U10V2KX-5GP XD_ALE/SD_D7/MS_D3 XD_ALE/SD_D7/MS_D3 71
B XD_CLE/SD_D0/MS_D7 XD_CLE/SD_D0/MS_D7 71 B
2
XD_CE#/SD_D1 XD_CE#/SD_D1 71 R3206

XD_RE#/MS_INS# XD_RE#/MS_INS# 71
XD_RDY/SD_WP/MS_CLK_R 2 1 XD_RDY/SD_WP/MS_CLK 71
XD_CD# XD_CD# 71
22R2J-2-GP
USB_PN10_1
USB_PN10 21
4
DLW21HN900SQ2LGP-U
TR3201
1
A USB_PP10_1 A
USB_PP10 21 <Core Design>
Wistron Corporation
Title
Size
Card Reader-RTS5138
Document Number Rev
Custom
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
A B C D E
4 4
3 3
(Blanking)
2 2
1 <Core Design> 1
Wistron Corporation
Title
Reserved
A3
A B C D E
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
+KBC_PWR
5 CAP close to VCC-GND pin pair
4 +3.3V_RUN 3 +3.3V_RUN 2 1
R3747
1
DY 2
0R5J-5-GP
+3.3V_RTC_LDO SSID = KBC +KBC_PWR
1
VBAT
SCD1U10V2KX-5GP
L3701 1 2 0R0603-PAD-1-GP
2010/04/21 1 2 R3710
DY
1
C3701
R3701 0R2J-2-GP 100KR2J-1-GP
X01 C3702
DY
SC2D2U10V3KX-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-4GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC2D2U10V3KX-1GP
SCD1U10V2KX-5GP
SC2D2U10V3KX-1GP R3730
Q3703
2
2 1 KBC_PWRBTN_EC#
DY
1
1
C3703
C3704
C3705
C3706
C3707
C3708
C3709
C3710
4 3 KBC_SDA1 0R2J-2-GP
39 THERM_SDA
2
5 2
DY
2
115
102
88
76
46
19
80
4
U3701A 1 OF 2 KBC_SCL1 6 1 3 +3.3V_RTC_LDO
BAT_IN# 76 THERM_SCL 39 76 KBC_PWRBTN#
VCC
VCC
VCC
VCC
VCC
AVCC
VDD
GPIO41
D3704
1
76 AD_IA DMN66D0LDW-7-GP BAT54C-U-GP
1
+1.05V_VTT R3714 Q3705 +KBC_PWR
104 124 R3702 1 2 10KR2J-3-GP 2N7002E-1-GP
R3751 VREF GPIO10/LPCPD# PCH_TEMP_ALERT# 25 DY +3.3V_RTC_LDO
D LRESET#
7 PLT_RST1#_1 G
D
. .
AD_IA_R 0R2J-2-GP
1 2 97 A/D 2 PCLK_KBC 21
2
DG_DJ_DET GPI90/AD0 LCLK KBC_ON#
98 3 LPC_LFRAME# 24,70 D
GPI91/AD1 LFRAME#
.
.
.
0R2J-2-GP 99 126 LPC_LAD0
GPI92/AD2 LAD0 LPC_LAD1 R3704 EC_SHUTDOWN#
76 PSID_EC 100 127 LPC_LAD[0..3] 24,70 R3735 S
S
DISCRETE_ID GPI93/AD3 LAD1 LPC_LAD2 2K2R2J-2-GP
108 128
GPIO05 LAD2
2
KBC_THERMTRIP# LPC_LAD3 Q3704 KBC_ON_RC#
96
GPIO04 LPC LAD3
1 G 1 2 AC_IN# 76
1
C3718 DY 125 INT_SERIRQ 24 SI2301CDS-T1-GE3-GP 10KR2J-3-GP
2
SERIRQ
1
SC4D7P50V2CN-1GP C3711
8 PM_CLKRUN# 22 DY R3750
1
GPIO11/CLKRUN# H_THERMTRIP_R# 2 C3713
122 1
KBRST# SIO_RCIN# 25 DY 0R2J-2-GP
3
101 121 SCD1U10V2KX-4GP
22 SUS_PWR_DN_ACK SIO_A20GATE 25
2
GPI94 GA20
1
105 29 ECSCI#_KBC SCD1U16V2KX-3GP +KBC_PWR 2 1 AC_IN#_KBC
2
GPI95 ECSCI#/GPIO54 D3705
106 D/A 9 PCH_VGA_BLEN 20
KBC_RCID GPI96 GPIO65/SMI# ECSWI#_KBC KBC_THERMTRIP# BAT54C-U-GP
107 123 2 3
GPI97 GPIO67/PWUREQ# 9,25,42 H_THERMTRIP#
1 2
R3706 10KR2J-3-GP
Q3701
22,42,50,51 PM_SLP_S3# 64 68 KBC_SDA1 PMBS3904-1-GP
GPIO01/TB2 GPIO74/SDA2 KBC_SDA1 23
KBC_PWRBTN_EC# 95 67 KBC_SCL1
AC_IN#_KBC 93
GPIO03 SMB GPIO73/SCL2
69
KBC_SCL1 23
GPIO06 GPIO22/SDA1 BAT_SDA 76
69 LID_CLOSE# 94 70 R3752
GPIO07 GPIO17/SCL1 BAT_SCL 76
PCB_VER0
KBC_BIOS_ID
119
6
GPIO23
1
DY 2
GPIO24 0R2J-2-GP
109
PCB_VER1 GPIO30
120 SP 81
GPIO31 GPIO66/G_PWM
66 PWRLED# 65 D3701
GPIO32/D_PWM
66 25 SIO_EXT_WAKE# 1
GPIO33/H_PWM
66 WHITE_LED_KBC 16
TP3709 AD_OFF GPIO40/F_PWM ECSMI#_KBC BAS16-1-GP ECSWI#_KBC
1 17 84 3
GPIO42/TCK GPIO77 +3.3V_RUN
22 PCH_RSMRST# 20 SPI 83 BLUETOOTH_EN 73,76
GPIO43/TMS GPIO76/SHBM
22,50 PM_SLP_S4# 21 GPIO 82 WIFI_RF_EN 76 2
GPIO44/TDI GPIO75
22 91
GPIO45/E_PWM GPIO81
23
46 3V_5V_POK PM_PWROK_R GPIO46/TRST# E51_RxD
1 2 24 1 2
22 PM_PWROK
62 EC_SPI_WP#_R R3715 0R0402-PAD 25
GPIO47 R3705 DY 10KR2J-3-GP
EC_SHUTDOWN# GPIO50/TDO E51_TxD
26 111 E51_TxD 76
GPIO51 GPO83/SOUT_CR/BADDR1 E51_RxD R3753 RN3705
54 BLON_OUT 27 113 E51_RxD 76
CPUCORE_ON_R GPIO52/RDY# GPIO87/SIN_CR SIO_A20GATE
1 2 28 112 1 2 4 1
47 IMVP_VR_ON
76 PSID_DISABLE# R3718 0R0402-PAD 73
GPIO53 GPO84/BADDR0 AC_PRESENT_EC 22 DY SIO_RCIN# 3
DY 2
GPIO70 0R2J-2-GP SRN10KJ-5-GP
74 114 PM_LAN_ENABLE 76
GPIO71 GPIO16 VTT_PWRGD_R
24 ME_UNLOCK# 75 14 1 2 VTT_PWRGD 9,42,49 D3702
GPIO72 GPIO34 R3708
110 15 1
C 63 USB_PWR_EN# GPO82/TRIS#
SER/IR
GPIO36 S5_ENABLE 42
0R0402-PAD
25 SIO_EXT_SCI#
BAS16-1-GP 3 ECSCI#_KBC
C
44 KBC_VCORF 2 +KBC_PWR
VCORF C3712
1
SC1U10V3KX-3GP
AGND
+3.3V_RUN
GND
GND
GND
GND
GND
GND
ECRST# 1 2
2
R3754 R3736 10KR2J-3-GP
1
NPCE781BA0DX-GP RN3703 EC3701
1
DY 2
116
89
78
45
18
5
103
BAT_SDA 4 1 DY SCD1U10V2KX-5GP
1
10KR2J-3-GP
0R2J-2-GP BAT_SCL 3 2
2
R3722 KBC_AGND
MB VERSION
2
R3723
10KR2J-3-GP D3703 SRN4K7J-8-GP

DY R3721 25 SIO_EXT_SMI# 1
0R0402-PAD RN3704
ID VER1 VER0
2
BAS16-1-GP 3 ECSMI#_KBC KB_DET# 1 4

PCB_VER0 LCD_CBL_DET# 2 3
X00 0 0
1
PCB_VER1 2
SRN100KJ-6-GP
X01 0 1
1
10KR2J-3-GP
X02 1 0
R3726
R3725 KBC_THERMTRIP# 1 2
10KR2J-3-GP R3716 100KR2J-1-GP
DY A00 1 1 AC_IN#_KBC 1 2
U3701B 2 OF 2 R3738 10KR2J-3-GP
2
S5_ENABLE 1 2
KCOL[0..16] 68
R3717 10KR2J-3-GP
1 2 KBC_XI 77 53 KCOL0 KCOL0 1 2
22 PCH_SUSCLK_KBC
R3748 0R0402-PAD 32KX1/32KCLKIN KBSOUT0/JENK#
52 KCOL1 R3719 DY 10KR2J-3-GP
KBSOUT1/TCK KCOL2 BLUETOOTH_EN
POP when support RCID function 51 1 2
KBSOUT2/TMS KCOL3 R3720 10KR2J-3-GP
50
KBSOUT3/TDI KCOL4 IMVP_VR_ON
2010/02/25 79
30
32KX2 KBSOUT4/JEN0#
49
48 KCOL5 R3741
1 2
10KR2J-3-GP
30 AMP_MUTE#
KBC CLK Q3706
GPIO55/CLKOUT KBSOUT5/TDO
KBSOUT6/RDY#
47 KCOL6
47 IMVP_PWRGD 63 43 KCOL7
GPIO14/TB1 KBSOUT7
EMI PCLK_KBC KBC_RCID G 22 PM_PWRBTN# 117 KBC 42 KCOL8
. .
GPIO20/TA2 KBSOUT8
2
54 LCD_TST_EN 31 41 KCOL9
R3727 PSID_EC GPIO56/TA1 KBSOUT9 KCOL10
D 32 40
DY 30 KBC_BEEP
.
.
.
E51_TxD R3731 100KR2J-1-GP GPIO15/A_PWM KBSOUT10 KCOL11

DY 0R2J-2-GP S
DY 66 AMBER_LED_KBC
1 BRIGHTNESS
118
62
GPIO21/B_PWM KBSOUT11
39
38 KCOL12
B GPIO13/C_PWM KBSOUT12/GPIO64
B
2
TP3710 37 KCOL13
1
KBSOUT13/GPIO63 KCOL14
PCLK_KBC_RC
36
DYR3734 2N7002E-1-GP KBSOUT14/GPIO62
35 KCOL15
4K7R2J-2-GP KBSOUT15/GPIO61/XOR_OUT KCOL16
68 KB_DET# 13 34
GPIO12/PSDAT3 GPIO60/KBSOUT16 KCOL17 TP3701 TPAD14-GP
54 LCD_CBL_DET# 12 33 1
1
GPIO25/PSCLK3 GPIO57/KBSOUT17
9 VDDPWRGOOD_KBC 11 KROW[0..7] 68
GPIO27/PSDAT2
54 LCD_TST 10
GPIO26/PSCLK2 KROW0
68 TPDATA 71 54
GPIO35/PSDAT1 KBSIN0 KROW1
68 TPCLK 72
GPIO37/PSCLK1 PS/2 KBSIN1
55
2
56 KROW2
C3716 KBSIN2 KROW3
57
KBSIN3 KROW4
SC4D7P50V2CN-1GP 58
1
EC_SPI_DI KBSIN4 KROW5

86 59
DY 62 EC_SPI_DI
EC_SPI_DO 87
F_SDI KBSIN5
60 KROW6
62 EC_SPI_DO F_SDO KBSIN6
EC_SPI_CS# 90 61 KROW7
62 EC_SPI_CS#
EC_SPI_CLK R3729 1 2 0R0402-PAD EC_SPI_CLK_C 92 F_CS0# FIU KBSIN7
62 EC_SPI_CLK F_SCK
85 ECRST#
R3732 VCC_POR#
0R0402-PAD
PLT_RST1#_1 2 1
PLT_RST# 9,21,70,76 NPCE781BA0DX-GP
1
C3714
DY SC470P50V3JN-2GP +KBC_PWR
2
R3739
+KBC_PWR PH for DJ VTT_PWRGD IMVP_VR_ON U3702
2
DY 1
Internal PL for DG 0R2J-2-GP 1
GND
3
DY VCC
1
2
R3709 RESET#
2K2R2J-2-GP ECRST#
G690L293T73UF-GP
(GPIO91)
2
DG_DJ_DET
Project option
1
2
C3715
GPU table DY
A 39,42 PURE_HW_SHUTDOWN# 1 SC1U10V3KX-3GP
A
2
+KBC_PWR +KBC_PWR
GPIO91 GPIO24 GPIO05
3
R3740 R3707 (DG_DJ_DET) (KBC_BIOS_ID) (DISCRETE_ID) Q3702
2K2R2J-2-GP 2K2R2J-2-GP (KBC internal pull low) (KBC internal pull low) (KBC internal pull low) PMBS3906-GP
1
<Core Design>
DY DY DG 0 DIS :1 UMA:0 0
(GPIO5) (GPIO24) Wistron Corporation
DJ1 DIS/UMA DIS :1 UMA:0 0
2
DISCRETE_ID KBC_BIOS_ID Taipei Hsien 221, Taiwan, R.O.C.

1
Title
DJ2 UMA 1 0 1 KBC Nuvoton NPCE781BA0DX
A2
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
+5V_RUN +3.3V_RUN
SSID = Thermal
1
1
1
R3901
C3901 C3902 10KR2J-3-GP
SC10U6D3V5MX-3GP SCD1U10V2KX-5GP
2
EMC2102_FAN_TACH
EMC2102_FAN_TACH 58
D D
EMC2102_FAN_DRIVE EMC2102_FAN_DRIVE 58
RN3901
3 2 +3.3V_RUN
4 1
SRN4K7J-8-GP
1. Place near CPU THERM_SCL 37
and PCH. R3905
THERM_SDA 37
+3.3V_RUN 49D9R2F-GP
Layout notice :
Both DN1 and DP1 routing 10 mil EMC2102_VDD_3D3
29
28
27
26
25
24
23
22
2 1
trace width and 10 mil spacing. U3901
VDD_5Va
FANa
FANb
VDD_5Vb
SMCLK
SMDATA
GND
TACH
1
C3905 must be near Q3901 +3.3V_RUN
C3903
SCD1U10V2KX-5GP
2
2
1 C3905 C3906
Q3901 DY SC470P50V3JN-2GP SC470P50V3JN-2GP 1 21
2
PMBS3904-1-GP VDD_3V NC#21

C3906 must be
3
near EMC2102 EMC2102_DN1 2 20

DN1 GND
EMC2102_DP1 3 19
DP1 ALERT#
C3904 must be near Q3905
EMC2102_DN2 4
EMC2102 18 CLK_32K R3906
DN2 CLK_IN 0R0402-PAD
C GND = Internal Oscillator Selected C
2
C3911 C3904 EMC2102_DP2 5 17 EMC2102_CLK_SEL 1 2

1 SC470P50V3JN-2GP DP2 CLK_SEL +3.3V = External 32.768kHz Clock Selected
Q3905 SC470P50V3JN-2GP C3911 must be EMC2102_DN3 6 16
DY
2
PMBS3904-1-GP DN3 RESET#

near EMC2102
3
EMC2102_DP3 7 15
DP3 NC#15
THERMTRIP#
POWER_OK#
SYS_SHDN#
2.System Sensor
FAN_MODE
SHDN_SEL
TRIP_SET
Layout notice :
Both DN2 and DP2 routing 10 mil
NC#8
trace width and 10 mil spacing.
GND = Channel 1
EMC2102-DZK-GP
OPEN = Channel 3
10
11
12
13
14
C3907 must be near Q3902 RN3902
+3.3V = Disabled SRN10KJ-5-GP
THERM_POWER_OK# 4 1 +3.3V_RUN
R3909 THERMTRIP# 3 2
2
2 EMC2102_SHDN
DY 1
THERM_SYS_SHDN#
1 C3907 C3908
Q3902 DY SC470P50V3JN-2GP SC470P50V3JN-2GP 10KR2J-3-GP
2
PMBS3904-1-GP C3908 must be +KBC_PWR

3
+3.3V_RUN +3.3V_RUN
near EMC2102 +3.3V_RUN
R3910
1
3.HW T8 sensor 2 1 EMC2102_FAN_mode
DY Q3903 R3912
10KR2J-3-GP 2N7002E-1-GP 10KR2J-3-GP
Layout notice :
1
Both DN3 and DP3 routing 10 mil R3913 G
. .
1
trace width and 10 mil spacing. 0R0402-PAD R3914
B 1 2 D PURE_HW_SHUTDOWN# 37,42 C3909 10KR2F-2-GP B
.
.
.
SCD1U10V2KX-5GP
2
S
2
GND = Fan is OFF
OPEN = Fan is at 60% full-scale TRIP_SET Pin Voltage
V_DEGREE
+3.3V = Fan is at 75% full-scale V_DEGREE=(((Degree-75)/21)
1
1
R3915
C3910 2K37R2F-GP
SCD1U10V2KX-5GP
2
T8 shutdown is set 88 deg-C.
32K suspend clock output
Q3904
2N7002E-1-GP R3916
S CLK_32K_R 1 2 CLK_32K
A 10R2J-2-GP A
22 PCH_SUSCLK_2102 D <Core Design>
.
.
. .
.
G C3912
DY SC4D7P50V2CN-1GP
Wistron Corporation
2
42 RUN_ENABLE 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Title
Size
Thermal/Fan Controllor EMC2102 Rev
Document Number
Custom X01
DJ1 Calpella UMA
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = Reset.Suspend H_THERMTRIP# 9,25,37
E
R4201
1 2 H_PWRGD_R B
9,25 H_PWRGD DY DY Q4201
1
1KR2J-1-GP CHT2222APT-GP
C
C4201
SCD1U10V2KX-4GP DY
2
2
D4201
3 PURE_HW_SHUTDOWN# 37,39
D 46 3V_5V_EN 1 D
BAS16-1-GP
1
1 2 S5_ENABLE 37
R4203
R4202 1KR2J-1-GP
200KR2J-L1-GP
DY
2
Peak current: 6370mA ( HD:1100 ODD:2500 )
Design current: 4459 mA
11.6A
Run Power +15V_ALW Rds=14m ohm ==> 0.09V
+3.3V_RTC_LDO +5V_ALW +5V_RUN

2
100KR2J-1-GP U4201
R4204 8 D S 1
1 2 RUN_ON_5V# R4205 7 D S 2
100KR2J-1-GP 6 D S 3
D G S 5 D G 4
1
1
C4206
R4207 AO4468-GP SC10U10V5KX-2GP
6
1 2 5V_RUN_ENABLE
2
Q4202
DMN66D0LDW-7-GP 10KR2J-3-GP
1 C4202
1
SC6800P25V2KX-1GP
2
S G D Peak current: 3861mA

C
Design current: 2702mA C
RUN_ENABLE 11.6A
22,37,50,51 PM_SLP_S3#
Rds=14m ohm ==> 0.054
39 RUN_ENABLE +3.3V_ALW +3.3V_RUN
U4203
8 D S 1
7 D S 2
6 D S 3
5 D G 4
1
R4210 AO4468-GP C4207
1 2 3.3V_RUN_ENABLE SC10U6D3V5KX-1GP
2
1
10KR2J-3-GP
C4205
SCD01U50V2KX-1GP
2
425302_425302_Calpella_S3PowerReduction_WhitePape
Revision 0.7
+1.5V_RUN
+0.75V_DDR_VTT
Total= 4A For CPU
1
+1.5V_SUS +1.5V_RUN
1
R4219 R5034
221R2F-2-GP R4220 100KR2J-1-GP
Q4203_D
22R2J-2-GP 1 2
9,37,49 VTT_PWRGD 0D75V_EN 50
Q5004_D
2
U4204
2
8 D S 1
7 D S 2
D
6 D S 3
D
5 D G 4 . Q4209
D
1
R4221 . Q4207 2N7002E-1-GP

B 10KR2J-3-GP AO4468-GP C4210 2N7002E-1-GP . Q4208 . B
1 2 1.5V_RUN_ENABLE SC10U6D3V5KX-1GP . 2N7002E-1-GP .
. .
2
.
. . .
.
. .
S
1
S
C4209 RUN_ON_5V#
S
SCD01U50V2KX-1GP RUN_ON_5V#
2
RUN_ON_5V#
A A
<Core Design>
Wistron Corporation
Title

Power Plane Enable Rev
A2
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
A B C D E
+3.3V_ALW +3D3V_PWR
PG4602
2 1 +3.3V_ALW_2
51125_VCLK 51125_VCLK
GAP-CLOSE-PWR
1
PG4604 PC4602 PC4604
SC1KP50V2KX-1GP
PC4603
2 1 PR4601 SCD1U25V3KX-GP SCD1U25V3KX-GP
+PWR_SRC_3D3V 100KR2J-1-GP
2
GAP-CLOSE-PWR +PWR_SRC
PG4606
PD3903_1
PD3904_1
2
2 1 PG4603
1 2 51125_ENTRIP
GAP-CLOSE-PWR
PG4608 GAP-CLOSE-PWR
2 1 PG4605
D
1 2 PQ4601 51125_ENTIP1
3
GAP-CLOSE-PWR 2N7002E-1-GP .
1
2 1 PG4607 . PC4605 DY PR4602 PD4603 PD4604
4 1 2 .
. . SC18P50V2JN-1-GP 127KR2F-GP BAT54S-5-GP BAT54S-5-GP 4
4
GAP-CLOSE-PWR
1
S
2 1 PG4609 PQ4602 +15V_ALW +5V_PWR
1 2 42 3V_5V_EN DMN66D0LDW-7-GP PG4610
PD3903_04
GAP-CLOSE-PWR GAP-CLOSE-PWR-3-GP
3
1 2 1 2 PD3903_2
GAP-CLOSE-PWR 51125_ENTIP2
2010/04/21
1
PG4626 X01 PC4609
1
PC4607
SC18P50V2JN-1-GP
1 2 SC1U25V3KX-1-GP
1
SCD1U10V2KX-5GP
2
1
PC4608
GAP-CLOSE-PWR
PG4630 DY PR4603
1 2
Modify PU4603 to PTS51125 140KR2B-GP PC4606
2
SCD1U25V3KX-GP
X01
2
GAP-CLOSE-PWR
1
PG4631
2 TPS51125 RT8205B
2010/04/16
PR4622 DY ASM
GAP-CLOSE-PWR
+PWR_SRC_3D3V +PWR_SRC
PR4622
+PWR_SRC_5V
51125_EN 1 2
DY PC4612 PC4613
SC10U25V6KX-1GP
SCD01U50V2KX-1GP
820KR3J-GP
1
PC4610 PC4611 X01 DY TPS51125 RT8205B
1
1
SCD01U50V2KX-1GP
PR4605 0R3J 4R7 +5V_PWR +5V_ALW

SC10U25V6KX-1GP
PG4614
2
D TPS51125 RT8205B
D PC4614 PC4615 PC4616 1 2
2
8
7
6
5
5
6
7
8
1
PR4604 0R3J 4R7 +PWR_SRC +PWR_SRC_5V
D
D
D
D
D
D
D
D
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD01U50V2KX-1GP
Design Current =9.07A PU4601 PU4602 GAP-CLOSE-PWR
DY PG4615
16
FDS8884-GP FDS8884-GP
2
14.25A<OCP<16.84A PU4603 PG4612 1 2
PC4617 Design Current = 8.4A 1 2
VIN
SCD1U25V3KX-GP X01 X01 GAP-CLOSE-PWR
13.32A<OCP< 15.75A
G
S
S
S
SCD1U25V3KX-GP GAP-CLOSE-PWR PG4616
S
S
S
G
PR4604 PR4605
PC4618 G S PG4624 1 2
1
2
3
4
4
3
2
1
51125_VBST2_1 1 251125_VBST2 9 51125_VBST1 1 51125_VBST1_1
S G 2 1
0R3J-0-U-GP BOOT2 BOOT1
22 2
0R3J-0-U-GP
1 2 2 1
GAP-CLOSE-PWR
+3D3V_PWR PL4601 PL4602 +5V_PWR
51125_DRVH2 10 21 51125_DRVH1 GAP-CLOSE-PWR PG4617
UGATE2 UGATE1
3 PG4625 1 2 3
2 1 51125_LL2 11 20 51125_LL1 1 2 2 1
PHASE2 PHASE1 GAP-CLOSE-PWR
1
PTC4603 51125_DRVL2 51125_DRVL1 GAP-CLOSE-PWR

IND-3D3UH-147-GP D 12
LGATE2 LGATE1
19
IND-2D2UH-157-GP-U
PG4619
1
1
PC4619 PTC4601 PR4606 D PG4628 1 2
8
7
6
5
5
6
7
8
GAP-CLOSE-PWR-3-GP
ST100U6D3VBM-5GP
ST220U6D3VDM-15GP
DY 2D2R5F-2-GP PR4607 2 1
D
D
D
D
SCD1U10V2KX-4GP
D
D
D
D
PU4604 51125_VO2 7 24 51125_VO1 PU4605 2D2R5F-2-GP PC4601 GAP-CLOSE-PWR

2
VOUT2 VOUT1
1
1
PG4618 PG4620 PTC4602 PTC4604 GAP-CLOSE-PWR PG4601
2
GAP-CLOSE-PWR-3-GP
FDS6690AS-GP
SCD1U10V2KX-4GP
ST220U6D3VDM-15GP
ST100U6D3VBM-5GP
51125_FB2 5 2 51125_FB1 2010/04/21 DY PG4629 1 2
DY
2
FB2 FB1
FDS6690AS-GP
2 1
2
1
X01 GAP-CLOSE-PWR
2
2
1
G
S
S
S
PC4620 2 51125_EN 3V_5V_POK GAP-CLOSE-PWR PG4621
S
S
S
G
SC330P50V3GN-GP
1
PR4608 DY820KR2F-GP 13
EN PGOOD
23
G S PC4621 1 2
2
1
2
3
4
4
3
2
1
51125_ENTIP2 6 51125_ENTIP1 SC680P50V3JN-GP
S G 1
2
51125_VREF ENTRIP2 ENTRIP1 GAP-CLOSE-PWR
2010/04/21 3 15 PG4622
REF PGND
1 2
1
X01
SCD22U10V2KX-1GP
PC4622
51125_TONSEL 4 25
TONSEL GND GAP-CLOSE-PWR
1
PR4611
2
1
14 18 51125_VCLK 0R2J-2-GP
SKIPSEL LG1_CP
1
PR4610 51125_SKIPSEL DY
PR4609 DY 0R2J-2-GP PR4612
VREG3
VREG5
6K65R2F-GP 33KR2F-GP
1 2
51125_FB1_R
2
1 2
51125_FB2_R
2
PC4624 PC4623 DY
3D3V_AUX_S5_5_51125 8
17
+3.3V_ALW
DYSC18P50V2JN-1-GP +5V_ALW2 SC18P50V2JN-1-GP
2
+3.3V_ALW_2
PG4623
2
1
1 2
1
PR4616 PR4614 PR4615

PR4613 2 1 GAP-CLOSE-PWR-3-GP 100KR2J-1-GP 21K5R2F-GP
10KR2F-2-GP
51125_VREF DY 0R2J-2-GP Close to VFB Pin (pin2)
PR4617
2
+3.3V_ALW_2 2 1 3V_5V_POK 37
2
0R2J-2-GP
PC4625
51125_VREF 2 PR4618
1
1
0R2J-2-GP PC4626
SC4D7U10V5KX-4GP
Close to VFB Pin (pin5) +3.3V_ALW_2 +3.3V_RTC_LDO

SC10U10V5KX-2GP
2 PR4619 2
+3.3V_ALW_2 2
DY 1
2
0R2J-2-GP PR4620
X01 PR4621
1 2
2 1
DY 0R2J-2-GP 0R2J-2-GP I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 2.2uH PCMC063T-2R2MN Cyntec 18mohm/20mohm Isat =14Arms 68.2R210.20B
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
TPS51125 RT8205B
O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081
PR4616 DY ASM H/S: FDSS8884 SO-8/ 23mohm/30mOhm@4.5Vgs/ 84.08884.037
PR4617 ASM DY L/S: FDS6690AS SO-8/ 12mohm/15mOhm@4.5Vgs/ 84.06690.E37
PR4618 ASM DY
PR4619 DY ASM
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 3.3UH PCMB104T-3R3MS Cyntec 10.8mohm/11.8mohm Isat =16Arms 68.3R310.20C
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081 SKIPSEL VREG3 or VREG5 VREF(2V) GND
H/S: FDSS8884 SO-8/ 23mohm/30mOhm@4.5Vgs/ 84.08884.037 Operating OOA Auto Skip Auto Skip
L/S: FDS6690AS SO-8/ 12mohm/15mOhm@4.5Vgs/ 84.06690.E37 Mode PWM only
EN0 Open 820k to GND

GND
Operating
Mode enable both enable both LDOs, disable all
TPS51125: LDOs, VCLK on VCLK off and circuit
and ready to ready to turn on
TONSEL CH1 CH2 turn on switcher channels
GND 200kHz 265kHz switcher
channels
VREF 245kHz 305kHz
VREG3 300kHz 375kHz
1
VREG5 365kHz 460kHz 1
RT8205B:
TONSEL CH1 CH2

<Core Design>
GND 200kHz 250kHz
VREF 300kHz 375kHz Wistron Corporation
VREG3 365kHz 460kHz Taipei Hsien 221, Taiwan, R.O.C.
VREG5 365kHz 460kHz Title

TPS51125_5V/3D3V Rev
A2
A B C D E
www.vinafix.vn
5 4 3 2 1
PM_DPRSLPVR 12
7 VR_CLKEN#
IMVP_VR_ON 37
H_VID[6..0] 12
+3.3V_RUN
H_VID6
H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
D D
2
+PW R_SRC
1
PR4701
2010/04/21
1K91R2F-1-GP X01
1
62882_DPRSLPVR 1
1
TC4705 TC4704
PR4706
PR4708
PR4713
PR4718
PR4722
PR4732
PR4738
PR4744
PR4755
PR4764
2
DY DY
62882_CLK_EN#
SE100U25VM-11GP
SE100U25VM-11GP
2
2
62882_VR_ON
62882_VID6
62882_VID5
62882_VID4
62882_VID3
62882_VID2
62882_VID1
62882_VID0
+3.3V_RUN
40
39
38
37
36
35
34
33
32
31
1
PU4701
PR4799 2010/04/21
CLK_EN#
DPRSLPVR
VR_ON
VID6
VID5
VID4
VID3
VID2
VID1
VID0
1K91R2F-1-GP
+1.05V_VTT X01 +5V_RUN
2
37 IMVP_PW RGD 1 2 62882_PGOOD 1 30 BOOT2 BOOT2 48

PGOOD BOOT2
2
PR4704 0R0402-PAD 2010/04/21

C PR4795 1 2 62882_PSI# 2 29 UGATE2 UGATE2 48
C
12 PSI# PSI# UGATE2
2
68R2-GP PR4703 0R0402-PAD X01
1 2 62882_RBIAS 3 RBIAS PHASE2 28 PHASE2 PHASE2 48
NTC 470K close to H/S MOSFET of Phase1 PR4796 147KR2F-GP PR4776
1
9 H_PROCHOT# 4 27 0R0402-PAD
PR4794 VR_TT# VSSP2
1
62882_NTC_R1 DY 2 62882_NTC LGATE2
1
PR4789DY 2
NTC-470K-1-GP
5 NTC ISL62882CHRTZ-T-GP LGATE2 26 LGATE2 48
4K02R2F-GP 1 2 62882_VW 6 25 62882_VCCP
DY SCD01U50V2KX-1GP VW VCCP
PC4769 1 2 62882_COMP 7 24 LGATE1B LGATE1B 48 PC4709 PC4708
COMP LGATE1B
1
SC1U10V2KX-1GP
PR4714
SC1U10V2KX-1GP
8K06R2F-GP 62882_FB 8 23 LGATE1 LGATE1 48
FB LGATE1A
2
1 2 62882_FB2 9 74.62882.A73 22
FB2 VSSP1
PC4767SC1000P50V3JN-GP-U ISEN2 10 21 PHASE1 PHASE1 48
ISEN2 PHASE1
UGATE1
1 PC4750
Intel support POC (power on current).
BOOT1
ISUM+
ISEN1
ISUM-
BOOT1_PHASE2
SCD22U25V3KX-GP
VSEN
IMON
PC4768 41
VDD
RTN
1
GND
VIN
2 +1.05V_VTT
1
PR4788
DY 2 1 2
PC4704
2
0R2J-2-GP +1.05V_VTT
0919 SASC10P50V2JN-4GP SCD22U25V3KX-GP
11
62882_VSEN 12
13
62882_ISUM- 14
15
16
17
18
19
20
2
PR4702
VSUM-
62883_VDD DY 100KR2F-L1-GP
62882_RTN
62882_FB2 1 2 1 262882_COMP_R
1 2 ISEN1 UGATE1
62883_VIN
UGATE1 48
PC4748 PC4765 PR4793412KR2F-GP 1 BOOT1 1 2 PR4773
1
SC22P50V2JN-4GP SC150P50V2JN-3GP PC4749 IMVP_IMON 2D2R3J-2-GP IMVP_IMON 12 PR4765 PR4756 PR4745 PR4739 PR4733 PR4723 PR4719 PR4709 PR4798
1
SCD22U25V3KX-GP 2 +PW R_SRC 2010/04/23
B B
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1 2
1
X01
VSUM-
PR4717
PR4784 0R0402-PAD DY DY DY DY
+5V_RUN PC4778
10KR2F-2-GP
1 2 SCD047U25V3KX-GP
2
PC4770 1R2F-GP
1
1 262882_FB_VSEN1 2 PC4702 PC4710 PR4774
2
48 ISEN1 ISEN1 PR4785 H_VID0
SC1U10V2KX-1GP
SCD22U25V3KX-GP
562R2F-GP PR4705 SC390P50V2KX-GP 2010/04/21 62882_RTN H_VID1

2
48 ISEN2 ISEN2 1 2 H_VID2

X01 H_VID3
2K8R2F-GP H_VID4
2010/04/19 H_VID5
H_VID6
X01 VSUM+ VSUM+ 48 PM_DPRSLPVR
PSI#
1
1
PC4790 PC4791
PC4771 PR4737 PR4742 PR4766 PR4757 PR4712 PR4740 PR4734 PR4724 PR4720 PR4710 PR4797
1
SC330P50V2KX-3GP 82D5R2F-1-GP SCD22U16V3KX-1-GP 2K61R2F-1-GP
SCD033U16V3KX-GP
DY
2
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1
PR4731 DY DY DY DY DY
1VSUM_RR
VSUM_RC 2
2
11KR2F-L-GP
2
12 VCC_SENSE 1 2
PR4707 0R0402-PAD
2
1
PC4772
SC330P50V2KX-3GP PR4762
2
NTC-10K-27-GP
2
A
12 VSS_SENSE 1
PR4711
2
0R0402-PAD DY PC4784
SCD01U50V2KX-1GP <Core Design>
A
1
1 PR4727 2 VSUM- VSUM- 48

2
2010/04/21 NTC 10K close to Choke of Phase1

PC4779 1K4R2F-1-GP Wistron Corporation
1
X01 SC1000P50V3JN-GP-U 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

1
2010/04/19 PC4786 2010/04/21 Taipei Hsien 221, Taiwan, R.O.C.

SCD1U25V3KX-GP
2
X01 X01 Title

1 2
PR4790
ISL62883_CPU_CORE
0R0402-PAD A3 Berry X01
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
+PW R_SRC
PC4815 PC4813 PC4814 PC4812
1
PC4811
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
DY
SC10U25V6KX-1GP
SCD1U25V3KX-GP
2
2
5
6
7
8
5
6
7
8
D
D
D
D
D
D
D
D
D PQ4833 PQ4834 D
SI7686DP-T1-GP SI7686DP-T1-GP
DY
G
S
S
S
G
S
S
S
Design Current = 34A
Imax=48A
4
3
2
1
4
3
2
1
57.6A<OCP<67.2A
UGATE2 +VCC_CORE
47 UGATE2 PL4814
PHASE2 1 2
47 PHASE2
PU4806
5
6
7
8
5
6
7
8
IND-D36UH-30-GP-U
1
PR4828
PR4872 PTC4807 PTC4806 PTC4805
2D2R5J-1-GP
1
D
D
D
D
D
D
D
D
SIR460DP-T1-GE3-GP
SIR460DP-T1-GE3-GP
BOOT2 1 2 B00T2_R 1 2
47 BOOT2
GAP-CLOSE-PWR-3-GP
PC4806
ST330U2VDM-4-GP
ST330U2VDM-4-GP
ST330U2VDM-4-GP
2
2
GAP-CLOSE-PWR-3-GP
2D2R3J-2-GP SCD22U25V3KX-GP DY
1SNUBBER_1
PG4812
PG4813
1
1
PU4805
2
S
S
S
S
S
S
G
PC4833
SC330P50V2KX-3GP
4
3
2
1
4
3
2
1
2
DY
+VCC_CORE_PHASE2
2
PHASE2_R
LGATE2
47 LGATE2
C C
ISEN2 1 2
47 ISEN2 PR4871 10KR2F-2-GP
VSUM+ 1 2
47 VSUM+ PR4891 3K65R2F-1-GP
VSUM- 1 2
47 VSUM- PR4892 1R2F-GP
ISEN1 1 2
47 ISEN1 PR4870DY 10KR2F-2-GP
+PW R_SRC
PC4818 PC4817 PC4819 PC4816
5
6
7
8
5
6
7
8
1
PC4856 PC4820
D
D
D
D
D
D
D
D
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
PQ4840 PQ4841
DY
SC10U25V6KX-1GP
SCD1U25V3KX-GP
SI7686DP-T1-GP
SC4D7U25V5KX-GP
SI7686DP-T1-GP
2
DY
G
S
S
S
G
S
S
S
4
3
2
1
4
3
2
1
B UGATE1 +VCC_CORE B
47 UGATE1 PL4817
PHASE1 1 2
47 PHASE1
PU4808
IND-D36UH-30-GP-U
5
6
7
8
5
6
7
8
1
PTC4810 PTC4809 PTC4808
PR4829
2D2R5J-1-GP
1
D
D
D
D
D
D
D
D
SIR460DP-T1-GE3-GP
SIR460DP-T1-GE3-GP
GAP-CLOSE-PWR-3-GP
ST330U2VDM-4-GP
ST330U2VDM-4-GP
ST330U2VDM-4-GP
2
2
GAP-CLOSE-PWR-3-GP
DY
1SNUBBER_2
PG4815
PG4816
1
1
PU4807 2
S
S
S
S
S
S
G
PC4834
SC330P50V2KX-3GP
4
3
2
1
4
3
2
1
2
LGATE1 DY
47 LGATE1
2
LGATE1B I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
+VCC_CORE_PHASE1
47 LGATE1B
Inductor: 0.36UH PCMC104T-R36MN1R05J Cyntec 1.05mohm/ 68.R3610.20C
PHASE1_R
O/P cap: 330U 2V EEFSX0D331XE 6mOhm 3.4Arms Panasonic/79.33719.20L

H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037
ISEN1 1 2 L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037
47 ISEN1 PR4847 10KR2F-2-GP
VSUM+ 1 2
47 VSUM+ PR4887 3K65R2F-1-GP
VSUM- 1 2 <Core Design>
A 47 VSUM- A
PR4886 1R2F-GP
ISEN2 1 2
47 ISEN2 PR4846DY 10KR2F-2-GP Wistron Corporation
Title
ISL62883_CPU_CORE
A3 Berry X01
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
+PWR_SRC +1.05V_VTT_PWR_SRC
PG4902
1 2
GAP-CLOSE-PWR
PG4903
1 2
GAP-CLOSE-PWR
1
PG4904
2
TPS51218 for +1.05V_VTT +1.05V_VTT_PWR_SRC
D GAP-CLOSE-PWR D
PG4905
1 2
GAP-CLOSE-PWR +1.05VTT_PWR +1.05V_VTT +1.05VTT_PWR +1.05V_VTT
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
SC4D7U25V5KX-GP
PG4906
1 2 PG4908 PG4909
2
1 2 1 2
PC4903
PC4904
PC4902
PC4905
GAP-CLOSE-PWR
PG4907 GAP-CLOSE-PWR GAP-CLOSE-PWR
1
5
6
7
8
1 2 PG4910 PG4901
D
D
D
D
PU4902 1 2 1 2
GAP-CLOSE-PWR SI7686DP-T1-GP Design Current = 20.57A
GAP-CLOSE-PWR GAP-CLOSE-PWR
30.79A<OCP<36.39A PG4911 PG4912
1 2 1 2
G
S
S
S
9,37,42 VTT_PWRGD
PU4901 PR4901 PC4906 GAP-CLOSE-PWR GAP-CLOSE-PWR
4
3
2
1
0R3J-0-U-GP SCD1U25V3KX-GP PG4913 PG4914
PR4902 73K2R2F-GP 1 11 1 2 1 2
R4905 PGOOD GND PL4902
1 2 51218_1.05VTT_TRIP 2 10 51218_VBST_VTT 1 2 51117B_LL1_VTT 2 1
1.05V_EN TRIP VBST 51218_DRVH_VTT +1.05VTT_PWR GAP-CLOSE-PWR GAP-CLOSE-PWR
50,51 RUNPWROK 1 2 3 9
EN DRVH
1
51218_VFB 4 8 51218_SW_VTT 1 2 PG4915 PG4916

VFB SW
SC4D7U6D3V5KX-3GP
SCD1U10V2KX-4GP
PC4910
1KR2J-1-GP PC4907 51218_1.05VTT_CCM 5 7 +5V_ALW 1 2 1 2
RF V5IN
GAP-CLOSE-PWR-3-GP
PC4901
SCD022U25V2KX-GP 6 51218_DRVL_VTT PTC4902 PTC4901
2
DRVL COIL-D56UH-2-GP
1
1
5
6
7
8
PG4921
SE330U2VDM-L-GP
SE330U2VDM-L-GP
2010/04/21 PC4908 PG4917 PG4918
D
D
D
D
1
PR4903 TPS51218DSCR-GP-U1 SC1U10V2KX-1GP PU4903 1 2 1 2
2
1+1.05V_VTT_VOUT
X01 470KR2F-GP SIR164DP-T1-GE3-GP
1
2
51218_SW_GND_VTT
PR4904 PG4919 PG4920
DY2D2R5J-1-GP
2
1 2 1 2
G
S
S
S
4
3
2
1
2
1 2 PG4925 PG4927
DY VTT_SENSE 12
1 2 1 2
SC330P50V2KX-3GP
10KR2F-2-GP
PR4905
PR4912 GAP-CLOSE-PWR GAP-CLOSE-PWR
R1 10R2J-2-GP PG4926 PG4928
+3.3V_RUN 1 2 1 2
1
PC4911
DY
2
C GAP-CLOSE-PWR GAP-CLOSE-PWR C
2
+3.3V_ALW 51218_DRVL_VTT
51218_VFB
20KR2F-L-GP
1
1
1
PR4908
PR4906
PR4907 100KR2J-1-GP R2
10KR2J-3-GP
Frequency setting
PQ4901 Vout=0.704V*(R1+R2)/R2
2
470K -->290KHz
2
2
1 6
VTT_PWRGD 2 5 H_VTTPWRGD_R
+1.05V_VTT
200K -->340KHz
3 4 100K -->380KHz
1
PC4912
1
SCD1U25V3KX-GP
DY DMN66D0LDW-7-GP PR4909
39K -->430KHz
2
1KR2J-1-GP
2
H_VTTPWRGD I/P cap: 10U 25V K1206 X5R/ 78.10622.52L

H_VTTPWRGD 9
Inductor: 0.56uH PCMC104T-R56MN Cyntec DCR:1.6mohm/1.8mohm Isat=25Arms 68.R5610.10D
O/P cap: 330U 2.5V EEFSX0D331ER 9mOhm 3Arms PANASONIC/ 79.33719.L01
1
C4901
SCD1U10V2KX-4GP
L/S: SiR460DP/ POWERPAK-8/ 2.6mOhm/3.2mohm@4.5Vgs/ 84.00164.037
2
B B
A A
<Core Design>
Wistron Corporation
Title
TPS51218_+1.05V_VTT
A2
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = PWR.Plane.Regulator_1p5v0p75v
+5V_ALW S3 Power Reduction
Modify PU5002 to PTS51116
PR5006 +5V_ALW
X01
1
5D1R3J-GP
+5V_ALW +3.3V_RUN
2010/04/16
1
DY PR5016
1
PR5007 6K65R2F-GP 100KR2J-1-GP
2
1 2 51116_VDD PR5018
+5V_ALW
SC1U10V3KX-3GP
10KR2J-3-GP
D
DY D
2
+1.5V_RUN PQ5002
PC5019
1 2 1.5V_RUN_CPU_EN# G X02-20091224
. .
2
1
SC1U10V3KX-3GP
1
PC5003 PC5018 D 0D75V_EN_L 2 PR5019 1 0D75V_EN 42
.
.
.
2
3
+3.3V_ALW SC1KP50V2KX-1GP PD5001 PR5017 PQ5001 0R0402-PAD
DY DY
TPS51116_ILIM CH551H-30PT-GP 2 11.5V_RUN_CPU_EN 1 DY PMBS3904-1-GP S PR5014
DY
2
4K7R2J-2-GP 1 DY 2 x01 change tolerant 20091117
2
22,37,42,51 PM_SLP_S3#
1
PC5024 0R2J-2-GP
2
2N7002E-1-GP
2
1
X01 DY SCD1U10V2KX-5GP PC5022
16
14
15
PR5004 PU5002 84.2N702.D31 DY SCD1U10V2KX-5GP
2
20KR2J-L2-GP 2010/04/21
VDD
CS
VDDP
2
22 TPS51116_VBST1
1 2 TPS51116_VBST x01 change tolerant 20091118
1
BOOT PR5003 0R3J-0-U-GP

49,51 RUNPWROK 13
PGOOD
PR50111 2 620KR2F-GP TPS51116_NC#12 12 21 TPS51116_UGT
+5116_PWR_SRC DY TON UGATE
22,37 PM_SLP_S4# 11
S5 +1.5V_SUS_P +1.5V_SUS
X01 0D75V_EN TPS51116_PHS PG5001
42 0D75V_EN 10 S3 PHASE 20
RT: ASM 2010/04/16 1 2
TI: Non_ASM 23 +PWR_SRC +5116_PWR_SRC
+1.5V_SUS_P VLDOIN PG5002 GAP-CLOSE-PWR
1
PC5002 19 TPS51116_LGT 2 1 PG5003

SC1U10V3KX-3GP LGATE
7 1 2
+5V_ALW NC#7 GAP-CLOSE-PWR
2
PR50011 2 1M1R2J-GP PG5004 GAP-CLOSE-PWR

DY 1 18 2 1 PG5005
C +1.5V_SUS_P VTTGND PGND C
17 1 2
PR50021 TPS51116_TON NC#17
2 0R2J-2-GP 4 GAP-CLOSE-PWR
MODE TPS51116_VDDQSNS PG5006 GAP-CLOSE-PWR
8
VDDQ
2
2 1 PG5007
PC5017 24 9 51116_VDDQSET 1 2
SC1KP50V2KX-1GP DY VTT FB GAP-CLOSE-PWR
1
+0D75V_DDR_P 2 +5V_ALW PR5005 PG5008 GAP-CLOSE-PWR

VTTSNS
5 VTTREF
6 1 2 +5116_PWR_SRC 2 1 PG5009
DEM DY 1 2
GND
GND
0R2J-2-GP GAP-CLOSE-PWR
1
DY PC5020 2 1 PG5011
1TPS51116_REF
25
SC1U10V3KX-3GP 1 2
2
+V_DDR_REF
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PC5007
SCD1U50V3KX-GP
SC4D7U25V5KX-GP
GAP-CLOSE-PWR
PC5004
PC5005
PC5006
GAP-CLOSE-PWR
1
1 PR5013 2 PG5012
0R0603-PAD 1 2
5
6
7
8
Design Current = 14.45A
2
D
D
D
D
Design Current = 0.7A PU5003 GAP-CLOSE-PWR
PC5021 SI7686DP-T1-GP
22.71A<OCP< 26.84A PG5013
SCD033U16V3KX-GP 1 2
2
+0D75V_DDR_P GAP-CLOSE-PWR
G
S
S
S
PG5019
1 2
4
3
2
1
+0D75V_DDR_P +0.75V_DDR_VTT +1.5V_SUS_P
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
PC5008
PC5009
PC5010
PC5011
SCD1U10V2KX-4GP
GAP-CLOSE-PWR
PL5001
PG5014 TPS51116_UGT PG5020
1
B X01 1 2
TPS51116_VBST 1 TPS51116_PHS
1 2
B
2 1 2
2010/04/16 GAP-CLOSE-PWR GAP-CLOSE-PWR
2
PG5015 PC5012 PG5018
SC4D7U6D3V5KX-3GP
COIL-1D5UH-25-GP
SE220U2VDM-8GP
SE220U2VDM-8GP
SCD1U10V2KX-4GP
1 2 SCD1U25V3KX-GP 1 2
5
6
7
8
PC5013
PC5014
D
D
D
D
1
SIR460DP-T1-GE3-GP
PTC5001
PTC5002
GAP-CLOSE-PWR PR5008 GAP-CLOSE-PWR
DY DY
PG5016
2D2R5F-2-GP PG5017
GAP-CLOSE-PWR-3-GP
1 2
2
1
PU5001 TPS51116_PHS_SET GAP-CLOSE-PWR
S
S
S
PG5021
1
State S3 S5 VDDR VTTREF VTT 1 2
4
3
2
1
PC5015
S0 Hi Hi On On On SC330P50V2KX-3GP X01 GAP-CLOSE-PWR
DY
2
TPS51116_LGT
S3 Lo Hi On On Off(Hi-Z) 2010/04/16
TPS51116_VDDQSNS
1
S4/S5 Lo Lo Off Off Off
1
PR5009 DY PC5016
30KR2F-GP SC18P50V2JN-1-GP
2
2
51116_VDDQSET
1
VDDQSET VDDQ (V) VTTREF and VTT NOTE
PR5010
GND 2.5 VVDDQSNS/2 DDR 30KR2F-GP
A <Core Design> A
2
Close to VFB Pin (pin5)
V5IN 1.8 VVDDQSNS/2 DDR2
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Wistron Corporation
Inductor: 1.5uH PCMC104T-1R5 Cyntec DCR:3.8mohm Isat=33Arms 68.1R510.10J 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
FB Resistors Adjustable VVDDQSNS/2 1.5 V < VVDDQ < 3 V
O/P cap: 220U 2V EEFCX0D221ER 15mOhm 2.7Arms PANASONIC/ 79.22719.20L Taipei Hsien 221, Taiwan, R.O.C.
Title
L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037
Switching freq-->400KHz TPS51116_+1.5V_SUS
Custom
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = PWR.Plane.Regulator_1p8v
D APL5930 for +1.8V_RUN D
+1.8V_RUN_P +1.8V_RUN
+3.3V_ALW +1.8V_RUN_VIN
PG5104
PG5102 1 2
2 1
GAP-CLOSE-PW R
GAP-CLOSE-PW R PG5105
PG5103 1 2
2 1
GAP-CLOSE-PW R
GAP-CLOSE-PW R +1.8V_RUN_VIN
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1
1
PC5103
PC5104
+5V_ALW
DY
SC1U10V3KX-3GP
C C
2
1
PC5102
Design Current =1.23A
2
PU5102
49,50 RUNPW ROK +1.8V_RUN_P

5
VIN#5
6 VCNTL VOUT#4 4
SC22U6D3V5MX-2GP
7 POK VOUT#3 3
SC68P50V2JN-1GP
PC5106
PC5107
SC22U6D3V5MX-2GP
22,37,42,50 PM_SLP_S3# 1 2 1D8V_RUN_EN 8 2
EN FB
1
16K5R2F-2-GP
PR5104
PC5108
PR5102 0R0402-PAD 9 1
VIN#9 GND
DY
2010/04/19
2
1
5912_1.8V_RUN_FB
X01 PR5108 APL5930KAI-TRG-GP
DY
2
47KR2J-2-GP
2
SC4700P50V2KX-1GP
1
PC5105
Vout=0.8V*(R1+R2)/R2
1
DY
2
PR5105
13K3R2F-L1-GP
B B
A <Core Design> A
Wistron Corporation
Title
APL5930_+1.8V_RUN
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = CPU.GFX.Regulator
+PWR_SRC +VGFXCORE_PWR_SRC
PG5301
1 2
GAP-CLOSE-PWR
+3.3V_ALW PG5303
1 2
1 2
13 GFX_VR_EN PR5310 0R0402-PAD GAP-CLOSE-PWR
D PG5305 D
2010/04/21 51611_VREFF
1 2
X01 GAP-CLOSE-PWR
51611_VREFF PG5308
PR5311 1 2
51611_VREFF 1 2 GAP-CLOSE-PWR
90K9R2F-GP PG5311
1 2
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R2J-2-GP
0R2J-2-GP
6263AGND +3.3V_RUN GAP-CLOSE-PWR
0R2J-2-GP
1 2
51611_VREFF PC5313 SC2D2U10V3KX-1GP +3.3V_RUN
2
1 2 PC5314
SC68P50V2JN-1GP 2010/04/21
DY DY DY X01
PR5301 10KR2F-2-GP
2010/04/19 1 2
1
PR5313
PR5314
PR5315
PR5316
PR5317
PR5318
PR5312 1K87R2F-GP
1
X01 PR5319
1K91R2F-1-GP
DY
51611_TRIPSEL
51611_OSRSEL
51611_TONSEL
51611_DROOP
51611_VR_ON
1
51611_VREFF
51611_V5FILT
+VGFXCORE_PWR_SRC
51611_ISLEW
2
PC5315
SCD22U10V2KX-1GP
2
1
51611_CLKEN
PC5302 PC5303
DY PC5304
51611_PGOOD
33
32
31
30
29
28
27
26
25
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PU5301 SCD1U25V2KX-GP
2
5
6
7
8
VREF
V5FILT
GND
VR_ON
OSRSEL
TONSEL
TRIPSEL
DROOP
ISLEW
D
D
D
D
+5V_ALW Design Current =17.6A
PU5302
1 24 SI7686DP-T1-GP 27.2<OCP<32.15A
GND CLKEN#
51611_CSP 2 23
CSP PGOOD
G
S
S
S
51611_CSN 3 22 PC5301
4
3
2
1
CSN MODE +CPU_GFX_CORE
51611_GSNS 4 21 1 2
C
Close to VGA GNDSNS V5IN
C
PL5301
51611_VSNS SC2D2U10V3KX-1GP
5
VSNS TPS51611RHBR-GP DRVL
20
DY
1 DY 2 51611_THERM_R 1 2 51611_THERM 6 19 51611_PHASE 1 2
PR5320 11K8R2F-GP PR5321 NTC-100K-10-GP THERM LL 2D2R3J-2-GP PC5316
PC5319
SC22U6D3V5MX-2GP
PC5312
SC22U6D3V5MX-2GP
PC5311
SC22U6D3V5MX-2GP
PTC5302
SE330U2VDM-L-GP
51611_VR_TT 51611_BOOT 2 6236A_BOOT_C PR5324
2D2R3J-2-GP
1 2 7 18 1 1 2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
9 PM_EXTTS#0_C VR_TT# VBST COIL-D56UH-2-GP
PR5322 DY 0R2J-2-GP PR5323 SCD22U16V3KX-2-GP PTC5301
1
13 GFX_IMON 51611_UGATE PG5323
8
IMON DRVH
17 DY
1
DPRSLP
PG5322 SE330U2VDM-L-GP
VID6
VID5
VID4
VID3
VID2
VID1
VID0
2
2
5
6
7
8
PU5303
51611_RF
2
D
D
D
D
1
PR5325 PC5317 74.51611.073

9
10
11
12
13
14
15
16
SIR164DP-T1-GE3-GP
SC470P50V2KX-3GP
18K7R2F-GP
2010/04/19
2
SC3300P50V2KX-1GP
1
1
DY PC5318 X01
G
S
S
S
4
3
2
1
2
13 GFX_DPRSLPVR GFX_DPRSLPVR
13 GFX_VID6
13 GFX_VID5 51611_LGATE
13 GFX_VID4
13 GFX_VID3
13 GFX_VID2
13 GFX_VID1
13 GFX_VID0
Close to choke (L5301)

PR5327 PR5328
51611_CSP 1 2 51611_CSP_R 1 2 51611_CSP_G
B 24K3R2F-1-GP B
330R2F-GP
2
1
PR5326
PC5320 NTC-100K-10-GP
SC33P50V2JN-3GP
2
1
PC5321 PC5326
1
SCD015U50V3KX-GP
PR5330
SCD01U50V3KX-4DLGP
2010/04/19 51611_CSP_CSN 86K6R2F-GP
2
2
X01
1
2
PC5322 PR5331
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L SC33P50V2JN-3GP 29K4R2F-GP
2
I0.56uH PCMC104T-R56MN Cyntec DCR:1.6mohm/1.8mohm Isat=25Arms 68.R5610.10D
2
O/P cap: 330U 2.5V EEFSX0D331ER 9mOhm 3Arms PANASONIC/ 79.33719.L01
H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037 PR5332
L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037 51611_CSN 1 2 51611_CSN_R
330R2F-GP
PC5323
2 1
51611_GSNS SC33P50V2JN-3GP
1
PC5324
1 2 SC33P50V2JN-3GP
PR5333 0R0402-PAD +CPU_GFX_CORE
2
2010/04/21 51611_VSNS
2
6263AGND X01 PR5334 PC5325

100R2F-L1-GP-U 1 2
PG5324
1
SC33P50V2JN-3GP
1 2
13 VCC_AXG_SENSE
A GAP-CLOSE-PWR-3-GP A
PG5325
1 2
13 VSS_AXG_SENSE
GAP-CLOSE-PWR-3-GP
<Core Design>
2
PR5335
100R2F-L1-GP-U
Wistron Corporation
1
Title
TPS51611_+GFX_CORE
A2
Arsenal DJ1 UMA X01
5 4 3 2 1
www.vinafix.vn
SSID = VIDEO SSID = Inverter
INVERTER POWER
LVDS CONNECTOR GFX_PW R_SRC +PW R_SRC
+LCDVDD
LCD1 GFX_PW R_SRC +3.3V_RUN F5401
SC10U6D3V5KX-1GP
49 1 2
SCD1U10V2KX-4GP
C5411
1
2
C5408
47 51 POLYSW -1D1A24V-GP-U
DY R5401 C5402 C5403
40
39
DY 10KR2J-3-GP SC1KP50V2KX-1GP SCD1U50V3KX-GP
1
38
37
2
36 1 2 PCH_LBKLT_CTL 20 LCD_BRIGHTNESS
35 R5415 100R2J-2-GP
46 34 LCD_TST
33
SC33P50V2JN-3GP
SC33P50V2JN-3GP
+3.3V_RUN
32 LCD_BRIGHTNESS
1
LCD_CBL_DET#_C
EC5405
EC5406
31
2
BLON_OUT_C
30
29 LCD_TST_C R5407 DY DY
2
28 100KR2J-1-GP
45 27 LDDC_CLK_PCH LDDC_CLK_PCH 20
DY
26 LDDC_DATA_PCH LDDC_DATA_PCH 20
1
2
25 LCD_DET_G
24 R5404
23 PCH_LVDSA_TX0# PCH_LVDSA_TX0# 20 100KR2J-1-GP For EMI request
22 PCH_LVDSA_TX0 PCH_LVDSA_TX0 20
21
1
44 20 PCH_LVDSA_TX1# PCH_LVDSA_TX1# 20
18
17 PCH_LVDSA_TX2# PCH_LVDSA_TX2# 20 USB_PN11 21
15
14 PCH_LVDSA_TXC# PCH_LVDSA_TXC# 20
3
43 13 PCH_LVDSA_TXC PCH_LVDSA_TXC 20
12
11 USB_CAMERA-
10 USB_CAMERA+
9
8 +3.3V_CAMERA DLW 21HN900SQ2LGP-U
7
42 6 TR5401
5 SSID = VIDEO
2
4
3
2 USB_PP11 21 +3.3V_RUN
1 LCD_CBL_DET#_C 1 2 LCD_CBL_DET# 37
LCD POWER +LCDVDD
41 50 LCD_TST_C R5417 1 2100R2J-2-GP LCD_TST 37
BLON_OUT_CR5412 1 2100R2J-2-GP BLON_OUT 37 Q5401
48 LCD_DET_G R5416 1 2100R2J-2-GP 1 D D 6
R5410 100R2J-2-GP 2 D D 5
IPEX-CONN40-2R-GP-U 3 G S 4
+15V_ALW 1 2 SI3456DDV-T1-GE3-GP
R5413 330KR2J-L1-GP
1
FPVCC_CTL1
1 2
C5409 SCD1U25V2KX-GP R5418
20.F1093.040 150R3J-L-GP
2 DY 100KR2J-1-GP
1
Q5402
2
R5406
4 3 LCDVDD_1
Camera Power 5 2
+3.3V_RUN +3.3V_CAMERA 6 1
R5411
1 2 DMN66D0LDW -7-GP
0R0603-PAD-1-GP
20 PCH_LCDVDD_EN
1
EC5403 C5407
SCD1U16V2KX-3GP DY SC10U6D3V5MX-3GP
+5V_ALW
R5419
1 2
100KR2J-1-GP
2
1
Q5403
3 FPVCC_CTL3
D5401 3 LCDVCC_EN 1 R1
2
BAT54C-U-GP R2
PDTC144EU-1-GP
2
37 LCD_TST_EN
<Core Design>
Wistron Corporation
Title
LCD/Inverter Connector
A3
www.vinafix.vn
5 4 3 2 1
+5V_CRT_RUN
+3.3V_RUN
2
1
SSID = VIDEO Q5501
RN5501
SRN2K2J-1-GP
4 3 DDC_DATA_CON
20 PCH_CRT_DDCDATA
3
4
5 2
DDC_DATA_CON CRT1
6 1
D DDC_CLK_CON D
16
DMN66D0LDW-7-GP
6
1
1
CRT_R 1 11
C5514 C5513
20 PCH_CRT_DDCCLK DDC_CLK_CON SC22P50V2JN-4GP DY DY
SC22P50V2JN-4GP
Layout Note: 7
2
2
CRT_G 2 12 DDC_DATA_CON
8
CRT_B 3 13 JVGA_HS
*Pi-filter & 150 Ohm pull-down +5V_CRT_RUN 9
4 14 JVGA_VS
resistors should be as close 10
5 15 DDC_CLK_CON
as to CRT CONN.
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1
1
* RGB signal will hit 75 Ohm 17
C5515
C5516
first, then pi-filter, finally AFTP5502 1 VIDEO-15-127-GP-U DY DY
2
CRT CONN.
20.20401.015
20 PCH_CRT_RED L5501 1 2 BLM15BB220SS1D-GP CRT_R
L5502 1 2 BLM15BB220SS1D-GP CRT_G

20 PCH_CRT_GREEN
AFTP5501 1 +5V_CRT_RUN
AFTP5508 1 DDC_DATA_CON
C AFTP5503 1 DDC_CLK_CON C
20 PCH_CRT_BLUE L5503 1 2 BLM15BB220SS1D-GP CRT_B AFTP5506 1 CRT_R
AFTP5507 CRT_G
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
1
CRT_B
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
AFTP5504 1
2
1
C5504
C5505
C5506
C5507
C5508
C5509
R5501
R5502
R5503
TP5505 1 JVGA_HS
DY DY DY TP5509 1 JVGA_VS
2
2
1
+5V_RUN
R5504
D5501
2 2 1
CRT_R 3
DY +5V_CRT_RUN +5V_CRT_RUN_R 0R3J-0-U-GP +5V_RUN
+5V_CRT_RUN 1 D5502
F5501
BAV99PT-GP-U 2 1 1 2
DY
1
FUSE-1D1A6V-4GP-U
C5512 D5503 CH551H-30PT-GP
DY
1
SCD1U16V2KX-3GP
Hsync & Vsync level shift 2
69.50007.691
2
C5511
CRT_G 3 SCD01U16V2KX-3GP
DY
2
B B
1
14
U5501A BAV99PT-GP-U
2 3 HSYNC_5
20 PCH_CRT_HSYNC DY D5504
2 +5V_CRT_RUN
TSAHCT125PW-GP
14
7
4
U5501B RN5502 CRT_B 3

JVGA_HS DY
14
10
4 1
5 6 VSYNC_5 3
DY 2 JVGA_VS 1
20 PCH_CRT_VSYNC DY
BAV99PT-GP-U 9 8
TSAHCT125PW-GP SRN33J-5-GP-U DY
7
U5501C
7
TSAHCT125PW-GP
RN5504
1 4
2 3 +5V_CRT_RUN
SRN100J-3-GP
14
13
A A
12 11
DY <Core Design>
U5501D
Wistron Corporation
7
TSAHCT125PW-GP
Title
CRT Connector
5 4 3 2 1
CLOSE TO
TRANSFORMER
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
HDMI
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = User.Interface
ITP Connector
H_CPURST# use pull-up Resistor close
D D
ITP connector 500 mil ( max ),
others place near CPU side.
CPU ITP Connector

TCK(PIN 5)
TCK(PIN AC5)
FBO(PIN 11)
C C
SSID = Thermal
Fan Connector
B B
3 1
*Layout* 15 mil FAN1
5
39 EMC2102_FAN_TACH EMC2102_FAN_TACH 3
AFTP5801 1 2
39 EMC2102_FAN_DRIVE EMC2102_FAN_DRIVE 1
4
AFTP5802 1 EMC2102_FAN_TACH
FOX-CON3-6-GP-U AFTP5803 EMC2102_FAN_DRIVE
1
20.D0210.103
K
20.F1293.003
1
C5801 D5801
SC10U6D3V5MX-3GP RB551V30-GP
2
A <Core Design> A
Wistron Corporation
Title

ITP/Fan Connector Rev
A3
5 4 3 2 1
www.vinafix.vn
SSID = SATA
SATA HDD Connector
HDD1
+3.3V_RUN P1 V33 23 23
P2 V33 24 24
P3
V33
NP1
NP1
+5V_RUN P7 V5 NP2 NP2
P8
V5
1
P9
C5902 C5906 V5
1
SC10U6D3V5MX-3GP SCD1U16V2KX-3GP
DY DY P13 S1
2
C5903 C5901 V12 GND
P14 S4
SC10U6D3V5MX-3GP SCD1U16V2KX-3GP V12 GND
P15 S7
2
V12 GND
P4
GND
GND P5
24 SATA_TXP0 S2 P6
A+ GND
24 SATA_TXN0 S3 A- GND P10
P12
SCD01U16V2KX-3GP GND
24 SATA_RXP0_C 1 2 C5905 SATA_RXP0 S6 B+
24 SATA_RXN0_C SCD01U16V2KX-3GP 1 2 C5904 SATA_RXN0 S5 P11
B- DAS/DSS
SKT-SATA7P-15P-23-GP
22.10300.961
ODD Connector
ODD1
8
NP1
S1
S2 SATA_TXP1 24
S3 SATA_TXN1 24 SATA_RX- and SATA_RX+ Trace
S4
S5 SATA_RX1-_C SCD01U16V2KX-3GP 1 2 C5907 SATA_RXN1_C 24
Length match within 20 mil
S6 SATA_RX1+_C SCD01U16V2KX-3GP 1 2 C5908 SATA_RXP1_C 24
S7
+5V_RUN
P1
P2
P3
1
P4 C5910
P5 C5909 SC10U10V5KX-2GP
P6 SCD1U10V2KX-5GP
2
NP2
9
SKT-SATA7P-6P-4-GP
22.10300.811
22.10300.421 <Core Design>
22.10300.471 Wistron Corporation

Title

HDD/ODD Rev
A3
www.vinafix.vn
5 4 3 2 1
SSID = AUDIO
Speaker LINE1 OUT
Connector
D
20.F0711.004 D
5
SPK1
BLM18BD601SN1D-GP
1 AUD_HP1_JD#
30 AUD_SPK_L- 30 AUD_HP1_JD# LINEOUT1
L6001
2 AUD_HP1_JACK_L2 1 2 AUD_HP1_JACK_L1 6
30 AUD_SPK_L+ 30 AUD_HP1_JACK_L2
30 AUD_SPK_R- 3 5
4 AUD_HP1_JACK_R2 1 2 AUD_HP1_JACK_R1 2
30 AUD_SPK_R+ 30 AUD_HP1_JACK_R2
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
L6002
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
BLM18BD601SN1D-GP 4
1
EC6005
EC6006
FOX-CON4-19-GP 1
6
1
1
EC6001
EC6002
EC6003
EC6004
3
EC6010 EC6011 7
20.F0693.004
2
SC1KP50V2KX-1GP SC1KP50V2KX-1GP 8
2
2
PHONE-JK383-GP
1
AFTP6013 600ohm 100MHz
1 AUD_SPK_L- 1 AUD_HP1_JD#
AFTP6002 1 AUD_SPK_L+ AFTP6010 200mA 0.5ohm DC AFTP6009 1
AFTP6003 1 AUD_SPK_R- 1 AUD_HP1_JACK_L1
AFTP6004 1 AUD_SPK_R+ AFTP6011
C
AFTP6005
AFTP6012
1 AUD_HP1_JACK_R1 22.10133.K31 C
MIC
30 AUD_VREFOUT_B
IN SC1U10V3KX-3GP
Internal
Microphone
2
1
C6001
RN6001
SRN4K7J-8-GP
2
MIC1
MICIN1 MICROPHONE-40-GP-U1
3
4
PHONE-JK383-GP 1
30 INT_MIC_L_R
8
2
1
2010/04/21 7
EC6007
3
X01 1 SC1KP50V2KX-1GP
2
B AUD_EXT_MIC_L C6002 B
30 AUD_EXT_MIC_L 2 1 SC1U10V3KX-3GP MIC_IN_L_2 1 2 MIC_IN_L_C 4
R6009 0R3J-0-U-GP
2
5
AUD_EXT_MIC_R C6003 2 1 SC1U10V3KX-3GP MIC_IN_R_2 1 2 MIC_IN_R_C 6
30 AUD_EXT_MIC_R R6010 0R3J-0-U-GP
30 EXT_MIC_JD#
SC100P50V2JN-3GP
SC100P50V2JN-3GP
EC6008
EC6009
1
22.10133.K31
2
1 AFTP6001
1 MIC_IN_L_C
AFTP6006
1 MIC_IN_R_C
AFTP6007
1 EXT_MIC_JD#
AFTP6008
A <Core Design> A
Wistron Corporation
Title
Audio Jack
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = Flash.ROM SPI FLASH ROM (32M bits) for PCH

+3.3V_RUN
+3.3V_RUN
1
C6203
DY
2
1
D C6201 SCD1U10V2KX-5GP D
RN6201 SC10U6D3V5MX-3GP
2
R6202 SRN4K7J-8-GP
4K7R2J-2-GP
3
4
PCH_SPI_HOLD_0#
U6201 +3.3V_RUN
24 PCH_SPI_CS0# PCH_SPI_CS0# 1 8
PCH_SPI_DI_R CS# VCC PCH_SPI_HOLD_0#
24 PCH_SPI_DI 1 2 2 7
PCH_SPI_W P# SO NC#7
3 WP# SCK 6 PCH_SPI_CLK 24
R6201 4 5 PCH_SPI_DO 24
15R2J-GP GND SI
1
DY
1
EC6203 MX25L3205DM2I-12G-GP
SC4D7P50V2CN-1GP EC6201 DY DY EC6202
2
SC4D7P50V2CN-1GP SC4D7P50V2CN-1GP
2
C C
+KBC_PW R
+KBC_PW R
SPI FLASH ROM (2M bits) for KBC
1
C6206
3
4
C6204 SCD1U10V2KX-5GP
R6203 RN6202 SC10U6D3V5MX-3GP
DY DY
2
100KR2J-1-GP SRN100KJ-6-GP
2
1
EC_SPI_HOLD#
U6202 +KBC_PW R
37 EC_SPI_CS# EC_SPI_CS# 1 8
R6204 EC_SPI_DI_R CS# VCC EC_SPI_HOLD#
37 EC_SPI_DI 1 2 0R2J-2-GP 2 SO HOLD# 7
37 EC_SPI_W P#_R R6205 1 2 0R2J-2-GP EC_SPI_W P# 3 6 EC_SPI_CLK 37
WP# SCLK EC_SPI_DO_R
4 5 1 2 EC_SPI_DO 37
GND SI
1
R6206 33R2J-2-GP
1
EC6204 R6209 MX25L2005C-12G-GP
B SC4D7P50V2CN-1GP DY 100KR2J-1-GP R6210 EC6205 DY DY EC6206 B
2
10KR2J-3-GP SC4D7P50V2CN-1GP SC4D7P50V2CN-1GP
2
1
SSID = RBATT
RTC Connector
+3.3V_RTC_LDO
U6203
+RTC_CELL
R6207 2
0R0402-PAD +RTC_VCC
1 2 RTC_PW R_L 3 RTC1
A R6208 <Core Design> A
1 RTC_PW R 1 2 1 PWR
1
TP6201 1 2
C6207 1KR2J-1-GP GND
NP1
SC1U10V3KX-3GP SDMG0340LC7F-GP-U NP2
NP1 Wistron Corporation
2
NP2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Width=20mils BAT-CON2-1-GP-U
Title
62.70001.011 Size Document Number

Flash/RTC Rev
TP6202 1 +RTC_VCC
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = USB USB POWER SW

Main UP7534BRA8-15 P/N:74.07534.079
IO Board USB Power SEC AP2101MPG-13 P/N: 74.02101.079
+5V_ALW +5V_USB1
U6302
at least 80 mil
D at least 80 mil 1 GND VOUT#8 8 D
2 7
SCD1U10V2KX-4GP
VIN VOUT#7
3 VIN VOUT#6 6
1
4 5
1
37 USB_PW R_EN# EN# OC#
C6306
C6304
DY SC1U10V3KX-3GP
2
UP7534BRA8-15-GP
2
USB_OC#0_1 21
C
Right USB Power C
+5V_ALW +5V_USB2
U6301 AFTP6304 1 +5V_USB2
at least 80 mil AFTP6302 1 USB_P2-
at least 80 mil 1 8 AFTP6301 1 USB_P2+
GND VOUT#8 AFTP6306 USB_P3-
2 7 1
SC1U10V3KX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-5GP
ST100U6D3VBM-7GP
VIN VOUT#7
TC6301
3 6 AFTP6305 1 USB_P3+
100KR2J-1-GP
VIN VOUT#6
1
R6301
C6301
C6302
4 5
1
37 USB_PW R_EN# EN# OC#

C6303
DY DY
2
UP7534BRA8-15-GP
2
2
USB_OC#2_3 21
USB1
5 7
+5V_USB2 1
USB_P2- 2
USB_PP2 USB_P2+ USB_P2+ 3
21 USB_PP2
4
+5V_USB2 6 8
1
TR6301 D6301 SKT-USB8-29-GP

DLW 21HN900SQ2LGP-U 1 4
B B
DY
4
USB_P2+ 2 3 USB_P2-
USB_PN2 USB_P2-
21 USB_PN2
PRTR5V0U2X-GP
USB3
5 7
+5V_USB2 1
USB_P3- 2
USB_P3+ 3
4
+5V_USB2 6 8
21 USB_PP3 USB_PP3 USB_P3+ D6302 SKT-USB8-29-GP

1 4
1
TR6302
DLW 21HN900SQ2LGP-U
DY
USB_P3+ 2 3 USB_P3- 22.10254.451

A PRTR5V0U2X-GP <Core Design> A
4
USB_PN3 USB_P3-
21 USB_PN3
Wistron Corporation
Title
USB
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = User.Interface Battery LED +5V_ALW
POWER LED
LED-OW -3-GP White
D D
Q6601 R6601
C LED_PW R# 1 2 PW R_LED_B 3
B R1
37 W HITE_LED_KBC
E 330R2J-3-GP 1 83.00326.G70
1
R2
PDTC124EU-1-GP
DY EC6601 2 83.01222.K70
SC220P50V2KX-3GP
2
Amber
LED1
BATT LED
Q6602 R6602
C LED_BAT# 1 2 BAT_LED_B
B R1
37 AMBER_LED_KBC 330R2J-3-GP
E
1
R2
PDTC124EU-1-GP EC6602
DY SC220P50V2KX-3GP
2
C C
B B
HDD LED BREATHE PWR LED (Front)
+5V_RUN
White
PDTA144VT-GP
+5V_ALW
R2 White PDTA144VT-GP
R6608 E R6604 LED2
3
R2
1 2 SATA_LED#_R B R6609 E
24 SATA_LED# LED3
3
R1
C HDD_LED_R 2 1 HDD_LED 1A K2 1 2 PW RLED#_R B
0R2J-2-GP 37 PW RLED# R1
BREATHE_LED#_R 2 POW ER_SW _LED_FRONT 1 A K2
C 1
Q6604 LED-W -27-GP 0R2J-2-GP R6605 330R2J-3-GP
330R2J-3-GP
83.01221.R70 Q6605 LED-W -27-GP
84.00144.P11 84.00144.P11 83.01221.R70
A <Core Design> A
Wistron Corporation
Title

LED Rev
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = KBC SSID = Touch.Pad
D
Internal KeyBoard Connector TouchPad Connector D
+5V_RUN
KB1 1
31 AFTP6831
1
KB_DET# 37
1
2 KROW 7 1 C6802
3 KROW 6 1 AFTP6827 +5V_RUN SCD1U10V2KX-5GP
4 KROW 4 1 AFTP6825
2
5 KROW 2 1 AFTP6824
6 KROW 5 1 AFTP6822
7 KROW 1 1 AFTP6823
2
1
8 KROW 3 1 AFTP6820
9 KROW 0 1 AFTP6821 RN6801
10 KCOL5 1 AFTP6819 SRN10KJ-5-GP
11 KCOL4 1 AFTP6817
12 KCOL7 1 AFTP6818 KROW [0..7] 37 TP1
13 KCOL6 1 AFTP6816 5
3
4
14 KCOL8 1 AFTP6814
15 KCOL3 1 AFTP6812 KCOL[0..16] 37 1
16 KCOL1 1 AFTP6813
17 KCOL2 1 AFTP6815 37 TPCLK 2
18 KCOL0 1 AFTP6810 37 TPDATA 3
19 KCOL12 1 AFTP6808 1 4
C 20 KCOL16 1 AFTP6809 AFTP6811 C
1
1
21 KCOL15 1 AFTP6806 6
KCOL13 AFTP6807 C6803
22
23 KCOL14
1
1 AFTP6804 SC33P50V2JN-3GP DYDYC6804
SC33P50V2JN-3GP ACES-CON4-10-GP-U
2
2
24 KCOL9 1 AFTP6805
25 KCOL11 1 AFTP6803
26 KCOL10 1 AFTP6801
27 AFTP6802
28 20.K0320.004
29
30 1 20.K0382.004
32 AFTP6829
1 +5V_RUN
HRS-CON30-1-GP-U AFTP6826 1 TPCLK
AFTP6828 1 TPDATA
AFTP6830
Main 20.K0259.030
20.K0461.030
20.K0421.030
B B
A <Core Design> A
Wistron Corporation
Title
Key Board/Touch Pad

A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
+3.3V_ALW
D D
1
+3.3V_ALW C6903
SCD1U10V2KX-5GP
2
HSC1
1
DY R6901
100KR2J-1-GP 2
R6902 VDD
VSS 1
0R0402-PAD 3
2
LID_CLOSE# LID_CLOSE#_1 OUT
37 LID_CLOSE# 2 1
1
C6902 S-5711ACDL-M3T1S-GP
DY SCD047U16V2KX-1-GP
C C
B B
A <Core Design> A
Wistron Corporation
Title
Hall Sensor
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
+3.3V_RUN
GF1
1
2 LPC_LAD0
LPC_LAD0 24,37
3 LPC_LAD1
LPC_LAD1 24,37
4 LPC_LAD2
LPC_LAD2 24,37
5 LPC_LAD3
LPC_LAD3 24,37
LPC_LFRAME#
DY 6
7
LPC_LFRAME# 24,37
PLT_RST# 9,21,37,76
8
9 PCLK_FW H 21
10
11
12
MLX-CON10-7-GP
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = SDIO SD/XD/MS Card Reader
D D
+3.3V_RUN_CARD
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U10V2KX-5GP
SC2D2U10V3KX-1GP
1
1
C7101
C7102
C7103
C7104
C7105
DY DY DY
2
C C
+3.3V_RUN_CARD CARD1
23 25 XD_CLE/SD_D0/MS_D7 1 TP7102
SD_VCC SD_DAT0 XD_CE#/SD_D1 TP7103
14 MS_VCC SD_DAT1 29 1
TP7101 1 33 10 XD_D5/SD_D2/MS_D5 1 TP7104
XD_VCC SD_DAT2 XD_D4/SD_D3/MS_D1 TP7105
SD_DAT3 11 1
32 XD_D0/SD_CLK/MS_D2 XD_D0/SD_CLK/MS_D2 8 12 XD_D2/SD_CMD XD_D2/SD_CMD 32

XD_D1/SD_D5/MS_D0 XD_D0 SD_CMD XD_D0/SD_CLK/MS_D2
32 XD_D1/SD_D5/MS_D0 9 XD_D1 SD_CLK 24 XD_D0/SD_CLK/MS_D2 32
32 XD_D2/SD_CMD XD_D2/SD_CMD 26 36 XD_W E#/SD_CD# XD_W E#/SD_CD# 32
XD_D3/SD_D4/MS_D4 XD_D2 SD_CD_SW XD_RDY/SD_W P/MS_CLK
32 XD_D3/SD_D4/MS_D4 27 XD_D3 SD_WP_SW 35 XD_RDY/SD_W P/MS_CLK 32
32 XD_D4/SD_D3/MS_D1 XD_D4/SD_D3/MS_D1 28
XD_D5/SD_D2/MS_D5 XD_D4
32 XD_D5/SD_D2/MS_D5 30 XD_D5
32 XD_D6/MS_BS XD_D6/MS_BS 31 19 XD_D1/SD_D5/MS_D0
XD_D7 XD_D6 MS_DATA0 XD_D4/SD_D3/MS_D1
32 XD_D7 32 20 XD_D4/SD_D3/MS_D1 32
XD_D7 MS_DATA1 XD_D0/SD_CLK/MS_D2 TP7107
MS_DATA2 18 1
32 XD_RDY/SD_W P/MS_CLK XD_RDY/SD_W P/MS_CLK 1 16 XD_ALE/SD_D7/MS_D3 1 TP7108
XD_RE#/MS_INS# XD_R/B MS_DATA3
32 XD_RE#/MS_INS# 2
XD_CE#/SD_D1 XD_RE XD_D6/MS_BS TP7109
32 XD_CE#/SD_D1 3 21 1
XD_CLE/SD_D0/MS_D7 XD_CE MS_BS XD_RE#/MS_INS#
32 XD_CLE/SD_D0/MS_D7 4 XD_CLE MS_INS 17 XD_RE#/MS_INS# 32
32 XD_ALE/SD_D7/MS_D3 XD_ALE/SD_D7/MS_D3 5 15 XD_RDY/SD_W P/MS_CLK XD_RDY/SD_W P/MS_CLK 32
XD_W E#/SD_CD# XD_ALE MS_SCLK
32 XD_W E#/SD_CD# 6 XD_WE
32 XD_W P/SD_D6/MS_D6 XD_W P/SD_D6/MS_D6 7
XD_CD# XD_WP
32 XD_CD# 34 13
XD_CD_SW 4IN1_GND
4IN1_GND 22
NP1 NP1 4IN1_GND 38
NP2 37 1 TP7110
B NP2 4IN1_GND B
CARDBUS36P-1-GP
20.I0109.001
20.I0081.011
XD_CLE/SD_D0/MS_D7
XD_CE#/SD_D1
XD_D5/SD_D2/MS_D5
XD_D4/SD_D3/MS_D1
XD_D2/SD_CMD
XD_D0/SD_CLK/MS_D2
XD_W E#/SD_CD# TP7111 1 XD_D1/SD_D5/MS_D0
XD_RDY/SD_W P/MS_CLK TP7112 XD_D2/SD_CMD
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
A 1 <Core Design> A
TP7113 1 XD_D3/SD_D4/MS_D4
1
TP7114 XD_D7
EC7101
EC7102
EC7103
EC7104
EC7105
EC7106
EC7107
EC7108
1
TP7115 1 XD_RDY/SD_W P/MS_CLK
DY DY DY DY DY DY DY DY TP7116 1 XD_RE#/MS_INS# Wistron Corporation
2
TP7117 1 XD_W E#/SD_CD# 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
TP7118 1 XD_W P/SD_D6/MS_D6 Taipei Hsien 221, Taiwan, R.O.C.
TP7119 1 XD_CD#
For EMI Title
TP7121 1 XD_D2/SD_CMD
CARD Reader CONN
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
RESERVED
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = User.Interface
D D
Bluetooth Module conn.

BT1
15
NP1
AFTP7319 1 BLUETOOTH_DET# 1 2 BT_ACT +3.3V_RUN
W LAN_ACT 3 4
AFTP7311 1 BDC_ON 5 6 USB_PP9
SC2D2U10V3KX-1GP
BLUETOOTH_EN 7 8 USB_PN9
AFTP7308 1 BT_LED 9 10
1
BLUETOOTH_GPIO3
C7303
C AFTP7318 1 11 12 C
AFTP7316 1 BLUETOOTH_GPIO5 13 14
NP2
2
16
1 AFTP7313
HRS-CONN14D-GP-U
20.F0987.014
AFTP7314 1 W LAN_ACT
21 USB_PP9 USB_PP9 AFTP7309 1 BLUETOOTH_EN
21 USB_PN9 USB_PN9 AFTP7315 1 BT_ACT
76 BT_ACT BT_ACT AFTP7312 1 +3.3V_RUN
37,76 BLUETOOTH_EN BLUETOOTH_EN AFTP7310 1 USB_PP9
76 W LAN_ACT W LAN_ACT AFTP7317 1 USB_PN9
SC220P50V2KX-3GP
10KR2J-3-GP
100KR2J-1-GP
1
1
1
R7305
EC7306
R7304
DY DY
2
2
2
B B
A <Core Design> A
Wistron Corporation
Title
Bluetooth
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = PWR.Support
NP2
65
D D
+PW R_SRC
+PW R_SRC 64 66
31 30
32 29
33 28
BATT SMBUS 37 BAT_SDA 34 27
37 BAT_SCL 35 26
WLAN SMBUS 7,18,19,23 PCH_SMBDATA 36 25
7,18,19,23 PCH_SMBCLK 37 24 +5V_ALW
CLK_PCIE_MINI1# 38 23 +KBC_PW R
23 CLK_PCIE_MINI1# CLK_PCIE_MINI1
WLAN CLK 23 CLK_PCIE_MINI1 39 22 +3.3V_ALW
40 21 E51_RXD 37
23 PCIE_RXN2 PCIE_RXN2 41 20 E51_TXD 37
PCIE_RXP2 42 19
WLAN PCIE 23 PCIE_RXP2
43 18
BAT_IN# 37
AC_IN# 37
PCIE_TXN2 44 17 PSID_DISABLE# 37
23 PCIE_TXN2 PCIE_TXP2
WLAN PCIE 23 PCIE_TXP2 45 16 PSID_EC 37
46 15 AD_IA 37
USB_PN5 47 14 W IFI_RF_EN 37
21 USB_PN5
USB_PP5 48 13
WLAN USB 21 USB_PP5
49 12
MINI1_CLK_REQ# 23
PCIE_W AKE# 22
23 CLK_PCIE_LAN# 50 11 PLT_RST# 9,21,37,70
LAN CLK 23 CLK_PCIE_LAN
51 10 PM_LAN_ENABLE 37
52 9 KBC_PW RBTN# 37
23 PCIE_RXN3 53 8 BT_ACT 73
LAN PCIE 23 PCIE_RXP3 54 7 BLUETOOTH_EN 37,73
55 6 W LAN_ACT 73
C 56 5 C
23 PCIE_TXN3 +3.3V_RUN
LAN PCIE 23 PCIE_TXP3 57 4
58 3 +1.5V_RUN
USB_PN0 59 2 +5V_USB1
21 USB_PN0
USB_PP0 60 1
USB Port 21 USB_PP0
63 61
62
NP1
IOBD1
ACES-CONN60C-1-GP-U
20.F1563.060
B B
A <Core Design> A
Wistron Corporation
Title

IO Board Connector Rev
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = Mechanical
2010/04/20
+PW R_SRC +3.3V_RUN +3.3V_ALW +5V_ALW X01
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
EC7921
EC7923
EC7902
1
1
EC7926
EC7927
EC7928
EC7933
EC7934
EC7929
EC7901
EC7931
EC7932
EC7912
EC7922
EC7924
EC7911
EC7903
EC7930
EC7940
EC7941
EC7942
EC7936
EC7935
EC7943
EC7939
EC7938
EC7937
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY
2
2
D D
+1.8V_RUN +1.05V_VTT +1.5V_RUN

EC7981 SCD1U10V2KX-4GP EC7972 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
DY2 1
DY2
1
1
EC7914
EC7913
EC7905
EC7904
EC7907
EC7908
EC7910
EC7906
EC7909
EC7925
DY DY DY DY DY DY DY DY DY DY 1
DY2 1
DY2
2
2
For Audio EMI EC7978 SCD1U10V2KX-4GP EC7974 SCD1U10V2KX-4GP
2010/04/19
1
DY2 1
DY2
X01 1
DY2 1
DY2
H1
1
HOLE355X355R111-S1-GP DY2 1
DY2
1
C C
+PW R_SRC +3.3V_RUN

H21 H22 H23 H18
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
H13 H4 HOLE197R166-GP HOLE197R166-GP HOLE197R166-GP
H8 HOLE237R95-GP
HT85BE95R29-U-5-GP HT85BE95R29-U-5-GP HOLE237R95-GP
1
EC7956
EC7960
EC7955
EC7951
EC7950
EC7959
EC7953
DY DY DY DY DY DY DY
2
1
1
1
+1.05V_VTT
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
+3.3V_RUN EC7970 +1.05V_VTT +3.3V_RUN EC7958 +3.3V_ALW
1
EC7949
EC7948
1 2
DY DY 1 2
DY DY
2
H3
HTE95BE95R29-R-5-GP
H6 H2 H20 SCD1U10V2KX-4GP
HT85BE95R29-U-5-GP H7 HT85BE95R29-U-5-GP HOLET315B236R95-GP SCD1U10V2KX-4GP
HOLE355X355R111-S1-GP
B +1.8V_RUN +5V_ALW B
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
1
1
1
1
+1.8V_RUN EC7967 +5V_ALW
EC7971
EC7961
EC7957
EC7964
EC7954
EC7947
1 2
DY DY DY DY
2
DY
SCD1U10V2KX-4GP
2010/04/20
X01
R7904 +1.8V_RUN EC7963 +1.05V_VTT +PW R_SRC +3.3V_RUN
1
DY2SCD1U25V2ZY-1GP EC7962
1 2 1 2
R7906 2 0R2J-2-GP
1 +3.3V_ALW DY
DY SCD1U25V2ZY-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2010/04/19 SCD1U10V2KX-4GP
1
X01
EC7969
EC7952
C7910 +1.05V_VTT
1
DY2SCD1U25V2ZY-1GP DY DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
A <Core Design> A
SPR1 SPR3
1
1
SPRING-14-GP SPRING-51-GP
EC7968
EC7966
EC7965
DY DY DY Wistron Corporation
2
2
AUD_AGND Taipei Hsien 221, Taiwan, R.O.C.
1
Title
34.4F822.002 UNUSED PARTS/EMI Capacitors
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
SSID = VIDEO
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
Reserved
C DJ1 Calpella UMA X01
www.vinafix.vn
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
Reserved
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
Reserved
C DJ1 Calpella UMA X01
www.vinafix.vn
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title

Reserved Rev
Custom DJ1 Calpella UMA X01
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title

Reserved Rev
Custom
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
Reserved
C
www.vinafix.vn
5 4 3 2 1
5 4 3 2 1
Item Page# Date Request By Issue description Solution Description Rev.
1 46 2010/04/16 Power team PU4603 (RT8205) shortage risk Change to TPS51125 X01
2 50 2010/04/16 Power team PU5002 (RT8207) shortage risk Change to TPS51116, DY PR5011 X01
D D
PM_PWROK to +1.05V_VTT power down sequence

3 49 2010/04/16 EE Modify PC4907=0.022U,PR5004, add R4905=1K X01
out of SPEC
4 55 2010/04/16 EE For SIV CRT test fail item Modify RN5504=100 Ohm X01
5 50 2010/04/16 Power team Cost down DY PTC5001 X01
Change PC5321=0.015U, PC5326=0.01U, PR5312

6 53/13 2010/04/19 Power team Power team request X01
Mount PC5319,PC5312,PC5311,C1325,C1328,C1323
Modify PR4705=2,8K, PR4727=1.4K

7 47/12 2010/04/19 Power team Power team request X01
Mount C1214=C1236=C1241=C1208=C1231=10U
C C
8 79 2010/04/19 ME For EMI Add SPR1 X01
Add EC7972-EC7981(DY)
9 79 2010/04/21-22 EMC For EMI X01
Mount EC7938,EC7947,EC7954
Change 0 Ohm resistance to 0 Ohm pad:

26/37/47 R2611,R2603,L3701,PR4706,PR4708,PR4713,PR4718,
10 2010/04/21 EE Cost down PR4722,PR4732,PR4738,PR4744,PR4755,PR4764, X01
/51/53/
PR4707,PR4711,PR4776,PR4784,PR4703,PR4704,
PR4790,PR5102,PR5310,PR5313,PR5314,PR5317,
PR5333
B
11 60 2010/04/21 EE for audio vender's segguest Modify R6009,R6010 to 0 Ohm resistances X01 B
12 37 2010/04/21 EE For version ID Mount R3722, DY R3725 X01
13 46 2010/04/22 Power team For power snubber Mount PR4606=PR4607=2R2, PC4620=330P, PC4621=680P X01
X01
14 46 2010/04/22 Power team For OCP Modify PR4603=140K
15 47 2010/04/23 Power team For power snubber Modify PR4717=10K X01
A <Core Design> A
Wistron Corporation
Title
Change History
A3
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
DJ1 Calpella UMA-Power Up Sequence

(AC mode) red word: KBC GPIO
(DC mode) red word: KBC GPIO
+RTC_VCC
+RTC_VCC T1
T1
PCH_RTCRST#
PCH_RTCRST#
+PWR_SRC
+PWR_SRC T2
T2
+3.3V_RTC_LDO
+3.3V_RTC_LDO
T3 KBC GPIO36 control
D Press Power button D
S5_ENABLE KBC_PWRBTN_EC# KBC_PWRBTN_EC# GPIO3
T4
+5V_ALW EC_ENABLE# (GPIO51) keep low
T5 T3
+KBC_PWR
+3.3V_ALW T4 KBC GPIO36 control
S5_ENABLE
T5
+5V_ALW
T6 +5V_ALW & +3.3V_ALW need meet 0.7V difference
+15V_ALW T6
TPS51125 to KBC GPIO46 +3.3V_ALW
3V_5V_POK T7
PCH to KBC GPI94
SUS_PWR_DN_ACK T8
KBC GPIO43 to PCH +15V_ALW T7
T9 TPS51125 to KBC GPIO46
PCH_RSMRST#(EC Delay 40ms) >10ms
T10 PCH to KBC GPIO00 3V_5V_POK T8
PCH_SUSCLK_KBC
KBC GPO84 to PCH
PM_PWRBTN# T9
AC_PRESENT_EC T11 <200ms
PCH to KBC GPI94
SUS_PWR_DN_ACK T10
KBC GPIO43 to PCH
PCH_RSMRST# T11 >10ms
Press Power button T12 PCH to KBC GPIO01
PCH_SUSCLK_KBC
AC KBC_PWRBTN_EC# KBC_PWRBTN_EC# GPIO3
T12 KBC GPO84 to PCH DC PCH_RSMRST#

AC PM_PWRBTN# T13
PM_SLP_S4#
AC PM_PWRBTN# T14
T13 PM_SLP_S3# >30us
T15 KBC GPO16 to LAN
PM_LAN_ENABLE
PM_SLP_S4# T16
T14
+3.3V_LAN
PM_SLP_S3# >30us
C
T15 KBC GPO16 to LAN C
+1.5V_SUS T17
PM_LAN_ENABLE
T16
+V_DDR_REF(0.9V) T18
+3.3V_LAN
+1.5V_SUS T17
+V_DDR_REF(0.9V) T18 +5V_RUN & +3.3V_RUN need meet 0.7V difference

+5V_RUN T19
+5V_RUN & +3.3V_RUN need meet 0.7V difference +3.3V_RUN T20

+5V_RUN T19
+1.5V_RUN T21
+3.3V_RUN T20
+1.8V_RUN T22
+1.5V_RUN T21
+1.8V_RUN T22
T23
T23 RUNPWROK
T24
RUNPWROK
+1.05V_VTT
T24 TPS51218 to KBC GPI34
+1.05V_VTT T25
TPS51218 to KBC GPI34 VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)
T25
VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction) T26
+0.75V_DDR_VTT
T26
+0.75V_DDR_VTT
T27
GFX_VR_EN
T27
GFX_VR_EN T28
T28 +CPU_GFX_CORE
+CPU_GFX_CORE
H_VTTPWRGD T29
H_VTTPWRGD T29
B B
VTT_PWRGD
VTT_PWRGD T30 ( >99ms )
T30 ( >99ms ) KBC GPO53 to ISL62883
KBC GPO53 to ISL62883 IMVP_VR_ON
IMVP_VR_ON T31
T31 CPU CORE Power
CPU CORE Power +VCC_CORE <3ms
+VCC_CORE <3ms
32
T32 CLK_CPU_BCLK
CLK_CPU_BCLK CLKIN_BCLK(from CK505) stable
CLKIN_BCLK(from CK505) stable
T33 >1ms ISL62883 to CLOCKGEN
T33 >1ms ISL62883 to CLOCKGEN CK_PWRGD
CK_PWRGD ISL62884 to KBC GPO14
ISL62884 to KBC GPO14 T34 >1ms
T34 >1ms IMVP_PWRGD T35
IMVP_PWRGD T35
Delay 10ms
Delay 10ms
KBC GPIO47 to PCH
KBC GPIO47 to PCH PM_PWROK 3ms< T36 <20ms
PM_PWROK 3ms< T36 <20ms
+VCC_CORE
A +VCC_CORE 0.05ms< T37 <650ms A
0.05ms< T37 <650ms
H_PWRGD
H_PWRGD T38 KBC LRESET#
T38 KBC LRESET# PLT_RST# >1ms
PLT_RST# >1ms
T39
T39 H_CPURST#
H_CPURST#
<Core Design>
Wistron Corporation
Title

Power Sequence Rev
A1
DJ1 Calpella Discrete X01
5 4 3 2 1
www.vinafix.vn

WistronPower Sequence INTEL PCH

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WistronPower Sequence INTEL PCH

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5 4 3 2 1

DJ1 Calpella UMA Schematics Document

Size Document Number

DDRIII 800/1066 Channel B DDRIII Slot 1 SYSTEM DC/DC

DMIx4 FDIx4x2(UMA) INPUTS OUTPUTS

CODEC USB 2.0 x 2 Right Side:

Regulator LDO Switch

Size Document Number

PCH SMBus Block Diagram

 PCH_SMBDATA SDA 19 SRN100J-3-GP Battery Conn.

SDA SMBus address:12

PCH +3.3V_ALW Minicard 

SMBUS Block Diagram

Thermal Block Diagram Audio Block Diagram

Place near CPU

DN2 EMC2102_DN1 VREFOUT_A_OR_F IN

Put under CPU. PORTC_L

PCH Strapping Processor Strapping

GPIO33 Default: Do not pull low.

PCIE Routing USB Table

23 CLKIN_DMI 0R4P2R-PAD 1 4 CLK_IN_DMI 13 16 CPU_STOP#

23 CLK_PCIE_SATA 0R4P2R-PAD 1 4 CLK_PCIE_SATA1 10

23 CLK_CPU_BCLK 0R4P2R-PAD 2 3 CLK_CPU_BCLK1 23 27 CLK_XTAL_OUT EC701

C714 X-14D31818M-37GP R704 +3.3V_RUN_SL585

CK_PW RGD D Taipei Hsien 221, Taiwan, R.O.C.

Q701 Clock Generator SLG8SP585

Size Document Number Rev

PCI EXPRESS -- GRAPHICS

JTAG & BPM

R919 R920 XDP_TCLK

GND 1K6R2F-GP R921 0R2J-2-GP

R930 0R2J-2-GP 47 48 R931 1KR2J-1-GP XDP_DBRESET# 22

SSID = CPU CPU1D 4 OF 9

M_A_DQ39 AJ6 AK9 M_A_DQS#5 M_B_DQ42 AM6

DDR SYSTEM MEMORY - B

TP1117 1 SB_DIMM_VREF# H17

AN29 CFG6 RSVD#AP33 AP33

Size Document Number

DJ1 Calpella UMA X01

SSID = CPU CPU1F 6 OF 9

1 AD34 VCC VTT0 D11 Implementation. Customers need to follow the

VCC VTT0 Design Guide.

VCC VTT0 C1234

R28 AJ34 VCC_SENSE 47

SSID = CPU +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN

PEG & DMI

C1314 VTT1 VTT1

Size Document Number

NCTF TEST PIN:

SSID = MEMORY M_A_DM[7..0] 10

C1818 M_A_DQ40 147 2

M_A_DQ43 DQ42 VSS

SSID = MEMORY DM2

M_B_A0 98 NP1 M_B_DM[7..0] 10

C1924 M_B_DQ33 131 111

M_B_DQ36 DQ35 VDD15

close to VTT1 and

54 PCH_LBKLT_CTL Y48 BJ48

Digital Display Interface

55 PCH_CRT_DDCCLK CRT_DDC_CLK DDPD_AUXP

A16 swap override Strap/Top-Block

PCI_GNT#3 Low = A16 swap

A RN2104 <Core Design> A

9 XDP_DBRESET# 2 T6 J12 PCIE_W AKE# 76