COLEGIO DE STA.

TERESA DE AVILA
6 Kingfisher Corner Skylark Streets, Zabarte Subdivision
Novaliches, Quezon City 1123 Philippines
Telephone : 939-6983 / 939-91-36 Telefax : 930-57-85

COURSE SYLLABUS

I. Course Code : ELE002

II. Course Title : Digital Electronics

III. No. of Units : 3

IV. Pre-requisite: ELE001 (Basic Electricity and Electronics)

V. Course Description:

This course will cover the fundamentals of computer logic design from Boolean algebra to
combinational logic design to sequential logic design. At the end of the semester, logic testing will
be introduced.

VI. Objectives:

 To introduce number systems and code.

 To introduce basic postulates of Boolean algebra and shows the correlation between
Boolean expressions

 To introduce the methods for simplifying Boolean expressions

 To outline the formal procedures for the analysis and design of combinational circuits and
sequential circuits

 To introduce the concept of memories and programmable logic devices.

VII. Course Outline:

Week Hours Topics Methodology

1 3 Number System and Codes  Discussion
 Seat works
Binary Number System  Quizzes
 Why Binary Numbers are
used?
 Decimal-to-Binary
Conversion
 Binary-to-Decimal
Conversions

Microprocessor
2 3 Octal Numbers  Discussion
 Decimal-to-Octal Conversion  Seat works
 Octal-to-Decimal  Quizzes
Conversions

Hexadecimal Numbers
 Hexadecimal-Binary
Conversion
 Decimal-to-Hexadecimal
Conversions
 Hexadecimal-to-Decimal
Conversions
3 3 Gates  Discussion
 Demonstration
Inverter
 AND Gates

OR Gates
4 3 NOR Gates  Discussion
 Demonstration
NAND Gates  Board Works

Exclusive OR Gates

Exclusive NOR Gates

5 3 PRELIM EXAMNINATIONS
6 3 Boolean Algebra  Discussion
 Demonstration
Laws of Boolean Algebra  Board Works
7 3 Boolean Relations  Discussion
 Demonstration
Sum-of-Product Methods  Board Works

Algebraic Simplifications
8 3 De Morgan’s Theorem  Discussion
 De Morgan’s First Theorem  Demonstration
 De Morgan’s Second  Board Works
Theorem
9 3 Karnaugh Maps  Discussion
 Pairs  Demonstration
 Quads  Board Works
 Octet
 Karnaugh Simplification
 Don’t-Care Condition
10 3 PREFINALS EXAMINATIONS
11 3 Arithmetic-Logic Units  Discussion
 Demonstration
Binary Addition
Binary Subtractions
Half Adders
Full Adders
Binary Adders
12 3 Signed Binary Number  Discussion
2’s Compliment  Demonstration
2’s Complement Adder-Subtracter
Binary Multiplications
Binary Divisions
13 3 Binary Codes for Decimal Number  Discussion
 Demonstration
Gray Codes
14 3 Flip-Flops  Discussion
 Demonstration
RS Latches
Level Clocking
JK Flip-Flops
JK Master-Slave Flip-Flops
15 3 PREFINALS EXAMINATIONS
16 3 Registers and Counters  Discussion
 Demonstration
Registers
 Buffer Registers
 Shift Registers
 Controlled Shift Registers

Counters
 Ripple Counters
 Synchronous Counters
 Ring Counters
17 3 Memories  Discussion
ROM’s  Demonstration
PROMs and EPROMs
RAMs
A Small TTL Memory
Hexadecimal Address
18 3 FINAL EXAMINATIONS
VIII. Grading System:

The following percentage distribution shall be followed :

Prelims - 25%
Midterm - 25%
Prefinals - 25%
Finals - 25%
------------------------
100%

The following are the required periodic grade components for this course

Lecture

Class Participation 20%

Quizzes 30%
Periodical Examinations 50%
------------------------
100%
Laboratory

Projects 60%
Laboratory Exercises 40%
--------------------------
100%

IX. Course Requirements

1. Class Participation
2. Laboratory Exercises
3. Quizzes
4. Project
5. Major Examinations

X. References

1. Digital Electronics Demystified, Myke Predko, 2005

2. Digital Design, Principles and Practice 2nd Edition, John F. Wakerly

3. Digital Computer Electronics, Malvino, Brown, 1992

4. http://www.asic-world.com/digital/tutorial.html

Prepared by:

ELIBER J. DIOQUINO
Faculty

Approved by:

HAROLD R. LUCERO, MIT

Dean – College of Information Technology

Noted by:

SALVACION J. MOPAZ
Consultant – IT Department