University of Central Punjab

Faculty of Information Technology

PROGRAM (S) TO BE
EVALUATED
BS (CS)

A. Course Description and Log

Course Code CSCS 2523

Course Title Digital Logic and Design
Credit Hours 4(3+1)
Prerequisites by Course(s) and
Basic Electronics
Topics
Assessment Instruments with
Weights (homework, quizzes, Quizzes (20%), Assignments (15%), Class Participation (5%), Mid
midterms, final, programming Term (20%), Final Term (40%)
assignments, lab work, etc.)
Semester Fall 2023
Course Instructor Imran Ahmad
Course Coordinator Dr. Irfan Anjum
Lab Instructor
Office Hours
Plagiarism Policy All the parties involved will be awarded Zero in first instance. Repeat of
the same offense will result in (F) grade.
Current Catalog Description This course provides a modern introduction to logic design and the
basic building blocks used in digital systems, in particular digital
computers. It starts with a discussion of combinational logic: logic
gates, minimization techniques, arithmetic circuits, and modern logic
devices such as field programmable logic gates. The second part of
the course deals with sequential circuits: flip-flops, synthesis of
sequential circuits, and case studies, including counters, registers, and
random-access memories. State machines will then be discussed and
illustrated through case studies of more complex systems using
programmable logic devices. Different representations including truth
table, logic gate, timing diagram, switch representation, and state
diagram will be discussed. Hands on training is given on self-designed
prototypes /Digital logic Trainers and latest SPICE (Virtual Electronics
Lab). Participants will be able to make digital circuits on
self-designed modules like Adder, ALU, MUX, DEMUX, Decoder,
Encoder, RAM, ROM, and Parity Checker and also display decimal
digits on Seven segment Indicators or State Monitors.

Textbook (or Laboratory Manual  Digital Fundamentals by Floyd 11th edition,

for Laboratory Courses)
Reference Material
Course Goals
 Digital Logic and Computer Design by M. Morris Mano 3rd & 5th
Edition
 To introduce the basics of digital systems.
 To make students understand, design, Simulate and Implement
digital systems.
 To equip students with techniques to solve complex logical

1 NCEAC.FORM.001.C
 problems, design digital systems and State Machine
Topics Covered in the Course,
with Number of Lectures on Each
Attached
Topic (assume 15-week instruction
and 1.5 hour lectures)
Programming Assignments Done
in the Course
Class Time Spent on (in hours) Theory Practical/Lab
3 3
Oral and Written
Communications

CLO# Course Learning Outcome (CLO) Taxonomy Level Mapping to

PLO
CLO 1 Acquire knowledge related to the concepts, tools, and C3 1
techniques to demonstrate the response of digital
electronic circuits.

CLO 2 Utilize the knowledge to analyze and compare C4 2

combinational and sequential circuits using a variety of
techniques.

CLO 3 Apply the acquired knowledge to simulate and C3 2

implement small-scale digital circuits.

Evaluation
Week Lecture Topics Covered References
Instrument
Digital and Analog quantities, Signals
1 Sampling using ADC&DAC, Binary digits, Logic Levels, Floyd
Digital waveforms
1 Introduction to Logic Gates, Truth tables for 2,3, and 4
inputs, Logic symbols, Boolean expressions,
2 Floyd
Fundamental Gates AND, OR and NOT gates.
Importance of XOR, XNOR gates.

Boolean Variables, Boolean Algebra, Basic Theorems,

3 Floyd
Laws and rules of Boolean algebra, Boolean Functions,

2 Complement of a function, DeMorgan’s Theorems (Two,

4 Three variables) Floyd
Logic Simplification using Boolean Algebra

Min terms and Max terms, Sum of Product terms (SOP),

Floyd and
5 Product of Sum terms (POS), and Conversion Between
Morris
Canonical/ Standard Forms.
3 Boolean Minimization using Karnaugh Map up to 4
Variable for SOP and POS. Don’t Care Conditions
6 Floyd
Verification by using Binary Testing Techniques for
standard and Minimized forms.
4 7 Introduction to Number systems, Binary, Octal, Decimal Quiz 1 Floyd
and Hexadecimal. Assignment 1

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 Number system conversions,
Octal to Binary, Octal to Decimal, Octal to Hexadecimal,
Hexadecimal to Binary, Hexadecimal to Decimal,
Hexadecimal to Octal
1’S complement, 2’S complement, Binary addition, Binary
subtraction, Binary multiplication, Binary Division, Digital
8 codes (ASCII, Binary Coded Decimal), BCD addition, Floyd
Gray Code, 4 Bit Binary to Gray code converter, Gray to
Binary code converters by using XOR gates.
NAND & NOR as Universal gates, Implementation of
9 Combinational logic circuits using NAND or NOR gates Floyd
only.

5 Half–Adder combinational logic design, Full-Adder

combinational logic design and Expressions of Sum and
10 Carry in XOR, Morris
Implementation by using K-maps for Sigma and Carry
output.
Half subtractor, Full subtractor, 4 Bit Parallel binary
11 Morris
Adder, Controlled Inverter
Combinational logic design for Decoders Active High /
Active low
 2 lines to 4 lines decoder
6
 3 lines to 8 lines decoder
Quiz 2 Floyd
12  4 lines to 16 lines decoder
 BCD to Decimal Decoder
 BCD to 7 Segment decoder with Table
implementation.
Combinational logic design for Encoders
 4 lines to 2 lines encoder
 8 lines to 3 lines encoder
 16 lines to 4 lines encoder
 Decimal to BCD encoder (Key Pad) Assignment 2
13 Floyd
 Priority Encoder (Morris Mano)
Example (Full adder implementation with decoder and
OR gate)
7
Example (Importance of Encoders and Decoders in
Digital communication systems)
Combinational logic design for Multiplexers (PISO)
 4 line to 1 line MUX or (1-Of-4 MUX)
 8 line to 1 line MUX or (1-Of-8 MUX) Floyd
14
 16 line to 1 line MUX or (1-Of-16 MUX) Morris
 10 line to 1 line MUX or (1-Of-10 MUX)
Canonical function implementation with MUX
8 15 Combinational logic design for Demultiplexers (SIPO). Floyd
 1 line to 4 lines DEMUX Morris
 1 line to 8 lines DEMUX
 1 line to 16 line DEMUX

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  1 line to 10 line DEMUX
Combinational logic implementation using MUX Folding
Technique & DEMUX with active high and active low
enable inputs
16 Review
MIDTERM WEEK
BCD Adder design, 2-bit, 3 bit and 4-bit Magnitude
17 Morris
Comparator design
9 Sequential circuits, Function of Latch, SR latch using
18 NAND and NOR gates, Active high and active low latch Morris
design,
SR Flip-Flop, D Flip-Flop, JK Flip-Flop and T Flip-Flop,
19 Morris
Clocking
10
Flip- Flop Applications (Counters, Frequency divider,
20 Floyd
Registers and Memory)
Excitation tables for SR, JK, T and D Flip-Flops using Quiz 3
21 Morris
11 their characteristics tables
22 Flip Flop conversions SR to D, JK to D Morris

Sequential logic design process, State diagram and State Floyd

23 Assignment 3
tables, Steps to design sequential circuit. Morris
12
4 Bit Up/Down Synchronous Counters design with clock
24 Floyd
diagram
4 Bit Asynchronous Counters design with clock diagram,
25 Up/Down and Auto reset operations using NAND gate Floyd
13 (Truncated sequence)
Design 2 bit,3 bit up-down counter with the gray code Quiz 4
26 Floyd
sequence Assignment 4
Registers, Serial in serial out, Serial in parallel out,
27 Floyd
Parallel in serial out and parallel in Parallel out
14
Write and Read Operations in memory, Sizes of Address
28 Floyd
bus and Data bus,
Design of Binary Cell using SR Latch, Design of 4X4 and
29 Morris
8 X 8 RAM
15
30 Review

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