Revised November 2020

Fakulti Kejuruteraan Elektronik & Kejuruteraan Komputer

Universiti Teknikal Malaysia Melaka.

IN-LAB ASSESSMENT RUBRIC

Course Code and Name :BENR 2211 COMPUTER ENGINEERING LAB 1
Title of Experiment FET BIASING CIRCUIT
Programme :BENR Group No. :12

No Matrix No. Students Name Signature

S1. B021910194 ANDREA CHEANG SHEAU SHYUAN Andrea

S2. B021910012 ARFAN BIN AZMAN Arfan

S3.

S4.

Score
Very Weak Weak Modest Good Excellent PO
No. Description Weight S1 S2 S3 S4
(1) (2) (3) (4) (5) Assess
1. Ability to use Mishandling of Major mistakes Minor mistakes Able to handle the Students are
equipment / equipment / while using while using equipment / comfortable with
simulation tools. simulation tools. equipment / equipment / simulation tools the equipment /
1
simulation tools simulation tools. correctly. simulation tools.
but understand
basic function. /5 /5 /5 /5
2. Handling and Major procedures A few major Major procedures All procedures are All procedures are PO5
understanding of are missing. procedures are are available. followed correctly followed correctly. (15%)
1
experiment available but with improper
sequence. /5 /5 /5 /5
3. Efficiency in Most data are Most data are Most data are All data correctly All data are
taking data missing or available; with correctly taken. taken but shown in correctly taken and
incorrect. minor mistake. a format that may presented in a 1
be confusing or proper format.
misleading. /5 /5 /5 /5
4. Ability to Not complied to Major flaws to Acceptable flaws Minor flaws to Complied with
demonstrate the dress code, lab dress code, lab to dress code, lab dress code, lab dress code, lab
values of regulations and regulations and regulations and regulations and regulations and 1
engineering safety measures. safety measures safety measures. safety measures. safety measures.
practice. but under control. /5 /5 /5 /5 PO8
5. Ability to Does not show any Sometimes Need to be Well mannered, Very well (10%)
demonstrate respect, selfish misbehave, does prompted to sometimes helpful mannered, always
ethical behaviour and annoying. not offer behave; only offers and appreciated by helpful and highly
1
assistance and help when asked friends. appreciated by
sometimes and can be friends.
annoying. annoying at time. /5 /5 /5 /5

Total Marks = (25%)

25 25 25 25
 SHORT REPORT ASSESSMENT RUBRIC

Course Code and Name : BENR 2211 COMPUTER ENGINEERING LAB 1

Title of Experiment FET BIASING CIRCUIT
Programme : BENR Group No. :12

No Matrix No. Students Name Signature

S1. B021910194 ANDREA CHEANG SHEAU SHYUAN Andrea

S2. B021910012 ARFAN BIN AZMAN Arfan

S3.

S4.

No.

Very Weak Weak Modest Good Excellent

Description Weight Score PO Assess
(1) (2) (3) (4) (5)

1. Results & Data Results are Results are Results are nearly Results are nearly Results are
Collection incomplete and most incompletely completed fairly completed, accurate completed, accurate
data are missing or presented and most accurate and and neatly presented and neatly presented
incorrect. data are available; presented and most and all data correctly and all data are PO5
with minor mistake. data are correctly taken but shown in a correctly taken and 5 (25%)
taken. format that may be presented in a proper
confusing or format.
misleading.
/25
2. Analysis & Very poor Slight investigation Moderate Good investigation on Excellent
Discussion investigation element. and discussion investigation on complex engineering investigation on
conducted. complex engineering problem and valid complex engineering PO4
problem but lacking discussion. problem with critical 4 (20%)
of valid discussion. observation and
discussion.
/20

Total Marks =
45%
45
 LAB 4 FET BIASING CIRCUIT

Code of Subject BENR 2211

Name of Subject Computer Engineering Lab 1
Title: FET Biasing Circuit
Lab Session: 4
Lab: Online Lab
Date: 23rd November 2020
Year: 2
Course: BENR
Section/ Group: Section 2
Name of student: Matrix Number
1. ANDREA CHEANG SHEAU SHYUAN B021910194
2. ARFAN BIN AZMAN B021910012
Lecturer name DR SITI KHADIJAH BINTI IDRIS @
OTHMAN
1.0 TITLE:

FET Biasing Circuit

2.0 OBJECTIVE:
 To design and simulate a FET self-biasing circuit with an appropriate/ predicted
operating point (Q-point). Utilize the FET data sheet
 To analyze biasing parameters and perform error analysis

3.0 EQUIPMENT:
Multism Live Software

4.0 COMPONENTS

DC voltage, 3 resistors, connecting wires, 2N4568 JFET, multimeter

 a) DISCUSSION

Figure 1

Figure 1 shows the design of self-biasing circuit for 2N5486 FET

Figure 2

Figure 2 shows the transfer curve of FET self-biasing configuration. The curve above is formed by using
the drain characteristics of 2N5486 JFET transistor as shown on the lab sheet. Load line has been
assumed in order to obtain Q-point.
The figure above shows the simulation of FET self-biasing configuration by using Multism Live
Software. The software shows the value of VD,VG,VS,ID,IS and IG which are the important parameter for
calculations.

The calculations of VDS, VD, VGS, VRD and VRS is calculated by using the simulation results.
On the mathematical calculations above, VDS is obtain from the drain characteristics of 2N5486 JFET
transistor which is 6. VDS is an important parameter in order to calculate the RD value. Although the RD
value calculated is 2.75kΩ, but 3kΩ is used. This is because a 3kΩ resistor has a higher commercial
value.

After calculating the important parameters using the simulation results and by calculations, error
analysis is performed in order to obtain the percentage difference between both results.

Biasing parameter Mathematical Simulation results Error analysis,%

calculation
VDS,V 6 5.12 17.19
VD,V 7.8 7.6 2.63
VRD,V 7.2 7.4 2.7
VRS,V 2.4 2.47 2.83
VGS,V -2.4 -2.47 2.83
VS,V 2.4 2.46 2.44
ID,mA 2.4 2.47 2.83
IS,mA 2.4 2.46 2.44
Table 1

The error analysis is calculated by 100 – (Mathematical calculations/Simulations results)*100%.

Since the error analysis for most of the values are less than 5%, indicating that the difference between
both the simulation and mathematical calculations are small.
Data Sheet

b) CONCLUSION

The conclusion from this lab session is that all the objectives were acheived as the design of a FET self-
biasing circuit has been sketched with a predicted Q-point. Through this lab session, we learned on how
to calculate the error analysis for the percentage difference between both simulation and mathematical
calculation. Based on table 1, the error analysis for most of the values, is less than 5%. This indicates
that the simulations and mathematical calculation only have a slight difference between each other. The
simulation may not always produce accurate results, it works on logical manipulation. While analytical
results are accurate as proven mathematical manipulation. Since there is only a slight difference
between both results, we could say that the predicted Q-point and those assumed calculations are
reliable. Besides that, by performing this lab session, we are able to obtain the transfer curve from the
given drain characteristic. This is an important key in this lab because by having the transfer curve, we
are able to obtain the predicted Q-point. As a result, a FET self-biasing circuit is designed.