HW 12

Section 5– 1 The DC Operating Point

1. The output (collector voltage) of a biased transistor amplifier is shown in Figure 5– 32. Is the
transistor biased too close to cutoff or too close to saturation?

Figure 5– 32

2. What is the Q- point for a biased transistor as in Figure 5– 2 with IB = 150 uA, βDC = 75, VCC
= 18 V, and RC = 1.0 kΩ?

Figure 5– 2

3. What is the saturation value of collector current in Problem 2?

4. What is the cutoff value of VCE in Problem 2?

6. Assume that you wish to bias the transistor in Figure 5– 33 with IB = 20 uA. To what voltage
must you change the VBB supply? What are IC and VCE at the Q- point, given that βDC = 50?

Figure 5– 33

7. Design a biased-transistor circuit using VBB = VCC = 10 V for a Q- point of IC = 5 mA and VCE
= 4 V. Assume βDC = 100. The design involves finding RB, RC, and the minimum power rating
of the transistor. (The actual power rating should be greater.) Sketch the circuit.
8. Determine whether the transistor in Figure 5– 34 is biased in cutoff, saturation, or the linear
region. Remember that is IC = βDCIB valid only in the linear region.

Figure 5– 34

Based upon:
FLOYD, THOMAS L., ELECTRONIC DEVICES (CONVENTIONAL CURRENT VERSION), 9th Ed., © 2012. Reprinted by
permission of Pearson Education, Inc., Upper Saddle River, NJ.