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REPORT NO. : EDE1901203 SAMPLE IS :
MODEL : NEW PARTS
DATE COMPLETED : 2019-01-18 1st SUBMISSION
QTY SUBMITTED : 2nd SUBMISSION
DESCRIPTIONS : ALTERNATE SOURCE
43” LG OPEN CELL LC430EGQ-SMM3 OTHER REMARKS
3840*2160 (X-C) SPECIFICATION ATTACHED YES NO
REMARKS :
SUPPLIER’S PART NO. : LC430EGQ-SMM3
OUR PARTS NO. : 7702-143000-2260
SUPPLIER :
MANUFACTURER : LG. Display Co., Ltd
TEST RESULT : APPROVED REJECTED
CONDITIONALLY APPROVED : SEE ITEMS LISTED BELOW
TEST ENGINEERS : 刘冰寒
COMMENTS : . 1. 所有壞料包退換。
2. 如有因元件質量問題而引起的損失,元件生產廠家需負全責。
3. 请在内/外包装箱上打印我公司物料编号:7702-143000-2260。
IF CONDITIONALLY APPROVED :
(a) SUPPLIER IS REQUESTED TO SUBMIT _________ PIECES SAMPLES AGAIN.
(b) FOR PURCHASING TO BUY _________ PIECES FOR PILOT PRODUCTION.
TESTED BY ENGINEER (S) APPROVED BY ENGINEERING MANAGER
ELECTRICAL
Rm. 1601-04 Westlands Centre, 20 Westlands Road, Quarry Bay, H.K. Tel: 2856 3138 SKYWO HX Fax:2586 3590
LC430EGQ
Product Specification
SPECIFICATION
FOR
APPROVAL
( ) Preliminary Specification
( ) Final Specification
SIGNATURE SIGNATURE
APPROVED BY APPROVED BY
DATE DATE
REVIEWED BY
PREPARED BY
/ ChangKun Kim / Engineer
Please return 1 copy for your confirmation with TV Products Development Dept.
your signature and comments. LG. Display LCD Co., Ltd
CONTENTS
Number ITEM Page
COVER 0
CONTENTS 1
RECORD OF REVISIONS 2
1 GENERAL DESCRIPTION 3
2 ABSOLUTE MAXIMUM RATINGS 4
3 ELECTRICAL SPECIFICATIONS 5
3-1 ELECTRICAL CHARACTERISTICS 5
3-2 INTERFACE CONNECTIONS 6
3-3 SIGNAL TIMING SPECIFICATIONS 7
3-4 V By One SIGNAL SPECIFICATIONS 9
3-5 INTARA INTERFACE SIGNAL SPECIFICATION 11
3-6 COLOR DATA REFERENCE 12
3-7 POWER SEQUENCE 13
4 OPTICAL SPECIFICATIONS 14
5 MECHANICAL CHARACTERISTICS 18
6 MECHANICAL DIMENSION 19
6-1 BOARD ASSEMBLY DIMENSION 19
6-2 CONTROL BOARD ASSEMBLY DIMMENSION 20
7 RELIABILITY 21
8 INTERNATIONAL STANDARDS 21
8-1 SAFETY 22
8-2 ENVIRONMENT 22
9 PACKING 23
9-1 PACKING FORM 23
10 PRECAUTIONS 24
10-1 HANDLING PRECAUTIONS 24
10-2 OPERATING PRECAUTIONS 24
10-3 PROTECTION FILM 25
10-4 STORAGE PRECAUTIONS 25
10-5 PACKING PRECAUTIONS 25
RECORD OF REVISIONS
Revision No. Revision Date Page Description
0.1 Jan. 11, 2019 - Preliminary Specification (First Draft)
1. General Description
The LC430EGQ is a Color Active Matrix Liquid Crystal Display with an integral the Source PCB and Gate
implanted on Panel (GIP). The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 42.51 inch diagonally measured
active display area with QW UXGA resolution (2160 vertical by 3840 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.07Bilion colors.
It has been designed to apply the 10-bit 8 Lane VbyOne interface.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
EPI(RGBW)
EEPROM
Source Driver Circuit
+12V
SDA SCL S1 S3840
Vby1
1~8lane G1
Vby1
8lane
Option
CN1 signal Timing Controller
(51pin) Vby1 Rx + M+
I2C Control
TFT - LCD Panel
HTPDN Signals (3840 × 2160 pixels)
LOCKN
General Features
Active Screen Size 42.51 inches(1,079.75 mm) diagonal
Outline Dimension 953.0(H) x 543.0 (V) x 1.1 mm(D)
Pixel Pitch 0.2451 mm x 0.2451 mm
Pixel Format 3840 horiz. by 2160 vert. Pixels, RGB stripe arrangement
Display Mode IPS
Color Depth 10-bit(D), 1.07 Billion colors
Source D-IC : 8-bit EPI, gamma reference voltage, and control signals
Drive IC Data Interface
Gate D-IC : Gate In Panel
Transmittance(with POL) 6.15%(Typ.)
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Power Consumption Logic= 10.25W (Typ.) 13.35W (Max.)
Weight 1.5Kg (Typ.) , 1.56Kg (Max.)
Display Mode Transmissive mode, Normally black
Hard coating(2H), Anti-glare low reflection treatment of the front polarizer (Haze
Surface Treatment (Top)
3%(Typ.))
Value
Parameter Symbol Unit Note
Min Max
90%
60
60%
50 Storage
Humidity [(%)RH]
Wet Bulb
Temperature [°C]
40
40%
Operation
30
20
10
0
10%
5%
-20 0 10 20 30 40 50 60 70 80
3. Electrical Specifications
3-1. Electrical Characteristics
Value
Parameter Symbol Unit Note
Min Typ Max
Circuit :
- 855 1115 mA 1
Power Input Current ILCD
- 1405 1830 mA 2
T-CON Option Input High Voltage VIH 2.7 - 3.6 VDC
Selection Voltage Input Low Voltage VIL 0 - 0.7 VDC
Power Consumption PLCD - 10.25 13.35 Watt 1
Note 1. The specified current and power consumption are under the VLCD=12.0V, Ta=25 2°C, fV=60Hz
condition, and mosaic pattern(8 x 6) is displayed and fV is the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. Ripple voltage level is recommended under ± 5% of typical voltage
R G B R G B R G B R G B
R G B R G B R G B R G B
R G B R G B R G B R G B
R G B R G B R G B R G B
R G B R G B R G B R G B
R G B R G B R G B R G B
R G B R G B R G B R G B
R G B R G B R G B R G B
‘H’ : AGP
23 AGP or NSB 49 Rx7n V-by-One HS Data Lane 7
‘L’ or NC : NSB (No signal Black)
24 NC NO CONNECTION 50 Rx7p V-by-One HS Data Lane 7
25 HTPDN Hot plug detect 51 GND Ground
26 LOCKN Lock detect - - -
notes
1. All GND (ground) pins should be connected together to the LCD module’s metal frame.
2. All Input levels of V-by-One signals are based on the V-by-One HS Standard Version 1.4.
3. #9 & #14~#17, #20,#21 NC (No Connection) : These pins are used only for LGD (Do not connect)
4. About specific pin (#22,#23) , Please see the Appendix IV.
5. Specific pin No. #23 is used for “No signal detection” of system signal interface.
It should be GND for NSB (No Signal Black) while the system interface signal is not.
If this pin is “H” or “NC”, LCD Module displays AGP (Auto Generation Pattern).
Vertical fV 47 60 63 Hz 2
notes: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
ㆍ ㆍ B C
Y
ㆍ
A
ㆍ D Y=0mV
ㆍ ㆍ F E
X
X=0 UI X=1 UI
A 0.25 (max) 2 0 -
B 0.3 (max) 2 50 3
C 0.7(min) 3 50 3
D 0.75(min) 3 0 -
E 0.7(min) 3 l -50 l 3
F 0.3(max) 2 l -50 l 3
notes 1. All Input levels of V by One signals are based on the V by One HS Standard Ver. 1.4
2. This is allowable maximum value.
3. This is allowable minimum value.
4. The eye diagram is measured by the oscilloscope and receiver CDR characteristic must be
emulated.
- PLL bandwidth : 10Mhz
- Damping Factor : 1
Vdiff =0
Lane0
tRISK_INTER
Lane1 Vdiff =0
1H T-CON
V By One Rx IP
Rx
Hblank
Rx Vblank
DE
8 Lane
<Inter-pair Skew between two sub Blocks> <TCON – VbyOne Brief Diagram >
Logic & EPI Power Voltage VCC - 1.79 1.88 1.98 VDC
EPI input common voltage VCM CML Type 0.8 - 1.2-Vdiff/2 V
EPI input differential voltage Vdiff - 150 - 500 mV
EPI Input eye diagram Veye - 90 - - mV
Effective Veye width time B1&B2 0.25 - - UI
EPI +
Vdiff Vdiff
0V
EPI -
Vdiff
Vcm
0V
(Differential Probe) (Active Probe)
0.5 UI
Veye
0V
Veye
(Differential Probe)
B1 B2
D[26] B[0]
D[27] B[1]
Byte4
D[28] G[0]
D[29] G[1]
D[30] R[0]
D[31] R[1]
0V Vx1 Data
Interface Signal (Tx_clock)
100% T3 T4
T8
Value
Parameter Unit Note
Min Typ Max
T1 0.5 - 20 ms 1
T2 0 - - ms 2
T3 400 - - ms 3
T4 100 - - ms 3
T5 1.0 - - s 4
T6 0 - T2 ms 5
T7 0 - - ms 6
1. Even though T1 is over the specified value, there is no problem if I2T spec of fuse is satisfied.
Note : 2. If T2 is satisfied with specification after removing LVDS Cable, there is no problem.
3. The T3 / T4 is recommended value, the case when failed to meet a minimum specification,
abnormal display would be shown. There is no reliability problem.
4. T5 should be measured after the Module has been fully discharged between power off and on period.
5. If the on time of signals (Interface signal and user control signals) precedes the on time of Power (VLCD),
it will be happened abnormal display. When T6 is NC status, T6 doesn’t need to be measured.
6. It is recommendation specification that T7 has to be 0ms as a minimum value.
※ Please avoid floating state of interface signal at invalid period.
※ When the power supply for LCD (VLCD) is off, be sure to pull down the valid and invalid data to 0V.
4. Optical Specification
Optical characteristics are determined after the unit has been ‘ON’ and stable in a dark environment at 25± 2°C.
The values are specified at 50cm from the LCD surface at a viewing angle of and equal to 0 °.
FIG. 2 shows additional information concerning the measurement equipment and method.
50cm
FIG. 2 Optical Characteristic Measurement Equipment and Method
Value
Parameter Symbol Unit Note
Min Typ Max
Contrast Ratio CR 900 1300 - 1
Variation G to G σ 6 9 3
Response Time
Gray to Gray (BW) G to G BW 9 13 ms 2
Transmittance T 5.53 6.15 % 4
Rx 0.657
RED
Ry 0.326
Bx 0.136
BLUE
By 0.125
x axis, right(=0°) r 89 - -
x axis, left (=180°) l 89 - -
degree 6
y axis, up (=90°) u 89 - -
y axis, down (=270°) d 89 - -
Gray Scale - - - 7
Xi = Individual Data
G to G (σ) = √ Σ(Xi- u)2
N
u = Data average
N : The number of Data
4. The value of transmittance should be extracted using the standard light source of D65
5. The value of color coordinates should be extracted using the standard light source of D65
6. Viewing angle is the angle at which the contrast ratio is greater than 10. The angles are
determined for the horizontal or x axis and the vertical or y axis with respect to the z axis which
is normal to the LCD module surface. For more information, see the FIG. 5.
7. Gray scale specification
Gamma Value is approximately 2.2. For more information, see the Table 10.
H
A
② ③
①
V
B
A : H / 4 mm
④ ⑤ B : V / 4 mm
@ H,V : Active Area
Response time is defined as the following figure and shall be measured by switching the input signal for
“Gray(N)” and “Black or White”.
Tr Tf
100
90
Optical
Response
10
Gray(N) White Gray(N) Black
0
N = 0(Black)~1023(White)
Normal
E Y
= 90, Up
= 180, Left
= 0, Right
= 270, Down
5. Mechanical Characteristics
Item Value
Horizontal 953.0mm
Outline Dimension
Vertical 543.0mm
(Only Glass)
Depth 1.1 mm
Horizontal 941.184mm
Active Display Area
Vertical 529.416mm
Note : Please refer to a mechanical drawing in terms of tolerance at the next page.
6. Mechanical Dimension
6-1. Board Assembly Dimension
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
ITEM
DESCRIPTION METERIAL COLOR FINISH
NO.
A LC430EQY-SMA3
A A
B B
953.00 (TFT)
C C
476.50
951.00(POL DOWN)
1.00+0.85
-0.85
DETAIL A DETAIL B 1.00+0.85
-0.85
0.70+0.60
-0.60
0.90+0.70
-0.70
0.70 +0.60
-0.60 0.70 +0.60
-0.60
DETAIL A DETAIL B
951.60(POL UP)
SCALE 2/1 SCALE 2/1
476.45
D D
952.90 (C/F)
DETAIL C
SCALE 2/1
E DETAIL C E
F 270.54 F
270.59
269.89
269.69
G G
539.40(POL DOWN)
539.10(POL UP)
529.416 (Active Area)
543.00 (TFT)
541.15 (C/F)
H H
I I
784.320(P156.864X5)
J J
156.864
DETAIL H DETAIL J
84.340
25.31
DETAIL D
40.28(CNT) 40.28(CNT)
DETAIL E
417.50 417.50
2.70+0.50
-0.50
3.20+0.50
-0.50
(PCB~CNT)
L L
41.44
2-(2.50)
20.5
(C0.3) Max 1.3(include film)
5.0
11.70
Over Mold Coverage
Over Mold Coverage
2.15(TFT~PROCESS KEY "A")
3.70(TFT~PROCESS KEY "B")
M M
5.60(TFT~PROCESS KEY "B")
1.17(TFT~PROCESS KEY "A")
DETAIL D
5.321(TFT~PROCESS KEY "A") 5.321(TFT~PROCESS KEY "A") SCALE 2/1 DETAIL E
SCALE 1/1
3.684(TFT~PROCESS KEY "B") 3.684(TFT~PROCESS KEY "B")
1.179(TFT~AG DOT)
0.250
0.250
0.350
N N
0.350
DETAIL F
5.60(TFT~PROCESS KEY "B")
SCALE 2/1
1.179(TFT~AG DOT)
1.17(TFT~PROCESS KEY "A")
DETAIL H DETAIL J
O SCALE 2/1 SCALE 2/1 O
NOTES
1. This drawing describes the necessary dimension in BOARD ASSY
to assembly with customer's backlight system
2. The specified dimension, non-specified dimension and its tolerances
can be changable, and hence values are used for reference only
(Non-specified dimension : 0.3) This drawing is property of LG Display Co., Ltd.
C 3. Hatching area describes as below Unauthorized reproduction in whole or in part is prohibited by law Confidential
H : GND area
A : Silk screen area SCALE UNIT DESIGNED
P BOARD ASSEMBLY P
N : Contact avoidance area TITLE
G 4. Process Key is necessary to panel manufacture. 1/2 mm
LC430EQY-SMA3
E it can be visible by trasmission (Key 'A') or reflection (Key'B') of light THIRD ANGLE PROJECT CHECKED
S
ISSUE
YY.MM.DD SIGNATURE CHANGE NO CHANGE CONTENTS
APPROVED DWG NO.
6060L-6182
NO.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 <A0>
Date Version
2018.06.20 Ver.0.1
1 2 3 4 5 6 7 8 9 10 11
A A
<NOTE>
1. This drawing describes the necessary dimension in
Control board to assembly with customer's backlight system.
B 2. The specified dimension, non-specified dimension B
and its tolerances can be changeable, and hence
values are used for reference only.
C C
D D
129.80
3.10(PCB~CNT)
E 24.50 24.50 E
17.40
17.40
8.00
8.00
53.00
F F
67.90 5.05(PCB~CNT)
G G
1 2 3 4 5 6 7 8 9 10 11 <A2>
Date Version
7. Reliability
Table 12. ENVIRONMENT TEST CONDITION
Note : Before and after Reliability test, LCM should be operated with normal function.
8. International Standards
8-1. Safety
a) UL 60065, Underwriters Laboratories Inc.
Audio, Video and Similar Electronic Apparatus - Safety Requirements.
b) CAN/CSA C22.2 No.60065:03, Canadian Standards Association.
Audio, Video and Similar Electronic Apparatus - Safety Requirements.
c) IEC 60065, The International Electrotechnical Commission (IEC).
Audio, Video and Similar Electronic Apparatus - Safety Requirements.
8-2. Environment
a) RoHS, Directive 2011/65/EU of the European Parliament and of the council of 8 June 2011
9. Packing
A B C D E F G H I J K L M N
notes
1. YEAR
Year 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020
Mark A B C D E F G H J K
2. MONTH
Month Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec
Mark 1 2 3 4 5 6 7 8 9 A B C
3. DATE
DATE 1~9 10 ~ 31
10. Precautions
Please pay attention to the followings when you use this TFT LCD module.
※ 3D CAD로 모식화 필요
(1) Temperature : 5 ~ 40 ℃
(2) Humidity : 35 ~ 75 %RH
(3) Period : 6 months
(4) Control of ventilation and temperature is necessary.
(5) Please make sure to protect the product from strong light exposure, water or moisture. Be careful for
condensation.
(6) Please keep the modules at a circumstance shown below Fig. 2
# APPENDIX-I-1
■ Pallet Ass’y
a) B/Ass’y Qty + Cushion / Box : 23pcs + 24pcs
b) B/Ass’y Qty / Pallet : 184pcs
c) Box Qty / Pallet : 8Box
ⓔ
ⓑ
X4
ⓒ ⓐ
ⓖ
ⓙ No. Description Material
ⓐ Pallet Plywood
ⓕ
ⓑ Cushion LDPE
ⓒ Desiccant Power Dry
ⓓ Top Packing EPS
ⓘ
ⓔ Bottom Packing EPS
ⓕ Angle Cover Single Wall
ⓗ ⓖ Band PP
ⓗ Clip Steel
ⓘ Wrap L-LDPE
ⓙ Label PP
# APPENDIX-Ⅰ- 2
■ Control PCB Packing Ass’y
2 Tray PET
3 Box Paper(SW)
# APPENDIX- II-1
■ Serial Label
20± 0.2mm
6± 0.2mm
1 2 3 4 5 6 7 8 9 10 11 12 13 14
20± 0.2mm
17mm
6± 0.2mm
43 6871L-5898***************
6871L-5898X
70 mm
xxxxxxxxxxxxxxxxxxxxxxxxxx
YYYY-MM-DD
XXXXX 92
100 mm
# APPENDIX- II-2
■ BOX Label
LC430EGQ-SMM3
QTY : 23
■ Pallet Label
LC430EGQ
SMM3
184 PCS 001/01-01
MADE IN CHINA RoHS Verified
XXXXXXXXXXXXX XXX
# APPENDIX- III
■ Required signal assignment for Flat Link (Thine : THCV215) Transmitter
time
FI-RE51(41)S-HF Timing
THCV215
Controller
or Compatible
100nF
8
Tx_n Rx_n
D[31:24]
Tx_p 100nF Rx_p
8
D[23:16] HTPDN
Tx’s HTPDN
8 Inner LOCKN
LOCKN
D[15:8] Strucure
8
D[7:0]
VCC
notes: 1. The LCD module uses a 100 nF capacitor on positive and negative lines of each receiver input.
2. Refer to Vx1 Transmitter Data Sheet for detail descriptions. (THCV215 or Compatible)
3. About Module connector pin configuration, Please refer to the Page 6.
# APPENDIX- IV -1
■ Option Pin Circuit Block Diagram
1KΩ
Data format select
Data format select
(Pin 22)
ASIC
75kΩ
(TCON)
# APPENDIX- IV -2
■ Option Pin Circuit Block Diagram
FI-RE51S-HF
Vcc : 3.3V
10kΩ
pin 1kΩ
#23
R1 ≤ 1kΩ 75kΩ
(0Ω recommand)
ASIC
(TCON)
1kΩ
HTPDN / LOCKN
(Pin 25,26)
ASIC
(TCON)
# APPENDIX- VI
Adjust Pattern /
- V4Dot Green Flicker / 511Gray
Gray Level
Position - Center
960Ch*12
(Single)
R G B R G B R G B R G B R G B R G B R G B R G B
Row1
Row2
Row3
Row4 511Gray
Row5
Row6 0Gray
Row8
(3840x RGBx2160)
Green is 511Gray Level
#12 ~ #7 #6 ~ #1 Adjusting to make Center Flicker optimized.
Source PCB R Source PCB L
SCL
PMIC
SDA
B A : Pull-up Resistors
(If it is necessary)
Adjustment JIG LCD Module B : I2C Connector
(Refer to Appendix IV)
# APPENDIX- VII
■ The reference method of BL dimming
It is recommended to use synchronous V-sync frequency to prevent waterfall
(Vsync * 2 =P-Dim Frequency)
# APPENDIX-VIII
■ FFC INFORMATION
- LCD Connector : TF06L-60S-0.5SH (manufactured by HIROSE) or GF05G-60S-E2000 (manufactured by LSM)
or PF050-L60B-C21 (manufactured by UJU) or 05002HR-H60Y (manufactured by YEONHO)
■ Drawing
- Material List
◈ Note
- Pad : GOLD Plating
- # ≥ Cpk 1.0
- ## ≥ Cpk 1.33
- Stiffener color : Sky Blue
- H-F
- Dimensions unit : mm
# APPENDIX-VIII-2
# APPENDIX- IX-1
TLOCK_INIT
HTPDN
LOCKN
…….…….
# APPENDIX- IX-2
T1 TLOCK T2
LOCKN
Vx1 Data
RGB Data Stable Clock Training RGB Data
(including align pattern)
填写单位: 填写人