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A Linearizing Digitizer for Wheatstone Bridge Based Signal Conditioning of

Resistive Sensors

Article  in  IEEE Sensors Journal · January 2017

DOI: 10.1109/JSEN.2017.2653227

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1696
A Linearizing Digitizer for Wheatstone Bridge
Based Signal Conditioning of Resistive Sensors
Ponnalagu Ramanathan Nagarajan, Boby George, Member, IEEE, and
Varadarajan Jagadeesh Kumar, Senior Member, IEEE
Abstract— Output of a typical Wheatstone bridge, when it is
connected to measure from a single or a dual resistive element,
possesses non-linear characteristic. This paper presents a novel
signal conditioning scheme, which provides a linear-digital output
directly from the resistive sensor(s) that are connected in such
bridge configurations. In the present scheme, the input stage
of a dual-slope analog-to-digital converter (DSADC) is suitably
augmented to incorporate the quarter-bridge and (or) half-bridge
containing the resistive sensor as an integral part of the DSADC.
A combination of the current mode excitation and wisely selected
integration and de-integration operations of the DSADC enable
to achieve linearization in the digitization process itself, leading
to an overall reduction in the complexity level and number of
blocks used keeping the high accuracy unaltered. A detailed
analysis has been conducted to quantify the effect of various
sources of errors in the output of the DSADC. The details are
presented in the paper. The proposed method not only provides a
linear digital output but also drastically reduces the effect on the
output due to the lead wires that connect the Wheatstone bridge
and the DSADC. Thus, the proposed scheme is well suited for
the situations where the sensor(s) is (are) remotely located at a
distance. Simulation studies as well as results from a prototype
developed and tested establish the practicality of the proposed
scheme. The inherent non-linearity of the Wheatstone bridge is
reduced by nearly two orders of magnitude.
Index Terms— Resistive sensor, Wheatstone bridge, digitizer,
quarter-bridge, half-bridge, linearization, dual-slope ADC.
I. I NTRODUCTION
U SE of a Wheatstone bridge to obtain an output as a
function of the parameter being sensed by a resistive
sensor is quite popular [1]. Push-pull type resistive sensors
in Wheatstone bridge form (either half-bridge or full-bridge)
provide an output that is linear with respect to the change in the
value of the resistive sensor [1], [2]. For interfacing single ele-
ment resistive sensors, the quarter-bridge configuration shown
in Fig. 1(a) is widely used. The half-bridge configuration
shown in Fig. 1(b) is useful, when two sensing elements
of same type are employed to achieve higher sensitivity [3].
Inspite of the fact that such configurations result in appreciable
nonlinearity in the output, due to number of advantages,
such arrangements are well accepted for signal condition-
ing of the resistive sensors such as Resistance Temperature
Detectors (RTDs), resistive gas sensors, strain gauges, piezo-
resistive sensors, Light Dependent Resistors (LDRs), Giant
Manuscript received October 12, 2016; accepted January 11, 2017. Date of
publication January 16, 2017; date of current version February 17, 2017. The
associate editor coordinating the review of this paper and approving it for
publication was Dr. Pantelis Georgiou.
The authors are with the Department of Electrical Engineering,
Indian Institute of Technology Madras, Chennai 600036, India (e-mail:
boby@ee.iitm.ac.in).
Digital Object Identifier 10.1109/JSEN.2017.2653227
1558-1748 © 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
IEEE SENSORS JOURNAL, VOL. 17, NO. 6, MARCH 15, 2017
Fig. 1. Wheatstone bridge configurations with inherent non-linear ouput
characterisctic: (a) quarter-bridge and (b) half-bridge.
Magneto Resistance (GMR) sensors, pressure sensors and flow
meters [3]–[6].
In general, the resistance Rx of a linear resistive
sensor shown in Fig. 1(a) and 1(b), can be represented as
Rx = R0 (1 ± kx), where k is the transformation constant of
the sensor, x is the quantity being sensed and R0 is the
nominal resistance of the sensing element (value of Rx when
the input x = 0). When the resistors in the other branches of
the bridge are set equal to R0 , the output Vo B of the bridge is:
VB kx
Vo B =   (1)
k B 1 + kx 2
In (1), V B is the excitation for the bridge and k B is the bridge
constant (k B = 4; quarter-bridge and k B = 2; half-bridge)
Equation (1) clearly shows that the bridge output Vo B will
be a non-linear function of the measurand [3]–[6], and the
transfer function of these bridge configurations will be a
hyperbolic function [7]. The non-linearity is small when the
percentage change in the resistive element is very small (kx
<<1), but becomes considerable as kx increases [5], [6]. For
example, if the full-scale change in Rx is 1 % of the nominal
value, then the worst case non-linearity error introduced in
the output is 0.5 % of the full-scale [3], [5]. The nonlinearity
can rise to 8 %, depending on the range of operation.
Various linearization techniques have been reported to
obtain a final linear output, from the bridge [3], [8], [9].
However, all these methods provide an analog output. Current
Mode Wheatstone Bridge (CMWB) based on duality concept
is reported [10]. CMWB uses only two resistive elements
instead of four in a Wheatstone bridge. CMWB employs cur-
rent conveyor circuits and requires a constant reference current
source [11]–[13], leading to a complex configuration. Change
in the value of the resistive sensing elements, connected in
Wheatstone bridge, can be converted into quasi digital signals
like frequency, time period or pulse width. But these types
of converter circuits are mostly reported for push-pull type
NAGARAJAN et al.: LINEARIZING DIGITIZER FOR WHEATSTONE BRIDGE BASED SIGNAL CONDITIONING OF RESISTIVE SENSORS
Fig. 2. Block diagram of the linearizing digitizer for single resistive sensor R x , connected in a Wheatstone bridge.
half-bridge and full-bridge sensors [14]–[16]. A linear
resistance to frequency converter, based on a relaxation oscilla-
tor has been developed and reported for single element in [17].
A similar, but low power converter reported in [18] does not
take care of the inherent non-linearity of the bridge. Most of
the present day instrumentation systems are of digital type
and hence it would be advantageous to obtain a linear direct
digital output from the resistive sensor element(s) connected
in the bridge form. Some of the methods proposed earlier for
quarter-bridge configurations use an internal comparator and
counter of a microcontroller and requires three charging and
discharging periods [19], [20]. A direct digital converter has
been presented in [21], but it is suitable only for resistive
sensors connected in full-bridge configuration. A linearizing
digitizer has been reported in [22], for obtaining a linear digital
output from two sensing elements that follow a polynomial
characteristic. The output of the sensors needs to be push-pull
in nature to apply the scheme in [22]. This approach [22] is
not useful in the case of quarter-bridge as these criteria are
not satisfied.
In applications such as measurement of temperature, the
sensor may be located far from the measurement unit and the
lead resistance of the wires will introduce appreciable errors in
the measurement [3]. The associated error will be large when
long lead wires are used especially with low valued resistive
sensors such as RTD-Pt100. Some of the existing three wire
and four wire connection methods allow compensation for the
lead resistances, but require additional leads and are effective
only when the additional supply and return leads have equal
resistance values [23]. Lead wire compensation methods pre-
sented earlier require additional diodes connected in parallel
to the sensor and hence the overall accuracy achievable is
limited [24], [25]. Moreover, these methods provide only an
analog output voltage. To interface such a sensor to a digital
instrumentation unit, an analog to digital converter is essential.
We now propose a new, simple, dual-slope technique based
linearizing digitizer that accepts resistive sensor element(s)
connected in a quarter-bridge or half-bridge form and provides
1697
a linear digital output directly proportional to the quantity
being sensed, for the full range of the measurand. In the new
scheme presented the Wheatstone bridge is driven by a con-
stant current and the inputs to the integrator of the dual-slope
arrangement during the integration and de-integration of the
conversion process are wisely selected by suitable switching
arrangements in such a way that the final output obtained is
linearly proportional to the measurand. The method possesses
all the advantages of the dual slope conversion technique
such as accuracy, resolution and immunity to power frequency
interference. Apart from these desirable characteristics, the
proposed scheme also provides the advantage of a bridge
based measurement, namely, the output can be temperature
compensated. Additionally the output of the proposed digitizer
is insensitive to lead wire resistances that connect the bridge
and the digitizer.
II. T HE P ROPOSED L INEARIZING D IGITIZER
The block schematic shown in Fig. 2 represents the
proposed linearizing digitizer suitable for Wheatstone bridge
with single resistive sensor. The sensor Rx is connected
between the nodes s and q of the Wheatstone bridge. The
resistance values of R1, R2 and R3 in the other three arms
of the bridge are selected to be equal to R0 . If temperature
compensation is required, then resistors R1, R2 and R3 must
have the same temperature coefficient of Rx and mounted
such that they are exposed to the same temperature as Rx .
In the proposed linearizing digitizer, the bridge is introduced
in the feedback path of opamp OA1 by connecting node p of
the bridge to the inverting input terminal and node q to the
output terminal of OA1 . Since the inverting input terminal of
OA1 is at virtual ground, the voltage Vp at node p will be
at ground potential. The current I flowing through the bridge
will be I = V R /Rin , where VR is a dc reference voltage. I ,
splits into branch currents i 1 and i 2 as indicated in Fig. 2.
As shown in Fig. 2, the linearizing digitizer consists of an
integrator formed by the opamp OA2 , resistor R I and capaci-
tor C I , a comparator OC and a Control and Logic Unit (CLU).
1698 IEEE SENSORS JOURNAL, VOL. 17, NO. 6, MARCH 15, 2017

Fig. 3. Waveforms at cardinal points of the linearizing digitizer for +kx.

As in a conventional dual slope converter, here too the CLU

has an in-built timer-counter unit. The timer-counter can be
N-digit Binary Coded Decimal (BCD) type if the output
required is intended for human interface or can be an n-bit
binary counter if the digitizer is to be interfaced to a digital
system directly. The input to the integrator is derived from
an INstrumentation Amplifier (INA) possessing a gain G.
The input of the INA is selected appropriately using three
Single Pole Double Throw (SPDT) switches S1 , S2 and S3
through the control signals v s1 , v s2 and v s3 by the CLU. As in a Fig. 4. Flow chart of the control logic of the linearizing digitizer.
typical dual slope technique, here too, to initiate a conversion,
the digitizer has to invoke an auto-zero phase to set the output At the start of T1 , the CLU sets the switches S1 and S3 to be
to zero [26]. in position ‘1’ and S2 to be in position ‘0’. In this condition,
as in Fig. 2, the voltages at the nodes s and r (v s and v r ) are
A. The Auto-Zero Phase applied to the inverting and non-inverting input terminals of
In the auto-zero phase, the CLU checks the status of the the INA, respectively. Since node p is at virtual ground, the
comparator output, v c . If v c is high (indicating a positive signals v s and v r are:
voltage at the output of integrator), the three switches S1 , S2
and S3 are set to position ‘1’. For this condition the output v s = −i 1 R1 = −i 1 R0 (2)
v 0 = Gv R1 , where G is the gain of the INA and v R1 is the vr = −i 2 R 2 = −i 2 R0 (3)
drop across R1 . A current i c = −Gv R1 /RI will flow into the
By using the current division rule, i 1 and i 2 can be derived
integrating capacitor C I . Hence capacitor C I will lose charge
as:
and the output of the integrator will reduce and reach zero  
as indicated by the ‘dashed’ line in Fig. 3. At this juncture R2 + R3 2I
i1 = I = (4)
(as soon as v oi reaches zero) the output v c of the comparator R + R2 + R3 + R x (4 + kx)
 1 
will flip from ‘high’ to ‘low’ as shown in Fig. 3. On the other R1 + R x I (2 + kx)
hand, if v c is ‘low’ at the start, the CLU sets all the switches i2 = I = (5)
R1 + R2 + R3 + R x (4 + kx)
(S1 , S2 and S3 ) in position ‘0’. For this condition the output
Substituting the values of i 1 and i 2 from (4) and (5) into (2)
of INA will be negative, injecting a current i c = +Gv R1 /R I
and (3), we get:
into C I . Once again C I will discharge and the output v oi of
the integrator will gradually rise and reach zero as indicated 2I R0
vs = − (6)
by the dotted line in Fig. 3. Once again, when v oi reaches zero, (4 + kx)
the output of the comparator v c will flip from ‘low’ to ‘high’. I R0 (2 + kx)
In either case, the flipping (high to low or low to high) of vr = − (7)
(4 + kx)
the output of the comparator indicates to the CLU, the end of
Thus, during the first integration period, the output v o is:
auto-zero phase and the CLU initiates a conversion as detailed
next. The flow chart of Fig. 4 clearly illustrates the logic of I R0 kx
v o = G (vr − v s ) = −G . (8)
auto-zero phase. (4 + kx)
B. The Conversion Phase This output v o of the INA sends a current i c = G R II(4+kx)
R0 kx

The conversion phase consists of a preset integration into capacitor C I . The capacitor C I gets charged and hence
period T1 followed by a measured de-integration period T2 . the output v oi of the integrator will rise as shown in Fig. 3.
NAGARAJAN et al.: LINEARIZING DIGITIZER FOR WHEATSTONE BRIDGE BASED SIGNAL CONDITIONING OF RESISTIVE SENSORS 1699

The output v oi of the integrator at the end of the preset The flowchart shown in Fig. 4, illustrates the conversion logic
integration time T1 will be: of the proposed linearizing digitizer. It is easily seen that at the
1 I R0 kx end of a conversion, the output of the integrator is zero and
v oi |T1 = G T1 (9) hence the next conversion can be initiated without invoking
R I C I (4 + kx)
the ‘auto-zero phase’. Thus when continuous conversion is
At the end of T1 , the CLU resets the timer. If kx is positive, performed, the auto-zero phase is invoked only once at the
v oi will be positive at the end of the first period of integration start.
and the output of the comparator v c will be ‘high’. Sensing v c
to be ‘high’, the CLU sets all the switches in position ‘1’ and C. Half-Bridge With Two Sensing Elements
starts the timer, for measuring the de-integration period T2 . Another widely used bridge configuration that possesses
For this condition the output v o of INA will be: significant non-linearity is the half-bridge with both sensors
  2I R0 having same polarity (i. e., not differential). This is clearly
vo = G v p − vs = G . (10)
(4 + kx) seen from (1). In the converter shown in Fig. 2, by keeping
2I R0 the existing sensor, if R2 is replaced by another sensor element
A current i c = −G (4+kx)R I
will flow into the capacitor CI and Rx = R0 (1 ± kx) as shown in Fig. 1(b) and other resistors
gradually discharge it. The integrator output will ramp-down are set as R1 = R3 = R0 , it gives a half-bridge as mentioned
and reach zero after a time period T2 as shown in Fig. 3. above. Now, if the converter presented is operated as explained
Once the integrator output reaches zero, the output v c of the earlier, it will provide a linear digital output proportional to
comparator will flip from ‘high’ to ‘low’ signalling the end of the measurand x, directly. Unlike the quarter-bridge, in this
the second ‘de-integration’. The CLU stops the timer and takes half-bridge configuration, the currents i 1 = i 2 = I /2. The
the timer value as T2 and sends it as the final digital output. switches S1 , S2 and S3 are kept in the same positions during
Since the charge acquired during T1 is discharged during T2 integration and de-integration periods as mentioned in the
we have: single active sensor case. The equations (6), (7) and (8) get
1 I R0 kx 1 2I R0 modified as i 1 = i 2 = I /2 and the integrator output voltage v oi
G T1 = G T2 . (11)
R I C I (4 + kx) R I C I (4 + kx) at the end of T1 can be as expressed as in (15). The change
in integrator voltage during T2 follows (16).
Rearranging (11), we get:
1 I R0 kx
kT1 v oi |T1 = G T1 (15)
T2 = x. (12) RI C I 2
2 1 I R0
Generally T1 is set in terms of N1 cycles of the clock given v oi |T2 = G T2 (16)
RI C I 2
to the counter with a period Tc as N1 Tc and the de-integration
By applying the charge balancing, as in the case of the
period is measured as N2 Tc . In such a case, (12) gets modified
quarter-bridge, the new duration T2 and the corresponding
as
count N2 for the half-bridge configuration can be obtained as
k N1 Tc in (17) and (18), respectively.
N2 Tc = x. (13)
2
T2 = kx T1 (17)
Resulting in:
  N2 = kx N1 (18)
k N1
N2 = x. (14) On comparing equations (14) and (18) with (1), it is clear
2
that the output obtained is linearly varying with respect to the
If we make kN1 /2 a constant, then the count N2 will directly input/measurand. Also, as expected it has double the sensitivity
indicate x. compared to the single element scheme. The operation of the
If x is negative, then v oi will be negative at the end of the DSADC is explained assuming that all the components used
first period of integration and the output of the comparator v c are ideal. However, in a practical implementation, errors will
will be ‘low’. Sensing v c to be ‘low’, the CLU sets all the three be introduced in the output due to the nonideal characteristics
switches to position ‘0’, during the de-integration.  For this of practical circuit components. Various sources of errors and
condition, the output v o of INA will be v o = G v s − v p = their effect in the final output that may arise due to the non-
2I R0 2I R0
−G (4+kx) and a current i c = G (4+kx)R I
will flow into ideal charatceristics of practical components are discussed
the capacitor CI and gradually discharge it. The integrator next.
output will now ramp-up and reach zero. Once the integrator
output reaches zero, the output v c of the comparator will flip III. S OURCES OF E RRORS AND T HEIR E FFECTS
from ‘low’ to ‘high’, once again signalling the end of the This section lists and analyses the parameters of the
‘de-integration’. Equations (11) to (14) are still valid and the measurement circuit and the bridge that would affect the per-
count N2 will indicate
 the input x with a constant of propor- formance of the linearizing digitizer. The parameters include:
tionality k N1 2 . The polarity of x is easily determined from offset voltages and bias currents of the opamps, INA and
the state of v c at the end of the first integration period T1 . comparator, ON resistance of the switches, delay of the
If v c is ‘high’ at the end of T1 then x is positive and if comparator and switches, uncertainty in reference voltage and
v c is ‘low’ at the end of T1 then polarity of x is negative. mismatch in the values of the resistors in the bridge.
1700 IEEE SENSORS JOURNAL, VOL. 17, NO. 6, MARCH 15, 2017

A. Effect of the Offset Voltages of Opamps, for I B2− , respectively, the resulting worst-case full-scale error
INA and Comparator calculated is 0.6 %.
⎡  ⎤
Let us consider that VO S1, VO S A , VO S2 are the input offset kx 1 + 3 IG B2− R I
+ I B A+

N1 ⎢  ⎥
I Ro 2I
⎢ k 2 x 2  I B A−
voltages of OA1 , INA and OA2 , respectively. In the presence of
⎥
VOS1 , the current I flowing into N2 ≈ ⎢+ 2 + I B2− R I
⎥ (23)
 the bridge will get modified 2 ⎣ I G I Ro ⎦
from V R Rin to (V R ± VO S1 ) Rin . Since I is present in both I B2− R I
+4 G I Ro
sides of (11), the effect will get cancelled, as long as VO S1
does not change within a conversion cycle. The input offset
voltage VO S A of the INA affects its output v o . Hence v o during C. Effect Due to the on Resistance of the Switches
T1 and T2 will get modified as in (19) and (20), in order.
While deriving (11) it was assumed that the switches are
v o = G (Vr − Vs ± VO S A ) (19) ideal. However, these switches will possess finite ON and
  leakage resistances. Since these switches feed into the input
v o = G V p − Vs ± VO S A (20)
terminals of an instrumentation amplifier the effect of these
Due to this change in v o and presence of VO S2, the integra- parameters on the output will be negligible.
tor output v oi during integration and de-integration will get
changed, which will modify the ideal output count N2 from
D. Effect of the Switch and Comparator Delays
N2 = (N1 /2) kx to as stated in (21).
    While deriving (11) we assumed that the comparator flips
∼ N1 VO S2 − GVO S A k2x 2
N2 = kx + 4 + 3kx + instantaneously when its input reaches zero and the switches
2 G I Ro 2 will also instantaneously change its state as soon as its
(21) control (v S1 or v S2 or v S3 ) flips. However, a practical com-
parator and a switch will have ‘propagation delay’ in changing
Thus the input offset voltage of INA and offset voltage of
OA2 introduces an offset and a gain error in the output the states. By properly selecting the comparator and the
switches, these delays can be made insignificant compared to
count. This error also has a non-linear term. When VO SA and
period Tc of the clock. For example, the comparator used in the
VO S2 are considered as 25 μV and 150 μV (typical values
of offset voltages of INA IC AD 624 and OP07), along with prototype has a delay time of 200 ns, similarly, the switch has
a delay of about 190 ns, negligible compared to the period Tc
G = 3, I = 2.5 mA and R0 = 100 , a worst-case full-scale
error of 0.05 % results in the calculated output. This can be of the clock which is 4 μs.
further reduced by increasing G or I . When an input offset
voltage VOSC is present in the comparator, the comparator E. Effect of Varitaion in DC Reference Voltage
will change its state when v oi crosses VOSC , instead of zero
voltage. This will not introduce any error in the measured The proposed linearizing digitizer uses  a dc reference
time period T2 as all the zero crossing detections will occur at voltage VR to generate the current, I = V R Rin . This current
VOSC instead of zero, either in the auto-zero phase or in the flows through the bridge, during T1 and T2 . As can be seen
conversion phase. in (11), the current I appears on both sides of the equal sign
and hence gets cancelled. This is valid as long as VR is stable
during one conversion cycle (T1 + T2 ). The worst case error
B. Effect of the Bias Current of Opamps and INA occurs when the reference voltage is V R ± V R during T1 and
Let I B1+ , I BA+ and I B2+ , be the input bias currents of the V R ∓ V R during T2 . Then the current I changes to I ± I
non-inverting inputs and I B1− , I B A− and I B2− be the input during T1 and I ∓I during T2 . With this, (11) becomes (24).
bias currents of the inverting inputs of the OA1 , INA and OA2 (I ± I ) R0 Gkx 2 (I ∓ I ) R0 G
respectively. I B1− will slightly modify the current I , but similar T1 = T2 . (24)
(4 + kx) R I C I (4 + kx) R I C I
to VO S1, I B1− will not affect the output of the linearizing  
digitizer. Due to the presence of bias currents I BA+ and I B A− , Rearranging (24), we get T2 = II ±I
∓I 2 T1 . and hence:
kx
the output v o of INA will not be affected during T1 if
I B A+ = I B A− . During T2 , due to the bias currents I B A+  
kx 2V R
and I B A− , the voltage v o gets modified as in (22). N2 = N1 1 ± . (25)
2 VR
G R0

vo = 2I + I B A− kx − I B A+ (22) By using a precision reference as V R , the  worst

(4 + kx)
I B2− of integrator OA2 will also affect the output of the
digitizer. Equation (23) gives the expression for the count N2
considering the presence of the bias currents. Equation (23)
is derived assuming that I B A+ = I B A− . Here too the bias
currents introduce an error in gain, an offset and a non-linear
term in the output. In the prototype, when a bias current of
15 nA is present for I B A− and I B A+ and 7 nA is present
 case
error in the count N2 , namely, ±kx N1 V R V R count can
be made negligible. However, most precision dc references
are affected by a change in the operating temperature. For
example, the dc reference voltage source LM385Z-2.5 has ppm
level variation in normal operation. But a 10 °C temperature
variation between the integration and de-integration periods
result in the reference voltage change (V R ) of 1 mV leading
to a worst case error of 0.04 % in the output.
NAGARAJAN et al.: LINEARIZING DIGITIZER FOR WHEATSTONE BRIDGE BASED SIGNAL CONDITIONING OF RESISTIVE SENSORS
Fig. 5. Remotely located bridge: RLead represents the resistance of the wire.
Nodes b and c can be shorted at the digitizer side and a single wire can be
used to connect to p. Same logic is applied to nodes f and g.
F. Effect Due to the Mismatch Between the
Resistances of Bridge
Equations (6) and (7) were derived based on the assumption
that R1 = R2 = R3 = R0 . However, in practice there may
be mismatch in the values of these resistors. Typically we
can represent R1 , R2 and R3 as R1 = α R0 , R2 = β R0
and R3 =γ R0 , respectively. Under such a condition, the output
count N2 can be expressed as in (26).
β β − αγ
N2 = kx N1 + (26)
α (β + γ ) α (β + γ )
Thus, due to the mismatch, there will be a gain error and offset
as seen in (26). In the prototype developed, matched precision
resistors having tolerance of 0.05 % were used to realize R1 ,
R2 and R3 . The resulting gain error and offset are 0.05 %
and 0.05 %.
IV. S IMULATION S TUDIES
The operation and functionality of the proposed linearizing
digitizer was first verified by simulating the circuit using
LTspice, a SPICE based simulation tool from Linear Tech-
nology Inc. In the simulation, the switch control logic was
generated using logic gates. An opamp having characteristics
equivalent to OP07 was chosen for realizing (in LTSpice) all
the opamps of the circuit shown in Fig. 2. For the comparator,
an opamp model closely matching to the performance of
LM311 was selected. In the circuit simulated, R0 , R1 , R2 and
R3 were set as 100  each. Then, the sensor resistance was
varied in steps of 10  from 100  to 200  and the time T2
taken for the de-integration for each case was recorded. From
the results obtained from simulation study, the worst-case error
observed in the output was found to be negligible.
In order to test the effect of the lead resistance of the
wires in the output, a simulation study was performed by
introducing lead resistances of value 50  between the bridge
nodes and measurement unit as shown in Fig. 5. When all the
arms of the bridge contain resistors having equal temperature
coefficient of resistance and are exposed to the same temper-
ature, automatic temperature compensation can be obtained.
Thus, the connection as in Fig. 5 is preferred, whenever large
variation in the operating temperature is expected. The results
1701
showed that the lead resistance has absolutely no effect on the
performance of the linearizing digitizer, except that there is a
slight increase in the output voltage of OA1 . In practice, all the
lead wires may not have equal resistance, so slight mismatches
were introduced in the RLead values of the five wires and
the simulation was repeated. The worst-case error remained
negligible. Thus, the study concludes that the lead resistance
and variation in its value (say with temperature) will not affect
the output of the scheme.
V. E XPERIMENTAL S ET-U P AND R ESULTS
To test the efficacy of the proposed linearizing digitizer,
a prototype of the digitizer, shown in Fig. 2, has been
developed and tested in the laboratory.
A. Prototype of the Digitizer
The dc reference voltage of 2.5 V was derived from a dc
reference voltage diode LM385Z-2.5. The INA was realized
using three low offset voltage opamp ICs OP07. OA1 and
OA2 were also realized using OP07. IC LM311 was chosen
as the comparator. IC MAX4602 was used to implement the
switches. The input resistance Rin was selected as 1.0 k,
RI was chosen as 100 k and a 100 nF polypropylene type
capacitor was used for CI . The control and logic unit was
implemented using an Arduino micro-controller [27]. For this,
a suitable program was developed, based on the flowchart
shown in Fig. 4, and embedded into the Arduino Uno board.
The internal timer-counter unit of the Arduino board was
used to set the time period T1 and to measure T2 . The
prototype digitizer developed has been tested in three stages.
In Test 1, the prototype was interfaced with a resistance box
that emulates the sensor. In Test 2, studies were conducted to
quantify the effect of the lead wire resistance on the output of
the prototype unit. Then, in Test 3, a prototype displacement
sensor, based on a potentiometric transduction mechanism,
has been developed in the laboratory and interfaced with the
prototype digitizer and tested. The details of these three tests
are presented next.
B. Test 1: Digitizer Interfacted to an Emulated Sensor
In order to characterize the prototype digitizer, it was
interfaced with a standard variable resistance box and tested.
A precision decade resistance box (resolution of 1 , accuracy
of ± 0.01 %) manufactured by Otto Wolff, Berlin, Germany,
was used to emulate the sensor resistance Rx . The nominal
resistance R0 was set as 100 . Three precision resistors, each
of value 100  having a tolerance of 0.05 % served as R1, R2
and R3 of the bridge. In the test, Rx was varied in steps of
10  from 100  to 200  (100 , 110 , 120  ... 200 ) so
as to simulate a variation of kx in the range of 0 to 1, in steps
of 0.1. For each value of Rx set, using the resistance box,
the output count N2 of the digitizer was noted. The results
obtained are plotted in Fig. 6a. For the range of kx tested,
the output voltage Vo B was calculated as per the conventional
method given by (1), taking V B = 2.5 V. Fig. 6a also shows the
values of Vo B obtained corresponding to each kx. Using regres-
sion analysis, best linear fit was obtained for N2 and Vo B .
1702
Fig. 6. (a) Experimental results obtained from the emulation study. (b) Error
characteristic obtained from the emulation study, for the conventional and
proposed schemes.
Fig. 7. Output of the integrator and comparator of the prototype digitizer.
for kx = 1.
The same are indicated in Fig. 6a. The deviation from best fit
was obtained for each value of N2 and Vo B and the resultant
nonlinearity error as percentage was calculated and plotted
in Fig. 6b. The results show that the worst-case non-linearity
was < ± 0.14 % for the proposed digitizer, while it was 7.6 %
for the conventional method. A snapshot of the oscilloscope
displaying the integrator and comparator outputs for kx = 1
was taken and is shown in Fig. 7. From this study, it is
clearly seen that the output obtained from the proposed scheme
is linear, while the conventional method suffers from large
non-linearity.
C. Test 2: Study on Effect of the Lead Resistance
The effect of lead resistance on the performance of
the digitizer was studied by introducing five resistors of
value ∼
= 50  (RLead ) between the bridge and the digitizer
IEEE SENSORS JOURNAL, VOL. 17, NO. 6, MARCH 15, 2017
Fig. 8. Experimental setup of the prototype linearizing digitizer. A zoom-in
view of the potentiometer - Vernier Caliper arrangement is shown
inset (top right).
Fig. 9. (a) Experimental results obtained from the prototype linearizing dig-
itizer integrated with a resistive displacement sensor. (b) Error characteristic
of the conventional method and output of the prototype linearizing digitizer
integrated with a resistive displacement sensor.
as shown in Fig. 5. These resistors emulate the lead resistance
RLead of long wires. The measurement process was repeated
for the same kx values tested earlier and the output counts N2
were noted. The counts obtained with and without the presence
of lead resistance were same, as expected.
D. Test 3: Results Obtained From the Digitizer Interfaced to
a Resistive Displacement Sensor
In this study, first, a simple resistive displacement sensor
was developed using a linear slide wire type potentiometer
(1 k) manufactured by Bourns, Inc. In order to get a refer-
ence value for the displacement, a digital Vernier caliper, from
NAGARAJAN et al.: LINEARIZING DIGITIZER FOR WHEATSTONE BRIDGE BASED SIGNAL CONDITIONING OF RESISTIVE SENSORS 1703

TABLE I
A C OMPARISON S TUDY

Sparkfun Electronics, having a range of 0 mm to 150 mm and
a resolution of 0.01 mm was employed. The sliding contact of
the potentiometer was firmly attached to the depth measuring
blade of the Vernier caliper. Thus, by adjusting the thumb
screw of the caliper, the sliding contact of the potentiometer
can be set for different values of displacement. A photograph
of the prototype digitizer integrated with the displacement
sensor described above is shown in Fig. 8. The nominal value
of the sensor R0 is selected as 1 k. Hence R1, R2 and R3
are also selected as 1 k resistances. In the sensor arm of the
bridge, a series combination of a 1 k potentiometer and a
fixed 1 k resistor is used. The series combination realizes
a sensor whose resistance is Rx = 1000 (1 + kx) , with kx
varying from 0 to 1 as the potentiometer resistance varies from
0  to 1000 .
Since the potentiometer had a full scale travel of 44 mm,
using the vernier calliper, the sliding contact of the poten-
tiometer was moved in steps of 4.4 mm from 0 mm to
44 mm. This movement corresponds to a kx variation from
0 to 1 in steps of 0.1. The equivalent variation in sensor
resistance was 0  to 1000  in steps of 100 . For each
position of the sliding contact, the output count provided by
the digitizer was noted. The results obtained are plotted as a
function of kx as shown in Fig. 9a. Here too, linear regression
analysis was applied to the data and the best-fit line was
obtained and plotted in Fig. 9a. Once again the nonlinearity
error was computed from the deviations of the measured
data from the best fit line and plotted in Fig. 9b. The worst
case nonlinearity error of measuring the displacement of the
potentiometer sliding contact is found to be 0.09 %. It is seen
that the error obtained with a practical displacement sensor
is lower than that obtained for an emulated sensor shown
in Fig. 6b. The reason is while the nominal value of the
sensor resistance was selected as 100  in emulation study,
here the nominal value of the sensor resistance is 1000 ,
an order of magnitude higher. As can be seen in the error
analysis [vide equations (17) and (19)], the error is inversely
proportional to R0 . Thus increasing R0 for the displacement
1704
sensors to 10 times that of the sensor used for the emulation
study resulted in reduced errors. The test results show that
the non-linearity in the output of the conventional Wheatstone
bridge is automatically reduced by a significant amount (more
than a factor of 50 for the prototype) by using the proposed
linearizing digitizer.
There are plenty of resistive sensors available in the market
that undergoes wide change in their value of resistance as a
function of the measurand. Some examples are (a) Resistance
Temperature Detector (RTD) whose resistance change from
18.5  to 390.5  for a temperature change of −200 °C
to + 850 °C [28]. (b) Typical GMR sensors have 10 % to
20 % change in their sensing resistance depending on the
value of the magnetic field being sensed [29]. (c) Potentiome-
ter type displacement sensor, Novotechnik TR100 is another
example [30]. (d) Some of the resistance based air quality
sensors have one or more decades of change in resistance as
a function of the measurand [31], [32]. For such sensors, the
quarter-bridge is not recommended as its output is linear only
for very small change in the resistance value (kx << 1). The
proposed digitizer is an ideal choice as it can be interfaced with
a quarter-bridge and a linear digital output can be obtained
even for a wide range of change in the resistance of the sensor.
VI. D ISCUSSION
The performance of the proposed linearizing digitizer is
compared on various parameters like % non- linearity error,
range of resistance variation, effect of lead resistance, cir-
cuit complexity, type of the output, etc. with other reported
works attempting to provide linear output from single element
sensors connected in non-linear bridge configurations. The
details are given in Table I. In most of the methods reported
either analog or quasi-digital outputs are obtained, which
further requires an ADC or a suitable interface to convert
into a digital output. A direct digital output proportional to
the resistance is obtained in [20], but the process is time
consuming involving 3 charging and 3 discharging operations.
The accuracy of the scheme is not satisfactory especially in the
presence of lead wire resistance [20]. Output of the methods
presented in [7]–[9], [17], [18] and [33] suffer from lead wire
resistance and its variation due to temperature. A basic idea
of using current driven Wheatstone bridge and its variants
are discussed in [10]–[13]. If designed with care, such as
matched resistors, it is expected to work with single and
two resistance elements. Experimental studies are required
to verify the performance in detail. The scheme proposed
in [21] can provide a linear characteristic only for resistive
sensors that are connected in a full-bridge form. The output
will be highly non-linear if it is used to interface a wide range
resistive sensor connected in a quarter-bridge. The circuit
in [21] is slightly complex as it uses a modified INA. Also, the
scheme in [21] requires special compensation circuit to keep
the effect of lead wire resistance in the output low. Using the
technique proposed in this paper a linear output is obtained
from the half and quarter-bridge, even if it is remotely located,
without using any additional hardware or compensation.
In the proposed scheme, the linearization automatically occurs
during the digitization process and hence the overall number
IEEE SENSORS JOURNAL, VOL. 17, NO. 6, MARCH 15, 2017
of blocks required is much lower compared to the conventional
method involving individual units for signal conditioning,
digitization and linearization in a sequence. These features
make the linearizing digitizer as one of the best interfacing
scheme for remotely located sensors such as RTDs. The update
rate for the prototype linearizing digitizer developed is about
3 conversions per second, for a system clock frequency of
250 kHz and the effective number of bits obtained from the
digitizer is 14.9.
VII. C ONCLUSION
Even though the bridge-based signal conditioning of resis-
tive sensors is in use for several decades, there exists no
simple and effective linearization scheme that can provide a
digital output, directly, from a bridge configuration that has
a non-linear output characteristic. A linearizing direct digital
converter suitable for resistive sensors, when connected in a
quarter-bridge or half-bridge configuration is proposed in this
paper. As the title indicates, the scheme presented here not
only digitizes the measurand, but also linearize the output of
the Wheatstone bridge which otherwise possesses a significant
inherent nonlinearity. The output of the digitizer is independent
of the bridge lead resistance, thus, it is well suited for resistive
sensors that are remotely located from the converter. As the
analog-to-digital conversion employed is based on dual-slope
technique, the proposed scheme will have all the advantages
and limitations of a dual-slope ADC. A prototype of the
proposed system has been built and tested. All the possible
sources of errors have been identified and the resulting error
from each source has been analysed and quantified. The results
from the error analysis, simulation and experimental studies
established practicality of the scheme.
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1705
Ponnalagu Ramanathan Nagarajan received the
B.E. degree in electrical and electronics engineer-
ing from Madurai Kamaraj University, Madurai,
India, in 2000, and the M.E. degree in electronics
and control from Sathyabama University, Chennai,
India, in 2005. She is currently pursuing the Ph.D.
degree with the Department of Electrical Engineer-
ing, Indian Institute of Technology Madras. She has
been an Assistant Professor with the Department of
Electrical and Electronics Engineering, Rajalakshmi
Engineering College, Chennai, since 2000. Her cur-
rent research interests include sensors, signal conditioning, measurements, and
instrumentation.
Boby George (M’07) was born in Kannur, India, in
1977. He received the M.Tech. and Ph.D. degrees
in electrical engineering from the Indian Institute
of Technology (IIT) Madras, Chennai, India, in
2003 and 2007, respectively. He was a Post-Doctoral
Fellow with the Institute of Electrical Measurement
and Measurement Signal Processing, Technical Uni-
versity of Graz, Graz, Austria, from 2007 to 2010.
He joined the Faculty of the Department of Elec-
trical Engineering, IIT Madras, in 2010, where he
is currently an Associate Professor. His areas of
interests include measurements, sensors, and instrumentation.
Varadarajan Jagadeesh Kumar (M’96–SM’11)
received the B.E. degree in electronics and com-
munication engineering from the College of Engi-
neering, Guindy, in 1978, the M.Tech. and Ph.D.
degrees from the Indian Institute of Technology (IIT)
Madras, in 1980 and 1986, respectively. He was
with the King’s College London in 1988, the Asian
Institute of Technology, Bangkok, in 1996, the Uni-
versity of Braunschweig in 1998, and the University
of Aachen in 1999, 2007, 2011, and 2013. He is
currently a Professor of Electrical Engineering with
IIT Madras, where he heads the Central Electronics Center and serves as the
Dean Academic. He has guided seven Ph.D. scholars and 11 M.S. (Research)
scholars and has published over 50 journal articles (mostly in IEEE Journals)
and presented over 90 papers at International Conferences. He holds six
patents. His areas of interests are measurements, instrumentation, biomedical
engineering, and signal processing. He received the Young Scientist Award
from the Department of Science and Technology in 1988 and the DAAD
Fellowship Award in 1997.