// 4-bit full adder using concatenation

module f_a(input [3:0] a,b, input c_in, output [3:0] sum, output c_out);

assign {c_out,sum} = a + b + c_in;

endmodule

//4_1 mux using conditional assignment

module mux_4_1(input [3:0] in, input s0, s1, output out);

assign out = s1 ? (s0? in[3] : in[2]) : (s0 ? in[1] : in[0] );

endmodule

//full adder using conditional operator

module fa_c(input a,b, c_in, output sum ,c_out);

assign sum = a ? ~(b^c_in) : (b^c_in);

assign c_out = c_in ? (a | b) : (a&b);

endmodule