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4H
3H is2
20H C
0H
6H 5H
Solution:
Problem-1: Obtain the equivalent inductance across AB of the magnetically coupled circuit. If this circuit is excited by
a source 𝑣(𝑡) = 200 sin(100𝑡)𝑉. Find the energy stored in the circuit at 𝑡 = 5𝑚𝑠.
K=0.5
A B
k k
50mH
i1
Coil-1 Coil-3
Coil-2
ɸ1
i1
Coil-1
ɸ2
(Lenz s Law)
i2
Coil-2
To obtain the dotted terminals of the coil-3:
ɸ1
i1 ɸ3 (Lenz s Law)
Coil-1 Coil-3
M31
A B
Coil-1 Coil-3
M12 M23
Coil-2
M31
M12 M23
i(t)
A B
L1 = 200mH L2 = 50mH L3 = 100mH
+ -
𝑑𝑖 𝑑𝑖 𝑑𝑖 𝑑𝑖 𝑑𝑖 𝑑𝑖 𝑑𝑖 𝑑𝑖 𝑑𝑖
𝑣(𝑡) = (𝐿1 + 𝑀12 − 𝑀31 ) − (𝐿2 + 𝑀12 − 𝑀23 ) − (𝐿3 − 𝑀31 − 𝑀23 ) = 0
𝑑𝑡 𝑑𝑡 𝑑𝑡 𝑑𝑡 𝑑𝑡 𝑑𝑡 𝑑𝑡 𝑑𝑡 𝑑𝑡
𝑑𝑖
So, 𝑣 = [(𝐿1 + 𝑀12 − 𝑀31 ) + (𝐿2 + 𝑀12 − 𝑀23 ) + (𝐿3 − 𝑀31 − 𝑀23 )] 𝑑𝑡
𝐿𝑒𝑞 = 237.88 𝑚𝐻
K=0.5
I1 j10 j10
I2
L2 = 50mH
+
3 90°A
-j5 20 0° V
ω=1000 rad/s
I3 -
j5
I1 j10 j10
I2
L2 = 50mH
+ +
j12 -j5 I2 20 0° V
I1
- I3 -
4 + j5 j10 I1 j12
j10 8 + j 5 I = 20
2
∆= 107 + 𝑗60, ∆1 = −60 − 𝑗296, ∆2 = 40 − 𝑗100
∆1
𝐼1 = = 2.462∠72.18° 𝐴
∆
∆2
𝐼2 = = 878∠ − 97.48° 𝑚𝐴
∆
𝐼3 = 𝐼1 − 𝐼2 = 3.329∠74.89° 𝐴
𝑖1 (𝑡) = 2.462√2 cos(𝜔𝑡 + 72.18°) 𝐴
So at 𝑡 = 2 𝑚𝑠:
𝑖1 (𝑡 = 2 × 10−3 ) = −3.46 𝐴
𝑖2 (𝑡 = 2 × 10−3 ) = 1.187 𝐴
The total energy stored in the coupled inductor:
1 1
𝑊 = 𝐿1 𝑖12 + 𝐿2 𝑖22 + 𝑀𝑖1 𝑖2
2 2
Given: 𝑗𝜔𝐿1 = 𝑗10
10
𝐿1 = = 10 𝑚𝐻 = 𝐿2
1000
5
𝑀= = 5 𝑚𝐻
1000
So,
1 1
𝑊= × 10 × 10−3 (−3.460)2 + × 10 × 10−3 × (1.187)2 + 5 × 10−3 (−3.460)(1.187)
2 2
𝑊 = 59.858 × 10−3 + 7.045 × 10−3 − 20.654 × 10−3
Problem-3: A circuit is to be designed that will generate an odd parity bit for a 4-bit binary input, i.e. the parity bit P
should be 1 if the 4-bit input has an even number of 1’s, else P=0
Solution-3: (a) The truth table odd parity detection for 4-bit binary numbers
No simplification possible
Solution-4: Given Boolean function: F(A, B, C, D) = Σm(1, 2, 5, 8, 10, 14) + Σd(6, 7, 15)
(a) A 16 × 1 MUX has 4 selection lines (𝑆3 , 𝑆2 , 𝑆1 , 𝑆0 ) to select one of 16 inputs (𝐼0 … 𝐼15 ) to appear at the
single output. For realizing a Boolean function, the input variables (A, B, C, D) are applied to the selection
lines with the input indices of 16 × 1 MUX corresponding to the minterms present are connected to logic 1
and the input indices corresponding to missing minterms are connected to logic 0, whereas inputs
corresponding to the don’t cares can be connected to either logic 1 or logic 0. The logic diagram is shown
below:
(b) A 8 × 1 MUX has 3 selection lines to select one of 8 inputs to appear at the single output. Let us
choose variable ‘A’ to be connected to the MUX inputs while the remaining 3 variables (B, C, D) are
applied to selection lines (𝑆2 , 𝑆1 , 𝑆0 ). For determining the MUX inputs, the implementation table is
shown below:
𝐼0 𝐼1 𝐼2 𝐼3 𝐼4 𝐼5 𝐼6 𝐼7
(000) (001) (010) (011) (100) (101) (110) (111)
𝐴̅ 0 1 2 3 4 5 6 7
𝐴 8 9 10 11 12 13 14 15
MUX
𝐴 𝐴̅ 1 0 0 𝐴̅ 1 0
inputs
Note: We encircle only those don’t cares which can be combined with true minterms to get simplified input
to MUX.
(c) A 4 × 1 MUX has 2 selection lines to select one of 4 inputs to appear at the single output. Let us choose
variables ‘A’ and ‘B’ to be connected to the MUX inputs while the remaining 2 variables (C, D) are applied to
selection lines. For determining the MUX inputs, the implementation table is Shown below:
𝐼0 𝐼1 𝐼2 𝐼3
(00) (01) (10) (11)
𝐴̅𝐵̅ 0 1 2 3
𝐴̅𝐵 4 5 6 7
𝐴𝐵̅ 8 9 10 11
𝐴𝐵 12 13 14 15
MUX
𝐴𝐵̅ 𝐴̅ 1 0
inputs