D D D D D D D D D D: Tlc226X, Tlc226Xa Advanced Lincmos Rail-To-Rail Operational Amplifiers

TLC226x, TLC226xA
Advanced LinCMOS RAIL-TO-RAIL

OPERATIONAL AMPLIFIERS
SLOS177D – FEBRUARY 1997 – REVISED MARCH 2001
D Output Swing includes Both Supply Rails D Low Input Offset Voltage
D Low Noise . . . 12 nV/√Hz Typ at f = 1 kHz 950 µV Max at TA = 25°C (TLC2262A)
D Low Input Bias Current . . . 1 pA Typ D Macromodel Included
D Fully Specified for Both Single-Supply and D Performance Upgrade for the TS27M2/M4
Split-Supply Operation and TLC27M2/M4
D Low Power . . . 500 µA Max D Available in Q-Temp Automotive
D Common-Mode Input Voltage Range
HighRel Automotive Applications
Configuration Control/Print Support
Includes Negative Rail
Qualification to Automotive Standards
description EQUIVALENT INPUT NOISE VOLTAGE

vs
The TLC2262 and TLC2264 are dual and FREQUENCY
quadruple operational amplifiers from Texas 60
Instruments. Both devices exhibit rail-to-rail VDD = 5 V
nv//HzHz
output performance for increased dynamic range RS = 20 Ω
in single- or split-supply applications. The TA = 25°C
V n – Equivalent Input Noise Voltage – nV/

50
TLC226x family offers a compromise between the
micropower TLC225x and the ac performance of
the TLC227x. It has low supply current for 40
battery-powered applications, while still having
adequate ac performance for applications that 30
demand it. The noise performance has been
dramatically improved over previous generations
of CMOS amplifiers. Figure 1 depicts the low level 20
of noise voltage for this CMOS amplifier, which
has only 200 µA (typ) of supply current per
10
amplifier.
VN
The TLC226x, exhibiting high input impedance

0
and low noise, are excellent for small-signal 10 102 103 104
conditioning for high-impedance sources, such as f – Frequency – Hz
piezoelectric transducers. Because of the micro-
power dissipation levels, these devices work well Figure 1
in hand-held monitoring and remote-sensing
applications. In addition, the rail-to-rail output feature with single or split supplies makes this family a great
choice when interfacing with analog-to-digital converters (ADCs). For precision applications, the TLC226xA
family is available and has a maximum input offset voltage of 950 µV. This family is fully characterized at 5 V
and ± 5 V.
The TLC2262/4 also makes great upgrades to the TLC27M2/L4 or TS27M2/L4 in standard designs. They offer
increased output dynamic range, lower noise voltage and lower input offset voltage. This enhanced feature set
allows them to be used in a wider range of applications. For applications that require higher output drive and
wider input voltage range, see the TLV2432 and TLV2442. If your design requires single amplifiers, please see
the TLV2211/21/31 family. These devices are single rail-to-rail operational amplifiers in the SOT-23 package.
Their small size and low power consumption, make them ideal for high density, battery-powered equipment.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Advanced LinCMOS is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date. Copyright  2001, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments On products compliant to MIL-PRF-38535, all parameters are tested
standard warranty. Production processing does not necessarily include unless otherwise noted. On all other products, production
testing of all parameters. processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

TLC226x, TLC226xA
TLC2262 AVAILABLE OPTIONS

PACKAGED DEVICES
VIOmax SMALL CHIP CERAMIC PLASTIC CERAMIC
TA TSSOP
AT 25°C OUTLINE CARRIER DIP DIP FLATPACK
(PW)
(D) (FK) (JG) (P) (U)
0°C to 70°C 2.5 mV TLC2262CD — — TLC2262CP TLC2262CPW —
950 µ
µV TLC2262AID — — TLC2262AIP TLC2262AIPW —
– 40°C to 125°C
2.5 mV TLC2262ID — — TLC2262IP — —
950 µ
µV TLC2262AQD — — — — —
– 40°C to 125°C
2.5 mV TLC2262QD — — — — —
950 µV — TLC2262AMFK TLC2262AMJG — — TLC2262AMU
– 55°C to 125°C
2.5 mV — TLC2262MFK TLC2262MJG — — TLC2262MU
The D packages are available taped and reeled. Add R suffix to device type (e.g., TLC2262CDR). The PW package is available only left-end taped
and reeled. Chips are tested at 25°C.
TLC2264 AVAILABLE OPTIONS

PACKAGED DEVICES
VIOmax SMALL CHIP CERAMIC PLASTIC CERAMIC
TA TSSOP
AT 25°C OUTLINE CARRIER DIP DIP FLATPACK
(PW)
(D) (FK) (J) (N) (W)
0°C to 70°C 2.5 mV TLC2264CD — — TLC2264CN TLC2264CPW —
950 µ
µV TLC2264AID — — TLC2264AIN TLC2264AIPW —
– 40°C to 125°C
2.5 mV TLC2264ID — — TLC2264IN — —
µV
950 µ TLC2264AQD — — — — —
– 40°C to 125°C
2.5 mV TLC2264QD — — — — —
950 µV — TLC2264AMFK TLC2264AMJ — — TLC2264AMW
– 55°C to 125°C
2.5 mV — TLC2264MFK TLC2264MJ — — TLC2264MW
The D packages are available taped and reeled. Add R suffix to device type (e.g., TLC2264CDR). The PW package is available only left-end taped
and reeled. Chips are tested at 25°C.
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC226x, TLC226xA
TLC2262C, TLC2262AC TLC2262M, TLC2262AM . . . FK PACKAGE

TLC2262I, TLC2262AI (TOP VIEW)
TLC2262Q, TLC2262AQ
VDD+
1OUT
D, P, OR PW PACKAGE
NC
NC
NC
(TOP VIEW)
1OUT 1 8 VDD + 3 2 1 20 19
NC 4 18 NC
1IN – 2 7 2OUT
1IN – 5 17 2OUT
1IN + 3 6 2IN –
NC 6 16 NC
VDD – /GND 4 5 2IN +
1IN + 7 15 2IN –
NC 8 14 NC
9 10 11 12 13
VDD– /GND
2IN+
NC
NC
NC
NC – No internal connection
TLC2262M, TLC2262AM . . . JG PACKAGE TLC2262M, TLC2262AM . . . U PACKAGE

(TOP VIEW) (TOP VIEW)
1OUT 1 8 VDD + NC 1 10 NC
1IN – 2 7 2OUT 1OUT 2 9 VCC +
1IN + 3 6 2IN – 1IN – 3 8 2OUT
VDD – /GND 4 5 2IN + 1IN + 4 7 2IN –
VCC – /GND 5 6 2IN +
TLC2264C, TLC2264AC
TLC2264I, TLC2264AI TLC2264M, TLC2264AM . . . FK PACKAGE
TLC2264Q, TLC2264AQ (TOP VIEW)
D, N, OR PW PACKAGE TLC2264M, TLC2264AM . . . J OR W PACKAGE
1OUT
4OUT
1IN –
4IN –
(TOP VIEW) (TOP VIEW)
NC
1OUT 1 14 4OUT 1OUT 1 14 4OUT 3 2 1 20 19

1IN – 2 13 4IN – 1IN – 2 13 4IN – 1IN + 4 18 4IN +
1IN + 3 12 4IN + 1IN + 3 12 4IN + NC 5 17 NC
VDD + 4 11 VDD – / GND VDD + 4 11 VDD – / GND VCC + 6 16 VCC – /GND
2IN + 5 10 3IN + 2IN + 5 10 3IN + NC 7 15 NC
2IN – 6 9 3IN – 2IN – 6 9 3IN – 2IN + 8 14 3IN +
9 10 11 12 13
2OUT 7 8 3OUT 2OUT 7 8 3OUT
2IN –
3IN –
2OUT
NC
3OUT

TLC226x, TLC226xA
equivalent schematic (each amplifier)

VDD +
Q3 Q6 Q9 Q12 Q14 Q16
IN +
OUT
C1
IN – R5
Q1 Q4
Q13 Q15 Q17
D1
Q2 Q5 Q7 Q8 Q10 Q11
R3 R4 R1 R2
VDD – / GND
ACTUAL DEVICE COMPONENT COUNT†

COMPONENT TLC2262 TLC2264
Transistors 38 76
Resistors 28 56
Diodes 9 18
Capacitors 3 6
† Includes both amplifiers and all ESD, bias, and trim circuitry

TLC226x, TLC226xA
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD + (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
Supply voltage, VDD – (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 8 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 16 V
Input voltage, VI (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD– – 0.3 V to VDD+
Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 5 mA
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Total current into VDD + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Total current out of VDD – . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C
Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, P, and PW packages . . . . . . . 260°C
J, JG, U, and W packages . . . . . . . 300°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VDD+ and VDD – .
2. Differential voltages are at IN+ with respect to IN –. Excessive current flows if input is brought below VDD – – 0.3 V.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DISSIPATION RATING TABLE

TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 85°C TA = 125°C
PACKAGE
POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING POWER RATING
D–8 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW
D–14 950 mW 7.6 mW/°C 608 mW 494 mW 190 mW
FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
J 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW
N 1150 mW 9.2 mW/°C 736 mW 598 mW 230 mW
P 1000 mW 8.0 mW/°C 640 mW 520 mW 200 mW
PW–8 525 mW 4.2 mW/°C 336 mW 273 mW 105 mW
PW–14 700 mW 5.6 mW/°C 448 mW 364 mW 140 mW
U 700 mW 5.5 mW/°C 452 mW 370 mW 150 mW
W 700 mW 5.5 mW/°C 452 mW 370 mW 150 mW
recommended operating conditions

C SUFFIX I SUFFIX Q SUFFIX M SUFFIX
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
Supply voltage, VDD ± ± 2.2 ±8 ± 2.2 ±8 ± 2.2 ±8 ± 2.2 ±8 V
Input voltage range, VI VDD – VDD + – 1.5 VDD – VDD + – 1.5 VDD – VDD + – 1.5 VDD – VDD + – 1.5 V
Common-mode input voltage, VIC VDD – VDD + – 1.5 VDD – VDD + – 1.5 VDD – VDD + – 1.5 VDD – VDD + – 1.5 V
Operating free-air temperature, TA 0 70 – 40 125 – 40 125 – 55 125 °C

TLC226x, TLC226xA
TLC2262C electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise

noted)
TLC2262C
PARAMETER TEST CONDITIONS TA† UNIT
MIN TYP MAX
25°C 300 2500
VIO Input offset voltage µV
Full range 3000
25°C
αVIO Temperature coefficient of input offset voltage 2 µV/°C
to 70°C
Input offset voltage long-term drift VIC = 0, VDD ± = ± 2.5 V, 25°C 0.003 µV/mo
(see Note 4) VO = 0, RS = 50 Ω
25°C 0.5
IIO Input offset current pA
Full range 100
25°C 1
IIB Input bias current pA
Full range 100
0 – 0.3
25°C to to
4 4.2
VICR Common mode input voltage range
Common-mode RS = 50 Ω
Ω, |VIO| ≤ 5 mV V
0
Full range to
3.5
IOH = – 20 µA 25°C 4.99
25°C 4.85 4.94
IOH = – 100 µA
VOH High-level output voltage Full range 4.82 V
25°C 4.70 4.85
IOH = – 400 µA
Full range 4.60
VIC = 2.5 V, IOL = 50 µA 25°C 0.01
25°C 0.09 0.15
VIC = 2
2.5
5VV, IOL = 500 µA
Full range 0.15
VOL Low-level output voltage
VIC = 2
2.5
5VV, IOL = 1 mA 25°C
Full range
0.2 0.3
0.3
V
VIC = 2
2.5
Full range
0.7 1
1.2
25°C 80 170
2 5 V,
VIC = 2.5 V RL = 50 kΩ‡
AVD Large-signal
g g differential voltage
g amplification Full range 55 V/mV
VO = 1 V to 4 V
RL = 1 MΩ‡ 25°C 550
ri(d) Differential input resistance 25°C 1012 Ω
ri(c) Common-mode input resistance 25°C 1012 Ω
ci(c) Common-mode input capacitance f = 10 kHz, P package 25°C 8 pF
zo Closed-loop output impedance f = 100 kHz, AV = 10 25°C 240 Ω
VIC = 0 to 2.7 V,, VO = 2.5 V,, 25°C 70 83
CMRR Common mode rejection ratio
Common-mode dB
RS = 50 Ω Full range 70
VDD = 4.4 V to 16 V,, 25°C 80 95
kSVR Supply voltage rejection ratio (∆VDD/∆VIO)
Supply-voltage dB
VIC = VDD /2, No load Full range 80
25°C 400 500
IDD Supply current VO = 2
2.5
5VV, No load µA
Full range 500
† Full range is 0°C to 70°C.
‡ Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

TLC226x, TLC226xA
TLC2262C operating characteristics at specified free-air temperature, VDD = 5 V

TLC2262C
MIN TYP MAX
VO = 1.5 V to 3.5 V,, RL = 50 kΩ‡, 25°C 0.35 0.55
SR Slew rate at unity gain V/µs
CL = 100 pF‡ Full range 0.3
f = 10 Hz 25°C 40
Vn Equivalent input noise voltage nV/√Hz
f = 1 kHz 25°C 12
Peak-to-peak equivalent
q input noise f = 0.1 Hz to 1 Hz 25°C 0.7
VN(PP) µV
voltage f = 0.1 Hz to 10 Hz 25°C 1.3
In Equivalent input noise current 25°C 0.6 fA√Hz
VO = 0.5 V to 2.5 V, AV = 1 0.017%
THD + N Total harmonic distortion plus noise f = 20 kHz,
kHz 25°C
RL = 50 kΩ‡ AV = 10 0.03%
f = 10 kHz, RL = 50 kΩ‡,
Gain-bandwidth product 25°C 0.71 MHz
CL = 100 pF‡
VO(PP) = 2 V, AV = 1,
BOM Maximum output-swing bandwidth 25°C 185 kHz
RL = 50 kΩ‡, CL = 100 pF‡
AV = – 1, To 0.1%
0 1% 64
6.4
Step = 0.5 V to 2.5 V,,
ts Settling time 25°C µs
RL = 50 kΩ‡,
CL = 100 pF‡ To 0 01%
0.01% 14 1
14.1
φm Phase margin at unity gain 25°C 56°

RL = 50 kΩ‡,
‡ CL = 100 pF‡
Gain margin 25°C 11 dB

TLC226x, TLC226xA
TLC2262C electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless

otherwise specified)
TLC2262C
MIN TYP MAX
25°C 300 2500
Full range 3000
25°C
to 70°C
Input offset voltage long-term drift (see Note 4) VIC = 0, VO = 0, 25°C 0.003 µV/mo
RS = 50 Ω
25°C 0.5
Full range 100
25°C 1
Full range 100
–5 – 5.3
25°C to to
4 4.2
Common-mode |VIO| ≤ 5 mV
mV, RS = 50 Ω V
–5
Full range
g to
3.5
IO = – 20 µA 25°C 4.99
25°C 4.85 4.94
IO = – 100 µA
VOM + Maximum positive peak output voltage Full range 4.82 V
25°C 4.7 4.85
IO = – 400 µA
Full range 4.6
VIC = 0, IO = 50 µA 25°C – 4.99
25°C – 4.85 – 4.91
VIC = 0
0, IO = 500 µA
Full range – 4.85
VOM – Maximum negative peak output voltage
VIC = 0
0, IO = 1 mA 25°C
Full range
– 4.7
– 4.7
– 4.8 V
VIC = 0
0, IO = 4 mA 25°C
Full range
–4
– 3.8
– 4.3
25°C 80 200
RL = 50 kΩ
AVD Large-signal differential voltage amplification VO = ± 4 V Full range 55 V/mV
RL = 1 MΩ 25°C 1000
ci(c) Common-mode input capacitance f = 10 kHz, P package 25°C 8 pF
VIC = – 5 V to 2.7 V,, 25°C 75 88
Common mode rejection ratio
CMRR Common-mode dB
VO = 0 V, RS = 50 Ω Full range 75
VDD ± = 2.2 V to ± 8 V,, 25°C 80 95
kSVR Supply voltage rejection ratio (∆VDD ± /∆VIO)
Supply-voltage dB
VIC = 0, No load Full range 80
25°C 425 500
IDD Supply current VO = 0 V
V, No load µA
Full range 500

TLC226x, TLC226xA
TLC2262C operating characteristics at specified free-air temperature, VDD ± = ±5 V

TLC2262C
MIN TYP MAX
25°C 0.35 0.55
VO = ± 1
1.9
9VV, RL = 50 kΩ
SR Slew rate at unity gain Full V/µs
CL = 100 pFF 03
0.3
range
f = 10 Hz 25°C 43
f = 1 kHz 25°C 12
VN(PP) µV
In Equivalent input noise current 25°C 0.6 fA√Hz
VO = ± 2.3 V, AV = 1 0.014%
THD + N Total harmonic distortion pulse duration f = 20 kHz,
kHz 25°C
RL = 50 kΩ AV = 10 0.024%
f = 10 kHz,, RL = 50 kΩ
Gain bandwidth product
Gain-bandwidth 25°C 0 73
0.73 MHz
CL = 100 pF
VO(PP) = 4.6 V, AV = 1,
BOM Maximum output-swing
output swing bandwidth 25°C 85 kHz
RL = 50 kΩ, CL = 100 pF
AV = – 1, To 0.1%
0 1% 71
7.1
Step = – 2.3 V to 2.3 V,,
RL = 50 kΩ,
CL = 100 pF To 0.01%
0 01% 16 5
16.5

RL = 50 kΩ,
kΩ CL = 100 pF

TLC226x, TLC226xA
TLC2264C electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise

noted)
TLC2264C
MIN TYP MAX
25°C 300 2500
Full range 3000
25°C
to 70°C
Input offset voltage long-term drift VIC = 0, VDD ± = ± 2.5 V, 25°C 0.003 µV/mo
(see Note 4) VO = 0, RS = 50 Ω
25°C 0.5
Full range 100
25°C 1
Full range 100
0 – 0.3
25°C to to
4 4.2
Common-mode RS = 50 Ω
0
Full range to
3.5
IOH = – 20 µA 25°C 4.99
25°C 4.85 4.94
IOH = – 100 µA
VOH High-level output voltage Full range 4.82 V
25°C 4.70 4.85
IOH = – 400 µA
Full range 4.60
VIC = 2.5 V, IOL = 50 µA 25°C 0.01
25°C 0.09 0.15
VIC = 2
2.5
5VV, IOL = 500 µA
Full range 0.15
VOL Low-level output voltage
VIC = 2
2.5
Full range
0.2 0.3
0.3
V
VIC = 2
2.5
Full range
0.7 1
1.2
25°C 80 170
VIC = 2.5
2 5 V,
V RL = 50 kΩ‡
AVD Large-signal
g g differential voltage
g amplification Full range 55 V/mV
VO = 1 V to 4 V
RL = 1 MΩ‡ 25°C 550
ci(c) Common-mode input capacitance f = 10 kHz, N package 25°C 8 pF
VIC = 0 to 2.7 V,, VO = 2.5 V,, 25°C 70 83
CMRR Common mode rejection ratio
Common-mode dB
RS = 50 Ω Full range 70
VDD = 4.4 V to 16 V, 25°C 80 95
kSVR Supply voltage rejection ratio (∆VDD /∆VIO)
Supply-voltage dB
VIC = VDD /2, No load Full range 80
25°C 0.8 1
IDD Supply current (four amplifiers) VO = 2
2.5
5VV, No load mA
Full range 1
NOTE 4. Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated

TLC226x, TLC226xA
TLC2264C operating characteristics at specified free-air temperature, VDD = 5 V

TLC2264C
MIN TYP MAX
25°C 0.35 0.55
VO = 1
1.4
4 V to 2
2.6
6VV, RL = 50 kΩ‡,
F‡
CL = 100 pF 03
0.3
range
f = 10 Hz 25°C 40
f = 1 kHz 25°C 12
VN(PP) µV
In Equivalent input noise current 25°C 0.6 fA /√Hz
VO = 0.5 V to 2.5 V, AV = 1 0.017%
kHz 25°C
RL = 50 kΩ‡ AV = 10 0.03%
f = 10 kHz, RL = 50 kΩ‡,
Gain-bandwidth product 25°C 0.71 MHz
CL = 100 pF‡
VO(PP) = 2 V, AV = 1,
BOM Maximum output-swing bandwidth 25°C 185 kHz
RL = 50 kΩ‡, CL = 100 pF‡
AV = – 1, To 0.1%
0 1% 64
6.4
Step = 0.5 V to 2.5 V,,
RL = 50 kΩ‡,
CL = 100 pF‡ To 0.01%
0 01% 14 1
14.1

RL = 50 kΩ‡, CL = 100 pF‡

TLC226x, TLC226xA
TLC2264C electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless

otherwise specified)
TLC2264C
MIN TYP MAX
25°C 300 2500
Full range 3000
25°C
to 70°C
Input offset voltage long-term drift (see Note 4) VIC = 0, VO = 0, 25°C 0.003 µV/mo
RS = 50 Ω
25°C 0.5
Full range 100
25°C 1
Full range 100
–5 – 5.3
25°C to to
4 4.2
Common-mode |VIO| ≤ 5 mV
mV, RS = 50 Ω V
–5
Full range
g to
3.5
IO = – 20 µA 25°C 4.99
25°C 4.85 4.94
IO = – 100 µA
VOM + Maximum positive peak output voltage Full range 4.82 V
25°C 4.7 4.85
IO = – 400 µA
Full range 4.6
VIC = 0, IO = 50 µA 25°C – 4.99
25°C – 4.85 – 4.91
VIC = 0
0, IO = 500 µA
Full range – 4.85
VOM – Maximum negative peak output voltage
VIC = 0
0, IO = 1 mA 25°C
Full range
– 4.7
– 4.7
– 4.8 V
VIC = 0
0, IO = 4 mA 25°C
Full range
–4
– 3.8
– 4.3
25°C 80 200
RL = 50 kΩ
AVD Large-signal differential voltage amplification VO = ± 4 V Full range 55 V/mV
RL = 1 MΩ 25°C 1000
ci(c) Common-mode input capacitance f = 10 kHz, N package 25°C 8 pF
VIC = – 5 V to 2.7 V, 25°C 75 88
Common mode rejection ratio
CMRR Common-mode dB
VO = 0, RS = 50 Ω Full range 75
VDD ± = ± 2.2 V to ± 8 V, 25°C 80 95
kSVR Supply voltage rejection ratio (∆VDD ± /∆VIO)
Supply-voltage dB
VIC = 0, No load Full range 80
25°C 0.85 1
IDD Supply current (four amplifiers) VO = 0
0, No load mA
Full range 1

TLC226x, TLC226xA
TLC2264C operating characteristics at specified free-air temperature, VDD ± = ±5 V

TLC2264C
MIN TYP MAX
25°C 0.35 0.55
VO = ± 1
1.9
9VV, RL = 50 kΩ,
kΩ
CL = 100 pFF 03
0.3
range
f = 10 Hz 25°C 43
f = 1 kHz 25°C 12
VN(PP) µV
In Equivalent input noise current 25°C 0.6 fA /√Hz
VO = ± 2.3 V, AV = 1 0.014%
kHz 25°C
RL = 50 kΩ AV = 10 0.024%
f = 10 kHz,, RL = 50 kΩ,,
Gain bandwidth product
Gain-bandwidth 25°C 0 73
0.73 MHz
CL = 100 pF
VO(PP) = 4.6 V,, AV = 1,,
BOM Maximum output-swing
output swing bandwidth 25°C 70 kHz
RL = 50 kΩ, CL = 100 pF
AV = – 1, 0 1%
To 0.1% 71
7.1
Step = – 2.3 V to 2.3 V,,
RL = 50 kΩ,
CL = 100 pF To 0
0.01%
01% 16 5
16.5

RL = 50 kΩ,
kΩ CL = 100 pF

TLC226x, TLC226xA
TLC2262I electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise

noted)
TLC2262I TLC2262AI
MIN TYP MAX MIN TYP MAX
25°C 300 2500 300 950
Full range 3000 1500
Temperature
25°C
αVIO coefficient 2 2 µV/°C
to 85°C
of input offset voltage
Input offset voltage
long-term drift VDD ± = ± 2.5 V, VIC = 0, 25°C 0.003 0.003 µV/mo
(see Note 4) VO = 0,, RS = 50 Ω
25°C 0.5 0.5
pA
IIO Input offset current 85°C 150 150
Full range 800 800 pA
25°C 1 1 pA
IIB
Input bias current 85°C 150 150 pA
0 – 0.3 0 – 0.3
25°C to to to to
Common-mode input 4 4.2 4 4.2
VICR RS = 50 Ω
voltage range 0 0
Full range
g to to
3.5 3.5
IOH = – 20 µA 25°C 4.99 4.99
25°C 4.85 4.94 4.85 4.94
High level output
High-level IOH = – 100 µA
VOH Full range 4.82 4.82 V
voltage
25°C 4.7 4.85 4.7 4.85
IOH = – 400 µA
Full range 4.5 4.5
VIC = 2.5 V, IOL = 50 µA 25°C 0.01 0.01
25°C 0.09 0.15 0.09 0.15
Low-level
Low level output VIC = 2
2.5
5VV, IOL = 500 µA
VOL Full range 0.15 0.15 V
voltage
VIC = 2
2.5
Full range
0.8 1
1.2
0.7 1
1.2
Large signal
Large-signal 25°C 80 100 80 170
VIC = 2
2.5
5VV, RL = 50 kΩ‡
AVD differential Full range 50 50 V/mV
VO = 1 V to 4 V
voltage amplification RL = 1 MΩ‡ 25°C 550 550
Differential input
ri(d) 25°C 1012 1012 Ω
resistance
Common-mode input
ri(c) 25°C 1012 1012 Ω
resistance
Common-mode input
ci(c) f = 10 kHz, P package 25°C 8 8 pF
capacitance
Closed-loop output
zo f = 100 kHz, AV = 10 25°C 240 240 Ω
impedance
Common-mode VIC = 0 to 2.7 V,, VO = 2.5 V,, 25°C 70 83 70 83
CMRR dB
rejection ratio RS = 50 Ω Full range 70 70
† Full range is – 40°C to 125°C.

TLC226x, TLC226xA
TLC2262I operating characteristics at specified free-air temperature, VDD = 5 V

TLC2262I TLC2262AI
Supply-voltage
y g re- 25°C 80 95 80 95
VDD = 44.4
4 V to 16 V,
V
kSVR jection ratio No load Full dB
VIC = VDD /2, 80 80
(∆VDD /∆VIO) range
25°C 400 500 400 500
IDD Supply current VO = 2.5 V, No load Full µA
500 500
range
25°C 0.35 0.55 0.35 0.55
Slew rate at unity VO = 1
1.5
5 V to 3
3.5
5VV, RL = 50 kΩ‡,
SR Full V/µs
gain F‡
CL = 100 pF 0 25
0.25 0 25
0.25
range
Equivalent
q input f = 10 Hz 25°C 40 40
Vn nV/√Hz
noise voltage f = 1 kHz 25°C 12 12
Peak-to-peak f = 0.1 Hz to 1 Hz 25°C 0.7 0.7
VN(PP) equivalent input µV
noise voltage f = 0.1 Hz to 10 Hz 25°C 1.3 1.3
Equivalent input
In 25°C 0.6 0.6 fA√Hz
noise current
Total harmonic VO = 0.5 V to 2.5 V, AV = 1 0.017% 0.017%
THD + N distortion plus f = 20 kHz,
kHz 25°C
noise RL = 50 kΩ‡ AV = 10 0.03% 0.03%
Gain-bandwidth f = 50 kHz, RL = 50 kΩ‡,

25°C 0 82
0.82 0 82
0.82 MHz
product CL = 100 pF‡
Maximum output- VO(PP) = 2 V,, AV = 1,,
BOM 25°C 185 185 kHz
swing bandwidth RL = 50 kΩ‡, CL = 100 pF‡
AV = – 1, To 0.1%
0 1% 64
6.4 64
6.4
Step = 0.5 V to 2.5 V,,
RL = 50 kΩ‡,
CL = 100 pF‡ To 0 01%
0.01% 14 1
14.1 14 1
14.1
Phase margin at
φm 25°C 56° 56°
unity gain RL = 50 kΩ‡, CL = 100 pF‡
Gain margin 25°C 11 11 dB

TLC226x, TLC226xA
TLC2262I electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless otherwise

noted)
TLC2262I TLC2262AI
25°C 300 2500 300 950
Temperature coefficient of 25°C
αVIO 2 2 µV/°C
input offset voltage to 85°C
long-term drift 25°C 0.003 0.003 µV/mo
(see Note 4) VIC = 0, VO = 0
RS = 50 Ω
25°C 0.5 0.5 pA
IIO Input offset current 85°C 150 150 pA
25°C 1 1 pA
IIB Input bias current 85°C 150 150 pA
–5 – 5.3 –5 – 5.3
25°C
Common-mode input to 4 to 4.2 to 4 to 4.2
VICR RS = 50 Ω
voltage range –5 –5
Full range
to 3.5 to 3.5
IO = – 20 µA 25°C 4.99 4.99
25°C 4.85 4.94 4.85 4.94
M i
Maximum positive
iti peak
k IO = – 100 µA
VOM + Full range 4.82 4.82 V
out ut voltage
output
25°C 4.7 4.85 4.7 4.85
IO = – 400 µA
Full range 4.5 4.5
VIC = 0, IO = 50 µA 25°C – 4.99 – 4.99
25°C – 4.85 – 4.91 – 4.85 – 4.91
Maximum
M i negative
ti peak
k VIC = 0
0, IO = 500 µA
VOM – Full range – 4.85 – 4.85 V
out ut voltage
output
VIC = 0
0, IO = 4 mA 25°C
Full range
–4
– 3.8
– 4.3 –4
– 3.8
– 4.3
25°C 80 200 80 200

L i l diff
Large-signal ti l
differential RL = 50 kΩ
AVD VO = ± 4 V Full range 50 50 V/mV
voltage am lification
amplification
RL = 1 MΩ 25°C 1000 1000
Differential input
ri(d) 25°C 1012 1012 Ω
resistance
Common-mode input
ri(c) 25°C 1012 1012 Ω
resistance
Common-mode input
capacitance
Closed-loop output
zo f = 100 kHz, AV = 10 25°C 220 220 Ω
impedance
Common-mode VIC = – 5 V to 2.7 V,, 25°C 75 88 75 88
CMRR dB
rejection ratio VO = 0, RS = 50 Ω Full range 75 75
Supply-voltage
y g rejection
j VDD = 4.4 V to 16 V,, 25°C 80 95 80 95
kSVR dB
ratio (∆VDD ± /∆VIO) VIC = VDD /2, No load Full range 80 80

TLC226x, TLC226xA
TLC2262I operating characteristics at specified free-air temperature, VDD ± = ±5 V

TLC2262I TLC2262AI
25°C 425 500 425 500
IDD Supply Current VO = 2.5 V, No load Full
500 500
range
25°C 0.35 0.55 0.35 0.55
Slew rate at unity VO = ± 1 9V
1.9 V, RL = 50 kΩ,
kΩ
SR Full V/µs
gain CL = 100 pFF 0 25
0.25 0 25
0.25
range
Equivalent
q input f = 10 Hz 25°C 43 43
Vn nV/√Hz
Equivalent input
In 25°C 0.6 0.6 fA√Hz
noise current
Total harmonic VO = ± 2.3 V, AV = 1 0.014% 0.014%
THD + N distortion plus RL = 50 kΩ,
kΩ 25°C
noise f = 20 kHz AV = 10 0.024% 0.024%
Gain-bandwidth f =10 kHz,, RL = 50 kΩ,,

25°C 0 73
0.73 0 73
0.73 MHz
product CL = 100 pF
Maximum
VO(PP) = 4.6 V,, AV = 1,,
BOM output swing
output-swing 25°C 85 85 kHz
RL = 50 kΩ, CL = 100 pF
bandwidth
AV = – 1, 0 1%
To 0.1% 71
7.1 71
7.1
Step = – 2.3 V to 2.3 V,,
RL = 50 kΩ,
CL = 100 pF To 0
0.01%
01% 16 5
16.5 16 5
16.5
Phase margin at
φm 25°C 57° 57°
unity gain RL = 50 kΩ, CL = 100 pF

TLC226x, TLC226xA
TLC2264I electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise

noted)
TLC2264I TLC2264AI
25°C 300 2500 300 950
Temperature coefficient 25°C
αVIO 2 2 µV/°C
of input offset voltage to 125°C
25°C 0.003 0.003 µV/mo
long-term drift (see Note 4) VDD ± =±± 2.5 V, VIC = 0,
VO = 0, RS = 50 Ω 25°C 0.5 0.5
Full range 800 800
25°C 1 1
Full range 800 800
0 – 0.3 0 – 0.3
25°C to to to to
VICR RS = 50 Ω
voltage range 0 0
Full range to to
3.5 3.5
IOH = – 20 µA 25°C 4.99 4.99
25°C 4.85 4.94 4.85 4.94
High-level
High level output IOH = – 100 µA
voltage
25°C 4.7 4.85 4.7 4.85
IOH = – 400 µA
Full range 4.5 4.5
VIC = 2.5 V, IOL = 50 µA 25°C 0.01 0.01
25°C 0.09 0.15 0.09 0.15
Low-level
Low level output VIC = 2
2.5
5VV, IOL = 500 µA
voltage
VIC = 2
2.5
Full range
0.8 1
1.2
0.7 1
1.2
25°C 80 100 80 170
Large-signal
Large signal differential VIC = 2
2.5
5VV, RL = 50 kΩ‡
AVD Full range 50 50 V/mV
amplification
voltage am lification VO = 1 V to 4 V
RL = 1 MΩ‡ 25°C 550 550
Differential input
ri(d) 25°C 1012 1012 Ω
resistance
Common-mode
ri(c) 25°C 1012 1012 Ω
input resistance
Common-mode
ci(c) f = 10 kHz, N package 25°C 8 8 pF
input capacitance
Closed-loop
zo f = 100 kHz, AV = 10 25°C 240 240 Ω
output impedance
Common-mode VIC = 0 to 2.7 V, VO = 2.5 V, 25°C 70 83 70 83
CMRR dB
Supply-voltage VDD = 4.4 V to 16 V, 25°C 80 95 80 95
kSVR rejection ratio dB
VIC = VDD /2, No load Full range 80 80
(∆VDD /∆VIO)

TLC226x, TLC226xA
TLC2264I operating characteristics at specified free-air temperature, VDD = 5 V

TLC2264I TLC2264AI
25°C 0.8 1 0.8 1
Supply current
IDD VO = 2.5 V, No load Full V/µs
(four amplifiers) 1 1
range
25°C 0.35 0.55 0.35 0.55
Slew rate at unity VO = 1 4 V to 2
1.4 6V
2.6 V, RL = 50 kΩ‡,
SR Full V/µs
gain F‡
CL = 100 pF 0 25
0.25 0 25
0.25
range
Equivalent
q input f = 10 Hz 25°C 40 40
Vn nV/√Hz
Equivalent input
In 25°C 0.6 0.6 fA /√Hz
noise current
kHz 25°C
noise RL = 50 kΩ‡ AV = 10 0.03% 0.03%

25°C 0 71
0.71 0 71
0.71 MHz
BOM 25°C 185 185 kHz
AV = – 1, To 0.1%
0 1% 64
6.4 64
6.4
Step = 0.5 V to 2.5 V,,
RL = 50 kΩ‡,
CL = 100 pF‡ To 0
0.01%
01% 14 1
14.1 14 1
14.1
Phase margin at
φm 25°C 56° 56°

TLC226x, TLC226xA
TLC2264I electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless otherwise

noted)
TLC2264I TLC2264AI
25°C 300 2500 300 950
Temperature coefficient of 25°C
αVIO 2 2 µV/°C
input offset voltage to 125°C
(see Note 4) VIC = 0, VO = 0,
RS = 50 Ω
25°C 0.5 0.5
Full range 800 800
25°C 1 1 pA
–5 – 5.3 –5 – 5.3
25°C to to to to
VICR RS = 50 Ω
Full range
g to to
3.5 3.5
IO = – 20 µA 25°C 4.99 4.99
25°C 4.85 4.94 4.85 4.94
Maximum positive peak IO = – 100 µA
out ut voltage
output
25°C 4.7 4.85 4.7 4.85
IO = – 400 µA
Full range 4.5 4.5
VIC = 0, IO = 50 µA 25°C – 4.99 – 4.99
25°C – 4.85 – 4.91 – 4.85 – 4.91
Maximum negative peak VIC = 0
0, IO = 500 µA
out ut voltage
output
VIC = 0
0, IO = 4 mA 25°C
Full range
–4
– 3.8
– 4.3 –4
– 3.8
– 4.3
25°C 80 200 80 200

Large signal differential
Large-signal RL = 50 kΩ
amplification
RL = 1 MΩ 25°C 1000 1000
Differential input
ri(d) 25°C 1012 1012 Ω
resistance
Common-mode input
ri(c) 25°C 1012 1012 Ω
resistance
Common-mode input
capacitance
Closed-loop output
zo f = 100 kHz, AV = 10 25°C 220 220 Ω
impedance
Common-mode VIC = – 5 V to 2.7 V, 25°C 75 88 75 88
CMRR dB
Supply-voltage
y g rejection
j VDD± = ± 2.2 V to ± 8 V, 25°C 80 95 80 95
kSVR dB

TLC226x, TLC226xA
TLC2264I operating characteristics at specified free-air temperature, VDD ± = ±5 V

TLC2264I TLC2264AI
25°C 0.85 1 0.85 1
Supply current
IDD VO = 0, No load Full
(four amplifiers) 1 1
range
25°C 0.35 0.55 0.35 0.55
Slew rate at unity VO = ± 1 9V
1.9 V, RL = 50 kΩ,
kΩ
SR Full V/µs
0.25 0 25
0.25
range
Equivalent
q input f = 10 Hz 25°C 43 43
Vn nV/√Hz
Equivalent input
In 25°C 0.6 0.6 fA /√Hz
noise current
kΩ 25°C
noise f = 20 kHz AV = 10 0.024% 0.024%

25°C 0 73
0.73 0 73
0.73 MHz
product CL = 100 pF
Maximum output- VO(PP) = 4.6 V,, AV = 1,,
BOM 25°C 70 70 kHz
swing bandwidth RL = 50 kΩ, CL = 100 pF
AV = – 1, To 0.1%
0 1% 71
7.1 71
7.1
Step = – 2.3 V to 2.3 V,,
RL = 50 kΩ,
CL = 100 pF To 0
0.01%
01% 16 5
16.5 16 5
16.5
Phase margin at
φm 25°C 57° 57°

TLC226x, TLC226xA
TLC2262Q/M electrical characteristics at specified free-air temperature, VDD = 5 V (unless

otherwise noted)
TLC2262Q, TLC2262AQ,
PARAMETER TEST CONDITIONS TA† TLC2262M TLC2262AM UNIT
25°C 300 2500 300 950
Temperature coefficient
αVIO Full range 5 5 µV/°C
VDD ± = ± 2.5 V, VIC = 0,
VO = 0, RS = 50 Ω
(see Note 4)
25°C 0.5 0.5
125°C 800 800
25°C 1 1
125°C 800 800
– 0.3 – 0.3
25°C 0 to 4 0 to 4
Common-mode input to 4.2 to 4.2
VICR RS = 50 Ω
voltage
g range
g 0 to 0 to
Full range
3.5
35 3.5
35
IOH = – 20 µA 25°C 4.99 4.99
25°C 4.85 4.94 4.85 4.94
High-level
High level output IOH = – 100 µA
voltage
25°C 4.7 4.85 4.7 4.85
IOH = – 400 µA
Full range 4.5 4.5
VIC = 2.5 V, IOL = 50 µA 25°C 0.01 0.01
25°C 0.09 0.15 0.09 0.15
Low level output
Low-level VIC = 2 5V
2.5 V, IOL = 500 µA
voltage
VIC = 2
2.5
Full range
0.8 1
1.2
0.7 1
1.2
25°C 80 100 80 170
Large signal differential
Large-signal VIC = 2 5V
2.5 V, RL = 50 kΩ‡
amplification VO = 1 V to 4 V
RL = 1 MΩ‡ 25°C 550 550
Differential input
ri(d) 25°C 1012 1012 Ω
resistance
Common-mode input
ri(c) 25°C 1012 1012 Ω
resistance
Common-mode input
capacitance
Closed-loop output
zo f = 100 kHz, AV = 10 25°C 240 240 Ω
impedance
Common-mode VIC = 0 to 2.7 V, VO = 2.5 V, 25°C 70 83 70 83
CMRR dB
Supply-voltage
y g rejection
j VDD = 4.4 V to 16 V, 25°C 80 95 80 95
kSVR dB
ratio (∆VDD /∆VIO) VIC = VDD /2, No load Full range 80 80
25°C 400 500 400 500
2.5
5VV, No load µA
Full range 500 500
† Full range is – 40°C to 125°C for Q suffix, – 55°C to 125°C for M suffix.

TLC226x, TLC226xA
TLC2262Q/M operating characteristics at specified free-air temperature, VDD = 5 V

25°C 0.35 0.55 0.35 0.55
0.5
5 V to 3
3.5
5VV, RL = 50 kΩ‡,
SR Full V/µs
gain F‡
CL = 100 pF 0 25
0.25 0 25
0.25
range
Equivalent
q input f = 10 Hz 25°C 40 40
Vn nV/√Hz
Equivalent input
In 25°C 0.6 0.6 fA√Hz
noise current
kHz 25°C
noise RL = 50 kΩ‡ AV = 10 0.03% 0.03%

25°C 0 82
0.82 0 82
0.82 MHz
BOM 25°C 185 185 kHz
AV = – 1, 0 1%
To 0.1% 64
6.4 64
6.4
Step = 0.5 V to 2.5 V,,
RL = 50 kΩ‡,
CL = 100 pF‡ To 0
0.01%
01% 14 1
14.1 14 1
14.1
Phase margin at
φm 25°C 56° 56°

TLC226x, TLC226xA
TLC2262Q/M electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless

otherwise noted)
25°C 300 2500 300 950
Temperature coefficient of
input offset voltage
Input offset voltage long- VIC = 0, VO = 0,
25°C 0.003 0.003 µV/mo
term drift (see Note 4) RS = 50 Ω
25°C 0.5 0.5
125°C 800 800
25°C 1 1
125°C 800 800
–5 – 5.3 –5 – 5.3
25°C
Common-mode input to 4 to 4 to 4 to 4.2
VICR RS = 50 Ω
Full range
to 3.5 to 3.5
IO = – 20 µA 25°C 4.99 4.99
25°C 4.85 4.94 4.85 4.94
Maximum positive peak IO = – 100 µA
out ut voltage
output
25°C 4.7 4.85 4.7 4.85
IO = – 400 µA
Full range 4.5 4.5
VIC = 0, IO = 50 µA 25°C – 4.99 – 4.99
25°C – 4.85 – 4.91 – 4.85 – 4.91
Maximum negative peak VIC = 0
0, IO = 500 µA
output
out ut voltage
VIC = 0
0, IO = 4 mA 25°C
Full range
–4
– 3.8
– 4.3 –4
– 3.8
– 4.3
25°C 80 200 80 200

Large-signal
Large signal differential RL = 50 kΩ
amplification
RL = 1 MΩ 25°C 1000 1000
Differential input
ri(d) 25°C 1012 1012 Ω
resistance
Common-mode input
ri(c) 25°C 1012 1012 Ω
resistance
Common-mode input
capacitance
Closed-loop output
zo f = 100 kHz, AV = 10 25°C 220 220 Ω
impedance
CMRR dB
Supply-voltage
y g rejection
j VDD = 4.4 V to 16 V, 25°C 80 95 80 95
kSVR dB
25°C 425 500 425 500
0, No load µA
Full range 500 500

TLC226x, TLC226xA
TLC2262Q/M operating characteristics at specified free-air temperature, VDD ± = ±5 V

25°C 0.35 0.55 0.35 0.55
Slew rate at unity VO = ± 2 V
V, RL = 50 kΩ,
kΩ
SR Full V/µs
0.25 0 25
0.25
range
Equivalent
q input f = 10 Hz 25°C 43 43
Vn nV/√Hz
Equivalent input
In 25°C 0.6 0.6 fA√Hz
noise current
kΩ 25°C
noise f = 20 kHz AV = 10 0.024% 0.024%

25°C 0 73
0.73 0 73
0.73 MHz
product CL = 100 pF
BOM 25°C 85 85 kHz
AV = – 1, To 0.1%
0 1% 71
7.1 71
7.1
Step = – 2.3 V to 2.3 V,,
RL = 50 kΩ,
CL = 100 pF To 0
0.01%
01% 16 5
16.5 16 5
16.5
Phase margin at
φm 25°C 57° 57°

TLC226x, TLC226xA
TLC2264Q/M electrical characteristics at specified free-air temperature, VDD = 5 V (unless

otherwise noted)
25°C 300 2500 300 950
Temperature coefficient
VDD ± = ± 2.5 V, VIC = 0,
VO = 0, RS = 50 Ω
(see Note 4)
25°C 0.5 0.5
125°C 800 800
25°C 1 1
125°C 800 800
0 – 0.3 0 – 0.3
25°C
Common-mode input to 4 to 4.2 to 4 to 4.2
VICR RS = 50 Ω
voltage range 0 0
Full range
to 3.5 to 3.5
IOH = – 20 µA 25°C 4.99 4.99
25°C 4.85 4.94 4.85 4.94
IOH = – 100 µA
VOH High-level output voltage Full range 4.82 4.82 V
25°C 4.7 4.85 4.7 4.85
IOH = – 400 µA
Full range 4.5 4.5
VIC = 2.5 V, IOL = 50 µA 25°C 0.01 0.01
25°C 0.09 0.15 0.09 0.15
VIC = 2
2.5
5VV, IOL = 500 µA
VOL Low-level output voltage Full range 0.15 0.15 V
VIC = 2
2.5
Full range
0.8 1
1.2
0.7 1
1.2
25°C 80 100 80 170
Large-signal
Large signal differential VIC = 2
2.5
5VV, RL = 50 kΩ‡
amplification VO = 1 V to 4 V
RL = 1 MΩ‡ 25°C 550 550
Differential input
ri(d) 25°C 1012 1012 Ω
resistance
Common-mode input
ri(c) 25°C 1012 1012 Ω
resistance
Common-mode input
capacitance
Closed-loop output
zo f = 100 kHz, AV = 10 25°C 240 240 Ω
impedance
Common-mode rejection
j VIC = 0 to 2.7 V, VO = 2.5 V, 25°C 70 83 70 83
CMRR dB
ratio RS = 50 Ω Full range 70 70
Supply-voltage rejection
kSVR 25°C 80 95 80 95 dB
ratio (∆VDD /∆VIO) VDD = 4.4 V to 16 V,
Supplyy current 25°C 0.8 1 0.8 1
IDD VO = 2
2.5
5VV, No load mA
(four amplifiers) Full range 1 1

TLC226x, TLC226xA
TLC2264Q/M operating characteristics at specified free-air temperature, VDD = 5 V

25°C 0.35 0.55 0.35 0.55
0.5
5 V to 3
3.5
5VV, RL = 50 kΩ‡,
SR Full V/µs
gain F‡
CL = 100 pF 0 25
0.25 0 25
0.25
range
Equivalent
q input f = 10 Hz 25°C 40 40
Vn nV/√Hz
Equivalent input
In 25°C 0.6 0.6 fA /√Hz
noise current
kHz 25°C
noise RL = 50 kΩ‡ AV = 10 0.03% 0.03%

25°C 0 71
0.71 0 71
0.71 MHz
BOM 25°C 185 185 kHz
AV = – 1, To 0.1%
0 1% 64
6.4 64
6.4
Step = 0.5 V to 2.5 V,,
RL = 50 kΩ‡,
CL = 100 pF‡ To 0
0.01%
01% 14 1
14.1 14 1
14.1
Phase margin at
φm 25°C 56° 56°

TLC226x, TLC226xA
TLC2264Q/M electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless

otherwise noted)
25°C 300 2500 300 950
Temperature coefficient of
input offset voltage
Input offset voltage VIC = 0, VO = 0,
25°C 0.003 0.003 µV/mo
long-term drift (see Note 4) RS = 50 Ω
25°C 0.5 0.5
125°C 800 800
25°C 1 1
125°C 800 800
–5 –55.3
3 –5 –55.3
3
25°C
25 C
Common-mode input RS = 50 Ω,, to 4 to 4 2
4.2 to 4 to 4 2
4.2
VICR V
voltage range |VIO| ≤ 5 mV –5 –5
Full range
to 3.5
35 to 3.5
35
IO = – 20 µA 25°C 4.99 4.99
25°C 4.85 4.94 4.85 4.94
M i
Maximum positive
iti peak
k IO = – 100 µA
out ut voltage
output
25°C 4.7 4.85 4.7 4.85
IO = – 400 µA
Full range 4.5 4.5
VIC = 0, IO = 50 µA 25°C – 4.99 – 4.99
25°C – 4.85 – 4.91 – 4.85 – 4.91
Maximum
M i negative
ti peak
k VIC = 0
0, IO = 500 µA
out ut voltage
output
VIC = 0
0, IO = 4 mA 25°C
Full range
–4
– 3.8
– 4.3 –4
– 3.8
– 4.3
25°C 80 200 80 200

Large-signal
L i l diff
differential
ti l RL = 50 kΩ
amplification
RL = 1 MΩ 25°C 1000 1000
ri(d) Differential input resistance 25°C 1012 1012 Ω
Common-mode input
ri(c) 25°C 1012 1012 Ω
resistance
Common-mode input
capacitance
Closed-loop output
zo f = 100 kHz, AV = 10 25°C 220 220 Ω
impedance
CMRR dB
Supply-voltage
y g rejection
j VDD± = ± 2.2 V to ± 8 V, 25°C 80 95 80 95
kSVR dB
Supplyy current 25°C 0.85 1 0.85 1
IDD VO = 0
0, No load mA
(four amplifiers) Full range 1 1

TLC226x, TLC226xA
TLC2264Q/M operating characteristics at specified free-air temperature, VDD ± = ±5 V

25°C 0.35 0.55 0.35 0.55
Slew rate at unity VO = ± 2 V
V, RL = 50 kΩ,
kΩ
SR Full V/µs
0.25 0 25
0.25
range
Equivalent
q input f = 10 Hz 25°C 43 43
Vn nV/√Hz
Equivalent input
In 25°C 0.6 0.6 fA /√Hz
noise current
kΩ 25°C
noise f = 20 kHz AV = 10 0.024% 0.024%

25°C 0 73
0.73 0 73
0.73 MHz
product CL = 100 pF
BOM 25°C 70 70 kHz
AV = – 1, To 0.1%
0 1% 71
7.1 71
7.1
Step = – 2.3 V to 2.3 V,,
RL = 50 kΩ,
CL = 100 pF To 0.01%
0 01% 16 5
16.5 16 5
16.5
Phase margin at
φm 25°C 57° 57°

TLC226x, TLC226xA
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Distribution 2–5
VIO Input offset voltage
vs Common-mode input voltage 6, 7
αVIO Input offset voltage temperature coefficient Distribution 8 – 11
IIB/IIO Input bias and input offset currents vs Free-air temperature 12
vs Supply voltage 13
VI Input voltage range
vs Free-air temperature 14
VOH High-level output voltage vs High-level output current 15
VOL Low-level output voltage vs Low-level output current 16, 17
VOM + Maximum positive output voltage vs Output current 18
VOM – Maximum negative output voltage vs Output current 19
VO(PP) Maximum peak-to-peak output voltage vs Frequency 20
IOS Short-circuit output current
VO Output voltage vs Differential input voltage 23, 24
Differential gain vs Load resistance 25
vs Frequency 26, 27
AVD Large-signal differential voltage amplification
vs Free-air temperature 28, 29
zo Output impedance vs Frequency 30, 31
vs Frequency 32
CMRR Common-mode rejection ratio
vs Frequency 34, 35
kSVR Supply-voltage rejection ratio
vs Supply voltage 37, 38
IDD Supply current
vs Free-air temperature 39, 40
vs Load capacitance 41
SR Slew rate
Inverting large-signal pulse response 43, 44
Voltage-follower large-signal pulse response 45, 46
VO
Inverting small-signal pulse response 47, 48
Voltage-follower small-signal pulse response 49, 50
Vn Equivalent input noise voltage vs Frequency 51, 52
Noise voltage (referred to input) Over a 10-second period 53
Integrated noise voltage vs Frequency 54
THD + N Total harmonic distortion plus noise vs Frequency 55
Gain-bandwidth product
vs Frequency 26, 27
φm Phase margin
vs Load capacitance 58
Gain margin vs Load capacitance 59
B1 Unity-gain bandwidth vs Load capacitance 60
Overestimation of phase margin vs Load capacitance 61

TLC226x, TLC226xA
DISTRIBUTION OF TLC2262 DISTRIBUTION OF TLC2262

INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE
25 25
1274 Amplifiers From 2 Wafer Lots 1274 Amplifiers From 2 Wafer Lots
VDD± = ± 2.5 V VDD± = ± 5 V
TA = 25°C TA = 25°C
20 20
Precentage of Amplifiers – %
Percentage of Amplifiers – %
15 15
10 10
5 5
0 0
– 1.6 – 0.8 0 0.8 1.6 – 1.6 – 0.8 0 0.8 1.6
VIO – Input Offset Voltage – mV VIO – Input Offset Voltage – mV
Figure 2 Figure 3
DISTRIBUTION OF TLC2264 DISTRIBUTION OF TLC2264

20 20
VDD ± = ± 2.5 V VDD ± = ± 5 V
TA = 25°C TA = 25°C
16 16
12 12
8 8
4 4
0 0
– 1.6 – 0.8 0 0.8 1.6 – 1.6 – 0.8 0 0.8 1.6
VIO – Input Offset Voltage – mV VIO – Input Offset Voltage – mV
Figure 4 Figure 5

TLC226x, TLC226xA

vs vs
COMMON-MODE INPUT VOLTAGE COMMON-MODE INPUT VOLTAGE
1 1
VDD = 5 V VDD± = ± 5 V
RS = 50 Ω RS = 50 Ω
TA = 25°C TA = 25°C
IO – Input Offset Voltage – mV
IO – Input Offset Voltage – mV

0.5 0.5
0 0
ÁÁÁ ÁÁ
ÁÁÁ ÁÁ
– 0.5 – 0.5
VVIO
VVIO
–1
ÁÁ –1
–1 0 1 2 3 4 5 –6 –5 –4 –3 –2 –1 0 1 2 3 4 5
VIC – Common-Mode Input Voltage – V VIC – Common-Mode Input Voltage – V
† For curves where VDD = 5 V, all loads are referenced to 2.5 V.
Figure 6 Figure 7
DISTRIBUTION OF TLC2262 INPUT OFFSET DISTRIBUTION OF TLC2262 INPUT OFFSET

VOLTAGE TEMPERATURE COEFFICIENT † VOLTAGE TEMPERATURE COEFFICIENT †
30 30
VDD± = ± 2.5 V VDD± = ± 5 V
25 P Package 25 P Package
TA = 25°C to 125°C TA = 25°C to 125°C
20 20
15 15
10 10
5 5
0 0
–5 –4 –3 –2 –1 0 1 2 3 4 5 –5 –4 –3 –2 –1 0 1 2 3 4 5
αVIO – Temperature Coefficient – µV / °C αVIO – Temperature Coefficient – µV / °C
Figure 8 Figure 9
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

TLC226x, TLC226xA
DISTRIBUTION OF TLC2264 INPUT OFFSET DISTRIBUTION OF TLC2264 INPUT OFFSET

VOLTAGE TEMPERATURE COEFFICIENT† VOLTAGE TEMPERATURE COEFFICIENT†
35 35
128 Amplifiers From 128 Amplifiers From
2 Wafer Lots 2 Wafer Lots
30 VDD ± = ± 2.5 V 30 VDD ± = ± 5 V
N Package N Package
TA = 25°C to 125°C TA = 25°C
25 25 to 125°C
20 20
15 15
10 10
5 5
0 0
–5 –4 –3 –2 –1 0 1 2 3 4 5 –5 –4 –3 –2 –1 0 1 2 3 4 5
αVIO – Temperature Coefficient of αVIO – Temperature Coefficient of
Input Offset Voltage – µV / °C Input Offset Voltage – µV / °C
Figure 10 Figure 11
INPUT BIAS AND INPUT OFFSET CURRENTS† INPUT VOLTAGE RANGE

vs vs
FREE-AIR TEMPERATURE SUPPLY VOLTAGE
IIO – Input Bias and Input Offset Currents – pA
450 10
VDD± = ± 2.5 V RS = 50 Ω
400 VIC = 0 V 8
TA = 25°C
VO = 0
350 RS = 50 Ω 6
VII – Input Voltage Range – V
4
300
IIB 2
250
0 | VIO | ≤ 5 mV
200
–2
150
–4
100
V
–6
IB and IIO
ÁÁ
50 –8
ÁÁ
IIO
0 – 10
IIIB
25 45 65 85 105 125 2 3 4 5 6 7 8
TA – Free-Air Temperature – °C | VDD ± | – Supply Voltage – V
Figure 12 Figure 13

TLC226x, TLC226xA
INPUT VOLTAGE RANGE†‡ HIGH-LEVEL OUTPUT VOLTAGE†‡

vs vs
FREE-AIR TEMPERATURE HIGH-LEVEL OUTPUT CURRENT
5 6
VDD = 5 V VDD = 5 V
OH – High-Level Output Voltage – V

4 5
VII – Input Voltage Range – V
3 4
TA = 125°C
TA = – 55°C
2 | VIO | ≤ 5 mV
3
TA = 25°C
ÁÁ
1
2
ÁÁ ÁÁ
TA = – 40°C
V
ÁÁ VOH
0 1
V
–1
0
– 75 – 55 – 35 – 15 5 25 45 65 85 105 125 0 500 1000 1500 2000 2500 3000 3500
TA – Free-Air Temperature – °C | IOH| – High-Level Output Current – µA
Figure 14 Figure 15
LOW-LEVEL OUTPUT VOLTAGE‡ LOW-LEVEL OUTPUT VOLTAGE†‡

vs vs
LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT
1.2 1.4
VDD = 5 V
VDD = 5 V
VIC = 2.5 V
TA = 25°C 1.2
OL – Low-Level Output Voltage – V
VOL – Low-Level Output Voltage – V
1
VIC = 1.25 V TA = 125°C
VIC = 0
1
0.8
0.8
TA = 25°C
0.6
VIC = 2.5 V 0.6
TA = – 40°C
0.4 TA = – 55°C
ÁÁ ÁÁ
0.4
ÁÁ ÁÁ
VOL
VOL
ÁÁ
0.2
V
0.2
0 0
0 1 2 3 4 5 0 1 2 3 4 5 6
IOL – Low-Level Output Current – mA IOL – Low-Level Output Current – mA
Figure 16 Figure 17
‡ For curves where VDD = 5 V, all loads are referenced to 2.5 V.

TLC226x, TLC226xA
MAXIMUM POSITIVE OUTPUT VOLTAGE† MAXIMUM NEGATIVE OUTPUT VOLTAGE†

vs vs
OUTPUT CURRENT OUTPUT CURRENT
6 – 3.8
– – Maximum Negative Output Voltage – V

VDD ± = ± 5 V
OM ++ – Maximum Positive Output Voltage – V
VDD± = ± 5 V
VIC = 0
5 –4
TA = – 55°C TA = 125°C
4 – 4.2 TA = 25°C
TA = 125°C
3 – 4.4
TA = – 40°C
TA = 25°C TA = – 55°C
2 – 4.6
ÁÁ TA = – 40°C
ÁÁ
ÁÁ ÁÁ
1 – 4.8
ÁÁ ÁÁ VOM –
VVOM
VOM
ÁÁ
0 –5
0 500 1000 1500 2000 2500 3000 3500 0 1 2 3 4 5 6
| IO | – Output Current – µA IO – Output Current – mA
Figure 18 Figure 19
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE†‡ SHORT-CIRCUIT OUTPUT CURRENT

vs vs
FREQUENCY SUPPLY VOLTAGE
VO(PP) – Maximum Peak-to-Peak Output Voltage – V
10 12
RL = 10 kΩ
9 VDD± = ± 5 V
I OS – Short-Circuit Output Current – mA
TA = 25°C 10
8 VID = – 100 mV
8
7
6 VO = 0
6 TA = 25°C
VDD = 5 V 4
5
4
2
3
0
2 VID = 100 mV
ÁÁ
IOS
–2
VO(PP)
ÁÁ
ÁÁ
0 –4
103 104 105 106 2 3 4 5 6 7 8
| VDD ± | – Supply Voltage – V
f – Frequency – Hz
Figure 20 Figure 21

TLC226x, TLC226xA
SHORT-CIRCUIT OUTPUT CURRENT † OUTPUT VOLTAGE‡

vs vs
FREE-AIR TEMPERATURE DIFFERENTIAL INPUT VOLTAGE
13 5
VO = 0 VDD = 5 V
12
VDD± = ± 5 V RL = 50 kΩ
OS – Short-Circuit Output Current – mA
11 VIC = 2.5 V
4 TA = 25°C
10
VO – Output Voltage – V
VID = – 100 mV
9
8 3
7
1
2
0
–1
–2 VID = 100 mV 1
IIOS
–3
–4 0
– 75 – 50 – 25 0 25 50 75 100 125 – 1000 – 750 – 500 – 250 0 250 500 750 1000
TA – Free-Air Temperature – °C VID – Differential Input Voltage – µV
Figure 22 Figure 23
OUTPUT VOLTAGE DIFFERENTIAL GAIN‡

vs vs
DIFFERENTIAL INPUT VOLTAGE LOAD RESISTANCE
5 104
VDD± = ± 5 V
VIC = 0 V VO(PP) = 2 V
RL = 50 kΩ TA = 25°C
3 TA = 25°C
103 VDD± = ± 5 V
Differential Gain – V/ mV
1
VDD = 5 V
102
–1
10
–3
–5 1
– 1000 – 750 – 500 – 250 0 250 500 750 1000 103 104 105 106
VID – Differential Input Voltage – µV RL – Load Resistance – kΩ
Figure 24 Figure 25

TLC226x, TLC226xA
LARGE-SIGNAL DIFFERENTIAL VOLTAGE†

AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
80 180°
VDD = 5 V
CL= 100 pF
60 TA = 25°C
AVD – Large-Signal Differential 135°
Voltage Amplification – dB
m – Phase Margin
40 90°
Phase Margin
20 45°
ÁÁ
Gain
φom
0
ÁÁ
0°
AVD
ÁÁ – 20 – 45°
– 40 – 90°
10 3 10 4 10 5 10 6 10 7
Figure 26
LARGE-SIGNAL DIFFERENTIAL VOLTAGE

AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
80 180°
VDD± = ± 5 V
CL = 100 pF
60 TA = 25°C 135°
AVD – Large-Signal Differential
Voltage Amplification – dB
m – Phase Margin
40 90°
Phase Margin
20 45°
Gain
ÁÁ
φom
0 0°
ÁÁ
AVD
ÁÁ – 20 – 45°
– 40 – 90°
10 3 10 4 10 5 10 6 10 7
Figure 27

TLC226x, TLC226xA
LARGE-SIGNAL DIFFERENTIAL LARGE-SIGNAL DIFFERENTIAL

VOLTAGE AMPLIFICATION†‡ VOLTAGE AMPLIFICATION†
vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
104 104
VDD = 5 V VDD± = ± 5 V
VIC = 2.5 V VIC = 0 V
VO = 1 V to 4 V VO = ± 4 V
RL = 1 MΩ
Voltage Amplification – V/mV

Voltage Amplification – V/mV

RL = 1 MΩ
103 103
RL = 50 kΩ
RL = 50 kΩ
102 102
ÁÁ RL = 10 kΩ
ÁÁ
ÁÁ ÁÁ
AVD
AVD
RL = 10 kΩ
101 101
– 75 – 50 – 25 0 25 50 75 100 125 – 75 – 50 – 25 0 25 50 75 100 125
TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C
Figure 28 Figure 29
OUTPUT IMPEDANCE‡ OUTPUT IMPEDANCE

vs vs
FREQUENCY FREQUENCY
1000 1000
VDD = 5 V VDD± = ± 5 V
TA = 25°C TA = 25°C
Ω
Ω
100
z o – Output Impedance – 0
100
z o – Output Impedance – 0
AV = 100
AV = 100
10 10
AV = 10
AV = 10
zo
zo
1 1
AV = 1
AV = 1
0.1 0.1
102 103 104 105 106 102 103 104 105 106
f – Frequency – Hz f – Frequency – Hz
Figure 30 Figure 31

TLC226x, TLC226xA
COMMON-MODE REJECTION RATIO† COMMON-MODE REJECTION RATIO†‡

vs vs
FREQUENCY FREE-AIR TEMPERATURE
100 90
CMRR – Common-Mode Rejection Ratio – dB

CMRR – Common-Mode Rejection Ratio – dB
VDD± = ± 5 V VDD± = ± 5 V
80 88
VDD = 5 V
60 86
40 84
VDD = 5 V
20 82
0 80
101 102 103 104 105 106 – 75 – 50 –25 0 25 50 75 100 125
f – Frequency – Hz TA – Free-Air Temperature – °C
Figure 32 Figure 33
SUPPLY-VOLTAGE REJECTION RATIO† SUPPLY-VOLTAGE REJECTION RATIO

vs vs
FREQUENCY FREQUENCY
100 100
VDD = 5 V VDD± = ± 5 V
k SVR – Supply-Voltage Rejection Ratio – dB
k SVR – Supply-Voltage Rejection Ratio – dB
TA = 25°C TA = 25°C
80 80
kSVR + kSVR +
60 60
kSVR – kSVR –
40 40
20 20
ÁÁ ÁÁ
ÁÁ ÁÁ
0
KSVR
0
KSVR
ÁÁ – 20
101 102 103 104
105 106 ÁÁ – 20
101 102 103 104 105 106
Figure 34 Figure 35

‡ Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

TLC226x, TLC226xA
TLC2262
SUPPLY-VOLTAGE REJECTION RATIO† SUPPLY CURRENT †
vs vs
FREE-AIR TEMPERATURE SUPPLY VOLTAGE
110 600
VDD ± = ± 2.2 V to ± 8 V VO = 0
SVR – Supply-Voltage Rejection Ratio – dB
No Load
VO = 0
500
TA = – 55°C
µA
I DD – Supply Current – uA
105
400
TA = 25°C
TA = 125°C
TA = 40°C
100 300
ÁÁ 200
ÁÁ IDD
ÁÁ
95
ÁÁ
100
KSVR
ÁÁ
k
90 0
– 75 – 50 – 25 0 25 50 75 100 125 0 1 2 3 4 5 6 7 8
TA – Free-Air Temperature – °C | VDD ± | – Supply Voltage – V
Figure 36 Figure 37
TLC2264 TLC2262
SUPPLY CURRENT † SUPPLY CURRENT †‡
vs vs
SUPPLY VOLTAGE FREE-AIR TEMPERATURE
1200 600
VO = 0
No Load
1000 500 VDD± = ± 5 V
TA = – 55°C VO = 0
µA
µA
800 400
TA = 25°C
TA = 125°C VDD = 5 V
TA = 40°C VO = 2.5 V
600 300
ÁÁ ÁÁ
ÁÁ ÁÁ
400 200
IDD
IDD
ÁÁ 200 ÁÁ 100
0 0
0 1 2 3 4 5 6 7 8 – 75 – 50 – 25 0 25 50 75 100 125
| VDD ± | – Supply Voltage – V TA – Free-Air Temperature – °C
Figure 38 Figure 39

TLC226x, TLC226xA
TLC2264
SUPPLY CURRENT †‡ SLEW RATE‡
vs vs
FREE-AIR TEMPERATURE LOAD CAPACITANCE
1200 1
VDD = 5 V
AV = – 1
1000 VDD ± = ± 5 V TA = 25°C
VO = 0 0.8
µA
SR –
µs
v/us
800
SR – Slew Rate – V/
0.6
VDD = 5 V
VO = 2.5 V
600 SR +
ÁÁ
0.4
400
ÁÁ
IDD
0.2
200
0 0
– 75 – 50 – 25 0 25 50 75 100 125 101 102 103 104
TA – Free-Air Temperature – °C CL – Load Capacitance – pF
Figure 40 Figure 41
SLEW RATE†‡
vs INVERTING LARGE-SIGNAL PULSE
FREE-AIR TEMPERATURE RESPONSE‡
1.2 5
VDD = 5 V
RL = 50 kΩ
1 CL = 100 pF
4 A = –1
V
TA = 25°C
SR – Slew Rate – v/uss
SR –
V/ µ
0.8
3
0.6 SR +
2
0.4
VO
VDD = 5 V
RL = 50 kΩ 1
0.2
CL = 100 pF
AV = 1
0 0
– 75 – 50 – 25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16 18 20
TA – Free-Air Temperature – °C t – Time – µs
Figure 42 Figure 43

TLC226x, TLC226xA
INVERTING LARGE-SIGNAL PULSE VOLTAGE-FOLLOWER LARGE-SIGNAL

RESPONSE PULSE RESPONSE†
5 5
VDD± = ± 5 V VDD = 5 V
4 RL = 50 kΩ RL = 50 kΩ
CL = 100 pF CL = 100 pF
3 4 AV = 1
AV = – 1
TA = 25°C
TA = 25°C
1 3
–1 2
VO
VO
–2
–3 1
–4
–5 0
0 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20
t – Time – µs t – Time – µs
Figure 44 Figure 45
VOLTAGE-FOLLOWER LARGE-SIGNAL INVERTING SMALL-SIGNAL

PULSE RESPONSE PULSE RESPONSE†
5 2.65
VDD± = ± 5 V VDD = 5 V
4 RL = 50 kΩ RL = 50 kΩ
CL = 100 pF CL = 100 pF
3 AV = 1 2.6 AV = – 1
TA = 25°C TA = 25°C
1 2.55
–1 2.5
VO
–2
VO
–3 2.45
–4
–5 2.4
0 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20
Figure 46 Figure 47

TLC226x, TLC226xA
INVERTING SMALL-SIGNAL VOLTAGE-FOLLOWER SMALL-SIGNAL

PULSE RESPONSE PULSE RESPONSE†
100 2.65
VDD± = ± 5 V VDD = 5 V
RL = 50 kΩ RL = 50 kΩ
CL = 100 pF CL = 100 pF
AV = – 1 2.6 AV = 1
VO – Output Voltage – mV
50 TA = 25°C TA = 25°C
2.55
2.5
VO
VO
– 50
2.45
– 100 2.4
0 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20
Figure 48 Figure 49
EQUIVALENT INPUT NOISE VOLTAGE†

VOLTAGE-FOLLOWER SMALL-SIGNAL vs
PULSE RESPONSE FREQUENCY
100 60
VDD ± = ± 5 V VDD = 5 V
nv//HzHz
RL = 50 kΩ RS = 20 Ω
CL = 100 pF TA = 25°C
V n – Equivalent Input Noise Voltage – nV/
50
AV = 1
50 TA = 25°C
40
0 30
20
VO
– 50
10
VN
– 100 0
0 2 4 6 8 10 12 14 16 18 20 101 102 103 104
t – Time – µs f – Frequency – Hz
Figure 50 Figure 51

TLC226x, TLC226xA
EQUIVALENT INPUT NOISE VOLTAGE

EQUIVALENT INPUT NOISE VOLTAGE OVER
vs
A 10-SECOND PERIOD†
FREQUENCY
1000
60
VDD± = ± 5 V
nV/ Hz
V n – Equivalent Input Noise Voltage – nv//Hz
RS = 20 Ω 750
50 TA = 25°C
500
Noise Voltage – nV
40 250
0
30
– 250
20
– 500
10 VDD = 5 V
– 750 f = 0.1 Hz to 10 Hz
VN
TA = 25°C
0 – 1000
0 2 4 6 8 10
101 102 103 104
t – Time – s
Figure 52 Figure 53
INTEGRATED NOISE VOLTAGE TOTAL HARMONIC DISTORTION PLUS NOISE†

vs vs
FREQUENCY FREQUENCY
THD + N – Total Harmonic Distortion Plus Noise – %
100 0.1
Calculated Using Ideal Pass-Band Filter
Low Frequency = 1 Hz
AV = 100
TA = 25°C
Integrated Noise Voltage – µ V
10
0.01
AV = 10
1
AV = 1
VDD = 5 V
RL = 50 kΩ
TA = 25°C
0.1 0.001
100 101 102 103 104 105 101 102 103 104 105
f – Frequency – Hz f – Frequency – Hz
Figure 54 Figure 55

TLC226x, TLC226xA
GAIN-BANDWIDTH PRODUCT GAIN-BANDWIDTH PRODUCT †‡

vs vs
SUPPLY VOLTAGE FREE-AIR TEMPERATURE
940 1200
f = 10 kHz VDD = 5 V
RL = 50 kΩ f = 10 kHz
CL = 100 pF CL = 100 pF
900 TA = 25°C
Gain-Bandwidth Product – kHz
Gain-Bandwidth Product – kHz

1000
860
800
820
600
780
740 400
0 1 2 3 4 5 6 7 8 – 75 – 50 – 25 0 25 50 75 100 125
| VDD ± | – Supply Voltage – V TA – Free-Air Temperature – °C
Figure 56 Figure 57
PHASE MARGIN GAIN MARGIN

vs vs
LOAD CAPACITANCE LOAD CAPACITANCE
20
75° TA = 25°C
TA = 25°C
60°
15
Rnull = 100 Ω Rnull = 100 Ω
m – Phase Margin
Gain Margin – dB
Rnull = 50 Ω
45°
10
Rnull = 50 Ω
30°
φom
Rnull = 20 Ω
50 kΩ 5 Rnull = 20 Ω
15° VDD +
Rnull = 10 Ω
50 kΩ Rnull
VI –
+ CL Rnull = 10 Ω Rnull = 0
VDD – Rnull = 0 0
0°
101 10 2 10 3 10 4 101 10 2 10 3 10 4
CL – Load Capacitance – pF CL – Load Capacitance – pF
Figure 58 Figure 59

TLC226x, TLC226xA
UNITY-GAIN BANDWIDTH† OVERESTIMATION OF PHASE MARGIN†

vs vs
LOAD CAPACITANCE LOAD CAPACITANCE
1000 14°
TA = 25°C TA = 25°C
12°
B1 – Unity-Gain Bandwidth – kHz
Overestimation of Phase Margin

Rnull = 100 Ω
800
10°
8°
600 Rnull = 50 Ω
6°
ÁÁ 4°
ÁÁ
400
Rnull = 10 Ω
Rnull = 20 Ω
2°
200 0
101 10 2 10 3 10 4 101 10 2 10 3 10 4
CL – Load Capacitance – pF CL – Load Capacitance – pF
Figure 60 Figure 61
† See application information

TLC226x, TLC226xA
APPLICATION INFORMATION
driving large capacitive loads

The TLC226x is designed to drive larger capacitive loads than most CMOS operational amplifiers. Figure 58
and Figure 59 illustrate its ability to drive loads greater than 400 pF while maintaining good gain and phase
margins (Rnull = 0).
A smaller series resistor (Rnull) at the output of the device (see Figure 62) improves the gain and phase margins
when driving large capacitive loads. Figure 58 and Figure 59 show the effects of adding series resistances of
10 Ω, 20 Ω, 50 Ω, and 100 Ω. The addition of this series resistor has two effects: the first is that it adds a zero
to the transfer function and the second is that it reduces the frequency of the pole associated with the output
load in the transfer function.
The zero introduced to the transfer function is equal to the series resistance times the load capacitance. To
ǒ Ǔ
calculate the improvement in phase margin, equation 1 can be used.
∆Θ m1 + tan–1 2 × π × UGBW × R
null
× C
L (1)
Where :
∆Θ m1 + improvement in phase margin
UGBW + unity-gain bandwidth frequency
R null + output series resistance
C L + load capacitance
The unity-gain bandwidth (UGBW) frequency decreases as the capacitive load increases (see Figure 60). To
use equation 1, UGBW must be approximated from Figure 60.
Using equation 1 alone overestimates the improvement in phase margin, as illustrated in Figure 61. The
overestimation is caused by the decrease in the frequency of the pole associated with the load, thus providing
additional phase shift and reducing the overall improvement in phase margin. The pole associated with the load
is reduced by the factor calculated in equation 2.
F + 1 ) gm1 × R (2)
null
Where :
F + factor reducing frequency of pole
g m + small-signal output transconductance (typically 4.83 × 10 – 3 mhos)
R null + output series resistance
For the TLC226x, the pole associated with the load is typically 7 MHz with 100-pF load capacitance. This value
varies inversely with CL: at CL = 10 pF, use 70 MHz, at CL = 1000 pF, use 700 kHz, and so on.
Reducing the pole associated with the load introduces phase shift, thereby reducing phase margin. This results
in an error in the increase in phase margin expected by considering the zero alone (equation 1). Equation 3
approximates the reduction in phase margin due to the movement of the pole associated with the load. The
result of this equation can be subtracted from the result of the equation in equation 1 to better approximate the
improvement in phase margin.

TLC226x, TLC226xA
ǒ Ǔ
driving large capacitive loads (continued)
ȱȧǒ Ǔȳȧ
Where :
∆Θ m2 + tan–1
Ȳ ȴ
UGBW
F × P2
– tan –1 UGBW
P2
(3)
∆Θ m2+ reduction in phase margin

UGBW + unity-gain bandwidth frequency
F + factor from equation 2
P 2 + unadjusted pole (70 MHz @10 pF, 7 MHz @100 pF, etc.)
Using these equations with Figure 60 and Figure 61 enables the designer to choose the appropriate output
series resistance to optimize the design of circuits driving large capacitive loads.
50 kΩ
VDD +
50 kΩ Rnull
VI –
+ CL
VDD – / GND
Figure 62. Series-Resistance Circuit

TLC226x, TLC226xA
macromodel information
Macromodel information provided was derived using Microsim Parts, the model generation software used
with Microsim PSpice . The Boyle macromodel (see Note 5) and subcircuit in Figure 63 are generated using
the TLC226x typical electrical and operating characteristics at TA = 25°C. Using this information, output
simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
D Maximum positive output voltage swing D Unity-gain frequency
D Maximum negative output voltage swing D Common-mode rejection ratio
D Slew rate D Phase margin
D Quiescent power dissipation D DC output resistance
D Input bias current D AC output resistance
D Open-loop voltage amplification D Short-circuit output current limit
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
99
DLN
3 EGND +
VCC +
9 92
FB
+ – 90 91
RSS ISS
RO2 + DLP + –
VB
RP HLIM VLP VLN
+ –
2 10 – – +
IN – VC R2
J1 J2 – C2
DP 6 7
IN + 53 +
1 11 VLIM
12 DC GCM GA
–
C1 8
RD1 RD2
60 RO1
+ DE
VAD 5
– 54
VCC –
4 – +
VE OUT
.SUBCKT TLC226x 1 2 3 4 5 RD1 60 11 21.22E3
C1 11 12 3.560E–12 RD2 60 12 21.22E3
C2 6 7 15.00E–12 R01 8 5 120
DC 5 53 DX R02 7 99 120
DE 54 5 DX RP 3 4 26.04E3
DLP 90 91 DX RSS 10 99 24.24E6
DLN 92 90 DX VAD 60 4 –.6
DP 4 3 DX VB 9 0 DC 0
EGND 99 0 POLY (2) (3,0) (4,0) 0 .5 .5 VC 3 53 DC .65
FB 7 99 POLY (5) VB VC VE VLP VE 54 4 DC .65
+ VLN 0 21.04E6 –30E6 30E6 30E6 –30E6 VLIM 7 8 DC 0
GA 6 0 11 12 47.12E–6 VLP 91 0 DC 1.4
GCM 0 6 10 99 4.9E–9 VLN 0 92 DC 9.4
ISS 3 10 DC 8.250E–6 .MODEL DX D (IS=800.0E–18)
HLIM 90 0 VLIM 1K .MODEL JX PJF (IS=500.0E–15 BETA=281E–6
J1 11 2 10 JX + VTO= –.065)
J2 12 1 10 JX .ENDS
R2 6 9 100.0E3
Figure 63. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.

PACKAGE OPTION ADDENDUM
www.ti.com 4-Feb-2021
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
5962-9469201QHA ACTIVE CFP U 10 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 9469201QHA
& Green TLC2262M
5962-9469203QPA ACTIVE CDIP JG 8 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 9469203QPA
& Green TLC2262AM
5962-9469204Q2A ACTIVE LCCC FK 20 1 Non-RoHS POST-PLATE N / A for Pkg Type -55 to 125 5962-
& Green 9469204Q2A
TLC2264
AMFKB
5962-9469204QCA ACTIVE CDIP J 14 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-9469204QC
& Green A
TLC2264AMJB
TLC2262AID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2262AI
TLC2262AIDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2262AI
TLC2262AIDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2262AI
TLC2262AIDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2262AI
TLC2262AIP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 TLC2262AI
TLC2262AIPW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Y2262A
TLC2262AIPWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Y2262A
TLC2262AIPWRG4 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Y2262A
TLC2262AMJG ACTIVE CDIP JG 8 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 TLC2262
& Green AMJG
TLC2262AMJGB ACTIVE CDIP JG 8 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 9469203QPA
& Green TLC2262AM
TLC2262AQD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 C2262A
TLC2262CD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2262C
TLC2262CDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2262C
Addendum-Page 1
(6)
TLC2262CP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TLC2262CP
TLC2262CPE4 ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TLC2262CP
TLC2262CPW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 P2262
TLC2262CPWG4 ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 P2262
TLC2262CPWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 P2262
TLC2262CPWRG4 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 P2262
TLC2262ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2262I
TLC2262IDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2262I
TLC2262IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2262I
TLC2262IP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type TLC2262IP
TLC2262MUB ACTIVE CFP U 10 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 9469201QHA
& Green TLC2262M
TLC2262QD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 C2262Q
TLC2262QDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 C2262Q
TLC2262QDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM C2262Q
TLC2264AID ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2264AI
TLC2264AIDG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2264AI
TLC2264AIDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2264AI
TLC2264AIN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 TLC2264AIN
TLC2264AIPW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Y2264A
TLC2264AIPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Y2264A
TLC2264AIPWRG4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Y2264A
Addendum-Page 2
(6)
TLC2264AMFKB ACTIVE LCCC FK 20 1 Non-RoHS POST-PLATE N / A for Pkg Type -55 to 125 5962-
& Green 9469204Q2A
TLC2264
AMFKB
TLC2264AMJ ACTIVE CDIP J 14 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 TLC2264AMJ
& Green
TLC2264AMJB ACTIVE CDIP J 14 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-9469204QC
& Green A
TLC2264AMJB
TLC2264AQD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2264AQ
TLC2264AQDRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM PJ2264A
TLC2264CD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TLC2264C
TLC2264CDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TLC2264C
TLC2264CN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TLC2264CN
TLC2264CPW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 P2264
TLC2264CPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 P2264
TLC2264CPWRG4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 P2264
TLC2264ID ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM TLC2264I
TLC2264IDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM TLC2264I
TLC2264IN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type TLC2264IN
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 3
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLC2262, TLC2262A, TLC2262AM, TLC2262M, TLC2264A, TLC2264AM :
• Catalog: TLC2262A, TLC2262, TLC2264A

• Automotive: TLC2264A-Q1, TLC2264A-Q1
• Military: TLC2262M, TLC2262AM, TLC2264AM
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product

• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 4
• Military - QML certified for Military and Defense Applications
Addendum-Page 5
PACKAGE MATERIALS INFORMATION
www.ti.com 10-Nov-2020
TAPE AND REEL INFORMATION
*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLC2262AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLC2262AIPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1
TLC2262CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLC2262CPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1
TLC2262IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLC2262QDR SOIC D 8 2500 330.0 12.5 6.4 5.2 2.1 8.0 12.0 Q1
TLC2264AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC2264AIPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLC2264AQDRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC2264CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC2264CPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLC2264IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 10-Nov-2020
*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLC2262AIDR SOIC D 8 2500 340.5 338.1 20.6
TLC2262AIPWR TSSOP PW 8 2000 853.0 449.0 35.0
TLC2262CDR SOIC D 8 2500 340.5 338.1 20.6
TLC2262CPWR TSSOP PW 8 2000 853.0 449.0 35.0
TLC2262IDR SOIC D 8 2500 340.5 338.1 20.6
TLC2262QDR SOIC D 8 2500 340.5 338.1 20.6
TLC2264AIDR SOIC D 14 2500 333.2 345.9 28.6
TLC2264AIPWR TSSOP PW 14 2000 853.0 449.0 35.0
TLC2264AQDRG4 SOIC D 14 2500 350.0 350.0 43.0
TLC2264CDR SOIC D 14 2500 333.2 345.9 28.6
TLC2264CPWR TSSOP PW 14 2000 853.0 449.0 35.0
TLC2264IDR SOIC D 14 2500 333.2 345.9 28.6
Pack Materials-Page 2
PACKAGE OUTLINE
U0010A SCALE 1.400
CFP - 2.03 mm max height
CERAMIC FLATPACK
.27 MAX .005 MIN

.045 MAX .010 .002 PIN 1 ID GLASS TYP
TYP
1
10
8X .050 .005
.27 MAX
GLASS
10X .017 .002 5 6
+.019
5X .32 .01 .241 5X .32 .01
-.003
.005 .001
+.013
.067
-.012
.045
.026
4225582/A 01/2020
NOTES:
1. All linear dimensions are in inches. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
PACKAGE OUTLINE
J0014A SCALE 0.900
CDIP - 5.08 mm max height
CERAMIC DUAL IN LINE PACKAGE
PIN 1 ID A 4X .005 MIN

(OPTIONAL) [0.13] .015-.060 TYP
[0.38-1.52]
1
14
12X .100
[2.54] 14X .014-.026
14X .045-.065 [0.36-0.66]
[1.15-1.65]
.010 [0.25] C A B
.754-.785
[19.15-19.94]
7 8
B .245-.283 .2 MAX TYP .13 MIN TYP

[6.22-7.19] [5.08] [3.3]
C SEATING PLANE
.308-.314
[7.83-7.97]
AT GAGE PLANE
.015 GAGE PLANE

[0.38]
0 -15 14X .008-.014

TYP [0.2-0.36]
4214771/A 05/2017
NOTES:
1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for
reference only. Dimensioning and tolerancing per ASME Y14.5M.
3. This package is hermitically sealed with a ceramic lid using glass frit.
4. Index point is provided on cap for terminal identification only and on press ceramic glass frit seal only.
5. Falls within MIL-STD-1835 and GDIP1-T14.
www.ti.com
EXAMPLE BOARD LAYOUT
J0014A CDIP - 5.08 mm max height
CERAMIC DUAL IN LINE PACKAGE
(.300 ) TYP
[7.62] SEE DETAIL B
SEE DETAIL A
1 14
12X (.100 )
[2.54]
SYMM
14X ( .039)
[1]
7 8
SYMM
LAND PATTERN EXAMPLE

NON-SOLDER MASK DEFINED
SCALE: 5X
.002 MAX (.063)

[0.05] [1.6]
ALL AROUND METAL
( .063)
SOLDER MASK [1.6]
OPENING
METAL
SOLDER MASK .002 MAX

(R.002 ) TYP [0.05]
OPENING
[0.05] ALL AROUND
DETAIL A DETAIL B
SCALE: 15X 13X, SCALE: 15X
4214771/A 05/2017
www.ti.com
PACKAGE OUTLINE
D0008A SCALE 2.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A PIN 1 ID AREA
6X .050
[1.27]
8
1
.189-.197 2X
[4.81-5.00] .150
NOTE 3 [3.81]
4X (0 -15 )
4
5
8X .012-.020
B .150-.157 [0.31-0.51]
.069 MAX
[3.81-3.98] .010 [0.25] C A B [1.75]
NOTE 4
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
0 -8 [0.11-0.25]
.016-.050
[0.41-1.27] DETAIL A
(.041) TYPICAL
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
D0008A SOIC - 1.75 mm max height
8X (.061 )
[1.55]
SYMM SEE
DETAILS
1
8
8X (.024)
[0.6] SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]

EXPOSED METAL SHOWN
SCALE:8X
SOLDER MASK SOLDER MASK

METAL METAL UNDER
OPENING OPENING SOLDER MASK
EXPOSED
METAL EXPOSED
METAL
.0028 MAX .0028 MIN
[0.07] [0.07]
ALL AROUND ALL AROUND
NON SOLDER MASK SOLDER MASK

DEFINED DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A SOIC - 1.75 mm max height
8X (.061 )
[1.55] SYMM
1
8
8X (.024)
[0.6] SYMM
(R.002 ) TYP
5 [0.05]
4
6X (.050 )
[1.27]
(.213)
[5.4]
SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8 5
0.280 (7,11)
0.245 (6,22)
1 4
0.065 (1,65)
0.045 (1,14)
0.063 (1,60) 0.310 (7,87)

0.020 (0,51) MIN
0.015 (0,38) 0.290 (7,37)
0.200 (5,08) MAX

Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0°–15°
0.015 (0,38)
0.100 (2,54) 0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OUTLINE
PW0008A SCALE 2.800
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
C
6.6 SEATING PLANE
TYP
6.2
A PIN 1 ID 0.1 C
AREA
6X 0.65
8
1
3.1 2X
2.9
NOTE 3 1.95
4
5
0.30
8X
0.19
4.5 1.2 MAX
B 0.1 C A B
4.3
NOTE 4
(0.15) TYP
SEE DETAIL A
0.25
GAGE PLANE
0.75 0.15
0 -8 0.05
0.50
DETAIL A
TYPICAL
4221848/A 02/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153, variation AA.
www.ti.com
PW0008A TSSOP - 1.2 mm max height
8X (1.5)
8X (0.45) SYMM
(R0.05)
1 TYP
8
SYMM
6X (0.65)
5
4
(5.8)

SCALE:10X
SOLDER MASK METAL UNDER SOLDER MASK

METAL OPENING
OPENING SOLDER MASK
0.05 MAX 0.05 MIN

ALL AROUND ALL AROUND
NON SOLDER MASK SOLDER MASK

DEFINED DEFINED
SOLDER MASK DETAILS

NOT TO SCALE
4221848/A 02/2015
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0008A TSSOP - 1.2 mm max height
8X (1.5)
SYMM (R0.05) TYP
8X (0.45)
1
8
SYMM
6X (0.65)
5
4
(5.8)
SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
SCALE:10X
4221848/A 02/2015
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
permission to use these resources only for development of an application that uses the TI products described in the resource. Other
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Copyright © 2021, Texas Instruments Incorporated

D D D D D D D D D D: Tlc226X, Tlc226Xa Advanced Lincmos Rail-To-Rail Operational Amplifiers

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D D D D D D D D D D: Tlc226X, Tlc226Xa Advanced Lincmos Rail-To-Rail Operational Amplifiers

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TLC226x, TLC226xA

Advanced LinCMOS RAIL-TO-RAIL

description EQUIVALENT INPUT NOISE VOLTAGE

V n – Equivalent Input Noise Voltage – nV/

The TLC226x, exhibiting high input impedance

Advanced LinCMOS is a trademark of Texas Instruments.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

TLC2262 AVAILABLE OPTIONS

TLC2264 AVAILABLE OPTIONS

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC2262C, TLC2262AC TLC2262M, TLC2262AM . . . FK PACKAGE

TLC2262M, TLC2262AM . . . JG PACKAGE TLC2262M, TLC2262AM . . . U PACKAGE

1OUT 1 14 4OUT 1OUT 1 14 4OUT 3 2 1 20 19

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

equivalent schematic (each amplifier)

Q3 Q6 Q9 Q12 Q14 Q16

Q13 Q15 Q17

ACTUAL DEVICE COMPONENT COUNT†

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

DISSIPATION RATING TABLE

recommended operating conditions

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

TLC2262C electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC2262C operating characteristics at specified free-air temperature, VDD = 5 V

φm Phase margin at unity gain 25°C 56°

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

TLC2262C electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC2262C operating characteristics at specified free-air temperature, VDD ± = ±5 V

φm Phase margin at unity gain 25°C 57°

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9

TLC2264C electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise

10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC2264C operating characteristics at specified free-air temperature, VDD = 5 V

φm Phase margin at unity gain 25°C 56°

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11

TLC2264C electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless

12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC2264C operating characteristics at specified free-air temperature, VDD ± = ±5 V

φm Phase margin at unity gain 25°C 57°

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13

TLC2262I electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise

14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC2262I operating characteristics at specified free-air temperature, VDD = 5 V

Gain-bandwidth f = 50 kHz, RL = 50 kΩ‡,

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15

TLC2262I electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless otherwise

25°C 80 200 80 200

16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC2262I operating characteristics at specified free-air temperature, VDD ± = ±5 V

Gain-bandwidth f =10 kHz,, RL = 50 kΩ,,

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17

TLC2264I electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise

18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC2264I operating characteristics at specified free-air temperature, VDD = 5 V

Gain-bandwidth f = 50 kHz, RL = 50 kΩ‡,

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19

TLC2264I electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless otherwise

25°C 80 200 80 200

20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC2264I operating characteristics at specified free-air temperature, VDD ± = ±5 V

Gain-bandwidth f =10 kHz,, RL = 50 kΩ,,