BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE PILANI, HYDERABAD CAMPUS

Second Semester 2019-2020

CS/ECE/EEE/INSTR – F241 (Microprocessors and Interfacing)
Mid-Semester Test

Max Marks: 60 Time: 90 minutes Date: 02/03/2020

There are 10 questions of multiple choice, each carrying 2 marks. Answers may be provided in the
Instructions: -
boxes given below. Rest of the questions may be answered in the answer sheets provided. Attempt all questions.

Name: ID No.:

Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10

b c d c c b a d c b

1. The instruction that is used as a prefix to another instruction to execute repeatedly until the CX register
becomes zero is
a) SCAS b) REP c) CMPS d) STOS
2. The instructions that are used to call a subroutine from the main program and return to the main program
after the execution of called function are

a) CALL, JMP b) JMP, IRET c) CALL, RET d) JMP, RET

3. NOP instruction results in

a) New Operation b) Delay generation c) New Pointer d) None of these

4. When a stack segment is initialized, then

a) SS is initialized b) SP is initialized c) SS and SP are initialized d) SS and SP need not be initialized

5. The instruction POP CX does the following:

a) Copies the contents of SP register to CX

b) Copies a word from top of the stack to CX and decrements SP by 2
c) Copies a word from top of the stack to CX and increments SP by 2
d) Copies contents of CX to SP register

6. Which of the following signals are used to select even/odd memories in a memory bank

a) A0, AI b) A0, c) D0, d) D0, D1

7. The 8086 processor has a pipelined architecture

a) Yes b) No c) May be d) None of these

8. The following signal is not relevant during the memory write cycle

a) ALE b) c) d) None of these

9. Time taken by a typical memory read or write cycle in 8086 processor driven by a 10 MHz clock is

a) 100 ns b) 200 ns c) 400 ns d) 800 ns

10. A memory bank with even and odd banks connected to 8086 processor has a total memory of 16K.
Number of address lines required to address all memory locations are

a) 13 b) 14 c) 19 d) 20

11. Write a code that loops 256 times using only 3 instructions and an 8-bit register. (5 marks)

Solution: The trick is to initialize CL with 0 but not 0FFH.

MOV CL, 00H
UP: DEC CL
JNZ UP

12. What will the following code do? (3 marks)

MOV AL, 0FF H

MOV BL, 01 H
ADD AL, BL
INTO

Solution:
AL will contain 00H and the carry flag is set after addition, in the above code. But the overflow flag is not set.
Therefore, INTO instruction, which generates type 0 interrupt when overflow flag is set, simply introduces delay.