“VHDL Design and Implementationof High Speed

Double Data Rate 3 Memory ControllerWith AXI 2.0

Compliant”

A Dissertation
Submitted in partial fulfillment of the requirement for the award of
Degree of Master of Technology in Micro Electronics & VLSI Design

Submitted to

RAJIV GANDHI PROUDYOGIKI VISHWAVIDYALAYA BHOPAL (M.P.)

Submitted By
Sharad Singh Parihar
Enrollment No. 0111EC17MT21

Under the Supervision of

Prof. SandipNemade
Professor

ESTD: 1999
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
TECHNOCRATS INSTITUTE OF TECHNOLOGY, BHOPAL
 Technocrats Institute of Technology, Bhopal
Department of Electronics and Communication Engineering

CERTIFICATE

This is to certify that the work embodies in this dissertation entitled “VHDL

Design and Implementationof High Speed Double Data Rate 3

Memory ControllerWith AXI 2.0 Compliant’” being submitted by
“Sharad Singh Parihar ” (Enrollment No. 0111EC17MT21) in partial fulfillment
of the requirement for the award of “Master of Technology in Micro Electronics

& VLSI Design” to Rajiv Gandhi ProudyogikiVishwavidyalaya, Bhopal

(M.P.)duringtheacademicyear2017isarecordofbonafidepieceofwork,carriedout by him
under my supervision and guidance in the Department of Electronics &
Communication Engineering”, Technocrats Institute of Technology, Bhopal
(M.P).

Guided by: Approvedby:

Prof.SandipNemade Dr. VIKASGUPTA

Professor Professor&HOD

Forwarded By:

Dr. BHUPENDRA VERMA

Director
 Technocrats Institute of Technology, Bhopal
Department of Electronics and Communication Engineering

CERTIFICATE OF APPROVAL

The dissertation entitled “VHDL Design and Implementationof High

Speed Double Data Rate 3 Memory ControllerWith AXI 2.0

Compliant” being submitted by Sharad Singh Parihar” (Enrollment No.
0111EC17MT21) has been examined by us and is hereby approved for the award of
degree “Master of Technology in Micro Electronics & VLSI Design”, for
which it has been submitted. It is understood that by this approval the undersigned do
not necessarily
endorseorapproveanystatementmade,opinionexpressedorconclusiondrawntherein, but
approve the dissertation only for the purpose for which it has beensubmitted.

(InternalExaminer) (ExternalExaminer)
Date: Date:
 Technocrats Institute of Technology, Bhopal
Department of Electronics and Communication Engineering

DECLARATION

I Sharad Singh Parihar, student of Master of Technology in Micro Electronics

& VLSI Design, in the Department of Electronics and Communication

Engineering, Technocrats Institute of technology, Bhopal, Madhya Pradesh,
herebydeclarethattheworkpresentedinthedissertationentitle“VHDL Design and
Implementationof High Speed Double Data Rate 3 Memory
ControllerWith AXI 2.0 Compliant” is the outcomes of my own work, is
bonafide and correct to the best of my knowledge and this work has been carried out
taking care of engineering ethics. The work presented does not infringe any patented
work and has not been submitted to any other university or anywhere else for the
award of any degree or any professionaldiploma.

Sharad Singh
PariharEnroll. No.
0111EC17MT21
Date:
 Technocrats Institute of Technology, Bhopal
Department of Electronics and Communication Engineering

DECLARATION

I hereby declare that the work which is being presented in the dissertation entitle
“VHDL Design and Implementationof High Speed Double Data Rate 3

Memory ControllerWith AXI 2.0

Compliant”inpartialfulfillmentoftherequirementfortheawarddegreeofname& specialization
of Master of Technology in Micro Electronics & VLSI Designis an authentic record
of my own work carried under the guidance of Prof. SandipNemade. I have not submitted
the matter embodies in this report for award of any otherdegree.
I also declared that “A check for plagiarism has been carried out on the thesis and is
found within acceptable limit and report of which is enclosed herewith.”

Sharad Singh
PariharEnroll. No.
0111EC17MT21

Supervisor (Head ofthedepartment) Director

 ACKNOWLEDGEMENT

Itisamatterofgreatfelicityandprivilegeformetotakeanopportunitytoworkunder the

guidance of Prof. SandipNemade, Professor, Department of Electronics and

CommunicationEngineeringTIT,Bhopalwhoconstantlysupportedandencouraged at

every step of mydissertation.

I would also like to acknowledge Dr. Vikas Gupta, Professor & HOD, TIT, Bhopal

for his great cooperation and support.

I would also like to acknowledge Dr. BhupendraVerma, Director, TIT, Bhopalfor

his great cooperation and support.

I am thankful to all the faculty members of Department of Electronics &

Communication Engineering, TIT, Bhopal, who helped me in one or other way

during the course of my study.

And finally all glory to my Parents, Brother without their grace this work was merely a

dream.

Place:TIT,Bhopal Sharad Singh Parihar

Date: Enroll. No.0111EC17MT21
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