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A Modified Artificial Bee Colony Optimization based FIR filter Design with
Experimental Validation using FPGA

Article  in  IET Signal Processing · June 2016

DOI: 10.1049/iet-spr.2015.0214

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IET Signal Processing

Research Article

Modified artificial bee colony optimisation ISSN 1751-9675

Received on 4th June 2015
Revised 11th May 2016
based FIR filter design with experimental Accepted on 13th May 2016
doi: 10.1049/iet-spr.2015.0214
validation using field-programmable gate www.ietdl.org

array
Atul Kumar Dwivedi1, Subhojit Ghosh1 , Narendra D. Londhe1
1Department of Electrical Engineering, NIT Raipur, Raipur, India
E-mail: sghosh.ele@nitrr.ac.in

Abstract: Optimisation based design of finite impulse response (FIR) filters has been an active area of research for quite some
time. The various algorithms proposed for FIR filter design aim at meeting a set of desired specifications in the frequency
domain. Evolutionary algorithms have been found to be very effective for FIR filter design because of the non-linear, non-
differentiable and non-convex nature of the associated optimisation problem. The present work proposes two modified versions
of a recently developed evolutionary technique i.e. artificial bee colony (ABC) algorithm for design of FIR filters. The applicability
of the proposed approach has been evaluated by comparing its response with conventional reported filter design techniques.
The proposed variants of ABC are found to outperform other non-convex algorithms in achieving the desired specifications. In
addition to the simulation results, the designed filters have been implemented in hardware using Xilinx-xc7vx330t-3ffg1157
(Virtex-7) field programmable gate array. The hardware implementation allows validation of the proposed techniques for
practical filtering applications by considering real time operation parameters.

1 Introduction The limitations have motivated the applications of evolutionary

The greater ease of implementation and faster execution time, has
led to wide usage of digital filters for different signal processing
applications. For applications where stability and linear phase are
of prime importance, digital filters are implemented in a non-
recursive manner. The most common type of non-recursive filter is
the finite impulse response (FIR) filter. In recent times FIR filters
have found wide applications in digital communications,
biomedical signal, speech and audio signal processing.
In spite of the advances in the development of design
algorithms for FIR filters, there still exist some issues related to
low ripple, sharper cut off, filter order reduction and power
minimisation. For this purpose, optimal filters are designed by
solving an optimisation problem based on a specified criterion, so
as to achieve a desired frequency response. In this regard
approaches based on tree search [1], least square [2], neural
networks [3] and eigen vector [4] have been reported, which
provide sub-optimal filters, post convergence. To design a globally
optimal filter, convex non-linear optimisation [5] and non-convex
global optimisation algorithms (OA) have been used in [6–11]. For
filter design, the major challenge of any optimisation based
technique is to achieve a desired frequency response with reduced
computational cost for the non-convex optimisation problem. The
non-convexity of the objective function and hence the optimisation
problem is attributed to the presence of complex, non-linear
relationship between the frequency response deviation and the
filter coefficients. Most of the optimisation based filter designing
techniques quantifies the deviation in terms of absolute value, L2
norm or in logarithmic scale, thus leading to non-linear objective
functions. The gradient based global OAs were based on initial
seed solution, and hence have a higher probability of converging to
the local minima. Among the non-convex techniques, the filled
function based methods search for a global minimum among the
local minima. In other words they employ certain auxiliary
functions to move successively from one local minimum to another
better one. Filled function based techniques though quite effective
in providing the global solution are not suitable for problems
having large number local minima. Moreover, like other non-
convex techniques they are sensitive to initial parameterisation.
algorithms (EAs) for filter design. For filter design, EA based
techniques have been found to meet the desired specifications of
ripple content and attenuation over a wide range [12–22]. The
inclusion of the stochastic behaviour in EAs leads to robustness of
the technique to problem size and constraints. For example, in the
present problem of FIR filter design, the proposed scheme can be
easily extended for designing filters of higher order and dimension.
The various techniques reported in this regard include simulated
annealing [12], hybrid genetic algorithm [13], Tabu search [14],
particle swarm optimisation (PSO) [15, 16], differential evolution
(DE) [17, 18], seeker optimisation algorithm (SOA) [19],
opposition based harmony search algorithm [20] and cat swarm
optimisation (CSO) [21]. Most of the above reported techniques
suffer from the limitations of tuning and selection of a large
number of control parameters, pre-mature convergence and large
execution time. In this context, a recently developed evolutionary
technique i.e. artificial bee colony (ABC) algorithm has been
applied in the present work for the design of FIR filters. In [22],
ABC algorithm has been applied for the design of infinite impulse
response filters. The conventional ABC algorithm, in spite of
possessing the advantage of easier implementation suffers from the
limitation of slow convergence and getting trapped into the local
minima. To overcome this, two modified versions (ABC MOD-I
and ABC MOD-II) of the conventional ABC algorithm has been
proposed. The proposed variants aim at increasing the probability
of global convergence with reduced computational cost by
improving the search behaviour.
All the reported EA based techniques discussed above have
concentrated on simulations and have not addressed issues related
to hardware implementation of the designed filter. Genetic
algorithm has been used in [23] for optimisation of high speed
implementation in field-programmable gate array (FPGA) for
improving pipelined architecture. GA suffers from limitation of
premature convergence to the local optima, selection of number of
tuning parameters and high computational cost. With the filter
coefficients obtained post-convergence of the proposed OAs, the
hardware implementation on a digital platform allows analysis of
quantisation errors, parasitic delays, area and power consumption.
These factors play an important role on the filter performance for

IET Signal Process. 1

© The Institution of Engineering and Technology 2016
real time applications. In the present work, along with the
simulations, the low pass filters (LPFs) designed using the
proposed techniques are experimentally validated by its
implementation using virtex-7 FPGA (device-
xc7vx330t-3ffg1157). FPGA technology provide great flexibility in
filter architecture and high reliability in its implementation. The
hardware results have been compared with simulations and the
complexity of the hardware required has been discussed in terms of
the utilised device logic, area and power requirements.
The major challenges of the present work can be summarised
as: application of an optimisation technique for filter design that
converges to the globally optimal solution with reduced
computational cost and implementing the filters using FPGA with
reduced hardware, area and power requirements. The contribution
of this work is three fold, first two modified versions of classical
ABC algorithm has been proposed which have a higher probability
of convergence to the global optimum and is computationally less
intensive as compared with other evolutionary optimisation
techniques. Second the proposed techniques have been applied to
FIR filter design with the aim of minimising ripple content and
transition width (TW). Finally to verify the applicability of the
proposed techniques for real time applications, the designed filters
have been implemented using FPGA. For all these cases a suitable
comparison has been carried out with existing non-convex heuristic
and deterministic optimisation techniques.
The paper is organised as follows. In the next section,
formulation of FIR filter design as an optimization problem has
been discussed. In section 3, ABC algorithm and its modifications
are discussed. In Section 4, FPGA implementation is discussed,
Section 5 describes the simulation and comparison of designed
filters with the state of the art algorithms, and finally Section 6
concludes the paper.
2 FIR filter design using evolutionary algorithm
In the present work, FIR filter design process has been framed as
an optimisation problem and further solved using the proposed
versions of conventional ABC algorithm. The algorithm
determines filter coefficients for a given set of filter specifications
based on the minimisation of the deviation between frequency
responses of desired and designed filter. The objective function can
be framed as
�1 = max ( | �(�) | − �p) + max ( | �(�) | − �s)
(1)
� ≤� p � ≥� s
where δs and δp are desired stop band and pass band ripple (PBR)
content, E(ω ) is the deviation calculated from
� � = � � �d � − � � (2)
where Md(ω ) and M(ω ) are the amplitude responses of the desired
and designed filters and
�d � = �d � |� = e −j� (3)
where ω  = (π/N)n, {ωε [0, π]}. Here the main aim of filter design
is to minimise the difference between desired and designed
amplitude response of the filter at N samples. In this regard, the
objective function specified in (1) has been modified as
�p
��
�2 = ∑ ��� ��� �p
�
− 1 − �p
�=0
s . t . � ≤ �p
(4)
�S
��
+ ∑ ��� ��� �s
�
− �s
�=1
s . t . � s > �s
where Hp and Hs are the amplitude responses of the designed filters
in pass band and stop band with Mp and Ns number of samples in
2 IET Signal Process.
pass band and stop band, respectively. Most of the existing works
reported on the application of EA for FIR filter design have not
concentrated on the minimisation of TW with faster pass band to
stop band transition. In the present work the objective function (4)
is modified by including a factor for sharper transition with
reduced deviation between pass band and stop band cut off
frequency. With the TW factor the optimisation function is given as
�p
��
�3 = ∑ ��� ��� �p
�
− 1 − �p
�=0
s . t . � ≤ �p
(5)
�S
�� ��
+
� s
� − �p + ∑ ��� ��� �s
�
− �s
�=1
s . t . ��, � > ��
where k is a constant used to provide a relative weightage to TW in
respect of other terms. For a given iteration i, k is evaluated as
�2 � − 1
�= (6)
�1 � − 1 + �3 � − 1
where E1, E2 and E3 represent first, second and third error terms of
(5). The objective function (5) is optimised to obtain the optimal
filter coefficients using modified ABC algorithm. FIR filters are
implemented in FPGA, using the optimised coefficients.
3 ABC algorithm
ABC algorithm [22] is a relatively new EA which mimics the
intelligent information sharing behavior of honey bees regarding
the nectar amount available in food sources. The food sources are
assumed to be in the proximity of nectar containing nest. Each food
source location represents a possible solution to the optimisation
problem. For the present work, the location corresponds to the
filter coefficients. The hive of the bees is composed of: (i)
employed bees which are associated with particular food sources
and their locations, and (ii) unemployed bees which look for food
sources to exploit them. Further unemployed bees consist of
onlooker bees and scout bees. Based on the observation of
employed bees, the onlooker bees understand the location, distance
and quality of the food sources. In ABC, this observational
behaviour of bees is used for solving optimisation problems.
An initial random population is generated for employed bees
and onlooker bees. Each solution xij(i = 1, 2, …, S) is a D-
dimensional matrix given as:
�11 �12 … �1D
�21 �22 … �2D
��� � = (7)
… … … …
��1 ��2 … ��D �×�
where D is the number of parameters to be optimised. After
initialisation, the population of bees (solutions) is subjected to
number of cycles, c = 1, 2, 3…MCN (max cycle number). An
employed bee produces a modification in the position depending
upon the local information and then the fitness (nectar) is
calculated. If fitness at new location is higher than the previous
one, the bee memorises the new location. The new location is given
by
��, � = ��, � + ��, � ��, � − ��, � (8)
where kε{1, 2, …, S × N} and jε{1, 2, …, D} are randomly chosen
indexes such that k ≠ i, ϕi,j is a randomly generated number
between [−1, 1], which controls the production of food sources
around xi,j. It can be observed from (8) that, reduction in the
perturbation of x leads the search to its optimum value.
The employed bees after completing their search process, share
the suitability of the food sources and position with onlooker bees.
© The Institution of Engineering and Technology 2016
An onlooker bee evaluates the nectar information taken from all
employed bees and chooses a food source with a probability Pi
calculated as:
fit�
�� = (9)
∑�� = 1 fit�
Similar to employed bee, an onlooker bee also calculates nectar
amount at each location updates neighbourhood locations and
employs greedy selection based on probability. If nectar in the
present location is higher, it memorises it.
Food source location which has repeatedly lowest nectar is
abandoned based on the limit value (L). These food source
locations are termed as scout bees. The location of scout bee is
updated and new random location is given for nectar calculation.
If there is any scout bee, it is replaced with a new randomly
generated solution as
��� = �min + � . �max − �min (10)
� � �
where r is a random number in [0,1] and θij is the food source
locations of selected onlooker bees. The best location is
memorised, following which the cycle count is updated till MCN.
3.1 Convergence of ABC
In (7), xij(c) represents initial population, and the corresponding
fitness isf(xij(c)). In the employed bee phase of algorithm, the new
food location is determined in (8), for which the fitness is given by
� ��� � = � ��� � + �� (11)
where ε is a constant multiplier which generates perturbation εΔf in
the fitness f(xij(c)). Greedy selection is applied between f(xij(c)) and
f(vij(c)). In greedy selection process, the employed bee memorise
better fitness between f(xij(c)) andf(vij(c)) as
� ��� � = max � ��� � , � ��� � (12)
thus
� ��� � ≥ � ��� � (13)
The solution xij improves its fitness value and moves towards the
optimal solution, however it does not guarantee convergence to
global optimum. To ensure achieving global optimum solution, a
probabilistic selection process is used by onlooker bees. Based on
the probability obtained using (9), a set of new location θij(c) is
calculated as
��� � = ��� � + � ��� � − ��� � (14)
where ψ is random number between [−1 1]. Food location i, is
selected based on probability (9). The selection ensures faster
movement of the algorithm towards optimal fitness. As θij(c) is
selected based on higher probability,
� ��� � ≥ � ��� � (15)
Bees associated with non-selected food locations after L selections,
are referred as scout bees. The scout bee location is updated using
(10). The second term in (10) will be large initially and will reduce
with the approach of solution towards global optimum. As scout
bee search somewhere far from the current employed bee location,
it ensures wider exploration of the search space and hence
increases the probability of global convergence irrespective of
initial population (xij). Further, bee locations θij, become employed
bee
��� � + 1 = ��� �
(16)
IET Signal Process.
© The Institution of Engineering and Technology 2016
hence
� ��� � + 1 = � ��� � (17)
from (16) and (17),
� ��� � + 1 ≥ � ��� � (18)
With every iteration the fitness improves or at least the best value
is maintained. With lesser diversity after few iterations the solution
may converge to local optima. However, diversity in population is
maintained by employing scout bees. Assuming the scout bees
properly explore the search space, the global convergence of the
proposed techniques can be ensured.
3.2 Modified ABC algorithm
The conventional ABC suffers from two major limitations for
optimisation problems which are multimodal and/or
multidimensional i.e. slower convergence (larger execution time)
and trapping into the local optimal solution. With the aim of
overcoming these limitations, two modifications in the
conventional ABC have been proposed in the present work. In the
first proposed variant of ABC, the onlooker bee position is updated
based on the best solution (bee position) obtained, instead of a
random position in search space. This leads to the following
equation for updating bee position
��� = �best, � + ��, � �best, � − ��, � (19)
where �best, � ���, � for ∀�, � ∈ 1.2…� represent location of
bees for minimum value of function in the current iteration.
Unlike conventional ABC which uses greedy selection for
onlooker bees, in the proposed algorithm tournament selection has
been adopted which gives equal unbiased importance to every
solution. While replacing (8) by (19) leads faster movement of all
the bees towards best position, incorporation of tournament
selection improves diversity in the population, which might be lost
due to motion of all bees along the same direction. The proposed
algorithm with these modifications is further referred as ABC
MOD-I.
In spite of the improved convergence speed, ABC MOD-I still
suffers from the problem of converging to local minima. Thus,
though effective for unimodal functions, it fails to provide the
global solution for multimodal and multidimensional functions.
The present problem of FIR filter design involves an objective
function which is both multimodal and multi-dimensional. The
dimension of the problem increases with increase in the order of
the filter. Hence, further modification has been proposed in
conventional ABC. To achieve the same, a stochastic component
has been included, which increases diversity in search process
through randomness in the position updation (8). This component
takes into account the lesser exploration that might arise from the
similar movements of bees. With the random component in the
search process, (19) is modified as
��� = �best, � + ��� �best, � − ��, � + �¯ �� ��, � − ��, � (20)
where k ∈ {1, 2, …SN), xi,j is the current solution, ϕij and �¯ ij are
randomly generated numbers between −1 and 1. Henceforth the
above algorithm is referred as ABC MOD-II.
4 FPGA implementation
The output of a FIR filter can be written as
�−1
�= ∑ ℎ � �d � (21)
�=0
where xd(k) = x(n − k). In this paper FIR filters are implemented
using distributed arithmetic (DA). In DA, input is represented in 2's
3
Fig. 1  Implementation architecture of the FIR filter

The multiplierless architecture [24] is designed using shift and

network. The types of adders that are used in shift and add
(coefficients) multiplication network are named as coefficient
multiplication adders (CMAs) and other adders as structural adders
(SAs). The effective word length (EWL) of a coefficient is
calculated by its word length excluding the sign bit and the leading
zero bits of the coefficient values; and the EWL of the filter refers
to the EWL of the coefficient with the maximum magnitude. The
mean adder length (MAL) is calculated from adder lengths of
CMAs and SAs as

Fig. 2  Example shift and add network used for implementation ∑� ���CMA + ∑ � ��SA
�

architecture for coefficients 2, 3 and 43 MAL = (27)

NA
complement system. Assuming B to be the word length of the where, NA is the number of adders. Here by adder length we mean
samples, then the input can be written as number of cascaded adders. The filters are implemented using full
�−1
adders. The number of full adders to implement jth fundamental bj,
∑
�
�d � = − �d � + [�d � ]� 2−� (22) denoted as NFAFUN are expressed as
0
�=1
� �
NFAFUN = log2 � � + �in − �CMA (28)
Substituting this in (21) we get
The number of full adders required for SA (for 0 < i < N) which
�−1 �−1 �−1
adds h(n − i)x into the tap delay line can be expressed as
�= − ∑ ℎ � �d � 0
+ ∑ ℎ � ∑ [�d � ]� 2−� (23)
�=0 �=0 �=1
�

which can be written as

�
NFASA = log2 ∑ ℎ � − � + �in − ��SA (29)
�=0

�−1 �−1 �−1 � �

The total number of adders are calculated using NFAFUN and NFASA .
�= − ∑ ℎ � �d � 0
+ ∑ 2−� ∑ ℎ � [�d � ]� (24)
In the next section, the complexity of hardware used in the
�=0 �=1 �=0
present work has been compared with other reported works on
or FPGA based FIR implementation.

�−1
5 Results and discussion
�= ∑ 2−� �� − �0 (25)
�=1 To evaluate the performance of the proposed algorithms (ABC
MOD-I and ABC MOD-II), for filter design applications, a
where comparison has been carried out by considering two examples. In
the first example, the designed filters have been compared with
�−1 heuristic EAs. In the second example the proposed design method
�� = ∑ ℎ � [�d � ]� (26) has been compared with the non-convex deterministic optimisation
�=0
methods. Finally the filters are implemented in hardware using
FPGA and the hardware complexity in terms of device utilisation
Since all the elements of the N point binary sequence [Xd(k)] are has been compared with other techniques.
evaluated for for (0 ≤ k ≤ N − 1), all the values of Kb are pre-  
computed and stored in the look up table (LUT), they can be read Example 1: A low pass FIR type-I filter is considered, with the
out directly using the bit sequence [xd(k)]b. Based on the discussion following specifications, fpass = 450 Hz, fstop = 550 Hz, fsampling = 
above, the architecture used for filter implementation is shown in 2000 Hz, filter order = 20, PBR (δp) = 0.1 and stop band ripple
Figs. 1 and 2. (SBR) (δs) = 0.01. For selecting the optimisation control
parameters, a number of pilot runs with different settings were

4 IET Signal Process.

© The Institution of Engineering and Technology 2016

Fig. 3  Frequency response of LPF designed using ABC, ABC MOD-I and
ABC MOD-II
executed, based on which the colony size and number of cycles are
fixed at 50 and 500, respectively, while scout bee limit is taken as
20.
The effectiveness of proposed modified versions of ABC
algorithm for FIR filter design has been evaluated in two stages. In
the first stage the comparison has been done between ABC, ABC
MOD-I and ABC MOD-II. Further comparison has been done
using filters designed using other EAs, i.e. PSO [15], DE [17],
CSO [21], Hybrid DE and PSO [16] and SOA [19]. The
comparison has been carried out in terms of the PBR, SBR,
maximum attenuation in stop band (SBA) and TW. The frequency
response is obtained using filter coefficients (Table 1) generated
following convergence of the optimisation problem (7) is shown in
Fig. 3.
Fig. 4 reports the iterative variation of the objective function for
all three algorithms. One of the proposed variant of ABC, i.e. ABC
MOD-II, not only provides a better solution i.e. filter coefficients
resulting in lesser ripples, but also achieves the same with lesser
iterations.
It can be observed that among all the cases the maximum SBA
is provided by ABC MOD-II (Fig 3 and Table 2). Near similar
characteristics are observed for all the cases in the PBR as well as
in the TW. The desired PBR i.e. 0.1 is achieved to the maximum
extent by ABC MOD-I.
To evaluate the appropriateness of ABC MOD-I and ABC
MOD-II, they have been compared with other reported EAs
(Table 3) for a FIR LPF designed with the specifications

Fig. 4  Convergence profile for ABC and modified ABC algorithms

considered in [15–21].
From Table 3 it can be observed that ABC MOD-II is able to
Table 1 Optimised coefficients of the FIR LP filter of 20 achieve a performance comparable with PSO with much reduced
order order i.e. 20 instead of 30. For the same filter order i.e. 20,
h(n) ABC ABC MOD-I ABC MOD-II maximum SBA is observed in the proposed ABC MOD-II,
h(1) = h(21) −0.01921411 0.00933007 0.02888959 followed by CSO and ABC MOD-I. Closeness to the desired PBR
h(2) = h(20) −0.00444831 0.02487247 0.04744011 has been observed to be maximum in ABC MOD-I followed by
ABC MOD-II and ABC. For PBR, ABC and its variants are found
h(3) = h(19) 0.02374065 −0.00434513 0.00586561
to be most effective followed by SOA. ABC MOD-II outperforms
h(4) = h(20) 0.02430839 −0.04021879 −0.0357454 all other reported techniques in maximum SBA and maximum SBR
h(5) = h(17) −0.02397951 −0.00365455 0.00135159 whereas a similar TW is observed for ABC MOD-II and CSO.
h(6) = h(16) −0.04191195 0.06091880 0.06145737 To further compare the proposed techniques with other known
h(7) = h(15) 0.03489913 0.01041345 0.00390754 non-convex global OAs, following example has been considered
h(8) = h(14) 0.11170801 −0.09949873 −0.10000000 for experimentation as in [8–11].
h(9) = h(13) −0.02930880 −0.00560992 0.00291659  
Example 2: A filter with PBR = 0.1, SBA = −40 dB, length 28 with
h(10) = h(12) −0.31026400 0.31097220 0.31869221
0.128 and 0.2048 pass band and stop band frequencies has been
h(11) −0.45779553 0.50001853 0.50482147 considered as in [11]. For selecting the optimisation control

IET Signal Process. 5

© The Institution of Engineering and Technology 2016
parameters, a number of pilot runs with different settings were 5.1 Computational complexity evaluation
executed, based on which the colony size and error goal are fixed
For evaluating the computational cost associated with the proposed
at 50 and 10−3, respectively, while scout bee limit is taken as 25.
algorithms, a comparison has been carried out with other heuristic
The effectiveness of the proposed algorithms has been evaluated
and deterministic non-convex optimisation techniques, in terms of
based on spectral characteristics of filters like PBR, SBR and
execution time required to achieve a defined convergence criterion
computation time (CT) to achieve the desired error goal. The
on a common platform. The objective function discussed in (18)
results obtained has been depicted in Table 4 and compared with
has been considered to optimise a low pass filter with 0.30 and
Remez [8], mixed integer linear programming (MILP) [9],
0.50 pass band and stop band frequencies, respectively. The
polynomial time algorithm (PTA) [10], filled function method
execution time required for different non-convex heuristic and
(FFM) [11], modified FFM [7] and pattern search algorithm.
stochastic algorithms is outlined in Table 5. The algorithms are
It can be observed from Table 4 that the spectral characteristics
obtained using proposed algorithms are competing to other global executed using MATLAB 8.1, on a Intel® Core i5 CPU with 2.67 
non-convex algorithms. Proposed ABC MOD-II outperforms all GHz, 4 GB RAM and 64 bit windows 7 (Build 7600).
other algorithms in terms of SBA, whereas ABC MOD-I The lesser computational cost of non-heuristic techniques
outperforms all other algorithms in terms of PBR. (Remez, MILP, FFM) as compared with the proposed and other
EAs (PSO, SOA, CSO, ABC, ABC MOD-I, ABC MOD-II) is
clearly reflected from Table 5. This is attributed to the absence of
population based search in deterministic techniques. Among the
Table 2 Comparison of performance parameters for evolutionary techniques one of the proposed variants, i.e. ABC
different algorithms MOD-I is found to provide faster convergence relative to other
filter design methods. However it may be noted for the present
Properties Algorithm application, where filter design task is carried out offline,
ABC ABC MOD-I ABC MOD-II minimisation of ripple content is more significant than
max PBR (normalised) computational effort. For adaptive filtering applications faster
max SBR (normalised) 0.04 0.023 0.017 convergence is an important consideration.
max SBA (dB) 26.81 32.83 34.96
TW (normalised) 0.1505 0.1404 0.1108 5.2 Hardware results

Table 3 Comparison of LPF design using proposed algorithm with other state of the art EAs
Model Parameters
Order Max SBA, dB Max PBR (normalised) Max SBR (normalised) TW (normalised)
PSO [15] 30 39a 0.1 0.01 0.12a
DE [18] 20 NRb 0.15a 0.039a 0.18a
SOA [19] 20 32.30 0.138 0.0243 0.0896
Hybrid DE and PSO [16] 20 24 0.257 0.259 0.07a
CSO [21] 20 33.99 0.164 0.0198 0.0946
ABC 20 26.81 0.08 0.04 0.1504
ABC-MOD-I 20 32.83 0.09 0.023 0.1404
ABC MOD-II 20 34.96 0.12 0.017 0.1108
Abbreviations: aXYZ, approximate value, bNR, not reported.

Table 4 Comparison of LPF design using ABC, ABC MOD- For experimental validation of the proposed modified versions of
I, ABC MOD-II algorithm with other reported non-convex ABC algorithm, designed filters are implemented using
global OAs in terms of pass band ripple and stop band xc7vx330t-3ffg1157 FPGA. Implementation in FPGA allows
attenuation analysing the effects of quantisation error, parasitic effects and
Technique PBR, norm SBA, dB inherent delays on the filter characteristics, which were not
Remez exchange [8] 0.17 −30.3 considered in simulations. The experimental setup used is shown in
Fig. 5. Xilinx 14.7 IDE is used for synthesis, analysis and
MILP [9] 0.16 −33.8
implementation purpose.
PTA [10] 0.17 −30.7 Filter coefficients are represented using a full precision, fixed
0.16 −34.4 point arithmetic with integer length of 16 bit and fractions of 16
0.13 −31.3 bit. The low pass characteristics of the designed filters are verified
0.10 −33.5 by generating a set of sinusoidal signals with fixed amplitude and
0.13 −34.8 variable frequency and applying it to the FPGA board. The time
0.11 −35.4 domain signal is observed in the oscilloscope (Fig. 5), while the
frequency response of designed FIR filters is observed using Xilinx
FFM [11] 0.17 −31.2
systems generator JTAG interface with Simulink. The
0.16 −34.4 corresponding frequency responses obtained with ABC, ABC-
0.13 −31.6 MOD-I and ABC MOD-II is reported in Fig. 6.
0.10 −34.1 As compared with the simulated frequency response, an
0.13 −36.9 increase in the ripple content and TW is observed in the hardware
0.11 −35.4 results, for all the three cases.
MFFM [7] 0.11 −39.64
The architecture used for FPGA implementation is shown in
Figs. 1 and 2. The device resources utilised in the FPGA during
pattern search 0.14 −30.32
implementation of proposed algorithms are outlined and compared
proposed ABC 0.24 −33.65 with the traditional FPGA implementation techniques. For
proposed ABC MOD-I 0.10 −37.43 comparison a set of benchmark LPF specifications are described in
proposed ABC MOD-II 0.063 −39.9 [25] has been considered. The comparison has been carried out in

6 IET Signal Process.

© The Institution of Engineering and Technology 2016
Fig. 5  Experimental set-up for the hardware implementation of FIR filters using Virtex-7(device-xc7vx330t-3ffg1157)

Table 5 CT (seconds) required to achieve desired stopping criterion with 10% tolerance limit
Stopping criterion 3 2 1 0.5 0.25
PSO min 0.0900 0.0991 1.0371 9.0123 26.3420
max 0.1227 0.1343 3.1459 3.6556 26.9249
mean 0.1003 0.1121 3.1154 5.4990 26.6724
SD 0.0119 0.0146 0.1171 0.2601 0.2164
SOA min 0.8664 1.7811 2.2966 14.1301 15.5738
max 2.9807 2.3867 4.2522 18.7462 22.6951
mean 1.5106 1.9429 3.9725 16.2180 28.7501
SD 0.7515 0.2379 0.3437 2.9525 3.1619
CSO min 0.9474 1.0223 18.5379 40.5500 69.1223
max 1.8963 5.4477 49.3771 59.6938 71.2235
mean 0.9971 3.4863 37.2842 52.4766 69.9909
SD 0.2592 0.8108 10.0231 7.6038 0.7157
Remez min 0.1212 0.2465 0.4351 0.8654 1.0101
max 0.3981 0.4581 0.8795 1.4323 1.4021
mean 0.2739 0.4365 0.7346 1.0634 1.2798
SD 0.0947 0.1527 0.1541 0.3891 0.1032
MILP min 0.2132 0.6040 0.8756 1.9345 3.0342
max 0.6431 0.9453 1.2865 3.2399 4.6534
mean 0.4325 0.8395 1.0825 2.3792 4.2871
SD 0.1523 0.1377 0.1557 0.4807 1.3943
FFM min 0.1002 0.1001 0.9991 2.2201 6.2340
max 0.4965 0.8901 2.2309 4.3233 8.2130
mean 0.2750 0.6417 1.4201 2.8460 7.7942
SD 0.1594 0.2948 0.4571 0.8378 1.2814
pattern search min 0.0113 1.0176 5.0217 10.1438 20.3210
max 0.0207 3.0158 8.0171 17.4387 34.5423
mean 0.0128 1.6152 6.6185 14.7125 27.2062
SD 0.0412 1.0174 1.0180 2.5248 4.8344
ABC min 0.3071 5.6825 6.0441 12.4025 16.4300
max 4.6520 6.6025 6.6025 24.8261 34.4048
mean 2.5243 6.0502 6.0502 17.4168 24.6868
SD 1.6277 0.3436 0.3436 4.3206 5.7960
ABC MOD-I min 0.5829 1.0710 4.7513 9.3682 14.4974
max 0.8474 1.6657 6.2742 11.8603 16.6992
mean 0.6435 1.2612 4.8095 10.2696 15.5165
SD 0.1211 0.2157 0.9361 0.9135 0.7699
ABC MOD-II min 0.5829 1.1174 5.8271 9.5277 15.1466
max 1.0342 2.2954 11.7513 19.9230 23.1423
mean 0.7609 1.8612 7.8095 13.4428 18.9991
SD 0.1716 0.4269 2.4573 3.7020 3.2625

IET Signal Process. 7

© The Institution of Engineering and Technology 2016
Fig. 6  Normalised frequency responses of LPFs after hardware using Virtex-7 FPGA using
(a) ABC, (b) ABC MOD-I and (c) ABC MOD-II algorithms

terms of EWL, MAL, NA, NFA, power and area requirement proposed techniques for real time filtering applications has been
(Table 6). validated by implementing the corresponding filters using FPGA.
It can be concluded from Table 6 that the proposed architecture A reduction in the hardware complexity of FPGA implementation
using shift and add network (Figs. 1 and 2) require less hardware has been observed as compared with the reported techniques for
complexity as well as less power consumption as compared with FIR filter implementation. The comparison of the hardware results
the conventional implementation approaches. Table 7 reports the with simulation reveals that real time implementation leads to
comparison of hardware utilisation of the proposed work with other increment in ripple in both pass band and stop band. Future work in
reported works in the light of the results reported in [33]. this domain would be concentrated on filter design by
Finally Xilinx power estimator has been used for power incorporating the parasitic effects and real time operation
analysis of the design with increase in frequency. Dynamic power parameters of FPGA in the objective function.
consumption using proposed architecture is shown in Fig. 7. A
uniform increase in the dynamic power is observed with increase in 7 Acknowledgment
the operating frequency.
The authors thank Prof R.M. Patrikar, Professor VNIT Nagpur,
India for providing the necessary experimental support.
6 Conclusion
In this paper, two modified variants (ABC MOD-I and ABC MOD-
II) of the conventional ABC algorithm have been proposed for
designing FIR filters. The filter design task of attaining a set of pre-
defined frequency domain specifications has been formulated as an
optimisation problem, and solved using the proposed techniques.
The results obtained have been compared with reported EAs and
deterministic non-convex based optimisation methods. ABC MOD-
II is found to outperform all the other techniques in terms of stop
band attenuation, closeness to the desired SBR and TW. Similarly
ABC MOD-I achieves the least deviation from the desired pass
band ripple. As far as computational time is concerned, the
proposed technique though faster than other heuristic techniques, is
slower than deterministic methods. The applicability of the

8 IET Signal Process.

© The Institution of Engineering and Technology 2016
Table 6 Comparison between the proposed and traditional design algorithms for filter design as sum of powers of two
Filters Method EWL MAL NA NFA Power, mW Area, sq. µm
G1 MILP [26] 6 1.58 17 222 1.65 31,903
ESS [27] 6 1.58 17 222 1.65 31,903
SFT [25] 6 1.9 17 209 1.31 30,794
proposed 6 1.7 17 204 0.06 20,145
Y1 MILP [26] 10 2.75 29 222 1.65 69,851
ESS [27] 10 2.17 29 222 1.65 66,783
SFT [25] 10 2.14 29 209 1.31 65,627
proposed 13 2.12 29 205 1.01 65,432
Y2 MILP [26] 11 2.73 37 721 8.01 85,641
ESS [27] 11 2.73 37 721 8.01 85,641
SFT [25] 11 2.73 37 721 8.01 85,641
proposed 12 2.17 37 721 8.01 84,323
Y3 MILP [26] 11 2.14 59 972 21.39 138,651
ESS [27] 11 2.59 58 919 16.57 132,287
SFT [25] 11 2.14 60 983 22.57 139,832
proposed 10 2.12 61 920 22.15 121,761
L2 MILP [26] 10 2.31 73 1151 24.51 165,696
ESS [27] 11 N.A. 73 N.A. 21.97 N.A.
SFT [25] 10 2.20 72 1127 24.51 164,586
proposed 10 2.11 73 1120 22.15 163,345
S2 MILP [26] 10 2.56 59 1255 27.30 173,732
ESS [27] 10 2.51 58 1268 27.11 174,849
SFT [25] 13 2.41 57 1225 24.05 171,143
proposed 10 2.14 57 1210 25.87 175,477

Table 7 Comparison of hardware utilisation and performance of the proposed method with other reported methods
Method Taps Bits Device Slices Flip-flops Four input Max_delay, ns F_max, MHz
LUTs
serial DA FIR [28] 16 16 Spartan 3E 180 171 263 19.2385 –
parallel DA FIR [28] 16 16 Spartan 3E 243 192 407 15.725 –
1-BAAT(bit-at-a-time) pipelined [29] 8 64 Spartan 3E 300 500 290 – 120
2-BAAT pipelined [29] 8 64 Spartan 3E 500 1000 460 – 100
Serial multiplier and serial adder [30] 8 8 Xc4vf100 103 97 162 – 225
Shift/add_form1 [30] 8 8 Xc4vf100 101 48 119 – 79.171
MBF(multiplexer based reconfigurable FIR filter) 6 – Virtex 5349 – 9669 – –
[31]
DPR (dynamic partial reconfigurable FIR filter) 6 – Virtex 4733 – 8427 – –
[31]
add shift method [32] 10 12 Virtex-II 474 916 406 – –
PDA method [32] 10 12 Virtex-II 781 1480 1103 – –
modified retiming serial multiplier [33] 8 8 Xc4vf100 287 196 379 2.713 302.253
proposed method 11 16 Xc7vx330t-3ffg1157 190 108 278 4.04 347.551

Fig. 7  Variation of dynamic power consumption with operating frequency
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