Analysis of AC Gain of Multistage Common Source Amplifier Using
CNTFET
Akshay Patharkar1 Souris Sahu1 and Dr.V.Ramakrishnan2
1
Student, VLSI Design, SENSE Department, Vellore Institute of Technology, Vellore.
2
Associate Professor, MNE Department, Vellore Institute of Technology, Vellore.
Abstract—carbon nanotube field effect transistor
(CNTFET) is cutting-edge technology where the demand
for transistor scaling is increasing day by day
industrially. Beyond 14 nm scaling of MOSFET is
introducing several limitations like short channel effect,
drain induced barrier lowering, less Ion/off ratio etc.
Instead of modifying exiting MOSFET technologies,
recent new technologies are considered as future and
as per prediction of the Global Market for carbon
nanotubes report, CNTFET is going to make a severe
impact in the semiconductor market. In this paper, first
AC analysis is done by varying number of channels of
CNTFET of Common Source Amplifier and results are
shown in the form of graph. Then AC analysis is
performed by varying diameter of CNTFET and from the
result of this analysis diameter for which maximum
gain was obtain is chosen. Similarly AC analysis is
formed for varying oxide thickness and dielectric
material and from the results of these analyses the
best case gain is obtained for single stage, two stage,
and three stage common source amplifier using CNTFET
on 11 nm technology.
Keywords- Carbon Nanotubes Field Effect
Transistors (CNTFETs), MOSFET, Common source
amplifiers.
I. INTRODUCTION
The continuous advancement of the
semiconductor industry, as well as changing market
requirements, enforces technology for further
reduction of device size with better performance.
As per Moore's law number of transistors on chip,
doubles every 18 months [2]. But beyond 14 nm to
follow this trend is getting difficult because of
limitations such as short channel effect (SCE),
drain induced barrier lowering (DIBL), velocity
saturation and hot carrier degradation. These
effects will degrade performance of circuit.
Therefore technology scaling beyond 10 nm has
reached its limits. To follow international
Technology roadmap for semiconductors (ITRS),
Device scaling requires new technical approach.
Nano-scale devices are promising candidates to
replace complementary metal oxide semiconductor
technology for future Nano applications. [3-5]
To meet the requirement of time, several new
technologies and devices are being explored.
Carbon Nanotube field effect transistor is new
promising semiconductor device to replace
limitations of silicon based MOSFET technology.
Carbon nanotubes (CNTs) have been used in many
1 H. This project has been carried out with Faculty of SENSE, Vellore Institute of Technology, Vellore, Tamilnadu, India
devices like medical instruments, nano-electronics,
and Nano-electromechanical system. Carbon
nanotubes are a new modification of carbon
discovered in 1991 by Ijiima. [6] According to the
Global Market for carbon nanotube’s report, Single
walled Nanotubes (SWNTs) will have a larger
impact in electronics application by 2020. To
understand carbon nanotubes structure they can be
visualized as graphite. If a single layer of graphite
can be rolled up, this can have a diameter from 1 to
100 nm and lengths up to millimeters. Carbon-
carbon bond has an extraordinary strength. An
atomic diameter of the carbon atom is very small
and free k-electrons are also available in the graphit
configuration. Because of this, nanotubes has
special electronic and mechanical characteristics,
such as Table-1[7]
Table 1: Some important electrical and
mechanical characteristics of carbon nanotubes
Electrical Conductivity Metallic or
semiconducting
Electrical Transport Ballistic, no scattering
Energy gap (semicond.) Eg [eV]c1/d [nm]
Maximum current density f1010 A/cm2
Maximum strain 0.11% at 1 V
Thermal conductivity 6000 W/Km
Diameter 1–100 nm
Length Up to millimeters
Gravimetric surface >1500 m2/g
E-modulus 1000 GPa
In this paper gain of single, double and triple
stage common source configuration transistor has
been analyzed with CNTFET.
II. CIRCUIT AND PROCEDURE
A. CARBON NANOTUBE FIELD EFFECT TRANSISTOR
(CNTFET):
The structure of carbon nanotube field effect
transistor (CNFET) is typically similar to that of
MOSFET. In case of MOSFET, silicon is a base
material/substrate and electron transportation takes
place through it by inversion, in CNTFET a single
carbon nano-tube (CNT) or multiple numbers of
CNTs are used as the channel material. The
CNFET is beneficial over the conventional
MOSFET in term of better control over the
channel, reduction in carrier tunneling, short
channel effects, reduced leakage currents, higher
current density, and enhanced carrier velocity [11].
The schematic of CNFET is shown in Fig. 1.
Vin Vin Vin
The design parameters of carbon nanotube-FET
are:
 N: number of CNTs,
 Pitch (S): inter-nanotube space,
 DCNT: diameter of carbon nanotube,
 gate: gate length
 Wgate: width of the gate.
 n and m: indexes of a chiral vector of
Graphene lattice and a = 2.49 °A (lattice
constant).
 g=band gap.
Figure 1: schematic diagram of CNTFET
a √ n2+ m 2+nm
D CNT = ……….(1)
π single stage amplifier respectively. From
W =( N−1 )∗S + DCNT ….(2)
Vth = aV π / (qVCNT√ 3) …..(3)
∑g =0.84 eV / DCNT ……(4)
From equation (1) diameter of CNTFET depend
on chirality and lattice constant. From equation (2)
required gate width can be measured, from
equation (3) and (4), by controlling diameter of
CNT, threshold voltage and band gap can be
controlled.
B. TARGET CIRCUIT:
(a) (b) (c) VDD
VDD VDD VDD VDD VDD
Vout
Vout
Vout
Figure 2: (a)Single stage,(b) Two stage,(c) Three stage
common source amplifier with CNTFET
All the circuits are simulated by, first varying
number of carbon nano-tubes, after the number is
decided, diameter of carbon nano-tube is varied,
then thickness of oxide layer and dielectric
material between gate and channel and gain has
been plotted for each parameter and each
configuration. From each set of simulation
parameter, values are chosen such that it gives
maximum AC gain.
III. SIMULATION AND CALCULATION
A gain of CNTFET depends on diameter (d),
number of channels, material dielectric value (K ox),
and the thickness of oxide layer (tox). Each of these
parameters are varied while keeping all other
parameters constant.
A. Varying number of a channel:
To understand the effect of number of channels
in CNTFET have been varied keeping all other
parameters (tox, and d) constant. First DC analysis is
performed to find out operating point of the circuit
such that maximum gain can be obtained from each
configuration. The gain is increasing continuously
for single stage, two stage, and three stage cs
amplifier. If the degeneration resistance is RD and
transconductance of transistor is gm ,the gain for
single stage MOSFET is Av = gmRD and as we are
cascading to obtain two stage and three stage
amplifier, gain in each case comes out to be
approximately two times and three times that of
simulation results, in CNTFET 11 nm technology
node, it is observed that it follows the same trend
and the results of this simulation are shown in the
form of graph in figure 3. As the optimum swing
and gain have been observed for 40 number of
channels, number of carbon nano-tubes for further
simulations is selected as 40.
Table 2: Constant Parameter table:
No parameters values
.
1. Resistance(RD) 6K ohm
2. tox 3 nm
3. 24
Kox
4. Diameter (d) 1.25 nm
 5. channel width (w) 1×10-6
meter

Figure 4: gain versus diameter

C. Varying oxide thickness (tox):

Figure 3: gain versus number of channel

B. Varying diameter: Now as per previous analysis, number of channels

and diameter of CNTs are taken as 40 and 1.25 nm
Keeping number of channels, resistance (RD), respectively. Now same analysis is carried out by
tox, and Kox constant only varying diameter gain varying oxide thickness of CNTFET from 1 nm to
has been plotted in figure 4. From table diameter 3 nm and gain versus tox graph is plotted for each
values were applied for CNTFET model. From configuration. From this analysis we can observe
figure 4 it is observed that as diameter increases that as the thickness reduces there is slight
gain also increases. The best gain is observed for a improvement in gain of the system. Therefore for
diameter of 1.25 nm. So, chiral vector (16, 0) is further analysis value of oxide thickness is taken as
selected for further analysis. Calculated diameter 1 nm.
using equation (1) are given in table 3 and constant Table 5: Constant Parameter table:
parameters are given in table 4. No. parameters values
1. Resistance(RD) 6k ohm
Table 3: Table for diameters: 2. diameter 1.25 nm
No. Chiral Diameter (nm) 3. kox 24
Vector 4. No. of channel 40
(n,0) 5. channel width (w) 1×10-6 meter
1 (10,0) 0.79
2 (14,0) 1.10
3 (16,0) 1.25
4 (20,0) 1.59
5 (22,0) 1.72

Table 4: Constant Parameter table:

No. parameters values

1. Resistance(RD) 6k ohm
2. Diameter(d) 1.25 nm
3. kox 24
4. No. of channel 40
5. channel width 1×10-6 meter
(w)

Figure 5: gain versus tox

 D. Varying Di-electric value (Kox):
Now for performing AC analysis for all three IV. Analysis
configurations, dielectric material is varied so that
to find out effect of dielectric constant on the
performance of CNTFET amplifier i.e. Kox value As number of CNT increases resistance offered
is varied while keeping diameter as 1.25 nm, to flow of current reduces, and because of that
number of channels as 40 and oxide thickness of 1 gain of the circuit increases. For CNTFER minimum
nm. pitch of 4 nm has to be maintained between
adjacent CNTs otherwise due to fringing effect,
Table 6: Different dielectric value for different behavior of CNTFET will get affected. Therefore as
materials: number of CNT increases width of the device also
increases. So considering this, number of carbon
No Material Die-electric nano-tubes is selected such that it gives optimum
. Value gain while size of the device is not getting too big.
1 Silicon
Figure 8:dioxide
gain of(SiO )
(a) 2single stageK=3.9
(b)two stage So considering above points 40 number of carbon
3 (c)Hafnium
three stage common
Silicate (HfSiO source amplifier nano-tubes are selected in this paper.
4) K=11
4 Hafnium dioxide (HfO2) K=16
While choosing diameter we should choose such
5 Zirconium dioxide (ZrO2) K=24 that which will give high gain as well as less power
Table 7: Constant Parameter table: so we choose an optimum value of diameter 1.25
No. nm. [13]
parameters
values Oxide thickness of CNTFET is inversely
1. proportional to capacitance, so as oxide thickness
Resistance(RD) (tox) decreases Capacitance of oxide layer increases
6k ohm and Capacitance (Cox) of an oxide layer is inversely
2. proportional to threshold voltage, therefore with
Diameter(d) increase in Capacitance value threshold voltage is
1.25 nm decreased. When a threshold is decreased, for
3. same gate voltage level number of electrons in
tox channel increases that in turns increases the
1 current flow. As current increases, the gain of the
4. amplifier also increases for the same level of gate
No. of channel voltage.
40
5.
With decreasing oxide layer thickness, leakage
channel width (w)
current problem increases. To compensate for this
1×10-6 meter
problem we are looking at different dielectric
materials such as Silicon dioxide (Kox=3.9), Hafnium
(IV) silicate (Kox=11), Hafnium dioxide (Kox=16),
Zirconium dioxide (Kox=24). We also observed that
with increasing value of dielectric constant, a gain
of the amplifier also increases.

Figure 7: gain versus Kox
V. CONCLUSIONS
The simulation for AC gain of single stage, two
stage and three stage common source amplifier
with a various number of channels, different
diameters, oxide thickness, and dielectric values
have been demonstrated successfully. From this
simulation, it is observed that for a number of
channels =40, diameter =1.25nm, tox=1 nm, and
kox= 24 maximum gain is achieved. In the
frequency domain, it corresponds to 19.102 dB for
single stage, 38.26 dB for two stage and 56.34 dB
for three stage.
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