Professional Documents
Culture Documents
and Challenges in N7
Product Version Innovus 17.1
November, 2017
Copyright Statement
© 2017 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and the Cadence logo are
registered trademarks of Cadence Design Systems, Inc. All others are the property of their respective
holders.
Contents
Purpose ....................................................................................................................... 4
Overview ...................................................................................................................... 4
Different ways of creating power mesh ........................................................................ 5
Understanding the stapling option in addStripe ........................................................... 7
Implementation of power mesh from layer M0 to M13 ............................................... 16
Summary ................................................................................................................... 32
Support ...................................................................................................................... 32
Feedback ................................................................................................................... 32
Purpose
Power mesh creation is complex in N7 because of non-uniform structure in most of the
layers. This application note explains the challenges in using addStripe with stapling
while creating this complex structure.
Overview
In 7nm, Power grid is not as simple as it was in other higher nodes such as 28nm,40nm
etc. Power mesh is defined in all layers, and power stripes are not continuous in all
layers from M1-M9. Stripes are continuous in M0, M10, M11, M12 and M13. There are
staples in each layer.
This application note will describe the power mesh structure for one of the application
(power mesh structure may vary for different applications and different companies) and
different methods to create power mesh. The simpler way to create such a power mesh
is using db_shape and dbCreateWire. However, there are runtime challenges with
these commands. The other way is to use addStripe but since power mesh stripes
are not continuous, there is stapling option to create such a power mesh. The pattern of
stripes is not uniform. For example, M4 is horizontal, and pattern of M4 varies in
horizontal as well as vertical directions. M2 and M3 have the non-uniform pattern in one
direction while M4-M9 have the non-uniform pattern in both directions. As per TSMC,
each layer has some pitch and the pattern will repeat after that pitch. It is important to
know about the pitch to understand the pattern of each layer. There are no stack vias in
this power mesh but structure of mesh is like pillar from M1-M9. M2-M3 are long pillars
while M1, M4-M9 are like pillars. All layers are ‘on track’ while M9 and M12 are ‘off
track’. Creating power mesh with stapling is very fast but it requires good understanding
stapling option in addStripe. There is another concept of reference layer, which is
very powerful with the stapling option.
Note: On a 550x500 design, power mesh created by these commands takes almost
four hours.
Note: On the same 550x500 design, power mesh created by these commands takes 40
mins.
III. addStripe: The third way to create power mesh is using addStripe, which is
the normal way of power mesh creation but there are various challenges with
addStripe.
• Power stripes are not continuous; they are in pieces like pillar. To
create such a structure, there is an option named stapling which is very
powerful is usage.
• To analyze and understand the pattern of all layers of the power mesh.
addStripe -stapling {2.05(length Fig 1) 5.68 (distance from the bottom of the die
till the center of the first stripe Fig 2 ) 0.08:30 (spacing between the center of the
first stripe till the center of the second stripe in vertical direction Fig 3)} -layer M3
-width 0.024 -direction vertical -set_to_set_distance 11.264 (distance after which
the pattern is repeating) -nets {VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD } -
spacing {0.108 0.856 0.108 0.856 0.108 0.856 0.108 0.9 0.108 0.856 0.108
0.856 0.108 0.9 0.108 0.856 0.108 0.856 0.108 0.856 0.108 0.9 } -start_offset
0.472 (distance from the core boundary till the edge of the stripe)
Figure 1
ii. The second parameter with the stapling option is the distance from the bottom of
the die till the center of the first stripe.
Figure 2
Die boundary
iii. Third parameter with the stapling option is spacing between the center of the first
stripe till the center of the second stripe:
addStripe also has another parameter called offset. This is the value from the core of
the block till the edge of the stripe.
Die boundary
Figure 4
Core boundary
Figure 5
addStripe -stapling {2.81(length of stripe Fig 6) 6.656 (distance from the die
boundary till the center of the stripe in horizontal direction Fig 7) 0.128:24
(spacing between the center of the first stripe till the center of the second stripe in
horizontal direction Fig 8)} -layer M2 -width 0.02 -direction horizontal -
set_to_set_distance 0.6 -nets VDD -start_offset 0.57 (distance from the core
boundary till the edge of the stripe in vertical direction)
Figure 6
ii. Distance from the die boundary till the center of the stripe in horizontal direction:
Figure 7
Die Boundary
Center of stripe: Distance from the die boundary till the center of the stripe is 6.656 micron.
Spacing between the center of the first stripe till the center of the second stripe in
horizontal direction:
Figure 8
start_offset will be the distance from the core boundary till the edge of the stripe in
vertical direction.
Core boundary
Figure 9
The example defines 0.6 as the stapling length and M4 as the reference layer. This is
very useful when the pattern is not uniform in both horizontal and vertical directions. In
the example, horizontal spacing is defined in the same command. Now, for vertical,
there is no need to use separate equations for M5. For M4, there will be multiple
equations for the vertical pattern. For all other layers, we can specify reference layers
for the vertical pattern. This is a very powerful feature and saves a lot of time in power
mesh creation.
• If there are multiple nets of the same type defined in each line with different
spacing, use side_to_side with stapling_net_style in
setAddStripeMode. For example, in the above case, there are multiple VSS
nets in one addStripe with different spacing defined. So, side_to_side is
applicable.
• If there is single net of either VDD/VSS or a pair of {VDD VSS} stripes in each
line, use end_to_end which is the default of stapling_net_style. Spacing
is invalid in this case.
II. Layer M1: M1 stripe is not DRC clean wrt min area. As per TSMC Nanoroute
will clean those DRC. But addStripe will not create stripes if there are min
area DRCs (even if ignore_drc is true). In Figure 11, the length of the M1
stripe as per TSMC is 0.1 with a width of 0.04. So, the area becomes
0.1x0.04=0.004, while the minimum area required for M1 is 0.048. Therefore,
the minimum length should be 0.12. Now, as WA, we are creating the stripe
with length 0.12 which is DRC clean and then changing its length to 0.1 as
per TSMC pattern. NanoRoute while doing routing will add the patch wire to
fix min area violations.
The reason of leaving this at the PG stage is that NR can add the patch either
above or below M1 depending upon the routing resources.
Figure 11
set cmd "addStripe -stapling {0.12 $y 0.1:3} -layer M1 -width 0.04 - direction
vertical -set_to_set_distance 0.512 -nets {VSS VDD} -start_offset 0.748"
eval $cmd
deselectAll
editSelect -type Special -layers M1
setEdit -drc_use_fgc 0 -drc_on 0 -create_vias_deep_through 0
Figure 12
III. Layer M2: M2 also has regular pattern in staples so it is easy to create this
layer. However, we can’t define both VDD and VSS in one addStripe
command because the offset of VDD and VSS is different from the core.
setAddStripeMode -stacked_via_bottom_layer M1 -stacked_via_top_layer M2
###VSS
set y_vss [expr $core_llx + 2.048]
set cmd "addStripe -stapling {2.81 $y_vss 0.128:24} -layer M2 -width 0.02 -
direction horizontal -set_to_set_distance 0.6 -nets VSS -start_offset 0.29"
eval $cmd
###VDD
set y_vdd [expr $core_llx + 1.536]
set cmd "addStripe -stapling {2.81 $y_vdd 0.128:24} -layer M2 -width 0.02 -
direction horizontal -set_to_set_distance 0.6 -nets VDD -start_offset 0.57"
eval $cmd
Figure 13
IV. Layer M3: In layer M3 also, there is a pattern only in horizontal direction but
the pattern is repeating after many stripes. So, it is important to know the
pitch. As per TSMC, the pitch for M3 is 1.024.
##VDD
set y_vdd [expr $core_lly + 0.88]
set cmd "addStripe -stapling {2.05 $y_vdd 0.08:30} -layer M3 -width 0.024 -
direction vertical -set_to_set_distance 11.264 -nets {VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD} -spacing {0.108 0.856 0.108 0.856 0.108 0.856
0.108 0.9 0.108 0.856 0.108 0.856 0.108 0.9 0.108 0.856 0.108 0.856 0.108
0.856 0.108 0.9} -start_offset 0.472"
eval $cmd
##VSS
set y_vss [expr $core_lly + 1.2]
set cmd "addStripe -stapling {2.05 $y_vss 0.08:30} -layer M3 -width 0.024 -
direction vertical -set_to_set_distance 11.264 -nets {VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS} -spacing {0.108 0.9 0.108 0.856 0.108 0.856 0.108 0.856
0.108 0.9 0.108 0.856 0.108 0.856 0.108 0.856 0.108 0.9 0.108 0.856 0.108
0.856} -start_offset 0.956"
eval $cmd
It is important to note that the pattern may be different in VDD and VSS as in
the above case.
The average pitch between the two stripes in M3 should be 1.024. In the
above case, there are 8 stripes with a pitch of 1.012 and 3 stripes with a pitch
of 1.056. So, the average pitch is (8*1.012=8.096) + (3*1.056= 3.168) =
11.264/11 = 1.024. There are 22 spacing defined above because there is a
set of 2 stripes created very close to each other.
Figure 14
Pattern is repeating after 11.264 micron.
Figure 15
V. Layer M4: From this layer, the complexity has increased even more. There
are patterns in both horizontal as well as vertical directions. The vertical
pattern can be specified in one command in addStripe, but there is no way
to specify the horizontal pattern in the horizontal stripe and vice versa while
creating vertical stripe. Also, as per the TSMC script, the bottom two stripes
have different spacing. So, for the bottom stripes, there will be different
equations than the rest of the power mesh for M4. Again, vertical pattern can
be verified by the pitch but for horizontal pattern, we need to check spacing
manually.
###VDD
setAddStripeMode -stacked_via_bottom_layer M2 -stacked_via_top_layer M3
-stapling_nets_style side_to_side
set y_vdd [expr $core_llx + 0.2895 + 0.2385]
set cmd "addStripe -stapling {0.579 $y_vdd 11.264:1} -layer M4 -width 0.038 -
direction horizontal -set_to_set_distance 22.8 -nets {VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD} -spacing {1.178 1.178 1.178 1.102 1.178 1.178 1.178 1.178 1.102
1.178 1.178 1.178 1.178 1.102 1.178 1.178 1.178 1.178 1.102} -start_offset
3.837"
eval $cmd
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Power Mesh Creation: Implementation and Challenges in N7
The average pitch between the two stripes in M4 should be 1.2. In the above
case, there are 15 stripes with a pitch of 1.216 and 4 stripes with a pitch of
1.056. So, the average pitch is (15*1.216=18.24) + (4*1.14= 4.56) = 22.8/19 =
1.2.
There are stripes till top in vertical direction but in horizontal direction, the
pattern is repeating after certain distance (Figure 16). So, for horizontal
direction, need to write the equations again. Pattern in horizontal direction is
repeating after 13 stripes. Also, the bottom two stripes are missing because
there is a different pattern for those stripes.
Figure 16
Stripes in vertical direction are complete. Stripes are missing in horizontal direction.
For horizontal spacing, y_vdd will change until the pattern repeats. In this
case, we need to write 12 such equations.
Figure 17
Figure 18
In this, the bottom two stripes are still missing. So, there is need to write 12
separate equations for the bottom two stripes. But because there is need of
only two stripes, we need to define number_of _steps as 1.
Similarly, we have write equations for VSS. Also, the pattern in VSS could be
different from VDD.
VI. Layer from M5 to M9: There are similar structures in layers from M5 till M9.
So, earlier, we have to define so many equations for all those layers. But the
“reference layer” feature has made life easier. With this we can just define
the previous layer as the reference layer for the current layer and get rid of
those complex equations for rest of the layers.
##VDD
addStripe -stapling {0.6 M4} -layer M5 -width 0.038 -direction vertical -
set_to_set_distance 19.456 -nets {VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD} -spacing
{0.95 1.026 0.95 1.026 0.95 1.026 0.95 1.026 0.95 0.95 1.026 0.95 1.026
0.95 1.026 0.95 1.026 0.95 1.026} -start_offset 0.513
##VSS
addStripe -stapling {0.6 M4} -layer M5 -width 0.038 -direction vertical -
set_to_set_distance 19.456 -nets {VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS} -spacing
{1.026 0.95 1.026 0.95 1.026 0.95 1.026 0.95 1.026 0.95 1.026 0.95 1.026
0.95 1.026 0.95 1.026 0.95 0.95} -start_offset 0.969
-stapling {0.6 M4} : Defining M4 as the reference layer will create the same
structure for M5 as well. This is very fast and saves a lot of time.
Figure 19
We can define the similar equation till M9 where there is a similar kind of
pattern using the reference layer. For vertical layer, we can use the reference
layer of stapling for the vertical pattern but for the horizontal pattern, still need
to find spacing using the concept of pitch and vice versa for horizontal layer.
Also, horizontal pattern will be different for both VDD and VSS.
M6 PG:
##VDD
addStripe -stapling {0.6 M5} -layer M6 -width 0.038 -direction horizontal -
set_to_set_distance 22.8 -nets {VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD} -spacing
{1.102 1.178 1.178 1.178 1.102 1.178 1.178 1.178 1.178 1.102 1.178 1.178
1.178 1.178 1.102 1.178 1.178 1.178 1.178} -start_offset 2.697
##VSS
addStripe -stapling {0.6 M5} -layer M6 -width 0.038 -direction horizontal -
set_to_set_distance 22.8 -nets {VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS } -spacing {1.102
1.178 1.178 1.178 1.178 1.102 1.178 1.178 1.178 1.178 1.102 1.178 1.178
1.178 1.178 1.102 1.178 1.178 1.178 } -start_offset 1.785
# M7 PG:
##VSS
addStripe -stapling {0.6 M6} -layer M7 -width 0.038 -direction vertical -
set_to_set_distance 19.456 -nets {VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS} -spacing
{1.026 0.95 1.026 0.95 1.026 0.95 1.026 0.95 1.026 0.95 1.026 0.95 1.026
0.95 1.026 0.95 1.026 0.95 0.95} -start_offset 0.969
###VDD
addStripe -stapling {0.6 M6} -layer M7 -width 0.038 -direction vertical -
set_to_set_distance 19.456 -nets {VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD} -spacing
{0.95 1.026 0.95 1.026 0.95 1.026 0.95 1.026 0.95 0.95 1.026 0.95 1.026
0.95 1.026 0.95 1.026 0.95 1.026} -start_offset 0.513
# M8, PG:
##VDD
addStripe -stapling {0.6 M7} -layer M8 -width 0.038 -direction horizontal -
set_to_set_distance 22.8 -nets {VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD} -spacing
{1.102 1.178 1.178 1.178 1.102 1.178 1.178 1.178 1.178 1.102 1.178 1.178
1.178 1.178 1.102 1.178 1.178 1.178 1.178} -start_offset 2.697
##VSS
addStripe -stapling {0.6 M7} -layer M8 -width 0.038 -direction horizontal -
set_to_set_distance 22.8 -nets {VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS } -spacing {1.102
1.178 1.178 1.178 1.178 1.102 1.178 1.178 1.178 1.178 1.102 1.178 1.178
1.178 1.178 1.102 1.178 1.178 1.178 } -start_offset 1.785
###The first two stripes of VDD are not matching with pattern
addStripe -stapling {0.6 M7} -layer M8 -width 0.038 -direction horizontal -nets
{VDD VDD} -spacing 1.178 -start_offset 0.265 -number_of_sets 1
# M9, PG
##VSS
addStripe -stapling {0.3 M8} -layer M9 -width 0.076 -direction vertical -
set_to_set_distance 19.456 -nets {VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS} -spacing
{0.988 0.912 0.988 0.912 0.988 0.912 0.988 0.912 0.988 0.912 0.988 0.912
0.988 0.912 0.988 0.912 0.988 0.912 0.912} -start_offset 0.988
##VDD
addStripe -stapling {0.3 M8} -layer M9 -width 0.076 -direction vertical -
set_to_set_distance 19.456 -nets {VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD} -spacing
{0.912 0.988 0.912 0.988 0.912 0.988 0.912 0.988 0.912 0.912 0.988 0.912
0.988 0.912 0.988 0.912 0.988 0.912 0.988} -start_offset 0.532
VII. Layer M10 to M13: Stipes from M10 to M13 are continuous and hence need
stapling. The normal addStripe command will work here. For the sake of
completion, commands used to generate power mesh from M10 to M13 are:
# M10, PG
##VDD
addStripe -layer M10 -width 0.062 -direction horizontal -set_to_set_distance
25.2 -nets {VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD} -spacing {1.198 1.072
1.198 1.072 1.198 1.198 1.072 1.198 1.072 1.198 1.072 1.198 1.072 1.198
1.072 1.198 1.072 1.198 1.072 1.198 1.072} -start_offset 0.201 -extend_to
design_boundary
##VSS
addStripe -layer M10 -width 0.062 -direction horizontal -set_to_set_distance
25.2 -nets {VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS} -spacing {1.072 1.198 1.072
1.198 1.072 1.198 1.072 1.198 1.072 1.198 1.198 1.072 1.198 1.072 1.198
1.072 1.198 1.072 1.198 1.072 1.198} -start_offset 0.579 -extend_to
design_boundary
# M11, PG:
##VSS
addStripe -layer M11 -width 0.55 -direction vertical -set_to_set_distance
249.858 -nets {VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS } -spacing {3.482 3.608 3.482 3.608 3.482 3.608 3.482
3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482
3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482
3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482
3.608 3.482 3.608 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608
3.482 3.608 3.482 3.608 3.482 3.608 } -start_offset 2.623 -extend_to
design_boundary
##VDD
addStripe -layer M11 -width 0.55 -direction vertical -set_to_set_distance
249.858 -nets {VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VDD VDD VDD VDD VDD VDD VDD VDD } -spacing {3.608 3.482 3.608
3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608
3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482
3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482
3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482
3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 3.608 3.482 } -start_offset
0.481 -extend_to design_boundary
# M12, PG:
#M13, PG:
Via generation: Via0 to Via2 are generated with the addStripe commands from layer
M1 to M3. From the layer M4 onwards, there are a lot many commands to generate
VDD and VSS. So we have generated the via separately from Via2 to Via12 using the
following commands:
###Via 3
editPowerVia -skip_via_on_pin Standardcell -bottom_layer M3 -add_vias 1 -
top_layer M4 -orthogonal_only false
###Via 4
editPowerVia -skip_via_on_pin Standardcell -bottom_layer M4 -add_vias 1 -
top_layer M5 -orthogonal_only false
###Via 5
editPowerVia -skip_via_on_pin Standardcell -bottom_layer M5 -add_vias 1 -
top_layer M6 -orthogonal_only false
###Via 6
editPowerVia -skip_via_on_pin Standardcell -bottom_layer M6 -add_vias 1 -
top_layer M7 -orthogonal_only false
###Via 7
editPowerVia -skip_via_on_pin Standardcell -bottom_layer M7 -add_vias 1 -
top_layer M8 -orthogonal_only false
###Via 8
editPowerVia -skip_via_on_pin Standardcell -bottom_layer M8 -add_vias 1 -
top_layer M9 -orthogonal_only false
###Via 9
editPowerVia -skip_via_on_pin Standardcell -bottom_layer M9 -add_vias 1 -
top_layer M10 -orthogonal_only false
###Via 10
editPowerVia -skip_via_on_pin Standardcell -bottom_layer M10 -add_vias 1 -
top_layer M11 -orthogonal_only false
###Via 11
editPowerVia -skip_via_on_pin Standardcell -bottom_layer M11 -add_vias 1 -
top_layer M12 -orthogonal_only false
###Via 12
editPowerVia -skip_via_on_pin Standardcell -bottom_layer M12 -add_vias 1 -
top_layer M13 -orthogonal_only false
Summary
Generating power with addStripe is much faster as compared to dbCreateWire or
add_shape. For a 6200x6400 design with macros/memories where dbCreateWire
took four days, using addStripe will do the job in almost half a day. Stapling and
reference layer are very powerful options in addStripe. This will create clean power
mesh in the core area.
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