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  • Dhanush Prabhu

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    Dhanush Dhoni
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    The document describes constructing and testing a 3-bit asynchronous counter using JK flip-flops. It lists the required apparatus including JK flip-flops, AND gate, OR gate, and a digital test kit. It explains that the JK flip-flops are connected such that the output of one is fed into the next as input. Applying clock pulses causes it to start counting. The output is observed on LED displays and through a truth table to confirm the asynchronous counter was built and functioning correctly.

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    1919106022 Dhanush Prabhu

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    The document describes constructing and testing a 3-bit asynchronous counter using JK flip-flops. It lists the required apparatus including JK flip-flops, AND gate, OR gate, and a digital test kit. It explains that the JK flip-flops are connected such that the output of one is fed into the next as input. Applying clock pulses causes it to start counting. The output is observed on LED displays and through a truth table to confirm the asynchronous counter was built and functioning correctly.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    26 views6 pages

    Dhanush Prabhu

    Uploaded by

    Dhanush Dhoni
    The document describes constructing and testing a 3-bit asynchronous counter using JK flip-flops. It lists the required apparatus including JK flip-flops, AND gate, OR gate, and a digital test kit. It explains that the JK flip-flops are connected such that the output of one is fed into the next as input. Applying clock pulses causes it to start counting. The output is observed on LED displays and through a truth table to confirm the asynchronous counter was built and functioning correctly.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    of 6

    DIG1TAL LOGIC DESIGN LAB

    PRACTICAL
    Nam: 5.Dhanush Habhu

    Ragno 1919106022
    Dept BTECH-IT
    Sems 39ud
    Section: A
    Batch: Ist

    Dala 071oil2021
    Subjuch code: U191T306

    1. Construct and t anAsynchronows 3 bit Countw


    wing Jk #ip Mep

    Aim
    lo Constzut ond tt anASynchuorngus 33

    bit countu JK up tlop


    wing
    Appauatus Ruauiwd

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    JK FLIP-FLOP IC74 76 2

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    5 Poue Suply Co-5) V

    Thesy
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    he ciuut diogrom.

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    Confikming o uuojuiud
    dota in h tuuth rable wsVusisd andOnd
    he conneuion A duunun
    Ciuu Diogrom

    Q Q3

    PRESENT
    HIGH

    7 2
    AJ
    CLK CLK
    PR a PRa 1 PR
    6cLK CLk
    2K C
    3 3
    CLR
    HIOH

    Tuth Toble
    CLK Q3 02 Q1

    O 0 O
    0

    2 0

    3
    0
    5 0

    8
    Ronuls
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    +
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    :::::i . .

    **** **

    74HC73 74HC73

    Au

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