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FR60 MB91460D Series: 32-Bit Microcontroller
FR60 MB91460D Series: 32-Bit Microcontroller
32-bit Microcontroller
CMOS
■ FEATURES
1. FR60 CPU core
• 32-bit RISC, load/store architecture, five-stage pipeline
• 16-bit fixed-length instructions (basic instructions)
• Instruction execution speed: 1 instruction per cycle
• Instructions including memory-to-memory transfer, bit manipulation, and barrel shift instructions: Instructions
suitable for embedded applications
• Function entry/exit instructions and register data multi-load store instructions : Instructions supporting C
language
• Register interlock function: Facilitating assembly-language coding
• Built-in multiplier with instruction-level support
Signed 32-bit multiplication : 5 cycles
Signed 16-bit multiplication : 3 cycles
• Interrupts (save PC/PS) : 6 cycles (16 priority levels)
(Continued)
For the information for microcontroller supports, see the following web site.
This web site includes the "Customer Design Review Supplement" which provides the latest cautions on
system development and the minimal requirements to be checked to prevent problems before the system
development.
http://edevice.fujitsu.com/micom/en-support/
(Continued)
• Harvard architecture enabling program access and data access to be performed simultaneously
• Instructions compatible with the FR family
2. Internal peripheral resources
• General-purpose ports : Maximum 170 ports
• DMAC (DMA Controller)
Maximum of 5 channels able to operate simultaneously. (External to external : 1 channel)
3 transfer sources (external pin/internal peripheral/software)
Activation source can be selected using software.
Addressing mode specifies full 32-bit addresses (increment/decrement/fixed)
Transfer mode (demand transfer/burst transfer/step transfer/block transfer)
Fly-by transfer support (between external I/O and memory)
Transfer data size selectable from 8/16/32-bit
Multi-byte transfer enabled (by software)
DMAC descriptor in I/O areas (200H to 240H, 1000H to 1024H)
• A/D converter (successive approximation type)
10-bit resolution: 24 channels
Conversion time: minimum 1 μs
• External interrupt inputs : 14 channels
8 channels shared with CAN RX or I2C pins
• Bit search module (for REALOS)
Function to search from the MSB (most significant bit) for the position of the first “0”, “1”, or changed bit in a word
• LIN-USART (full duplex double buffer): 5 channels
Clock synchronous/asynchronous selectable
Sync-break detection
Internal dedicated baud rate generator
• I2C bus interface (supports 400 kbps): 3 channels
Master/slave transmission and reception
Arbitration function, clock synchronization function
• CAN controller (C-CAN): 3 channels
Maximum transfer speed: 1 Mbps
32 transmission/reception message buffers
• Stepper motor controller : 6 channels
4 high current output to each channel
2 synchronized PWMs per channel (8/10-bit)
• Sound generator : 1 channel
Tone frequency : PWM frequency divide-by-two (reload value + 1)
• Alarm comparator : 1 channel
Monitor external voltage
Generate an interrupt in case of voltage lower/higher than the defined thresholds (reference voltage)
• 16-bit PPG timer : 12 channels
• 16-bit PFM timer : 1 channel
• 16-bit reload timer: 8 channels
• 16-bit free-run timer: 8 channels (1 channel each for ICU and OCU)
• Input capture: 8 channels (operates in conjunction with the free-run timer)
• Output compare: 4 channels (operates in conjunction with the free-run timer)
• Up/Down counter: 3 channels (3*8-bit or 1*16-bit + 1*8-bit)
• Watchdog timer
(Continued)
2 DS07-16612-2E
MB91460D Series
(Continued)
• Real-time clock
• Low-power consumption modes : Sleep/stop mode function
• Supply Supervisor: Low voltage detection circuit for external VDD5 and internal 1.8V core voltage
• Clock supervisor
Monitors the sub-clock (32 kHz) and the main clock (4 MHz) , and switches to a recovery clock (CR oscillator,
etc.) when the oscillations stop.
• Clock modulator
• Clock monitor
• Sub-clock calibration
Corrects the real-time clock timer when operating with the 32 kHz or CR oscillator
• Main oscillator stabilization timer
Generates an interrupt in sub-clock mode after the stabilization wait time has elapsed on the 23-bit stabilization
wait time counter
• Sub-oscillator stabilization timer
Generates an interrupt in main clock mode after the stabilization wait time has elapsed on the 15-bit stabilization
wait time counter
3. Package and technology
• Package : QFP-208
• CMOS 0.18 μm technology
• Power supply range 3 V to 5 V (1.8 V internal logic provided by a step-down voltage converter)
• Operating temperature range: between − 40°C and + 105°C
DS07-16612-2E 3
MB91460D Series
■ PRODUCT LINEUP
MB91F467DA
Feature MB91V460A MB91F465DA MB91F467DB
DMA 5 ch 5 ch 5 ch
MAC (uDSP) no no no
Flash memory Emulation SRAM 32bit read data 544 KByte 1088 KByte
RTC 1 ch 1 ch 1 ch
ICU 8 ch 8 ch 8 ch
OCU 8 ch 4 ch 4 ch
Reload Timer 8 ch 8 ch 8 ch
PPG 16-bit 16 ch 12 ch 12 ch
PFM 16-bit 1 ch 1 ch 1 ch
Sound Generator 1 ch 1 ch 1 ch
I2C (400k) 4 ch 3 ch 3 ch
FR external bus yes (32bit addr, 32bit data) yes (26bit addr, 32bit data) yes (26bit addr, 32bit data)
4 DS07-16612-2E
MB91460D Series
External Interrupts 16 ch 14 ch 14 ch
NMI Interrupts 1 ch - -
SMC 6 ch 6 ch 6 ch
LCD controller (40x4) 1 ch - -
Alarm Comparator 2 ch 1 ch 1 ch
Supply Supervisor
yes yes yes
(low voltage detection)
PLL x 20 x 25 x 24
DSU4 yes - -
*1 *1
EDSU yes (32 BP) yes (16 BP) yes (16 BP) *1
Supply Voltage 3V / 5V 3V / 5V 3V / 5V
Flash Download Time n.a. < 5 sec. typical < 6 sec typical
*1 : MPU channels use EDSU breakpoint registers (shared operation between MPU and EDSU).
DS07-16612-2E 5
MB91460D Series
■ PIN ASSIGNMENT
1. MB91F465DA, MB91F467Dx
(TOP VIEW)
P13_2/DEOTX0/DEOP0
P26_7/SMC2M3/AN31
P26_5/SMC1M3/AN29
P26_3/SMC2M2/AN27
P26_1/SMC1M2/AN25
P27_7/SMC2M1/AN23
P27_5/SMC1M1/AN21
P27_3/SMC2M0/AN19
P27_1/SMC1M0/AN17
P26_6/SMC2P3/AN30
P26_4/SMC1P3/AN28
P26_2/SMC2P2/AN26
P26_0/SMC1P2/AN24
P27_6/SMC2P1/AN22
P27_4/SMC1P1/AN20
P27_2/SMC2P0/AN18
P27_0/SMC1P0/AN16
P25_7/SMC2M5
P25_5/SMC1M5
P25_3/SMC2M4
P25_1/SMC1M4
P13_1/DACKX0
P25_6/SMC2P5
P25_4/SMC1P5
P25_2/SMC2P4
P25_0/SMC1P4
P13_0/DREQ0
P02_7/D15
P02_6/D14
P02_5/D13
P02_4/D12
P02_3/D11
P02_2/D10
P02_1/D9
P02_0/D8
P03_7/D7
P03_6/D6
P03_5/D5
P03_4/D4
P03_3/D3
P03_2/D2
P03_1/D1
P03_0/D0
HVDD5
HVDD5
HVDD5
VDD35
HVSS5
HVSS5
HVSS5
VSS5
VSS5
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
VSS5 1 156 VDD5
P01_0/D16 2 155 P29_7/AN7
P01_1/D17 3 154 P29_6/AN6
P01_2/D18 4 153 P29_5/AN5
P01_3/D19 5 152 P29_4/AN4
P01_4/D20 6 151 P29_3/AN3
P01_5/D21 7 150 P29_2/AN2
P01_6/D22 8 149 P29_1/AN1
P01_7/D23 9 148 P29_0/AN0
P00_0/D24 10 147 ALARM_0
P00_1/D25 11 146 AVCC5
P00_2/D26 12 145 AVRH5
P00_3/D27 13 144 AVSS5
P00_4/D28 14 143 P16_7/PPG15/ATGX
P00_5/D29 15 142 P16_6/PPG14/PFM
P00_6/D30 16 141 P16_5/PPG13/SGO
P00_7/D31 17 140 P16_4/PPG12/SGA
P07_0/A0 18 139 P16_3/PPG11
P07_1/A1 19 138 P16_2/PPG10
P07_2/A2 20 137 P16_1/PPG9
P07_3/A3 21 136 P16_0/PPG8
P07_4/A4 22 135 P17_7/PPG7
P07_5/A5 23 134 P17_6/PPG6
P07_6/A6 24 133 P17_5/PPG5
P07_7/A7 25 132 P17_4/PPG4
VDD35 26 131 VSS5
VSS5
P06_0/A8
27
28
QFP-208 130
129
VDD5
P14_7/ICU7/TIN7/TTG7/15
P06_1/A9 29 128 P14_6/ICU6/TIN6/TTG6/14
P06_2/A10 30 127 P14_5/ICU5/TIN5/TTG5/13
P06_3/A11 31 126 P14_4/ICU4/TIN4/TTG4/12
P06_4/A12 32 125 P14_3/ICU3/TIN3/TTG11
P06_5/A13 33 124 P14_2/ICU2/TIN2/TTG10
P06_6/A14 34 123 P14_1/ICU1/TIN1/TTG9
P06_7/A15 35 122 P14_0/ICU0/TIN0/TTG8
P05_0/A16 36 121 P15_3/OCU3/TOT3
P05_1/A17 37 120 P15_2/OCU2/TOT2
P05_2/A18 38 119 P15_1/OCU1/TOT1
P05_3/A19 39 118 P15_0/OCU0/TOT0
P05_4/A20 40 117 P18_6/SCK7/ZIN3/CK7
P05_5/A21 41 116 P18_5/SOT7/BIN3
P05_6/A22 42 115 P18_4/SIN7/AIN3
P05_7/A23 43 114 P18_2/SCK6/ZIN2/CK6
P04_0/A24 44 113 P18_1/SOT6/BIN2
P04_1/A25 45 112 P18_0/SIN6/AIN2
P08_0/WRX0 46 111 P19_6/SCK5/CK5
P08_1/WRX1 47 110 P19_5/SOT5
P08_2/WRX2 48 109 P19_4/SIN5
P08_3/WRX3 49 108 P19_2/SCK4/CK4
P08_4/RDX 50 107 P19_1/SOT4
P08_5/BGRNTX 51 106 P19_0/SIN4
VDD35 52 105 VSS5
100
101
102
103
104
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
VDD5R
VDD5R
P10_6/MCLKE
VCC18C
P08_7/RDY
MONCLK
P10_1/ASX
P10_2/BAAX
P10_3/WEX
INITX
P08_6/BRQ
P10_4/MCLKO
X1A
X0A
VSS5
P09_0/CSX0
P09_1/CSX1
P09_2/CSX2
P09_3/CSX3
P09_6/CSX6
P09_7/CSX7
VSS5
MD_2
MD_1
MD_0
X1
X0
VDD5
VSS5
P24_0/INT0
P24_1/INT1
P24_2/INT2
P24_3/INT3
P24_4/INT4/SDA2
P24_5/INT5/SCL2
P24_6/INT6/SDA3
P24_7/INT7/SCL3
P23_0/RX0/INT8
P23_1/TX0
P23_2/RX1/INT9
P23_3/TX1
P23_4/RX2/INT10
P23_5/TX2
P22_0/INT12
P22_2/INT13
P22_4/SDA0/INT14
P22_5/SCL0
P20_0/SIN2/AIN0
P20_1/SOT2/BIN0
P20_2/SCK2/ZIN0/CK2
VDD5
P10_5/MCLKI
FPT-208P-M04
6 DS07-16612-2E
MB91460D Series
■ PIN DESCRIPTION
1. MB91F465DA, MB91F467Dx
I/O circuit
Pin no. Pin name I/O Function
type*
P01_0 to P01_7 General-purpose input/output ports
2 to 9 I/O A
D16 to D23 Signal pins of external data bus (bit16 to bit23)
P00_0 to P00_7 General-purpose input/output ports
10 to 17 I/O A
D24 to D31 Signal pins of external data bus (bit24 to bit31)
P07_0 to P07_7 General-purpose input/output ports
18 to 25 I/O A
A0 to A7 Signal pins of external address bus (bit0 to bit7)
P06_0 to P06_7 General-purpose input/output ports
28 to 35 I/O A
A8 to A15 Signal pins of external address bus (bit8 to bit15)
P05_0 to P05_7 General-purpose input/output ports
36 to 43 I/O A
A16 to A23 Signal pins of external address bus (bit16 to bit23)
P04_0, P04_1 General-purpose input/output ports
44, 45 I/O A
A24, A25 Signal pins of external address bus (bit24, bit25)
P08_0 to P08_3 General-purpose input/output ports
46 to 49 I/O A
WRX0 to WRX3 External write strobe output pins
P08_4 General-purpose input/output port
50 I/O A
RDX External read strobe output pin
P08_5 General-purpose input/output port
51 I/O A
BGRNTX External bus release reception output pin
P08_6 General-purpose input/output port
54 I/O A
BRQ External bus release request input pin
P08_7 General-purpose input/output port
55 I/O A
RDY External ready input pin
P09_0 to P09_3 General-purpose input/output ports
56 to 59 I/O A
CSX0 to CSX3 Chip select output pins
P09_6, P09_7 General-purpose input/output ports
60, 61 I/O A
CSX6, CSX7 Chip select output pins
P10_1 General-purpose input/output port
62 I/O A
ASX Address strobe output pin
P10_2 General-purpose input/output port
63 I/O A
BAAX Burst address advance output pin
P10_3 General-purpose input/output port
64 I/O A
WEX Write enable output pin
P10_4 General-purpose input/output port
65 I/O A
MCLKO Clock output pin for memory
(Continued)
DS07-16612-2E 7
MB91460D Series
(Continued)
I/O circuit
Pin no. Pin name I/O Function
type*
P10_5 General-purpose input/output port
66 I/O A
MCLKI Clock input pin for memory
P10_6 General-purpose input/output port
67 I/O A
MCLKE Clock enable signal pin for memory
68 MONCLK O M Clock monitor pin
70 MD_2 I G
71 MD_1 I G Mode setting pins
72 MD_0 I G
73 INITX I H External reset input pin
74 X1A ⎯ J2 Sub clock (oscillation) output
75 X0A ⎯ J2 Sub clock (oscillation) input
76 X1 ⎯ J1 Clock (oscillation) output
77 X0 ⎯ J1 Clock (oscillation) input
P24_0 to P24_3 General-purpose input/output ports
83 to 86 I/O A
INT0 to INT3 External interrupt input pins
P24_4 General-purpose input/output port
87 INT4 I/O C External interrupt input pin
SDA2 I2C bus DATA input/output pin
P24_5 General-purpose input/output port
88 INT5 I/O C External interrupt input pin
SCL2 I2C bus clock input/output pin
P24_6 General-purpose input/output port
89 INT6 I/O C External interrupt input pin
SDA3 I2C bus DATA input/output pin
P24_7 General-purpose input/output port
90 INT7 I/O C External interrupt input pin
SCL3 I2C bus clock input/output pin
P23_0 General-purpose input/output port
91 RX0 I/O A RX input pin of CAN0
INT8 External interrupt input pin
P23_1 General-purpose input/output port
92 I/O A
TX0 TX output pin of CAN0
P23_2 General-purpose input/output port
93 RX1 I/O A RX input pin of CAN1
INT9 External interrupt input pin
(Continued)
8 DS07-16612-2E
MB91460D Series
(Continued)
I/O circuit
Pin no. Pin name I/O Function
type*
P23_3 General-purpose input/output port
94 I/O A
TX1 TX output pin of CAN1
P23_4 General-purpose input/output port
95 RX2 I/O A RX input pin of CAN2
INT10 External interrupt input pin
P23_5 General-purpose input/output port
96 I/O A
TX2 TX output pin of CAN2
P22_0 General-purpose input/output port
97 I/O A
INT12 External interrupt input pin
P22_2 General-purpose input/output port
98 I/O A
INT13 External interrupt input pin
P22_4 General-purpose input/output port
99 SDA0 I/O C I2C bus data input/output pin
INT14 External interrupt input pin
P22_5 General-purpose input/output port
100 I/O C
SCL0 I2C bus clock input/output pin
P20_0 General-purpose input/output port
101 SIN2 I/O A Data input pin of USART2
AIN0 Up/down counter input pin
P20_1 General-purpose input/output port
102 SOT2 I/O A Data output pin of USART2
BIN0 Up/down counter input pin
P20_2 General-purpose input/output port
SCK2 Clock input/output pin of USART2
103 I/O A
ZIN0 Up/down counter input pin
CK2 External clock input pin of free-run timer 2
P19_0 General-purpose input/output port
106 I/O A
SIN4 Data input pin of USART4
P19_1 General-purpose input/output port
107 I/O A
SOT4 Data output pin of USART4
P19_2 General-purpose input/output port
108 SCK4 I/O A Clock input/output pin of USART4
CK4 External clock input pin of free-run timer 4
(Continued)
DS07-16612-2E 9
MB91460D Series
(Continued)
I/O circuit
Pin no. Pin name I/O Function
type*
P19_4 General-purpose input/output port
109 I/O A
SIN5 Data input pin of USART5
P19_5 General-purpose input/output port
110 I/O A
SOT5 Data output pin of USART5
P19_6 General-purpose input/output port
111 SCK5 I/O A Clock input/output pin of USART5
CK5 External clock input pin of free-run timer 5
P18_0 General-purpose input/output port
112 SIN6 I/O A Data input pin of USART6
AIN2 Up/down counter input pin
P18_1 General-purpose input/output port
113 SOT6 I/O A Data output pin of USART6
BIN2 Up/down counter input pin
P18_2 General-purpose input/output port
SCK6 Clock input/output pin of USART6
114 I/O A
ZIN2 Up/down counter input pin
CK6 External clock input pin of free-run timer 6
P18_4 General-purpose input/output port
115 SIN7 I/O A Data input pin of USART7
AIN3 Up/down counter input pin
P18_5 General-purpose input/output port
116 SOT7 I/O A Data output pin of USART7
BIN3 Up/down counter input pin
P18_6 General-purpose input/output port
SCK7 Clock input/output pin of USART7
117 I/O A
ZIN3 Up/down counter input pin
CK7 External clock input pin of free-run timer 7
P15_0 to P15_3 General-purpose input/output ports
118 to 121 OCU0 to OCU3 I/O A Output compare output pins
TOT0 to TOT3 Reload timer output pins
P14_0 to P14_7 General-purpose input/output ports
ICU0 to ICU7 Input capture input pins
122 to 129 TIN0 to TIN7 I/O A External trigger input pins of reload timer
TTG8 to TTG11,
TTG4/12 to External trigger input pins of PPG timer
TTG7/15
(Continued)
10 DS07-16612-2E
MB91460D Series
(Continued)
I/O circuit
Pin no. Pin name I/O Function
type*
P17_4 to P17_7 General-purpose input/output ports
132 to 135 I/O A
PPG4 to PPG7 Output pins of PPG timer
P16_0 to P16_3 General-purpose input/output ports
136 to 139 I/O A
PPG8 to PPG11 PPG timer output pins
P16_4 General-purpose input/output port
140 PPG12 I/O A Output pin of PPG timer
SGA SGA output pin of sound generator
P16_5 General-purpose input/output port
141 PPG13 I/O A Output pin of PPG timer
SGO SGO output pin of sound generator
P16_6 General-purpose input/output port
142 PPG14 I/O A Output pin of PPG timer
PFM Pulse frequency modulator output pin
P16_7 General-purpose input/output port
143 PPG15 I/O A PPG timer output pin
ATGX A/D converter external trigger input pin
147 ALARM_0 I N Alarm comparator input pin
P29_0 to P29_7 General-purpose input/output ports
148 to 155 I/O B
AN0 to AN7 Analog input pins of A/D converter
P27_0 General-purpose input/output port
158 SMC1P0 I/O F Controller output pin of Stepper motor
AN16 Analog input pin of A/D converter
P27_1 General-purpose input/output port
159 SMC1M0 I/O F Controller output pin of Stepper motor
AN17 Analog input pin of A/D converter
P27_2 General-purpose input/output port
160 SMC2P0 I/O F Controller output pin of Stepper motor
AN18 Analog input pin of A/D converter
P27_3 General-purpose input/output port
161 SMC2M0 I/O F Controller output pin of Stepper motor
AN19 Analog input pin of A/D converter
P27_4 General-purpose input/output port
164 SMC1P1 I/O F Controller output pin of Stepper motor
AN20 Analog input pin of A/D converter
(Continued)
DS07-16612-2E 11
MB91460D Series
(Continued)
I/O circuit
Pin no. Pin name I/O Function
type*
P27_5 General-purpose input/output port
165 SMC1M1 I/O F Controller output pin of Stepper motor
AN21 Analog input pin of A/D converter
P27_6 General-purpose input/output port
166 SMC2P1 I/O F Controller output pin of Stepper motor
AN22 Analog input pin of A/D converter
P27_7 General-purpose input/output port
167 SMC2M1 I/O F Controller output pin of Stepper motor
AN23 Analog input pin of A/D converter
P26_0 General-purpose input/output port
168 SMC1P2 I/O F Controller output pin of Stepper motor
AN24 Analog input pin of A/D converter
P26_1 General-purpose input/output port
169 SMC1M2 I/O F Controller output pin of Stepper motor
AN25 Analog input pin of A/D converter
P26_2 General-purpose input/output port
170 SMC2P2 I/O F Controller output pin of Stepper motor
AN26 Analog input pin of A/D converter
P26_3 General-purpose input/output port
171 SMC2M2 I/O F Controller output pin of Stepper motor
AN27 Analog input pin of A/D converter
P26_4 General-purpose input/output port
174 SMC1P3 I/O F Controller output pin of Stepper motor
AN28 Analog input pin of A/D converter
P26_5 General-purpose input/output port
175 SMC1M3 I/O F Controller output pin of Stepper motor
AN29 Analog input pin of A/D converter
P26_6 General-purpose input/output port
176 SMC2P3 I/O F Controller output pin of Stepper motor
AN30 Analog input pin of A/D converter
P26_7 General-purpose input/output port
177 SMC2M3 I/O F Controller output pin of Stepper motor
AN31 Analog input pin of A/D converter
(Continued)
12 DS07-16612-2E
MB91460D Series
(Continued)
I/O circuit
Pin no. Pin name I/O Function
type*
P25_0 General-purpose input/output port
178 I/O E
SMC1P4 Controller output pin of Stepper motor
P25_1 General-purpose input/output port
179 I/O E
SMC1M4 Controller output pin of Stepper motor
P25_2 General-purpose input/output port
180 I/O E
SMC2P4 Controller output pin of Stepper motor
P25_3 General-purpose input/output port
181 I/O E
SMC2M4 Controller output pin of Stepper motor
P25_4 General-purpose input/output port
184 I/O E
SMC1P5 Controller output pin of Stepper motor
P25_5 General-purpose input/output port
185 I/O E
SMC1M5 Controller output pin of Stepper motor
P25_6 General-purpose input/output port
186 I/O E
SMC2P5 Controller output pin of Stepper motor
P25_7 General-purpose input/output port
187 I/O E
SMC2M5 Controller output pin of Stepper motor
P13_0 General-purpose input/output port
189 I/O A
DREQ0 DMA external transfer request input
P13_1 General-purpose input/output port
190 I/O A
DACKX0 DMA external transfer acknowledge output pin
P13_2 General-purpose input/output port
191 DEOTX0 I/O A DMA external transfer EOT (End of Track) output pin
DEOP0 DMA external transfer EOP (End of Process) output pin
P03_0 to P03_7 General-purpose input/output ports
192 to 199 I/O A
D0 to D7 Signal pins of external data bus (bit0 to bit7)
P02_0 to P02_7 General-purpose input/output ports
200 to 207 I/O A
D8 to D15 Signal pins of external data bus (bit8 to bit15)
* : For information about the I/O circuit type, refer to “■ I/O CIRCUIT TYPES”.
DS07-16612-2E 13
MB91460D Series
14 DS07-16612-2E
MB91460D Series
Automotive inputs
TTL input
standby control for
input shutdown
Automotive inputs
TTL input
standby control for
input shutdown
analog input
DS07-16612-2E 15
MB91460D Series
Automotive inputs
TTL input
standby control for
input shutdown
Automotive inputs
TTL input
standby control for
input shutdown
analog input
16 DS07-16612-2E
MB91460D Series
Automotive inputs
TTL input
standby control for
input shutdown
Automotive inputs
TTL input
standby control for
input shutdown
analog input
DS07-16612-2E 17
MB91460D Series
Pull-up
Resistor
R
Hysteresis
inputs
R FCI
X0
X0A
osc disable
18 DS07-16612-2E
MB91460D Series
Automotive inputs
TTL input
standby control for
input shutdown
LCD SEG/COM
Automotive inputs
TTL input
standby control for
input shutdown
VLCD
DS07-16612-2E 19
MB91460D Series
data line
N
Analog input pin with protection
20 DS07-16612-2E
MB91460D Series
■ HANDLING DEVICES
1. Preventing Latch-up
Latch-up may occur in a CMOS IC if a voltage higher than (VDD5, VDD35 or HVDD5) or less than (VSS5 or HVSS5)
is applied to an input or output pin or if a voltage exceeding the rating is applied between the power supply pins
and ground pins. If latch-up occurs, the power supply current increases rapidly, sometimes resulting in thermal
breakdown of the device. Therefore, be very careful not to apply voltages in excess of the absolute maximum
ratings.
DS07-16612-2E 21
MB91460D Series
(Continued)
Example of using opposite phase supply
X0 (X0A)
X1 (X1A)
22 DS07-16612-2E
MB91460D Series
8. Pull-up control
The AC standard is not guaranteed in case a pull-up resistor is connected to the pin serving as an external bus pin.
9. Notes on PS register
As the PS register is processed in advance by some instructions, when the debugger is being used, the exception
handling may result in execution breaking in an interrupt handling routine or the displayed values of the flags in
the PS register being updated.
As the microcontroller is designed to carry out reprocessing correctly upon returning from such an EIT event,
the operation before and after the EIT always proceeds according to specification.
• The following behavior may occur if any of the following occurs in the instruction
immediately after a DIV0U/DIV0S instruction:
(a) a user interrupt or NMI is accepted;
(b) single-step execution is performed;
(c) execution breaks due to a data event or from the emulator menu.
1. D0 and D1 flags are updated in advance.
2. An EIT handling routine (user interrupt/NMI or emulator) is executed.
3. Upon returning from the EIT, the DIV0U/DIV0S instruction is executed
and the D0 and D1 flags are updated to the same values as those in 1.
• The following behavior occurs when an ORCCR, STILM, MOV Ri,PS instruction is executed
to enable a user interrupt or NMI source while that interrupt is in the active state.
1. The PS register is updated in advance.
2. An EIT handling routine (user interrupt/NMI or emulator) is executed.
3. Upon returning from the EIT, the above instructions are executed and the PS register
is updated to the same value as in 1.
DS07-16612-2E 23
MB91460D Series
■ NOTES ON DEBUGGER
1. Execution of the RETI Command
If single-step execution is used in an environment where an interrupt occurs frequently, the corresponding
interrupt handling routine will be executed repeatedly to the exclusion of other processing. This will prevent the
main routine and the handlers for low priority level interrupts from being executed (For example, if the time-base
timer interrupt is enabled, stepping over the RETI instruction will always break on the first line of the time-base
timer interrupt handler).
Disable the corresponding interrupts when the corresponding interrupt handling routine no longer needs debug-
ging.
2. Break function
If the range of addresses that cause a hardware break (including event breaks) is set to the address of the
current system stack pointer or to an area that contains the stack pointer, execution will break after each
instruction regardless of whether the user program actually contains data access instructions.
To prevent this, do not set (word) access to the area containing the address of the system stack pointer as the
target of the hardware break (including an event breaks).
3. Operand break
It may cause malfunctions if a stack pointer exists in the area which is set as the DSU operand break. Do not
set the access to the areas containing the address of system stack pointer as a target of data event break.
24 DS07-16612-2E
MB91460D Series
■ BLOCK DIAGRAM
1. MB91F465DA, MB91F467Dx
FR60 CPU
core
D-RAM
Flash-Cache I-bus 32 Kbytes
8 Kbytes 32
Bit search
Flash memory
1088 Kbytes (MB91F467Dx) CAN RX0 to RX2
544 Kbytes (MB91F465DA) D-bus 3 channels TX0 to TX2
32
32 <-> 16 BAAX
bus adapter WEX
ASX
RDX
ID-RAM WRX0 to WRX3
BRQ
32 Kbytes
Bus converter External MCLKE
(MB91F467Dx) bus MCLKO
16 Kbytes MCLKI
interface BGRNTX
(MB91F465DA)
CSX0 to CSX3,CSX6,CSX7
A0 to A25
DREQ0 D0 to D31
DACKX0 DMAC R-bus
DEOP0 5 channels 16
DEOTX0
Clock modulator
Clock supervisor Clock monitor MONCLK
DS07-16612-2E 25
MB91460D Series
2. Internal architecture
• The FR family CPU uses the Harvard architecture in which the instruction bus and data bus are independent
of each other.
• A 32-bit ↔ 16-bit buffer is connected to the 32-bit bus (D-bus) to provide an interface between the CPU and
peripheral resources.
• A Harvard ↔ Princeton bus converter is connected to both the I-bus and D-bus to provide an interface between
the CPU and the bus controller.
26 DS07-16612-2E
MB91460D Series
3. Programming model
3.1. Basic programming model
32 bits
Initial value
R0 XXXX XXXXH
R1 ...
... ... ...
... ... ...
General-purpose registers R12 ...
R13 AC ...
Program counter PC
Return pointer RP
DS07-16612-2E 27
MB91460D Series
4. Registers
4.1. General-purpose register
32 bits
Initial value
R0 XXXX XXXXH
R1 ...
... ... ...
... ... ...
R12 ...
R13 AC ...
Registers R0 to R15 are general-purpose registers. These registers can be used as accumulators for computation
operations and as pointers for memory access.
Of the 16 registers, enhanced commands are provided for the following registers to enable their use for particular
applications.
Initial values at reset are undefined for R0 to R14. The value for R15 is 00000000H (SSP value).
28 DS07-16612-2E
MB91460D Series
Initial value
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
SV S I N Z V C - 000XXXXB
SV : Supervisor flag
S : Stack flag
I : Interrupt enable flag
N : Negative enable flag
Z : Zero flag
V : Overflow flag
C : Carry flag
This register stores interrupt level mask values, and the values stored in ILM4 to ILM0 are used for level masking.
The register is initialized to value “01111B” at reset.
The program counter indicates the address of the instruction that is being executed.
The initial value at reset is undefined.
DS07-16612-2E 29
MB91460D Series
The table base register stores the starting address of the vector table used in EIT processing.
The initial value at reset is 000FFC00H.
The return pointer stores the address for return from subroutines.
During execution of a CALL instruction, the PC value is transferred to this RP register.
During execution of a RET instruction, the contents of the RP register are transferred to PC.
The initial value at reset is undefined.
The user stack pointer, when the S flag is “1”, this register functions as the R15 register.
• The USP register can also be explicitly specified.
The initial value at reset is undefined.
• This register cannot be used with RETI instructions.
bit 31 bit 0
MDH
MDL
These registers are for multiplication and division, and are each 32 bits in length.
The initial value at reset is undefined.
30 DS07-16612-2E
MB91460D Series
1. Flash features
• MB91F467Dx: 1088 Kbytes (16 × 64 Kbytes + 8 × 8 Kbytes) = 8.5 Mbits
• MB91F465DA: 544 Kbytes (8 × 64 Kbytes + 4 × 8 Kbytes) = 4.25 Mbits
• Programmable wait state for read/write access
• Flash and Boot security with security vector at 0x0014:8000 - 0x0014:800F
• Boot security
• Basic specification: Same as MBM29LV400TC (except size and part of sector configuration)
2. Operation modes
(1) 64-bit CPU mode (available on MB91F467Dx only) :
• CPU reads and executes programs in word (32-bit) length units.
• Flash writing is not possible.
• Actual Flash Memory access is performed in d-word (64-bit) length units.
Note: The operation mode of the flash memory can be selected using a Boot-ROM function. The function start
address is 0xBF60. The parameter description is given in the Hardware Manual in chapter 54.6 "Flash
Access Mode Switching".
DS07-16612-2E 31
MB91460D Series
0014:FFFFh
SA6 (8KB) SA7 (8KB)
0014:C000h
0014:BFFFh
SA4 (8KB) SA5 (8KB)
0014:8000h
ROMS7
0014:7FFFh
SA2 (8KB) SA3 (8KB)
0014:4000h
0014:3FFFh
SA0 (8KB) SA1 (8KB)
0014:0000h
0013:FFFFh
SA22 (64KB) SA23 (64KB)
0012:0000h
ROMS6
0011:FFFFh
SA20 (64KB) SA21 (64KB)
0010:0000h
000F:FFFFh
SA18 (64KB) SA19 (64KB) ROMS5
000E:0000h
000D:FFFFh
SA16 (64KB) SA17 (64KB) ROMS4
000C:0000h
000B:FFFFh
SA14 (64KB) SA15 (64KB) ROMS3
000A:0000h
0009:FFFFh
SA12 (64KB) SA13 (64KB) ROMS2
0008:0000h
0007:FFFFh
SA10 (64KB) SA11 (64KB) ROMS1
0006:0000h
0005:FFFFh
SA8 (64KB) SA9 (64KB) ROMS0
0004:0000h
32 DS07-16612-2E
MB91460D Series
0014:FFFFh
SA6 (8KB) SA7 (8KB)
0014:C000h
0014:BFFFh
SA4 (8KB) SA5 (8KB)
0014:8000h ROMS7
0014:7FFFh
SA2 (8KB) SA3 (8KB)
0014:4000h
0014:3FFFh
SA0 (8KB) SA1 (8KB)
0014:0000h
0013:FFFFh
SA22 (64KB) SA23 (64KB)
0012:0000h
ROMS6
0011:FFFFh
SA20 (64KB) SA21 (64KB)
0010:0000h
000F:FFFFh
SA18 (64KB) SA19 (64KB) ROMS5
000E:0000h
000D:FFFFh
SA16 (64KB) SA17 (64KB) ROMS4
000C:0000h
000B:FFFFh
SA14 (64KB) SA15 (64KB) ROMS3
000A:0000h
0009:FFFFh
SA12 (64KB) SA13 (64KB) ROMS2
0008:0000h
0007:FFFFh
SA10 (64KB) SA11 (64KB) ROMS1
0006:0000h
0005:FFFFh
SA8 (64KB) SA9 (64KB) ROMS0
0004:0000h
Legend Memory not available in this area Memory available in this area
DS07-16612-2E 33
MB91460D Series
34 DS07-16612-2E
MB91460D Series
DS07-16612-2E 35
MB91460D Series
002F:FFFFh 0017:9FFFh
SA7 (8KB) SA4 (8KB)
002F:E000h 0017:8000h
002F:BFFFh
SA5 (8KB) SA2 (8KB)
002F:A000h
002F:9FFFh
SA4 (8KB) SA1 (8KB)
002F:8000h
002F:7FFFh
SA3 (8KB) SA0 (8KB)
002F:6000h
36 DS07-16612-2E
MB91460D Series
A12 to A15 Internal address bus FA13 to FA16 P26_4 to P26_7 174 to 177
Not needed on
MB91F465DA;
⎯ FA21 P25_4 184
Set to ‘1’ on
MB91F467Dx
DS07-16612-2E 37
MB91460D Series
6. Flash Security
6.1. Vector addresses
Two Flash Security Vectors (FSV1, FSV2) are located parallel to the Boot Security Vectors (BSV1, BSV2)
controlling the protection functions of the Flash Security Module:
FSV1: 0x14:8000 BSV1: 0x14:8004
FSV2: 0x14:8008 BSV2: 0x14:800C
38 DS07-16612-2E
MB91460D Series
DS07-16612-2E 39
MB91460D Series
Note : See section “Flash access in CPU mode” for an overview about the sector organisation of the Flash Memory.
40 DS07-16612-2E
MB91460D Series
■ MEMORY SPACE
The FR family has 4 Gbytes of logical address space (232 addresses) available to the CPU by linear access.
• Direct addressing area
The following address space area is used for I/O.
This area is called direct addressing area, and the address of an operand can be specified directly in an
instruction.
The size of directly addressable area depends on the length of the data being accessed as shown below.
Byte data access : 000H to 0FFH
Half word access : 000H to 1FFH
Word data access : 000H to 3FFH
DS07-16612-2E 41
MB91460D Series
■ MEMORY MAPS
1. MB91F465DA, MB91F467Dx
MB91F467Dx MB91F465DA
00000000H 00000000H
I/O (direct addressing area) I/O (direct addressing area)
00000400H 00000400H
I/O I/O
00001000H 00001000H
DMA DMA
00002000H 00002000H
00004000H 00004000H
Flash-Cache (8 KBytes) Flash-Cache (8 KBytes)
00006000H 00006000H
00007000H 00007000H
Flash memory control Flash memory control
00008000H 00008000H
0000B000H 0000B000H
Boot ROM (4 Kbytes) Boot ROM (4 Kbytes)
0000C000H 0000C000H
CAN CAN
0000D000H 0000D000H
00028000H
D-RAM (0 wait, 32 Kbytes)
00028000H
D-RAM (0 wait, 32 Kbytes) 00030000H
ID-RAM (16 Kbytes)
00030000H
ID-RAM (32 Kbytes) 00034000H
00038000H 00040000H
External bus area
00040000H
00080000H
Flash memory (512 Kbytes)
Flash memory (1088 Kbytes)
00100000H
External bus area
00148000H
Flash memory (32 Kbytes)
00150000H 00150000H
00180000H 00180000H
External bus area External bus area
00500000H 00500000H
External data bus External data bus
FFFFFFFFH FFFFFFFFH
42 DS07-16612-2E
MB91460D Series
■ I/O MAP
1. MB91F465DA, MB91F467Dx
Register
Address Block
+0 +1 +2 +3
PDR0 [R/W] PDR1 [R/W] PDR2 [R/W] PDR3 [R/W] T-unit
000000H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX port data register
Read/write attribute
DS07-16612-2E 43
MB91460D Series
Register
Address Block
+0 +1 +2 +3
PDR00 [R/W] PDR01 [R/W] PDR02 [R/W] PDR03 [R/W]
000000H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
PDR04 [R/W] PDR05 [R/W] PDR06 [R/W] PDR07 [R/W]
000004H
- - - - - - XX XXXXXXXX XXXXXXXX XXXXXXXX
PDR08 [R/W] PDR09 [R/W] PDR10 [R/W]
000008H Reserved
XXXXXXXX XX - - XXXX - XXXXXX -
PDR13 [R/W] PDR14 [R/W] PDR15 [R/W]
00000CH Reserved R-bus
- - - - - XXX XXXXXXXX - - - - XXXX
Port Data
PDR16 [R/W] PDR17 [R/W] PDR18 [R/W] PDR19 [R/W] Register
000010H
XXXXXXXX XXXX - - - - - XXX - XXX - XXX - XXX
PDR20 [R/W] PDR22 [R/W] PDR23 [R/W]
000014H Reserved
- - - - - XXX - - XX - X - X - - XXXXXX
PDR24 [R/W] PDR25 [R/W] PDR26 [R/W] PDR27 [R/W]
000018H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
PDR29 [R/W]
00001CH Reserved Reserved
XXXXXXXX
000020H
to Reserved Reserved
00002CH
EIRR0 [R/W] ENIR0 [R/W] ELVR0 [R/W] External interrupt
000030H
XXXXXXXX 00000000 00000000 00000000 (INT 0 to INT 7)
External interrupt
EIRR1 [R/W] ENIR1 [R/W] ELVR1 [R/W]
000034H (INT 8 to INT 10,
XXXXXXXX 00000000 00000000 00000000
INT 12 to INT 14)
DICR [R/W] HRCL [R/W]
000038H Reserved Delay Interrupt
-------0 0 - - 11111
00003CH
to Reserved Reserved
00004CH
RDR02/TDR02
SCR02 [R/W, W] SMR02 [R/W, W] SSR02 [R/W, R]
000050H [R/W]
00000000 00000000 00001000
00000000 LIN-USART
ECCR02 2
ESCR02 [R/W]
000054H [R/W, R, W] Reserved
00000X00
-00000XX
000058H,
Reserved Reserved
00005CH
(Continued)
44 DS07-16612-2E
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
RDR04/TDR04
SCR04 [R/W, W] SMR04 [R/W, W] SSR04 [R/W, R]
000060H [R/W]
00000000 00000000 00001000 LIN-USART
00000000
4
ECCR04 with FIFO
ESCR04 [R/W] FSR04 [R] FCR04 [R/W]
000064H [R/W, R, W]
00000X00 - - - 00000 0001 - 000
-00000XX
RDR05/TDR05
SCR05 [R/W, W] SMR05 [R/W, W] SSR05 [R/W, R]
000068H [R/W]
00000000 00000000 00001000 LIN-USART
00000000
5
ECCR05 with FIFO
ESCR05 [R/W] FSR05 [R] FCR05 [R/W]
00006CH [R/W, R, W]
00000X00 - - - 00000 0001 - 000
-00000XX
RDR06/TDR06
SCR06 [R/W, W] SMR06 [R/W, W] SSR06 [R/W, R]
000070H [R/W]
00000000 00000000 00001000 LIN-USART
00000000
6
ECCR06 with FIFO
ESCR06 [R/W] FSR06 [R] FCR06 [R/W]
000074H [R/W, R, W]
00000X00 - - - 00000 0001 - 000
-00000XX
RDR07/TDR07
SCR07 [R/W, W] SMR07 [R/W, W] SSR07 [R/W, R]
000078H [R/W]
00000000 00000000 00001000 LIN-USART
00000000
7
ECCR07 with FIFO
ESCR07 [R/W] FSR07 [R] FCR07 [R/W]
00007CH [R/W, R, W]
00000X00 - - - 00000 0001 - 000
-00000XX
000080H Reserved Reserved
BGR102 [R/W] BGR002 [R/W]
000084H Reserved
00000000 00000000 Baud rate
BGR104 [R/W] BGR004 [R/W] BGR105 [R/W] BGR005 [R/W] Generator
000088H
00000000 00000000 00000000 00000000 LIN-USART
2,4 to 7
BGR106 [R/W] BGR006 [R/W] BGR107 [R/W] BGR007 [R/W]
00008CH
00000000 00000000 00000000 00000000
PWC20 [R/W] PWC10 [R/W]
000090H
- - - - - - XX XXXXXXXX - - - - - - XX XXXXXXXX
Stepper Motor 0
PWS20 [R/W] PWS10 [R/W]
000094H Reserved
-0000000 - -000000
PWC21 [R/W] PWC11 [R/W]
000098H
- - - - - - XX XXXXXXXX - - - - - - XX XXXXXXXX
Stepper Motor 1
PWS21 [R/W] PWS11 [R/W]
00009CH Reserved
-0000000 - -000000
(Continued)
DS07-16612-2E 45
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
PWC22 [R/W] PWC12 [R/W]
0000A0H
- - - - - - XX XXXXXXXX - - - - - - XX XXXXXXXX
Stepper Motor 2
PWS22 [R/W] PWS12 [R/W]
0000A4H Reserved
-0000000 - -000000
PWC23 [R/W] PWC13 [R/W]
0000A8H
- - - - - - XX XXXXXXXX - - - - - - XX XXXXXXXX
Stepper Motor 3
PWS23 [R/W] PWS13 [R/W]
0000ACH Reserved
-0000000 - -000000
PWC24 [R/W] PWC14 [R/W]
0000B0H
- - - - - - XX XXXXXXXX - - - - - - XX XXXXXXXX
Stepper Motor 4
PWS24 [R/W] PWS14 [R/W]
0000B4H Reserved
-0000000 - -000000
PWC25 [R/W] PWC15 [R/W]
0000B8H
- - - - - - XX XXXXXXXX - - - - - - XX XXXXXXXX
Stepper Motor 5
PWS25 [R/W] PWS15 [R/W]
0000BCH Reserved
-0000000 - -000000
PWC0 [R/W] PWC1 [R/W]
0000C0H Reserved Reserved
-00000-- -00000--
PWC2 [R/W] PWC3 [R/W] Stepper Motor Control
0000C4H Reserved Reserved
-00000-- -00000-- 0 to 5
PWC4 [R/W] PWC5 [R/W]
0000C8H Reserved Reserved
-00000-- -00000--
0000CCH Reserved Reserved
IBCR0 [R/W] IBSR0 [R] ITBAH0 [R/W] ITBAL0 [R/W]
0000D0H
00000000 00000000 - - - - - - 00 00000000
ITMKH0 [R/W] ITMKL0 [R/W] ISMK0 [R/W] ISBA0 [R/W]
0000D4H I2C 0
00 - - - - 11 11111111 01111111 - 0000000
IDAR0 [R/W] ICCR0 [R/W]
0000D8H Reserved Reserved
00000000 00011111
0000DCH
to Reserved Reserved
000100H
GCN11 [R/W] GCN21 [R/W] PPG Control
000104H Reserved
00110010 00010000 - - - - 0000 4 to 7
GCN12 [R/W] GCN22 [R/W] PPG Control
000108H Reserved
00110010 00010000 - - - - 0000 8 to 11
000110H
to Reserved Reserved
00012CH
(Continued)
46 DS07-16612-2E
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
PTMR04 [R] PCSR04 [W]
000130H
11111111 11111111 XXXXXXXX XXXXXXXX
PPG 4
PDUT04 [W] PCNH04 [R/W] PCNL04 [R/W]
000134H
XXXXXXXX XXXXXXXX 0000000 - 000000 - 0
PTMR05 [R] PCSR05 [W]
000138H
11111111 11111111 XXXXXXXX XXXXXXXX
PPG 5
PDUT05 [W] PCNH05 [R/W] PCNL05 [R/W]
00013CH
XXXXXXXX XXXXXXXX 0000000 - 000000 - 0
PTMR06 [R] PCSR06 [W]
000140H
11111111 11111111 XXXXXXXX XXXXXXXX
PPG 6
PDUT06 [W] PCNH06 [R/W] PCNL06 [R/W]
000144H
XXXXXXXX XXXXXXXX 0000000 - 000000 - 0
PTMR07 [R] PCSR07 [W]
000148H
11111111 11111111 XXXXXXXX XXXXXXXX
PPG 7
PDUT07 [W] PCNH07 [R/W] PCNL07 [R/W]
00014CH
XXXXXXXX XXXXXXXX 0000000 - 000000 - 0
PTMR08 [R] PCSR08 [W]
000150H
11111111 11111111 XXXXXXXX XXXXXXXX
PPG 8
PDUT08 [W] PCNH08 [R/W] PCNL08 [R/W]
000154H
XXXXXXXX XXXXXXXX 0000000 - 000000 - 0
PTMR09 [R] PCSR09 [W]
000158H
11111111 11111111 XXXXXXXX XXXXXXXX
PPG 9
PDUT09 [W] PCNH09 [R/W] PCNL09 [R/W]
00015CH
XXXXXXXX XXXXXXXX 0000000 - 000000 - 0
PTMR10 [R] PCSR10 [W]
000160H
11111111 11111111 XXXXXXXX XXXXXXXX
PPG 10
PDUT10 [W] PCNH10 [R/W] PCNL10 [R/W]
000164H
XXXXXXXX XXXXXXXX 0000000 - 000000 - 0
PTMR11 [R] PCSR11 [W]
000168H
11111111 11111111 XXXXXXXX XXXXXXXX
PPG 11
PDUT11 [W] PCNH11 [R/W] PCNL11 [R/W]
00016CH
XXXXXXXX XXXXXXXX 0000000 - 000000 - 0
P0TMCSRH P0TMCSRL P1TMCSRH P1TMCSRL
000170H [R/W] [R/W] [R/W] [R/W]
- 0 - 000 - 0 - - - 00000 - 0 - 000 - 0 - - - 00000
P0TMRLR [W] P0TMR [R] PFM
000174H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
P1TMRLR [W] P1TMR [R]
000178H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00017CH Reserved Reserved
(Continued)
DS07-16612-2E 47
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
ICS01 [R/W] ICS23 [R/W]
000180H Reserved Reserved
00000000 00000000
Input
IPCP0 [R] IPCP1 [R]
000184H Capture
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0 to 3
IPCP2 [R] IPCP3 [R]
000188H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
OCS01 [R/W] OCS23 [R/W]
00018CH
- - - 0 - - 00 0000 - - 00 - - - 0 - - 00 0000 - - 00
Output
OCCP0 [R/W] OCCP1 [R/W]
000190H Compare
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0 to 3
OCCP2 [R/W] OCCP3 [R/W]
000194H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
SGCRH [R/W] SGCRL [R/W] SGFR [R/W, R]
000198H
0000 - - 00 - - 0 - - 000 XXXXXXXX XXXXXXXX Sound
SGAR [R/W] SGTR [R/W] SGDR [R/W] Generator
00019CH Reserved
00000000 XXXXXXXX XXXXXXXX
ADERH [R/W] ADERL [R/W]
0001A0H
00000000 00000000 00000000 00000000
ADCS1 [R/W] ADCS0 [R/W] ADCR1 [R] ADCR0 [R] A/D
0001A4
00000000 00000000 000000XX XXXXXXXX Converter
ADCT1 [R/W] ADCT0 [R/W] ADSCH [R/W] ADECH [R/W]
0001A8H
00010000 00101100 - - - 00000 - - - 00000
ACSR0 [R/W]
0001ACH Reserved Reserved Alarm Comparator 0
- 11XXX00
TMRLR0 [W] TMR0 [R]
0001B0H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
TMCSRH0 TMCSRL0 Reload Timer 0
0001B4H Reserved [R/W] [R/W]
- - - 00000 0 - 000000
TMRLR1 [W] TMR1 [R]
0001B8H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
TMCSRH1 TMCSRL1 Reload Timer 1
0001BCH Reserved [R/W] [R/W]
- - - 00000 0 - 000000
TMRLR2 [W] TMR2 [R]
0001C0H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Reload Timer 2
TMCSRH2 TMCSRL2
0001C4H Reserved [R/W] [R/W] (PPG 4, PPG 5)
- - - 00000 0 - 000000
(Continued)
48 DS07-16612-2E
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
TMRLR3 [W] TMR3 [R]
0001C8H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Reload Timer 3
TMCSRH3 TMCSRL3
0001CCH Reserved [R/W] [R/W] (PPG 6, PPG 7)
- - - 00000 0 - 000000
TMRLR4 [W] TMR4 [R]
0001D0H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Reload Timer 4
TMCSRH4 TMCSRL4
0001D4H Reserved [R/W] [R/W] (PPG 8, PPG 9)
- - - 00000 0 - 000000
TMRLR5 [W] TMR5 [R]
0001D8H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Reload Timer 5
TMCSRH5 TMCSRL5
0001DCH Reserved [R/W] [R/W] (PPG 10, PPG 11)
- - - 00000 0 - 000000
TMRLR6 [W] TMR6 [R]
0001E0H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Reload Timer 6
TMCSRH6 TMCSRL6
0001E4H Reserved [R/W] [R/W] (PPG 12, PPG 13)
- - - 00000 0 - 000000
TMRLR7 [W] TMR7 [R]
0001E8H Reload Timer 7
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
TMCSRH7 TMCSRL7 (PPG 14, PPG 15)
0001ECH Reserved [R/W] [R/W] (A/D Converter)
- - - 00000 0 - 000000
Free Running
TCDT0 [R/W] TCCS0 [R/W] Timer 0
0001F0H Reserved
XXXXXXXX XXXXXXXX 00000000
(ICU 0, ICU 1)
Free Running
TCDT1 [R/W] TCCS1 [R/W] Timer 1
0001F4H Reserved
XXXXXXXX XXXXXXXX 00000000
(ICU 2, ICU 3)
Free Running
TCDT2 [R/W] TCCS2 [R/W] Timer 2
0001F8H Reserved
XXXXXXXX XXXXXXXX 00000000
(OCU 0, OCU 1)
Free Running
TCDT3 [R/W] TCCS3 [R/W] Timer 3
0001FCH Reserved
XXXXXXXX XXXXXXXX 00000000
(OCU 2, OCU 3)
(Continued)
DS07-16612-2E 49
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
DMACA0 [R/W]
000200H
00000000 0000XXXX XXXXXXXX XXXXXXXX
DMACB0 [R/W]
000204H
00000000 00000000 XXXXXXXX XXXXXXXX
DMACA1 [R/W]
000208H
00000000 0000XXXX XXXXXXXX XXXXXXXX
DMACB1 [R/W]
00020CH
00000000 00000000 XXXXXXXX XXXXXXXX
DMACA2 [R/W]
000210H
00000000 0000XXXX XXXXXXXX XXXXXXXX
DMACB2 [R/W]
000214H
00000000 00000000 XXXXXXXX XXXXXXXX
DMACA3 [R/W] DMAC
000218H
00000000 0000XXXX XXXXXXXX XXXXXXXX
DMACB3 [R/W]
00021CH
00000000 00000000 XXXXXXXX XXXXXXXX
DMACA4 [R/W]
000220H
00000000 0000XXXX XXXXXXXX XXXXXXXX
DMACB4 [R/W]
000224H
00000000 00000000 XXXXXXXX XXXXXXXX
000228H
to Reserved
00023CH
DMACR [R/W]
000240H Reserved
00 - - 0000
000244H
to Reserved Reserved
0002CCH
ICS045 [R/W] ICS67 [R/W]
0002D0H Reserved Reserved
00000000 00000000
Input
IPCP4 [R] IPCP5 [R]
0002D4H Capture
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
4 to 7
IPCP6 [R] IPCP7 [R]
0002D8H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0002DCH
to Reserved Reserved
0002ECH
Free Running
TCDT4 [R/W] TCCS4 [R/W] Timer 4
0002F0H Reserved
XXXXXXXX XXXXXXXX 00000000
(ICU 4, ICU 5)
(Continued)
50 DS07-16612-2E
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
Free Running
TCDT5 [R/W] TCCS5 [R/W] Timer 5
0002F4H Reserved
XXXXXXXX XXXXXXXX 00000000
(ICU 6, ICU 7)
TCDT6 [R/W] TCCS6 [R/W] Free Running
0002F8H Reserved
XXXXXXXX XXXXXXXX 00000000 Timer 6
TCDT7 [R/W] TCCS7 [R/W] Free Running
0002FCH Reserved
XXXXXXXX XXXXXXXX 00000000 Timer 7
UDRC0 [W] UDCR0 [R]
000300H Reserved Reserved Up/Down
00000000 00000000
Counter
UDCCH0 [R/W] UDCCL0 [R/W] UDCS0 [R/W] 0
000304H Reserved
00000000 00001000 00000000
000308H,
Reserved Reserved
00030CH
UDRC3 [W] UDRC2 [W] UDCR3 [R] UDCR2 [R]
000310H
00000000 00000000 00000000 00000000
Up/Down
UDCCH2 [R/W] UDCCL2 [R/W] UDCS2 [R/W]
000314H Reserved Counter
00000000 00001000 00000000
2 to 3
UDCCH3 [R/W] UDCCL3 [R/W] UDCS3 [R/W]
000318H Reserved
00000000 00001000 00000000
00031CH Reserved Reserved
GCN13 [R/W] GCN23 [R/W] PPG Control
000320H Reserved
00110010 00010000 - - - - 0000 12 to 15
000324H
to Reserved Reserved
00032CH
PTMR12 [R] PCSR12 [W]
000330H
11111111 11111111 XXXXXXXX XXXXXXXX
PPG 12
PDUT12 [W] PCNH12 [R/W] PCNL12 [R/W]
000334H
XXXXXXXX XXXXXXXX 0000000 - 000000 - 0
PTMR13 [R] PCSR13 [W]
000338H
11111111 11111111 XXXXXXXX XXXXXXXX
PPG 13
PDUT13 [W] PCNH13 [R/W] PCNL13 [R/W]
00033CH
XXXXXXXX XXXXXXXX 0000000 - 000000 - 0
PTMR14 [R] PCSR14 [W]
000340H
11111111 11111111 XXXXXXXX XXXXXXXX
PPG 14
PDUT14 [W] PCNH14 [R/W] PCNL14 [R/W]
000344H
XXXXXXXX XXXXXXXX 0000000 - 000000 - 0
(Continued)
DS07-16612-2E 51
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
PTMR15 [R] PCSR15 [W]
000348H
11111111 11111111 XXXXXXXX XXXXXXXX
PPG 15
PDUT15 [W] PCNH15 [R/W] PCNL15 [R/W]
00034CH
XXXXXXXX XXXXXXXX 0000000 - 000000 - 0
000350H
to Reserved Reserved
000364H
IBCR2 [R/W] IBSR2 [R] ITBAH2 [R/W] ITBAL2 [R/W]
000368H
00000000 00000000 - - - - - - 00 00000000
ITMKH2 [R/W] ITMKL2 [R/W] ISMK2 [R/W] ISBA2 [R/W]
00036CH I2C 2
00 - - - - 11 11111111 01111111 - 0000000
IDAR2 [R/W] ICCR2 [R/W]
000370H Reserved Reserved
00000000 00011111
IBCR3 [R/W] IBSR3 [R] ITBAH3 [R/W] ITBAL3 [R/W]
000374H
00000000 00000000 - - - - - - 00 00000000
ITMKH3 [R/W] ITMKL3 [R/W] ISMK3 [R/W] ISBA3 [R/W]
000378H I2C 3
00 - - - - 11 11111111 01111111 - 0000000
IDAR3 [R/W] ICCR3 [R/W]
00037CH Reserved Reserved
00000000 00011111
000380H
to Reserved Reserved
00038CH
ROMS [R]
000390H 11111111 00000000 (MB91F467Dx) Reserved ROM Select Register
11111111 01000011 (MB91F465DA)
000394H
to Reserved Reserved
0003ECH
BSD0 [W]
0003F0H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BSD1 [R/W]
0003F4H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
Bit Search Module
BSDC [W]
0003F8H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BSRR [R]
0003FCH
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
000400H
to Reserved Reserved
00043CH
(Continued)
52 DS07-16612-2E
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
ICR00 [R/W] ICR01 [R/W] ICR02 [R/W] ICR03 [R/W]
000440H
---11111 ---11111 ---11111 ---11111
ICR04 [R/W] ICR05 [R/W] ICR06 [R/W] ICR07 [R/W]
000444H
---11111 ---11111 ---11111 ---11111
ICR08 [R/W] ICR09 [R/W] ICR10 [R/W] ICR11 [R/W]
000448H
---11111 ---11111 ---11111 ---11111
ICR12 [R/W] ICR13 [R/W] ICR14 [R/W] ICR15 [R/W]
00044CH
---11111 ---11111 ---11111 ---11111
ICR16 [R/W] ICR17 [R/W] ICR18 [R/W] ICR19 [R/W]
000450H
---11111 ---11111 ---11111 ---11111
ICR20 [R/W] ICR21 [R/W] ICR22 [R/W] ICR23 [R/W]
000454H
---11111 ---11111 ---11111 ---11111
ICR24 [R/W] ICR25 [R/W] ICR26 [R/W] ICR27 [R/W]
000458H
---11111 ---11111 ---11111 ---11111
ICR28 [R/W] ICR29 [R/W] ICR30 [R/W] ICR31 [R/W]
00045CH
---11111 ---11111 ---11111 ---11111 Interrupt
ICR32 [R/W] ICR33 [R/W] ICR34 [R/W] ICR35 [R/W] Controller
000460H
---11111 ---11111 ---11111 ---11111
ICR36 [R/W] ICR37 [R/W] ICR38 [R/W] ICR39 [R/W]
000464H
---11111 ---11111 ---11111 ---11111
ICR40 [R/W] ICR41 [R/W] ICR42 [R/W] ICR43 [R/W]
000468H
---11111 ---11111 ---11111 ---11111
ICR44 [R/W] ICR45 [R/W] ICR46 [R/W] ICR47 [R/W]
00046CH
---11111 ---11111 ---11111 ---11111
ICR48 [R/W] ICR49 [R/W] ICR50 [R/W] ICR51 [R/W]
000470H
---11111 ---11111 ---11111 ---11111
ICR52 [R/W] ICR53 [R/W] ICR54 [R/W] ICR55 [R/W]
000474H
---11111 ---11111 ---11111 ---11111
ICR56 [R/W] ICR57 [R/W] ICR58 [R/W] ICR59 [R/W]
000478H
---11111 ---11111 ---11111 ---11111
ICR60 [R/W] ICR61 [R/W] ICR62 [R/W] ICR63 [R/W]
00047CH
---11111 ---11111 ---11111 ---11111
RSRR [R/W] STCR [R/W] TBCR [R/W] CTBR [W]
000480H
10000000 00110011 00XXX - 00 XXXXXXXX Clock
CLKR [R/W] WPR [W] DIVR0 [R/W] DIVR1 [R/W] Control
000484H
---- 0000 XXXXXXXX 00000011 00000000
000488H Reserved Reserved
(Continued)
DS07-16612-2E 53
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
PLLDIVM [R/W] PLLDIVN [R/W] PLLDIVG [R/W] PLLMULG [W]
00048CH
- - - - 0000 - - 000000 - - - - 0000 00000000
PLL Interface
PLLCTRL [R/W]
000490H Reserved
- - - - 0000
Main/Sub
OSCC1 [R/W] OSCS1 [R/W] OSCC2 [R/W] OSCS2 [R/W]
000494H Oscillator
- - - - - 010 00001111 - - - - - 010 00001111
Control
PORTEN [R/W] Port Input Enable
000498H Reserved
- - - - - - 00 Control
00049CH Reserved Reserved
WTCER [R/W] WTCR [R/W]
0004A0H Reserved
- - - - - - 00 00000000 000 - 00 - 0
WTBR [R/W] Real Time Clock
0004A4H Reserved
- - - XXXXX XXXXXXXX XXXXXXXX (Watch Timer)
WTHR [R/W] WTMR [R/W] WTSR [R/W]
0004A8H Reserved
- - - 00000 - - 000000 - - 000000
Clock-
CSVTR [R/W] CSVCR [R/W] CSCFG [R/W] CMCFG [R/W]
0004ACH Supervisor / Selector /
- - - 00010 00011100 0X000000 00000000
Monitor
CUCR [R/W] CUTD [R/W]
0004B0H
- - - - - - - - - - - 0 - - 00 10000000 00000000 Calibration of Sub
CUTR1 [R] CUTR2 [R] Clock
0004B4H
- - - - - - - - 00000000 00000000 00000000
CMPR [R/W] CMCR [R/W]
0004B8H Reserved
- - 000010 11111101 - 001 - - 00 Clock
CMT1 [R/W] CMT2 [R/W] Modulator
0004BCH
00000000 1 - - - 0000 - - 000000 - - 000000
CANPRE [R/W] CANCKD [R/W]
0004C0H Reserved CAN Clock Control
0 - - - 0000 - - - - - 000*1
LVSEL [R/W] LVDET [R/W] HWWDE [R/W] HWWD [R/W, W] Low Voltage Detection/
0004C4H
00000111 0000 0 - 00 - - - - - - 00 00011000 Hardware Watchdog
OSCRH [R/W] OSCRL [R/W] WPCRH [R/W] WPCRL [R/W] Main-/Sub-Oscillation
0004C8H
000 - - 001 - - - - - 000 00 - - - 000 - - - - - - 00 Stabilisation Timer
Main- Oscillation
OSCCR [R/W] REGSEL [R/W] REGCTR [R/W] Standby Control
0004CCH Reserved
-------0 - - 000100 - - - 0 - - 00 Main-/Sub regulator
Control
0004D0H
to Reserved Reserved
00063CH
(Continued)
54 DS07-16612-2E
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
ASR0 [R/W] ACR0 [R/W]
000640H
00000000 00000000 1111**00 00100000*2
ASR1 [R/W] ACR1 [R/W]
000644H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
ASR2 [R/W] ACR2 [R/W]
000648H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
ASR3 [R/W] ACR3 [R/W]
00064CH
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
ASR4 [R/W] ACR4 [R/W]
000650H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
ASR5 [R/W] ACR5 [R/W]
000654H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
ASR6 [R/W] ACR6 [R/W]
000658H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
ASR7 [R/W] ACR7 [R/W]
00065CH
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
AWR0 [R/W] AWR1 [R/W]
000660H
01001111 11111011 XXXXXXXX XXXXXXXX
AWR2 [R/W] AWR3 [R/W] External Bus
000664H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
AWR4 [R/W] AWR5 [R/W]
000668H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
AWR6 [R/W] AWR7 [R/W]
00066CH
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
MCRA [R/W] MCRB [R/W]
000670H Reserved
XXXXXXXX XXXXXXXX
000674H Reserved
IORW0 [R/W] IORW1 [R/W] IORW2 [R/W]
000678H Reserved
XXXXXXXX XXXXXXXX XXXXXXXX
00067CH Reserved
CSER [R/W] CHER [R/W] TCR [R/W]
000680H Reserved
00000001 11111111 0000**** *3
RCRH [R/W] RCRL [R/W]
000684H Reserved
00XXXXXX XXXX0XXX
000688H
to Reserved
0007F8H
MODR [W]
0007FCH Reserved Reserved Mode Register
XXXXXXXX
(Continued)
DS07-16612-2E 55
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
000800H
to Reserved Reserved
000CFCH
PDRD00 [R] PDRD01 [R] PDRD02 [R] PDRD03 [R]
000D00H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
PDRD04 [R] PDRD05 [R] PDRD06 [R] PDRD07 [R]
000D04H
- - - - - - XX XXXXXXXX XXXXXXXX XXXXXXXX
PDRD08 [R] PDRD09 [R] PDRD10 [R]
000D08H Reserved
XXXXXXXX XX - - XXXX - XXXXXX -
PDRD13 [R] PDRD14 [R] PDRD15 [R] R-bus
000D0CH Reserved
- - - - - XXX XXXXXXXX - - - - XXXX Port Data
PDRD16 [R] PDRD17 [R] PDRD18 [R] PDRD19 [R] Direct Read
000D10H Register
XXXXXXXX XXXX - - - - - XXX - XXX - XXX - XXX
PDRD20 [R] PDRD22 [R] PDRD23 [R]
000D14H Reserved
- - - - - XXX - - XX - X - X - - XXXXXX
PDRD24 [R] PDRD25 [R] PDRD26 [R] PDRD27 [R]
000D18H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
PDRD29 [R]
000D1CH Reserved Reserved
XXXXXXXX
000D20H
to Reserved Reserved
000D3CH
DDR00 [R/W] DDR01 [R/W] DDR02 [R/W] DDR03 [R/W]
000D40H
00000000 00000000 00000000 00000000
DDR04 [R/W] DDR05 [R/W] DDR06 [R/W] DDR07 [R/W]
000D44H
- - - - - - 00 00000000 00000000 00000000
DDR08 [R/W] DDR09 [R/W] DDR10 [R/W]
000D48H Reserved
00000000 00 - - 0000 - 000000 -
DDR13 [R/W] DDR14 [R/W] DDR15 [R/W]
000D4CH Reserved R-bus
- - - - - 000 00000000 - - - - 0000
Port Direction
DDR16 [R/W] DDR17 [R/W] DDR18 [R/W] DDR19 [R/W] Register
000D50H
00000000 0000 - - - - - 000 - 000 - 000 - 000
DDR20 [R/W] DDR22 [R/W] DDR23 [R/W]
000D54H Reserved
- - - - - 000 - - 00 - 0 - 0 - - 000000
DDR24 [R/W] DDR25 [R/W] DDR26 [R/W] DDR27 [R/W]
000D58H
00000000 00000000 00000000 00000000
DDR29 [R/W]
000D5CH Reserved Reserved
00000000
000D60H
to Reserved Reserved
000D7CH
(Continued)
56 DS07-16612-2E
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
PFR00 [R/W] PFR01 [R/W] PFR02 [R/W] PFR03 [R/W]
000D80H
11111111 11111111 11111111 11111111
PFR04 [R/W] PFR05 [R/W] PFR06 [R/W] PFR07 [R/W]
000D84H
- - - - - - 11 11111111 11111111 11111111
PFR08 [R/W] PFR09 [R/W] PFR10 [R/W]
000D88H Reserved
11111111 11 - - 1111 - 111111 -
PFR13 [R/W] PFR14 [R/W] PFR15 [R/W]
000D8CH Reserved R-bus
- - - - - 000 00000000 - - - - 0000
Port Function
PFR16 [R/W] PFR17 [R/W] PFR18 [R/W] PFR19 [R/W] Register
000D90H
00000000 0000 - - - - - 000 - 000 - 000 - 000
PFR20 [R/W] PFR22 [R/W] PFR23 [R/W]
000D94H Reserved
- - - - - 000 - - 00 - 0 - 0 - - 000000
PFR24 [R/W] PFR25 [R/W] PFR26 [R/W] PFR27 [R/W]
000D98H
00000000 00000000 00000000 00000000
PFR29 [R/W]
000D9CH Reserved Reserved
00000000
000DA0H
to Reserved Reserved
000DBCH
EPFR00 [R/W] EPFR01 [R/W] EPFR02 [R/W] EPFR03 [R/W]
000DC0H
-------- -------- -------- --------
EPFR04 [R/W] EPFR05 [R/W] EPFR06 [R/W] EPFR07 [R/W]
000DC4H
-------- -------- -------- --------
EPFR08 [R/W] EPFR09 [R/W] EPFR10 [R/W]
000DC8H Reserved
-------- -------- - - 00 - - - -
EPFR13 [R/W] EPFR14 [R/W] EPFR15 [R/W]
000DCCH Reserved R-bus Extra
-----0-- 00000000 - - - - 0000
Port Function
EPFR16 [R/W] EPFR17 [R/W] EPFR18 [R/W] EPFR19 [R/W] Register
000DD0H
0000 - - - - -------- - 00 - - 00 - -0---0--
EPFR20 [R/W] EPFR22 [R/W] EPFR23 [R/W]
000DD4H Reserved
- - - - - 00 - -------- --------
EPFR24 [R/W] EPFR25 [R/W] EPFR26 [R/W] EPFR27 [R/W]
000DD8H
-------- -------- 00000000 00000000
EPFR29 [R/W]
000DDCH Reserved Reserved
--------
000DE0H
to Reserved Reserved
000DFCH
(Continued)
DS07-16612-2E 57
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
PODR00 [R/W] PODR01 [R/W] PODR02 [R/W] PODR03 [R/W]
000E00H
00000000 00000000 00000000 00000000
PODR04 [R/W] PODR05 [R/W] PODR06 [R/W] PODR07 [R/W]
000E04H
- - - - - - 00 00000000 00000000 00000000
PODR08 [R/W] PODR09 [R/W] PODR10 [R/W]
000E08H Reserved
00000000 00 - - 0000 - 000000 -
PODR13 [R/W] PODR14 [R/W] PODR15 [R/W]
000E0CH Reserved R-bus Port
- - - - - 000 00000000 - - - - 0000
Output Drive Select
PODR16 [R/W] PODR17 [R/W] PODR18 [R/W] PODR19 [R/W] Register
000E10H
00000000 0000 - - - - - 000 - 000 - 000 - 000
PODR20 [R/W] PODR22 [R/W] PODR23 [R/W]
000E14H Reserved
- - - - - 000 - - 00 - 0 - 0 - - 000000
PODR24 [R/W] PODR25 [R/W] PODR26 [R/W] PODR27 [R/W]
000E18H
00000000 00000000 00000000 00000000
PODR29 [R/W]
000E1CH Reserved Reserved
00000000
000E20H
to Reserved Reserved
000E3CH
PILR00 [R/W] PILR01 [R/W] PILR02 [R/W] PILR03 [R/W]
000E40H
00000000 00000000 00000000 00000000
PILR04 [R/W] PILR05 [R/W] PILR06 [R/W] PILR07 [R/W]
000E44H
- - - - - - 00 00000000 00000000 00000000
PILR08 [R/W] PILR09 [R/W] PILR10 [R/W]
000E48H Reserved
00000000 00 - - 0000 - 000000 -
PILR13 [R/W] PILR14 [R/W] PILR15 [R/W]
000E4CH Reserved R-bus Port
- - - - - 000 00000000 - - - - 0000
Input Level Select
PILR16 [R/W] PILR17 [R/W] PILR18 [R/W] PILR19 [R/W] Register
000E50H
00000000 0000 - - - - - 000 - 000 - 000 - 000
PILR20 [R/W] PILR22 [R/W] PILR23 [R/W]
000E54H Reserved
- - - - - 000 - - 00 - 0 - 0 - - 000000
PILR24 [R/W] PILR25 [R/W] PILR26 [R/W] PILR27 [R/W]
000E58H
00000000 00000000 00000000 00000000
PILR29 [R/W]
000E5CH Reserved Reserved
00000000
000E60H
to Reserved Reserved
000E7CH
(Continued)
58 DS07-16612-2E
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
EPILR00 [R/W] EPILR01 [R/W] EPILR02 [R/W] EPILR03 [R/W]
000E80H
00000000 00000000 00000000 00000000
EPILR04 [R/W] EPILR05 [R/W] EPILR06 [R/W] EPILR07 [R/W]
000E84H
- - - - - - 00 00000000 00000000 00000000
EPILR08 [R/W] EPILR09 [R/W] EPILR10 [R/W]
000E88H Reserved
00000000 00 - - 0000 - 000000 -
EPILR13 [R/W] EPILR14 [R/W] EPILR15 [R/W]
000E8CH Reserved R-bus Extra
- - - - - 000 00000000 - - - - 0000
Port Input Level
EPILR16 [R/W] EPILR17 [R/W] EPILR18 [R/W] EPILR19 [R/W] Select Register
000E90H
00000000 0000 - - - - - 000 - 000 - 000 - 000
EPILR20 [R/W] EPILR22 [R/W] EPILR23 [R/W]
000E94H Reserved
- - - - - 000 - - 00 - 0 - 0 - - 000000
EPILR24 [R/W] EPILR25 [R/W] EPILR26 [R/W] EPILR27 [R/W]
000E98H
00000000 00000000 00000000 00000000
EPILR29 [R/W]
000E9CH Reserved Reserved
00000000
000EA0H
to Reserved Reserved
000EBCH
PPER00 [R/W] PPER01 [R/W] PPER02 [R/W] PPER03 [R/W]
000EC0H
00000000 00000000 00000000 00000000
PPER04 [R/W] PPER05 [R/W] PPER06 [R/W] PPER07 [R/W]
000EC4H
- - - - - - 00 00000000 00000000 00000000
PPER08 [R/W] PPER09 [R/W] PPER10 [R/W]
000EC8H Reserved
00000000 00 - - 0000 - 000000 -
PPER13 [R/W] PPER14 [R/W] PPER15 [R/W]
000ECCH Reserved R-bus Port
- - - - - 000 00000000 - - - - 0000
Pull-Up/Down Enable
PPER16 [R/W] PPER17 [R/W] PPER18 [R/W] PPER19 [R/W] Register
000ED0H
00000000 0000 - - - - - 000 - 000 - 000 - 000
PPER20 [R/W] PPER22 [R/W] PPER23 [R/W]
000ED4H Reserved
- - - - - 000 - - 00 - 0 - 0 - - 000000
PPER24 [R/W] PPER25 [R/W] PPER26 [R/W] PPER27 [R/W]
000ED8H
00000000 00000000 00000000 00000000
PPER29 [R/W]
000EDCH Reserved Reserved
00000000
000EE0H
to Reserved Reserved
000EFCH
(Continued)
DS07-16612-2E 59
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
PPCR00 [R/W] PPCR01 [R/W] PPCR02 [R/W] PPCR03 [R/W]
000F00H
11111111 11111111 11111111 11111111
PPCR04 [R/W] PPCR05 [R/W] PPCR06 [R/W] PPCR07 [R/W]
000F04H
- - - - - - 11 11111111 11111111 11111111
PPCR08 [R/W] PPCR09 [R/W] PPCR10 [R/W]
000F08H Reserved
11111111 11 - - 1111 - 111111 -
PPCR13 [R/W] PPCR14 [R/W] PPCR15 [R/W]
000F0CH Reserved R-bus Port
- - - - - 111 11111111 - - - - 1111
Pull-Up/Down Control
PPCR16 [R/W] PPCR17 [R/W] PPCR18 [R/W] PPCR19 [R/W] Register
000F10H
11111111 1111 - - - - - 111 - 111 - 111 - 111
PPCR20 [R/W] PPCR22 [R/W] PPCR23 [R/W]
000F14H Reserved
- - - - - 111 - - 11 - 1 - 1 - - 111111
PPCR24 [R/W] PPCR25 [R/W] PPCR26 [R/W] PPCR27 [R/W]
000F18H
11111111 11111111 11111111 11111111
PPCR29 [R/W]
000F1CH Reserved Reserved
11111111
000F20H
to Reserved Reserved
000F3CH
DMASA0 [R/W]
001000H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
DMADA0 [R/W]
001004H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
DMASA1 [R/W]
001008H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
DMADA1 [R/W]
00100CH
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
DMASA2 [R/W]
001010H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
DMAC
DMADA2 [R/W]
001014H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
DMASA3 [R/W]
001018H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
DMADA3 [R/W]
00101CH
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
DMASA4 [R/W]
001020H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
DMADA4 [R/W]
001024H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001028H
to Reserved Reserved
001FFCH
(Continued)
60 DS07-16612-2E
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
002000H
MB91F467Dx Flash-cache size is 8 Kbytes : 004000H to 005FFCH Flash-cache /
to
MB91F465DA Flash-cache size is 8 Kbytes : 004000H to 005FFCH I-RAM area
006FFCH
FMCS [R/W] FMCR [R] FCHCR [R/W]
007000H
01101000 - - - 00000 - - - - - - 00 10000011
Flash Memory/
FMWT [R/W] FMWT2 [R] FMPS [R/W] Flash-cache/
007004H
11111111 11111111 - 001 - - - - - - - - - 000 I-RAM Control
FMAC [R] Register
007008H
00000000 00000000 00000000 00000000
FCHA0 [R/W]
00700CH Flash-cache Non-
- - - - - - - - - - - 00000 00000000 00000000
cacheable area setting
FCHA1 [R/W] Register
007010H
- - - - - - - - - - - 00000 00000000 00000000
007014H
to Reserved Reserved
007FFCH
008000H MB91F467Dx Boot-ROM size is 4 Kbytes : 00B000H to 00BFFCH
to MB91F465DA Boot-ROM size is 4 Kbytes : 00B000H to 00BFFCH Boot ROM area
00BFFCH (instruction access is 1 wait cycle, data access is 1 wait cycle)
CTRLR0 [R/W] STATR0 [R/W]
00C000H
00000000 00000001 00000000 00000000
ERRCNT0 [R] BTR0 [R/W]
00C004H CAN 0
00000000 00000000 00100011 00000001
Control
INTR0 [R] TESTR0 [R/W] Register
00C008H
00000000 00000000 00000000 X0000000
BRPE0 [R/W]
00C00CH Reserved
00000000 00000000
IF1CREQ0 [R/W] IF1CMSK0 [R/W]
00C010H
00000000 00000001 00000000 00000000
IF1MSK20 [R/W] IF1MSK10 [R/W]
00C014H
11111111 11111111 11111111 11111111 CAN 0
IF1ARB20 [R/W] IF1ARB10 [R/W] IF 1 Register
00C018H
00000000 00000000 00000000 00000000
IF1MCTR0 [R/W]
00C01CH Reserved
00000000 00000000
(Continued)
DS07-16612-2E 61
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
IF1DTA10 [R/W] IF1DTA20 [R/W]
00C020H
00000000 00000000 00000000 00000000
IF1DTB10 [R/W] IF1DTB20 [R/W]
00C024H
00000000 00000000 00000000 00000000
00C028H,
Reserved
00C02CH CAN 0
IF1DTA20 [R/W] IF1DTA10 [R/W] IF 1 Register
00C030H
00000000 00000000 00000000 00000000
IF1DTB20 [R/W] IF1DTB10 [R/W]
00C034H
00000000 00000000 00000000 00000000
00C038H,
Reserved
00C03CH
IF2CREQ0 [R/W] IF2CMSK0 [R/W]
00C040H
00000000 00000001 00000000 00000000
IF2MSK20 [R/W] IF2MSK10 [R/W]
00C044H
11111111 11111111 11111111 11111111
IF2ARB20 [R/W] IF2ARB10 [R/W]
00C048H
00000000 00000000 00000000 00000000
IF2MCTR0 [R/W]
00C04CH Reserved
00000000 00000000
IF2DTA10 [R/W] IF2DTA20 [R/W]
00C050H
00000000 00000000 00000000 00000000
CAN 0
IF2DTB10 [R/W] IF2DTB20 [R/W] IF 2 Register
00C054H
00000000 00000000 00000000 00000000
00C058H,
Reserved
00C05CH
IF2DTA20 [R/W] IF2DTA10 [R/W]
00C060H
00000000 00000000 00000000 00000000
IF2DTB20 [R/W] IF2DTB10 [R/W]
00C064H
00000000 00000000 00000000 00000000
00C068H
to Reserved
00C07CH
(Continued)
62 DS07-16612-2E
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
TREQR20 [R] TREQR10 [R]
00C080H
00000000 00000000 00000000 00000000
00C084H
to Reserved
00C08CH
NEWDT20 [R] NEWDT10 [R]
00C090H
00000000 00000000 00000000 00000000
00C094H
CAN 0
to Reserved
Status Flags
00C09CH
INTPND20 [R] INTPND10 [R]
00C0A0H
00000000 00000000 00000000 00000000
00C0A4H
to Reserved
00C0ACH
MSGVAL20 [R] MSGVAL10 [R]
00C0B0H
00000000 00000000 00000000 00000000
00C0B4H
to Reserved Reserved
00C0FCH
CTRLR1 [R/W] STATR1 [R/W]
00C100H
00000000 00000001 00000000 00000000
ERRCNT1 [R] BTR1 [R/W]
00C104H CAN 1
00000000 00000000 00100011 00000001
Control
INTR1 [R] TESTR1 [R/W] Register
00C108H
00000000 00000000 00000000 X0000000
BRPE1 [R/W]
00C10CH Reserved
00000000 00000000
IF1CREQ1 [R/W] IF1CMSK1 [R/W]
00C110H
00000000 00000001 00000000 00000000
IF1MSK21 [R/W] IF1MSK11 [R/W]
00C114H
11111111 11111111 11111111 11111111
IF1ARB21 [R/W] IF1ARB11 [R/W]
00C118H
00000000 00000000 00000000 00000000 CAN 1
IF1MCTR1 [R/W] IF 1 Register
00C11CH Reserved
00000000 00000000
IF1DTA11 [R/W] IF1DTA21 [R/W]
00C120H
00000000 00000000 00000000 00000000
IF1DTB11 [R/W] IF1DTB21 [R/W]
00C124H
00000000 00000000 00000000 00000000
(Continued)
DS07-16612-2E 63
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
00C128H,
Reserved
00C12CH
IF1DTA21 [R/W] IF1DTA11 [R/W]
00C130H
00000000 00000000 00000000 00000000 CAN 1
IF1DTB21 [R/W] IF1DTB11 [R/W] IF 1 Register
00C134H
00000000 00000000 00000000 00000000
00C138H,
Reserved
00C13CH
IF2CREQ1 [R/W] IF2CMSK1 [R/W]
00C140H
00000000 00000001 00000000 00000000
IF2MSK21 [R/W] IF2MSK11 [R/W]
00C144H
11111111 11111111 11111111 11111111
IF2ARB21 [R/W] IF2ARB11 [R/W]
00C148H
00000000 00000000 00000000 00000000
IF2MCTR1 [R/W]
00C14CH Reserved
00000000 00000000
IF2DTA11 [R/W] IF2DTA21 [R/W]
00C150H
00000000 00000000 00000000 00000000
CAN 1
IF2DTB11 [R/W] IF2DTB21 [R/W] IF 2 Register
00C154H
00000000 00000000 00000000 00000000
00C158H,
Reserved
00C15CH
IF2DTA21 [R/W] IF2DTA11 [R/W]
00C160H
00000000 00000000 00000000 00000000
IF2DTB21 [R/W] IF2DTB11 [R/W]
00C164H
00000000 00000000 00000000 00000000
00C168H
to Reserved
00C17CH
TREQR21 [R] TREQR11 [R]
00C180H
00000000 00000000 00000000 00000000
00C184H
to Reserved
00C18CH CAN 1
NEWDT21 [R] NEWDT11 [R] Status Flags
00C190H
00000000 00000000 00000000 00000000
00C194H
to Reserved
00C19CH
(Continued)
64 DS07-16612-2E
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
INTPND21 [R] INTPND11 [R]
00C1A0H
00000000 00000000 00000000 00000000
00C1A4H
to Reserved
00C1ACH CAN 1
MSGVAL21 [R] MSGVAL11 [R] Status Flags
00C1B0H
00000000 00000000 00000000 00000000
00C1B4H
to Reserved
00C1FCH
CTRLR2 [R/W] STATR2 [R/W]
00C200H
00000000 00000001 00000000 00000000
ERRCNT2 [R] BTR2 [R/W]
00C204H CAN 2
00000000 00000000 00100011 00000001
Control
INTR2 [R] TESTR2 [R/W] Register
00C208H
00000000 00000000 00000000 X0000000
BRPE2 [R/W]
00C20CH Reserved
00000000 00000000
IF1CREQ2 [R/W] IF1CMSK2 [R/W]
00C210H
00000000 00000001 00000000 00000000
IF1MSK22 [R/W] IF1MSK12 [R/W]
00C214H
11111111 11111111 11111111 11111111
IF1ARB22 [R/W] IF1ARB12 [R/W]
00C218H
00000000 00000000 00000000 00000000
IF1MCTR2 [R/W]
00C21CH Reserved
00000000 00000000
IF1DTA12 [R/W] IF1DTA22 [R/W]
00C220H
00000000 00000000 00000000 00000000 CAN 2
IF1DTB12 [R/W] IF1DTB22 [R/W] IF 1 Register
00C224H
00000000 00000000 00000000 00000000
00C228H,
Reserved
00C22CH
IF1DTA22 [R/W] IF1DTA12 [R/W]
00C230H
00000000 00000000 00000000 00000000
IF1DTB22 [R/W] IF1DTB12 [R/W]
00C234H
00000000 00000000 00000000 00000000
00C238H,
Reserved
00C23CH
(Continued)
DS07-16612-2E 65
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
IF2CREQ2 [R/W] IF2CMSK2 [R/W]
00C240H
00000000 00000001 00000000 00000000
IF2MSK22 [R/W] IF2MSK12 [R/W]
00C244H
11111111 11111111 11111111 11111111
IF2ARB22 [R/W] IF2ARB12 [R/W]
00C248H
00000000 00000000 00000000 00000000
IF2MCTR2 [R/W]
00C24CH Reserved
00000000 00000000
IF2DTA12 [R/W] IF2DTA22 [R/W]
00C250H
00000000 00000000 00000000 00000000
CAN 2
IF2DTB12 [R/W] IF2DTB22 [R/W] IF 2 Register
00C254H
00000000 00000000 00000000 00000000
00C258H,
Reserved
00C25CH
IF2DTA22 [R/W] IF2DTA12 [R/W]
00C260H
00000000 00000000 00000000 00000000
IF2DTB22 [R/W] IF2DTB12 [R/W]
00C264H
00000000 00000000 00000000 00000000
00C268H
to Reserved
00C27CH
TREQR22 [R] TREQR12 [R]
00C280H
00000000 00000000 00000000 00000000
00C284H
to Reserved
00C28CH
NEWDT22 [R] NEWDT12 [R]
00C290H
00000000 00000000 00000000 00000000
00C294H
CAN 2
to Reserved
Status Flags
00C29CH
INTPND22 [R] INTPND12 [R]
00C2A0H
00000000 00000000 00000000 00000000
00C2A4H
to Reserved
00C2ACH
MSGVAL22 [R] MSGVAL12 [R]
00C2B0H
00000000 00000000 00000000 00000000
(Continued)
66 DS07-16612-2E
MB91460D Series
(Continued)
Register
Address Block
+0 +1 +2 +3
00C2B4H
to Reserved Reserved
00EFFCH
BCTRL [R/W]
00F000H
- - - - - - - - - - - - - - - - 11111100 00000000
BSTAT [R/W]
00F004H
- - - - - - - - - - - - - 000 00000000 10 - - 0000
BIAC [R]
00F008H
- - - - - - - - - - - - - - - - 00000000 00000000
BOAC [R]
00F00CH
- - - - - - - - - - - - - - - - 00000000 00000000
BIRQ [R/W]
00F010H
- - - - - - - - - - - - - - - - 00000000 00000000
00F014H EDSU / MPU
to Reserved
00F01CH
BCR0 [R/W]
00F020H
- - - - - - - - 00000000 00000000 00000000
BCR1 [R/W]
00F024H
- - - - - - - - 00000000 00000000 00000000
BCR2 [R/W]
00F028H
- - - - - - - - 00000000 00000000 00000000
BCR3 [R/W]
00F02CH
- - - - - - - - 00000000 00000000 00000000
00F030H
to Reserved Reserved
00F07CH
BAD0 [R/W]
00F080H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BAD1 [R/W]
00F084H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BAD2 [R/W]
00F088H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BAD3 [R/W]
00F08CH EDSU / MPU
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BAD4 [R/W]
00F090H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BAD5 [R/W]
00F094H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BAD6 [R/W]
00F098H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
(Continued)
DS07-16612-2E 67
MB91460D Series
Register
Address Block
+0 +1 +2 +3
BAD7 [R/W]
00F09CH
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BAD8 [R/W]
00F0A0H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BAD9 [R/W]
00F0A4H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BAD10 [R/W]
00F0A8H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BAD11 [R/W]
00F0ACH EDSU / MPU
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BAD12 [R/W]
00F0B0H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BAD13 [R/W]
00F0B4H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BAD14 [R/W]
00F0B8H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
BAD15 [R/W]
00F0BCH
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F0C0H
to Reserved Reserved
01FFFCH
020000H MB91F467Dx D-RAM size is 32 Kbytes : 028000H to 02FFFCH
to MB91F465DA D-RAM size is 32 Kbytes : 028000H to 02FFFCH D-RAM area
02FFFCH (data access is 0 wait cycles)
030000H MB91F467Dx ID-RAM size is 32 Kbytes : 030000H to 037FFCH
to MB91F465DA ID-RAM size is 16 Kbytes : 030000H to 033FFCH ID-RAM area
03FFFCH (instruction access is 0 wait cycles, data access is 1 wait cycle)
*1 : depends on the number of available CAN channels
*2 : ACR0 [11 : 10] depends on bus width setting in Mode vector fetch information
*3 : TCR [3 : 0] INIT value = 0000, keeps value after RST
68 DS07-16612-2E
MB91460D Series
DS07-16612-2E 69
MB91460D Series
Notes: Write operations to address 0FFFF8H and 0FFFFCH are not possible. When reading these addresses, the
values shown above will be read.
70 DS07-16612-2E
MB91460D Series
DS07-16612-2E 71
MB91460D Series
Interrupt
Interrupt level *1 Interrupt vector *2 DMA
number
Interrupt Resource
Deci- Hexa- Setting Register Default Vector number
Offset
mal decimal Register address address
Reload Timer 0 32 20 37CH 000FFF7CH 4, 32
ICR08 448H
Reload Timer 1 33 21 378H 000FFF78H 5, 33
Reload Timer 2 34 22 374H 000FFF74H 34
ICR09 449H
Reload Timer 3 35 23 370H 000FFF70H 35
Reload Timer 4 36 24 36CH 000FFF6CH 36
ICR10 44AH
Reload Timer 5 37 25 368H 000FFF68H 37
Reload Timer 6 38 26 364H 000FFF64H 38
ICR11 44BH
Reload Timer 7 39 27 360H 000FFF60H 39
Free Run Timer 0 40 28 35CH 000FFF5CH 40
ICR12 44CH
Free Run Timer 1 41 29 358H 000FFF58H 41
Free Run Timer 2 42 2A 354H 000FFF54H 42
ICR13 44DH
Free Run Timer 3 43 2B 350H 000FFF50H 43
Free Run Timer 4 44 2C 34CH 000FFF4CH 44
ICR14 44EH
Free Run Timer 5 45 2D 348H 000FFF48H 45
Free Run Timer 6 46 2E 344H 000FFF44H 46
ICR15 44FH
Free Run Timer 7 47 2F 340H 000FFF40H 47
CAN 0 48 30 33CH 000FFF3CH ⎯
ICR16 450H
CAN 1 49 31 338H 000FFF38H ⎯
CAN 2 50 32 334H 000FFF34H ⎯
ICR17 451H
System reserved 51 33 330H 000FFF30H ⎯
System reserved 52 34 32CH 000FFF2CH ⎯
ICR18 452H
System reserved 53 35 328H 000FFF28H ⎯
System reserved 54 36 324H 000FFF24H 6, 48
ICR19 453H
System reserved 55 37 320H 000FFF20H 7, 49
System reserved 56 38 31CH 000FFF1CH 8, 50
ICR20 454H
System reserved 57 39 318H 000FFF18H 9, 51
LIN-USART 2 RX 58 3A 314H 000FFF14H 52
ICR21 455H
LIN-USART 2 TX 59 3B 310H 000FFF10H 53
System reserved 60 3C 30CH 000FFF0CH 54
ICR22 456H
System reserved 61 3D 308H 000FFF08H 55
System reserved 62 3E 304H 000FFF04H ⎯
ICR23 *3 457H
Delayed Interrupt 63 3F 300H 000FFF00H ⎯
(Continued)
72 DS07-16612-2E
MB91460D Series
Interrupt
Interrupt level *1 Interrupt vector *2 DMA
number
Interrupt Resource
Deci- Hexa- Setting Register Default Vector number
Offset
mal decimal Register address address
System reserved *4 64 40 2FCH 000FFEFCH ⎯
(ICR24) (458H)
System reserved *4 65 41 2F8H 000FFEF8H ⎯
LIN-USART (FIFO) 4 RX 66 42 2F4H 000FFEF4H 10, 56
ICR25 459H
LIN-USART (FIFO) 4 TX 67 43 2F0H 000FFEF0H 11, 57
LIN-USART (FIFO) 5 RX 68 44 2ECH 000FFEECH 12, 58
ICR26 45AH
LIN-USART (FIFO) 5 TX 69 45 2E8H 000FFEE8H 13, 59
LIN-USART (FIFO) 6 RX 70 46 2E4H 000FFEE4H 60
ICR27 45BH
LIN-USART (FIFO) 6 TX 71 47 2E0H 000FFEE0H 61
LIN-USART (FIFO) 7 RX 72 48 2DCH 000FFEDCH 62
ICR28 45CH
LIN-USART (FIFO) 7 TX 73 49 2D8H 000FFED8H 63
I2C 0 / I2C 2 74 4A 2D4H 000FFED4H ⎯
ICR29 45DH
2
IC3 75 4B 2D0H 000FFED0H ⎯
System reserved 76 4C 2CCH 000FFECCH 64
ICR30 45EH
System reserved 77 4D 2C8H 000FFEC8H 65
System reserved 78 4E 2C4H 000FFEC4H 66
ICR31 45FH
System reserved 79 4F 2C0H 000FFEC0H 67
System reserved 80 50 2BCH 000FFEBCH 68
ICR32 460H
System reserved 81 51 2B8H 000FFEB8H 69
System reserved 82 52 2B4H 000FFEB4H 70
ICR33 461H
System reserved 83 53 2B0H 000FFEB0H 71
System reserved 84 54 2ACH 000FFEACH 72
ICR34 462H
System reserved 85 55 2A8H 000FFEA8H 73
System reserved 86 56 2A4H 000FFEA4H 74
ICR35 463H
System reserved 87 57 2A0H 000FFEA0H 75
System reserved 88 58 29CH 000FFE9CH 76
ICR36 464H
System reserved 89 59 298H 000FFE98H 77
System reserved 90 5A 294H 000FFE94H 78
ICR37 465H
System reserved 91 5B 290H 000FFE90H 79
Input Capture 0 92 5C 28CH 000FFE8CH 80
ICR38 466H
Input Capture 1 93 5D 288H 000FFE88H 81
Input Capture 2 94 5E 284H 000FFE84H 82
ICR39 467H
Input Capture 3 95 5F 280H 000FFE80H 83
(Continued)
DS07-16612-2E 73
MB91460D Series
Interrupt
Interrupt level *1 Interrupt vector *2 DMA
number
Interrupt Resource
Deci- Hexa- Setting Register Default Vector number
Offset
mal decimal Register address address
Input Capture 4 96 60 27CH 000FFE7CH 84
ICR40 468H
Input Capture 5 97 61 278H 000FFE78H 85
Input Capture 6 98 62 274H 000FFE74H 86
ICR41 469H
Input Capture 7 99 63 270H 000FFE70H 87
Output Compare 0 100 64 26CH 000FFE6CH 88
ICR42 46AH
Output Compare 1 101 65 268H 000FFE68H 89
Output Compare 2 102 66 264H 000FFE64H 90
ICR43 46BH
Output Compare 3 103 67 260H 000FFE60H 91
System reserved 104 68 25CH 000FFE5CH 92
ICR44 46CH
System reserved 105 69 258H 000FFE58H 93
System reserved 106 6A 254H 000FFE54H 94
ICR45 46DH
System reserved 107 6B 250H 000FFE50H 95
Sound Generator 108 6C 24CH 000FFE4CH ⎯
ICR46 46EH
Phase Frequency Modulator 109 6D 248H 000FFE48H ⎯
System reserved 110 6E 244H 000FFE44H ⎯
ICR47 *3 46FH
System reserved 111 6F 240H 000FFE40H ⎯
System reserved 112 70 23CH 000FFE3CH 15, 96
ICR48 470H
System reserved 113 71 238H 000FFE38H 97
System reserved 114 72 234H 000FFE34H 98
ICR49 471H
System reserved 115 73 230H 000FFE30H 99
PPG4 116 74 22CH 000FFE2CH 100
ICR50 472H
PPG5 117 75 228H 000FFE28H 101
PPG6 118 76 224H 000FFE24H 102
ICR51 473H
PPG7 119 77 220H 000FFE20H 103
PPG8 120 78 21CH 000FFE1CH 104
ICR52 474H
PPG9 121 79 218H 000FFE18H 105
PPG10 122 7A 214H 000FFE14H 106
ICR53 475H
PPG11 123 7B 210H 000FFE10H 107
PPG12 124 7C 20CH 000FFE0CH 108
ICR54 476H
PPG13 125 7D 208H 000FFE08H 109
PPG14 126 7E 204H 000FFE04H 110
ICR55 477H
PPG15 127 7F 200H 000FFE00H 111
(Continued)
74 DS07-16612-2E
MB91460D Series
(Continued)
Interrupt
Interrupt level *1 Interrupt vector *2 DMA
number
Interrupt Resource
Deci- Hexa- Setting Register Default Vector number
Offset
mal decimal Register address address
Up/Down Counter 0 128 80 1FCH 000FFDFCH ⎯
ICR56 478H
System reserved 129 81 1F8H 000FFDF8H ⎯
Up/Down Counter 2 130 82 1F4H 000FFDF4H ⎯
ICR57 479H
Up/Down Counter 3 131 83 1F0H 000FFDF0H ⎯
Real Time Clock 132 84 1ECH 000FFDECH ⎯
ICR58 47AH
Calibration Unit 133 85 1E8H 000FFDE8H ⎯
A/D Converter 0 134 86 1E4H 000FFDE4H 14, 112
ICR59 47BH
System reserved 135 87 1E0H 000FFDE0H ⎯
Alarm Comparator 0 136 88 1DCH 000FFDDCH ⎯
ICR60 47CH
System reserved 137 89 1D8H 000FFDD8H ⎯
Low Voltage Detection 138 8A 1D4H 000FFDD4H ⎯
ICR61 47DH
SMC Comparator 0 to 5 139 8B 1D0H 000FFDD0H ⎯
Timebase Overflow 140 8C 1CCH 000FFDCCH ⎯
ICR62 47EH
PLL Clock Gear 141 8D 1C8H 000FFDC8H ⎯
DMA Controller 142 8E 1C4H 000FFDC4H ⎯
ICR63 47FH
Main/Sub OSC stability wait 143 8F 1C0H 000FFDC0H ⎯
Security vector 144 90 ⎯ ⎯ 1BCH 000FFDBCH ⎯
145 91 000FFDB8H
1B8H to
Used by the INT instruction. to to ⎯ ⎯ to ⎯
000H
255 FF 000FFC00H
*1 : The Interrupt Control Registers (ICRs) are located in the interrupt controller and set the interrupt level for each
interrupt request. An ICR is provided for each interrupt request.
*2 : The vector address for each EIT (exception, interrupt or trap) is calculated by adding the listed offset to the
table base register value (TBR) . The TBR specifies the top of the EIT vector table. The addresses listed in the
table are for the default TBR value (000FFC00H) . The TBR is initialized to this value by a reset. The TBR is set
to 000FFC00H after the internal boot ROM is executed.
*3 : ICR23 and ICR47 can be exchanged by setting the REALOS compatibility bit (addr 0C03H : IOS[0])
*4 : Used by REALOS
*5 : Memory Protection Unit (MPU) support
DS07-16612-2E 75
MB91460D Series
■ RECOMMENDED SETTINGS
1. PLL and Clockgear settings
Please note that for MB91F467Dx the core base clock frequencies are valid in the 1.8V operation mode of the
Main regulator and Flash.
4 2 24 16 24 192 96
4 2 23 16 24 184 92
4 2 22 16 24 176 88
4 2 21 16 20 168 84
4 2 20 16 20 160 80
4 2 19 16 20 152 76
4 2 18 16 20 144 72
4 2 17 16 16 136 68
4 2 16 16 16 128 64
4 2 15 16 16 120 60
4 2 14 16 16 112 56
4 2 13 16 12 104 52
4 2 12 16 12 96 48
4 2 11 16 12 88 44
4 4 10 16 24 160 40
4 4 9 16 24 144 36
4 4 8 16 24 128 32
4 4 7 16 24 112 28
4 6 6 16 24 144 24
4 8 5 16 28 160 20
4 10 4 16 32 160 16
4 12 3 16 32 144 12
*1 This setting is not possible at MB91F467Dx
76 DS07-16612-2E
MB91460D Series
DS07-16612-2E 77
MB91460D Series
(Continued)
(Continued)
Modulation Degree Random No CMPR Baseclk Fmin Fmax
Remarks
(k) (N) [hex] [MHz] [MHz] [MHz]
3 3 066D 64 52.5 82
4 3 086C 64 49.9 89.1
5 3 0A6B 64 47.6 97.6
1 3 026F 60 54.9 66.1
1 5 02AE 60 51.9 71
1 7 02ED 60 49.3 76.7
1 9 032C 60 46.9 83.3
1 11 036B 60 44.7 91.3
2 3 046E 60 51.9 71
2 5 04AC 60 46.9 83.3
3 3 066D 60 49.3 76.7
4 3 086C 60 46.9 83.3
5 3 0A6B 60 44.7 91.3
1 3 026F 56 51.4 61.6
1 5 02AE 56 48.6 66.1
1 7 02ED 56 46.1 71.4
1 9 032C 56 43.8 77.6
1 11 036B 56 41.8 84.9
1 13 03AA 56 39.9 93.8
2 3 046E 56 48.6 66.1
2 5 04AC 56 43.8 77.6
2 7 04EA 56 39.9 93.8
3 3 066D 56 46.1 71.4
3 5 06AA 56 39.9 93.8
4 3 086C 56 43.8 77.6
5 3 0A6B 56 41.8 84.9
6 3 0C6A 56 39.9 93.8
1 3 026F 52 47.8 57
1 5 02AE 52 45.2 61.2
1 7 02ED 52 42.9 66.1
1 9 032C 52 40.8 71.8
1 11 036B 52 38.8 78.6
1 13 03AA 52 37.1 86.8
*1
1 15 03E9 52 35.5 96.9
2 3 046E 52 45.2 61.2
(Continued)
78 DS07-16612-2E
MB91460D Series
(Continued)
Modulation Degree Random No CMPR Baseclk Fmin Fmax
Remarks
(k) (N) [hex] [MHz] [MHz] [MHz]
2 5 04AC 52 40.8 71.8
2 7 04EA 52 37.1 86.8
3 3 066D 52 42.9 66.1
3 5 06AA 52 37.1 86.8
4 3 086C 52 40.8 71.8
5 3 0A6B 52 38.8 78.6
6 3 0C6A 52 37.1 86.8
*1
7 3 0E69 52 35.5 96.9
1 3 026F 48 44.2 52.5
1 5 02AE 48 41.8 56.4
1 7 02ED 48 39.6 60.9
1 9 032C 48 37.7 66.1
1 11 036B 48 35.9 72.3
1 13 03AA 48 34.3 79.9
1 15 03E9 48 32.8 89.1
2 3 046E 48 41.8 56.4
2 5 04AC 48 37.7 66.1
2 7 04EA 48 34.3 79.9
3 3 066D 48 39.6 60.9
3 5 06AA 48 34.3 79.9
4 3 086C 48 37.7 66.1
5 3 0A6B 48 35.9 72.3
6 3 0C6A 48 34.3 79.9
7 3 0E69 48 32.8 89.1
1 3 026F 44 40.6 48.1
1 5 02AE 44 38.4 51.6
1 7 02ED 44 36.4 55.7
1 9 032C 44 34.6 60.4
1 11 036B 44 33 66.1
1 13 03AA 44 31.5 73
1 15 03E9 44 30.1 81.4
2 3 046E 44 38.4 51.6
2 5 04AC 44 34.6 60.4
2 7 04EA 44 31.5 73
2 9 0528 44 28.9 92.1
(Continued)
DS07-16612-2E 79
MB91460D Series
(Continued)
Modulation Degree Random No CMPR Baseclk Fmin Fmax
Remarks
(k) (N) [hex] [MHz] [MHz] [MHz]
3 3 066D 44 36.4 55.7
3 5 06AA 44 31.5 73
4 3 086C 44 34.6 60.4
4 5 08A8 44 28.9 92.1
5 3 0A6B 44 33 66.1
6 3 0C6A 44 31.5 73
7 3 0E69 44 30.1 81.4
8 3 1068 44 28.9 92.1
1 3 026F 40 37 43.6
1 5 02AE 40 34.9 46.8
1 7 02ED 40 33.1 50.5
1 9 032C 40 31.5 54.8
1 11 036B 40 30 59.9
1 13 03AA 40 28.7 66.1
1 15 03E9 40 27.4 73.7
2 3 046E 40 34.9 46.8
2 5 04AC 40 31.5 54.8
2 7 04EA 40 28.7 66.1
2 9 0528 40 26.3 83.3
3 3 066D 40 33.1 50.5
3 5 06AA 40 28.7 66.1
3 7 06E7 40 25.3 95.8
4 3 086C 40 31.5 54.8
4 5 08A8 40 26.3 83.3
5 3 0A6B 40 30 59.9
6 3 0C6A 40 28.7 66.1
7 3 0E69 40 27.4 73.7
8 3 1068 40 26.3 83.3
9 3 1267 40 25.3 95.8
1 3 026F 36 33.3 39.2
1 5 02AE 36 31.5 42
1 7 02ED 36 29.9 45.3
1 9 032C 36 28.4 49.2
1 11 036B 36 27.1 53.8
1 13 03AA 36 25.8 59.3
(Continued)
80 DS07-16612-2E
MB91460D Series
(Continued)
Modulation Degree Random No CMPR Baseclk Fmin Fmax
Remarks
(k) (N) [hex] [MHz] [MHz] [MHz]
1 15 03E9 36 24.7 66.1
2 3 046E 36 31.5 42
2 5 04AC 36 28.4 49.2
2 7 04EA 36 25.8 59.3
2 9 0528 36 23.7 74.7
3 3 066D 36 29.9 45.3
3 5 06AA 36 25.8 59.3
3 7 06E7 36 22.8 85.8
4 3 086C 36 28.4 49.2
4 5 08A8 36 23.7 74.7
5 3 0A6B 36 27.1 53.8
6 3 0C6A 36 25.8 59.3
7 3 0E69 36 24.7 66.1
8 3 1068 36 23.7 74.7
9 3 1267 36 22.8 85.8
1 3 026F 32 29.7 34.7
1 5 02AE 32 28 37.3
1 7 02ED 32 26.6 40.2
1 9 032C 32 25.3 43.6
1 11 036B 32 24.1 47.7
1 13 03AA 32 23 52.5
1 15 03E9 32 22 58.6
2 3 046E 32 28 37.3
2 5 04AC 32 25.3 43.6
2 7 04EA 32 23 52.5
2 9 0528 32 21.1 66.1
2 11 0566 32 19.5 89.1
3 3 066D 32 26.6 40.2
3 5 06AA 32 23 52.5
3 7 06E7 32 20.3 75.9
4 3 086C 32 25.3 43.6
4 5 08A8 32 21.1 66.1
5 3 0A6B 32 24.1 47.7
5 5 0AA6 32 19.5 89.1
6 3 0C6A 32 23 52.5
(Continued)
DS07-16612-2E 81
MB91460D Series
(Continued)
Modulation Degree Random No CMPR Baseclk Fmin Fmax
Remarks
(k) (N) [hex] [MHz] [MHz] [MHz]
7 3 0E69 32 22 58.6
8 3 1068 32 21.1 66.1
9 3 1267 32 20.3 75.9
10 3 1466 32 19.5 89.1
82 DS07-16612-2E
MB91460D Series
■ ELECTRICAL CHARACTERISTICS
1. Absolute maximum ratings
Rating
Parameter Symbol Unit Remarks
Min Max
Power supply slew rate ⎯ ⎯ 50 V/ms
Power supply voltage 1* 1 VDD5R − 0.3 + 6.0 V
Power supply voltage 2*1 VDD5 − 0.3 + 6.0 V
Power supply voltage 3*1 HVDD5 − 0.3 + 6.0 V
Power supply voltage 4*1 VDD35 − 0.3 + 6.0 V
VDD5-0.3 VDD5+0.3 V SMC mode
HVDD5 General purpose port
VSS5-0.3 VDD5+0.3 V
mode
At least one pin of the
Relationship of the supply volt- Ports 25 to 29 (SMC,
VDD5-0.3 VDD5+0.3 V
ages ANn) is used as digital
AVCC5 input or output.
All pins of the Ports 25 to
VSS5-0.3 VDD5+0.3 V 29 (SMC, ANn) follow the
condition of VIA
Analog power supply voltage*1 AVCC5 − 0.3 + 6.0 V *2
Analog reference
AVRH5 − 0.3 + 6.0 V *2
power supply voltage*1
Input voltage 1*1 VI1 Vss5 − 0.3 VDD5 + 0.3 V
Input voltage 2*1 VI2 Vss5 − 0.3 VDD35 + 0.3 V External bus
Input voltage 3* 1 VI3 HVss5 − 0.3 HVDD5 + 0.3 V Stepper motor controller
Analog pin input voltage* 1 VIA AVss5 − 0.3 AVcc5 + 0.3 V
Output voltage 1* 1 VO1 Vss5 − 0.3 VDD5 + 0.3 V
Output voltage 2* 1 VO2 Vss5 − 0.3 VDD35 + 0.3 V External bus
Output voltage 3* 1 VO3 HVss5 − 0.3 HVDD5 + 0.3 V Stepper motor controller
Maximum clamp current ICLAMP − 4.0 + 4.0 mA *3
Total maximum clamp current Σ |ICLAMP| ⎯ 20 mA *3
“L” level maximum ⎯ 10 mA
IOL
output current*4 ⎯ 40 mA Stepper motor controller
“L” level average ⎯ 8 mA
IOLAV
output current*5 ⎯ 30 mA Stepper motor controller
“L” level total maximum ⎯ 100 mA
ΣIOL
output current ⎯ 360 mA Stepper motor controller
“L” level total average ⎯ 50 mA
ΣIOLAV
output current*6 ⎯ 230 mA Stepper motor controller
DS07-16612-2E 83
MB91460D Series
Rating
Parameter Symbol Unit Remarks
Min Max
“H” level maximum ⎯ − 10 mA
IOH
output current*4 ⎯ − 40 mA Stepper motor controller
“H” level average ⎯ −4 mA
IOHAV
output current*5 ⎯ − 30 mA Stepper motor controller
“H” level total maximum ⎯ − 100 mA
ΣIOH
output current ⎯ − 360 mA Stepper motor controller
“H” level total average output ⎯ − 25 mA
ΣIOHAV
current*6 ⎯ − 230 mA Stepper motor controller
Power consumption PD ⎯ 1000 mW at TA = 105 °C
Operating temperature TA − 40 + 105 °C
Storage temperature Tstg − 55 + 150 °C
84 DS07-16612-2E
MB91460D Series
Protective diode
VCC
Limiting P-ch
resistor
+B input (0 V to 16 V)
N-ch
*4 : Maximum output current is defined as the value of the peak current flowing through any one of the corresponding
pins.
*5 : Average output current is defined as the value of the average current flowing through any one of the
corresponding pins for a 100 ms period.
*6 : Total average output current is defined as the value of the average current flowing through all of the
corresponding pins for a 100 ms period.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
DS07-16612-2E 85
MB91460D Series
WARNING: The recommended operating conditions are required in order to ensure the normal operation of
the semiconductor device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data sheet. Users considering application outside the listed conditions are advised to contact
their representatives beforehand.
86 DS07-16612-2E
MB91460D Series
VCC18C
VSS5 AVSS5
CS
DS07-16612-2E 87
MB91460D Series
3. DC characteristics
Note: In the following tables, “VDD” means VDD35 for pins of ext. bus or HVDD5 for SMC pins or VDD5 for other pins.
In the following tables, “VSS” means Hvss5 for ground Pins of the stepper motor and VSS5 for the other pins.
(VDD5 = AVCC5 = 3.0 V to 5.5 V, VSS5 = AVSS5 = 0 V, TA = −40 °C to + 105 °C)
Value
Parameter Symbol Pin name Condition Unit Remarks
Min Typ Max
Port inputs if CMOS CMOS
⎯ Hysteresis 0.8/0.2 0.8 × VDD ⎯ VDD + 0.3 V hysteresis
input is selected input
Port inputs if CMOS 0.7 × VDD ⎯ VDD + 0.3 V 4.5 V ≤ VDD ≤ 5.5 V
⎯ Hysteresis 0.7/0.3
input is selected 0.74 × VDD ⎯ VDD + 0.3 V 3 V ≤ VDD < 4.5 V
VIH
AUTOMOTIVE
⎯ Hysteresis input is 0.8 × VDD ⎯ VDD + 0.3 V
selected
Port inputs if TTL
Input “H” ⎯ 2.0 ⎯ VDD + 0.3 V
input is selected
voltage
INITX input pin
VIHR INITX ⎯ 0.8 × VDD ⎯ VDD + 0.3 V (CMOS
Hysteresis)
MD_2 to
VIHM ⎯ VDD − 0.3 ⎯ VDD + 0.3 V Mode input pins
MD_0
External clock in
VIHX0S X0, X0A ⎯ 2.5 ⎯ VDD + 0.3 V
“Oscillation mode”
External clock in
VIHX0F X0 ⎯ 0.8 × VDD ⎯ VDD + 0.3 V “Fast Clock Input
mode”
Port inputs if CMOS
⎯ Hysteresis 0.8/0.2 VSS − 0.3 ⎯ 0.2 × VDD V
input is selected
Port inputs if CMOS
⎯ Hysteresis 0.7/0.3 VSS − 0.3 ⎯ 0.3 × VDD V
input is selected
VIL
Port inputs if VSS − 0.3 ⎯ 0.5 × VDD V 4.5 V ≤ VDD ≤ 5.5 V
AUTOMOTIVE
⎯
Hysteresis input is VSS − 0.3 ⎯ 0.46 × VDD V 3 V ≤ VDD < 4.5 V
Input “L” selected
voltage
Port inputs if TTL
⎯ VSS − 0.3 ⎯ 0.8 V
input is selected
INITX input pin
VILR INITX ⎯ VSS − 0.3 ⎯ 0.2 × VDD V (CMOS
Hysteresis)
MD_2 to
VILM ⎯ VSS − 0.3 ⎯ VSS + 0.3 V Mode input pins
MD_0
External clock in
VILXDS X0, X0A ⎯ VSS − 0.3 ⎯ 0.5 V
“Oscillation mode”
88 DS07-16612-2E
MB91460D Series
DS07-16612-2E 89
MB91460D Series
Pin Value
Parameter Symbol Condition Unit Remarks
name Min Typ Max
3.0V ≤ VDD ≤ 5.5V
VSS5 < VI < VDD −1 ⎯ +1
Input leak- Pnn_m TA=25 °C
IIL μA
age current *3 3.0V ≤ VDD ≤ 5.5V
VSS5 < VI < VDD −3 ⎯ +3
TA=105 °C
3.0V ≤ VDD ≤ 5.5V
Analog in- −1 ⎯ +1 μA
TA=25 °C
4
put leak- IAIN ANn *
3.0V ≤ VDD ≤ 5.5V
age current −3 ⎯ +3 μA
TA=105 °C
Pnn_m 3.0V ≤ VDD ≤ 3.6V 40 100 160
Pull-up
RUP *5 kΩ
resistance 4.5V ≤ VDD ≤ 5.5V 25 50 100
INITX
Pull-down Pnn_m 3.0V ≤ VDD ≤ 3.6V 40 100 180
RDOWN kΩ
resistance *6 4.5V ≤ VDD ≤ 5.5V 25 50 100
All ex-
cept
VDD5,
Input
VDD5R,
capaci- CIN f = 1 MHz - 5 15 pF
VSS5,
tance
AVCC5,
AVSS,
AVRH5
MB91F467Dx:
CLKB: 96 MHz
Code fetch from
ICC VDD5R CLKP: 48 MHz ⎯ 120 150 mA
Flash
CLKT: 48 MHz
CLKCAN: 48 MHz
TA = + 25 °C ⎯ 30 150 μA At stop mode *7
*8
TA = + 105 °C ⎯ 400 2000 μA
TA = + 25 °C ⎯ 100 500 μA RTC :
Power 4 MHz mode *7
ICCH VDD5R TA = + 105 °C ⎯ 500 2400 μA
supply *8
current
TA = + 25 °C ⎯ 50 250 μA RTC :
100 kHz mode *7
MB91- TA = + 105 °C ⎯ 450 2200 μA *8
F467Dx
External low volt-
ILVE VDD5 ⎯ ⎯ 70 150 μA
age detection
Internal low volt-
ILVI VDD5R ⎯ ⎯ 50 100 μA
age detection
Main clock
⎯ ⎯ 250 500 μA
(4 MHz)
IOSC VDD5
Sub clock
⎯ ⎯ 20 40 μA
(32 kHz)
90 DS07-16612-2E
MB91460D Series
Pin Value
Parameter Symbol Condition Unit Remarks
name Min Typ Max
MB91F465DA:
CLKB: 100 MHz
Code fetch from
ICC VDD5R CLKP: 50 MHz - 110 140 mA
Flash
CLKT: 50 MHz
CLKCAN: 50 MHz
TA = + 25 °C - 30 150 μA
At stop mode *7
TA = + 105 °C - 300 2000 μA
Power TA = + 25 °C - 100 500 μA RTC :
ICCH VDD5R
supply TA = + 105 °C - 500 2400 μA 4 MHz mode *7
current
TA = + 25 °C - 50 250 μA RTC :
MB91- TA = + 105 °C - 400 2200 μA 100 kHz mode *7
F465DA External low volt-
ILVE VDD5 - - 70 150 μA
age detection
Internal low volt-
ILVI VDD5R - - 50 100 μA
age detection
Main clock
- - 250 500 μA
(4 MHz)
IOSC VDD5
Sub clock
- - 20 40 μA
(32 kHz)
1. I2C Spec on MB91F467Dx only guaranteed for 4.5 V < VDD5 < 5.5 V.
2. I2C Spec on MB91F467Dx only guaranteed for 4.5 V < VDD5 < 5.5 V.
3. Pnn_m includes all GPIO pins. Analog (AN) channels and PullUp/PullDown are disabled.
4. ANn includes all pins where AN channels are enabled.
5. Pnn_m includes all GPIO pins. The pull up resistors must be enabled by PPER/PPCR setting and
the pins must be in input direction.
6. Pnn_m includes all GPIO pins. The pull down resistors must be enabled by PPER/PPCR setting and
the pins must be in input direction.
7. Main regulator OFF, sub regulator set to 1.2V, Low voltage detection disabled.
8. On MB91F467Dx, the I2C pin consumes typical 200 μA and maximal 400 μA when “L” level is output,
even if there is no load condition. When entering the standby mode while I2C outputs “L”, the above-
mentioned current is added to ICCH. The I2C pins are recommended to use for port input or external
interrupt in standby mode.
DS07-16612-2E 91
MB91460D Series
92 DS07-16612-2E
MB91460D Series
(Continued)
Value
Parameter Symbol Pin name Unit Remarks
Min Typ Max
0.75 ×
AVRH AVRH5 ⎯ AVCC5 V
AVCC5
Reference voltage range
AVCC5 ×
AVRL AVSS5 AVSS5 ⎯ V
0.25
A/D Converter
IA AVCC5 ⎯ 2.5 5 mA
active
Power supply current
A/D Converter
IAH AVCC5 ⎯ ⎯ 5 μA
not operated *1
A/D Converter
IR AVRH5 ⎯ 0.7 1 mA
active
Reference voltage current
A/D Converter
IRH AVRH5 ⎯ ⎯ 5 μA
not operated *2
*1 : Supply current at AVCC5, if A/D converter and ALARM comparator are not operating,
(VDD5 = AVCC5 = AVRH = 5.0 V)
*2 : Input current at AVRH5, if A/D converter is not operating, (VDD5 = AVCC5 = AVRH = 5.0 V)
DS07-16612-2E 93
MB91460D Series
Total error
3FFH
1.5 LSB’
3FEH
Actual conversion
characteristics
3FDH
{1 LSB’ (N - 1) + 0.5 LSB’}
Digital output
004H
VNT
003H (measurement value)
Actual conversion
002H characteristics
Ideal characteristics
001H
0.5 LSB'
AVSS5 AVRH
Analog input
(Continued)
94 DS07-16612-2E
MB91460D Series
(Continued)
3FEH (N+1)H
{1 LSB (N - 1) + VOT} VFST
3FDH (measure- Ideal
ment value)
characteristics
Digital output
Digital output
NH
004H
VNT
(measure-
003H ment value) (N-1)H VFST
(measure-
Actual conversion VNT ment value)
002H characteristics (measure-
Ideal characteristics ment value)
001H (N-2)H Actual conversion
VTO (measurement value) characteristics
DS07-16612-2E 95
MB91460D Series
Alarm compar-
IA5ALMH ⎯ ⎯ 5 μA
ator disabled
ALARM pin in- −1 ⎯ +1 μA TA=25 °C
IALIN
put current −3 ⎯ +3 μA TA=105 °C
ALARM pin in-
put voltage VALIN 0 ⎯ AVCC5 V
range
Alarm upper
AVCC5 × 0.78 AVCC5 × 0.78
limit VIAH AVCC5 × 0.78 V
− 3% + 3%
voltage
Alarm lower
AVCC5 × 0.36 AVCC5 × 0.36
limit VIAL AVCC5 × 0.36 V
− 5% + 5%
voltage
Alarm hystere- ALARM_n
sis VIAHYS 50 ⎯ 250 mV
voltage
Alarm input
RIN 5 ⎯ ⎯ MΩ
resistance
Alarm compar-
tCOMPF ⎯ 0.1 0.2 μs ator enabled in
fast mode *1
Comparison
time Alarm compar-
ator enabled in
tCOMPS ⎯ 1 2 μs
normal mode
*1
96 DS07-16612-2E
MB91460D Series
6.2. MB91F467Dx
(TA = 25oC, Vcc = 5.0V)
Value
Parameter Unit Remarks
Min Typ Max
Erasure programming time not
Sector erase time - 0.5 2.0 s
included
n is the number of Flash sector
Chip erase time - n*0.5 n*2.0 s
of the device
Word (16 or 32-bit width) System overhead time not in-
- 6 100 μs
programming time cluded
Programme/Erase cycle 10 000 cycle
Flash data retention time 20 year *1
*1: This value was converted from the results of evaluating the reliability of the technology (using Arrhenius
equation to convert high temperature measurements into normalized value at 85oC)
DS07-16612-2E 97
MB91460D Series
7. AC characteristics
7.1. Clock timing
(VDD5 = 3.0 V to 5.5 V, Vss5 = AVss5 = 0 V, TA = −40 °C to + 105 °C)
Value
Parameter Symbol Pin name Unit Condition
Min Typ Max
X0 Opposite phase external
3.5 4 16 MHz
X1 supply or crystal
Clock frequency fC
X0A
32 32.768 100 kHz
X1A
tC
X0,
X1, 0.8 VCC
X0A, 0.2 VCC
X1A
PWH PWL
98 DS07-16612-2E
MB91460D Series
tINTL
DS07-16612-2E 99
MB91460D Series
100 DS07-16612-2E
MB91460D Series
tSCYCI
SCKn VOH
VOL VOL
for ESCR:SCES = 0
VOH VOH
SCKn VOL
for ESCR:SCES = 1
tSLOVI tOVSHI
VOH
SOTn VOL
tIVSHI
tSHIXI
VOH VOH
SINn
VOL VOL
tSLSHE tSHSLE
VOH VOH
SCKn VOL VOL VOL
for ESCR:SCES = 0
VOH
SOTn
VOL
tIVSHE
tSHIXE
VOH VOH
SINn
VOL VOL
DS07-16612-2E 101
MB91460D Series
Fast mode:
(VDD5 = 3.5 V to 5.5 V, VSS5 = AVSS5 = 0 V, TA = −40 °C to + 105 °C)
Value
Parameter Symbol Pin name Unit Remark
Min Max
SCL clock frequency fSCL SCLn 0 400 kHz
Hold time (repeated) START
condition. After this period, the first tHD;STA SCLn, SDAn 0.6 ⎯ μs
clock pulse is generated
LOW period of the SCL clock tLOW SCLn 1.3 ⎯ μs
HIGH period of the SCL clock tHIGH SCLn 0.6 ⎯ μs
Setup time for a repeated START
tSU;STA SCLn, SDAn 0.6 ⎯ μs
condition
Data hold time for I2C-bus devices tHD;DAT SCLn, SDAn 0 0.9 μs
Data setup time tSU;DAT SCLn SDAn 100 ⎯ ns
Rise time of both SDA and SCL *1
tr SCLn, SDAn 20 + 0.1Cb 300 ns
signals
Fall time of both SDA and SCL *1
tf SCLn, SDAn 20 + 0.1Cb 300 ns
signals
Setup time for STOP condition tSU;STO SCLn, SDAn 0.6 ⎯ μs
Bus free time between a STOP
tBUF SCLn, SDAn 1.3 ⎯ μs
and START condition
Capacitive load for each bus line Cb SCLn, SDAn ⎯ 400 pF
Pulse width of spike suppressed (1..1.5) ×
tSP SCLn, SDAn 0 ns *2
by input filter tCLKP
*1 On MB91F467Dx only guaranteed for 4.5 V < VDD5 < 5.5 V.
*2 The noise filter will suppress single spikes with a pulse width of 0ns and between (1 to 1.5) cycles
of peripheral clock, depending on the phase relationship between I2C signals (SDA, SCL) and peripheral clock.
102 DS07-16612-2E
DS07-16612-2E
S Sr P S
tr tf
SDA
tBUF
tHD;DAT tSU;STA
tSP
tHD;STA tSU;DAT tHD;STA tSU;ST0
SCL
tLOW tHIGH
tf tr
103
MB91460D Series
MB91460D Series
VIH VIH
CKn
VIL VIL
tTIWH tTIWL
tATGX, tINP
ICUn,
ATGX
104 DS07-16612-2E
MB91460D Series
DS07-16612-2E 105
MB91460D Series
MCLKO
tCLCSL
tCLCSH
CSXn
tCHCSL
delaved CSXn
tCLASH
tCLASL
ASX
tCLAV
ADDRESS
tCLBAH
tCLBAL
BAAX
106 DS07-16612-2E
MB91460D Series
Note: The usage of the external feedback from MCLKO to MCLKI is not recommended.
DS07-16612-2E 107
MB91460D Series
MCLKO
MCLKI
tCLCSL tCLCSH
CSXn
tCLWRH
tCLWRL
WRXn
(as byte enable)
tCHRH
tCHRL
RDX
tDSRH tRHDX
tDSCH tCHDX
DATA IN
108 DS07-16612-2E
MB91460D Series
7.7.3. Synchronous/Asynchronous read access with internal MCLKO --> MCLKI feedback
(VDD35 = 4.5 V to 5.5 V, Vss5 = AVss5 = 0 V, TA = −40 °C to + 105 °C)
Value
Parameter Symbol Pin name Unit
Min Max
TCHRL −5 2 ns
MCLKO ↑ to RDX delay time MCLKO RDX
TCHRH −5 2 ns
RDX
Data valid to RDX ↑ setup time TDSRH 20 ⎯ ns
D31 to D0
RDX ↑ to Data valid hold time
RDX
(internal MCLKO → MCLKI / TRHDX 0 ⎯ ns
D31 to D0
/MCLKI feedback)
MCLKO ↓ to WRXn TCLWRL MCLKO ⎯ 9 ns
(as byte enable) delay time TCLWRH WRXn −1 ⎯ ns
TCLCSL MCLKO ⎯ 9 ns
MCLKO ↓ to CSXn delay time
TCLCSH CSXn ⎯ 8 ns
MCLKO
TCLCSL
TCLCSH
CSXn
TCLWRL TCLWRH
WRXn
(as byte enable)
TCHRH
TCHRL
RDX
TDSRH TRHDX
DATA IN
DS07-16612-2E 109
MB91460D Series
MCLKO
TCLCSL TCLCSH
CSXn
TCLWRL TCLWRH
WRXn
(as byte enable)
TCLWH
TCLWL
WEX
TDSWL TWHDH
DATA OUT
110 DS07-16612-2E
MB91460D Series
MCLKO
TCLCSL TCLCSH
CSXn
TCLWRH
TCLWRL
WRXn
TDSWRL TWRHDH
DATA OUT
DS07-16612-2E 111
MB91460D Series
CSXn
TCLWL
TWHCH
WRXn
(as byte enable)
TWHWRH
TWRLWL
TWLWH
WEX
TDSWL TWHDH
DATA OUT
112 DS07-16612-2E
MB91460D Series
CSXn
TCLWRL TWRHCH
TWRLWRH
WRXn
TDSWRL TWRHDH
DATA OUT
DS07-16612-2E 113
MB91460D Series
MCLKO
TRDYS TRDYH
RDY
114 DS07-16612-2E
MB91460D Series
MCLKO
BRQ
TCLBGL TCLBGH
BGRNTX
TAXBGL TBGHAV
ADDR,RDX,WRX,
WEX,CSXn,ASX,
MCLKE,MCLKI,
BAAX
DS07-16612-2E 115
MB91460D Series
MCLKO
TCLML TCLMH
MCLKE(sleep)
116 DS07-16612-2E
MB91460D Series
DS07-16612-2E 117
MB91460D Series
MCLKO
TCLDAL TCLDAH
DACKX
TCLDEL TCLDEH
DEOP
TCHDAL
delayed DACKX
TCHDEL
delayed DEOP
TDRQS TDRQH
DREQ
TDTXS TDTXH
DEOTX
118 DS07-16612-2E
MB91460D Series
DS07-16612-2E 119
MB91460D Series
MCLKO
TCLCSL
TCLCSH
CSXn
TCHCSL
delayed CSXn
TCLASH
TCLASL
ASX
TCLAV
ADDRESS
TCLBAH
TCLBAL
BAAX
120 DS07-16612-2E
MB91460D Series
Note: The usage of the external feedback from MCLKO to MCLKI is not recommended.
DS07-16612-2E 121
MB91460D Series
MCLKO
MCLKI
TCLCSL TCLCSH
CSXn
TCLWRH
TCLWRL
WRXn
(as byte enable)
TCHRH
TCHRL
RDX
TDSRH TRHDX
TDSCH TCHDX
DATA IN
122 DS07-16612-2E
MB91460D Series
7.8.3. Synchronous/Asynchronous read access with internal MCLKO --> MCLKI feedback
(VDD35 = 3.0 V to 4.5 V, Vss5 = AVss5 = 0 V, TA = −40 °C to + 105 °C)
Value
Parameter Symbol Pin name Unit
Min Max
TCHRL − 12 0 ns
MCLKO ↑ to RDX delay time MCLKO RDX
TCHRH −9 1 ns
RDX
Data valid to RDX ↑ setup time TDSRH 29 ⎯ ns
D31 to D0
RDX ↑ to Data valid hold time
RDX
(internal MCLKO → MCLKI / TRHDX 0 ⎯ ns
D31 to D0
/MCLKI feedback)
MCLKO ↓ to WRXn TCLWRL MCLKO ⎯ 6 ns
(as byte enable) delay time TCLWRH WRXn 0 ⎯ ns
TCLCSL MCLKO ⎯ 6 ns
MCLKO ↓ to CSXn delay time
TCLCSH CSXn ⎯ 7 ns
MCLKO
TCLCSL
TCLCSH
CSXn
TCLWRL TCLWRH
WRXn
(as byte enable)
TCHRH
TCHRL
RDX
TDSRH TRHDX
DATA IN
DS07-16612-2E 123
MB91460D Series
MCLKO
TCLCSL TCLCSH
CSXn
TCLWRL TCLWRH
WRXn
(as byte enable)
TCLWH
TCLWL
WEX
TDSWL TWHDH
DATA OUT
MB91460D Series
MCLKO
TCLCSL TCLCSH
CSXn
TCLWRH
TCLWRL
WRXn
TDSWRL TWRHDH
DATA OUT
DS07-16612-2E 125
MB91460D Series
CSXn
TCLWL
TWHCH
WRXn
(as byte enable)
TWHWRH
TWRLWL
TWLWH
WEX
TDSWL TWHDH
DATA OUT
126 DS07-16612-2E
MB91460D Series
CSXn
TCLWRL TWRHCH
TWRLWRH
WRXn
TDSWRL TWRHDH
DATA OUT
DS07-16612-2E 127
MB91460D Series
MCLKO
TRDYS TRDYH
RDY
128 DS07-16612-2E
MB91460D Series
MCLKO
BRQ
TCLBGL TCLBGH
BGRNTX
TAXBGL TBGHAV
ADDR,RDX,WRX,
WEX,CSXn,ASX,
MCLKE,MCLKI,
BAAX
DS07-16612-2E 129
MB91460D Series
MCLKO
TCLML TCLMH
MCLKE(sleep)
130 DS07-16612-2E
MB91460D Series
DS07-16612-2E 131
MB91460D Series
MCLKO
TCLDAL TCLDAH
DACKX
TCLDEL TCLDEH
DEOP
TCHDAL
delayed DACKX
TCHDEL
delayed DEOP
TDRQS TDRQH
DREQ
TDTXS TDTXH
DEOTX
132 DS07-16612-2E
MB91460D Series
■ ORDERING INFORMATION
Part number Package Remarks
MB91F467DAPFVS-GSE2 not recommended
MB91F467DBPFVS-GSE2 208-pin plastic QFP not recommended
MB91F467DAPVS-GSE2 (FPT-208P-M04) not recommended
MB91F467DBPVS-GSE2 Lead-free package
DS07-16612-2E 133
MB91460D Series
■ PACKAGE DIMENSION
Pa ckage width ×
28.0 × 28.0 mm
package length
We ight 5.71g
208-pin plastic QFP Note 1) * : These dimensions do not include resin protrusion.
(FPT -208P-M04) Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
30.60±0.20(1.205±.008)SQ
* 28.00±0.10(1.102±.004)SQ
+0.03
0.17 –0.08
+.001
156 105 .007 –.003
157 104
0.08(.003)
+0.10
0.40 –0.15
+.004
INDEX 0 ˚ ~8 ˚ .016 –.006
(Stand off)
208 53
"A"
0.50±0.20 0.25(.010)
(.020±.008)
LEAD No . 1 52
0.60±0.15
(.024±.006)
0.50(.020) 0.22±0.05
0.08(.003) M
(.009±.002)
Dimensions in mm (inches).
C 2003-2008 FUJITSU MICROELECTRONICS LIMITED F208020S-c-3-5 Note: The values in parentheses are reference values.
134 DS07-16612-2E
MB91460D Series
■ REVISION HISTORY
DS07-16612-2E 135
MB91460D Series
136 DS07-16612-2E
MB91460D Series
MEMO
DS07-16612-2E 137
MB91460D Series
MEMO
138 DS07-16612-2E
MB91460D Series
MEMO
DS07-16612-2E 139
MB91460D Series
Specifications are subject to change without notice. For further information please contact each office.