EEE316

Microprocessors

LECTURE #2

Asst. Prof. Dr. Volkan 
KILIÇ
 Overview of the PIC18 Family
• An 8-bit µController called PIC is introduced in
1989 by Microchip Technology Corporation
• It includes
– Small Data RAM
– Few bytes of ROM
– One timer
– I/O ports
 PIC 18 Features
• RISC Architecture
• On-chip program ROM
• Data RAM
• Data EEPROM
• Timers
• ADC
• USART
• I/O Ports
 RISC Architecture
• Reduced Instruction Set Computer (RISC)
• Small, highly optimized set of instructions
• Uses a load-store architecture
• Short execution time
• Pipelining
• Many registers
Simplified View of a PIC Microcontroller
Microcontroller
 PIC µController Program ROM
• PIC exists in terms of different speed and the
amount of on-chip RAM/ROM
• Compatibility is restricted as far as the
instructions are concerns.

• Its used to store Program or code

• PIC 18 can support up to 2MB
• Generally, they come with 4KB – 128KB
• Available in flash, OTP, UV-EPROM, and
masked.
UV-EPROM
 PIC18Fxxxx with flash
• Its on chip ROM is flash
• It memory can be erased in second compared to
20 minute needed for UV-EPROM
• Used for product development
 PIC18Cxxxx and Masked PIC
• One Time Programmable (OTP)
– C indicates the OTP RPM
– Used for mass production
– Cheaper
• Masked
– program will be burned into the PIC chip during
the fabrication process
 PIC C data RAM and EEPROM
• Max. 4096 Bytes (4 kB) of data RAM space.
• Data RAM space has two components
– Varied GPR, General Purpose RAM
• For read/write and data manipulation
• Divided into banks of 256 Bytes
– Fixed SFR, Special Function Registers
• Some of PICs have a small amount of EEPROM
– Used for critical data storing
PIC18F45K22
 PIC µController peripherals
• CAN- (Controller Area Network),
• LIN- (Local Interconnect Network),
• USB- (Universal Serial Bus),
• I²C- (Inter-Integrated Circuit),
• SPI- (Serial Peripheral Interface),
• Serial or Ethernet Interface
• ADC - Analog Digital Converter
• USART- Universal Synchronous Asynchronous
Receiver Transmitter
 Assembly Language Programming and
PIC Architecture
• Assembly is a low level programming language for a
computer, or other programming device in which
there is a very strong (generally one-to-one)
correspondence between the language and the
architecture's machine code instructions (WikiPedia).
• Each assembly language is specific to a particular
computer architecture (x86 vs PIC vs AVR).
 The WREG Register

• Registers are for arithmetic and logic operation.

• The WREG (Working Register) Register is one of
the most widely used registers of the PIC
– 8-bit register  any data larger than 8 bits must be
broken into 8-bits chunks before it is processed.
– There is only one .

D7 D6 D5 D4 D3 D2 D1 D0
 MOVLW
• Moves 8-bit data into WREG
– MOVLW k; move literal value k into WREG
– K is an 8-bit value 0-255 decimal or 00-FF in hex
• Example
– MOVLW 25H ; move 25H into WREG (WREG = 25H)
– MOVLW A5H ; move A5H into WREG (WREG = A5H)
 ADDLW
r ADDLW k;
Add literal value k to WREG (k +WREG)
r Example:
r MOVLW 12H
r ADDLW 16H 0 0 0 1 0 0 1 0
0 0 1 0 1 0 0 0
PIC WREG and ALU Using Literal Value
 The WREG Register
• When programming the WREG of PIC , the
following points should be noted:
– Values can be loaded directly into the WREG.
– If values 0 to F are moved into an 8-bit register
such as WREG, the rest of the bits are assumed
to be all zeros.
– Moving a value larger than 255 (FF in hex) into the
WREG register will truncate the upper byte and
cause a warning in the .err file.
 The WREG Register
• MOVLW 7F2H; Illegal , becomes F2H
• MOVLW 456H ; Illegal, becomes 56H
• MOVLW 60A5H; Illegal, becomes A5H
 The PIC File Register (data RAM)
• Read/Write memory used by CPU
• Used for data storage, and registers for internal
use and function
• As with WREG, arithmetic and logic operations
can be performed on file register data RAM
• 8-bit width
PIC File
Register

General Purpose Special Function

RAM Registers

GP RAM EEPROM
 Register File Concept
Data Memory
(Register File)
 Register File
Concept: All of data
w f 07h memory is part of
ALU 08h the register file, so
09h
any location in data
memory may be
0Ah

Data Bus
0Bh
d
0Ch
directly operated
w f
0Dh on.
0Eh
 All peripherals are
0Fh
mapped into data
10h
WREG memory as a series
of registers
 Orthogonal
Decoded Instruction Instruction Set:
Opcode d a Address
from Program Memory: ALL instructions
can operate on ANY
Arithmetic/Logic Function to Address of Second Source
be Performed Result Operand data memory
Destination
location
 Special Function Registers
• Dedicated to specific functions such as:
– ALU status, timers, serial communication, I/O ports,
ADC,…
• The function of each SFR is fixed by the CPU
designer at the time of design
– it is used for control of the microcontroller or peripheral
• 8-bit registers
• Their size varies from one chip to another.
 General Purpose RAM
• Group of RAM locations (8-bit registers)
• Larger than SFR
– Difficult to manage them by using Assembly language
– Easier to handle them by C Compiler.
• The microchip website provides the data RAM size,
which is the same as GPR size.
Figure 2-2. File Registers of PIC12, PIC16, and PIC18
File Registers
for PIC18F45K22
 GP RAM vs. EEPROM in PIC chips
• GPRs are used by the CPU for internal data storage.
• EEPROM are considered as add-on memory that
one can add externally to the chip.
• So PIC chip may have zero byte of EEPROM data
memory, but impossible for a PIC have zero size for
the file register.
File Register and access bank in the PIC18
• The PIC18 Family can have a max. of 4096 Bytes.
• The File Register
– has addresses of 000- FFFH
– divided into 256-byte banks
– Max. 16 banks (How?)
• At least there is one bank
– Known as default access bank.
– The access bank is divided into 2 sections of 128 bytes,
00H – 7FH GPR, F80H – FFFH SFR (accessed directly)
• Bank switching is a method used to access all the
banks.
SFRs of the PIC18 Family.
 Using instruction with the default access bank

• We need instruction to access other locations in

the file register for ALU and other operations.
– MOVWF
– COMF
– DECF
– MOVF
– MOVFF
 MOVWF instruction
• F indicates for a file register
MOVWF Address
• Used to copy the source register, WREG, to a
destination in the file register.
– A location in the SFR
– A location in GP RAM

WREG
 Example 2-1
• MOVLW 99H
WREG
• MOVWF 12H
99 Address Data
• MOVLW 85H 012H  
013H  
• MOVWF 13H 85 014H  
• MOVLW 3FH
015H  
• MOVWF 14H
• MOVLW 63H
3F 016H  

• MOVWF 15H Address Data

012H  99
• MOVLW 12H 63 013H  85
• MOVWF 16H
014H  3F
12 015H  63
016H  12
 Note

• We cannot move literal values directly

into the general purpose RAM location
in the PIC18.
• They must be moved there via WREG.
 ADDWF
• Adds together the content of WREG and a file
register location
ADDWF fileReg, D
• The result will be placed in either the WREG or in the
file register location
– D indicates the destination bit
• If D=0 or (D=w)
– The result will be placed in the WREG
• If D=1 or (D=f)
– The result will be placed in the file register
 Example 2-2
• State the content of file register location and WREG
after the following program
MOVLW 0
MOVWF 12H
Address
Address Data
Data
MOVLW 22H 0 Address
012H
Data
012H  22
012H  88
 66
44
 0
ADDWF 12H, F 013H
013H    
013H
22 014H
014H    
014H
ADDWF 12H, F
015H
015H    
015H
ADDWF 12H, F 016H
016H    
016H
ADDWF 12H, F
 Example 2-3
• State the content of file register location and WREG
after the following program
MOVLW 0
MOVWF 12H
Address Data
MOVLW 22H 0
012H  22 0
ADDWF 12H, F 013H  
22 014H  
ADDWF 12H, W
015H  
ADDWF 12H, W 44 016H  
ADDWF 12H, W
66
88
WREG, fileReg, and ALU in PIC18
 COMF instruction
COMF fileReg, D
• It tells the CPU to complement the content of
fileReg and places the results in WREG or in
fileReg.
 Example 2-4
• Write a simple program to toggle the SFR of Port B
continuously forever.
Solution
MOVLW 55H
55 Address Data
MOVWF PORTB F81H AAH 55H
B1 COMF PORTB, F F82H  
F83H  
GOTO B1
 DECF instruction
DECF fileReg, D
• It tells the CPU to decrement the content of fileReg
and places the results in WREG or in fileReg.
• Example:
– MOVLW 3
– MOVWF 12H 3 Address Data
012H  0  2
 3
 1
– DECF 12H, F
013H  
– DECF 12H, F 014H  
– DECF 12H, F 015H  
016H  
 DECF instruction
DECF fileReg, D
• It tells the CPU to decrement the content of fileReg
and places the results in WREG or in fileReg.
• Example:
– MOVLW 3
Address Data
– MOVWF 12H 3
012H  3
– DECF 12H, W
– DECF 12H, W 2 013H  
014H  
– DECF 12H, W 2 015H  
016H  
2
 MOVF instruction
MOVF fileReg, D
• It is intended to perform MOVFW
• If D=0
– Copies the content of fileReg (from I/O pin) to
WREG
• If D=1
– The content of the fileReg is copied to itself.
 MOVF instruction
• MOVF fileReg, 0

WREG
 Example 2-5
• Write a simple program to get data from the SFRs of
Port B and send it the SFRs of PORT C continuously.
Solution
AGAIN MOVF PORTB, W
MOVWF PORTC Address Data
F81H  XX
GOTO AGAIN F82H  XX 
F83H  
XX
 Example 2-6
• Write a simple program to get data from the SFRs of
Port B Add the value 5 to it and send it the SFRs of
PORT C
• Solution
MOVF PORTB,W Address Data
55
5A F81H  55H
55H
ADDLW 05H F82H   5AH
MOVWF PORTC F83H  
 MOVFF instruction
• It copies data from one location in FileReg to another
location in FileReg.
MOVFF SourceFileReg, destinationFileReg
 Example 2-7
• Write a simple program to get data from the SFRs of
Port B and send it the SFRs of PORT C continuously.
Solution
AGAIN MOVFF PORTB, PORTC
Address Data
GOTO AGAIN F81H XX  XX
F82H  XX 
F83H  
XX
 PIC Status Register
• To indicate arithmetic conditions
• It is a 8-bit register
– Five bits are used
– D0: C Carry Flag
– D1: DC Digital Carry Flag
– D2: Z Zero Flag
– D3: OV Overflow Flag
– D4: N Negative Flag
 Example 2-8
• Show the status of the C, DC, Z flags after the
following addition instruction
MOVLW 38H
ADDLW 2FH
• Solution
– 38H + 2FH = 67H  WREG=67H
C=0
DC=1
Z=0
 Example 2-9
• Show the status of the C, DC, Z flags after the
following addition instruction
MOVLW 9CH
ADDLW 64H
• Solution
– 9CH + 64H = 100H  WREG= 00H
C=1
DC=1
Z=1
Flag Bits and Decision Making
PIC (compiler) Data Format and Directives
• There is one data type
– 8 bits
– It is the job of the programmer to break down data larger 8
bits
• Data type can be positive or negative
• Data format are
– Hex (default in PIC) 12 or 0x12 or H'12' or 12H
– Binary B'00010010'
– Decimal .12 or D'12'
– ASCII A'c' or a'c'
 Assembler (Compiler) Directives
• The Instruction to tell the CPU what to do, while Directives
give direction to assembler
• Directives : EQU, SET, ORG (Origin), END, LIST
• EQU (equate)
– It is used to define a constant value of a fixed address.
– It associates a constant number with a data or an address label
so that when the label appears in the program, its constant will be
substituted for the label.
 Assembler Directives
• SET
– Used to define a constant value or a fixed, it’s the
identical to EQU, but the SET may be reassigned
later.
• ORG (origin)
– Used to indicate the beginning of the address.
• END
– Tells assembler this is the end of the source
(asm)file.
 Assembler Directives
• LIST
– To indicate to the assembler the specific PIC chip
for which the program should be assembled.
– LIST P=18F45K22
– #include(to include libraries associated)
Rules for labels in Assembly Language
• Unique name
• Alphabetic letters
– Upper, lower, digits (0-9),special char. (? . @_ $)
• The first letter must be Alphabetic letters
• Not a reserved word
Quiz
Introduction to PIC Assembly Language
• Assembly Language provide
– Mnemonic: codes and abbreviations that are easy to
remember
– Faster programming and less prone error
– Programmer must know all Reg. …etc.
• Assembler (compiler) is used to translate the
assembly code into machine code (object code)
 Assembly Language Instruction
• Consists of four fields:
– Label
– Mnemonic
– Operands
– Comments
[label] mnemonic [operands] [;comments]

• Label: refer to line by code (certain length)

• Mnemonic and operands are task that should be
executed.
Sample of Assembly Language Program
SUM EQU 10H ;RAM loc 10H for SUM
ORG 0H ;start at address 0
MOVLW 25H ;WREG = 25
ADDLW 0x34 ;add 34H to WREG=59H
ADDLW 11H ;add 11H to WREG=6AH
ADDLW D’18‘ ;W = W+12H=7CH
ADDLW 1CH ;W = W+1CH=98H
ADDLW b’00000110’ ;W = W+6H=9EH
MOVWF SUM ;save the result in SUM location
HERE GOTO HERE ;stay here forever
END ; end of asm source file
Assembling and Linking A PIC Program

Figure 2-8.
Steps to
Create a
Program
 Files used and created
• .hex  PIC ROM (loadable object)
• .mcp :MPLAB Project mcp
• .mcw: MPLAB Workspace
• .cod Code Listing
• .lst Program listing (machine code with assembly
comments)
• .map a file containing memory layout of used and
unused locations
• .o immediate object
• .err Debug information
List File
 The Program Counter in the PIC
• Program Counter (PC) is used by the CPU to point to the
address of the next instruction to be executed
• The wider the program counter, more the memory
locations can be accessed
– PIC16 has 14 bits (8K)
– PIC18 has 21 bits (2M)
– 8051 has 16 bits (64K)
 Program ROM Space in the PIC

• Find the ROM Memory Address of each of the

following PIC chips:
a) PIC18F2220 with 4 KB
b) PIC18F2410 with 16 KB
c) PIC18F458 with 32 KB
 Powering UP

• When PIC is powered up

(VCC applied to Reset Pin
(#1) – Chapter 8), the micro-
controller begins executing
instruction at location 00000h
(Reset Vector).
• The PC has the value 0000
• Use ORG statement for this
instruction in your code (if
programming in assembly). C
compiler takes care of
creating assembly code
having this.
PIC18F45K22 Pin diagram
Placing Code in program ROM
Program Memory

All instructions are 2Byte

except the GOTO,
which is 4-Byte
 Program ROM Width for the PIC18

• Byte addressable: each location holds only one byte

– CPU with 8-Bit will fetch one byte a time
• Data bus between CPU and ROM can be similar to
traffic lanes on the highway
• For PIC18, the internal data bus between the code
ROM and the CPU is 16bit.
– To increase the processing power
– To match the PIC18 instruction  single cycle
Figure 2-12. Program ROM Width for the PIC18
PIC18 Program ROM Contents for Program 2-1 List
File
 Instruction size of the PIC18
• PIC Instructions are 2-Byte or 4-Byte
• The first seven or eight bits represents the op-code
• Most of PIC18 instructions are 2-Byte
– MOVLW 0000 1110 kkkk kkkk (0E XX)
– ADDLW 0000 1111 kkkk kkkk (0F XX)
– MOVWF 0110 111a ffff ffff (6E XX or 6F XX)
• A specifies the default access bank if it is 0 and if a = 1 we
have to use bank switching
 Instruction size of the PIC18
• 4-Byte instructions include
– MOVFF (move data within RAM, which is 4k)
• 1100 ssss ssss ssss (0 ≤ fs ≤ FFF)
• 1111 dddd dddd dddd (0≤ fd ≤ FFF)
– GOTO (the code address bus width is 21, which is
2M)
• 1110 1111 k7kkk kkkk0
• 1111 k19kkk kkkk kkkk8
 RISC Architecture in the PIC
• To increase the processing power of the CPU
1. Increase the clock frequency of the chip
2. Use Harvard architecture
3. Change the internal architecture of the CPU and
use what is called RISC architecture
 RISC Architecture in the PIC

• RISC • CISC
• Simple and Small • Complex and large
instruction set instruction set
• Regular and fixed • Irregular instruction format
instruction format • Complex address modes
• Simple address modes • May also pipeline
• Pipelined instruction instruction execution
execution --> 95%
executed in one cycle
 RISC Architecture in the PIC

• RISC • CISC
• Provide large number of • Provide smaller number of
CPU registers CPU registers
• Separated data and • Combined data and
program memory program memory
• Most operations are • Most operations can be
register to register register to memory
• Take shorter time to • Take longer time to design
design and debug and debug