Introduction to Microcontroller

Architectures
Nithin S.
EEE Dept.
Microprocessor vs. Microcontroller
• Microprocessor (P) - Processing unit on a chip.
• Microcontroller (C) - Microprocessor alongside
its peripherals on a chip.
• Peripherals
– Memory
• RAM
• ROM
– Timers
– Communication modules
– ADC( Analog to digital converter)
– I/O ports
 p vs. c

RAM
Peripherals

ROM

I/O

c
p
 Architectures
• Von – Neumann architecture
Single memory shared by data and program

* Processing time is more

 Contd…
• Harvard architecture
– Separate memory for data and program
 Classification of Architecture
• CISC- Complex instruction set computer
• RISC- Reduced instruction set computer

Complex - eg. MUL, DIV etc.

Reduced - few number of basic instructions
eg. ADD, SUB etc.
 Contd…

RISC CISC
Compiler design is complex Compiler is simple
Instructions take almost same Varying clock cycles
number of clock cycles
Pipeline is easy Pipeline is difficult
Less addressing modes More addressing modes

Addressing mode: how data is made available to the processor for operation
 PIC16F877a features
• Manufactured by Microchip
• 8 bit microcontroller
• 28/40/44 pin packages
• 35 instructions
• Single cycle instructions, except branching (2
cycles).
• 14 bit opcode
• 8K X 14 Program memory
• 368 x 8 Data memory (usable)
• 256 X 8 EEPROM data memory.
 Addressing modes of PIC16f877a
Direct Addressing: Address of the data is
provided in the instruction/opcode itself.
– Eg. MOVWF , address
– Move the content of Work Register to the file
register whose address is given in the instruction.
– Eg. MOVWF 0xF7
– Here 0X represents that it is a hexadecimal
number, and F7 is the address of a particular
register.
 Contd…
Immediate Addressing: The data to be
operated is given in the instruction/opcode.
– Eg. MOVLW 0xF7
– Move literal value( direct value given as) 0xF7 to
the Work register.
– Here F7 is the value to be moved to W-Reg
 Contd…
Indirect Addressing: the data is provided in an
indirect fashion.
• Similar to pointers in C language.
• Eg. Address in FSR register &
– Data is automatically fetched and made available
in INDF register.

– FSR (File select Register)

PIC16F877a Architecture
 13 Program
Program Counter Data
Memory Bus 8
13 RAM file
Register
8 level stack
14
9

Direct Addressing, MOVWF 7 Address MUX

Instruction
Register 8
Indirect
FSR
STATUS Register
Register
Immediate- MOVLW

3 ADDWF
Instruction
Decoder MUX

ALU
8 8
Timing and
Control Work
Register Peripherals
 Discussions
Program memory 8K x 14 …. ?
14 bit opcode and 8K address locations
2^13 = 8192= 8K
To represent 8K you need 13 bits of address.

Stack stores address of instructions which is 13

bit wide.
 Data Memory
RAM is divided into 4 BANKS
Each bank 128 bytes
Bank Address

Bank 0 0x00 to 0x7F

Bank 1 0x80 to 0xFF
Bank 2 0x100 to 0x17F
Bank 3 0x180 to 0x1FF
 Contd…
7 bits used for addressing ( 128 locations)
2 bits used for selecting Bank ( 4 banks)

Total of 9 bits are needed.

 STATUS Register

C- Carry Flag

If the previous operation generated a Carry, C=1 else C=0

DC- Digit Carry

if a Carry was generated in the lower nibble and it propagated to

the upper nibble DC=1, else DC=0

Z- Zero flag

if the previous operation resulted a Zero, Z=1, else Z=0

 STATUS contd…
• RP1 , RP0- To select data memory banks.

RP1 RP0 Bank selected

0 0 Bank 0
0 1 Bank 1
1 0 Bank 2
1 1 Bank 3

• IRP- Used to select memory bank in indirect

addressing.
 Contd…
• FSR register - 8 bits
– Only 7 bits needed for address.
– MSB bit is used as first bit for bank selection.
– IRP bit is used as second bit for bank selection.
FSR register

7th bit

7 bit address
 Contd…

IRP ( STATUS) 7th bit (FSR) Bank Selected

0 0 Bank 0
0 1 Bank 1
1 0 Bank 2
1 1 Bank 3
Contd…
 Data Memory contd…
368 x 8 Data memory (usable)
Bank0, Bank1, Bank2, Bank3 – 128 bytes each
- 512 bytes

Out of 512, only 368 is usable/available for user.

Few registers are not at all used and remaining
are Special Function Registers (SFR)
 Special Function Register
• SFR – is a file register used for special purpose
- to configure peripherals.
- to configure different modes of operation.
 Program Memory

8K X 14

2K

2K

2K

2K
 Contd…
 Reset Vector - 0000h
– The reset location of program memory
– After power up / reset
– Execution starts from Reset vector

 Interrupt Vector – 0004h

- Location to write instructions for Interrupt Service
Routine
 Interrupt
o A task which is to be executed.
o Task will be triggered by a signal called
interrupt.
o Interrupt could be internal or external.
• Similar example alt + ctrl + del
– Opens the task manager , even if computer is not
responding.
• Power button on a mobile phone.(long press)
 Process of Interrupt
Step1: Interrupt is detected.
Step2: Processor stops the execution of current
task
Step3: Take up the new activity (ISR)
Step4: Finish the ISR
Step5: Return to the previous task