Professional Documents
Culture Documents
REVISION RECORD
D D
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 1OF 22
6 5 4 3 2 1
REVISION RECORD
D D
BA43 AW47 R209 4.02K USB0_HS_REXT: 100OHM on Internal test chip, 4.02K on SM6150
AW43 ATEST1 USB0_HS_REXT AV46 0201
ATEST0 USB0_HS_DM AU47 USB0_HS_DM [13]
USB0_HS_DP USB0_HS_DP [13]
AW45
USB0_SS_TPA
C C
U201-L
U201-K
SM6150 SM6150
M12
VSSX_0 P22
VSSX_0
AR27
VSSX_0
AF20
VSSX_0
AF18
VSSX_0 AL19
VSSX_0
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 2OF 22
6 5 4 3 2 1
REVISION RECORD
D D
U201-F
SM6150
U201-G
SM6150
[12]MIPI_CSI0_CLK_P_NC L5
M4 CSI0_3PHASE_PIN0 LN_BB_CLK2_DIV [5]
[12]MIPI_CSI0_CLK_M_0A CSI0_3PHASE_PIN1
[12] MIPI_CSI0_L0_P_0B N5 [20] COEX_CLK K8 WCSS_CXM_RFA_CMD_CLK N7 R303 NC WLAN_5G_CLK_OUT [20]
P4 CSI0_3PHASE_PIN2 P46 RF_XO_CLK 0201
[12] MIPI_CSI0_L0_M_0C MIPI_DSI0_CLK_N [12] [20] COEX_DATA J7 WCSS_CXM_RFA_CMD_DATA
L3 CSI0_3PHASE_PIN3 MIPI_DSI0_CLK_N N47
[12] MIPI_CSI0_L1_P_1A CSI0_3PHASE_PIN4 MIPI_DSI0_CLK_P MIPI_DSI0_CLK_P [12]
[12] MIPI_CSI0_L1_M_1B M2 L45 MIPI_DSI0_LANE0_N [12] AH46 R304 3.01K/1%
N3 CSI0_3PHASE_PIN5 MIPI_DSI0_LANE0_N K46 QREFS_CXO_REXT 0201
[12] MIPI_CSI0_L2_P_1C MIPI_DSI0_LANE0_P [12] [20] WL_CMD_CLK_CH0 L7 WCSS1_BBD_RFA_CMD_CLK
P2 CSI0_3PHASE_PIN6 MIPI_DSI0_LANE0_P N45
[12] MIPI_CSI0_L2_M_2A MIPI_DSI0_LANE1_N [12] [20] WL_CMD_DATA_CH0 K6 WCSS1_BBD_RFA_CMD_DATA
R1 CSI0_3PHASE_PIN7 MIPI_DSI0_LANE1_N M46
[12] MIPI_CSI0_L3_P_2B CSI0_3PHASE_PIN8 MIPI_DSI0_LANE1_P MIPI_DSI0_LANE1_P [12]
[12] MIPI_CSI0_L3_M_2C T2 J45 MIPI_DSI0_LANE2_N [12] BC37 QLINK_CLK_M [15]
R5 CSI0_3PHASE_PIN9 MIPI_DSI0_LANE2_N J47 QLINK_CLK_M BB36
[12] MIPI_CSI1_CLK_P MIPI_DSI0_LANE2_P [12] [3] WCSS_PWR_EN M8 WLAN_PWR_EN QLINK_CLK_P [15]
T6 CSI1_3PHASE_PIN0 MIPI_DSI0_LANE2_P H46 QLINK_CLK_P
[12] MIPI_CSI1_CLK_N MIPI_DSI0_LANE3_N [12]
U5 CSI1_3PHASE_PIN1 MIPI_DSI0_LANE3_N G47
[12] MIPI_CSI1_L0_P CSI1_3PHASE_PIN2 MIPI_DSI0_LANE3_P MIPI_DSI0_LANE3_P [12]
[12] MIPI_CSI1_L0_M V6 E47 R301 1.4K/1% [20] WL_BB_IN_TX D2
CSI1_3PHASE_PIN3 MIPI_DSI0_REXT_PLL
[12] MIPI_CSI1_L1_P R3 0201 MIPI_DSI0_REXT_PLL: DNI on Internal test chip, 1.4K on SM6150
[20] WL_BB_IP_TX C1 WLAN1_DAC_I_N BA35 QLINK_RX0_M [15]
CSI1_3PHASE_PIN4 QLINK_RXLANE1_M
[12] MIPI_CSI1_L1_M T4 [20] WL_BB_QN_TX E1 WLAN1_DAC_I_P AY34 QLINK_RX0_P [15]
CSI1_3PHASE_PIN5
U3 [20] WL_BB_QP_TX F2 WLAN1_DAC_Q_N QLINK_RXLANE1_P BB34 QLINK_RX1_M [15]
V4 CSI1_3PHASE_PIN6 G45 WLAN1_DAC_QI_P QLINK_RXLANE2_M BA33 QLINK_RX1_P [15]
V2 CSI1_3PHASE_PIN7 MIPI_DSI1_CLK_N F46 QLINK_RXLANE2_P BB32 QLINK_RX2_M [15]
W3 CSI1_3PHASE_PIN8 MIPI_DSI1_CLK_P QLINK_RXLANE3_M
[20] WL_BB_IN_RX E5 BC33 QLINK_RX2_P [15]
CSI1_3PHASE_PIN9
[12] MIPI_CSI2_CLK_P Y4 [20] WL_BB_IP_RX D4 WLAN2_ADC_I_N QLINK_RXLANE3_P AW37 QLINK_TX1_M [15]
CSI2_3PHASE_PIN0
[12] MIPI_CSI2_CLK_N AA5 [20] WL_BB_QN_RX F6 WLAN2_ADC_I_P QLINK_TXLANE1_M AY38 QLINK_TX1_P [15]
CSI2_3PHASE_PIN1
[12] MIPI_CSI2_DATA0_P AA3 [20] WL_BB_QP_RX D6 WLAN2_ADC_Q_N QLINK_TXLANE1_P
[12] AB4 CSI2_3PHASE_PIN2 WLAN2_ADC_Q_P
MIPI_CSI2_DATA0_N
[12] W1 CSI2_3PHASE_PIN3
MIPI_CSI2_DATA1_P CSI2_3PHASE_PIN4
[12] MIPI_CSI2_DATA1_N Y2 R305 6.04K/1% G1
AA1 CSI2_3PHASE_PIN5 0201 WLAN1_DAC_REXT
[12] MIPI_CSI2_DATA2_P CSI2_3PHASE_PIN6
[12] MIPI_CSI2_DATA2_N AB2
AC3 CSI2_3PHASE_PIN7
[12] MIPI_CSI2_DATA3_P CSI2_3PHASE_PIN8
[12] MIPI_CSI2_DATA3_N AD2
CSI2_3PHASE_PIN9
C C
U201-B
SM6150
* U201-C
SM6150
B B
Board ID
VREG_L10A_1P8
0201
0201
0201
0201
0201
0201
0201
0201
R325 R326 R327 R328 R329 R330 R333 R334
0201
0201
R321 R322
2.2K 2.2K 2.2K 2.2K 2.2K 2.2K 2.2K 2.2K
2.2K 2.2K
R335
0201
2.2K
2.2K
[3,7]
R336
0201
SMB, RF SHARED_I2C_SDA
EEPROM,OVP, LP4x
BUCK CTRL [3,7] SHARED_I2C_SCL
100K_NC
100K_NC
100K_NC
R331
0201
0201
0201
0201
R312
NC
R311
R313
[3,12] I2C_TP_SDA
LEGACY TOUCH
[3,12] I2C_TP_SCL
[3,11] SMARTPA_I2C_SDA
[3] GPIO119_ID0 GPIO_119
[3] GPIO115_DI1 GPIO_115
NFC [3,11] SMARTPA_I2C_SCL
[3] GPIO116_ID2 GPIO_116
[3] GPIO118_ID3
GPIO_118
[3,12] CCI_I2C_SDA0
Smart I2C
CAMERAS
[3,12] CCI_I2C_SCL0
100K
0201
0201
100K
R314
R315
100K
R316
0201
100K
R332
0201
[3,12,14] CCI_I2C_SDA1
CAMERAS
[3,12,14] CCI_I2C_SCL1
[3,14,18] I2C_SENSORS_SDA
SENSORS
[3,14,18] I2C_SENSORS_SCL
A A
Pust the two testpoint on the back side
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 3OF 22
6 5 4 3 2 1
REVISION RECORD
U201-H
SM6150
C C
VREG_L4A [4,5]
SG1410
RMT_SNS_S3A_M [6]
VDD_EBI_VDDQ [2,4,5,10]
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 4OF 22
6 5 4 3 2 1
REVISION RECORD
D D
Layout Note:
No trace shall be present in at-least two immediate layers below XTAL.
Route XTAL IN/OUT trace with length between 3mm and 10mm
PM_XO_IN [5]
OW38477001
1 H1 H2 3 PM_XO_OUT [5]
U501-A
THRMSTR 4 PM_XO_THERM [5] PM6150
AVDD_BYP should be routed
2 away from noisy traces
THRMSTR_GND SG1601
C501 C504 1.0uF
U501-F
X501 1nF C507
C505 1.0uF PM6150
XOADC_GND [5] 99
GND_WLP_TST AVDD_BYP
138
VIN_GR1: VIN_L11_L12_L13 from S5A
VIN_GR2: VIN_L10_L14_L15 from S5A
PMIC internal regulators used
10uF
DVDD_BYP
TEST_EN_VPP
127
101
VIN_GR3: VIN_L1 from S8C
VIN_GR4: VIN_L2_L3 from S4A
VREG_L10A : LDO_XO_RF
162 91 VPH_PWR [6,8,9,11,16,18] VIN_GR5: VIN_L5_L16_L17_L18_L19 from BOB [6,8] VREG_S5A 26
[5] PM_XO_IN 181 XTAL_IN VPH_PWR_1 63 VIN_GR6: VIN_L6 from S3A
VIN_GR1 183 VREG_L1A_1P2 [15]
[5] PM_XO_OUT 172 XTAL_IN VCOIN
VIN_GR7: VIN_L9 from S3A
[8,9,12] VREG_S8C VREG_L1 174 VREG_L2A_1P0 [15]
191 XTAL_OUT VIN_GR8: VIN_L4_L7_L8 from S4A 125 VREG_L2 194 VREG_L3A_1P0 [15]
TP501 XTAL_OUT 81 C519 134 VIN_GR2 VREG_L3 195
VREF_MSM VREF_HVPAD [4] VIN_GR2 VREG_L4 VREG_L4A [4]
1.0uF 196 VREG_L5A_2P7 [5,13,17,18,19,21]
C512 VREG_L5
[13] KYPDPWR_N 92 10uF 197
[2] PON_RESET_N 8
27
KPD_PWR_N
PON_RESET_N
82
VIO_IN 73 VREG_L10A_1P8 [3,4,5,7,10,11,13,14,15,16,18,19,20] 193
VIN_GR3
VREG_L6
VREG_L7
176
175
VREG_L7A [4]
VDD_EBI_VDDQ [2,4,10]
VREG_L6A
[2] PS_HOLD VREG_IO [4,8] VREG_L8A [4]
17 PS_HOLD VIO_OUT VREG_L8 188
[13] RESIN_N C513 10uF VREG_L9A [4]
7 RESIN_N 184 VREG_L9 143
CBL_PWR_N [6] VREG_S4A VIN_GR4 VREG_L10 VREG_L10A_1P8 [3,4,5,7,10,11,13,14,15,16,18,19,20]
C502 [8] FAULT_N R501 0R 36 54 VIB_DRV_P [13] 16 VREG_L11A [4,5,7]
0201 FAULT_N VIB_DRV_P VREG_L11 35
C514 1.0uF VREG_L12 VREG_L12A [5,10]
[8,11,12,14] VREG_BOB 167 45 VREG_L13A [3,5,12]
10nF/NC [2,8] SPMI_CLK 122 83 SLEEP_CLK [2,20] 186 VIN_GR5 VREG_L13 135 VREG_L14A_1P8 [5,15,21]
[2,8] SPMI_DATA 131 SPMI_CLK SLEEP_CLK VIN_GR5 VREG_L14 124 VREG_L15A [5,11]
SPMI_DATA C515 1.0uF VREG_L15 168
VREG_L16 VREG_L16A_2P7
192 [4,6] VREG_S3A 187 177 VREG_L17A
C [4,5,7] VREG_L11A 153
VDD_BB_CLK_DRV
VREG_XO 182
GND_XO
C516 10uF
SG1603
178
VIN_GR6
VIN_GR7
VREG_L17
VREG_L18
VREG_L18
139
158
[4,5]
C
157 VREG_L19A [5,12]
C503 144 173 VREG_L19
[15] RF_CLK1 SG1602
[5] RF_CLK2 154 RF_CLK1 VREG_RF_CLK 163 185
1.0uF 155 RF_CLK2 GND_RF VIN_GR8
RF_CLK3 C517 100nF
136 REF_BYP and REF_GND should be
REF_BYP 145 SG1604 routed away from noisy traces C520 C521 C522
[2] LN_BB_CLK1 164 C523 C524 C525 C526 C527 C528 C529 C530 C531 C532 C533
SG1606 [5] LN_BB_CLK2 156 LN_BB_CLK1 REF_GND
165 LN_BB_CLK2 1.0uF/10V 10uF 10uF
10uF 10uF 1.0uF 1.0uF 10uF 10uF 1.0uF 1.0uF 1.0uF 100nF 1.0uF
LN_BB_CLK3
129 TYPEC_UUSB_SEL
AMUX_1 148
AMUX_2 106 SDM_THERM [5]
[5] PM_XO_THERM 108
SMB_THERMAL [5]
[5] XOADC_GND 118 XO_THERM AMUX_3 89
GND_XO_ADC AMUX_4 TYPE_C_NTC [13]
0201
R502 357k to GND - Type C VREG_L10A_1P8 [3,4,5,7,10,11,13,14,15,16,18,19,20]
357K/1% Open - Micro USB
1.0uF VREG_L11A [4,5,7]
VREG_L12A [5,10]
VREG_L13A [3,5,12]
VREG_L14A_1P8 [5,15,21]
VREG_L15A [5,11]
VREG_L17A [4,5]
VREG_L19A [5,12]
C534 C536 C538 C541
[5] R510 22R [20] 1uF
RF_CLK2 0201 XTALI
1.0uF 1.0uF 1.0uF 1.0uF
C545
12pF_NC
C535 C537 C542
C539 C540 Please install C537, C539, C540, C542.
[5] LN_BB_CLK2 R511 10pF R512 0R LN_BB_CLK2_DIV [3] 10uF
0201 Can put them at load side and please
10uF_NC 10uF 10uF
10uF 10uF make sure ESL and ESR of routing meet LDO spec.
C546
22pF
100K/1%_NTC
B B
100K/1%_NTC
2
RT501
100K/1%_NTC
RT502
2
100K/1%_NTC
2
RT509
RT503
1
1
1
PLACE CLOSE TO SDM
U501-B
PM6150
TP502 U501-C
PM6150
109
110 CMN_GND
111 CMN_GND
CMN_GND 198
119 GPIO_01
CMN_GND 55
120 GPIO_02
CMN_GND [7] SMB_STATUS 74
121 GPIO_03
CMN_GND 64
128 GPIO_04
CMN_GND [8] SLB 169
130 GPIO_05
CMN_GND [3,13] SD_CARD_DET_N R504 0R 149
137 0201 GPIO_06
CMN_GND 84
140 GPIO_07
CMN_GND 102
166 GPIO_08
[3,13] FORCED_USB_BOOT R506 0R_NC
Factory mode boot 0201 93 GPIO_09
GPIO_10
Factory mode boot
TP503
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 5OF 22
6 5 4 3 2 1
REVISION RECORD
D D
USB_IN_MID [7]
U501-D U501-E
[7,13] USB_VBUS PM6150 PM6150
C605
C601
4.7uF/35V 94 Inductor need confirm
[5,6,8,9,11,16,18] VPH_PWR 103
4.7uF/25V 1 2 PGND_CHG [6] 95 VDD_S1 VREG_S1 RMT_SNS_S1A_S2A_P [4]
10 USB_IN MID_CHG 11 VDD_S1 L602
USB_IN MID_CHG C617 104 VREG_S1A_S2A [4]
20 21 VSW_S1 114
SG1805 29 USB_IN MID_CHG 30 SG1804 0.47uH
VSW_S1
39 USB_IN MID_CHG 40
USB_IN MID_CHG SG7 1.0uF/10V 113 112 RMT_SNS_S1A_S2A_M [4]
48 49
C602 USB_IN MID_CHG 123 GND_S1 RMT_GND_S1
58 GND_S1
MID_CHG
1.0uF/10V
[5,6,8,9,11,16,18] VPH_PWR 69 50 C606 27nF/16V [5,6,8,9,11,16,18] VPH_PWR 151
VDD_VCONN BOOT_CAP 150
161 VDD_S2 VREG_S2
VDD_S2 L603
L601 C618 142
[13] USB_CC1 60 3 VPH_PWR VSW_S2 152
[13] USB_CC2 70 CC1_ID VSW_VHG 12 [5,6,8,9,11,16,18] VSW_S2 0.47uH
1.0uH
[3] USB_PHY_PS 80 CC2 VSW_CHG 22 1.0uF/10V
CC_OUT VSW_CHG C607 C608 C609 SG8 132 141
31
VSW_CHG [5,6,8,9,11,16,18] VPH_PWR 133 GND_S2 RMT_GND_S2
32 GND_S2
51 VSW_CHG 41
C603 C604 61 SBU2 VSW_CHG 10uF/10V 10uF/10V 10uF/10V
SBU1 [5,6,8,9,11,16,18] VPH_PWR 189 159 RMT_SNS_S3A_P [4]
C615 C616 199 VDD_S3 VREG_S3
L604
220pF 220pF 4 PGND_CHG [6] T601 VDD_S3
PGND_CHG 13 C619 179 VREG_S3A [4,5]
[7] SMB_EN 68 VSW_S3 180
SMB_EN PGND_CHG 23 0.47uH
10uF/10V 10uF/10V VSW_S3 190
PGND_CHG 42
10uF/10V VSW_S3
115 PGND_CHG
170
105 DC_IN_EN SG9
171 GND_S3 160
[13] USB_HS_DP_PM 77 DC_IN_PON 5 GND_S3 RMT_GND_S3 RMT_SNS_S3A_M [4]
67 DC_IN_PSNS VPH_PWR 14
[13] USB_HS_DM_PM IUSB_OUT VPH_PWR 24
VPH_PWR [5,6,8,9,11,16,18] VPH_PWR 75 65 VREG_S4A [5]
33
VPH_PWR 85 VDD_S4 VREG_S4
Place the two resistors near the connector 100 43 VDD_S4
better for placement 90 USB_DP VPH_PWR 62 C620
C USB_DM VPH_PWR
1.0uF/10V
66
VSW_S4 76
L605 C622 C623 C624
C
52 6 VBATT [7,13] VSW_S4 0.47uH 22uF/6.3V/0402 10uF/NC 10uF_NC
[13] VBATT_CONN_VSNS_M 56
71 VBATT_SNS_N VBATT_PWR 15 SG10
[13] VBATT_CONN_VSNS_P VBATT_SNS_P VBATT_PWR 57 GND_S4
25 GND_S4
VBATT_PWR 34 C610
146 VBATT_PWR 44
VBATT_PACK_SNS_M
[13] PACK_SNS_M VABTT_PWR 53 10uF [5,6,8,9,11,16,18] VPH_PWR 9 46 VREG_S5A [5,8]
VABTT_PWR 18 VDD_S5 VREG_S5
[13] VBATT_CONN_ISNS_M 87 28 VDD_S5
22uF/6.3/0402
[13] VBATT_CONN_ISNS_P 97 OPT_M 88 C611 100nF BOOT_PWR correct??? C621 VDD_S5 L606
OPT_P VARB_CHG 37 C625 C626 C627
VSW_S5 38
59 10uF/10V VSW_S5 19 0.47uH
BOOT_PWR BOOT_PWR [7]
[7] 86 VSW_S5 10uF/NC 10uF_NC
SMB_VCHG_N
96 ISNS_SMB_N SG11
[7] SMB_VCHG_P ISNS_SMB_P C612 C613 C614 47
GND_S5
147
116 GND_ADC
[13] BATT_ID BATT_ID 1.0uF/10V 1.0uF/10V 1.0uF/10V
B B
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 6OF 22
6 5 4 3 2 1
REVISION RECORD
D D
U711
SMB1355
C718 4 VIN_2
C711
16V 4.7uF
33pF 5 VIN_3
C712
6
16V
VIN_4 27nF/16V
L711
SW_1 9
1.0uH
SW_2 10
C720 C721
2 USB_SNS SW_3 11
[6,13] USB_VBUS
10uF 10uF
SW_4 12
NC/10K
[3,4,5,10,11,13,14,15,16,18,19,20] VREG_L10A_1P8 0201
R711 PGND_1 15
PGND_3 17
PGND_4 18
1 BIAS
NC/20K
0201
R712
C 7 TSKIN VSYS_1 31 C
32
NC/100K
VSYS_2
R713
0201
33
10V C714
VSYS_3
13 VAACAP VSYS_4 34
100nF
36 GND2
100K_NC
[6] BOOT_PWR 0201
CHGOUT_1 25 VBATT [6,13]
R714
[3] 23
SHARED_I2C_SCL SCL
1.0uF
[3] SHARED_I2C_SDA 29 SDA VDDCAP 24
C717
GND1 21 [6]
SMB_VCHG_N
SMB1355
B B
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 7OF 22
6 5 4 3 2 1
REVISION RECORD
D D
U801-C
U801-B
U801-A PM6150L
PM6150L
PM6150L
91 L801
[5,6,8,9,11,16,18] 154 144
109 GND_WLP_TEST 135 VPH_PWR VSW_BCK_BOB
TEST_EN_VPP GPI0_01 175 VDD_BOB VSW_BUK_BOB 165
0.47uH
112 KEY_VOL_UP_N [13] 58 18 VDD_BOB VSW_BCK_BOB
GPIO_02 133 78 CMN_GND NC1 23 C815
GPIO_03 DVDD0_1P05_EN [12] CMN_GND NC2
[4,5] VREG_IO 97 152 AVDD1_2P8_EN [12] 79 34
VDD_IO GPIO_04 CMN_GND NC3 156 VSW_BST_BOB
134 80 49 10uF/10V VSW_BST_BOB 166
GPIO_05 CAM_FLASH_THERM [12] CMN_GND NC4 155
140 81 56
GPIO_06 CMN_GND NC5 [8] PGND_BOB 176 PGNG_BOB VSW_BST_BOB 177
VREG_BOB Sence,should be from Cap
[5,6,8,9,11,16,18] VPH_PWR 141 55 [5] 88 PGND_BOB VSW_BST_BOB
SLB
37 VPH_PWR_1 GPIO_07 45 89 CMN_GND
VPH_WPR_2 GPIO_08 35 90 CMN_GND SG2201
GPIO_09 AVDD0_2P8_EN [12] CMN_GND 146 VREG_BOB [5,8,11,12,14]
36 99 Power_PAD VREG_BOB 167
48 GPIO_10 44 QUIET_THERM [5] 100 CMN_GND
VREG_BOB
[5] FAULT_N FAULT_N GPIO_11 CMN_GND C817 C818 C819 C820
82 101
68 GPIO_12 110 CMN_GND
[2,5] SPMI_CLK 145
[2,5] 69 SPMI_CLK CMN_GND
VREG_BOB_SNS 10uF/10V 10uF/10V 10uF/10V 10uF/10V
SPMI_DATA SPMI_DATA 100nF
102 C813 REF_BYP and REF_GND should be routed away from noisy traces
REF_BYP PGND_BOB [8]
[5,8,11,12,14] VREG_BOB 104 126 [3]
139 FL_STROBE_TRIG
[5] EMMC_THERM 115 VDD_FLASH FLASH_STROBE
86 AMUX_1 92 SG2102 REF_GND via to main ground as close to PMIC as possible VDD_FLASH
[18] 105
PA_THERM0 128 AMUX_2 REF_GND C816 FLASH_LED1 FLASH_LED1 [12]
[12] LCD_NTC AMUX_3
1.0uF SG2101 114 136 FLASH_LED2 [12]
65 59 C814 10uF/10V GNDC_FLASH FLASH_LED2
GND_ADC AVDD_BYP
125
GND_XOADC via to main AVDD_BYP should be routed away from noisy traces FLASH_LED3
ground as close to PMIC as possible
[5,8,11,12,14] VREG_BOB 71 70
VDD_RGB RGB_BLU 60
RGB_GRN 39
RGB_RED RGB_RED [13]
C C
U801-G
PM6150L
C801
VREG_L7C [8,14]
VREG_L9C [8,13]
VREG_L10C [8,20]
VREG_L11C [8,10]
B B
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 8OF 22
6 5 4 3 2 1
REVISION RECORD
D D
L901
VPH_PWR [5,6,8,9,11,16,18]
4.7uH
[5,6,8,9,11,16,18] VPH_PWR
C905
C927
VSW_WLED
NC
[9] PGND_WLED 10 4.7uF 35V C906
31 PGND_WLED 20 25V or 35V
PGND_WLED VREG_WLED
[5,6,8,9,11,16,18] VPH_PWR C907 NC
SG2303 Power_PAD 40 SG2306
GNDP_WLED_SINK 30 PGND_WLED [9]
WLED_SINK1 19 LED_SINK1 [12]
C902 9 LED_SINK2 [12] Power_PAD
GND_WLED WLED_SINK2 29
WLED_SINK3 8 VPH_PWR [5,6,8,9,11,16,18]
1.0uF/10V WLED_SINK4
93 50 LCM_PWM_CABC [12] C908
VDD_DISP CABC
SG2302
Power_PAD L902 10uF/10V
84 VSW_DISP
VSW_DISP
4.7uH
83
VDISP_P_FB
61
DISP_HW_EN 63 VDISP_P_OUT [12]
VDISP_P_OUT
VDISP_MID 73
VDISP_MID C909 C910
SG2301
Power_PAD C911 C912
10uF/10V 10uF/10V
72 SG2305 Power_PAD
GND_DISP_M
62
VDISP_CAP1
51 C913 10uF/10V
VDISP_CAP2
C C
U801-E
PM6150L
U801-F
PM6150L
[5,6,8,9,11,16,18] VPH_PWR 1 77
148 130
2 VDD_S2 VREG_S2 [5,6,8,9,11,16,18] VPH_PWR
149 VDD_S6 VREG_S6
12 VDD_S2 11
C917 VDD_S2 VSW_S2 22 169 VDD_S6 L908
C921 VDD_S6 159
VSW_S2 32 VSW_S6C
VSW_S6 170
VSW_S2 0.47uH
1.0uF/10V VSW_S6
SG14 33 67 1.0uF/10V
43 GND_S2 RMT_GND_S2
GND_S2 SG18 160 120 RMT_SNS_S4C_S5C_S6C_M [4,9]
171 GND_S6 RMT_GND_S6
[5,6,8,9,11,16,18] VPH_PWR GND_S6
[5,6,8,9,11,16,18] VPH_PWR 74 76 RMT_SNS_S3C_P [4]
VDD_S3 VREG_S3
C918 [5,6,8,9,11,16,18] VPH_PWR 163 111 RMT_SNS_S7C_P [4]
64
VSW_S3 75 L905 173 VDD_S7 VREG_S7
C914 C915 VSW_S3C VREG_S3C VDD_S7
VSW_S3 [4]
1.0uF/10V 0.47uH 151 L909
SG15 53 C922 VSW_S7 162
10uF/10V 10uF/10V 54 GND_S3 VSW_S7 172
VSW_S7C VREG_S7C [4]
GND_S3 66 RMT_SNS_S3C_M [4] 0.47uH
RMT_GND_S3 VSW_S7
1.0uF/10V
SG19 150 122 RMT_SNS_S7C_M [4]
85 98
[5,6,8,9,11,16,18] VPH_PWR RMT_SNS_S4C_S5C_S6C_P [4,9] 161 GND_S7 RMT_GND_S7
96 VDD_S4 VREG_S4
GND_S7
VDD_S4 95
VSW_S4 106 L906
C919 VSW_S4C VREG_S4C_S5C_S6C [4,9] [5,6,8,9,11,16,18] VPH_PWR 6 47 VREG_S8C [5,8,12]
VSW_S4 27 VDD_S8 VREG_S8
0.47uH VDD_S8
87 RMT_SNS_S4C_S5C_S6C_M [4,9]
1.0uF/10V 116 RMT_GND_S4 5
SG16 C923 L920
117 GND_S4 VSW_S8 16
VSW_S8C C924 C925 C926
GND_S4 VSW_S8
1.0uF/10V 0.47uH
22uF/6.3V/0402 10uF/NC 10uF_NC
SG20 15
26 GND_S8
GND_S8
B B
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 9OF 22
6 5 4 3 2 1
REVISION RECORD
D D
U1001-C
U1001-D
R1006
VREG_L10A_1P8 0201
10K AA16
[2] DDR_RESET_N RST_N_2
U1001-A
[2] EBI1_CA_CS_0 Y15
R1001 CS0_B
TP1001 B16 W15
[2,4,5,10] VDD_EBI_VDDQ 0201 ZQ0 [2] EBI1_CA_CS_1 CS1_B
N9 240R/1% U14
[2] RESOUT_N RST_N_1 R1002 CS2_B
C16
0201 ZQ1
[2] SDC1_CMD M9 U16
CMD 240R/1% [2] EBI1_CA_CK_T CLK_T_B
V16 AD3 EBI1_DQ_0 [2]
[2] SDC1_CLK P12 E15 [2] EBI1_CA_CK_C CLK_C_B DQ0_B
CLKM [2] EBI0_CA_CS_0 CS0_A AC3 EBI1_DQ_1 [2]
F15 A3 DQ1_B
M12 [2] EBI0_CA_CS_1 CS1_A DQ0_A EBI0_DQ_0 [2] [2] EBI1_CA_CKE_0 Y16
[2] SDC1_RCLK DS CKE0_B AB3 EBI1_DQ_2 [2]
H14 DQ2_B
CS2_A B3 EBI0_DQ_1 [2] [2] EBI1_CA_CKE_1 W16 AA3
TP1002 DQ1_A CKE1_B EBI1_DQ_3 [2]
DQ3_B
T14
CMD/DATA0/RST need TEST POINT [2] SDC1_DATA_0
P16
DAT0 [2] EBI0_CA_CK_T H16
CLK_T_A DQ2_A
C3 EBI0_DQ_2 [2] CKE2_B DQ4_B
AC7 EBI1_DQ_4 [2]
[2] SDC1_DATA_1 M15 AB6 EBI1_DQ_5 [2]
DAT1 D3 EBI0_DQ_3 [2] DQ5_B
N13 [2] EBI0_CA_CK_C G16 DQ3_A T13
[2] SDC1_DATA_2 CLK_C_A [4,9,10] VREG_S1C_VDD2 ODT_B AA7 EBI1_DQ_6 [2]
DAT2 DQ6_B
P15 B7 EBI0_DQ_4 [2] AB8 [2]
[2] SDC1_DATA_3 DAT3 DQ4_A EBI1_DQ_7
DQ7_B
M16 [2] EBI0_CA_CKE_0 E16 C6
[2] SDC1_DATA_4 CKE0_A EBI0_DQ_5 [2] AB9 R5 EBI1_DQ_8 [2]
DAT4 DQ5_A EBI1_DQS_T_0 DQ8_B
[2] EBI0_CA_CKE_1 F16 [2] DQS0_T_B
[2] SDC1_DATA_5 N14 CKE1_A D7 EBI0_DQ_6 [2] R6 EBI1_DQ_9 [2]
DAT5 DQ6_A R9 DQ9_B
J14 [2] EBI1_DQS_T_1 DQS1_T_B
[2] SDC1_DATA_6 L14 CKE2_A R3 EBI1_DQ_10 [2]
DAT6 C8 EBI0_DQ_7 DQ10_B
DQ7_A [2]
[2] SDC1_DATA_7 L13 AA9 T3 EBI1_DQ_11 [2]
DAT7 [4,9,10] VREG_S1C_VDD2 J13 [2] EBI1_DQS_C_0 DQS0_C_B DQ11_B
ODT_A K5 EBI0_DQ_8 [2]
DQ8_A [2] EBI1_DQS_C_1 T9 T7 EBI1_DQ_12 [2]
DQS1_C_B DQ12_B
[2] EBI0_DQS_T_0 C9 K6 V3 EBI1_DQ_13 [2]
DQS0_T_A EBI0_DQ_9 [2] DQ13_B
DQ9_A
LDDR4_254BALL_FBGA [2] EBI0_DQS_T_1 K9 V14
DQS1_D_A K3 EBI0_DQ_10 [2] [2] EBI1_CA_CA_0 CA0_B U6 EBI1_DQ_14 [2]
DQ10_A DQ14_B
[2] EBI1_CA_CA_1 W13 U8 EBI1_DQ_15 [2]
[2] EBI0_DQS_C_0 D9 J3 EBI0_DQ_11 [2] CA1_B DQ15_B
DQS0_C_A DQ11_A AB13
[2] EBI1_CA_CA_2 CA2_B
[2] EBI0_DQS_C_1 J9 J7 EBI0_DQ_12 [2]
DQS1_C_A DQ12_A AA13
[2] EBI1_CA_CA_3 CA3_B
G3 EBI0_DQ_13 [2] Y13
DQ13_A [2] EBI1_CA_CA_4 CA4_B
[2] EBI0_CA_CA_0 G14
CA0_A H6 EBI0_DQ_14 [2] AB15
DQ14_A [2] EBI1_CA_CA_5 CA5_B
[2] EBI0_CA_CA_1 F13
CA1_A
H8 EBI0_DQ_15 [2]
[2] EBI0_CA_CA_2 C13 DQ15_A
CA2_A
[2] EBI0_CA_CA_3 D13 AA5
CA3_A [2] EBI1_DMI_0 DMI0_B
[2] EBI0_CA_CA_4 E13 U3
CA4_A EBI1_DMI_1 DMI1_B
[2]
[2] EBI0_CA_CA_5 C15
CA5_A
LDDR4_254BALL_FBGA
D5
[2] EBI0_DMI_0 DMI0_A
H3
[2] EBI0_DMI_1 DMI1_A
LDDR4_254BALL_FBGA
C C
U1001-E
C1016
1.0uF
L17 U1001-F
VDDI
M17
VREG_L11C VCC_1 A4
N17 VDD1_1 VREG_L10A_1P8
VCC_2
1.0uF P17 A9 G13
C1013 VCC_3 VDD1_2 VSS_18 U1001-B
A15 C1026 K13 G15
C1027 C1010 C1011 VSSM_1
C1020 VDD1_3 VSS_19
2.2uF A16 K14 H4
VDD1_4 VSSM_2 VSS_20
1.0uF 1.0uF 1.0uF 1.0uF K16
B15 VSSM_3 H7
VDD1_5 VSS_21 M3
AC15 L12 H13 VSF1
VDD1_6 VSSM_4 VSS_22 A1
L15 N3 DNU_1
AD4 VSSM_5 H15 VSF2
VDD1_7 VSS_23 M4
J15 AD9 L16 J6 VSF3 A2
VREG_L12A VCCQ_1 VDD1_8 VSSM_6 VSS_24 DNU_2
M8 N4
J16 AD15 VSSM_7 K4 VSF4
VCCQ_2 VDD1_9 VSS_25 M5 A17
M13 VSF5 DNU_3
J17 AD16 VSSM_8 K7
C1015 C1014 VCCQ_3 VDD1_10 VSS_26 N5 A18
K15 M14 K8 VSF6 DNU_4
VCCQ_4 VSSM_9 VSS_27
1.0uF N8 M6
1.0uF R13 VSSM_10 R4 VSF7 B1
VCCQ_5 VSS_28 DNU_5
N12 N6
R14 VSSM_11 R7 VSF8 B18
VCCQ_6 A5 VSS_29 M7 DNU_6
VDD2_1 VREG_S1C_VDD2 N15 VSF9
T15 VSSM_12 R8
VDD_EBI_VDDQ VCCQ_7 A8 VSS_30 AC1
T16 VDD2_2 N16 T6 DNU_7
VCCQ_8 B9 SG1001 VSSM_13 VSS_31
VDD2_3 P13 U4 AC18
VSSM_14 VSS_32 D16 DNU_8
B13 NC_1
VDD2_4 C1025 C1024 RMT_SNS_S1C_P [9] P14 U7 AD1
B14 C1006 C1023 C1007 C1033 C1034 C1035 C1036 VSSM_15 VSS_33 DNU_9
A6 VDD2_5 C1005 K17
VDDQ_1 C1004 R15 U13 NC_2
G7 VSSM_16 VSS_34 AD2
A7 VDD2_6 4.7uF 4.7uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF DNU_10
VDDQ_2 10uF 10uF R16 U15 N7
G8 10uF 10uF VSSM_17 VSS_35 NC_3 AD17
C1028 A13
B C1029 C1009 C1008
A14
VDDQ_3
VDDQ_4
VDD2_7
VDD2_8
G9
SG1002 R17
VSSM_18 VSS_36
V4
V5
T17
NC_4
DNU_11
DNU_12
AD18
B
2.2uF 2.2uF 1.0uF 1.0uF B5 K2 [9] VSS_37
VDDQ_5 VDD2_9 RMT_SNS_S1C_M AB16
V6 NC_5
H5 L7 B4 VSS_38
VDDQ_6 VDD2_10 VSS_1 V13 AC16
H9 L8 B6 VSS_39 NC_6
VDDQ_7 VDD2_11 VSS_2 V15
J4 L9 B8 VSS_40
VDDQ_8 VDD2_12 VSS_3 W14
J5 P7 C4 VSS_41
VDDQ_9 VDD2_13 VSS_4 Y14 LDDR4_254BALL_FBGA
J8 P8 C5 VSS_42
VDDQ_10 VDD2_14 VSS_5 AA4
T4 P9 C7 VSS_43
VDDQ_11 VDD2_15 VSS_6 AA6
T5 R2 C14 VSS_44
VDDQ_12 VDD2_16 VSS_7 AA8
T8 V7 D4 VSS_45
VDDQ_13 VDD2_17 VSS_8 AA14
U5 V8 D6 VSS_46
VDDQ_14 VDD2_18 VSS_9 AA15
U9 V9 D8 VSS_47
VDDQ_15 VDD2_19 VSS_10 AB4
AC5 AC9 D14 VSS_48
VDDQ_16 VDD2_20 VSS_11 AB5
AD6 AC13 D15 VSS_49
VDDQ_17 VDD2_21 VSS_12 AB7
AD7 AC14 E14 VSS_50
VDDQ_18 VDD2_22 VSS_13 AB14
AD13 AD5 F14 VSS_51
VDDQ_19 VDD2_23 VSS_14 AC4
AD14 AD8 G4 VSS_52
VDDQ_20 VDD2_24 VSS_15 AC6
G5 VSS_53
VSS_16 AC8
G6 VSS_54
VSS_17
LDDR4_254BALL_FBGA
LDDR4_254BALL_FBGA
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 10
OF 22
6 5 4 3 2 1
REVISION RECORD
Smart PA
WCD9370
4.7uF
C1143
[3] CODEC_RST_N 39 35 VREG_L15A [5]
RESET_N VDD_BUCK 1.0uF
VDD_CX
11 C1144 NC NC NC NC
5 TP26 TP27 TP28 TP29
37 GND 4 VREG_BOB [5,8,12,14]
31 GND VDD_MIC_BIAS 1
GND VDD_PX 33 VREG_L10A_1P8
VDD_TXRX
C1131 1.0uF 7 C1145 C1146 C1147
SG3001 17 CCOMP
CCIMP_REF 47
AUX_OUT_M 51 100nF 100nF 100nF [3,11] AUDIO_MI2S_SCK
C1132 100pF C1133 100pF C1134 100pF AUX_OUT_P
[3,11] AUDIO_MI2S_WS
D [13]
[13]
AMIC1_INP
AMIC1_INM
3
9
19
AMIC1_INP
AMIC1_INM 41
SG3011 [3,11] AUDIO_MI2S_D0 D
[11] AMIC2_INP AMIC2_INP EAR_OUT_M 46 EAR_OUT_M [11]
[11] AMIC2_INM 14 EAR_OUT_P [11] [3,11] AUDIO_MI2S_D1
8 AMIC2_INM EAR_OUT_P
[11] AMIC3_INP AMIC3_INP
[11] AMIC3_INM 13 B1110
AMIC3_INM
18 BLM18AG102SN1D A1
PDMCK OUT_P F5 SPKR_P [11]
TP1101 TP1102 TP1103 TP1104 TP1105 TP1106 23 GND 30
GND BUCK_VSW 34 B1111 A2 VSNS_P D5
PA_VPOS [11] PDMD VSENSE_P [13]
BUCK_OUT
BLM15AG121SN1 A3 VSNS_N D3 VSENSE_M [13]
SBCLK2
[3] SWR_RX_CLK 16 C1148 A5
SWR_RX_CLK SDIN2 OUT_N F6 [11]
[3] SWR_TX_DATA1 12 A4
SPKR_M
6 SWR_TX_DATA1 SDOUT2 VPH_PWR
[3] SWR_RX_DATA1 SWR_RX_DATA1 470nF DREG B6 C1163 1.0uF [11] SPKR_M R1113 0R
26 0603 SPKR_OUT_M [13]
22 GPO0 C1149 R1112 0R_NC 100pF/NC
[3] SWR_RX_DATA2 SWR_RX_DATA2 B2 C1688 10nF/NC 0201
36 [3,11] AUDIO_MI2S_SCK SBCK1 VBAT D1
B3
10uF/10V
27 GPO1 [3,11] AUDIO_MI2S_WS FSYNC VBAT D2
[3] SWR_TX_DATA2 SWR_TX_DATA2 1.0uF C2
[3,11] AUDIO_MI2S_D0 SDIN1 R1111 0R_NC
100nF/10V
[3] SWR_TX_CLK 32 C1 0201 C1188
SWR_TX_CLK SDOUT1 L1160 1uH
B1112 [3,11] AUDIO_MI2S_D1 [11] SPKR_P R1114 0R
WCD_BUCK_FLYB_GND [11] SW F1 0603 SPKR_OUT_P [13]
BLM18AG102SN1D
[11] HPH_L 53 B4 SW F2
45
[11] HPH_R 48 HPH_L FLYB_VSW 50
FLYB_VSW [3] SMARTPA_I2C_SCL B5 SCL_SELZ SW F3
[11] HPH_REF 38 HPH_R FLYB_VNEG_OUT 54 PA_VNEG [11] [3] SMARTPA_I2C_SDA SDA_MOSI
C1169
HPH_REF FLYB_VNEG_DAC BLM15AG121SN1 VREG_L10A_1P8
FLYB_VNEG_DAC
C1161
C1135 B1113 C1150 C4
C1136 C1137 C1138 2 ADDR_SPICLK
0201
100nF
4.7uF
100nF
470pF_NC 680pF_NC 680pF_NC C1152 C1151 NC NC
C1139 100nF 10 B1
SG3008 LDO_H [3] AUDIO_PA_RST C1124
C5 SD IOVDD A6
100nF C1123
470nF 1.0uF [3] AUDIO_INT IRQ
D6
28 GPIO GREG D4
C1167
VREG_L10A_1P8 0201
44 MBHC_HSDET_G
C1160
C1164
[11] HS_DET MBHC_HSDET_L R1164 10K
C1166
WCD_BUCK_FLYB_GND [11]
0R_NC
R1169
0201
[13] MIC_BIAS1 15 F4
[11] MIC_BIAS2 24 MIC_BIAS1 E6 GNDD VBST G1
[11] MIC_BIAS3 25 MIC_BIAS2 E5 GNDP VBST G2
MIC_BIAS3 52 GNDP VBST G3
GND_A WCD_GND_A E4
E3 GNDD PVDD G4
C1140 C1141 C1142 SG3002 20 40 E2 GNDB PVDD G5
MICB_CFILT_REF GND_BUCK WCD_BUCK_FLYB_GND [11]
E1 GNDB G6
PVDD
42 21 GNDB
100nF 100nF 100nF GND GND_D
C1168
C1165
29 16V
49 GND_RXTX TAS2563
10uF
43 PA_VNEG
10uF
U1160
PA_VPOS
SG2
[11] PA_VNEG SG1 Power_PAD
[11] PA_VPOS
C C
Sub MIC
Earphone Audio
MIC_BIAS3
nokia,L-R-MIC-GND
default Iphone,L-R-GND-MIC
MIC101
B1102
1
OUT 5 AMIC3_INP [11]
POWER B1101 180nH
C1102
2 180nH
GND 3
GND 4 100pF
GND B1103
AMIC3_INM [11]
180nH
AM0502B-NE381-X01
C1101
33pF 33pF Note: Ferrite beads and their corresponding bypass capacitors on
100nF
on CDC_HPH_L_P, CDC_HPH_L_M and CDC_HPH_REF
are needed to reduce noise generated by audio/FM concurrency
T1111
1 2
NC
C2416
close to connector
R2410 10K HS_DET
[11] HS_DET 0201
2
GND
GND
[11] HPH_R R1124
0402
10R
B2401
HPH_R 3 RIGHT
BLM15HD182SN1D
4
[11] MIC_BIAS2 R2401
R12
0201
2.2K
2.2K
LEFT
0201 5
R1123
0402
10R BLM15HD182SN1D B2402 HPH_L SW(DETCT)
[11] HPH_L
[11] AMIC2_INP
R1125
0402
10R BLM15HD102SN1D B2403
MIC_IN 6 HD(NA)
1
[11] AMIC2_INM MIC
FV2406
R13
C86 C2403 EAR_C-AJR8W-00-03
Single via to
0201
NC
B 33pF 33pF
FV2404
GND plane J1101 B
FV2405
2
REC
NC
2
NC
C2408
C2410
FV2407
C2409
C <= 1pF
0201
0201
R1199
33pF
33pF
1nF
R2403
1
1
FM_EARPHONE_ANT [21]
NC
C2417 4.7nF
1
J1103
J1104
BLM15HD182SN1D
ANT_CC0043-0054A
ANT_CC0043-0054A GND
B2407
L2442
B1104
EAR_OUT_M [11]
C1111
BLM15HD182SN1D B2408
HPH_REF [11]
100pF
B1105
EAR_OUT_P [11] NC
C1170
T1103 T1104
C1112 C1113
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 11
OF 22
6 5 4 3 2 1
REVISION RECORD
R1223 NC
0201
41
42
J1205
1 40
C1203
D D
25
26
J1201 1K 2 39 [9]
[3,12] VDISP_M_OUT
TP_INT_N 0201
33
34
2.2uF J1202 R1248 3 38
4 37 VDISP_P_OUT [9]
1 24 1-AFVDD 1 30 30-GND [3] I2C_TP_SDA
2 1 30 29 5 36
2 23 2-AFGND
2 30
29-MDN0
CAM_D0N-A-2 [3] I2C_TP_SCL
[3] CAM_MCLK1 3 22 CAM_D1N-A [12] 3-MCLK 3 28 28-MDP0
[12] 1K
CAM_D1P-A [12] [3] CAM_MCLK0 3 28 CAM_D0P-A-2 [12] 6 35 TDN3_LCM [12]
B1203 4 21 4-GND 4 27 27-GND [3,12] TP_RESET_N 0201
[12] CAM_AVDD_2P8_2 5 4 27 26 R1249
5 20 5-AVDD 2.8 26-CLKN
CAM_CLKN-A-2 [12] 7 34 TDP3_LCM [12]
CAM_CLKN-A [12] B1204 6 5 26 25
[3] CAM1_RST_N 6 19 [12] [12] AVDD1.8V 6-AVDD 1.8V
6 25
25-CLKP
CAM_CLKP-A-2 [12]
R1251 CAM_CLKP-A 7 24 8 33
7 18 7-AGND VREG_L13A
BTB-40F_5052704010
24-GND
[12] DUALCAM_XVS 0201 7 24
8 17 [12] DUALCAM_XVS 8-VSYNC 8 23 23-MDN1 9 32 TDN0_LCM [12]
CCI_I2C_SCL0 0R CAM_D0N-A [12] 8 23 CAM_D1N-A-2 [12]
[3] 9 16 9-RST 9 22 22-MDP1
R1247
[3] CCI_I2C_SDA0 CAM_D0P-A [12] [3] CAM0_RST_N 9 22 CAM_D1P-A-2 [12] [3,12] 10 31 [12]
10 15 10-SCL 10 21 21-GND LCD_TE 0201 TDP0_LCM
[3,12,14] CCI_I2C_SCL1 11 10 21 20 R1246
11 14 [3,5,12]
11-SDA
11 20
20-MDN2
CAM_D2N-A-2 [12] 1K 1K 11 30
[12] CAM_DVDD_1.05 0201 VREG_L13A [3,12,14] CCI_I2C_SDA1 12 19 [3,12] LCD_RESET 0201
0R_NC R1208 12 13 12-GND
12 19
19-MDP2
CAM_D2P-A-2 [12]
13-DVDD 13 18 18-GND
[9] 12 29 TCN_LCM [12]
[12] CAM_DVDD_1.2 13 18 LCM_PWM_CABC
14-DVDD 14 17 17-MDN3
1K
[12] F_CAM_DVDD_1.2V 14 17 CAM_D3N-A-2 [12] 13 28 TCP_LCM [12]
15 16 16-MDP3 LDM_IDO 0201
C1226 C1228 C1227 [3,5,12] VREG_L13A 15-DOVDD
15 16 CAM_D3P-A-2 [12] NTC for BL LED thermal detect [3] 1K
0201
R1201 14 27
[3] LDM_ID1 0R
31
32
27
28
C1229 470nF R1202 15 26 TDN1_LCM [12]
10uF 100nF [8] LCD_NTC 0201
BTB-24F_BAF04-24083-0500 R1245 16 25 TDP1_LCM [12]
2.2uF
[9] LED_SINK1 17 24
[12] CAM_AVDD_2P8
AVDD GND B1202
C1236 C1237
BTB-30F_BAF04-30083-0500
[9] LED_SINK2
18 23 TDN2_LCM [12]
19 22 TDP2_LCM [12]
2.2uF 1.0uF 20 21
[9] VREG_LEDA
43
44
C1213 C1215 C1216 C1214
2.2uF 470nF
10uF 100nF NC
NC NC
C1220 2.2uF NC NC
C1217
C1204
100nF C1219 C1201 C1218 C1202
EMI1201
3 2
[3] MIPI_CSI1_CLK_P CAM_CLKP-A [12]
4 1 CAM_CLKN-A [12]
[3] MIPI_CSI1_CLK_N EMI1211
[3] MIPI_DSI0_LANE0_P 3 2
TDP0_LCM [12]
EMI1216 4 1
[3] MIPI_DSI0_LANE0_N TDN0_LCM [12]
3 2
[3] MIPI_CSI0_CLK_P_NC CAM_CLKP-A-2[12]
4 1
[3] MIPI_CSI0_CLK_M_0A CAM_CLKN-A-2 [12]
[3,12] TP_INT_N
EMI1202
[3] MIPI_CSI1_L1_P 3 2 CAM_D1P-A [12]
4 1 [3,12] TP_RESET_N
CAM_D1N-A [12]
[3] MIPI_CSI1_L1_M EMI1218
3 2 EMI1213
[3] MIPI_CSI0_L0_P_0B CAM_D0P-A-2 [12] 3 2 T1208 T1207 T1206 T1205 T1209
4 1 [3] MIPI_DSI0_LANE2_P TDP2_LCM [12]
[3] MIPI_CSI0_L0_M_0C CAM_D0N-A-2 [12] 4 1
[3] MIPI_DSI0_LANE2_N TDN2_LCM [12]
EMI1219
3 2
[3] MIPI_CSI0_L2_P_1C CAM_D2P-A-2[12]
4 1
C [3] MIPI_CSI0_L2_M_2A CAM_D2N-A-2[12]
3
EMI1214
2
C
[3] MIPI_DSI0_LANE3_P TDP3_LCM [12]
4 1
[3] MIPI_DSI0_LANE3_N TDN3_LCM [12]
EMI1220
Module Sensor IC DOVDD DVDD AVDD AFVDD
3 2
[3] MIPI_CSI0_L3_P_2B 4 1 CAM_D3P-A-2[12]
[3] MIPI_CSI0_L3_M_2C CAM_D3N-A-2[12]
Module Sensor IC DOVDD DVDD AVDD AFVDD IMX486PQHS-C 1.8V DW9763
1.2V 2.7V-0.1+0.2
140mAMax EMI1215
DW9763 [3] MIPI_DSI0_CLK_P 3 2
IMX376-AAKHS-C 1.8V 1.05V 2.8V TCP_LCM [12]
140mAMax 4 1
[3] MIPI_DSI0_CLK_N TCN_LCM [12]
25
4 1
IN OK OUT CAM_AVDD_2P8 [12]
1 24 3
[3] CAM_MCLK2 2 J1203 23 [8] AVDD0_2P8_EN EN
GND
GND
3 22
[12] CAM_D0N-C 2.2uF
BB2R4-24KBJ03
4 21
[12] CAM_D0P-C WL2810D28-4/TR
5
5 20 CAM_D2N-C [12]
[12] CAM_D1N-C 6 19 C1208
CAM_D2P-C [12] 2.2uF
CAM_D1P-C
0201
[12]
R1204
7 18
100K
[12] CAM_CLKN-C CAM_D3N-C [12]
8 17 CAM_D3P-C
[12] CAM_CLKP-C [12] C1209
9 16
10 15 [3]
[3] PWN 11 14 CAM2_RST_N
[8] FLASH_LED1
[3,12,14] CCI_I2C_SDA1 12 13
[3,12,14] CCI_I2C_SCL1 CAM_AVDD_2P8_2 [12]
B1201
27
28
T1202
1
C1210 C1212
2
100nF LED1202
B 10uF
VREG_BOB VREG_BOB B
VREG_S8C VREG_S8C
U1203 U1205
4 2 4 2
VIN BIAS VIN BIAS
OK
3 1 3 1
[3] DVDD1_1P2_EN EN VOUT CAM_DVDD_1.2 [12] [8] DVDD0_1P05_EN EN VOUT CAM_DVDD_1.05 [12]
GND
GND
2.2uF 2.2uF 2.2uF
LDO_WL2831 LDO_WL2831
5
5
100nF 100nF
C1222 2.2uF
0201
C1221
0201
R1207
R1206
C1224
100K
100K
C1232 C1233
C1225
[8] FLASH_LED2
EMI1206
3 2 T1201
[3] MIPI_CSI2_CLK_N CAM_CLKN-C[12]
4 1
1
[3] MIPI_CSI2_CLK_P CAM_CLKP-C[12]
2
LED1201
EMI1207
3 2
[3] MIPI_CSI2_DATA0_N CAM_D0N-C[12]
4 1 VREG_BOB
[3] MIPI_CSI2_DATA0_P CAM_D0P-C[12]
U1204
VREG_BOB
4 1 CAM_AVDD_2P8_2 [12]
IN OK OUT
U1206
EMI1208 3
[8] AVDD1_2P8_EN EN
GND
GND
[3] MIPI_CSI2_DATA1_N 3 2 4 1
4 1 CAM_D1N-C[12] 2.2uF IN OK OUT AVDD1.8V [12]
[3] MIPI_CSI2_DATA1_P CAM_D1P-C[12] [8] CAM_FLASH_THERM
WL2810D28-4/TR 3
2
[3] CAM_IOVDD_EN EN
GND
GND
C1230
0201
R1230
2.2uF 2.2uF
100K
WL2810D18-4/TR
100K/1%_NTC
Module Sensor IC DOVDD DVDD AVDD AFVDD
2
C1231 2.2uF C1234
0201
RT1202
R1250
100K
EMI1209 OLF0692(E7S) IMX376-AAJH5-C 1.8V 1.05V 2.8V C1235
3 2
[3] MIPI_CSI2_DATA2_N CAM_D2N-C[12]
1
4 1
[3] MIPI_CSI2_DATA2_P CAM_D2P-C[12]
EMI1210
[3] MIPI_CSI2_DATA3_N 3 2 CAM_D3N-C [12]
[3] MIPI_CSI2_DATA3_P 4 1 CAM_D3P-C [12]
VREG_BOB
U1208
4 1
IN OK OUT F_CAM_DVDD_1.2V [12]
[3]
REAR_CAM_DVDD_EN 3
EN
GND
GND
1.0uF
WL2810D12-4/TR
2
A 1.0uF C1238 A
0201
R1203
100K
Note 62-2: I2C control interface of front camera (with AF) must be assigned to I2C-2
bus when PIP/VIV feature be supported.
COMPANY:
Note 62-3: Reserve a capacitor (27pF) on camera's MCLK and shunt it to GND to prevent GPS de-sense.
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 12
OF 22
6 5 4 3 2 1
REVISION RECORD
VBAT_CONN_VSENSE_N [7]
VBAT_CONN_VSENSE_P [7]
VBATT_CONN_VSNS_M [6]
VBATT_CONN_VSNS_P
VBATT_CONN_ISNS_P
[6]
[6]
OVP U1301
D VBATT_CONN_ISNS_M [6]
OVP_FPF2281
R1305
0603
0R D
VBUS B3 A2 R1306 0R USB_VBUS
[13] C2 IN OUT A3 0603
[6,7]
Resistor need or not C3 IN
IN
OUT B2
OUT
42
41
Note C1312 C1311 C1309 C1318
0201
Wide trace to RF PA
R1310
BTB-40F_WP27D-SX40VA3_R 33pF 120pF
T1301 change to DFN1610-2
VBATT [6,7]
1uF_35V
1M->300K R1 4.7uF/25V
TP14
ACOK
B4 GND
C4 GND
GND
C1303 Note 4 37 TYPE_C_NTC
T1301 1.0uF/10V [5]
2 [3,4,5,7,10,11,13,14,15,16,18,19,20] VREG_L10A_1P8 5 36
C1301 The BPD comparator threshold is set at 95% of VREF_BAT_THERM
6 35
7
[3] EINT_HALL
33pF [5,13,17,18,19,21] R2
A4
7 34 VREG_L5A_2P7
6 1 [3]
PRX_TUNER_SW2
0201
VBAT 8 J1303 33
[8] RGB_RED PRX_TUNER_SW1 [3]
1 9 32 [3]
PRX_TUNER_SW3 R1311
VBAT 10 31
[5] VIB_DRV_P
VBAT 5 11 30 VSENSE_P [11]
GND
BATT_ID_TEST [13] MOTO_M connect to GND directly 12 29 470K->39K
NTC VSENSE_M [11]
2 [11,13] SPKR_OUT_M 13 28
ID BATT_THERM_TEST [13] 14 27
15 26 SPKR_OUT_M [11,13]
4 R1312 [11,13] SPKR_OUT_P
ID GND
0201 BATT_ID [6] 16 25
SPKR_OUT_P [11,13]
3 R1313 17 24
0R
NTC
GND
0201 BATT_THERM[6] [2,13] USB0_HS_DM
18 23 VOUT = VIN*(1+R1/R2)
19 22 USB_CC1 [6,13]
0R [2,13] USB0_HS_DP
12
11
10
20 21 USB_CC2 [6]
T1303 Note: R1 Min 1M
GND AVDD_BYP option is reserved for BMS accuracy improvement
1K
T1304 R1308
TP44
[6] USB_HS_DP_PM 0201
BATCON_24-7129-002-001-829 1K
43
44
[6] USB_HS_DM_PM 0201
R1309
[6,13] USB_CC1
GND
Note:
Battery ID resistor value require 20K~150K,
[13] VBUS TP20
VBUS
[13] [2,13] USB0_HS_DM TP19
TP21
VREG_L5A_2P7 VREG_L10A_1P8
VBUS [13] BATT_ID_TEST TP25
[3,5] FORCED_USB_BOOT
TP22
C C
Signal Description
Sider Key KPSNS0 Volume Up
PM_RST_N Volume Down
KYPD_PWR_N PWER_ON
PM_RST_N + Hardware Reset
100K
T1324
R1307
0201
10K
R1315
1.0uF 0201 [3,5] J1314
SD_CARD_DET_N J1313 J1315 J1316
0R R1317
0201 UIM1_PRESENT [3]
1
1
1
0R 0R
TP30
TP31
TP32
0201 UIM2_PRESENT [3]
R1316
R1330 DEBUG_KEY_VOL_DOWN_N [13] Volume Down
1 37
R1301
[4,8] VREG_L4C 0201 2 VCC DATA2 SDC2_DATA_2 [2]
0R 10K 3 VCC 38 0201 RESIN_N [5,13]
VCC DATA3 SDC2_DATA_3 [2]
R1328 0201 1K
R1320 4 39
[3]
UIM1_RESET 0201 5 RST CMD SDC2_CMD [2]
DEBUG_KEY_VOL_UP_N [13] Volume Up
0R 6 RST 40 R1303
RST VDD VREG_L9C [8]
0R R1329 J1304 0201 KEY_VOL_UP_N [8]
7 1K
UIM1_CLK 0201 8 CLK 41
[3] [2]
9 CLK CLK SDC2_CLK
DEBUG_PMIC_PKD_N [13]
CLK
T1321 T1323
VSS
42
R1304
Power On
10
11 GND 43 0201 KYPDPWR_N [5]
12 GND DATA0 SDC2_DATA_0 [2] 1K
GND 44
DATA1 SDC2_DATA_1 [2]
13
T1322 14 VPP
15 VPP
VPP
[3] 16
UIM1_DATA R1327 17 I/O 45
18 I/O
0201 I/O 46
0R
47
0R R1332 48
[4,8] VREG_L5C 19 T1311 T1308
T1310
0201 20 VCC1 49
21 VCC1
2
1
2
0201 VCC1 50
10K 22
[3] UIM2_RESET
R1321 23 RST1
24 RST1 C1316
RST1 C1315
T1312
[3] UIM2_CLK 25 51
3
26 CLK1 DETECT
3
ESD5302N ESD5302N
3
ESD5302N
27 CLK1 33pF DEBUG_KEY_VOL_UP_N [13]
CLK1
C1317
10uF
100nF
DEBUG_KEY_VOL_DOWN_N [13]
52
28 53 DEBUG_PMIC_PKD_N [13]
29 GND 54
30 GND 55
GND 56
31 57 T1313 T1315
T1314
32 VPP1 58
33 VPP1 T1309
VPP1 59
34 NC 60
[3] UIM2_DATA RESIN_N [5,13]
35 I/O1 NC
B 36 I/O1
I/O1 B
C1305
10nF
SIM_CAF00-20137-1029_3IN2
J1349 J1311
J1305
1
1
1
C1359
C1357
33pF
33pF
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 13
OF 22
6 5 4 3 2 1
REVISION RECORD
D D
1 0X0D
VREG_L8C U1401 C1403
A1 A2 VREG_L8C 100nF
VSS SCL I2C_SENSORS_SCL [3,14,18]
B1 B2
VDD SDA I2C_SENSORS_SDA [3,14,18]
0201
R1401
100K
AK09918
C1456
NC
C1401
[3,14,18] 8 1
I2C_SENSORS_SDA SDA VDD
100nF 7 2
ALSPG_INT_N INT SCL I2C_SENSORS_SCL [3,14,18]
[3] C1455
OK
6 3
NC GND
NC B1402
5 4 VREG_L7C
LDR LED_A
C1404
U1402
LIGHT_STK3332 4.7uF
SSC_SPI_1_CLK [3]
SSC_SPI_1_CS0_N [3]
C C
14
13
12
U1403
SDX
SCX
CSB
1 11 R1415 0R
SDO OSDO(GND) 0201
2 10
ASDX OSCB(GND)
3 9 ACC_GYRO_INT2 [3]
ASCX INT2
VDDIO
4 8
[3] ACC_GYRO_INT1 INT1 VDD VREG_L7C
GND
GND
BMI120
7
C1406
VREG_L8C
470nF
BMI120 0R/xxx 100nF
C1405
100nF GND
GND
GND
IR
R1405 : 10R to 33 R
B1401 R1405
VREG_BOB 0402
J1401 33R
T1403
T1405 T1406 T1407 T1404 T1402 GPIO40_IR_EN
T1408 T1411 [3]
2.2uF 1.0uF C1409
R1431 NC
C1402 C1408 NC 0201 T1409
Q1401 T1410
PWM 38KHZ D 3
[3] R1402 0R 1 G
IR_LED_EN 0201
S 2 ESD5451R-2/TR
B B
WNM2046-3/TR
SPI_MOSI
VREG_L7C
C1413 C1414
GND
12
13
U1404
GND4
R1410
R1411
1 11
0201
0201
10K
10K
AVDDVSCEL AVDD
2 10 CCI_I2C_SCL1 [3,12]
AVSSVCSEL SCL
3 9
GND SDA CCI_I2C_SDA1 [3,12]
4 8
GND2 DNC
[3] XSHUT_LASER 5 7
XSHUNT GPIO1
GND3
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 14
OF 22
6 5 4 3 2 1
REVISION RECORD
U1501-E
SDR-660-0-180WLPSP-TR-03-0
D D
U1501-B
110 DRX_UHB PRX_UHB 80
SDR-660-0-180WLPSP-TR-03-0
84 GND_36 GND_42 97
GND_54 128
138 GND_58
C1525
NOTE: C1525 limit 2.3nH TX_CH0_LB1 2 TX_CH0_LB1_G850_G900 [18] 116 GND_51
2.4nH
27 GND_56 131
TX_CH0_LB2 TX_CH0_LB2_W5_W8_LTE_B5_B8_B20_B28 [18]
61 GND_30
TX_CH1_UHB 168
C GND_59 139 C
167 34 GND_16
TX_CH1_HB
GND_35 79
163 GND_69
GND_6 17
172 GND_70
GND_11 23
12 GND_5
U1501-A
GND_61 145
SDR-660-0-180WLPSP-TR-03-0
19 GND_7
GND_25 51
VDDA_1P2_RX2 70 C1502
C1559 GND_26 52
0201
VREG_L2A_1P0 77 VDDA_1P0_RX1 VDDA_1P2_ANA0 75 120 W_GRFC_6 DNC_3 173
100nF NC 175
VDD_ANALOG_1P0 C1564 GND_72
37 VDDA_1P0_RX2 VDDA_1P2_ANA0 90 157 W_GRFC_7
C1505 160
Pin 43,37,107within one group 4.7uF GND_67
107 VDDA_1P0_XO VDDA_1P2_FBRX 85 136 W_GRFC_5
4.7uF 147
C1504 GND_62
GPIO78
165 DNC_2 WMSS_RESETN 83 [3]
C1550 C1588 WMSS_RESET 162
100nF C1561 GND_68
43 VDDA_1P0_RX2
100nF 100nF 100nF 153 GND_64 GND_34 78
53 VDDA_1P0_RX2_1
C1554
100nF
100nF SDR-660-0-180WLPSP-TR-03-0
C1555
100nF
100nF 4.7uF
QLINK_DL0_M 88 QLINK_RX0_M [3]
VDDD_1P0 64
QLINK_DL0_P 103 QLINK_RX0_P [3]
11 VDDA_1P8_TX0 VDDD_1P0 82 C1566
ETDAC_CH1_P 104
A A
QPHY_ETDAC_TEST
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 15
OF 22
6 5 4 3 2 1
REVISION RECORD
D D
U1601
QET4101
QFE4101
1 10
VPH_PWR VDD_BATT DNC1
9
DNC2
C C
4.7uF
C1601
L1601
11 VPA_APT [18]
VSW
1uH
5
VOUT_LDO
12
VBAT_SW
C1602
10uF
8
GND_SW
4
VREG_L10A_1P8 VDD_1P8
C1603
1.0uF
6
USID
[3,18] RFFE5_DATA 2
SDATA
3
[3,18] RFFE5_CLK SCLK
7
GND
B B
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 16
OF 22
6 5 4 3 2 1
REVISION RECORD
33pF FL1705
L1714 L1712 33pF
[15] PRX_HB4_B1_B4 1.2nH L1711
6 3
[18] TRX_B7 ANT TX 1
33pF L1701
RX 1.0nH L1724
NC
PRX_HB2_B7 [15]
D close to SDR D
GND
GND
GND
GND
GND
C1735
C1754
C1729
SAYEY2G53BA0F0A
8
7
5
4
2
FL1712 2.2nH
C1736
SAPRY1G74BA0B0A 2.4nH
2.7nH C1786 C1785
close to SDR
GND
GND
C1787 3.9nH
NC
C1718 12nH
C1702
33pF L1786 22pF
22pF 6 5
B1_RX B3_ANT TRX_B3 [18]
2
B3_TX
7
B3_RX
33pF L1729
[18] TRX_B1_B3_B4
3 8
B1_ANT GND
TRX_B1_B3_B4
C1739 4
C1738 GND
1
NC B1_TX
TRX_B8
2.4nH
GND
GND
L1715 3.3nH TX_B1 [18]
NC
C1756
C1719 NC
L1716 1.2nH
[18] TX_B3_B4
C1755
NC
C1747
C1746
NC 6.8nH FL1709
S1732 close to SDR L1709 33pF 6 3
[18] TRX_B8 ANT TX 1 18nH
L1731 PRX_LB4_B8 [15]
RX
C1743
L1785 33pF C1744
4 3 L1727 1.2nH PRX_MB1_B3 [15] L1766 33pF
GND
GND
GND
GND
GND
GND RFOUT
L1710 33pF 5 2
RFIN VDD VREG_L5A_2P7
close to SDR
8
7
5
4
2
6 1 [5,13,18,19,21] 6.8nH
EN GND
C1733 C1808
NC
GND
GND
L1749
2.4nH
NC NC
C1759
L1746 33pF
8.2nH L1736 NC
C1710
22pF
LNA_PRX_B3_EN [3]
C C
PRX_B34_B39
TRX_B2
1.2nH
TX_B2 [18]
C1751
L1718 SAWFD1G90KE0F0A close to SDR
C1750
1.5nH L1865 PRX_MB4_B39 [15]
0201
NC L1878 33pF
NC
L1866
GND
GND
GND
GND
GND
C1749 33pF
C1737 7 2
NC GND5 GND1
8
7
5
4
2
L1741
C1706
FL1704
22pF 1.8nH
R1706
33pF
TRX_B28A
C1752
NC
NC
TX_B28A [18]
L1719 6.2nH
FL1706 close to SDR
L1735 0R
[18] 6 3 18nH L1728 C1726
TRX_B5 0201 ANT TX 1 C1760
RX PRX_LB5_B5 [15]
L1788 33pF NC
GND
GND
GND
GND
GND
C1748 NC
C1703
C1734
8
7
5
4
2
NC
NC 5.6nH
B FL1720 close to SDR B
GND
L1755 1.2nH
[18] TRX_B28A 6 3 15nH L1757
ANT TX 1
RX PRX_LB1_B28A [15]
C1727 L1765 33pF
GND
GND
GND
GND
GND
C1757
NC C1761
8
7
5
4
2
7.5nH
NC
GND
TRX_B20 TRX_B28B
TX_B28B [18]
TX_B20 [18] L1721 6.2nH
L1777 6.2nH
C1723 C1724
C1882 C1883
NC NC
NC NC
GND
GND
GND
GND
GND
C1722 C1715
L1784 33pF
GND
GND
GND
GND
GND
C1780 C1781
8
7
5
4
2
NC 8.2nH
NC
8
7
5
4
2
7.5nH C1721
C1784
GND
GND
NC
NC
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 17
OF 22
6 5 4 3 2 1
REVISION RECORD
C1807
TXM-RF5212A
100pF
VREG_L10A_1P8 [3,4,5,7,10,11,13,14,15,16,18,19,20]
56nH L1824
[17] TRX_B1_B3_B4
D [17] TRX_B3 D
39K
0201
L1839 C1841
[17] TRX_B28A TRX_B2 [17]
100pF
0R R1875 TRX_B7
ANT_CHECK [3] [17]
[17] PRX_B34_B39 0201
0201
[17] TRX_B8
L1838
C1868
[17] TRX_B5
L1869
TX_CH0_MB2_DCS_PCS [15]
1.2nH
31
32
33
34
35
36
37
38
39
NC
TRX7
TRX6
TRX5
TRX4
TRX3
TRX2
TRX1
GND
GND
30
J1809 TRX8 1
29 RFIN_L_OUT C1869
J1801 1.8nH FL1806 TRX9
2 C1860 33pF L1843 2
GND
0R
3 GND 1 L1827 0R 1
IN OUT
3 0201 28 RFIN_L
4 GND RF 0201 2 1 L1815
TRX10 3
GND RFIN_H
3 4 27
2
TRX11 4
NC
68nH
26 RFIN_H_OUT
R1822 0R
C1824 TRX12 5 [3,16,18]
C1822 0201 RFFE5_CLK
25 SCLK
NC
NC 24
TRX13
RF5212A SDATA
6 RFFE5_DATA [3,16,18]
C1866
TRX14 7
C1853
VREG_L10A_1P8 [3,4,5,7,10,11,13,14,15,16,18,19,20]
23 VIO
GND 8
VRAMP 0201 33pF
22 R1811
ANT 9 100K
VCC 33pF C1802
21 C1872
GND 10 C1803
U1803 VBATT
20
GND
CLP_OUT
11 100nF
GND
GND
GND
GND
GND
GND
GND
NC
19
18
17
16
15
14
13
12
VPH_PWR [5,6,8,9,11,16,18]
C1809 4.7uF
C1842
T1801
100nF
L1829 36R
[15] TX_FBRX_P 0201
L1831 L1830
0201
0201
150R 150R VPH_PWR [5,6,8,9,11,16,18]
C C
100pF 100nF 2.2uF
MMMB_PA
33pF
PRX_B41
L1810
PRX_HB1_B38_B41 [15]
1.5nH
L1846
PA_THERM0 [8]
C1859
100K/1%_NTC
2
C1833
22pF
C1855
PA_THERMO
NC
1
33pF
L1809
PRX_HB3_B40 [15]
1.8nH
PRX_B40
L1845
C1857
22pF
B S1835
B
1 6 LNA_PRX_B40_EN [3]
GND EN
2 5 33pF L1806
VREG_L5A_2P7 VDD RFIN
[5,13,17,18,19,21]
3 4
TX_B7
RFOUT GND
L1879 33pF C1878
C1879
NC
NC
L1816 10pF TX_B7 [17]
NC
NC
C1876 C1877
1
S1834
6
C1839
NC
NC
C1823
NC
C1826
TRX_B40 SAR_SENSOR
GND EN LNA_PRX_B41_EN [3]
[5,13,17,18,19,21] VREG_L5A_2P7 2 5 33pF L1807
VDD RFIN
3 4 QM23040T U1802
5
RFOUT GND
L1888 33pF 3 SX9325
G
L1817 1 G
C1825 IN L1818 2.7nH
4
1.2nH OUT TRX_B40 [18] [3,14] I2C_SENSORS_SDA B1 A1
G
B2 A2 VREG_L10A_1P8 [3,4,5,7,10,11,13,14,15,16,18,19,20]
[3] SAR_CAP_RDY NIRQ VDD
C1850
C1848
NC
NC
TRX_B41
NC
NC
47
45
46
44
43
42
41
40
39
38
37
HBRX1
GND
HB4
GND
HB3
1 36
GND GND FL1822 FV1810
1
2 35 L1748 470R
GND HB2 B39262B8870L210 0201 PRX_SAR_SENSOR [13]
L1840 0R
[15] TX_CH0_HB1_LTE_B7_B38_B40_B41 33pF L1808 3 34
0201 RFIN_H GND
L1856 L1891
4 33 1 4 TRX_B41 [18]
NC HB1 IN OUT
2
C1831
5 32 1.5nH 2 1.2nH
[3,16,18] RFFE5_DATA SDATA MB5 GND NC
NC
NC 3
6 31 GND
[3,16,18] RFFE5_CLK SCLK GND C1874
C1889 C1890
5
C1832 C1834 7
VIO QM56022 VCC2
30
VPA_APT [16,18] C1858 GND
8 29 NC
100pF 100pF VBATT VCC1 VPA_APT [16,18]
C1835 NC
9 28 100nF
NC VCC2_2 C1830
C1817 1.0uF
10 27 33pF
NC GND C1818 C1862 4.7uF
VREG_L10A_1P8
11 26 100pF
[3,4,5,7,10,11,13,14,15,16,18,19,20] NC MB4 TX_B2 [17]
C1815 12 25 TX_B1 [17]
RFIN_M MB3
100pF 13 24
RFIN_L1 GND
A
VPH_PWR
14
15
RFIN_L2
GND
MB2
GND
23
22
TX_B3_B4 [17]
TX_B34_B39 A
MB1
GND
GND
GND
GND
GND
LB4
LB3
LB2
LB1
LB5
17
18
19
20
21
48
49
50
51
52
L1821
NC GND
NC GND
L1822 33pF
6 4
L1820
TX_CH0_LB2_W5_W8_LTE_B5_B8_B20_B28
0R
0201
L1832 TX_B20 [17] C1836
C1837
FL1807 C1804
<Company Name>
C1805
33pF
NC
L1804
NC
DRAWN: DATED:
<Title>
C1847
C1846
J1902
J1912
J1307
1
1
DRX_SAR_SENSOR [18]
C1976
33pF
C1967
C1916 C1906 C1989
DRX_SW
33pF 100nF 100nF
33pF
D [5,13,17,18,19,21] VREG_L5A_2P7
17
18
VDD TRX1
15
14
DRX_B34_B39 [19] D
VREG_L10A_1P8 TRX2 DRX_B41 [19]
[3,4,5,7,10,11,13,14,15,16,18,20] VIO 13
TRX3 DRX_B7 [19]
C1917 J1904 12
27pF TRX4 DRX_B40 [19]
C1938 33pF 33pF 33pF
L1905 C1919 9 11
ANT TRX5 DRX_B1_B3_B4 [19]
L1954 C1977 2 1 6
3 4 TRX6 DRX_B5 [19]
5 DRX_B8 [19]
100nH
27pF
L1968 C1937 C1957 C1924 MXD86A0S TRX7
TRX8
4
R1956 DRX_B20 [19]
NC 3
0201 100nH NC NC TRX9 DRX_B28A_B [19]
68nH L1958 2
56nH 19 TRX10 DRX_B2 [19]
RF1694 [3] RFFE2_DATA
10
SDATA
20 1
RFC
R1904 0R 1 9 0R R1903 [3] RFFE2_CLK SCLK NC 7
0201 RF1 RF3 0201 GND 8
R1902 0R 2 8 0R GND 10
0201 RF2 RF4 0201 R1901 C1901 GND 16
3 7 GND
GND GND 33pF U1918 GND
J1923 21
4 6
CTL1
[5,13,17,18,19,21] VREG_L5A_2P7 VDD CTL2
1
5
C1972
S1926
100pF
DRX_TUNER_SW1 [3]
DRX_TUNER_SW2 [3]
C1978
C1973 C1974
33pF
100pF 100pF
2
5
R1978
0201 3
G
G
G
56nH [19] DRX_B7 1 L1921 33pF
RF1694 0201 IN
10
0R L1933 4 L1901 1.2nH
OUT DRX_HB2_B7 [15]
NC
RFC
R1979 0R 1 9 0R R1981 SFHG56BA002
0201 RF1 RF3 0201 C1933
R1980 0R 2 8 0R
0201 RF2 RF4 0201 R1982
2.4NH
B1_B3_B4_DRX
C1941
3 7
GND GND
4 6
CTL1
[5,13,17,18,19,21] VREG_L5A_2P7 VDD CTL2
GND
C1902
5
C1980 33pF
FL1914 B39212B9926P810
S1914
100pF
DRX_TUNER_SW4 [3]
C1920 C1944
2
3
4
5
7
8
10
C1981 C1982
NC 3.3nH
C 100pF 100pF C
C1923
33pF
C1935 2.4nH
FL1907
L1917 33pF
1.5nH SAWFD1G90KE0F0A
DRX_B34_B39
L1926 DRX_MB1_B3 [15]
C1905
33pF
C1945
2.4nH
DRX_B34_B39
[19]
L1930 0R 1 9
0201 UNBAL3 UNBAL1
C1931
L1903 33pF L1923 1.2nH
UNBAL2 6 DRX_MB2_B34 [15]
B2_DRX
C1921
5 GND4
33pF
7 2
NC
GND5 GND1
C1934
8 GND6 GND2 3 2.4nH
10 GND7 GND3 4
C1913
FL1919
GND
22pF
L1944 33pF
1 4 L1942 1.5nH DRX_MB3_B2 [15]
[19] DRX_B2 IN1 OUT1
GND
GND
GND
C1965
C1964
SAFFB1G96AB0F0A
2
3
5
NC 2.4nH
C1966 B40_DRX
33pF FL1906
L1937 0R L1920
1 4 L1925 33pF
INPUT OUTPUT 1.0nH
[19] DRX_B40 0201 DRX_HB3_B40 [15]
GND
GND
GND
NC
C1946
2
1.8nH
C1942
C1926
33pF
GND
B B
B5_DRX
FL1915
SAFFB876MAA0F0A
L1908 33pF
1 4 L1924 18nH
DRX_LB5_B5_B26 B28 A+B DRX
GND
GND
GND
C1908 L1940
33pF 18nH L1941
[19] DRX_B28A_B 1 IN OUT 4 DRX_LB2_B28A_B [15]
NC L1916
2 GND
C1960 3 SAFFB942MAN0F0AR15 L1909
NC GND
NC GND 5
NC
B8 DRX FL1913
2 GND
C1907 3 GND
NC 5 L1912
GND
SAFFB942MAN0F0AR15
NC
DRX_B41_120M
33pF
2
C1995
L1991 0R 4 L1919 1.0nH
G
OUT DRX_HB1_B38_B41 [15]
A [19] DRX_B41 0201
1
IN
G
3 A
C1986 G 2.4NH
5 FL1911
C1947
NC
33pF
G 2
G 5
33pF G 3
L1911 1 IN
[19] DRX_B20 18nH L1913
OUT 4 DRX_LB3_B20 [15]
SFH806BA002 COMPANY:
C1914
L1918
<Company Name>
NC
NC TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 19
OF 22
6 5 4 3 2 1
REVISION RECORD
D D
U2001-A
WCN-3980-0-82BWLPSP-TR-0B-0
U2001-B
WL_RFI_5G_CH0 75 [21] WL_RFI_5G_CH0 WCN-3980-0-82BWLPSP-TR-0B-0
VDD13_BT_BB_WL 26
VREG_L2C [4,8,20]
49 GND_IO GND_SEALRING1 82
GND_BT_BB 33
43 VDD11D_PM [20]
VDD11D_PM
GND_SEALRING2 1
WCN3980
1.3V_RFA
C2026
VREG_L2C 0R
0201 VREG_L2C [4,8,20]
Pin 46 1.8V IO
[4,8,20]
B 10nF
3.3V CH0
VREG_L10A_1P8 VREG_L10A_1P8
[3,4,5,7,10,11,13,14,15,16,18,19,20]
B
[3,4,5,7,10,11,13,14,15,16,18,19,20] VDD18_IO
C2009 12,17 C2015
C2011
[8,20] VREG_L10C Pin 55 Pin 94
C2023
C2019 VREG_L10C [8,20] 470nF
4.7uF
4.7uF C2002
VREG_L2C [4,8,20] Pin 5 1.0uF
C2012 4.7uF
10nF
10uF
C2022 1.8V XO VDD18_XTAL Pin 40
[10] [10]
VREG_L1C
[4,8,20] VREG_L1C [4,8,20]
C2014
VREG_L10C [8,20] Pin 71
C2010
1.1V
C2046
10nF [20] VDD11D_PM
100pF
VREG_L2C [4,8,20] Pin 4
C2020
C2001
VREG_L2C [4,8,20] Pin 26 Pin 2
VREG_L10C [8,20] 1.0uF
1.0uF
10nF
10nF
C2024
C2016
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 20
OF 22
6 5 4 3 2 1
REVISION RECORD
D D
GPS
C2156 47nF
47nF 47nF
C2165 NC C2167 NC C2172
C2159 27pF
C2158 L2168 100nH FM_LANT_P [20]
J1910 47nF
FL2123
F6QA1G582H2JM
S2115
1
FL2107 33pF L2110 33pF L2160 100nH C2169 27pF
L2112
1 6 1 4 GPS_SDR660 [15] 4 3
F6QA1G582H2JM GND RFOUT UNB UNB [5,13,17,18,19] VREG_L5A_2P7 VCCRFOUTP
C2157 47nF
2 5 5 2
GND EN GNDRFOUTN
C2136 0R 1 4 9.1nH 33nH C2124 47nF
GPS_IN 0201 C2142 3 4 2 5 L2158 68nH L2161 6 1 FM_ANT_CHECK [3]
[21] UNB UNB RFIN VDD GND GND RFIN EN
3 L1955 100nH
GND
100nH
FM
27pF
27pF
2 5 S2135
GND GND AW5005DNR C1915 C2187
NC
NC 3
NC GND
33pF
C2132 47nF
C2170
C2137
C1956
L2157
C2133
GNSS_ELNA_CTRL [15]
C2166 0R
0201 VREG_L14A_1P8 [5,15]
NC NC
C2125 C2150
C C
GPS_2G_5G_ANT
J2116
J2121 J2111
1
1
1
J2117
ANT_CC0043-0054A
C2144 0R TP2012-A1255BA
TP9 0201 C2148 NC TRIP_2G_ANT [21]
C2174
4
MB
33pF 3 GND GND 5
J2105
C2102 33pF C2103 33pF C2108 0R
2 COM HB 6 TRIP_5G_ANT [21]
0201
2 1
3 4 C2131
C2152 C2130 1 7
C2151 GND GND
C2146
LB
NC
NC NC
NC
8
NC FL2106
GPS_IN [21]
B B
2G_5G_WLAN
C2106 0R C2105 0R
WL_RFO_5G_CH0 [20]
0201 0201
C2107
0201
NC
S2109
FL2110
C2135 4.3pF MXD8721
C2175 18pF 1.5nH 4 TRIP_2G_ANT [21]
[20] OUT
WL_BT_RFIO_2G_CH0 1 2 GND P1 1
IN 3 C2115 0.6nH C2141 18pF C2109
C2139 G C2114
[20]
G
2 G
NC
C2140 18pF
TRIP_5G_ANT [21]
C2128
C2127
NC
NC
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 21
OF 22
6 5 4 3 2 1
REVISION RECORD
D D
C C
SH2202
M6100-BB-SH SH2203
SH2201 M6100-PA-SH
M6100-SAR-SH
1 1
SH2205
M6100-PMU-SH SH2206
SH2204
M6100-BL-SH
M6100-RF-SH
1 1
B B
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 22
OF 22