6 5 4 3 2 1

REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

SDM660 GPIO Configuration For Starlord SSC_12 LPI_UART_1_TX

GPIO_0 GPIO_42 NC GPIO_84

BLSP_SPI_MOSI_1 UIM2_CLK SSC_13 LPI_UART_1_RX

GPIO_1 GPIO_43 GPIO_85 NC

BLSP_SPI_MISO_1 NC UIM2_RESET SSC_14

GPIO_2 GPIO_44 NC GPIO_86 SSC_15 NC

BLSP_SPI_CS1_N_1 UIM2_PRESENT
GPIO_45 SSC_16 NC
GPIO_3 NC GPIO_87 UIM1_DATA
BLSP_SPI_CLK_1
SSC_17 NC
GPIO_4 GPIO_46 CAM0_RST_N GPIO_88
BLSP_UART_TX_2 UIM1_CLK
SSC_18 WCD_SDM_MCLK
GPIO_5 GPIO_47 GPIO_89
BLSP_UART_RX_2 CAM1_RST_N UIM1_RESET
SSC_19 LPI_AUD_SB_CLK
GPIO_6 GPIO_48 GPIO_90
BLSP_I2C_SDA_2 CAM2_RST_N UIM1_PRESENT SSC_20 LPI_AUD_SB_DATA0

GPIO_7 GPIO_49 GPIO_91

BLSP_I2C_SCL_2 NC UIM_BATT_ALARM SSC_21 LPI_AUD_SB_DATA1

GPIO_8 GPIO_50 GPIO_92 GRFC_0 SSC_22

BLSP_SPI_MOSI_3 CAM_AVDD_EN LPI_AUD_CDC_INT1

GPIO_51 SSC_23 LPI_AUD_CDC_INT2

GPIO_9 CAM_AVDD_EN GPIO_93 NC
BLSP_SPI_MISO_3
SSC_24 LPI_AUD_CDC_RSTN
GPIO_10 GPIO_52 NC GPIO_94 NC
BLSP_SPI_CS_N_3
NC
SSC_25
GPIO_11 GPIO_53 GPIO_95 NC
BLSP_SPI_CLK_3 LCD0_RESET_N SSC_26 NC
GPIO_12 GPIO_54 GPIO_96 WDOG_DISABLE NC
NC SD_CARD_DET_N SSC_27
C C
GPIO_13 NC GPIO_55 GPIO_97 NC SSC_29 NC
DP_EN_N
LPI_QCA_SB_CLK
GPIO_56 SSC_30
GPIO_14 BLSP_I2C_SDA_4 GPIO_98 NC
USBC_ORIENTATION
SSC_31 LPI_QCA_SB_DATA0
GPIO_15 GPIO_57 GPIO_99 QLINK_REQUEST
BLSP_I2C_SCL_4 FORCED_USB_BOOT

GPIO_16 GPIO_58 GPIO_100 QLINK_ENABLE

BLSP_UART_TX_5 USB_PHY_PS

GPIO_17 BLSP_UART_RX_5
GPIO_59
MDP_VSYNC_P
GPIO_101 RFFE1_DATA - WTR6955 debug GROOT GPIO Configuration For Starlord
GPIO_18 GPIO_60 GPIO_102 RFFE1_CLK - WTR6955 debug
BLSP_UART_CTS_N_5 NC
GPIO_1 OPTION1 GPIO_8 SLB
GPIO_19 GPIO_61 GPIO_103 RFFE2_DATA - (42)QFE2101 ch0, (43)QFE4360
BLSP_UART_RFR_N_5 NC
GPIO_2 DIV_CLK2 GPIO_9 uUSB_TYPEC
GPIO_20 GPIO_62 GPIO_104 RFFE2_CLK - (42)QFE2101 ch0, (43)QFE4360
FP_SUB_RESET NC GPIO_10 WCSS_VCTRL
GPIO_3 DIV_CLK1
GPIO_63 NC
GPIO_21 SMB_STAT NC GPIO_105
GPIO_4 NFC_CLK_REQ GPIO_11 HOMEKEY_FP_PM_INT
GPIO_64 NC
GPIO_22 BLSP_I2C_SDA_6 NC GPIO_106
GPIO_5 WLAN_SW_CTRL GPIO_12 WIPWR_MODE
GPIO_65 NC
GPIO_23 BLSP_I2C_SCL_6 GPIO_107 RFFE4_DATA - (53)QAT3514, (53)QAT3550
GPIO_6 SLP_CLK GPIO_13 PM_A_GPIO_13
GPIO_24 GPIO_66 TS_RESET_N GPIO_108 RFFE4_CLK - (53)QAT3514, (53)QAT3550
NC
GPIO_7 UIM_BATT_ALARM
GPIO_25 GPIO_67 GPIO_109 RFFE5_DATA
NC TS_INT_N

GPIO_26 GPIO_68 GPIO_110 RFFE5_CLK

WSA_SPKR_SD_N_1 ACC_GYRO_DATA_AVA_INT_N

GPIO_69
GPIO_27
WSA_SPKR_SD_N_2 ACC_GYRO_MOT_INT_N GPIO_111 RFFE6_DATA
DRAX GPIO Configuration For Starlord
GPIO_28 GPIO_70 GPIO_112 RFFE6_CLK
NFC_IRQ MAG_INT_N
GPIO_1 OPTION2 GPIO_8 SD_CARD_DET_N
GPIO_29 GPIO_71 GPIO_113 NC
NFC_EN ALSP_INT_N
GPIO_2 LPI_PWR_EN GPIO_9 WCSS_VCTRL
GPIO_30 GPIO_72 SSC_0
NFC_DWL_REQ FP_INT_N_1 LPI_SPI_1_CS1_N
GPIO_10 SLB
B GPIO_73
GPIO_3 FRONT_CAM_DVDD_EN B
GPIO_31 NFC_ESE_PWR_REQ SSC_1 LPI_PWR_EN
NC
GPIO_4 REAR_CAM_DVDD_EN GPIO_11 LP4x_CTRL
GPIO_32 GPIO_74 SSC_2
CAM_MCLK0 NC LPI_I2C_3_SDA NC
GPIO_5 GPIO_12 LP4x_MODE
GPIO_33 GPIO_75 NC
CAM_MCLK1 SSC_3 LPI_I2C_3_SCL
GPIO_6 FP_VDD_EN
GPIO_34 CAM_MCLK2 GPIO_76 NC SSC_4 LPI_SPI_2_CS_N
GPIO_7 KEY_VOL_UP_N
GPIO_35 GPIO_77
AUDIO_USBC_EN2_N SSC_5 LPI_SPI_2_CLK

GPIO_36 GPIO_78
CCI_I2C_SDA0 WMSS_RESETN SSC_6 LPI_SPI_2_MOSI

GPIO_37 GPIO_79 PWM_CNTRL SSC_7 LPI_SPI_2_MISO

CCI_I2C_SCL0

GPIO_38 GPIO_80 AUDIO_USBC_EN1 LPI_SPI_1_CS_N

CCI_I2C_SDA1 SSC_8
B
GPIO_39 GPIO_81
CCI_I2C_SCL1 MSS_LTE_COXM_TXD SSC_9 LPI_SPI_1_CS_N

GPIO_40 GPIO_82
NC MSS_LTE_COXM_RXD SSC_10 LPI_SPI_1_MOSI

GPIO_41 GPIO_83 SSC_11

FL_STROBE_TRIG UIM2_DATA LPI_SPI_1_MISO

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 1 OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U201-A

[17,33,51,52]
U201-L

D [17,33,51,52] U201-I
[17,33,51,52]
D
CONTROL [17,33,51,52] [17,33,51,52]
[5] LNBBCLK1 AT30 CXO SDC1_RCLK B20 SDC1_RCLK [10]
0R CONTROL R209
[5] LNBBCLK1_EN AU31 CXO_EN SDC1_CLK A23 0201 SDC1_CLK [10]
[17,33,51,52] [10] EBI1_CA0_CS_0 D34 EBI1_CS_0 EBI_CAL D2 0201
R208 DDR_VDDQ [10]
SDC1_CMD A19 SDC1_CMD [10]
CONTROL [10] EBI1_CA0_CS_1 D32 EBI1_CS_1 240R/1%
[5,20]SLEEP_CLK AV30 SLEEP_CLK SDC1_DATA_0 C25 SDC1_DATA_0 [10] D8 C204
[10] EBI0_CA0_CS_0 EBI0_CS_0
SDC1_DATA_1 C19 SDC1_DATA_1 [10] D10
[10] EBI0_CA0_CS_1 EBI0_CS_1 E29 E39 1.0uF
0R [10] EBI1_CA0_CK_C EBI1_CK_C DDR_RESET_N DDR_RESET_N [10]
[5] PON_RESET_N 0201 AT32 RESIN_N SDC1_DATA_2 C23 SDC1_DATA_2 [10]
[10] EBI1_CA0_CK_T F28 EBI1_CK_T
R202
[10] RESOUT_N B22 RESOUT_N SDC1_DATA_3 D26 SDC1_DATA_3 [10] E13
C203 [10] EBI0_CA0_CK_C EBI0_CK_C
SDC1_DATA_4 D20 SDC1_DATA_4 [10] F14
[10] EBI0_CA0_CK_T EBI0_CK_T [10] EBI1_CA0_CKE_0 C37 EBI1_CKE_0
22nF R210
VREG_L13A_1P8 NC_10K AU37 D22 SDC1_DATA_5 [10]
0201 MODE_0 SDC1_DATA_5 C31
[10] EBI1_CA0_CKE_1 EBI1_CKE_1
R211 NC_10K AV38 C17
0201 MODE_1 SDC1_DATA_6 SDC1_DATA_6 [10] [10] EBI0_CA0_CKE_0 C5 EBI0_CKE_0 EBI1_DQ_0 C41 EBI1_DQ_0 [10]
SDC1_DATA_7 D16 SDC1_DATA_7 [10] C11
[10] EBI0_CA0_CKE_1 EBI0_CKE_1 A35 B40
[10] EBI1_DMI_0 EBI1_DM_0 EBI1_DQ_1 EBI1_DQ_1 [10]
[5] SDM_PS_HOLD AU29 PS_HOLD C1 [10]
EBI0_DQ_0 EBI0_DQ_0 A29 B38 EBI1_DQ_2
[10] EBI1_DMI_1 EBI1_DM_1 EBI1_DQ_2 [10]
[10] EBI0_DMI_0 A7 EBI0_DM_0 EBI0_DQ_1 B2 EBI0_DQ_1 [10] B36
0R EBI1_DQ_3 EBI1_DQ_3 [10]
K38 H38
TP4 TP3 TP2 TP5 TP1

SDC2_CLK [13]
NC NC NC NC NC

SRST_N SDC2_CLK 0201 A13 EBI0_DM_1 EBI0_DQ_2 B4 EBI0_DQ_2 [10] E35 A39
[10] EBI0_DMI_1 [10] EBI1_DQS_C_0 EBI1_DQS_0_C EBI1_DQ_4 EBI1_DQ_4 [10]
R207
G41 TCK SDC2_CMD J37 SDC2_CMD [13] B6
EBI0_DQ_3 EBI0_DQ_3 [10] D36 A37
[10] EBI1_DQS_T_0 EBI1_DQS_0_T EBI1_DQ_5 EBI1_DQ_5 [10]
F40 TDI SDC2_DATA_0 H36 SDC2_DATA_0 [13] E7 A3
[10] EBI0_DQS_C_0 EBI0_DQS_0_C EBI0_DQ_4 EBI0_DQ_4 [10] B34 EBI1_DQ_6
EBI1_DQ_6 [10]
G39 TDO SDC2_DATA_1 G37 SDC2_DATA_1 [13] D6 A5
[10] EBI0_DQS_T_0 EBI0_DQS_0_T EBI0_DQ_5 EBI0_DQ_5 [10] D28 A33
[10] EBI1_DQS_C_1 EBI1_DQS_1_C EBI1_DQ_7 EBI1_DQ_7 [10]
H40 TMS SDC2_DATA_2 L35 SDC2_DATA_2 [13] B8 EBI0_DQ_6 [10]
EBI0_DQ_6 [10] EBI1_DQS_T_1 E27 EBI1_DQS_1_T EBI1_DQ_8 B26 EBI1_DQ_8 [10]
J39 K36
TP6
NC

TRST_N SDC2_DATA_3 SDC2_DATA_3 [13] [10] EBI0_DQS_C_1 D14 EBI0_DQS_1_C EBI0_DQ_7 A9 EBI0_DQ_7 [10] B24
EBI1_DQ_9 EBI1_DQ_9 [10]
E15 EBI0_DQS_1_T EBI0_DQ_8 B16 EBI0_DQ_8 [10] D30 A25
[10] EBI0_DQS_T_1 [10] EBI1_CA0_CA_0 EBI1_CA_0 EBI1_DQ_10 EBI1_DQ_10 [10]
USB1_HS_DM BA39 USB_HS_DM [13] B18
EBI0_DQ_9 EBI0_DQ_9 [10] [10] EBI1_CA0_CA_1 E31 EBI1_CA_1 EBI1_DQ_11 A27 EBI1_DQ_11 [10]
E17 UFS_RESET USB1_HS_DP AY38 USB_HS_DP [13] D12 A17
[10] EBI0_CA0_CA_0 EBI0_CA_0 EBI0_DQ_10 EBI0_DQ_10 [10] [10] EBI1_CA0_CA_2 E37 B28 EBI1_DQ_12 [10]
EBI1_CA_2 EBI1_DQ_12
F22 UFS_REF_CLK E11 A15
[10] EBI0_CA0_CA_1 EBI0_CA_1 EBI0_DQ_11 EBI0_DQ_11 [10] F34 A31 EBI1_DQ_13 [10]
[10] EBI1_CA0_CA_3 EBI1_CA_3 EBI1_DQ_13
A21 UFS_REXT E5 B14
[10] EBI0_CA0_CA_2 EBI0_CA_2 EBI0_DQ_12 EBI0_DQ_12 [10] E33 B30 EBI1_DQ_14
[10] EBI1_CA0_CA_4 EBI1_CA_4 EBI1_DQ_14 [10]
USB2_HS_DM AT38 F8 A11
[10] EBI0_CA0_CA_3 EBI0_CA_3 EBI0_DQ_13 EBI0_DQ_13 [10] D38 B32
[10] EBI1_CA0_CA_5 EBI1_CA_5 EBI1_DQ_15 EBI1_DQ_15 [10]
E25 UFS_RX0_M USB2_HS_DP AR39 E9 B12
[10] EBI0_CA0_CA_4 EBI0_CA_4 EBI0_DQ_14 EBI0_DQ_14 [10]
E23 UFS_RX0_P D4 B10
[10] EBI0_CA0_CA_5 EBI0_CA_5 EBI0_DQ_15 EBI0_DQ_15 [10]
E19 UFS_TX0_M USB0_SS_RX_M AY36

F20 UFS_TX0_P USB0_SS_RX_P AW35

USB0_SS_TX_M AW37

USB0_SS_TX_P AV36

USB1_SS_RX_M AV40

USB1_SS_RX_P AW41

USB1_SS_TX_M AW39

USB1_SS_TX_P AY40

C205
USB1_SS_REXT AY34 0201

C DNC_6 AT40 100R 1%

C
R201
USB1_HS_REXT BA35 0201
4.02k 1%
BA19 DNC_1
R206
AY20 DNC_2 USB2_HS_REXT AR41 0201
NC
BA15 DNC_3
V38 DNC_4 SPMI_CLK AR27 SPMI_CLK [5,8]
U39 DNC_5 SPMI_DATA AT28 SPMI_DATA [5,8]

U201-J
[17,33,51,52] U201-K

[17,33,51,52]

[17,33,51,52]

CONTROL [17,33,51,52]
AE1 GND_1 GND_51 U1
CONTROL
BA33 GND_2 GND_52 U41 AF34 AR31
GND_101 GND_152
AM14 GND_3 GND_53 U7 M20 AY14
GND_102 GND_153
F10 GND_4 GND_54 V12 M22 AR33
GND_103 GND_154
F12 GND_5 GND_55 V14 M24 AR35
GND_104 GND_155
F16 GND_6 GND_56 V18 M26 AR9
GND_105 GND_156
F18 GND_7 GND_57 C13 M30 AT16
GND_106 GND_157
Y28 GND_8 GND_58 V20 M32 AT36
GND_107 GND_158
Y34 GND_9 GND_59 V22 M28 AU1
GND_108 GND_159
M6 GND_10 GND_60 V24 AE29 AU35
GND_109 GND_160
M8 GND_11 GND_61 V26 AF20 AU39
GND_110 GND_161
U9 GND_12 GND_62 V28 A1 AU41
GND_111 GND_162
BA37 GND_13 GND_63 V30 A41 AM8
GND_112 GND_163
L5 GND_14 GND_64 V32 AA1 AY16
GND_113 GND_164
H8 GND_15 GND_65 V8 AA35 AN1
GND_114 GND_165
F36 GND_16 GND_66 W9 AA41 AN11
GND_115 GND_166
F38 GND_17 GND_67 Y14 AB24 AN19
GND_116 GND_167
F4 GND_18 GND_68 C15 AB26 BA13
GND_117 GND_168
F6 GND_19 GND_69 Y20 AB28 BA17
GND_118 GND_169
C21 GND_20 GND_70 Y22 AB34 BA21
GND_119 GND_170
C27 GND_21 GND_71 Y24 AE35 BA25
GND_120 GND_171
C29 GND_22 GND_72 Y26 AB8 AG33
GND_121 GND_172
C3 GND_23 GND_73 P14 AC31 AH14
GND_122 GND_173
BA41 GND_24 GND_74 P16 AD10 AH16
GND_123 GND_174
C33 GND_25 GND_75 R17 AD12 BA1
GND_124 GND_175
C35 GND_26 GND_76 R9 AD14 AH18
GND_125 GND_176
B C39 GND_27 GND_77 AJ23 AD28 GND_126 GND_177 AH20 B
C7 GND_28 GND_78 AG27 AD34 AH24
GND_127 GND_178
C9 GND_29 GND_79 AF24 AM18 AH28
GND_128 GND_179
D18 GND_30 GND_80 AA13 AM24 AH34
GND_129 GND_180
D24 GND_31 GND_81 N25 AM28 AH8
GND_130 GND_181
D40 GND_32 GND_82 G35 AE41 AJ1
GND_131 GND_182
E1 GND_33 GND_83 G5 AM34 AJ19
GND_132 GND_183
E21 GND_34 GND_84 G7 AE7 AJ35
GND_133 GND_184
BA5 GND_35 GND_85 H30 AF14 AJ41
GND_134 GND_185
E3 GND_36 GND_86 H4 AF16 BA29
GND_135 GND_186
E41 GND_37 GND_87 J1 AF18 AJ7
GND_136 GND_187
M34 GND_38 GND_88 J3 AN23 AK14
GND_137 GND_188
N15 GND_39 GND_89 J41 AN35 AK18
GND_138 GND_189
N41 GND_40 GND_90 AF28 AN41 AK24
GND_139 GND_190
P12 GND_41 GND_91 K30 AN7 AK28
GND_140 GND_191
F24 GND_42 GND_92 K4 AP10 AK34
GND_141 GND_192
F26 GND_43 GND_93 L15 AW15 AK8
GND_142 GND_193
F30 GND_44 GND_94 L19 AP12 AL29
GND_143 GND_194
F32 GND_45 GND_95 L3 AP14 AL33
GND_144 GND_195
BA9 GND_46 GND_96 M10 AP16 AL9
GND_145 GND_196
T12 GND_47 GND_97 M12 AP18 GND_146
T18 GND_48 GND_98 M14 AP24 GND_147
T34 GND_49 GND_99 M16 AP28 GND_148
T4 GND_50 GND_100 M2 AP34 GND_149
AP40 GND_150
AR29 GND_151

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 2 OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U201-D

[17,33,51,52]

U201-H

[17,33,51,52] [17,33,51,52]

CONTROL
[12]
D MIPI_CSI0_CLK_P

MIPI_CSI0_CLK_N [12]
AT2

AR3
MIPI_CSI0_DCLK_P [17,33,51,52] D
MIPI_CSI0_DCLK_M CONTROL
MIPI_CSI0_DATA0_P [12] AR1 V6 T2
MIPI_CSI0_DLN0_P [20] COEX_CLK WCSS_CXM_RFA_CMD_CLK RF_XO_CLK WLAN_5G_CLK_OUT [20]
MIPI_CSI0_DATA0_N [12] AP2 AJ37 U5
MIPI_CSI0_DLN0_M MIPI_DSI0_CLK_N MIPI_DSI0_CLK_N [12] [20] COEX_DATA WCSS_CXM_RFA_CMD_DATA
[12] R321
MIPI_CSI0_DATA1_P AN3 AH38 AY32
MIPI_CSI0_DLN1_P MIPI_DSI0_CLK_P MIPI_DSI0_CLK_P [12] QREFS_CXO_REXT 0201
MIPI_CSI0_DATA1_N [12] AM4 AH36 Y4 3.01K
MIPI_CSI0_DLN1_M MIPI_DSI0_LN0_N MIPI_DSI0_LANE0_N [12] [20] WL_CMD_CLK_CH0 WCSS1_BBD_RFA_CMD_CLK
MIPI_CSI0_DATA2_P [12] AM2 AG37 Y6
MIPI_CSI0_DLN2_P MIPI_DSI0_LN0_P MIPI_DSI0_LANE0_P [12] [20] WL_CMD_DATA_CH0 WCSS1_BBD_RFA_CMD_DATA
MIPI_CSI0_DATA2_N [12] AL3 AF38
MIPI_CSI0_DLN2_M MIPI_DSI0_LN1_N MIPI_DSI0_LANE1_N [12]
MIPI_CSI0_DATA3_P [12] AL1 AE39 W7
MIPI_CSI0_DLN3_P MIPI_DSI0_LN1_P MIPI_DSI0_LANE1_P [12] WCSS2_BBD_RFA_CMD_CLK
MIPI_CSI0_DATA3_N [12]
AK2 MIPI_CSI0_DLN3_M MIPI_DSI0_LN2_N AE37 MIPI_DSI0_LANE2_N [12] W5 WCSS2_BBD_RFA_CMD_DATA
MIPI_CSI1_CLK_P [12] AT4 MIPI_CSI1_DCLK_P MIPI_DSI0_LN2_P AD38 MIPI_DSI0_LANE2_P [12]

MIPI_CSI1_CLK_N [12] AU3 AD36 MIPI_DSI0_LANE3_N [12]

MIPI_CSI1_DCLK_M MIPI_DSI0_LN3_N
MIPI_CSI1_DATA0_P [12] AU5 MIPI_CSI1_DLN0_P MIPI_DSI0_LN3_P AC37 MIPI_DSI0_LANE3_P [12] [5,8] WCSS_VCTRL M4 WLAN_PWR_EN
MIPI_CSI1_DATA0_N [12] AV4 MIPI_CSI1_DLN0_M
1.4K/1% 6.04K/1%
MIPI_CSI1_DATA1_P [12] AV2 AK40 L1 AW17 QLINK_CLK_M [15]
MIPI_CSI1_DLN1_P MIPI_DSI0_REXT 0201 0201 WLAN1_DAC_REXT QLINK_CLK_M
[12] R318 R319
MIPI_CSI1_DATA1_N AW1 MIPI_CSI1_DLN1_M MIPI_DSI1_CLK_N AH40 [20] WL_BB_IN_TX J7 WLAN1_ADC_IM QLINK_CLK_P AV16 QLINK_CLK_P [15]
MIPI_CSI1_DATA2_P AW3 MIPI_CSI1_DLN2_P MIPI_DSI1_CLK_P AG41 H6 WLAN1_ADC_IP
[20] WL_BB_IP_TX
MIPI_CSI1_DATA2_N AY2 MIPI_CSI1_DLN2_M MIPI_DSI1_LN0_N AG39 K6 WLAN1_ADC_QM QLINK_DL0_M AU15 QLINK_RX0_M [15]
[20] WL_BB_QN_TX
MIPI_CSI1_DATA3_P AY4 MIPI_CSI1_DLN3_P MIPI_DSI1_LN0_P AF40 [20] WL_BB_QP_TX J5 WLAN1_ADC_QP QLINK_DL0_P AT14 QLINK_RX0_P [15]

?
MIPI_CSI1_DATA3_N BA3 MIPI_CSI1_DLN3_M MIPI_DSI1_LN1_N AD40 QLINK_DL1_M AV14 QLINK_RX1_M [15]
MIPI_CSI2_CLK_P [12] 6.04K/1%
AR5 MIPI_CSI2_DCLK_P MIPI_DSI1_LN1_P AC41 0201 K2 WLAN2_DAC_REXT QLINK_DL1_P AU13 QLINK_RX1_P [15]
MIPI_CSI2_CLK_N [12] R320
AP6 MIPI_CSI2_DCLK_M MIPI_DSI1_LN2_N AC39 [20] WL_BB_IN_RX F2 WLAN2_ADC_IM QLINK_DL2_M AV12 QLINK_RX2_M [15]
MIPI_CSI2_DATA0_P [12] AP4 AB40 G3 AW13
MIPI_CSI2_DLN0_P MIPI_DSI1_LN2_P [20] WL_BB_IP_RX WLAN2_ADC_IP QLINK_DL2_P QLINK_RX2_P [15]
MIPI_CSI2_DATA0_N [12] AN5 AB38 H2 AU17
MIPI_CSI2_DLN0_M MIPI_DSI1_LN3_N [20] WL_BB_QN_RX WLAN2_ADC_QM QLINK_UL0_M QLINK_TX_M [15]
MIPI_CSI2_DATA1_P [12] AM6 AA39 G1 AV18
MIPI_CSI2_DLN1_P MIPI_DSI1_LN3_P [20] WL_BB_QP_RX WLAN2_ADC_QP QLINK_UL0_P QLINK_TX_P [15]
MIPI_CSI2_DATA1_N [12] AL7 AL41
MIPI_CSI2_DLN1_M MIPI_DSI1_REXT
MIPI_CSI2_DATA2_P [12] AL5 MIPI_CSI2_DLN2_P
MIPI_CSI2_DATA2_N [12] AK6 MIPI_CSI2_DLN2_M
MIPI_CSI2_DATA3_P [12] AK4 AU33
MIPI_CSI2_DLN3_P EDP_AUX_N
MIPI_CSI2_DATA3_N [12] AJ5 AV34
MIPI_CSI2_DLN3_M EDP_AUX_P

C U201-C C
[17,33,51,52]

[17,33,51,52]

CONTROL
AJ3 LPI_GPIO_0

[8] LPI_PWR_EN AH4 LPI_GPIO_1

U201-B
[3,14] I2C_SENSORS_SDA AC1 LPI_GPIO_2
[17,33,51,52]
[3,14] I2C_SENSORS_SCL AD2 LPI_GPIO_3
AH6 LPI_GPIO_4
[17,33,51,52]
AG5 LPI_GPIO_5
CONTROL
AK36 AN37 FORCED_USB_BOOT [13] AG7 LPI_GPIO_6
GPIO_0 GPIO_57
AL35 AV32 AF6 LPI_GPIO_7
GPIO_1 * * GPIO_58
AL37 W41 LCD_TE [12] AG3 LPI_GPIO_8
[3,12] I2C_TP_SDA GPIO_2 * GPIO_59
GPIO58 GND for uUSB.

R317
AM36 AA37 AF2

0201
10K
[3,12] I2C_TP_SCL GPIO_3 * GPIO_60 LPI_GPIO_9
TP11 AN39 GPIO_4 GPIO_61 N35 PM660 39 pin for Type C AH2 LPI_GPIO_10
TP10 AP38 Y40 AG1
GPIO_5 * GPIO_62 LPI_GPIO_11

[3,7,10] BLSP2_I2C_SDA AJ39 N39 [20] SENS_RXD U3 LPI_GPIO_12

GPIO_6 * GPIO_63

[3,7,10] BLSP2_I2C_SCL AK38 AL39 V4 LPI_GPIO_13

GPIO_7 * GPIO_64 [20] SENS_TXD
[14] BLSP_SPI3_MOSI V36 AT12 W1 LPI_GPIO_14
GPIO_8 * GPIO_65
W35 V40 TP_RESET_N [12] Y2 LPI_GPIO_15
[14] BLSP_SPI3_MISO GPIO_9 * * GPIO_66

[14] BLSP_SPI3_CS_N W37 W39 TP_INT_N [12] AE3 LPI_GPIO_16

GPIO_10 * * GPIO_67

[14] BLSP_SPI3_CLK Y36 P38 ACC_GYRO_INT1 [14] AF4 LPI_GPIO_17

GPIO_11 * GPIO_68

[11] AUDIO_MI2S_SCK K40 P40 ACC_GYRO_INT2 [14] [9] LPI_CDC_PDM_CLK AA7 LPI_GPIO_18
GPIO_12 * GPIO_69

[11] AUDIO_MI2S_WS L39 R39 HALL_EINT2 [13] [9] LPI_CDC_PDM_SYNC AA5 LPI_GPIO_19
GPIO_13 * * GPIO_70
[11] AUDIO_MI2S_D0 L41 R41 [14] [9] LPI_CDC_PDM_TX AB6 LPI_GPIO_20
GPIO_14 * GPIO_71 ALSP_INT_N
M40 T40 FP_INT_N_1 [14] [9] LPI_CDC_PDM_RX0 AC7 LPI_GPIO_21
[11] AUDIO_MI2S_D1 GPIO_15 * GPIO_72
[20] RXD P6 P36 AUDIO_INT [11] [9] LPI_CDC_PDM_RX0_DRE AC5 LPI_GPIO_22
GPIO_16 * GPIO_73
AD6
[20] TXD R7 GPIO_17 * * GPIO_74 R35 ANT_CHECK [18]
RF_ANT_CHECK [9] LPI_CDC_PDM_RX1 LPI_GPIO_23

[20] RTS P8 R37 HALL_EINT1 [13] [9] LPI_CDC_PDM_RX1_DRE AD4 LPI_GPIO_24

GPIO_18 * GPIO_75

[20] N7 T36 CAPSENSOR_EINT_GPIO76 [9] LPI_CDC_PDM_RX2 AE5 LPI_GPIO_25

CTS GPIO_19 * GPIO_76

[14] FP_SUB_RESET U35 T38 AUDIO_PA_RST [11] AA3 LPI_GPIO_26

GPIO_20 * GPIO_77

SMB_STAT AM38 U37 WMSS_RESETN [15] AB4 LPI_GPIO_27

[7] GPIO_21 * * GPIO_78
P4 AY18 AB2 LPI_GPIO_28
[3,11] BLSP_I2C_SDA_6 GPIO_22 * GPIO_79 SDM_HAPT_PWM [5]
[3,11] BLSP_I2C_SCL_6 N3 AW19 AC3 LPI_GPIO_29
GPIO_23 GPIO_80
M38 R5 [20] [20] SB_CLK W3 LPI_GPIO_30
[14] IR_LED_EN GPIO_24 GPIO_81 COEX_RXD
N37 T6 COEX_TXD [20] [20] SB_DATA V2 LPI_GPIO_31
GPIO_25 * * GPIO_82
L37 GPIO_26 * GPIO_83 AY26 UIM2_DATA [13]

M36 GPIO_27 * GPIO_84 BA27 UIM2_CLK [13]

R3 GPIO_28 * * GPIO_85 AW27 UIM2_RESET [13]
N5 GPIO_29 * * GPIO_86 AY28 UIM2_PRESENT [13]

B P2 GPIO_30 * * GPIO_87 AV28 UIM1_DATA [13]

B
R1 GPIO_31 * GPIO_88 AW29 UIM1_CLK [13]
R327
[12] CAM_MCLK0 0402 AU9 GPIO_32 GPIO_89 AY30 UIM1_RESET [13]
0R R328
[12] CAM_MCLK1 0402 AV6 GPIO_33 * GPIO_90 BA31 UIM1_PRESENT [13]
0R
AV8 GPIO_34 * GPIO_91 AW25 UIM_BATT_ALARM [5]
R329
[12] CAM_MCLK2 0402 AW9 GPIO_35 GPIO_92 AV20
0R
[3,12] CCI_I2C_SDA0 BA7 GPIO_36 GPIO_93 AW21 PRX_TUNER_SW1 [13]
C301

C303
C302

[3,12] CCI_I2C_SCL0 AY8 GPIO_37 GPIO_94 AY22 PRX_TUNER_SW2 [13] Reserved for main antenna tuner
NC NC NC AU7 BA23
[3,12] CCI_I2C_SDA1 GPIO_38 GPIO_95 PRX_TUNER_SW3 Reserved for diversity antenna tuner
[3,12] CCI_I2C_SCL1 AT8 GPIO_39 GPIO_96 AW23
PRX_TUNER_SW4
[3] GPIO40_ID3 AT10 GPIO_40 * GPIO_97 AY24 DRX_TUNER_SW1 [19]

[8] FL_STROBE_TRIG AR11 GPIO_41 * * GPIO_98 AV24 DRX_TUNER_SW2 [19] Board ID

[3] ID0 AV10 GPIO_42 * GPIO_99 AT18 QLINK_REQUEST [15]
VREG_L13A_1P8
[3] ID1 BA11 GPIO_43 * GPIO_100 AU19 QLINK_ENABLE [15]
VREG_L13A_1P8 VREG_L13A_1P8 VREG_L13A_1P8 VREG_L13A_1P8
[3] ID2 AY6 GPIO_44 * * GPIO_101 AR19 RFFE1_DATA [15] VREG_L11A_1P8
VREG_L14A_1P8
[12] GPIO45_CAM_DVDD_EN AU11 GPIO_45 GPIO_102 AT20 [15]
* RFFE1_CLK
[12] REAR_CAM_DVDD_EN_2 AW5 GPIO_46 * * GPIO_103 AU21 RFFE2_DATA [16,18]

2.2K

R305
0201
2.2K

R302
0201
[12] CAM1_RST_N AT6 GPIO_47 GPIO_104 AV22 RFFE2_CLK
*
[16,18]

2.2K
0201

100K
R331
100K

100K

0201
R304

2.2K

0201
R312
0201

0201
100K
0201

0201
2.2K

R307
R309

R311
R313
[12] CAM2_RST_N AY12 GPIO_48 * * GPIO_105 AT22

2.2K
0201
R308
[12] LDM_IDO AR7 GPIO_49 * GPIO_106 AU23

[12] CAM_AF_VDD_EN AW11 GPIO_50 * * GPIO_107 AR23 RFFE4_DATA [19] BLSP2_I2C_SDA [3,7,10] [3] ID0
[3] ID1
AW7 GPIO_51 GPIO_108 AT24 RFFE4_CLK [19]
[12] CAM_AVDD_EN *
[3] ID2
I2C_SENSORS_SDA [3,14] CCI_I2C_SDA0 [3,12] BLSP2_I2C_SCL [3,7,10]
[12] CAM3_RST_N AY10 GPIO_52 * * GPIO_109 AU25
[3] GPIO40_ID3
[12] LCD_RESET Y38 GPIO_53 GPIO_110 AV26 CCI_I2C_SCL0 [3,12]
I2C_SENSORS_SCL [3,14]
J35 AT26

100K
0201

0201
100K
R314
[13] SD_CARD_DET_N

R315
GPIO_54 GPIO_111

R316
100K
0201
* *

R332

100K
0201
AW31 AU27
[12] LDM_ID1 GPIO_55 * GPIO_112
SMB I2C
AW33 AM40
GPIO_56 * * GPIO_113 sensor I2C camera I2C

VREG_L11A_1P8
VREG_L13A_1P8
VREG_L11A_1P8

A A

2.2K

R325
0201

2.2K

R326
0201
R301
2.2K
0201

2.2K

R310
0201
2.2K

R303
0201

R306
0201
2.2K

I2C_TP_SDA [3,12]
BLSP_I2C_SDA_6 [3,11]
CCI_I2C_SDA1 [3,12] I2C_TP_SCL [3,12]
BLSP_I2C_SCL_6 [3,11]
CCI_I2C_SCL1 [3,12]

Smart I2C LEGACY TOUCH COMPANY:

<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 3 OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D
U201-E

[17,33,51,52]

[17,33,51,52]

CONTROL
VREG_S6A AM12 VDD_MODEM_1 VDD_QFPROM_PRG AC35 VREG_L10A_1P8

C459 C402 AK10 VDD_MODEM_2

C430 C431 C432 C433 C434
[6] VREG_S6A_FB AH10
1.0uF VDD_MODEM_3
1.0uF 1.0uF 1.0uF 1.0uF
22uF 22uF AH12 VDD_MODEM_4 VREF_SDC P34 REF_MSM_HVPAD [4,5]
AK12 VDD_MODEM_5 VREF_UIM AR21

AM10 VDD_MODEM_6 C410 C411

100nF 100nF
AB22 VDD_MEM_1 VDD_APC1_1 AD30

AD16 VDD_MEM_2 VDD_APC1_2 AD32

AB20 VDD_MEM_3 VDD_APC1_3 AF30

AD18 VDD_MEM_4 VDD_APC1_4 AF32

AD20 VDD_MEM_5 VDD_APC1_5 AH30

AD22 VDD_MEM_6 VDD_APC1_6 AH32 VREG_S2A_S3A_0P87

VREG_S5B_0P915 AD24 VDD_MEM_7 VDD_APC1_7 AK30

C407 C422 C417 C413 C412
C423 C420 C419 C418 C416 C414
AD26 VDD_MEM_8 VDD_APC1_8 AK32 C421 C492 C415 VSNS_GOLD_APC_P [6]
C436 C435 C403 C404 C405 C457 C455 C439 C437
C456 C438 1.0uF
SG1105 AF22 AM30 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 22uF 22uF
VDD_MEM_9 VDD_APC1_9 1.0uF 100nF 22uF
[9] VSNS_S5B_P 1.0uF 1.0uF 100nF 22uF
22uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF
22uF AF26 AM32
VDD_MEM_10 VDD_APC1_10
SG1006 VSNS_GOLD_APC_M [6]
[9] VSNS_S5B_M AB16 AP30
VDD_MEM_11 VDD_APC1_11
AJ27 VDD_MEM_12 VDD_APC1_12 AP32

T14 VDD_MEM_13 VDD_APC1_13 AM26

T16 VDD_MEM_14
V16 VDD_MEM_15
Y16 AM20
VDD_APC_SILVER Capacitors
VDD_MEM_16 VDD_APC0_1 VREG_S1A_0P87

C4241

C424
Y18 VDD_MEM_17 VDD_APC0_2 AM22 C458 C428 C426 C493
C408 C429 C427 C425
AB18 AP20 VSNS_S1A_P [6]
VDD_MEM_18 VDD_APC0_3 1.0uF 1.0uF 100nF 100nF
1.0uF 1.0uF 1.0uF 10uF 22uF
AK20 22uF
VDD_APC0_4
VSNS_S1A_M [6]
VREG_L10B_0P915 Y10 VDD_LPI_MEM_1 VDD_APC0_5 AK22
1.0uF 1.0uF Y12 AP22
VDD_LPI_MEM_2 VDD_APC0_6

C406 C453

C C

U201-G
U201-F
[17,33,51,52]
[17,33,51,52]

[17,33,51,52]
[17,33,51,52]
CONTROL
CONTROL
VDD_PLL1_1 AH22 VREG_S5B_0P915
VREG_S3B_S4B L17 VDD_CORE_1 VDD_P1 H24 VREG_S1B_1P125
VDD_PLL1_2 AH26
T24 VDD_CORE_2
VREG_L10A_1P8 AN27 VDDA_APC1_CS_1P8
T26 VDD_CORE_3 VDD_P2 K34 VREG_L2B_SDC2
C443 C442
C440 C450 C451 C445 C441 C494
C446 N17
SG1108 C444 VDD_CORE_4 1.0uF 1.0uF
[9] VSNS_S3B_S4B_P 1.0uF 100nF
22uF 1.0uF 1.0uF 1.0uF 22uF N19
22uF 22uF VDD_CORE_5
100nF C478 C479 AM16
P28 VDD_QLINK_1 VREG_L1B_0P925
VDD_CORE_6
SG1107 H10 AK16
[9] VSNS_S3B_S4B_M P22 VREG_S5B_0P915 VDD_EBI_PHY_1 VDD_QLINK_2
VDD_CORE_7
H14 VDD_EBI_PHY_2
P24 VDD_CORE_8 VDD_P3_1 AD8 VREG_L13A_1P8 C463 C464
H16 VDD_EBI_PHY_3 VDD_UFS_1P8 K24
T32 VDD_CORE_9 VDD_P3_10 K32 1.0uF 1.0uF
1.0uF 1.0uF 1.0uF 1.0uF 1.0uF K10 VDD_EBI_PHY_4
T28 VDD_CORE_10 VDD_P3_2 AF8 1.0uF 1.0uF
VDD_UFS_CORE H26
T30 AP8 C475 C476 C477 C483
VDD_CORE_11 VDD_P3_3 C474 C481 C482
VREG_L1B_0P925 H28 VDD_EBI_PHY_LV
M18 VDD_CORE_12 VDD_P3_4 AP36
VREG_L1A_1P225 K26 VDD_EBI_PHY_HV VDD_USB_SS_1P8 AP26 VREG_L10A_1P8
P30 VDD_CORE_13 VDD_P3_5 V34

P26 VDD_CORE_14 VDD_P3_6 AR13

VDD_USB_SS_CORE AK26
P18 VDD_CORE_15 VDD_P3_7 AR37
VREG_S5B_0P915 K12 VDD_EBI_PHY_5
P20 VDD_CORE_16 VDD_P3_8 Y8
VDD_USB1_HS_CORE AJ25
P32 VDD_CORE_17 VDD_P3_9 H32
H12 VDD_EBI_PHY_6 VDD_USB2_HS_CORE AB32
R19 VDD_CORE_18
T20 VDD_CORE_19
K14 VDD_EBI_PHY_7 VDD_USB1_HS_1P8 AN25
T22 VDD_CORE_20
VDD_USB2_HS_1P8 AB36

B VREG_L9B_0P87
VDD_SSC_CX Capacitors AB10 VDD_LPI_CORE_1 VDD_P5 AR17 VSIM1
K16 VDD_EBI_PHY_8 B
1.0uF VDD_USB1_HS_3P1 AT34 VREG_L7B_3P125
1.0uF AB12 VDD_LPI_CORE_2
1.0uF
VDD_USB2_HS_3P1 AF36
C452 C485 C488
C449 L25
AR15 VREG_L10A_1P8 VDD_PLL2_1
VDD_P6 VSIM2 1.0uF
AB14 VDD_PLL2_2 VDD_WCSS_ADC_DAC_1 K8 VREG_L6A_1P3
P10 VDD_WCSS_1
1.0uF L7
T10 VDD_WCSS_2 VDD_(SERDES_1P2) Capacitors VDD_WCSS_ADC_DAC_2

VREG_L5A_0P848 VDD_WCSS Capacitors V10 VDD_WCSS_3 If SDC1(eMMC) not used, connect to GND VDD_P7 H34 C484
VREG_L13A_1P8
VREG_L1A_1P225 AE11 VDD_MIPI_CSI_1P2_1

C468 C469 AF10 VDD_MIPI_CSI_1P2_2

1.0uF C467
C448
C447 AF12 VDD_MIPI_CSI_1P2_3 VDD_PLL_WCSS T8 1.0uF VREG_L9A_1P8
1.0uF 1.0uF 1.0uF
C491
1.0uF 1.0uF C480
If UFS not used, Float this PIN VDD_P10 K28
Y32 1.0uF
VDD_MIPI_DSI_0P9_1

VREG_L1B_0P925 AA33 VDD_MIPI_DSI_0P9_2 C454

C462 VDD_EBI_IO_1 H20

VDD_P11 AR25 VREG_L10A_1P8 R402
AB30 VDD_MIPI_DSI_1P2_1 VDD_EBI_IO_2 K18 0201 VSNS_VDDIO_EBIX [10]
1.0uF
1.0uF 1R
Y30 VDD_MIPI_DSI_1P2_2 VDD_EBI_IO_3 H18
R403
C470 AA31 K20
VDD_MIPI_DSI_1P2_3 VDD_EBI_IO_4 0402 VREG_LP4X_0P6
0R
AA29 VDD_MIPI_DSI_1P2_4 VDD_EBI_IO_5 H22

K22 C465 C466 C489 C490 NC

VDD_EBI_IO_6 C409 VREG_S5B_0P915
0402
47uF R401
1.0uF 1.0uF 1.0uF 1.0uF
REF_MSM_HVPAD AG35 VREF_QREFS_1P25
C487
NOTE: INSTALL R1203 & DNI R1202 for LPDDR4X
100nF
INSTALL R1202 & DNI R1203 for LPDDR4

VDD_(SERDES_0P9) Capacitors
VDD_(1P8) Capacitors [4,8] VREG_L1B_0P925

VREG_L10A_1P8 [4,5]
C401 C460 C461
1.0uF 1.0uF 1.0uF
1.0uF
1.0uF 1.0uF 1.0uF
C471 C472 C473
C4731

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 4 OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

X501

2 THRMSTR_GND
4 U501-D U501-G P-type are psuedo-capless, cap can be at load.
THRMSTR
Regulators used internal to PMIC need cap at PMIC.
N-type > N300 need cap at PMIC
D [5] XOADC_GND
3 H2 H1 1 VERG_L1A,L2A,L3A,L4A,L5A,L6A and L7A are either N1200 or N600 which needs to be local;
VREG_L10A and VERG_L13A are also used for PMIC internal regulators, need 0.1uF local though pseudo-capless;
D
1nF 104 173 C501
GND_WLP_TST AVDD_BYP [5,8,9] VREG_S2B 165 VDD_L2_3 VREG_L1 205 VREG_L1A_1P225 [4]
OW38477001 1.0uF
C510 149
TEST_EN_VPP VREG_L2 187
C529 VREG_L2A_1P0 [15]
[5] PM_XO_THERM
210 XTAL_IN VPH_PWR_1 130 VPH_PWR 176
1.0uF VREG_L3 VREG_L3A_1P0 [15]

198 XTAL_OUT VDD_MSM_IO 139 VREG_L13A_1P8 [2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20] 194 203

[6] VREG_S5A VDD_L1_6_7 VREG_L5 VREG_L5A_0P848 [4]

64 C508
VCOIN 204 VDD_L1_6_7 VREG_L6 215 VREG_L6A_1P3 [4,20]
TP12 47uF_NC

VREG_L7 216 VREG_L7A_1P2 [15]

[13] KYPDPWR_N 71 KPD_PWR_N VREG_BOB 140 VREG_BOB [5,8,12,14] 202

VREG_L8 VREG_L8A_1P8 [10,13]

[8] PON_1 152 PON_OUT 214 192

[5,8,9] VREG_S2B VDD_L5 VREG_L9 VREG_L9A_1P8 [4,20]

195 PON_RESET_N VREF_MSM 151 REF_MSM_HVPAD [4] 190

[2] PON_RESET_N VREG_L10 VREG_L10A_1P8 [4]
R503
206 PS_HOLD 178
[2] SDM_PS_HOLD 0201
C531 VREG_L11 VREG_L11A_1P8 [3,12]
0R 0R
[13] RESIN_N 184 RESIN_N SLEEP_CLK 128 0201 SLEEP_CLK [2,20] 191 201 VREG_L12A_1P8
[5,6,9] VREG_S4A 1.0uF VDD_L8_9_10_11_12_13_14_1 VREG_L12 [15,21]
R512
TP15 218 CBL_PWR_N 213 VDD_L8_9_10_11_12_13_14_2 VREG_L13 179 VREG_L13A_1P8 [2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20]

[8] FAULT_N 217 FAULT_N 181

VREG_L14 VREG_L14A_1P8 [3,14]

211 C502 1.0uF

TP16 VREG_XO VREG_L15 110 VSIM1 [4,13]

TP17 GND_XO_1 199 132 143

[5,8,12,14] VREG_BOB VDD_L15_16_17_18_19 VREG_L16 VREG_L16A_2P7 [13,14,17,18,19]

[2,8] SPMI_CLK 108 SPMI_CLK GND_XO_2 209 154 [4,13]

VREG_L17 VSIM2
C530
[2,8] SPMI_DATA 118 SPMI_DATA 111
VREG_L18 VREG_L18A_2P85
1.0uF
VREG_L19 121 VREG_L19A_3P3 [20]

4.7uF
C520

4.7uF
C522
[5,6,9] VREG_S4A 189 200 C509

4.7uF
C514
VDD_XO_RFCLK VREG_RF_CLK

C511
2.2uF

C516
4.7uF 1.0uF 1.0uF

1.0uF
[11,16,17,45]

C513
1.0uF

2.2uF
212 1.0uF 4.7uF
1.0uF

C517
2.2uF
C521

1.0uF
GND_RF HK

C512
1.0uF

2.2uF
C523 1.0uF C527
C515 100nF C519
[20] RF_CLK1 146 RF_CLK1 C526 C528
C524 C518
C525
[15] RF_CLK2 168 RF_CLK2 GND_XO_ISO 188

0R
148 180 100nF
[2] LNBBCLK1 0201 BB_CLK1 REF_BYP
C503
R507
[2] LNBBCLK1_EN 158 BB_CLK1_EN GND_REF 169

136 BB_CLK2

137 REF_GND: Dedicated to man gnd plane right under PMIC pin
BB_CLK3
or as close to the pin as possible.

AMUX_1 161 SDM_THERM [5]

AMUX_2 172 EMMC_THERM [5]

[5] PM_XO_THERM 182 XO_THERM AMUX_3 160 PA_THERM0 [18]

[5] XOADC_GND 193 GND_XOADC AMUX_4 171

ID3 [12]

C AMUX_5 150 QUIET_THERM [5] C

ANA_IN 183 DRAX_DIE_TEMP [8]

VDD_PDPHY 72 VREG_L7B_3P125

115 100nF
GND_PD_PHY
C507
[11,16,17,45]
HK

QUIET_THERM [5] SDM_THERM [5] EMMC_THERM [5]

U501-E

0402
0402
100K¡À1% 100K¡À1%

0402
RT501 100K¡À1% RT503
RT502

NC
8 170
VPH_PWR 0201 GPIO_1 Pull Down for SDM630 NC_2
R508
51 GPIO_2 NC_1 129

63 GPIO_3

147 GPIO_4

[8,20] WLAN_SW_CTRL 7 GPIO_5

159 GPIO_6 PMK_Sleep_CLK

[3] UIM_BATT_ALARM 19 GPIO_7

[8] SLB 30 GPIO_8

29 GPIO_9 Hight for Type-C

LOW for uUSB
[3,8] WCSS_VCTRL 41 GPIO_10

52 GPIO_11

62 GPIO_12

117 GPIO_13
R510

0201
10K

R509
0201

10K

[11,16,17,45]

B HK
B

U501-C

100K
[3] 0201 50 HAP_PWM_IN
SDM_HAPT_PWM
R506 R502
VSW_HAP_P 18 0402 VSW_MOTO_P [11]

0201
1M
22nF

R505
0R

C505

R504
VPH_PWR 6 VDD_HAP VSW_HAP_M 40 0402 VSW_MOTO_M [11]
0R

U501-B 22uF

C504

28 PGND_HAP

83 GND_1 GND_CHG_1 58

93 GND_2 GND_CHG_2 69

94 GND_3 GND_CHG_3 70

105 82 84 GND_HAP
GND_4 GND_CHG_4

106 GND_5
[11,16,17,45]
114 HK
GND_6

116 GND_7

125 GND_8

126 GND_9

127 GND_10

135 GND_11

138 GND_12

[11,16,17,45]
HK

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 5 OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U501-F

D D
65 96 U501-A
VDD_S1_1 VREG_S1 VSNS_S1A_P [4]
VPH_PWR
66 VDD_S1_2
22uF 22uF 22uF 22uF 22uF

C610 C611 C612 C613 C614 2.2uF L601

VSW_S1_1 75 VREG_S1A_0P87[4] 78 56
[6,7,13] USB_VBUS USB_IN_1 USB_IN_MID_1
C616 0.47uH
VSW_S1_2 76 79 57
C617 USB_IN_2 USB_IN_MID_2
86 GND_S1_1 VSW_S1_3 77 88 67
4.7uF USB_IN_3 USB_IN_MID_3
4.7uF
87 GND_S1_2 89 68
USB_IN_4 USB_IN_MID_4
16V
C618

VREF_NEG_S1 107 VSNS_S1A_M [4]

17 VCONN_IN BOOT_CAP 36

61 VCONN_EN C623
16V
33 VDD_S2_1 VREG_S2 95
27nF

55 VDD_S2_2 5 34
[13] USB_ID CC1_ID VSW_CHG_1

2.2uF 27 CC2 VSW_CHG_2 35

L602
C602 VSW_S2_1 11 VREG_S2A_S3A_0P87 39 45
CC_OUT VSW_CHG_3
0.47uH
L607
VSW_S2_2 22 46
VSW_CHG_4 VPH_PWR
1uH
10 GND_S2_1 VSW_S2_3 44 90
[7] STAT_CHG STAT_CHG 22uF
32 GND_S2_2 VSW_S2_4 54
C619 T601

PGND_CHG_1 12

92 WIPWR_RECHG PGND_CHG_2 13

VREF_NEG_S2 85 VSNS_GOLD_APC_M [4] 91 23

WIPWR_CHG_OK PGND_CHG_3

103 QI_PMA_ON PGND_CHG_4 24

20 VDD_S3_1 VREG_S3 74 VSNS_GOLD_APC_P [4]

42 VDD_S3_3 1 3
LDO_CTRL_1 VPH_PWR1

2 LDO_CTRL_2 VPH_PWR2 15
2.2uF
L603
VSW_S3_1 9 25
C603 VPH_PWR3
0.47uH
VSW_S3_2 31 37
VPH_PWR4
21 VDD_S3_2 VSW_S3_3 53 99 47
DC_EN VPH_PWR5
43 VDD_S3_4 80 DC_SNS

C 100 USB_EN C
VREF_NEG_S3 73 101 4
[6,7,13] USB_VBUS USB_SNS VBATT_PWR_1 VBATT [13]

VBATT_PWR_2 16 10uF

[13] USB_HS_DP_PM 49 26 C620

USB_DP VBATT_PWR_3
175 VDD_S4_1 VREG_S4 174 60 38
[13] USB_HS_DM_PM USB_DM VBATT_PWR_4
186 VDD_S4_2 48
VBATT_PWR_5
208 VDD_S4_3 81
L604 [13] VBATT_CONN_VSNS_M VBATT_SNS_M
2.2uF
VSW_S4_1 185 VREG_S4A 102
C604 [7,13] VBATT_CONN_VSNS_P VBATT_SNS_P
1uH
197 22uF 22uF
VSW_S4_2 BATT_THERM_BIAS 156 BATT_THERM_BIAS [13]

VSW_S4_3 219 C605 C606 133

[13] VBATT_CONN_ISNS_M IBATT_SNS_M
196 GND_S4_1 122 145
[13] VBATT_CONN_ISNS_P IBATT_SNS_P AUX_THERM_BIAS AUX_THERM_BIAS [6]
207 GND_S4_2
R603 C621
0201 155 ISNS_SMB_M VARB 112
0R 100nF
0R
0201 144 ISNS_SMB_P
R604 C622
VREG_FG 123
1.0uF
[13] BATT_ID 113 BATT_ID
131 VDD_S5_1 VREG_S5 162 14
BOOT_PWR BOOT_PWR [7]
141 VDD_S5_2 166
[13] BATT_THERM BATT_THERM

4.7uF
C601
Note:R1804 should the value of RT1801 at 45¡ã degree REF_GND_CHG 59
L605
142 R602
2.2uF VSW_S5_1 VREG_S5A [5] 177
[6] AUX_THERM_BIAS 0201 AUX_THERM
1uH 33.2K R605
C607 VSW_S5_2 153 22uF 22uF VREG_L13A_1P8 0201
NC

0402
100K¡À1%
163 GND_S5_1 C609 157
C608 RT601 [8] BA_N BA_N
164 GND_S5_2

134 GND_FG

167 REF_GND_FG

124 GND_PSUB_FG
120 VDD_S6 VREG_S6 119 VREG_S6A_FB [4]
[11,16,17,45]
HK
2.2uF

C615 L606
VSW_S6_1 98 VREG_S6A [4]
1uH
97 GND_S6 VSW_S6_2 109

B [11,16,17,45]
B
HK

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 6 OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

U701

SMB1351

USB_VBUS 40 DCIN1 SW1 18

C704 41 19
DCIN2 SW2
16V 2.2uF
42 DCIN3 SW3 20
L701 22uF
47 DCIN4 SW4 21
1uH C702
48 DCIN5 SW5 25

D702
49 DCIN6 SW6 26

SW7 27
2.2uF
16V 33 28
MID1 SW8
C707
C705 34 MID2
47pF
35 MID3 SYS1 3

SYS2 10
C703
[3,10] BLSP2_I2C_SDA 45 SDA SYS3 17
33nF
[3,10] BLSP2_I2C_SCL 46 SCL SYS4 24
16V
100K
[6,7] BOOT_PWR 0201
R701
[6] STAT_CHG 29 EN BOOT 11
R703 NOTE:
[6,7] BOOT_PWR 0201 1 SUSP PGOOD 22
100K 1. Connect to VBATT_PWR for external 10mOhm sensing
2. Connect to VPH_PWR for internal BATFET sensing

R702
0201
NC

1M
0201 37 USBCS CHGOUT1 2 VPH_PWR

C R707
31 USB23 CHGOUT2 9 C
C708
16 10uF
CHGOUT3
C706 47pF
30 FETDRV CHGOUT4 23
10K
VREG_L13A_1P8 0201
R704
[3] SMB_STAT 43 STAT VBATT 8 VBATT_CONN_VSNS_P [6,13]

THERM 15

39 SYSON

C701 32 OTGID GND 36

10V 1uF

44 DPLUS PGND1 4

38 DMINUS PGND2 5

PGND3 6

PGND4 7

PGND5 12

PGND6 13

PGND7 14

B B

CPU RF PMU Wifi RF_SHIELDING APT CAM

SH1 SH2 SH3 SH4 SH5 SH6 SH7

M1001 M1002 M1003 M004

1 1 1 1

MARKD2MM MARKD2MM MARKD2MM MARKD2MM

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 7 OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U801-D

D U801-C
82 D

10K_NC
CMN_GND_1

0201
R802
84 CMN_GND_2

85 CMN_GND_3
10K_NC
94 102 95 CMN_GND_4
TEST_EN_VPP OPTION FOR FUTURE USE GPIO_01 0201 VPH_PWR
R801
107 145 96 CMN_GND_5
GND_WLP_TST GPIO_02 LPI_PWR_EN [3]

146 FRONT_CAM_DVDD_EN [12] 104 CMN_GND_6

GPIO_03

113 134 REAR_CAM_DVDD_EN [12] 105 CMN_GND_7

VREG_L13A_1P8 VDD_MSM_IO GPIO_04

179 106 CMN_GND_8

GPIO_05

28 83 116 CMN_GND_9
[5] PON_1 PON_1 GPIO_06 GPIO6_FLASH_EN VREG_L13A_1P8

[6] BA_N 6 97 KEY_VOL_UP_N [13]

117 CMN_GND_10
BA GPIO_07
C804
167 118 CMN_GND_11
GPIO_08
100nF
125

R803
189 [3,5]

0201
WCSS_VCTRL CMN_GND_12

NC
GPIO_09

VPH_PWR 58 VPH_PWR_1 GPIO_10 63 SLB [5]

[11,14,17,30,32,33,39,43,44,45,49,51,52]
74 Pull-up for LPDDR4 157 BUCK-BOOST_FLASH
VPH_PWR_2 GPIO_11 LP4X_CTRL_BUCK_EN [10]

GPIO_12 133 LP4X_BUCK_MODE [10]

[5] FAULT_N 80 FAULT

[2,5] SPMI_CLK 64 SPMI_CLK DIE_TEMP 49 DRAX_DIE_TEMP [5]

[2,5] SPMI_DATA 75 SPMI_DATA

88 NC1 REF_BYP 60

99 NC2 100nF

87 NC3 C805

92 NC4 REF_GND: Dedicated to man gnd plane right under PMIC pin
or as close to the pin as possible.
128 NC5 REF_GND 71

AVDD_BYP 48

[11,14,17,30,32,33,39,43,44,45,49,51,52] 1.0uF
BUCK-BOOST_FLASH
C806

C C

U801-A

17 VDD_BOB_1 VSW_BCK_BOB_1 7
VPH_PWR
L801
39 VDD_BOB_2 VSW_BCK_BOB_2 18
2.2uF 0.47uH
VSW_BCK_BOB_3 29
C801

8 PGND_BOB_1 P-type are psuedo-capless, cap can be at load.

30 PGND_BOB_2 VSW_BST_BOB_1 9 Regulators used internal to PMIC need cap at PMIC.
N-type > N300 need cap at PMIC
VSW_BST_BOB_2 19 VERG_L9B is N600 which needs to be local;
U801-F
31
VREG_L7B is also used for PMIC internal regulators, need 0.1uF local though pseudo-capless;
VSW_BST_BOB_3

53 GND_PSUB_BOB

[5,8,12,14] VREG_BOB 25 VDD_L2 VREG_L1 14 VREG_L1B_0P925 [4]

VREG_L2 36 VREG_L2B_SDC2 [4,13]

[5,20] WLAN_SW_CTRL 40 EXT_CTRL_BOB VREG_BOB_1 20

C818 C819 C820 C821 VREG_L3 123 VREG_L3B_3P0 [14]

VREG_BOB_2 42 VREG_BOB [5,8,12,14]
NC_1uF NC_1uF NC_1uF NC_1uF 112 VDD_L3_5_7_8_1 VREG_L4 51 VREG_L4B_2P95 [10]
22uF 22uF
142 VDD_L3_5_7_8_2 VREG_L5 131 VREG_L5B_2P95 [13]
C802 C803
VREG_L6 52 VREG_L6B_3P3
VREG_BOB_SNS 41

VREG_L7 143 VREG_L7B_3P125 [4,5]

62 VDD_L4_6 VREG_L8 122 VREG_L8B_3P3

VREG_L9 35 VREG_L9B_0P87 [4]

VREG_L10 13 VREG_L10B_0P915 [4]

[5,8,12,14] VREG_BOB 4 VDD_FLASH_1 FLASH_STROBE 16 FL_STROBE_TRIG [3]

C812

C811
C810
1.0uF

4.7uF

1.0uF

C815
4.7uF
C809

C816
4.7uF
3

C808

2.2uF
[5,9] VREG_S2B

C817
26 VDD_L1_9_10

1.0uF
VDD_FLASH_2

1.0uF
C814
C813
4.7uF

1.0uF
FLASH_LED1 5 FLASH_LED1 [12]
2.2uF [11,14,17,30,32,33,39,43,44,45,49,51,52]
C822
BUCK-BOOST_FLASH
C807 NC_1uF
27 GND_FLASH_1 FLASH_LED2 15 FLASH_LED2 [12]

38 GND_FLASH_2

B FLASH_LED3 37 FLASH_LED3 [12] B

[5,8,12,14] VREG_BOB 73 VDD_RGB

RGB_BLU 72

RGB_GRN 50

RGB_RED 61 RGB_RED [14]

RGB_RED LED is reserved for charging indication

[11,14,17,30,32,33,39,43,44,45,49,51,52]
BUCK-BOOST_FLASH

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 8 OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U801-E

D U801-G
D

VPH_PWR 156 VDD_S1_1 VFB_S1 135 VSNS_S1B_P [10]

L906 B903 178 VDD_S1_2

108 VDD_WLED VSW_WLED 121 VPH_PWR
VPH_PWR
4.7uH
D901 C932 2.2uF
L901
C936 144
VSW_S1_1 VREG_S1B_1P125 [4,10]
10uF C915 0.47uH
10uF 166
B902 VSW_S1_2
VREG_WLED 130 VREG_LEDA [12]
155 GND_S1_1 VSW_S1_3 188
C929 C937

47pF 177 GND_S1_2

110 4.7uF
PGND_WLED

VREF_NEG_S1 115 VSNS_S1B_M [10]

98 GNDP_WLED_SINK WLED_SINK1 129 LED_SINK1 [12]

WLED_SINK2 109 LED_SINK2 [12]

WLED_SINK3 120
VPH_PWR 2 VDD_S2_1 VFB_S2 70

24 VDD_S2_2

2.2uF
CABC 86 LCM_PWM_CABC [12] L902
C914 VSW_S2_1 1 VREG_S2B [5,8]
0.47uH
L907 VSW_S2_2 12
VPH_PWR 11 VDD_DISP_1 VSW_DISP 55 VPH_PWR
4.7uH 23 34
GND_S2_1 VSW_S2_3 22uF
21 C933 22uF
VDD_DISP_2
45 GND_S2_2
10uF C925
C924
100K
77 65
0201 DISP_HW_EN LCD_BL_EN VDISP_FB
R908 VREF_NEG_S2 59

44 VDISP_MID VDISP_P_OUT_1 22 VDISP_P_OUT [12]

10uF 10uF
VDISP_P_OUT_2 33

C930 67 VDD_S3_1 VFB_S3 93

C934 VPH_PWR VSNS_S3B_S4B_P [4]

C926 10uF 68 VDD_S3_2

C928 66 PGND_DISP
10uF C927 2.2uF
10uF 76 GND_VDISP_P L903
C916 VSW_S3_1 56 VREG_S3B_S4B [4]
0.47uH
VSW_S3_2 57
VDISP_M_OUT_1 10 VDISP_M_OUT [12]
46 GND_S3_1 VSW_S3_3 69
10uF 10uF
47 GND_S3_2
C935 C931

VREF_NEG_S3 81

C GND_DISP_M 54
C
C938
VDISP_CAP1 43
10uF 100 114
VPH_PWR VDD_S4_1 VFB_S4
VDISP_CAP2 32
101 VDD_S4_2

[11,14,17,30,32,33,39,43,44,45,49,51,52] 111 VDD_S4_3

BUCK-BOOST_FLASH
L904
VSW_S4_1 89
2.2uF
0.47uH
VSW_S4_2 90
C917

VSW_S4_3 91

78 GND_S4_1

79 GND_S4_2 VREF_NEG_S4 103 VSNS_S3B_S4B_M [4]

U801-B 176 124

VPH_PWR VDD_S5_1 VFB_S5 VSNS_S5B_P [4]

186 VDD_S5_2

187 VDD_S5_3
2.2uF
L905
VSW_S5_1 164 VREG_S5B_0P915 [4]
193 CDC_SPKDRV_P CDC_VDDIO 149 VREG_L13A_1P8 C918 0.47uH
VSW_S5_2 165
183 CDC_SPKDRV_M
VSW_S5_3 175
CDC_VDD_PA 169 VREG_S4A [5,6]
153 GND_S5_1
C901 C902 C903
154 GND_S5_2
[13] CDC_IN1_P 137 CDC_IN1_P CDC_VDD_CP 185 100nF 1.0uF 2.2uF

VREF_NEG_S5 132 VSNS_S5B_M [4]

[13] CDC_IN1_M 126 CDC_IN1_M

[13] CDC_MIC2_P 160 CDC_IN2_P CDC_VDD_SPKDRV_1 182

[11,14,17,30,32,33,39,43,44,45,49,51,52]
BUCK-BOOST_FLASH
[11] CDC_IN3_P 138 CDC_IN3_P CDC_VDD_SPKDRV_2 192 VPH_PWR

C906 C907 C908

[11,13] MIC_BIAS1 158 CDC_MIC_BIAS1

100pF 100pF 100pF

[13] MIC_BIAS2 147 CDC_MIC_BIAS2 CDC_BOOST_VREG_5V 152

C939 C940 C941

100nF 100nF 100nF 181

[11] CDC_EAR_P CDC_EAR_P

[11] CDC_EAR_M 159 CDC_EAR_M VPH_PWR

22uF
CDC_BOOST_SW 174 22uF 22uF 22uF 22uF
C922
B [3] LPI_CDC_PDM_CLK 140 CDC_PDM_CLK CDC_BOOST_SNS 162 C919 C920 C921 C923 B
[3] LPI_CDC_PDM_SYNC 161 CDC_PDM_SYNC

0R
[3] LPI_CDC_PDM_TX 151 CDC_PDM_TX CDC_HPH_REF 168 0201 CDC_HPH_REF [13]
R901

0R
CDC_HPH_L 190 0201 CDC_HPH_L [13]
R902
[3] LPI_CDC_PDM_RX0 127 CDC_PDM_RX0 CDC_HPH_R 191 0201 CDC_HPH_R [13]
R903
139 C913 0R C904 C905
[3] LPI_CDC_PDM_RX1 CDC_PDM_RX1

141 148 470pF 680pF 680pF

[3] LPI_CDC_PDM_RX2 CDC_PDM_RX2 CDC_HS_DET CDC_HS_DET [13]

[3] LPI_CDC_PDM_RX0_DRE 150 CDC_PDM_RX0_COMP CDC_GND_CP 195

[3] LPI_CDC_PDM_RX1_DRE 119 CDC_PDM_RX1_COMP

R904
CDC_GND_CFILT 136 0201 CDC_IN3_M [11]
0R
4.7uF 173 CDC_NCP_FLY_P
C910
R905
0201

184 171
0R

CDC_NCP_FLY CDC_GND_SPKDRV_1

CDC_GND_SPKDRV_2 172

194 CDC_NCP_VNEG CDC_GND_BOOST_1 163

CDC_GND_BOOST_2 196

B901
180 CDC_PA_VNEG CDC_NC 170

C912 C911 [11,14,17,30,32,33,39,43,44,45,49,51,52]

10V 10V
BUCK-BOOST_FLASH
2.2uF 1.0uF

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 9 OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U1001-C

AA16
[2] DDR_RESET_N RST_N_2

R1001
D [2,10] DDR_VDDQ 0201
240R/1%
B16
ZQ0 D
R1002
C16
0201 ZQ1
240R/1%
E15
[2] EBI0_CA0_CS_0 CS0_A
F15 A3
[2] EBI0_CA0_CS_1 CS1_A DQ0_A EBI0_DQ_0 [2]
H14
CS2_A B3 EBI0_DQ_1 [2]
DQ1_A

H16 C3 EBI0_DQ_2 [2]

[2] EBI0_CA0_CK_T CLK_T_A DQ2_A
D3 EBI0_DQ_3 [2]
[2] EBI0_CA0_CK_C G16 DQ3_A
CLK_C_A
B7 EBI0_DQ_4 [2]
DQ4_A
U1001-B [2] EBI0_CA0_CKE_0 E16 C6
CKE0_A DQ5_A
EBI0_DQ_5 [2]
R1006
[2] EBI0_CA0_CKE_1 F16
VREG_L13A_1P8 0201 CKE1_A D7 EBI0_DQ_6 [2]
J14 DQ6_A
10K U1001-A CKE2_A
C8 EBI0_DQ_7 [2]
M3 DQ7_A
VSF1 [4,9,10] VREG_S1B_1P125 J13
N3 A1 ODT_A K5 EBI0_DQ_8
DNU_1 DQ8_A [2]
VSF2
[2] RESOUT_N N9 M4 A2 [2] EBI0_DQS_T_0 C9
RST_N_1 VSF3 DQS0_T_A K6 EBI0_DQ_9 [2]
DNU_2 DQ9_A
N4 [2] EBI0_DQS_T_1 K9
[2] SDC1_CMD M9 VSF4 DQS1_D_A K3 EBI0_DQ_10 [2]
CMD M5 A17 DQ10_A
VSF5 DNU_3
[2] EBI0_DQS_C_0 D9 J3 EBI0_DQ_11 [2]
[2] SDC1_CLK P12 N5 A18 DQS0_C_A DQ11_A
CLKM VSF6 DNU_4 J9
[2] EBI0_DQS_C_1 DQS1_C_A J7 EBI0_DQ_12 [2]
M6 DQ12_A
M12 VSF7 B1
[2] SDC1_RCLK DS DNU_5 G3 EBI0_DQ_13 [2]
N6 DQ13_A
VSF8 B18 [2] EBI0_CA0_CA_0 G14
M7 DNU_6 CA0_A H6 EBI0_DQ_14 [2]
P16 VSF9 [2] EBI0_CA0_CA_1 F13 DQ14_A
[2] SDC1_DATA_0 DAT0 AC1 CA1_A
M15 DNU_7 H8 EBI0_DQ_15 [2]
[2] SDC1_DATA_1 [2] EBI0_CA0_CA_2 C13 DQ15_A
DAT1 CA2_A
AC18
[2] SDC1_DATA_2 N13 D16 DNU_8 [2] EBI0_CA0_CA_3 D13
DAT2 NC_1 CA3_A
[2] SDC1_DATA_3 P15 AD1 [2] EBI0_CA0_CA_4 E13
DAT3 DNU_9 CA4_A
K17
[2] SDC1_DATA_4 M16 NC_2 AD2 [2] EBI0_CA0_CA_5 C15
DAT4 DNU_10 CA5_A
[2] SDC1_DATA_5 N14 N7
DAT5 NC_3 AD17
L14 DNU_11
[2] SDC1_DATA_6 DAT6 T17 D5
NC_4 AD18 [2] EBI0_DMI_0 DMI0_A
[2] SDC1_DATA_7 L13 DNU_12
DAT7 AB16 H3
NC_5 [2] EBI0_DMI_1 DMI1_A

AC16
NC_6
LDDR4_254BALL_FBGA LDDR4_254BALL_FBGA

LDDR4_254BALL_FBGA

C C

U1001-F

U1001-D

U1001-E G13
VSS_18
K13 G15
VSSM_1 VSS_19
K14 H4
Y15 VSSM_2 VSS_20
[2] EBI1_CA0_CS_0 CS0_B K16
C1016 VSSM_3 H7
[2] EBI1_CA0_CS_1 W15 VSS_21
CS1_B L17 L12
VDDI VSSM_4 H13
U14 VSS_22
CS2_B L15 H15
1.0uF VSSM_5 VSS_23
L16 J6
U16 M17 VSSM_6 VSS_24
[2] EBI1_CA0_CK_T CLK_T_B VREG_L4B_2P95 VCC_1 A4 M8 K4
V16 AD3 EBI1_DQ_0 [2] N17 VDD1_1 VREG_L13A_1P8 VSSM_7
[2] EBI1_CA0_CK_C DQ0_B VCC_2 VSS_25
CLK_C_B C1020 A9 M13
AC3 EBI1_DQ_1 [2] C1013 C1018 P17 VDD1_2 VSSM_8 K7
DQ1_B VCC_3 VSS_26
EBI1_CA0_CKE_0 Y16 A15 C1026 C1027 C1010 C1011 M14 K8
[2] CKE0_B AB3 EBI1_DQ_2 [2] VDD1_3 VSSM_9
DQ2_B 1.0uF VSS_27
W16 2.2uF 2.2uF A16 N8
[2] EBI1_CA0_CKE_1 CKE1_B AA3 EBI1_DQ_3 [2] VDD1_4 VSSM_10 R4
DQ3_B 1.0uF 1.0uF 1.0uF 1.0uF VSS_28
T14 B15 N12 R7
CKE2_B AC7 EBI1_DQ_4 [2] VDD1_5 VSSM_11 VSS_29
DQ4_B N15
AC15 R8
AB6 EBI1_DQ_5 [2] VDD1_6 VSSM_12 VSS_30
DQ5_B N16
T13 AD4 T6
[4,9,10] VREG_S1B_1P125 ODT_B AA7 EBI1_DQ_6 [2] VDD1_7 VSSM_13 VSS_31
DQ6_B J15 P13
VREG_L8A_1P8 AD9 U4
AB8 EBI1_DQ_7 [2] VCCQ_1 VDD1_8 VSSM_14 VSS_32
DQ7_B J16 P14
AD15 U7
AB9 R5 EBI1_DQ_8 [2] VCCQ_2 VDD1_9 VSSM_15 VSS_33
[2] EBI1_DQS_T_0 DQS0_T_B DQ8_B J17 R15
C1015 AD16 U13
R9 R6 EBI1_DQ_9 [2] C1014 VCCQ_3 VDD1_10 VSSM_16 VSS_34
DQS1_T_B DQ9_B C1021
[2] EBI1_DQS_T_1 K15 R16 U15
R3 EBI1_DQ_10 [2] VCCQ_4 VSSM_17 VSS_35
DQ10_B 2.2uF R13 R17
2.2uF 100nF V4
EBI1_DQS_C_0 AA9 T3 EBI1_DQ_11 [2] VCCQ_5 VSSM_18 VSS_36
[2] DQS0_C_B DQ11_B R14 V5
EBI1_DQS_C_1 T9 T7 EBI1_DQ_12 [2] VCCQ_6 A5 VSS_37
[2] DQS1_C_B DQ12_B VDD2_1 VREG_S1B_1P125
T15 V6
V3 EBI1_DQ_13 [2] VCCQ_7 A8 B4 VSS_38
DQ13_B INSTALL R536 & DNI R535 for LP4
T16 VDD2_2 VSS_1
[2] EBI1_CA0_CA_0 V14 U6 EBI1_DQ_14 [2] VCCQ_8 B9 V13
CA0_B DQ14_B INSTALL R535 & DNI R536 for LP4x
VDD2_3 B6 VSS_39
W13 VSS_2 V15
[2] EBI1_CA0_CA_1 CA1_B U8 EBI1_DQ_15 [2] B13 B8 VSS_40
DQ15_B VDD2_4 C1025 C1024 VSNS_S1B_P [9] VSS_3
[2] EBI1_CA0_CA_2 AB13 R1004 B14 C1006 C1023 C1007 C1004 C1005 W14
CA2_B A6 VDD2_5 C4 VSS_41
VREG_LP4X_0P6 0402 VDDQ_1 VSS_4
[2] EBI1_CA0_CA_3 AA13 G7 4.7uF 4.7uF Y14
CA3_B 0R A7 VDD2_6 1.0uF 1.0uF 1.0uF C5 VSS_42
VDDQ_2 22uF 22uF VSS_5
Y13 AA4
B [2]
[2]
EBI1_CA0_CA_4
EBI1_CA0_CA_5 AB15
CA4_B
CA5_B VREG_S1B_1P125
NC
0402
C1030 C1028 C1029 C1009 C1008
A13
A14
VDDQ_3 VDD2_7
VDD2_8
G8
G9
C7
C14
VSS_6
VSS_43
VSS_44
AA6 B
R1005 VDDQ_4 VSS_7
2.2uF 2.2uF 1.0uF 1.0uF K2 VSNS_S1B_M [9] AA8
47uF B5 VDD2_9 D4 VSS_45
VDDQ_5 VSS_8
L7 AA14
H5 VDD2_10 D6 VSS_46
AA5 VDDQ_6 VSS_9
[2] EBI1_DMI_0 DMI0_B [2,10] DDR_VDDQ L8 AA15
H9 VDD2_11 D8 VSS_47
U3 VDDQ_7 VSS_10
[2] EBI1_DMI_1 DMI1_B L9 AB4
R1003 J4 VDD2_12 D14 VSS_48
VDDQ_8 VSS_11
[10] VSNS_DDR_VDDQ 0201 P7 AB5
J5 VDD2_13 D15 VSS_49
LDDR4_254BALL_FBGA 1R VDDQ_9 VSS_12
P8 AB7
J8 VDD2_14 E14 VSS_50
VDDQ_10 VSS_13
P9 AB14
T4 VDD2_15 F14 VSS_51
VDDQ_11 VSS_14
R2 AC4
T5 VDD2_16 G4 VSS_52
VDDQ_12 VSS_15
V7 AC6
T8 VDD2_17 G5 VSS_53
VDDQ_13 VSS_16
V8 AC8
U5 VDD2_18 G6 VSS_54
VDDQ_14 VSS_17
U9 V9
VDDQ_15 VDD2_19
AC5 AC9
VDDQ_16 VDD2_20
AD6 AC13
VDDQ_17 VDD2_21 LDDR4_254BALL_FBGA
AD7 AC14
VDDQ_18 VDD2_22
AD13 AD5
VDDQ_19 VDD2_23
AD14 AD8
VDDQ_20 VDD2_24

LDDR4_254BALL_FBGA

Buck for VDRAM

FAN53526 / Buck I2C address: 0X60 (Write:0xC0, Read:0xC1)

Note: 23-2
U1002

WLCSP15/P0.4/B0.2/FAN53526
L1001
A1 A2 >=30mil
VPH_PWR VIN SW VREG_LP4X_0P6
0.47uH
B1 VIN SW B2
C1001 C1003
C1 VIN VOUT E3
VSNS_DDR_VDDQ [10]
4.7uF 4.7uF

VSNS_VDDIO_EBIX [4]

[3,7] BLSP2_I2C_SCL E2 SCL PGND A3

[3,7] BLSP2_I2C_SDA D3 SDA PGND B3

PGND C2

A [8] LP4X_CTRL_BUCK_EN D2 EN AGND C3

A
[8] LP4X_BUCK_MODE D1 VSEL AGND E1

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 10OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

Sub MIC REC

MIC_BIAS1

REC1101

B1104
2 CDC_EAR_M [9]
N 1
MIC101
P
B1102 C1111
1 [9]
OUT 5 CDC_IN3_P
POWER B1101 180nH
C1102 100pF
2 B1105
GND 3 180nH
CDC_EAR_P [9]
GND 4 100pF
GND B1103
CDC_IN3_M [9]

T1103

T1104
180nH
AM0502B-NE381-X01
T1101
C1103 C1104 C1112 C1113
C1101
B1106
180nH

33pF 33pF 33pF 33pF

T1107
T1102
100nF

together then single via to main GND

C
Smart PA MOTO C

ANT_PAD-1-3
VPH_PWR 1 AW1101
NC NC [5] VSW_MOTO_P
NC NC U1101
TP26 TP27 TP28 TP29 TAS2555
VREG_L13A_1P8
L1101
C3 B1
D3 IN_P

ANT_PAD-1-3
SW B2
IN_M SW 1uH 1 AW1102
[5] VSW_MOTO_M
A3

T1105

T1106
D6 VBAT
MCLK_GPI2 C6
B6 DVDD
[3] AUDIO_MI2S_SCK BCLK1_GPIO1 F4 C1115
C1114
C1118

C1117
100nF

AVDD
C1120

C1119

100nF

100nF
A5
100nF
10uF
C1116

[3] AUDIO_MI2S_WS WCLK1_GPIO2 G6

IOVDD NC
B5 NC
[3] AUDIO_MI2S_D0 DIN1_GPI1 C1121
A6 D2
[3] AUDIO_MI2S_D1 DOUT1_GPIO3 VREG
10nF
F6 C1 C1125
VBOOST
E5 BCLK2_GPIO5 C2 10uF
VBOOST 100pF
C5 WCLK2_GPIO6 16V
E6 DIN2_GPIO8 C1122 10uF
DOUT2_GPIO7
[3] BLSP_I2C_SCL_6 F3 F1 R1101 0R C1136
E4 SCL_SSZ SPK_P 0603 SPKR_OUT_P [13]
[3] BLSP_I2C_SDA_6 SDA_MOSI R1103 NC
0201
D1 R1102 0R
D5 SPK_M 0603 SPKR_OUT_M [13]
[3] AUDIO_INT IRQ_GPIO4 R1104 NC
G5 E2 0201 47pF 47pF
[3] AUDIO_PA_RST /RESET VSENSE_P VSENSE_P [13]
F2
VSENSE_M VSENSE_M [13]
C1124 C1123
R1120
0201
10K

B4
A4 ICC_GPI3
R1109
0201

G1
10K

B3 ICC_GPIO9 NC G2
ICC_GPIO10 NC
E1
PGND A2
G3 PGND_B
A1
F5 ADR1_MISO PGND_B
G4 ADR0_SCLK D4
IOGND E3
SPI_SELECT
AGND C4
VREG_L13A_1P8
DGND

B B

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 11OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

Main Camera A Main Camera B LCM

26

25
D 1
2 J1204
24
23
D
[3] CAM_MCLK2 3 22 CAM_D1P-A-2 [12]

42

41
CAM_D1N-A-2 [12]

33

34
J1202 4 21

BB2R4-24KBJ03
[12] CAM_AVDD_2P8_2 5 20 1 40
B1203 CAM_CLKN-A-2 [12] 2 39
[3] CAM3_RST_N 6 19 [3,12] TP_INT_N TDN3_LCM [12]
[12] VCM_AF_AVDD_2P8 1 30 CAM_CLKP-A-2 [12] 3 38
1 30 7 18 TDP3_LCM [12]
2 29 [12] SLAVECAM 4 37
2 30 CAM_D0N-A [12] 8 17 [3] I2C_TP_SDA
3 28 [3] CCI_I2C_SCL0 CAM_D0N-A-2 [12] 5 J1205 36
[3] CAM_MCLK0 3 28 CAM_D0P-A [12] 9 16 [3] I2C_TP_SCL TDN0_LCM [12]
B1202
4 27 [3] CCI_I2C_SDA0 10 15 CAM_D0P-A-2 [12] 6 35
5 4 27 26 [3,12] TP_RESET_N TDP0_LCM [12]
CAM_AVDD_2P8 5 26 11 14 7 34
[12] 6 25 CAM_CLKP-A [12] VREG_L11A_1P8 [3,5,12]
0R R1245 6 25 [12] CAM2_DVDD_1.2 12 13 8 33
7 24 CAM_CLKN-A [12] VREG_L11A_1P8 R1201 TCN_LCM [12]
[12] SLAVECAM 7 24 9 32
0201 8 23 [3] LDM_IDO R1202 0201 TCP_LCM [12]
10 31

BB2R4-40KBJ03
C1227
1.0uF
[3] CAM2_RST_N 8 23 CAM_D1P-A [12] [3] LDM_ID1 0201 2.2K

27

28
9 22 11 30

C1228
1.0uF
10 9 22 21 CAM_D1N-A [12] [9] LCM_PWM_CABC 2.2K TDN1_LCM [12]
[3,12] CCI_I2C_SCL1 10 21 12 29
[3,12] LCD_TE

1.0uF

C1226
TDP1_LCM [12]

C1229
11 20 13 28

10uF
[3,12] CCI_I2C_SDA1 11 20 CAM_D2N-A [12] [3,12] LCD_RESET
12 19 14 27
13 12 19 18 CAM_D2P-A [12] TDN2_LCM [12]
13 18 [5] ID3 15 26 [12]
[12] CAM_DVDD_1.2 14 17 TDP2_LCM
14 17 16 25
15 16 CAM_D3N-A [12] [9] VREG_LEDA
[3,5,12] VREG_L11A_1P8 15 16 17 24
CAM_D3P-A [12] VDISP_M_OUT [9]
18 23
[9] LED_SINK1 19 22 VDISP_P_OUT [9]

31

32
[9] LED_SINK2 20 21
NC
NC

43

44
C1220

1.0uF
C1217

NC
NC
NC
C1214
1.0uF
C1204

C1216
10uF
C1215
1.0uF

1.0uF
1.0uF

C1203
C1213

C1202
C1218
C1219

C1201
100nF
EMI1201
3 2
[3] MIPI_CSI0_CLK_N CAM_CLKN-A[12]
4 1
[3] MIPI_CSI0_CLK_P CAM_CLKP-A [12]

EMI1211
[3] MIPI_DSI0_LANE0_P
3 2
TDP0_LCM [12]
4 1
[3] MIPI_DSI0_LANE0_N TDN0_LCM [12]

EMI1202 EMI1216
3 2 3 2
[3] MIPI_CSI0_DATA1_N CAM_D1N-A[12] [3] MIPI_CSI1_CLK_P CAM_CLKP-A-2[12]
4 1 4 1
[3] MIPI_CSI0_DATA1_P CAM_D1P-A [12] [3] MIPI_CSI1_CLK_N CAM_CLKN-A-2 [12] [3,5,12] VREG_L11A_1P8
EMI1212
3 2 TDP1_LCM [12] [3,12] LCD_TE
[3] MIPI_DSI0_LANE1_P
4 1
EMI1217 [3] MIPI_DSI0_LANE1_N TDN1_LCM [12]
[3,12] LCD_RESET
3 2
[3] MIPI_CSI1_DATA1_N CAM_D1N-A-2[12]
EMI1203 4 1 [3,12] TP_INT_N
[3] MIPI_CSI1_DATA1_P CAM_D1P-A-2 [12]
3 2
[3] MIPI_CSI0_DATA0_P 4 1 CAM_D0P-A[12] [3,12] TP_RESET_N
[3] MIPI_CSI0_DATA0_N CAM_D0N-A [12]

T1209
EMI1213
3 2 T1208 T1206 T1205
EMI1218 MIPI_DSI0_LANE2_P T1207
[3] 4 1 TDP2_LCM [12]
3 2 [3] MIPI_DSI0_LANE2_N TDN2_LCM [12]
[3] MIPI_CSI1_DATA0_P 4 1 CAM_D0P-A-2[12]
EMI1204 [3] MIPI_CSI1_DATA0_N CAM_D0N-A-2 [12]
3 2
[3] MIPI_CSI0_DATA2_P CAM_D2P-A[12]
4 1
[3] MIPI_CSI0_DATA2_N CAM_D2N-A [12]

C 3
EMI1214
2
C
[3] MIPI_DSI0_LANE3_P TDP3_LCM [12]
4 1
[3] MIPI_DSI0_LANE3_N TDN3_LCM [12]
EMI1205
3 2
[3] MIPI_CSI0_DATA3_P CAM_D3P-A [12]
4 1
[3] MIPI_CSI0_DATA3_N CAM_D3N-A [12]

EMI1215
3 2
[3] MIPI_DSI0_CLK_P TCP_LCM [12]
4 1
[3] MIPI_DSI0_CLK_N TCN_LCM [12]

Front Camera Camera Power Flash Light

26

25

1 24
2 J1203 23
[12] CAM_D0N-C 3 22 CAM_MCLK1 [3]
[12] CAM_D0P-C 4 21
BB2R4-24KBJ03

[12] CAM_D1N-C 5 20 CAM_DVDD_1.05 [12]

[12] CAM_D1P-C 6 19
[12] CAM_CLKN-C CCI_I2C_SCL1 [3,12] Warm white
7 18 CCI_I2C_SDA1 [3,12]
[12] CAM_CLKP-C 8 17
CAM1_RST_N [3] [8] FLASH_LED2
[12] CAM_D2N-C 9 16
[12] CAM_D2P-C 10 15
VREG_L11A_1P8 [3,5,12] VREG_BOB
11 14 [8] FLASH_LED1
[12] CAM_D3P-C U1201 VREG_BOB
12 13 Cool white
[12] CAM_D3N-C CAM_AVDD_2P8 [12] U1202
B1201

LED1201
4 1

LED1202
27

28

IN OK OUT VCM_AF_AVDD_2P8 [12]

C1212
1.0uF

1.0uF
C1210

4 1
C1211

C1205
1.0uF
10uF

IN OK OUT CAM_AVDD_2P8 [12]

3
[3] CAM_AF_VDD_EN EN 3

GND

GND
[3] CAM_AVDD_EN EN
1.0uF

T1201
GND

GND
B B

T1202
NC 1.0uF

5
NC

5
1.0uF C1206

0201
C1208

R1203

100K
1.0uF

0201
R1204

100K
C1207
C1209

EMI1206 VREG_BOB
3 U1205
2
[3] MIPI_CSI2_CLK_N CAM_CLKN-C[12]
4 1
[3] MIPI_CSI2_CLK_P CAM_CLKP-C [12] 4 1
VREG_BOB IN OUT CAM_DVDD_1.05 [12]
U1203
OK
3
[8] FRONT_CAM_DVDD_EN EN AW1201 AW1202

GND

GND
4 1 1.0uF
IN OK OUT CAM_DVDD_1.2 [12]
EMI1207
NC

5
3 2 [8] REAR_CAM_DVDD_EN 3
[3] MIPI_CSI2_DATA0_N CAM_D0N-C[12] EN C1224
4 1 1.0uF
GND

GND

0201
[3] MIPI_CSI2_DATA0_P CAM_D0P-C[12]

R1207

100K
1.0uF
NC R1205
2

C1225 [8] FLASH_LED3 0402

1.0uF C1222
0R
0201
R1206

100K

C1221
EMI1208
3 2
[3] MIPI_CSI2_DATA1_N CAM_D1N-C[12]

T1203
4 1
[3] MIPI_CSI2_DATA1_P CAM_D1P-C[12]

EMI1209
3 2
[3] MIPI_CSI2_DATA2_N CAM_D2N-C[12]
4 1
[3] MIPI_CSI2_DATA2_P CAM_D2P-C[12]

VREG_BOB
EMI1210
3 VREG_BOB U1206
[3] MIPI_CSI2_DATA3_P 2
4 1 CAM_D3P-C[12] U1204
[3] MIPI_CSI2_DATA3_N CAM_D3N-C[12] 4 1
IN OUT CAM2_DVDD_1.2 [12]
4 1
OK
IN OUT CAM_AVDD_2P8_2 [12] 3
OK [3] GPIO45_CAM_DVDD_EN EN

GND

GND
[3] REAR_CAM_DVDD_EN_2 3
EN 1.0uF
GND

GND

NC

5
1.0uF
C1232

0201
NC 1.0uF
2

R1208

100K
1.0uF C1230
0201
R1230

100K

C1233
C1231

A A
Schematic design notice of "63_PERI_CAMERA_KEYPAD" page.
Note 62-1: The VCC of I2C_0 is pulled to "VCAM_IO_PMU".

Note 62-2: I2C control interface of front camera (with AF) must be assigned to I2C-2
bus when PIP/VIV feature be supported.
COMPANY:

Note 62-3: Reserve a capacitor (27pF) on camera's MCLK and shunt it to GND to prevent GPS de-sense.
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 12OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

Battery Connector SUB_FPC

TP13

VBATT_CONN_VSNS_M [6]
VBATT_CONN_VSNS_P [6,7] 1K
VBATT_CONN_ISNS_P [6] R1308
[6] USB_HS_DP_PM 0201
D VBATT_CONN_ISNS_M [6]
[6] USB_HS_DM_PM
1K
0201
D
R1309

39

40
J1303

1 38 PRX_TUNER_SW1 [3]
[3] PRX_TUNER_SW2 2 37
Note [3] HALL_EINT1
3 36
[3] HALL_EINT2 CDC_HS_DET [9]
Wide trace to RF PA 4 35 CDC_HPH_R [9]
VREG_L8A_1P8 5 34
0.01R/1% CDC_HPH_REF [9]
VREG_L16A_2P7 6 33
0805 VBATT [6] [6] USB_ID CDC_HPH_L [9]
R1307 7 32
[9] MIC_BIAS2 8 31 [9,11]
10uF C1302 MIC_BIAS1
[9] CDC_MIC2_P 9 30 CDC_IN1_P [9]

T1301
Note 10 29
C1303 CDC_IN1_M [9]
C1301 1.0uF 11 28
The BPD comparator threshold is set at 95% of VREF_BAT_THERM [2,13] USB_HS_DP 12 27
[2,13] USB_HS_DM FM_RX_HEADSET [20]
33pF 13 26

14

13
[11] VSENSE_M 14 25 VSENSE_P [11]
[11] SPKR_OUT_M 15 24 [11]
SPKR_OUT_P
7 6 BATT_THERM_BIAS [6] 16 23
17 22

GND
8 5 18 21
19 20
[6,7,13] TP20

R1302
USB_VBUS

0201
10K
4 1 [2,13] USB_HS_DM TP19

42

41
BATT_ID [6,13]
[2,13] USB_HS_DP TP18
3 2
BATT_THERM [6,13]
TP21
T1304 Note:
12 9
C1304 AVDD_BYP option is reserved for BMS accuracy improvement USB_VBUS [6,13] BATT_ID TP25

T1303
11 BM25-4S 10 C1307
NC

R1311
0201
47K
16V [6,13] BATT_THERM TP24
J1301 1uF
[5,10,13] VREG_L8A_1P8 TP23
16

15

[3] FORCED_USB_BOOT TP22

GND
Note:
Battery ID resistor value require 20K~150K,

C C

Signal Description
SIM&SD R1322
0201
100K
VREG_L13A_1P8
Sider Key KPSNS0 Volume Up SUB_LED
PM_RST_N Volume Down
R1315
0201 SD_CARD_DET_N [3]
KYPD_PWR_N PWER_ON
0R R1317
0201 UIM1_PRESENT [3] PM_RST_N + Hardware Reset
0R 0R
0201 UIM2_PRESENT [3]
KYPD_PWR_N
R1316

VREG_L2B_SDC2
NC_10K
R1305
0201

TP7

TP8

TP9
J1304
DEBUG_KEY_VOL_DOWN_N [13] Volume Down
R1301
14 SDC2_DATA_1 [2] 0201 RESIN_N [5]
20 DAT1 13
GND DAT0 SDC2_DATA_0 [2] 1K
VSIM2 19 12 J1302
18 VSIM2
VPP
VSS
CLK
11 SDC2_CLK [2] 6
DEBUG_KEY_VOL_UP_N [13] Volume Up
0201 17 10 5 4
[3] UIM2_RESET RST2 VDD VREG_L5B_2P95 3 R1303
[3] 10K 16 9
UIM2_DATA IO2 CMD SDC2_CMD [2] 2 0201 KEY_VOL_UP_N [8]
R1321 15 8 [2] 1K
[3] UIM2_CLK CLK2 CD/DAT3 SDC2_DATA_3 1
7 SDC2_DATA_2 [2]
DAT2

GND
21
22
DEBUG_PMIC_PKD_N [13]
Power On
GND R1304
6 23
T1308

GND GND 0201 KYPDPWR_N [5]

T1312

5 24
T1311

VSIM1 VSIM1 GND 1K

4 25
T1306

0201 3 VPP GND 26

[3] UIM1_RESET 10K RST1 GND
2 27
[3] UIM1_DATA IO1 GND
1 28
C1316

UIM1_CLK R1320 CLK1 GND

[3] 30 J1305 J1306
GND 31
GND 29
T1305
T1318

T1310

DET
T1307
T1322

1.0uF
CAF00-20136-1503
C1317
100nF
T1319

C1315
C1314
T1317

C1313

33pF
T1324
T1316

1.0uF

1.0uF
T1309
T1321

DEBUG_KEY_VOL_UP_N [13]
T1323

DEBUG_KEY_VOL_DOWN_N [13]

DEBUG_PMIC_PKD_N [13]

T1314
T1313

T1315
B B

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 13OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

M-Sensor CAD P_SENSOR

M-Sensor I2C Address: 0x0C
0 0X0C
1 0X0D
VREG_L14A_1P8 U1401

C1410 A1 A2 VREG_L14A_1P8
VSS SCL I2C_SENSORS_SCL [3,14]
VREG_L14A_1P8
2.2uF
B1 B2
VDD SDA I2C_SENSORS_SDA [3,14] C1403
R1401
U1402

0201
100K 100nF
AK09918 LTR-579ALS-028WA

C1401
1 8
[3,14] I2C_SENSORS_SDA SDA VDD
100nF 2 7
[3] ALSP_INT_N INT SCL I2C_SENSORS_SCL [3,14]
R1410 OK
3 6
0201 LDR GND
0R 4 5
LED_K LED_A VREG_L3B_3P0

1.0uF

C1404

G+Gyro-Sensor RGB

[8]
RGB_RED
I2C_SENSORS_SDA [3,14]
I2C_SENSORS_SCL [3,14]
VREG_L14A_1P8

C C

14

13

12
U1403

SDX

SCX

CSB

0402
R1403
R1408 100nF

10R
1 11
SDO OSDO(GND)
R1409
NC 2 10
VREG_L14A_1P8 0201 ASDX OSCB(GND) 0201
R1407 0R
NC 3 9 ACC_GYRO_INT2
0201 ASCX INT2 [3]
R1406 4 8
VREG_L3B_3P0

VDDIO
[3] ACC_GYRO_INT1 INT1 VDD

GND

GND
T1401

D1401
BMI120 C1406

7
VREG_L14A_1P8
100nF

C1405

100nF GND

GND

GND

IR

R1405
VREG_BOB 0402
J1401 33R

1 10 C1407
[3] FP_INT_N_1 IRQ RST_N FP_SUB_RESET [3]
2 9 LED1401
3 GND_HOST MOSI 8 BLSP_SPI3_MOSI [3]
GND_HOST MISO BLSP_SPI3_MISO [3] 4.7uF
VREG_L16A_2P7 4 7 IR
5 GND_HOST CS_N 6 BLSP_SPI3_CS_N [3]
VREG_L13A_1P8 VDD1.8V SCLK BLSP_SPI3_CLK [3]

T1403
T1411 T1405 T1406 T1407 T1404 T1402
T1408
1.0uF 1.0uF
C1409
C1402 C1408
Q1401
47pF
PWM 38KHZ R1402
D 3
T1409 T1410

[3] IR_LED_EN 1 G
0201
S 2
B 0R
B
WNM2046-3/TR

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 14OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U1501-E

INS17293113

QPHY_ETDAC_TEST

[19] DRX_HB1_B38_B41 141 DRX_HB1 PRX_HB1 46 PRX_HB1_B38_B41 [18]

[19] DRX_HB2_B7 133 54 PRX_HB2_B7 [17]

DRX_HB2 PRX_HB2

[19] DRX_HB3_B40 126 DRX_HB3 PRX_HB3 63 PRX_HB3_B40 [18]

D [19] DRX_HB4_B1_B4 117 DRX_HB4 PRX_HB4 71 PRX_HB4_B1_B4 [17]

D
U1501-B
110 DRX_UHB PRX_UHB 80
INS17293113

[19] DRX_MB1_B39 171 16 PRX_MB1_B34 [17] QPHY_ETDAC_TEST

DRX_MB1 PRX_MB1

[19] DRX_MB2_B34 164 25 PRX_MB2_B39 [17] GND_19 41

DRX_MB2 PRX_MB2

[19] DRX_MB3_B2 156 32 PRX_MB3_B2 [17] 99 GND_44 GND_9 21

DRX_MB3 PRX_MB3

[19] DRX_MB4_B3 148 38 PRX_MB4_B3 [17] GND_10 22

DRX_MB4 PRX_MB4

179 DRX_LB1 PRX_LB1 7 PRX_LB1_B28A [17]

[19] DRX_LB2_B28A+B 170 15 GND_17 36

DRX_LB2 PRX_LB2 PRX_LB2_B28B [17]

[19] DRX_LB3_B20 178 6 PRX_LB3_B20 [17] 49 GND_24

DRX_LB3 PRX_LB3

[19] DRX_LB4_B8 169 14 PRX_LB4_B8 [17] 58 GND_29 GND_20 42

DRX_LB4 PRX_LB4

[19] DRX_LB5_B5 177 DRX_LB5 PRX_LB5 5 PRX_LB5_B5 [17]

101 86 67 GND_32 GND_28 56

DRX_LTEU_UHB PRX_LTEU_UHB

84 GND_36 GND_42 97

GND_54 128
C1527
68 26 TX_CH0_HB1_LTE_B7_B38_B40_B41 [18] 98 GND_43 GND_57 134
0201 TX_FBRX_M TX_CH0_HB1
51R
[18] TX_FBRX_P 60 TX_FBRX_P

33 TX_CH0_MB1_B1_B2_B3_B4_B34_B39 [18] 89 GND_37

TX_CH0_MB1
C1501 C1532 33pF
C1525 2.4nH 161 10 TX_CH0_MB2_DCS_PCS [18] 158 GND_66
GNSS_IN TX_CH0_MB2
0R
33pF TX_CH0_LMB 18
C1533 5.1nH
U1502
138 GND_58
NC C1526
NC
GPS_SDR660 1 IN OUT 4 2 116
[21] TX_CH0_LB1 TX_CH0_LB1_G850_G900 [18] GND_51
C1534 C1537
2 GND
27 [18] GND_56 131
TX_CH0_LB2 TX_CH0_LB2_W5_W8_LTE_B5_B8_B20_B28
3 GND
shared pad GND 5 shared pad
61 GND_30

TX_CH1_UHB 168

SAFFB2G14AA0F0AR15 139
GND_59

167 34 GND_16
TX_CH1_HB

159 40 GND_18 GND_39 92

TX_CH1_MB

129 GND_55 GND_14 30

176 105 GND_47

TX_CH1_LTEU

C GND_35 79
C
109 GND_49 GND_31 62

125 GND_53 GND_22 45

140 GND_60 GND_15 31

155 GND_65 GND_12 24

163 GND_69

GND_6 17

172 GND_70

GND_11 23

12 GND_5
U1501-A

GND_61 145
INS17293113

19 GND_7
QPHY_ETDAC_TEST
48 GND_23 GND_63 151
U1501-C
28 GND_13
INS17293113

GND_25 51

QPHY_ETDAC_TEST RFFE1_CLK 166 RFFE1_CLK [3]

C1528 20 GND_8 GND_33 76

VDDA_1P2_RX1 108 VREG_L7A_1P2 [5] RF_CLK2 0201 114 XO_IN RFFE1_DATA 149 RFFE1_DATA [3]
0R
VDDA_1P2_RX2 70
C1506 C1507 GND_26 52
NC
VREG_L2A_1P0 77 VDDA_1P0_RX1 VDDA_1P2_ANA0 75 120 W_GRFC_6 DNC_3 173
100nF 4.7uF 175 GND_72
VDD_ANALOG_1P0 C1502
37 VDDA_1P0_RX2 VDDA_1P2_ANA0 90 157 W_GRFC_7
C1505 160 GND_67
107 VDDA_1P0_XO VDDA_1P2_FBRX 85 136 W_GRFC_5
4.7uF 147
C1504 GND_62
GPIO78
C1508 C1509 165 DNC_2 WMSS_RESETN 83 [3]
Pin 43,37,107within one group WMSS_RESETN 162
100nF GND_68
100nF 43 VDDA_1P0_RX2 100nF 153 GND_64 GND_34 78
GPIO100
95 VDDA_1P0_RX [3] QLINK_ENABLE 143 QLINK_EN
GND_40 93
53 VDDA_1P0_RX2_1
GPIO99
VDDA_1P2_TX0 29 [3] QLINK_REQUEST 73 QLINK_REQ 100 GND_45 GND_21 44
144 C1511
C1510 VDDA_1P0_TX1
C1512 100nF 150
100nF [21] GNSS_ELNA_CTRL GNSS_ELNA_CTRL 4 GND_2
100nF 57
W_GRFC_0 GRFC0_BAND1_BAND4_TX_SWITCH [17]
174 GND_71
154 VDDA_1P0_RX0 66 DNC_1 W_GRFC_1 65 GRFC1_DPDT_SWITCH0 [18]
55 GND_27 GND_41 94
C1513
146 VDDA_1P0_GNSS VDDA_1P2_RX0 130 W_GRFC_2 74 GRFC1_DPDT_SWITCH1 [18]
180 GND_73 GND_46 102
100nF
132 VDDA_1P0_RX0_1 VDDA_1P2_RX0 137
8 GND_3
13 VDDA_1P0_TX0_1
C1514
B 100nF
B
C1503
3 VDDA_1P0_TX0 VDDA_1P2_RX0_1 123 U1501-D
100nF INS17293113
C1515

100nF
QPHY_ETDAC_TEST

1 GND_1 QLINK_CLK_M 81 QLINK_CLK_M [3]

9 GND_4 QLINK_CLK_P 96 QLINK_CLK_P [3]

Pin 152,121,122within one group 152 VDDA_1P8_TX1
0R
121 VDDA_1P8_ANA2 VDDD_1P0_QLINK 118 0201 VREG_L3A_1P0
QLINK_UL0_M 87 QLINK_TX_M [3]
C1517 C1529 C1518
C1516 QLINK_UL0_P 72
100nF QLINK_TX_P [3]
4.7uF
100nF

QLINK_DL0_M 88 QLINK_RX0_M [3]

VDDD_1P0 64
QLINK_DL0_P 103 QLINK_RX0_P [3]
11 VDDA_1P8_TX0 VDDD_1P0 82 C1519

C1520 35 142 100nF

VDDA_1P8_ANA1 VDDD_1P0
115 GND_50 QLINK_DL1_M 111 QLINK_RX1_M [3]
100nF
0R 124 GND_52 QLINK_DL1_P 127 QLINK_RX1_P [3]
VDDD_1P8 112 0201
106 GND_48
C1530 VREG_L13A_1P8
C1521
C1522
91 GND_38 QLINK_DL2_M 135 QLINK_RX2_M [3]
122 100nF
VREG_L12A_1P8 VDDA_1P8_ANA2 4.7uF
VDD_ANALOG_1P8 QLINK_DL2_P 119 QLINK_RX2_P [3]
C1524
C1523 69 VDDA_1P8_RX2

4.7uF
100nF
50 VDDA_1P8_FBRX Each QPHY pair shall be routed in a channel together
ETDAC_CH0_M 47
59 VDDA_1P8_FBRX
ETDAC_CH0_P 39
isolated from other QPHY pairs with surrounding gnd
ETDAC_CH1_M 113

ETDAC_CH1_P 104

QPHY_ETDAC_TEST

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 15OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

U1601

INS21369574

C QFE4101 C

VPH_PWR 1 VDD_BATT DNC1 10

DNC2 9

4.7uF

C1601
L1601
VSW 11 VPA_APT [18]
1uH

VOUT_LDO 5

12 VBAT_SW

C1602

10uF

8 GND_SW

VREG_L13A_1P8 4 VDD_1P8
C1603

1.0uF

6 USID

[3,18] RFFE2_DATA 2 SDATA

[3,18] RFFE2_CLK 3 SCLK

GND 7

B B

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 16OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

[18]
TX_B4
L1722 3.0nH

C1728
C1727

TRX_B7
9.1NH

NC
[18] TX_B7

TRX_B4 Shared with B34_39_TX close to WTR

U1702 L1762
L1708 18pF 6 3
TRX_B4 ANT TX 1 2.2nH
[18] RX
C1726
C1725

GND
GND
GND
GND
GND
SAYEY2G53BA0F0A

NC
D D

8
7
5
4
2
1.0nH L1712 6 3

C1707
[18] TRX_B7 ANT TX 1
2.4nH NC RX
SAYEY1G74BC0B0A 33pF L1701

C1701
1.0nH L1724

GND
GND
C1736

C1729
C1735 PRX_HB2_B7 [15]

GND
GND
GND
GND
GND
U1705

NC

8
7
5
4
2
NC
2.4nH

2.0nH
GND
GND
C1702
22pF
close to WTR

U1703 MXD8621C

2 GND RF2 1

[15] GRFC0_BAND1_BAND4_TX_SWITCH 6 CTRL

L1714 33pF L1711 1.5NH

RF1
[5,13,14,18,19] VREG_L16A_2P7 4 VDD RFIN 5 [15] PRX_HB4_B1_B4

C1714

3
C1711
L1726 6.8pF TX_B8

TRX_B8
C1754
C1769 NC [18]
C1755

33pF
C1756

33pF
TRX_B1
L1715 3.0nH [18] TX_B1
2.4nH
NC
C1719 10nH
C1745

1.0pF C1718
NC
U1709 close to WTR
22pF [18] L1709 33pF 6 3
TRX_B8 ANT TX 1 L1710 33pF
L1731 15nH [15]
U1707 C1744 RX PRX_LB4_B8
L1729 5.6pF 6 3 C1743

GND
GND
GND
GND
GND
[18] TRX_B1 ANT TX 1 C1712 NC
TRX_B1
RX L1723 2.2nH

8
7
5
4
2
C1739 5.6nH C1742

GND
GND
GND
GND
GND
C1738 NC

NC
SAYEY897MBA0B0A

GND
GND
8
7
5
4
2
2.4nH
SAYEY1G95GA0F0A

C1713
NC

RF1630 NC
GND
GND
C1717

MODE VC1 NC

RFIN--RF1 0

RFIN--RF2 1

C C

TRX_TDS_B34_B39
TRX_B2
10pF [18]
TX_B2
L1718
1.8NH
C1751
C1750 0201 L1719 PRX_MB2_B39

L1705
33pF
[15]

C1720 0201
3.0nH
share pad

3.3NH
NC
U1704

SAWFD1G90KE0F0A
DUP/1814/B2/UNBALANCED/SAYEY1G88BA0B0A C1708
U1710
6 3 L1730 33pF
ANT TX 1 33pF L1704 1.5NH
RX PRX_MB3_B2 [15]
[18] TRX_B2 0201
0R L1734
GND
GND
GND
GND
GND

C1737
PRX_B34_B39 [18]
8
7
5
4
2

C1749 L1733 33PF

1 UNBAL3 UNBAL1 9
0201

L1706
C1705

33pF
2.4nH C1732 6
UNBAL2 L1725 1.5nH
NC 3.0NH C1731
PRX_MB1_B34 [15]
5
GND
GND4
C1706 6.2NH C1730
6.8NH 7 GND5 GND1 2
22pF GND
GND 8 3
GND6 GND2

10 GND7 GND3 4 2.4nH

TRX_B3
C1709

33pF

[18]
TX_B3
L1716 1.2nH

C1747
C1746

NC
7.5NH

close to WTR
U1708
L1713 5.6pF 6 3
[18] ANT TX 1 L1702 33pF
TRX_B3 L1727 1.5nH PRX_MB4_B3
RX
C1741
C1740 [15]
GND
GND
GND
GND
GND

C1733
8
7
5
4
2

NC 5.1NH
SAYEY1G74BC0B0A
B B
GND
GND
2.4nH

C1710

22pF

TX_B28A [18]
L1756 6.2nH

TRX_B28A
C1760
C1759

NC
[18] 1.0pF
TX_B5
L1717 6.2nH
DUP/1814/B5/UNBALANCED/SAYEY836MBA0F
C1753

TRX_B5
C1752
1.2nH L1758
TRX_B28A 6 3 33pF 22nH L1757
0201 ANT TX 1
2.7pF [18] PRX_LB1_B28A [15]
RX
NC L1755
C1757 C1758

GND
GND
GND
GND
GND
U1720 C1761

7.5nH NC

8
7
5
4
2
GND
NC
18pF L1735 6 3 33pF L1703
TRX_B5 ANT TX 1 22nH L1728
0201
[18] RX PRX_LB5_B5
C1748 [15]
C1703 C1762
GND
GND
GND
GND
GND

U1706 C1734
5.6nH NC
8
7
5
4
2

NC
GND
NC
DUP/1814/B5/UNBALANCED/SAYEY836MBA0F

C1704

NC

TX_B28B [18]
L1759 6.2nH

TRX_B28B
C1766
C1765

1.0pF
NC
[18]
TX_B20
L1721 6.2nH

C1724
C1723
1.2nH L1763
TRX_B28B 6 3 33pF L1760 22nH L1761
1.0pF 0201 ANT TX 1
[18] RX PRX_LB2_B28B [15]
NC C1763
TRX_B20 Shared with B34_39_RX C1764

GND
GND
GND
GND
GND
U1721 C1767
NC

8
7
5
4
2
GND
7.5nH
NC
1.2nH L1732 6 3 33pF L1707
TRX_B20 18nH L1720
A [18]
C1722
0201 ANT TX 1
RX PRX_LB3_B20 [15]
DUP/1814/B5/UNBALANCED/SAYEY836MBA0F
A
C1715 C1768
GND
GND
GND
GND
GND

U1701 C1721
NC NC
8
7
5
4
2

7.5nH
GND
NC
DUP/1814/B5/UNBALANCED/SAYEY836MBA0F

C1716

NC

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 17OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D
If walsin,R61,R62 should be NC D
GRFC1_DPDT_SWITCH1 [15]

VREG_L16A_2P7 [5,13,14,17,19]
GRFC1_DPDT_SWITCH0 [15]

C1843 C1807

C1861 100pF
100nF
100pF

L1823 1.8nH
[19] TO_DPDT [18] TRX_B40
VREG_L13A_1P8 [2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20]
TO_DRX_ANT [19]
56nH L1824 [18] TRX_B38_B41
L1837
0R
1
C1810 [18] TX_B34_B39 0201 L1803 L1811

L1835 TX_CH0_LB1_G850_G900 [15]

NC NC
C1842 2 [17] TRX_B4 0201 33pF 33pF
100K NC

0201

0201
L1814 C1841 C1845
L1839
100pF C1856
100pF NC
1.8nH [17] TRX_B1
ANT_CHECK
[3]
C1809

4.02K [17] TRX_B7

NC

0201
1

L1838
2
1
3

[17] TRX_B3 L1802 L1812

CTL2
VDD
CTL1

GND GND
4 13 TX_CH0_MB2_DCS_PCS [15]

31

32

33

34

35

36

37

38

39
GND 33pF 33pF
RF1643A 12
RF2

TRX7

TRX6

TRX5

TRX4

TRX3

TRX2

TRX1

GND

GND
5 30 C1852
U1808 RF3 [17] TRX_B2 TRX8
11 L1836 0R 1
GND LB_SWOUT NC
6 [17] PRX_B34_B39 29
GND 0201 TRX9
GND

RF4

2
RF1

10 L1834 NC LB_IN
[17] TRX_B20 28
0201 TRX10 3
8

9
7

L1827 2.0nH [17] TRX_B8 U1803 HB_IN

27
U1809 TRX11 4
0201 [17] TRX_B5
26 HB_SWOUT
2 TRX12 5
[17] TRX_B28B
3 GND 1 25 SCLK RFFE2_CLK
1

[3,16,18]
4 GND RF TRX13 6
GND [17] TRX_B28A SDATA
24 RFFE2_DATA
L1801

TRX14
NC

7 [3,16,18]

C1860
1 VIO

33pF
23
C1824 L1828 2.0nH
U1801 1.8nH L1843 1.8nH
GND SKY77912-61 VRAMP
8
C1854
0201 VREG_L13A_1P8 [2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20]
0201 1 3 22 C1832
0201

GND
NC IN OUT ANT 9 100K C1803 C1825
2 2 1 L1815 C1834 VCC
1 U1806 21 100pF 100pF
C1802

2
3 4 L1844 NC GND 10 100nF
NC 20 VBATT

0201
NC GND 11
2 GND
C1853 C1844

GND

CPL

GND

GND

GND

GND

GND
NC
68nH

19

18

17

16

15

14

13

12
NC

2
C1801

C1808
NC
NC

VPH_PWR [5,6,7,8,9,10,11,16,18]

C1813 C1814
C 100nF
C
4.7uF
38R
TX_FBRX_P L1829
0201
[15]
[16,18]
L1830 150R
VPA_APT

0201
Changed this pin supplied by APT

0201
150R L1831
C1812 C1806 C1811
2.2uF 100nF 100pF

T1801

Add TVS¹Ü
L1810 33pF
PRX_HB1_B38_B41 [15]

L1846
1.5NH

C1859
PA_THERM0
0201
22pF

0402
100K¡À1%
C1855 C1833

100nF
L1809 1.0NH
PRX_HB3_B40 [15]

L1845
2.0NH

C1857
L1816
0201
22pF 10pF
TX_B7 B7 TX
C1823 3.3nH [17]
C1826
NC

L1806 33pF

B B
L1807 2.2nH U1805 L1805
SAFFB942MAN0F0AR15 L1818
L1817
B40 TRX
1 IN OUT 4
2.7nH
3.3nH 33pF TRX_B40
2 GND [18]
[15]
TX_CH0_HB1_LTE_B7_B38_B40_B41 0201 C1848
C1849 3 C1850
L1840 GND
2.7nH C1827
NC 5 NC
1.0pF GND 6.8nH

A
50
49
48
47
46
45
44

43

42

41

40

39

38

37
GND

HBRX2

HBRX1

GND

HB4

GND

HB3
36
1 GND
GND 35
2 HB2
33pF GND 34
L1808
3 GND
RFIN_H 33
4 HB1
C1831 NC 32
MB5 U1802
5 SAFFB942MAN0F0AR15
SDATA 31
NC GND L1819 12pF
6 VPA_APT [16,18] L1813
SCLK
VCC2
30
1 IN OUT 4
B38_B41 TRX
RFFE2_DATA
7
VIO SKY77645 29 VPA_APT
1.2nH 2 GND
9.1NH
C1821
TRX_B38_B41
[3,16,18] 8 VCC1 [16,18] C1822 2.4nH [18]
VBATT 3 GND
28
RFFE2_CLK VCC2_2 C1862
[3,16,18] 9 C1830 5
NC 27 C1835 C1817 C1818 NC GND
GND 3.3NH
10
VREG_L13A_1P8 NC 26 1.0uF 4.7uF
C1815 MB4 33pF 100pF 100nF C1819
[2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20] 11 C1820
100pF NC 25
12 MB3
RFIN_M 24
13 GND
RFIN_L1 23
14 MB2
RFIN_L2 22
VPH_PWR 15 GND
[5,6,7,8,9,10,11,16,18] TX_B1 [17]
GND
LB4

LB3

LB2

LB1

LB5

MB1

C1828 C1816 C1829 U1804

100nF

2
4.7uF 100pF L1848
16

17

18

19

20

21

0R L1821 L1822 TX_B34_B39

GND

GND
6 4 [18]
0201 IN OUT
3.6nH 33pF

NC

NC
0R
TX_CH0_MB1_B1_B2_B3_B4_B34_B39 [15] NC U1807 NC

1
0201 NC
NC
L1833
L1849 C1804
2nH L1820 NC C1836 LF1005-N1R9NBAT/LF C1805
0201 TX_B4 [17] C1837

delete C1840 L1804

L1847 NC
C1858 NC

TX_CH0_LB2_W5_W8_LTE_B5_B8_B20_B28
0R
C1847

0.5pF
C1846
NC
33pF TX_B3 [17] 0201
IF no use LPF
0201 [15] TX_B2 [17]
L1832

A
TX_B20 [17]
TX_B8 [17] IF use LPF L1825=0R+C1836=3.9nH+L1821=1.2nH+SAW+NC+1.2nH+NC A
C1838

NC

TX_B5 [17]

TX_B28A [17]

TX_B28B [17]

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 18OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U1901
U1903

U1902 [5,13,14,17,18,19] VREG_L16A_2P7

[2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,20] VREG_L13A_1P8

C1950
C1906
100nF
C1949 68nH 100nF
L1938 U1918

0201
0R
17 15 DRX_B3 [19]
L1931 VDD TRX1
14 [19]
18 TRX2 DRX_B38_B41

0201
0R
VIO 13
TRX3 DRX_B7 [19]
L1934 L1935 0R U1904 12
TRX4 DRX_B40 [19]
0R TO_DRX_ANT 11 0R L1928
0201 0201 [18]
D C1912
TO_DPDT [18]
0R
0201
2 1
L1905 1.5nH 9
ANT TRX5
6
DRX_B1_B4 [19] 0201 DRX_B34_B39 [19]
D

L1932
C1911 TRX6 NC L1929 [19]
3 4 5 0201 DRX_B20
TRX7 DRX_B28A+B [19]
NC C1919 C1924 SKY13473 4
NC TRX8 DRX_B8 [19]
3 DRX_B5 [19]
1 NC NC [3] RFFE4_DATA TRX9

10
U1909 C1952 2
C1951 C1968 19 TRX10 DRX_B2 [19]
NC SDATA

RFC
1 9
0201 RF1 RF3 0201 NC 20 1
0R SCLK NC
C1954 2 7
2 8 GND
0201 RF2 RF4 0201 [3] RFFE4_CLK 8
0R 0R C1953 GND
RF1694 10
3 7 1 GND
GND GND C1967 16
GND
4 6 C1927 C1928 GND
VREG_L16A_2P7 VDD CTL2 DRX_TUNER_SW2 [3,19] 21
CTL1
NC
[5,13,14,17,18,19] 2
100pF
100pF
5

C1916
DRX_TUNER_SW1 [3,19]
100pF

C1918 C1917

NC NC

1.5NH
L1901
L1921 33PF
DRX_HB2_B7 [15]

C1933
Close to WTR2965
B1&B4_DRX

2.4NH
B7_DRX
U1914
SAFFB2G14AA0F0AR15
C1902
L1907 33pF 1 4 L1914 33pF L1927 1.5nH
[19] DRX_B1_B4 IN OUT DRX_HB4_B1_B4 U1910 33pF
2 [15]
GND C1944 SAFFB2G65AA0F0A
NC C1920 3 GND
L1933 22PF 1 4
[19] DRX_B7 0201 INPUT OUTPUT
NC GND 5

3.3nH

GND

GND

GND
NC
C1938

2
C1923 NC

C1941

33pF

GND
C1937

U1922

C 33pF C
L1902 1.5NH
L1922
DRX_MB1_B39
[15]

C1935 2.4NH

U1907 C1976 68nH

SAWFD1G90KE0F0A C1905

TRX_TDS_B34_B39 22pF L1947

0201
0R
DRX_B34_B39 [19]

B2_DRX Close to WTR2965 L1930 33PF

1 UNBAL3 UNBAL1 9

L1903
0201

33pF
0201
C1931 L1923 1.5NH
U1919 6
SAFFB2G14AA0F0AR15 UNBAL2 DRX_MB2_B34 [15]
C1932 6.2NH
L1944 33pF 1 4 L1943 33pF L1942 1.5nH 5 GND4
[19] DRX_B2 IN OUT DRX_MB3_B2 [15] NC C1934 2.4NH

10
U1923 C1974
2 7 2 C1972
GND GND5 GND1 NC

RFC
C1965 GND GND
C1964 1 9
3 0201 RF1 RF3 0201
GND 8 3 0R
GND6 GND2 C1913 C1973 2 8
NC 5 0201 RF2 RF4 0201
GND 0R 0R C1975
2.4nH

NC 10 4 RF1694
GND7 GND3 22pF 3 7
GND GND
VREG_L16A_2P7 4 6
VDD CTL2 DRX_TUNER_SW2 [3,19]

CTL1
C1966
C1963 [5,13,14,17,18,19]

5
C1969
DRX_TUNER_SW1 [3,19]
22pF

100pF

C1970 C1971

100pF 100pF

B40_DRX Close to WTR2965

U1906
SAFFB1G90KA0F0A

1.0NH
L1920
[19] L1937 22PF [15]
1 4 L1925 22PF
DRX_B40 0201 INPUT OUTPUT DRX_HB3_B40

GND

GND

GND
B3_DRX Close to WTR2965 NC
C1946

2
NC
3.0NH
U1905
SAFFB2G14AA0F0AR15

L1916 33pF L1917 33pF L1926 1.5nH C1942 C1926

[19] DRX_B3 1 IN OUT 4 DRX_MB4_B3 [15] C1936

2 GND 33pF

GND
C1922 3 C1945
GND
5 2.4nH
NC GND
NC

B C1939 C1921
B
22pF

Close to WTR2965

Close to WTR2965
SAFFB2G65AA0F0A

1.5NH
B5_DRX

L1919
L1936 22PF L1918 33pF
U1915 [19] DRX_B38_B41 0201 OUT 4
1 DRX_HB1_B38_B41 [15]
SAFFB876MAA0F0A NC IN
G 3
NC

G
G
L1908 33pF 1 4
[19] DRX_B5 IN1 OUT L1924 18nH U1911

2
5
DRX_LB5_B5 2.4NH
GND
GND
GND

[15] C1947
2
5
3

C1940
C1908 C1930
0201

NC C1925
C1948 NC
33pF

C1909

NC

B38_B41_DRX
Close to WTR2965

B8 DRX U1913
SAFFB942MAN0F0AR15

L1915 1.0nH 1 4 L1910 15NH

[19] DRX_B8 IN OUT DRX_LB4_B8 [15]
2 GND
C1907 3 GND
NC GND 5 C1943
NC

C1910

0201
NC
Close to WTR2965

B28 A+B DRX U1920

SAFFB942MAN0F0AR15
L1940
33pF L1941 22NH
A Close to WTR2965 [19]DRX_B28A+B 1 IN OUT 4
[15]
DRX_LB2_B28A+B A
B20 DRX
2 GND
C1960 3 GND
U1908 NC 5 C1961
SAFFB942MAN0F0AR15 GND
NC
L1911 33pF 1 4 L1913 18NH
[19] DRX_B20 IN OUT DRX_LB3_B20
[15] C1962
2 GND
C1914 3 GND 0201
NC
NC GND 5 C1929
NC
COMPANY:
<Company Name>
C1915

0201 TITLE:
NC

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 19OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

U2001-A

U2001-B

WL_RFI_5G_CH0 75 [21] WL_RFI_5G_CH0

[3] WL_BB_IP_RX 53 10 50K C2036

WL_BB_IP_RX WP_IF 0201 U2001-C

WL_RFO_5G_CH0 68 [21] WL_RFO_5G_CH0

[3] WL_BB_IN_TX 73 36 SLEEP_CLK [2,5]

WL_BB_IN_TX LF_CLK_IN

C2006 56pF SENS_TXD 3 SENS_TXD [3]SDM SSC_13

[3] WL_BB_IP_TX 80 WL_BB_IP_TX

22pF
C2005
33R 23 SENS_RXD
[3] WL_BB_QN_RX 59 69 [3] SENS_RXD [3] SDM SSC_12
WL_BB_QN_RX CLK_OUT 0201 WLAN_5G_CLK_OUT
C2027 GND_XTAL 38
0R C2028 COEX_TXD 70 COEX_TXD [3]
SDM GPIO82
[3] WL_BB_QP_RX 52 17 WL_CMD_DATA_CH0
WL_BB_QP_RX WL_CMD_DATA_CH0 0201 [3] SDM GPIO19
[3] CTS GND_PM 65
0R C2029 64 CTS COEX_RXD 57 COEX_RXD [3]
SDM GPIO81

WL_CMD_CLK_CH0 9 0201 WL_CMD_CLK_CH0 [3]

74 GND_WL_5G_DRV_CH0 GND_PDET 28
31 WL_BT_FEM_0
WL_RF_PDET_IN 27 WL_RF_PDET_IN_CH0 XTALI 44
XTALI [20]
15 GND_DPD_CH0 41
[21] WL_BT_RFIO_2G_CH0 42 37 XTALO SW_CTRL WLAN_SW_CTRL [5,8] SDM GPIO5
WL_BT_RFIO_2G_CH0 XTALO
SDM GPIO16
25 WL_BT_FEM_3 RXD 16 [3]
72 WL_BB_QN_TX RXD
WL_BB_QN_TX
[3]
[3] WL_BB_QP_TX 79
11 WL_BT_FEM_2 RTS 50 RTS [3] SDM GPIO18

WL_BB_QP_TX 68nH
FM_RX_HEADSET 7 FM_RX_HEADSET [13] 8 20 GND_FM_VCO GND_BT_SYNTH 19
0201 [21] LNA_EN_5G_CH0 39 WL_BT_FEM_1 TXD TXD [3] SDM GPIO17

C2035
NC 6 GND_FM_RXFE
WL_BB_IN_RX 40 GP_EN
[3] 60 WL_BB_IN_RX
C2025 51 GND_WL_SYNTH_CH0 GND_WL_5G_RXFE_CH0 81
SB_CLK 22 SB_CLK [3]
67 GND_WL_5G_PA_CH0 GND_WL_BB_CH0 66
14 GP_IN SB_DATA 63 SB_DATA [3]
62 71 VREG_L19A_3P3 [5,20]
76 COEX_CLK [3] GND_WL_BALUN_CH0 VDD33_PM_DLDO
COEX_CLK
45 WL_BT_FEM_4 54 61 VREG_L19A_3P3 [5,20]
77 [3] GND_WL_2G_PA_CH0 VDD33_WL_5G_DRV_CH0
COEX_DATA COEX_DATA
48 GND_WL_BT_DRV_VH0 GND_ESD_0 47
13 GP_OUT
WCN3980
35 55 VREG_L19A_3P3 [5,20]
C [21] PA_EN_5G_CH0 58 WL_BT_FEM_5
GND_WL_BT_RXFE_CH0 VDD33_WL_CH0
C
30 GND_DIG GND_SEALRING3 78

24 GND_ISO VDD18_IO 56 VREG_L13A_1P8 [2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20]

VDD13_FM 12 VREG_L6A_1P3 [4,5,20]

VDD13_BT_BB_WL 26
VREG_L6A_1P3 [4,5,20]

VDD13_BT_FM_BBPLL 4 VREG_L6A_1P3 [4,5,20]

WCN3980

18 GND_BT_FM_BBPLL_A VDD33_WL_BT_DRV_CH0 34 VREG_L19A_3P3 [5,20]

21 GND_GP VDD33_FEM 2 VREG_L19A_3P3 [5,20]

49 GND_IO GND_SEALRING1 82

GND_BT_BB 33

VDD11D_PM 43 VDD11D_PM [20]

VDD13_PM 29 VREG_L6A_1P3 [4,5,20]

GND_SEALRING2 1

VDD13_WL_SYNTH_CH0 46 VDD13_WL_SYNTH_CH0 [20]

VDD13_BT_SYNTH 5 VREG_L6A_1P3 [4,5,20]

VDD18_XTAL 32 VREG_L9A_1P8 [4,5,20]

XTALI [20]

C2007 RF_CLK1
100pF [5]

WCN3980

1.3V_RFA
0R
B VREG_L6A_1P3 [4,5,20]
0201
C2026
VDD13_WL_SYNTH_CH0 [20] Pin 46 B
C2023 100pF
3.3V CH0
12,17
4.7uF C2009
Pin 55
[5,20] VREG_L19A_3P3 C2019 VREG_L19A_3P3 [5,20] 1.8V IO
VREG_L13A_1P8 [2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20]
C2002
VREG_L6A_1P3 [4,5,20] Pin 5 1uF
[2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20] VREG_L13A_1P8 VDD18_IO
C2012 4.7uF C2015
C2011
10nF Pin 94
10uF 4.7uF 470nF
C2022
modify by cheng
VREG_L19A_3P3 [5,20]
VREG_L6A_1P3 [4,5,20] Pin 29
C2013 Pin 34 1.8V XO
10nF C2037
10nF [10] [10] VDD18_XTAL
50V
C2008 4.7pF
VREG_L9A_1P8 Pin
[4,5,20]
40
C2018
VREG_L9A_1P8
[4,5,20]
C2017 470nF
VREG_L19A_3P3 [5,20] Pin 61
2.2uF
VREG_L6A_1P3 [4,5,20] C2021 C2038
Pin12

10nF
50V
1uF
3.9pF modify by cheng
C2014
VREG_L19A_3P3 [5,20] Pin 71
C2010

10nF
VREG_L6A_1P3 [4,5,20]Pin 4
1.1V VDD11D_PM [20]

VREG_L6A_1P3 [4,5,20] Pin 26 Pin 2

VREG_L19A_3P3 [5,20]

10nF
10nF
C2001 C2020
C2024
C2016
1uF 1uF
50V 50V

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 20OF 21
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

GPS
High rejection saw
U2115
L2112 15pF
1 6 GPS_SDR660 [15]
U2107 GND RFOUT
SAFFB2G14AA0F0AR15 2 5
GND EN
C2136 3.9pF C2148
GPS_IN 1 IN OUT 4 C2142 6.8nH 3 4
[21] RFIN VDD
1.2pF
2 GND
3 GND C2134 AW5005DNR
NC
NC 5
8.2nH GND NC
C2132
C2137
C2133
GNSS_ELNA_CTRL [15]

VREG_L12A_1P8 [5,15]
L2120 82nH
C2150
100nF

C C

used for connect to ground GPS_2G_5G_ANT

U2100

U2104
U2103

U2102
U2101

U2106
0201

C2153 C2121 33pF

0201

33pF C2101 33pF U2105

1.0nH
0201

33pF C2102 0R C2108

0201 0201 0201
2 1 2 CP HFP 6 TRIP_5G_ANT [21]
C2103 C2131 ?MHZ
3 4
C2152 C2130 ?MHZ 4 TRIP_2G_ANT
C2151 MFP [21]
NC
NC 1 GND1 LFP 8 GPS_IN [21]
NC
NC
3 GND2
5 GND3
7 GND4

B B

2G_5G_WLAN_FEM

1.0nH 4.3pF
WL_RFO_5G_CH0 [20]
0201 0201
C2106 C2105
C2107

WL_RFI_5G_CH0 [20]
0201
NC

U2109
NJG1801K75

2 GND P1 1
0.6nH
C2141 18pF C2109
[20] LNA_EN_5G_CH0 6 CTRL1 P2 3
C2129
[20] PA_EN_5G_CH0
4 CTRL2 PC 5
NC

U2110
PJ F6HG2G441EG65-J
C2146 33pF 1.5nH
OUT 4 4.3pF
WL_BT_RFIO_2G_CH0 1 TRIP_5G_ANT
C2139 IN TRIP_2G_ANT C2140
18pF
[21]
[20] G 3
C2126 C2124 C2135
G
G

C2128
C2115 C2114 [21] C2127
2
5

NC NC NC
NC 2.2nH NC

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number> <Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 21OF 21