S805 Datasheet Revision 0.

8.2.1. GPIO Bank X

Table 3. GPIO Bank X Pin Multiplexing Table

Package Name Func1 Func2 Func3 Func4 Func5

SD_D0_A SDXC_D0_A
GPIOX_0
Reg8[5] Reg5[14]
SD_D1_A SDXC_D1_A
GPIOX_1
Reg8[4] Reg5[13]
SD_D2_A SDXC_D2_A
GPIOX_2
Reg8[3] Reg5[13]
SD_D3_A SDXC_D3_A
GPIOX_3
Reg8[2] Reg5[13]
SDXC_D0_A
Reg5[29]
GPIOX_4
SDXC_D4_A PCM_OUT_A UART_TX_A
Reg5[12] Reg3[30] Reg4[17]
SDXC_D1_A
Reg5[28]
GPIOX_5
SDXC_D5_A PCM_IN_A UART_RX_A
Reg5[12] Reg3[29] Reg4[16]
SDXC_D2_A
Reg5[28]
GPIOX_6
SDXC_D6_A PCM_FS_A UART_CTS_A ISO7816_CLK
Reg5[12] Reg3[28] Reg4[15] Reg5[9]
SDXC_D3_A
Reg5[28] ISO7816_DATA
GPIOX_7
SDXC_D7_A PCM_CLK_A UART_RTS_A Reg5[8]
Reg5[12] Reg3[27] Reg4[14]
SD_CLK_A SDXC_CLK_A UART_TX_B SPI_SCLK Tsin_CLK_B
GPIOX_8
Reg8[1] Reg5[11] Reg6[19] reg4[22] reg3[6]
SD_CMD_A SDXC_CMD_A UART_RX_B SPI_MISO Tsin_SOP_B
GPIOX_9
Reg8[0] Reg5[10] Reg6[18] reg4[24] reg3[7]
PWM_VS
Reg7[31]
GPIOX_10
XTAL_32K_OUT PWM_E UART_CTS_B SPI_MOSI Tsin_D0_B
Reg3[22] Reg9[19] Reg6[17] reg4[23] reg3[8]
XTAL_24M_OUT
GPIOX_11 , XTAL/2 PWM_VS PWM_B
Reg3[20] Reg7[30] Reg2[3]
UART_TX_B ISO7816_DET I2C_SDA_D
GPIOX_16
Reg4[9] Reg4[21] Reg4[5]
UART_RX_B ISO7816_RESET I2C_SCK_D
GPIOX_17
Reg4[8] Reg4[20] Reg4[4]
UART_CTS_B ISO7816_CLK
GPIOX_18
Reg4[7] Reg4[19]
UART_RTS_B ISO7816_DATA
GPIOX_19
Reg4[6] Reg4[18]
UART_RTS_B SPI_SS0 Tsin_D_VALID_B
GPIOX_20
Reg6[16] reg4[25] reg3[9]
GPIOX_21

8.2.2. GPIO Bank Y

Table 4. GPIO Bank Y Pin Multiplexing Table

Package Name Func1 Func2 Func3 Func4 Func5

TSin_D_VALID_A
GPIOY_0
Reg3[2]

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Package Name Func1 Func2 Func3 Func4 Func5

TSin_SOP_A
GPIOY_1
Reg3[1]
SPDIF_OUT XTAL_24Mhz
GPIOY_3
Reg1[7] Reg3[18]
TSin_D6_A
GPIOY_6
Reg3[5]
TSin_D7_A
GPIOY_7
Reg3[5]
Tsin_CLK_A
GPIOY_8
Reg3[0]
TSin_D0_A
GPIOY_9
Reg3[4]
TSin_D1_A
GPIOY_10
Reg3[5]
TSin_D2_A
GPIOY_11
Reg3[5]
TSin_D3_A
GPIOY_12
Reg3[5]
TSin_D4_A ISO7816_CLK
GPIOY_13
Reg3[5] Reg5[7]
TSin_D5_A ISO7816_DATA
GPIOY_14
Reg3[5] Reg5[6]

8.2.3. GPIO Bank DV

Table 5.. GPIO Bank DV Pin Multiplexing Table

Package Name Func1 Func2 Func3 Func4 Func5

PWM_VS PWM_C
GPIODV_9
Reg7[28] Reg3[24]
UART_TX_C I2C_SDA_A
GPIODV_24
Reg6[23] Reg9[31]
UART_RX_C I2C_SCK_A
GPIODV_25
Reg6[22] Reg9[30]
UART_CTS_C I2C_SDA_B
GPIODV_26
Reg6[21] Reg9[29]
UART_RTS_C I2C_SCK_B
GPIODV_27
Reg6[20] Reg9[28]
PWM_D PWM_VS I2C_SDA_C
GPIODV_28
Reg3[26] Reg7[27] Reg9[27]
PWM_C PWM_VS XTAL24_output I2C_SCK_C
GPIODV_29
Reg3[25] Reg7[26] Reg7[25] Reg9[26]

8.2.4. GPIO Bank H

Table 7. GPIO Bank H Pin Multiplexing Table

Package Name Func1 Func2 Func3 Func4 Func5

HDMI_HPD SPI_SS1
GPIOH_0
Reg1[26] Reg8[11]
HDMI_SDA SPI_SS2
GPIOH_1
Reg1[25] Reg8[12]
HDMI_SCL
GPIOH_2
Reg1[24]
HDMI_CEC SPI_SS0 I2C_SDA_B
GPIOH_3
Reg1[23] Reg9[13] Reg5[27]
SPI_MISO I2C_SCK_B
GPIOH_4
Reg9[12] Reg5[26]
ETH_TXD1 SPI_MOSI I2C_SDA_C
GPIOH_5
Reg7[21] Reg9[11] Reg5[25]

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Package Name Func1 Func2 Func3 Func4 Func5

ETH_TXD0 SPI_SCLK I2C_SCK_C
GPIOH_6
Reg7[20] Reg9[10] Reg5[24]
ETH_TXD3 I2C_SDA_D
GPIOH_7
Reg6[13] Reg4[3]
ETH_TXD2 I2C_SCL_D
GPIOH_8
Reg6[12] Reg4[2]
CLK_24M_OUT,
GPIOH_9 CLK_12M_OUT ETH_TX_CLK
Reg4[1] Reg6[11]

8.2.5. GPIO Bank AO

Table 10. GPIO Bank AO Pin Multiplexing Table

Package Name Func1 Func2 Func3 Func4

UART_TX_AO_A UART_TX_AO_B
GPIOAO_0
Reg[12] Reg[26]
UART_RX_AO_A UART_RX_AO_B
GPIOAO_1
Reg[11] Reg[25]
UART_CTS_AO_A UART_CTS_AO_B
GPIOAO_2
Reg[10] Reg[8]
UART_RTS_AO_A PWM_C UART_RTS_AO_B
GPIOAO_3
Reg[9] Reg[22] Reg[7]
I2C_MST_SCK_AO I2C_SLAVE_SCK_AO UART_TX_AO_B
GPIOAO_4
Reg[6] Reg[2] Reg[24]
I2C_MST_SDA_AO I2C_SLAVE_SDA_AO UART_RX_AO_B
GPIOAO_5
Reg[5] Reg[1] Reg[23]
CLK_32K_IN
GPIOAO_6 CLK_32K_OUT SPDIF_OUT I2S_IN_CH01
Reg[18] Reg[16] Reg1[13]
IR_REMOTE_INPUT(IR IR_REMOTE_OUTPUT(
GPIOAO_7 _BLASTER) IR_DEC)
Reg[0] Reg[21]
I2S_AM_CLK_OUT
GPIOAO_8
JTAG_TCK Reg[30]
I2S_AO_CLK_OUT I2S_AO_CLK_IN
GPIOAO_9
JTAG_TMS Reg[29] Reg1[15]
I2S_LR_CLK_OUT I2S_LR_CLK_IN
GPIOAO_10
JTAG_TDI Reg[28] Reg1[14]
I2S_OUT_01
GPIOAO_11
JTAG_TDO Reg[27]
HDMI_CEC
GPIOAO_12
Reg[17]
IR_BLASTER
GPIOAO_13
Reg[31]
PWM_F
TEST_N
Reg[19]

8.2.6. GPIO Bank BOOT

Table 6. GPIO Bank BOOT Pin Multiplexing Table

Package Name Func1 Func2 Func3 Func4 Func5

NAND_IO_0 SDXC_D0_C SD_D0_C
BOOT_0
Reg2[26] Reg4[30] Reg6[29] BSD_TDO
NAND_IO_1 SDXC_D1_C SD_D1_C
BOOT_1
Reg2[26] Reg4[29] Reg6[28] BSD_TDI
NAND_IO_2 SDXC_D2_C SD_D2_C
BOOT_2
Reg2[26] Reg4[29] Reg6[27] BSD_TMS
NAND_IO_3 SDXC_D3_C SD_D3_C
BOOT_3
Reg2[26] Reg4[29] Reg6[26] BSD_TCK
NAND_IO_4 SDXC_D4_C
BOOT_4
Reg2[26] Reg4[28]
BOOT_5 NAND_IO_5 SDXC_D5_C

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Reg2[26] Reg4[28]
NAND_IO_6 SDXC_D6_C
BOOT_6
Reg2[26] Reg4[28]
NAND_IO_7 SDXC_D7_C
BOOT_7
Reg2[26] Reg4[28]
NAND_IO_CE0 SDXC_CLK_C SD_CLK_C
BOOT_8
Reg2[25] Reg7[19] Reg6[31]
NAND_IO_CE1
BOOT_9
Reg2[24]
NAND_IO_RB0 SDXC_CMD_C SD_CMD_C
BOOT_10
Reg2[17] Reg7[18] Reg6[30]
NAND_ALE NOR_D
BOOT_11
Reg2[21] Reg5[1]
NAND_CLE NOR_Q
BOOT_12
Reg2[20 Reg5[3]
NAND_WEN_CLK NOR_C
BOOT_13
Reg2[19] Reg5[2]
NAND_REN_CLK
BOOT_14
Reg2[18]
NAND_DQS
BOOT_15
Reg2[27]
NAND_DQS NOR_CS
BOOT_18
Reg2[28] Reg5[0]

8.2.7. GPIO Bank CARD

Table 7.. GPIO Bank CARD Pin Multiplexing Table

Package Name Func1 Func2 Func3 Func4 Func5

SD_D1_B SDXC_D1_B
CARD_0 Reg2[14] Reg2[6] JTAG_TDI
SD_D0_B SDXC_D0_B
CARD_1 Reg2[15] Reg2[7] JTAG_TDO
SD_CLK_B SDXC_CLK_B
CARD_2 Reg2[11] Reg2[5] JTAG_CLK
SD_CMD_B SDXC_CMD_B
CARD_3 Reg2[10] Reg2[4] JTAG_TMS
SD_D3_B SDXC_D3_B UART_TX_AO_A UART_RX_AO_A
CARD_4 Reg2[12] Reg2[6] Reg8[10] Reg8[8]
SD_D2_B SDXC_D2_B UART_RX_AO_A UART_TX_AO_A
CARD_5 Reg2[13] Reg2[6] Reg8[9] Reg8[7]
CARD_6

8.2.8. GPIO Bank DIF

Table 8. GPIO Bank DIF Pin Multiplexing Table

Package Name Func1 Func2 Func3 Func4 Func5

ETH_RXD1
DIF_0_P
Reg6[0]
ETH_RXD0
DIF_0_N
Reg6[1]
ETH_RX_DV
DIF_1_P
Reg6[2]
ETH_RX_CLK
DIF_1_N
Reg6[3]
ETH_TXD0
DIF_2_P
Reg6[4]
ETH_TXD1
DIF_2_N
Reg6[5]

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Package Name Func1 Func2 Func3 Func4 Func5

ETH_TX_EN
DIF_3_P
Reg6[6]
ETH_PHY_REF_CLK
DIF_3_N
Reg6[8]
ETH_MDC
DIF_4_P
Reg6[9]
ETH_MDIO
DIF_4_N
Reg6[10]

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