Introduction to PLDs

Objectives

 Review of Digital Systems

 History of PLDs
 Types of PLDs
 Terminology
 Some Basics

 a combinational logic circuit is one where the

next output depends only on the current input

any any
number of number of
inputs logic gates outputs
AND, OR, NOT
(typically 7400 series SSI)
 Sequential Circuit

 a sequential logic circuit is one where the next

output depends not only on the current input
but also on the sequence of past inputs

usually flip-flops
SR, JK, D, T
 the design of a sequential logic circuit includes the design of a
combinational logic circuit

any number of any number of

inputs outputs

logic gates
AND, OR, NOT
(typically 7400 series SSI)
 Purpose of this Course

• This course is about logic circuit implementation

specification
X1 X2 Q1 Q2 Y Karnaugh Map
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0 circuit
0 0 1 1 0
0 1 0 0 1
0 1 0 1 1
0 1 1 0 x
0 1 1 1 1
1 0 0 0 0
1 0 0 1 1
?
1 0 1 0 x
1 0 1 1 1
1 1 0 0 0
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1
function
truth table
 Logic Circuit Implementation
• there are several options

Memory

SSI Gates MSI ICs

Logic Circuit Implementation

• there are several options

U19-251641-02
PLA

Programmable Devices
 Electronic Components
Logic

Standard
ASIC
Logic

Programmable
Logic Devices Gate Cell-Based Full Custom
(PLDs) Arrays ICs ICs

SPLDs
(PALs) CPLDs FPGAs

Acronyms Common Resources

SPLD = Simple Prog. Logic Device
PAL = Prog. Array of Logic
CPLD = Complex PLD
FPGA = Field Prog. Gate Array
ASIC = Application Specific IC
Configurable Logic Blocks (CLB)
Memory Look-Up Table (LUT) •
AND-OR planes •
Simple gates •
Input / Output Blocks (IOB)
Bidirectional, latches, inverters, pullup/pulldowns •
Interconnect or Routing
Local, internal feedback, and global •
 How Do You Make a “Programmable”
Circuit?
• One time programmable
• Fuses (destroy internal links with current)
• Anti-fuses (grow internal links)
• PROM
• Reprogrammable
• EPROM
• EEPROM
• Flash }
• SRAM - volatile
non-volatile
Programmable ROM (PROM)

• First ones had fusible links

• High voltage would blow out links
• Fast to program
• Single use
 UV EPROM
• Erasable PROM
• Common technologies used UV light to erase
complete device
• Took about 10 minutes
• Holds state as charge in very well insulated
areas of the chip
• Nonvolatile for several (10?) years
 EEPROM
• Electrically Erasable PROM
• Similar technology to UV EPROM

• Erased in blocks by higher voltage

• Programming slower than reading

• Some called flash memory

• Digital cameras, MP3 players, BIOS

• Limited life

• Some support individual word write, some block

• One on Xess board has 5 blocks

• Has a boot block that is carefully protected

 Details of ROM
• Memory that is permanent
• k address lines
• 2k items
• n bits

a combinational logic
circuit
Simple PLDs
Programmable Logic Device
• A programmable logic device or PLD is an electronic component

used to build digital circuits.

• Unlike a logic gate, which has a fixed function, a PLD has an

undefined function at the time of manufacture.

• Before the PLD can perform in a circuit it must be programmed.

 Programmable Array Logic (PAL)

• The first programmable logic devices were produced by the

Advanced Micro Devices (AMD) corporation.

• The devices were called PALs, for programmable array logic.

• The PLD business split from AMD under the name Vantis, and was

acquired by Lattice Semiconductor in 1999.

 Early PALs
• The programmable array contains logic gates, themselves fixed

in function, with programmable interconnections between them.

• The array has a number of inputs and outputs, and can create

any Boolean function of a selection of the inputs at any of its

outputs.

• A single PAL can replace a circuit containing a large number,

perhaps a few hundred, of fixed logic gates.

• In a PAL the logic gates are arranged as a sum-of-products array.

• In Boolean terms, this means a number of AND gates whose

outputs feed into a large OR gate that drives one output.

• By selecting which inputs drive each AND gate, and which AND

gates drive the OR gate, any Boolean function can be created.

• A PAL is programmed by fitting it into a machine called a PAL

programmer.

• PAL programmers are usually general-purpose machines that can

program all types of PLDs from all manufacturers.

• A PAL may be programmed only once.

• The PAL programmer must be supplied with a description of the PAL's

desired configuration.

• This is usually in the form of a computer text file with a standard format

defined by the Joint Electron Device Engineering Council (JEDEC).

• JEDEC files can be hand-typed by the design engineer or, more

commonly, produced by a computer program similar to the language

compilers used by software engineers.

 Generic Array Logic (GAL)

• An innovation of the PAL was the generic array logic device, or

GAL, invented by Lattice Semiconductor Inc.

• This device has the same logical properties as the PAL but can be

erased and reprogrammed.

• The GAL is very useful in the prototyping stage of a design, when

any bugs in the logic can be corrected by reprogramming.

• GALs are programmed and reprogrammed using a PAL

programmer.
 Programmable Electrically Erasable Logic
(PEEL)

• A PEEL is a device similar to a GAL and was introduced

by the Integrated Circuit Technology (ICT) corporation.

• As the name implies, it differs from a GAL or PAL in

that it is electrically erasable (reprogrammable)

Complex Programmable Logic Devices (CPLDs)
• Xilinx devices that are cheaper and have fewer gates than

FPGAs

• Meant for interfacing rather than heavy computation

• Built-in flash memory

• Instead of FPGA, which needs external Xess bd. has XC9572XL part

• Approx $2-$7 in one’s qty. (vs. ~$15-20 for the Spartan2 on the board).

Larger qty much lower.

• 1600 gates, 72 registers

 Complex PLDs
• PALs and GALs are available only in small sizes, equivalent to a

few hundred logic gates.

• For bigger logic circuits, complex PLDs or CPLDs can be used.

• These contain the equivalent of several PALs linked by

programmable interconnections, all in one integrated circuit.

• CPLDs can replace thousands, or even hundreds of thousands, of

logic gates.
 Complex PLDs
• Some CPLDs are programmed using a PAL programmer, but this

method becomes inconvenient for devices with hundreds of pins.

• A second method of programming is to solder the device to its

printed circuit board, then feed it with a serial data stream from
a personal computer.

• The CPLD contains a circuit that decodes the data stream and

configures the CPLD to perform its specified logic function.

 Complex PLDs

• Each manufacturer has a proprietary name for its CPLD

programming system.
• For example, Lattice calls it "in-system programming".
• However, these proprietary systems are beginning to give
way to a standard from the Joint Test Action Group
(JTAG).
 Field Programmable Logic Devices
(FPGAs)

• While PALs were busy developing into GALs and CPLDs, a

separate stream of development was happening.

• This type of device is based on gate-array technology and

is called the field-programmable gate array (FPGA).

 Field Programmable Logic Devices
(FPGAs)
• Gate arrays are non-programmable devices that can be

manufactured more cheaply than other types of ICs,

because they contain a standard grid of logic gates
whose interconnections are specified by the customer.

• When a customer orders a new type of chip, the

manufacturer does not have to design it from scratch,

but can just take a standard gate array and modify it to
the customer's requirement.
• FPGAs use a similar grid of logic gates, but the programming is
done by the customer, not by the manufacturer.
• The term "field-programmable" may be ambiguous to some, but
the "field" is just an engineering term for the world outside the
factory where customers live.
• FPGAs are usually programmed after being soldered down to
the circuit board, in the same way as larger CPLDs.
• In most larger FPGAs the configuration is volatile, and must be re-
loaded into the device whenever power is applied or different
functionality is required.
• FPGAs and CPLDs are often equally good choices for a

particular task.

• Sometimes the decision is more an economic one than

a technical one, or may depend on the engineer's

personal preference and history.
 PLD Device Density and VLSI Technology

Year 1995 1996 1997 2000 2003 2004 ?

Technology 0.6µ 0.35 µ 0.25 µ 0.18 µ 0.13 µ 0.07µ

100K LC*
8Mb RAM
Gate Count 25K 100K 250K 1M
400 18X18
multipliers

Transistor
3.5M 12M 23M 75M 430M 1B
Count

*note: Xilinx Virtex-II Pro XC2VP100 (9/16/2003)

 How PLDs Remember Their Configuration

• A PLD is a combination of a logic device and a

memory device.

• The memory is used to store the pattern that was

given to the chip during programming.

• Most of the methods for storing data in an integrated

circuit have been adapted for use in PLDs.

How PLDs Remember Their Configuration

• The methods for storing data in an integrated circuit

include:
• silicon antifuses

• static RAM (SRAM)

• flash memory

• EPROM cells
 How PLDs Remember Their
Configuration – Anti-fuses
• Silicon antifuses are the storage elements used in the

PAL, the first type of PLD.

• These are connections that are made by applying a

voltage across a modified area of silicon inside the chip.

• They are called antifuses because they work in the

opposite way to normal fuses, which begin life as

connections until they are broken by an electric current.
 How PLDs Remember Their
Configuration - SRAM
• SRAM, or static RAM, is a volatile type of memory, meaning
that its contents are lost each time the power is switched
off.
• SRAM-based PLDs therefore have to be programmed every
time the circuit is switched on.
• This is usually done automatically by another part of the
circuit.
 How PLDs Remember Their
Configuration - Flash

• Flash memory is non-volatile, retaining its contents even

when the power is switched off.

• It can be erased and reprogrammed as required.

• This fact makes flash memory useful for PLD memory.

 How PLDs Remember Their
Configuration - EPROM
• An EPROM cell is a MOS (metal-oxide-semiconductor)
transistor that can be switched on by trapping an
electric charge permanently on its gate electrode.

• This is done by a PAL programmer.

• The charge remains for many years and can only be

removed by exposing the chip to strong ultraviolet
light in a device called an EPROM eraser.
PLD Programming Languages

PLD programming languages

• PALASM

• ABEL

• CUPL
Hardware Description Languages

• The languages used as source code for logic compilers

are called hardware description languages, or HDLs.

• Examples of HDLS include:

• VHDL

• Verilog HDL

• AHDL
Programmable Logic Solutions

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No lengthy prototyping cycle

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Ultimate flexibility to manage rapid change