Department of ECE

23EC1202
DIGITAL DESIGN & COMPUTER ARCHITECTURE
Session – 09 & 10

CPLD & FPGA

 AIM OF THE SESSION

To familiarize students with the basic concept of CPLD & FPGA design.

INSTRUCTIONAL OBJECTIVES

This Session is designed to:

1. Discuss about other Programmable Logic Devices CPLD and FPGA
2. Design implement complex logic functions using CPLD and FPGA.
3. Differences between CPLD and FPGA.

LEARNING OUTCOMES

At the end of this session, you should be able to:

1. Define CPLD, FPGA and difference between them.
2. Design complex functions using CPLD and FPGA.
 INTRODUCTION TO CPLD & FPGA

• Complex Programmable Logic Device (CPLD) and Field Programmable Gate Array (FPGA)
are programmable logic devices used to build digital circuits.

• CPLDs are often chosen for applications with moderate logic complexity, while FPGAs
are preferred for applications requiring high customization and parallel processing
capabilities.
 BLOCK DIAGRAM OF CPLD

• A CPLD comprises multiple PAL-like blocks

on a single chip with programmable
interconnect to connect the blocks.

• Each PAL function block has 16 Macro-

cells.

• Each Macro-cell has access to 16 signals

from I/O Blocks.

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INTERNAL STRUCTURE OF A MACRO CELL

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 INTERNAL STRUCTURE OF A PAL BLOCK (MACRO CELL)
• The PAL block consists of macro cells.

• Macro cells are defined as functional blocks responsible for performing sequential or
combinational logic.

• The macro cell consists of AND/OR array, XOR gate, Flip-flop, and Multiplexer.

• AND/OR arrays are completely reprogrammable and responsible for performing various logic
functions.

• The flip-flop is used to store the output value produced by the XOR gate.

• XOR gates provide negation ability.

• Multiplexer is used to select either combinational(Non Register) or sequential logic(Register).

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 IMPLEMENTATION USING CPLD
Example: Implement the given Boolean function using CPLD. F = x1 x3 x6’+ x1 x4 x5 x6’ + x2 x3 x7 + x2 x4 x5 x7
 APPLICATIONS OF CPLD

➢ Ideal for high performance, critical control applications.

➢ Used to implement control logic in embedded systems.

➢ Used as memory elements.

➢ Used for address decoding.

➢ Used as boot loader.

ARCHITECTURE OF FPGA
 FIELD PROGRAMMABLE GATE ARRAY (FPGA)
➢ A Field Programmable Gate Array (FPGA) has an entire logic system integrated on a single chip.

➢ It offers excellent flexibility for reprogramming to the system designers.

➢ The general FPGA architecture consists of three types of modules.

1. I/O blocks or Pads

2. Switch Matrix/ Interconnection Wires

3. Configurable logic blocks (CLB)

➢ CLB (Configurable Logic Block) contains MUX, D flip flop and LUT which implements the user logic.

➢ LUT (Look-Up Table) is useful for combinational logical function implementation; the MUX is used
for selection logic, and D flip flop stores the output of the LUT.

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CONFIGURABLE LOGIC BLOCK (CLB)
 LOOK-UP TABLE (LUT)

➢LUTs comprise of 1-bit SRAM cells to hold

either ‘0’ or ‘1” and a set of multiplexers.

➢The number of inputs available for a LUT

determine its size.

➢In general, a LUT with n inputs comprise of

2n single-bit SRAM memory cells followed by
a 2n -1 multiplexers.
 IMPLEMENTATION OF CLB IN FPGA
Example: Implement the CLB for the given Boolean function Y=( A.B)‘ or Y(A,B)= ∑m(0,1,2)
 CPLD (Vs) FPGA

Characteristics CPLD FPGA

Logic Cells It has a small number of logic cells. It has a large number of logic cells.
Flexibility Less Flexible More Flexible
Cost Low Cost High Cost
Power Consumption Less power consumption Higher power consumption
Reconfigurability Less reconfigurability More reconfigurability
Density Low to medium Medium to high
Flip-flop ratios Less flip-flop ratio More flip-flop ratio
Applications Best for simple applications Best for complex applications
 SUMMARY
• CPLDs feature fewer logic cells and are best suited for simpler logic functions and smaller
designs.

• CPLDs have a simpler architecture with a set connecting structure, which can result in
quicker design times and reduced costs. They also consume less electricity and are better
suited for low-volume production runs.

• FPGAs contain a far higher number of logic cells and a more flexible connection topology,
making them better suited for larger, more complicated designs.

• FPGAs provide greater reconfigurability and can serve a broader range of applications. Their
more complex architecture can result in longer design times, higher prices, and higher
power consumption.
 SELF-ASSESSMENT QUESTIONS
1. The complex programmable logic device contains several PLD blocks and __________

a) A language compiler
b) AND/OR arrays
c) Global interconnection matrix
d) Field-programmable switches

2. Which type of device FPGA are?

a) SLD
b) SROM
c) EPROM
d) PLD
 SELF-ASSESSMENT QUESTIONS

3. In FPGA, vertical and horizontal directions are separated by ____________

a) A line
b) A channel
c) A strobe
d) A flip-flop

4. SPLDs, CPLDs, and FPGAs are all which type of device?

a) PAL
b) PLD
c) EPROM
d) SRAM
 TERMINAL QUESTIONS
Short answer questions:
1. Present the abbreviations of CPLD & FPGA in digital circuits.
2. Explore the applications of CPLD in the circuit design.
3. What is the purpose of CLB and LUT in the context of FPGAs.
Long answer questions:
1. Elaborate on the architecture of a CPLD, emphasizing the role of Macrocells in providing flexibility with
internal diagram.
2. Draw & present insights of FPGA architecture, focusing on Configurable Logic Blocks (CLB) and Look-Up
Tables (LUT).
3. Design the function F = x1 x3 x6’+ x1 x4 x5 x6’ + x2 x3 x7 + x2 x4 x5 x7 using CPLD and flip-flops.
4. Compare and contrast CPLDs (Complex Programmable Logic Devices) and FPGAs (Field-Programmable Gate
Arrays) highlighting key differences.
 REFERENCES FOR FURTHER LEARNING

Reference Books:
1. Computer System Architecture by M. Moris Mano
2. Fundamentals of Digital Logic with Verilog HDL by Stephen Brown and ZvonkoVranesic

Sites and Web links:

1. https://www.tutorialspoint.com/difference-between-cpld-and-fpga
2. https://www.geeksforgeeks.org/xilinx-fpga-architecture/
3. https://www.scribd.com/document/191760393/UNIT-I-CPLD-FPGA-Architectures
 THANK YOU

Team – Digital Design & Computer Architecture